; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NODSP --check-prefix=CHECK-NODSP-V8 ; RUN: llc -mtriple=thumbv7-linux-android %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NODSP --check-prefix=CHECK-NODSP-V7 ; RUN: llc -mtriple=thumbv7em -mcpu=cortex-m7 %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DSP ; RUN: llc -mtriple=thumbv8 %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DSP-IMM ; Transform will fail because the trunc is not a sink. define i16 @dsp_trunc(i32 %arg0, i32 %arg1, i16* %gep0, i16* %gep1) { ; CHECK-NODSP-V8-LABEL: dsp_trunc: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: add r1, r0 ; CHECK-NODSP-V8-NEXT: ldrh r0, [r2] ; CHECK-NODSP-V8-NEXT: ldrh r2, [r3] ; CHECK-NODSP-V8-NEXT: add r0, r1 ; CHECK-NODSP-V8-NEXT: subs r1, r2, r1 ; CHECK-NODSP-V8-NEXT: uxth r3, r0 ; CHECK-NODSP-V8-NEXT: uxth r2, r1 ; CHECK-NODSP-V8-NEXT: cmp r3, r2 ; CHECK-NODSP-V8-NEXT: it lo ; CHECK-NODSP-V8-NEXT: movlo r0, r1 ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: dsp_trunc: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: ldrh r2, [r2] ; CHECK-NODSP-V7-NEXT: add r1, r0 ; CHECK-NODSP-V7-NEXT: ldrh r3, [r3] ; CHECK-NODSP-V7-NEXT: adds r0, r2, r1 ; CHECK-NODSP-V7-NEXT: subs r1, r3, r1 ; CHECK-NODSP-V7-NEXT: uxth r3, r0 ; CHECK-NODSP-V7-NEXT: uxth r2, r1 ; CHECK-NODSP-V7-NEXT: cmp r3, r2 ; CHECK-NODSP-V7-NEXT: it lo ; CHECK-NODSP-V7-NEXT: movlo r0, r1 ; CHECK-NODSP-V7-NEXT: bx lr ; ; CHECK-DSP-LABEL: dsp_trunc: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: add r0, r1 ; CHECK-DSP-NEXT: ldrh r1, [r3] ; CHECK-DSP-NEXT: ldrh r2, [r2] ; CHECK-DSP-NEXT: subs r1, r1, r0 ; CHECK-DSP-NEXT: add r0, r2 ; CHECK-DSP-NEXT: uxth r3, r1 ; CHECK-DSP-NEXT: uxth r2, r0 ; CHECK-DSP-NEXT: cmp r2, r3 ; CHECK-DSP-NEXT: it lo ; CHECK-DSP-NEXT: movlo r0, r1 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: dsp_trunc: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: add r0, r1 ; CHECK-DSP-IMM-NEXT: movs r1, #0 ; CHECK-DSP-IMM-NEXT: uxth r0, r0 ; CHECK-DSP-IMM-NEXT: usub16 r1, r1, r0 ; CHECK-DSP-IMM-NEXT: ldrh r0, [r2] ; CHECK-DSP-IMM-NEXT: ldrh r3, [r3] ; CHECK-DSP-IMM-NEXT: usub16 r0, r0, r1 ; CHECK-DSP-IMM-NEXT: uadd16 r1, r3, r1 ; CHECK-DSP-IMM-NEXT: cmp r0, r1 ; CHECK-DSP-IMM-NEXT: it lo ; CHECK-DSP-IMM-NEXT: movlo r0, r1 ; CHECK-DSP-IMM-NEXT: bx lr entry: %add0 = add i32 %arg0, %arg1 %conv0 = trunc i32 %add0 to i16 %sub0 = sub i16 0, %conv0 %load0 = load i16, i16* %gep0, align 2 %load1 = load i16, i16* %gep1, align 2 %sub1 = sub i16 %load0, %sub0 %add1 = add i16 %load1, %sub0 %cmp = icmp ult i16 %sub1, %add1 %res = select i1 %cmp, i16 %add1, i16 %sub1 ret i16 %res } define i8 @trunc_i16_i8(i16* %ptr, i16 zeroext %arg0, i8 zeroext %arg1) { ; CHECK-LABEL: trunc_i16_i8: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: ldrh r0, [r0] ; CHECK-NEXT: add r0, r1 ; CHECK-NEXT: uxtb r0, r0 ; CHECK-NEXT: cmp r0, r2 ; CHECK-NEXT: it ls ; CHECK-NEXT: movls r0, r2 ; CHECK-NEXT: bx lr entry: %0 = load i16, i16* %ptr %1 = add i16 %0, %arg0 %2 = trunc i16 %1 to i8 %3 = icmp ugt i8 %2, %arg1 %4 = select i1 %3, i8 %2, i8 %arg1 ret i8 %4 } ; The pass perform the transform, but a uxtb will still be inserted to handle ; the zext to the icmp. define i8 @icmp_i32_zext(i8* %ptr) { ; CHECK-NODSP-V8-LABEL: icmp_i32_zext: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: ldrb r2, [r0], #1 ; CHECK-NODSP-V8-NEXT: subs r1, r2, #1 ; CHECK-NODSP-V8-NEXT: .p2align 2 ; CHECK-NODSP-V8-NEXT: .LBB2_1: @ %body ; CHECK-NODSP-V8-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NODSP-V8-NEXT: uxtb r3, r1 ; CHECK-NODSP-V8-NEXT: cmp r2, r3 ; CHECK-NODSP-V8-NEXT: itt ne ; CHECK-NODSP-V8-NEXT: movne r0, r1 ; CHECK-NODSP-V8-NEXT: bxne lr ; CHECK-NODSP-V8-NEXT: ldrb r1, [r0, r2] ; CHECK-NODSP-V8-NEXT: adds r2, #1 ; CHECK-NODSP-V8-NEXT: b .LBB2_1 ; ; CHECK-NODSP-V7-LABEL: icmp_i32_zext: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: ldrb r2, [r0], #1 ; CHECK-NODSP-V7-NEXT: subs r1, r2, #1 ; CHECK-NODSP-V7-NEXT: .LBB2_1: @ %body ; CHECK-NODSP-V7-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NODSP-V7-NEXT: uxtb r3, r1 ; CHECK-NODSP-V7-NEXT: cmp r2, r3 ; CHECK-NODSP-V7-NEXT: itt ne ; CHECK-NODSP-V7-NEXT: movne r0, r1 ; CHECK-NODSP-V7-NEXT: bxne lr ; CHECK-NODSP-V7-NEXT: ldrb r1, [r0, r2] ; CHECK-NODSP-V7-NEXT: adds r2, #1 ; CHECK-NODSP-V7-NEXT: b .LBB2_1 ; ; CHECK-DSP-LABEL: icmp_i32_zext: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: ldrb r2, [r0], #1 ; CHECK-DSP-NEXT: subs r1, r2, #1 ; CHECK-DSP-NEXT: .LBB2_1: @ %body ; CHECK-DSP-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-DSP-NEXT: uxtb r3, r1 ; CHECK-DSP-NEXT: cmp r2, r3 ; CHECK-DSP-NEXT: itt ne ; CHECK-DSP-NEXT: movne r0, r1 ; CHECK-DSP-NEXT: bxne lr ; CHECK-DSP-NEXT: ldrb r1, [r0, r2] ; CHECK-DSP-NEXT: adds r2, #1 ; CHECK-DSP-NEXT: b .LBB2_1 ; ; CHECK-DSP-IMM-LABEL: icmp_i32_zext: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: ldrb r2, [r0], #1 ; CHECK-DSP-IMM-NEXT: subs r1, r2, #1 ; CHECK-DSP-IMM-NEXT: .LBB2_1: @ %body ; CHECK-DSP-IMM-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-DSP-IMM-NEXT: uxtb r3, r1 ; CHECK-DSP-IMM-NEXT: cmp r2, r3 ; CHECK-DSP-IMM-NEXT: bne .LBB2_3 ; CHECK-DSP-IMM-NEXT: @ %bb.2: @ %if.end ; CHECK-DSP-IMM-NEXT: @ in Loop: Header=BB2_1 Depth=1 ; CHECK-DSP-IMM-NEXT: ldrb r1, [r0, r2] ; CHECK-DSP-IMM-NEXT: adds r2, #1 ; CHECK-DSP-IMM-NEXT: b .LBB2_1 ; CHECK-DSP-IMM-NEXT: .LBB2_3: @ %exit ; CHECK-DSP-IMM-NEXT: mov r0, r1 ; CHECK-DSP-IMM-NEXT: bx lr entry: %gep = getelementptr inbounds i8, i8* %ptr, i32 0 %0 = load i8, i8* %gep, align 1 %1 = sub nuw nsw i8 %0, 1 %conv44 = zext i8 %0 to i32 br label %preheader preheader: br label %body body: %2 = phi i8 [ %1, %preheader ], [ %3, %if.end ] %si.0274 = phi i32 [ %conv44, %preheader ], [ %inc, %if.end ] %conv51266 = zext i8 %2 to i32 %cmp52267 = icmp eq i32 %si.0274, %conv51266 br i1 %cmp52267, label %if.end, label %exit if.end: %inc = add i32 %si.0274, 1 %gep1 = getelementptr inbounds i8, i8* %ptr, i32 %inc %3 = load i8, i8* %gep1, align 1 br label %body exit: ret i8 %2 } ; Won't don't handle sext define i32 @icmp_sext_zext_store_i8_i16() { ; CHECK-NODSP-V8-LABEL: icmp_sext_zext_store_i8_i16: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: movw r0, :lower16:d_uch ; CHECK-NODSP-V8-NEXT: movt r0, :upper16:d_uch ; CHECK-NODSP-V8-NEXT: ldrb r1, [r0, #2] ; CHECK-NODSP-V8-NEXT: movw r0, :lower16:d_sh ; CHECK-NODSP-V8-NEXT: movt r0, :upper16:d_sh ; CHECK-NODSP-V8-NEXT: ldrsh.w r0, [r0, #4] ; CHECK-NODSP-V8-NEXT: movw r2, :lower16:sh1 ; CHECK-NODSP-V8-NEXT: subs r0, r1, r0 ; CHECK-NODSP-V8-NEXT: clz r0, r0 ; CHECK-NODSP-V8-NEXT: movt r2, :upper16:sh1 ; CHECK-NODSP-V8-NEXT: lsrs r0, r0, #5 ; CHECK-NODSP-V8-NEXT: strh r1, [r2] ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: icmp_sext_zext_store_i8_i16: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: movw r0, :lower16:d_sh ; CHECK-NODSP-V7-NEXT: movw r1, :lower16:d_uch ; CHECK-NODSP-V7-NEXT: movt r0, :upper16:d_sh ; CHECK-NODSP-V7-NEXT: movt r1, :upper16:d_uch ; CHECK-NODSP-V7-NEXT: ldrb r1, [r1, #2] ; CHECK-NODSP-V7-NEXT: movw r2, :lower16:sh1 ; CHECK-NODSP-V7-NEXT: ldrsh.w r0, [r0, #4] ; CHECK-NODSP-V7-NEXT: movt r2, :upper16:sh1 ; CHECK-NODSP-V7-NEXT: strh r1, [r2] ; CHECK-NODSP-V7-NEXT: subs r0, r1, r0 ; CHECK-NODSP-V7-NEXT: clz r0, r0 ; CHECK-NODSP-V7-NEXT: lsrs r0, r0, #5 ; CHECK-NODSP-V7-NEXT: bx lr ; ; CHECK-DSP-LABEL: icmp_sext_zext_store_i8_i16: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: movw r0, :lower16:d_uch ; CHECK-DSP-NEXT: movw r1, :lower16:sh1 ; CHECK-DSP-NEXT: movt r0, :upper16:d_uch ; CHECK-DSP-NEXT: movt r1, :upper16:sh1 ; CHECK-DSP-NEXT: ldrb r0, [r0, #2] ; CHECK-DSP-NEXT: strh r0, [r1] ; CHECK-DSP-NEXT: movw r1, :lower16:d_sh ; CHECK-DSP-NEXT: movt r1, :upper16:d_sh ; CHECK-DSP-NEXT: ldrsh.w r1, [r1, #4] ; CHECK-DSP-NEXT: subs r0, r0, r1 ; CHECK-DSP-NEXT: clz r0, r0 ; CHECK-DSP-NEXT: lsrs r0, r0, #5 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: icmp_sext_zext_store_i8_i16: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: movw r0, :lower16:d_sh ; CHECK-DSP-IMM-NEXT: movw r1, :lower16:d_uch ; CHECK-DSP-IMM-NEXT: movt r0, :upper16:d_sh ; CHECK-DSP-IMM-NEXT: movt r1, :upper16:d_uch ; CHECK-DSP-IMM-NEXT: ldrb r1, [r1, #2] ; CHECK-DSP-IMM-NEXT: movw r2, :lower16:sh1 ; CHECK-DSP-IMM-NEXT: ldrsh.w r0, [r0, #4] ; CHECK-DSP-IMM-NEXT: movt r2, :upper16:sh1 ; CHECK-DSP-IMM-NEXT: strh r1, [r2] ; CHECK-DSP-IMM-NEXT: subs r0, r1, r0 ; CHECK-DSP-IMM-NEXT: clz r0, r0 ; CHECK-DSP-IMM-NEXT: lsrs r0, r0, #5 ; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i8, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @d_uch, i32 0, i32 2), align 1 %conv = zext i8 %0 to i16 store i16 %conv, i16* @sh1, align 2 %conv1 = zext i8 %0 to i32 %1 = load i16, i16* getelementptr inbounds ([16 x i16], [16 x i16]* @d_sh, i32 0, i32 2), align 2 %conv2 = sext i16 %1 to i32 %cmp = icmp eq i32 %conv1, %conv2 %conv3 = zext i1 %cmp to i32 ret i32 %conv3 } define i1 @or_icmp_ugt(i32 %arg, i8* %ptr) { ; CHECK-NODSP-V8-LABEL: or_icmp_ugt: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: ldrb r1, [r1] ; CHECK-NODSP-V8-NEXT: adds r2, r1, #3 ; CHECK-NODSP-V8-NEXT: subs.w r0, r0, r2, lsl #1 ; CHECK-NODSP-V8-NEXT: it ne ; CHECK-NODSP-V8-NEXT: movne r0, #1 ; CHECK-NODSP-V8-NEXT: subs r1, #1 ; CHECK-NODSP-V8-NEXT: movs r2, #0 ; CHECK-NODSP-V8-NEXT: cmp r1, #3 ; CHECK-NODSP-V8-NEXT: it hi ; CHECK-NODSP-V8-NEXT: movhi r2, #1 ; CHECK-NODSP-V8-NEXT: orrs r0, r2 ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: or_icmp_ugt: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: ldrb r1, [r1] ; CHECK-NODSP-V7-NEXT: adds r2, r1, #3 ; CHECK-NODSP-V7-NEXT: subs r1, #1 ; CHECK-NODSP-V7-NEXT: subs.w r0, r0, r2, lsl #1 ; CHECK-NODSP-V7-NEXT: mov.w r2, #0 ; CHECK-NODSP-V7-NEXT: it ne ; CHECK-NODSP-V7-NEXT: movne r0, #1 ; CHECK-NODSP-V7-NEXT: cmp r1, #3 ; CHECK-NODSP-V7-NEXT: it hi ; CHECK-NODSP-V7-NEXT: movhi r2, #1 ; CHECK-NODSP-V7-NEXT: orrs r0, r2 ; CHECK-NODSP-V7-NEXT: bx lr ; ; CHECK-DSP-LABEL: or_icmp_ugt: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: ldrb r1, [r1] ; CHECK-DSP-NEXT: adds r2, r1, #3 ; CHECK-DSP-NEXT: subs r1, #1 ; CHECK-DSP-NEXT: subs.w r0, r0, r2, lsl #1 ; CHECK-DSP-NEXT: mov.w r2, #0 ; CHECK-DSP-NEXT: it ne ; CHECK-DSP-NEXT: movne r0, #1 ; CHECK-DSP-NEXT: cmp r1, #3 ; CHECK-DSP-NEXT: it hi ; CHECK-DSP-NEXT: movhi r2, #1 ; CHECK-DSP-NEXT: orrs r0, r2 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: or_icmp_ugt: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: ldrb r1, [r1] ; CHECK-DSP-IMM-NEXT: adds r2, r1, #3 ; CHECK-DSP-IMM-NEXT: subs.w r0, r0, r2, lsl #1 ; CHECK-DSP-IMM-NEXT: it ne ; CHECK-DSP-IMM-NEXT: movne r0, #1 ; CHECK-DSP-IMM-NEXT: subs r1, #1 ; CHECK-DSP-IMM-NEXT: movs r2, #0 ; CHECK-DSP-IMM-NEXT: cmp r1, #3 ; CHECK-DSP-IMM-NEXT: it hi ; CHECK-DSP-IMM-NEXT: movhi r2, #1 ; CHECK-DSP-IMM-NEXT: orrs r0, r2 ; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i8, i8* %ptr %1 = zext i8 %0 to i32 %mul = shl nuw nsw i32 %1, 1 %add0 = add nuw nsw i32 %mul, 6 %cmp0 = icmp ne i32 %arg, %add0 %add1 = add i8 %0, -1 %cmp1 = icmp ugt i8 %add1, 3 %or = or i1 %cmp0, %cmp1 ret i1 %or } ; We currently only handle truncs as sinks, so a uxt will still be needed for ; the icmp ugt instruction. define void @urem_trunc_icmps(i16** %in, i32* %g, i32* %k) { ; CHECK-NODSP-V8-LABEL: urem_trunc_icmps: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: ldr r0, [r0] ; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] ; CHECK-NODSP-V8-NEXT: cbz r0, .LBB5_3 ; CHECK-NODSP-V8-NEXT: @ %bb.1: @ %cond.false.i ; CHECK-NODSP-V8-NEXT: movs r3, #5 ; CHECK-NODSP-V8-NEXT: udiv r3, r3, r0 ; CHECK-NODSP-V8-NEXT: muls r0, r3, r0 ; CHECK-NODSP-V8-NEXT: rsb.w r0, r0, #5 ; CHECK-NODSP-V8-NEXT: .p2align 2 ; CHECK-NODSP-V8-NEXT: .LBB5_2: @ %body ; CHECK-NODSP-V8-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NODSP-V8-NEXT: uxtb r3, r0 ; CHECK-NODSP-V8-NEXT: cmp r3, #7 ; CHECK-NODSP-V8-NEXT: mov.w r3, #0 ; CHECK-NODSP-V8-NEXT: it hi ; CHECK-NODSP-V8-NEXT: movhi r3, #1 ; CHECK-NODSP-V8-NEXT: str r3, [r1] ; CHECK-NODSP-V8-NEXT: ldr r3, [r2] ; CHECK-NODSP-V8-NEXT: cmp r3, #0 ; CHECK-NODSP-V8-NEXT: it ne ; CHECK-NODSP-V8-NEXT: bxne lr ; CHECK-NODSP-V8-NEXT: adds r0, #1 ; CHECK-NODSP-V8-NEXT: b .LBB5_2 ; CHECK-NODSP-V8-NEXT: .LBB5_3: @ %exit ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: urem_trunc_icmps: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: .save {r4, r5, r7, lr} ; CHECK-NODSP-V7-NEXT: push {r4, r5, r7, lr} ; CHECK-NODSP-V7-NEXT: ldr r0, [r0] ; CHECK-NODSP-V7-NEXT: mov r5, r1 ; CHECK-NODSP-V7-NEXT: ldrh r1, [r0] ; CHECK-NODSP-V7-NEXT: cbz r1, .LBB5_4 ; CHECK-NODSP-V7-NEXT: @ %bb.1: @ %cond.false.i ; CHECK-NODSP-V7-NEXT: movs r0, #5 ; CHECK-NODSP-V7-NEXT: mov r4, r2 ; CHECK-NODSP-V7-NEXT: bl __aeabi_uidivmod ; CHECK-NODSP-V7-NEXT: .LBB5_2: @ %body ; CHECK-NODSP-V7-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NODSP-V7-NEXT: uxtb r0, r1 ; CHECK-NODSP-V7-NEXT: cmp r0, #7 ; CHECK-NODSP-V7-NEXT: mov.w r0, #0 ; CHECK-NODSP-V7-NEXT: it hi ; CHECK-NODSP-V7-NEXT: movhi r0, #1 ; CHECK-NODSP-V7-NEXT: str r0, [r5] ; CHECK-NODSP-V7-NEXT: ldr r0, [r4] ; CHECK-NODSP-V7-NEXT: cbnz r0, .LBB5_4 ; CHECK-NODSP-V7-NEXT: @ %bb.3: @ %for.inc ; CHECK-NODSP-V7-NEXT: @ in Loop: Header=BB5_2 Depth=1 ; CHECK-NODSP-V7-NEXT: adds r1, #1 ; CHECK-NODSP-V7-NEXT: b .LBB5_2 ; CHECK-NODSP-V7-NEXT: .LBB5_4: @ %exit ; CHECK-NODSP-V7-NEXT: pop {r4, r5, r7, pc} ; ; CHECK-DSP-LABEL: urem_trunc_icmps: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: ldr r0, [r0] ; CHECK-DSP-NEXT: ldrh r0, [r0] ; CHECK-DSP-NEXT: cbz r0, .LBB5_3 ; CHECK-DSP-NEXT: @ %bb.1: @ %cond.false.i ; CHECK-DSP-NEXT: movs r3, #5 ; CHECK-DSP-NEXT: udiv r3, r3, r0 ; CHECK-DSP-NEXT: muls r0, r3, r0 ; CHECK-DSP-NEXT: rsb.w r0, r0, #5 ; CHECK-DSP-NEXT: .LBB5_2: @ %body ; CHECK-DSP-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-DSP-NEXT: uxtb r3, r0 ; CHECK-DSP-NEXT: cmp r3, #7 ; CHECK-DSP-NEXT: mov.w r3, #0 ; CHECK-DSP-NEXT: it hi ; CHECK-DSP-NEXT: movhi r3, #1 ; CHECK-DSP-NEXT: str r3, [r1] ; CHECK-DSP-NEXT: ldr r3, [r2] ; CHECK-DSP-NEXT: cmp r3, #0 ; CHECK-DSP-NEXT: it ne ; CHECK-DSP-NEXT: bxne lr ; CHECK-DSP-NEXT: adds r0, #1 ; CHECK-DSP-NEXT: b .LBB5_2 ; CHECK-DSP-NEXT: .LBB5_3: @ %exit ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: urem_trunc_icmps: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: ldr r0, [r0] ; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] ; CHECK-DSP-IMM-NEXT: cbz r0, .LBB5_4 ; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %cond.false.i ; CHECK-DSP-IMM-NEXT: movs r3, #5 ; CHECK-DSP-IMM-NEXT: udiv r3, r3, r0 ; CHECK-DSP-IMM-NEXT: muls r0, r3, r0 ; CHECK-DSP-IMM-NEXT: rsb.w r0, r0, #5 ; CHECK-DSP-IMM-NEXT: .LBB5_2: @ %body ; CHECK-DSP-IMM-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-DSP-IMM-NEXT: uxtb r3, r0 ; CHECK-DSP-IMM-NEXT: cmp r3, #7 ; CHECK-DSP-IMM-NEXT: mov.w r3, #0 ; CHECK-DSP-IMM-NEXT: it hi ; CHECK-DSP-IMM-NEXT: movhi r3, #1 ; CHECK-DSP-IMM-NEXT: str r3, [r1] ; CHECK-DSP-IMM-NEXT: ldr r3, [r2] ; CHECK-DSP-IMM-NEXT: cbnz r3, .LBB5_4 ; CHECK-DSP-IMM-NEXT: @ %bb.3: @ %for.inc ; CHECK-DSP-IMM-NEXT: @ in Loop: Header=BB5_2 Depth=1 ; CHECK-DSP-IMM-NEXT: adds r0, #1 ; CHECK-DSP-IMM-NEXT: b .LBB5_2 ; CHECK-DSP-IMM-NEXT: .LBB5_4: @ %exit ; CHECK-DSP-IMM-NEXT: bx lr entry: %ptr = load i16*, i16** %in, align 4 %ld = load i16, i16* %ptr, align 2 %cmp.i = icmp eq i16 %ld, 0 br i1 %cmp.i, label %exit, label %cond.false.i cond.false.i: %rem = urem i16 5, %ld %extract.t = trunc i16 %rem to i8 br label %body body: %cond.in.i.off0 = phi i8 [ %extract.t, %cond.false.i ], [ %add, %for.inc ] %cmp = icmp ugt i8 %cond.in.i.off0, 7 %conv5 = zext i1 %cmp to i32 store i32 %conv5, i32* %g, align 4 %.pr = load i32, i32* %k, align 4 %tobool13150 = icmp eq i32 %.pr, 0 br i1 %tobool13150, label %for.inc, label %exit for.inc: %add = add nuw i8 %cond.in.i.off0, 1 br label %body exit: ret void } ; Check that %exp requires uxth in all cases, and will also be required to ; promote %1 for the call - unless we can generate a uadd16. define i32 @zext_load_sink_call(i16* %ptr, i16 %exp) { ; CHECK-NODSP-LABEL: zext_load_sink_call: ; CHECK-NODSP: @ %bb.0: @ %entry ; CHECK-NODSP-NEXT: ldrh r0, [r0] ; CHECK-NODSP-NEXT: uxth r2, r1 ; CHECK-NODSP-NEXT: cmp r0, r2 ; CHECK-NODSP-NEXT: itt eq ; CHECK-NODSP-NEXT: moveq r0, #0 ; CHECK-NODSP-NEXT: bxeq lr ; CHECK-NODSP-NEXT: adds r1, #3 ; CHECK-NODSP-NEXT: uxth r1, r1 ; CHECK-NODSP-NEXT: b dummy ; ; CHECK-DSP-LABEL: zext_load_sink_call: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: ldrh r0, [r0] ; CHECK-DSP-NEXT: uxth r2, r1 ; CHECK-DSP-NEXT: cmp r0, r2 ; CHECK-DSP-NEXT: itt eq ; CHECK-DSP-NEXT: moveq r0, #0 ; CHECK-DSP-NEXT: bxeq lr ; CHECK-DSP-NEXT: adds r1, #3 ; CHECK-DSP-NEXT: uxth r1, r1 ; CHECK-DSP-NEXT: b dummy ; ; CHECK-DSP-IMM-LABEL: zext_load_sink_call: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: uxth r2, r1 ; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] ; CHECK-DSP-IMM-NEXT: movs r1, #3 ; CHECK-DSP-IMM-NEXT: uadd16 r1, r2, r1 ; CHECK-DSP-IMM-NEXT: cmp r0, r2 ; CHECK-DSP-IMM-NEXT: bne .LBB6_2 ; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %exit ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: bx lr ; CHECK-DSP-IMM-NEXT: .LBB6_2: @ %if.then ; CHECK-DSP-IMM-NEXT: b dummy entry: %0 = load i16, i16* %ptr, align 4 %1 = add i16 %exp, 3 %cmp = icmp eq i16 %0, %exp br i1 %cmp, label %exit, label %if.then if.then: %conv0 = zext i16 %0 to i32 %conv1 = zext i16 %1 to i32 %call = tail call arm_aapcs_vfpcc i32 @dummy(i32 %conv0, i32 %conv1) br label %exit exit: %exitval = phi i32 [ %call, %if.then ], [ 0, %entry ] ret i32 %exitval } define i16 @bitcast_i16(i16 zeroext %arg0, i16 zeroext %arg1) { ; CHECK-NODSP-LABEL: bitcast_i16: ; CHECK-NODSP: @ %bb.0: @ %entry ; CHECK-NODSP-NEXT: adds r0, #1 ; CHECK-NODSP-NEXT: movw r2, #12345 ; CHECK-NODSP-NEXT: cmp r0, r2 ; CHECK-NODSP-NEXT: it hi ; CHECK-NODSP-NEXT: movwhi r1, #32657 ; CHECK-NODSP-NEXT: mov r0, r1 ; CHECK-NODSP-NEXT: bx lr ; ; CHECK-DSP-LABEL: bitcast_i16: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: adds r0, #1 ; CHECK-DSP-NEXT: movw r2, #12345 ; CHECK-DSP-NEXT: cmp r0, r2 ; CHECK-DSP-NEXT: it hi ; CHECK-DSP-NEXT: movwhi r1, #32657 ; CHECK-DSP-NEXT: mov r0, r1 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: bitcast_i16: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: adds r2, r0, #1 ; CHECK-DSP-IMM-NEXT: movw r0, #32657 ; CHECK-DSP-IMM-NEXT: movw r3, #12345 ; CHECK-DSP-IMM-NEXT: cmp r2, r3 ; CHECK-DSP-IMM-NEXT: it ls ; CHECK-DSP-IMM-NEXT: movls r0, r1 ; CHECK-DSP-IMM-NEXT: bx lr entry: %cast = bitcast i16 12345 to i16 %add = add nuw i16 %arg0, 1 %cmp = icmp ule i16 %add, %cast %res = select i1 %cmp, i16 %arg1, i16 32657 ret i16 %res } define i8 @bitcast_i8(i8 zeroext %arg0, i8 zeroext %arg1) { ; CHECK-LABEL: bitcast_i8: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: mvn r2, #127 ; CHECK-NEXT: cmp.w r1, r0, lsl #1 ; CHECK-NEXT: it ls ; CHECK-NEXT: movls r2, #127 ; CHECK-NEXT: mov r0, r2 ; CHECK-NEXT: bx lr entry: %cast = bitcast i8 127 to i8 %mul = shl nuw i8 %arg0, 1 %cmp = icmp uge i8 %mul, %arg1 %res = select i1 %cmp, i8 %cast, i8 128 ret i8 %res } define i16 @bitcast_i16_minus(i16 zeroext %arg0, i16 zeroext %arg1) { ; CHECK-NODSP-LABEL: bitcast_i16_minus: ; CHECK-NODSP: @ %bb.0: @ %entry ; CHECK-NODSP-NEXT: eor r2, r0, #7 ; CHECK-NODSP-NEXT: movw r0, #32657 ; CHECK-NODSP-NEXT: cmp r2, r1 ; CHECK-NODSP-NEXT: itt eq ; CHECK-NODSP-NEXT: movweq r0, #53191 ; CHECK-NODSP-NEXT: movteq r0, #65535 ; CHECK-NODSP-NEXT: bx lr ; ; CHECK-DSP-LABEL: bitcast_i16_minus: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: eor r2, r0, #7 ; CHECK-DSP-NEXT: movw r0, #32657 ; CHECK-DSP-NEXT: cmp r2, r1 ; CHECK-DSP-NEXT: itt eq ; CHECK-DSP-NEXT: movweq r0, #53191 ; CHECK-DSP-NEXT: movteq r0, #65535 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: bitcast_i16_minus: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: eor r2, r0, #7 ; CHECK-DSP-IMM-NEXT: movw r0, #32657 ; CHECK-DSP-IMM-NEXT: cmp r2, r1 ; CHECK-DSP-IMM-NEXT: it eq ; CHECK-DSP-IMM-NEXT: movweq r0, #53191 ; CHECK-DSP-IMM-NEXT: it eq ; CHECK-DSP-IMM-NEXT: movteq r0, #65535 ; CHECK-DSP-IMM-NEXT: bx lr entry: %cast = bitcast i16 -12345 to i16 %xor = xor i16 %arg0, 7 %cmp = icmp eq i16 %xor, %arg1 %res = select i1 %cmp, i16 %cast, i16 32657 ret i16 %res } define i8 @bitcast_i8_minus(i8 zeroext %arg0, i8 zeroext %arg1) { ; CHECK-LABEL: bitcast_i8_minus: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: and r2, r0, #3 ; CHECK-NEXT: mvn r0, #127 ; CHECK-NEXT: cmp r2, r1 ; CHECK-NEXT: it ne ; CHECK-NEXT: mvnne r0, #126 ; CHECK-NEXT: bx lr entry: %cast = bitcast i8 -127 to i8 %and = and i8 %arg0, 3 %cmp = icmp ne i8 %and, %arg1 %res = select i1 %cmp, i8 %cast, i8 128 ret i8 %res } declare i32 @dummy(i32, i32) @d_uch = hidden local_unnamed_addr global [16 x i8] zeroinitializer, align 1 @sh1 = hidden local_unnamed_addr global i16 0, align 2 @d_sh = hidden local_unnamed_addr global [16 x i16] zeroinitializer, align 2 define i8* @two_stage_zext_trunc_mix(i32* %this, i32 %__pos1, i32 %__n1, i32** %__str, i32 %__pos2, i32 %__n2) { ; CHECK-NODSP-V8-LABEL: two_stage_zext_trunc_mix: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: ldr.w r12, [sp] ; CHECK-NODSP-V8-NEXT: ldrb r2, [r0] ; CHECK-NODSP-V8-NEXT: add.w r0, r3, r12 ; CHECK-NODSP-V8-NEXT: lsls r2, r2, #31 ; CHECK-NODSP-V8-NEXT: it eq ; CHECK-NODSP-V8-NEXT: addeq r0, r3, r1 ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: two_stage_zext_trunc_mix: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: ldrb r2, [r0] ; CHECK-NODSP-V7-NEXT: ldr.w r12, [sp] ; CHECK-NODSP-V7-NEXT: add.w r0, r3, r12 ; CHECK-NODSP-V7-NEXT: lsls r2, r2, #31 ; CHECK-NODSP-V7-NEXT: it eq ; CHECK-NODSP-V7-NEXT: addeq r0, r3, r1 ; CHECK-NODSP-V7-NEXT: bx lr ; ; CHECK-DSP-LABEL: two_stage_zext_trunc_mix: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: ldr r2, [sp] ; CHECK-DSP-NEXT: ldrb r0, [r0] ; CHECK-DSP-NEXT: add r2, r3 ; CHECK-DSP-NEXT: lsls r0, r0, #31 ; CHECK-DSP-NEXT: it eq ; CHECK-DSP-NEXT: addeq r2, r3, r1 ; CHECK-DSP-NEXT: mov r0, r2 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: two_stage_zext_trunc_mix: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: ldr.w r12, [sp] ; CHECK-DSP-IMM-NEXT: ldrb r2, [r0] ; CHECK-DSP-IMM-NEXT: adds r0, r3, r1 ; CHECK-DSP-IMM-NEXT: add r12, r3 ; CHECK-DSP-IMM-NEXT: lsls r1, r2, #31 ; CHECK-DSP-IMM-NEXT: it ne ; CHECK-DSP-IMM-NEXT: movne r0, r12 ; CHECK-DSP-IMM-NEXT: bx lr entry: %__size_.i.i.i.i = bitcast i32** %__str to i8* %0 = load i8, i8* %__size_.i.i.i.i, align 4 %1 = and i8 %0, 1 %tobool.i.i.i.i = icmp eq i8 %1, 0 %__size_.i5.i.i = getelementptr inbounds i32*, i32** %__str, i32 %__n1 %cast = bitcast i32** %__size_.i5.i.i to i32* %2 = load i32, i32* %cast, align 4 %3 = lshr i8 %0, 1 %4 = zext i8 %3 to i32 %cond.i.i = select i1 %tobool.i.i.i.i, i32 %4, i32 %2 %__size_.i.i.i.i.i = bitcast i32* %this to i8* %5 = load i8, i8* %__size_.i.i.i.i.i, align 4 %6 = and i8 %5, 1 %tobool.i.i.i.i.i = icmp eq i8 %6, 0 %7 = getelementptr inbounds i8, i8* %__size_.i.i.i.i, i32 %__pos1 %8 = getelementptr inbounds i8, i8* %__size_.i.i.i.i, i32 %__pos2 %res = select i1 %tobool.i.i.i.i.i, i8* %7, i8* %8 ret i8* %res } define i8 @search_through_zext_1(i8 zeroext %a, i8 zeroext %b, i16 zeroext %c) { ; CHECK-NODSP-V8-LABEL: search_through_zext_1: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: subs r3, r1, r0 ; CHECK-NODSP-V8-NEXT: add.w r12, r0, r1 ; CHECK-NODSP-V8-NEXT: cmp r3, r2 ; CHECK-NODSP-V8-NEXT: it ls ; CHECK-NODSP-V8-NEXT: movls r0, r1 ; CHECK-NODSP-V8-NEXT: cmp r12, r2 ; CHECK-NODSP-V8-NEXT: it hs ; CHECK-NODSP-V8-NEXT: movhs r0, #0 ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: search_through_zext_1: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: subs r3, r1, r0 ; CHECK-NODSP-V7-NEXT: cmp r3, r2 ; CHECK-NODSP-V7-NEXT: mov r3, r1 ; CHECK-NODSP-V7-NEXT: it hi ; CHECK-NODSP-V7-NEXT: movhi r3, r0 ; CHECK-NODSP-V7-NEXT: add r0, r1 ; CHECK-NODSP-V7-NEXT: cmp r0, r2 ; CHECK-NODSP-V7-NEXT: it hs ; CHECK-NODSP-V7-NEXT: movhs r3, #0 ; CHECK-NODSP-V7-NEXT: mov r0, r3 ; CHECK-NODSP-V7-NEXT: bx lr ; ; CHECK-DSP-LABEL: search_through_zext_1: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: subs r3, r1, r0 ; CHECK-DSP-NEXT: cmp r3, r2 ; CHECK-DSP-NEXT: mov r3, r1 ; CHECK-DSP-NEXT: it hi ; CHECK-DSP-NEXT: movhi r3, r0 ; CHECK-DSP-NEXT: add r0, r1 ; CHECK-DSP-NEXT: cmp r0, r2 ; CHECK-DSP-NEXT: it hs ; CHECK-DSP-NEXT: movhs r3, #0 ; CHECK-DSP-NEXT: mov r0, r3 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: search_through_zext_1: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: subs r3, r1, r0 ; CHECK-DSP-IMM-NEXT: cmp r3, r2 ; CHECK-DSP-IMM-NEXT: mov r3, r1 ; CHECK-DSP-IMM-NEXT: it hi ; CHECK-DSP-IMM-NEXT: movhi r3, r0 ; CHECK-DSP-IMM-NEXT: add r1, r0 ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: cmp r1, r2 ; CHECK-DSP-IMM-NEXT: it lo ; CHECK-DSP-IMM-NEXT: movlo r0, r3 ; CHECK-DSP-IMM-NEXT: bx lr entry: %add = add nuw i8 %a, %b %conv = zext i8 %add to i16 %cmp = icmp ult i16 %conv, %c br i1 %cmp, label %if.then, label %if.end if.then: %sub = sub nuw i8 %b, %a %conv2 = zext i8 %sub to i16 %cmp2 = icmp ugt i16 %conv2, %c %res = select i1 %cmp2, i8 %a, i8 %b br label %if.end if.end: %retval = phi i8 [ 0, %entry ], [ %res, %if.then ] ret i8 %retval } ; TODO: We should be able to remove the uxtb here. The transform fails because ; the icmp ugt uses an i32, which is too large... but this doesn't matter ; because it won't be writing a large value to a register as a result. define i8 @search_through_zext_2(i8 zeroext %a, i8 zeroext %b, i16 zeroext %c, i32 %d) { ; CHECK-NODSP-V8-LABEL: search_through_zext_2: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: push {r7, lr} ; CHECK-NODSP-V8-NEXT: sub.w lr, r1, r0 ; CHECK-NODSP-V8-NEXT: add.w r12, r0, r1 ; CHECK-NODSP-V8-NEXT: uxtb.w lr, lr ; CHECK-NODSP-V8-NEXT: uxtb.w r12, r12 ; CHECK-NODSP-V8-NEXT: cmp lr, r3 ; CHECK-NODSP-V8-NEXT: it ls ; CHECK-NODSP-V8-NEXT: movls r0, r1 ; CHECK-NODSP-V8-NEXT: cmp r12, r2 ; CHECK-NODSP-V8-NEXT: it hs ; CHECK-NODSP-V8-NEXT: movhs r0, #0 ; CHECK-NODSP-V8-NEXT: pop {r7, pc} ; ; CHECK-NODSP-V7-LABEL: search_through_zext_2: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: sub.w r12, r1, r0 ; CHECK-NODSP-V7-NEXT: uxtb.w r12, r12 ; CHECK-NODSP-V7-NEXT: cmp r12, r3 ; CHECK-NODSP-V7-NEXT: mov r3, r1 ; CHECK-NODSP-V7-NEXT: it hi ; CHECK-NODSP-V7-NEXT: movhi r3, r0 ; CHECK-NODSP-V7-NEXT: add r0, r1 ; CHECK-NODSP-V7-NEXT: uxtb r0, r0 ; CHECK-NODSP-V7-NEXT: cmp r0, r2 ; CHECK-NODSP-V7-NEXT: it hs ; CHECK-NODSP-V7-NEXT: movhs r3, #0 ; CHECK-NODSP-V7-NEXT: mov r0, r3 ; CHECK-NODSP-V7-NEXT: bx lr ; ; CHECK-DSP-LABEL: search_through_zext_2: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: sub.w r12, r1, r0 ; CHECK-DSP-NEXT: uxtb.w r12, r12 ; CHECK-DSP-NEXT: cmp r12, r3 ; CHECK-DSP-NEXT: mov r3, r1 ; CHECK-DSP-NEXT: it hi ; CHECK-DSP-NEXT: movhi r3, r0 ; CHECK-DSP-NEXT: add r0, r1 ; CHECK-DSP-NEXT: uxtb r0, r0 ; CHECK-DSP-NEXT: cmp r0, r2 ; CHECK-DSP-NEXT: it hs ; CHECK-DSP-NEXT: movhs r3, #0 ; CHECK-DSP-NEXT: mov r0, r3 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: search_through_zext_2: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: sub.w r12, r1, r0 ; CHECK-DSP-IMM-NEXT: uxtb.w r12, r12 ; CHECK-DSP-IMM-NEXT: cmp r12, r3 ; CHECK-DSP-IMM-NEXT: mov r3, r1 ; CHECK-DSP-IMM-NEXT: it hi ; CHECK-DSP-IMM-NEXT: movhi r3, r0 ; CHECK-DSP-IMM-NEXT: add r0, r1 ; CHECK-DSP-IMM-NEXT: uxtb r1, r0 ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: cmp r1, r2 ; CHECK-DSP-IMM-NEXT: it lo ; CHECK-DSP-IMM-NEXT: movlo r0, r3 ; CHECK-DSP-IMM-NEXT: bx lr entry: %add = add nuw i8 %a, %b %conv = zext i8 %add to i16 %cmp = icmp ult i16 %conv, %c br i1 %cmp, label %if.then, label %if.end if.then: %sub = sub nuw i8 %b, %a %conv2 = zext i8 %sub to i32 %cmp2 = icmp ugt i32 %conv2, %d %res = select i1 %cmp2, i8 %a, i8 %b br label %if.end if.end: %retval = phi i8 [ 0, %entry ], [ %res, %if.then ] ret i8 %retval } ; TODO: We should be able to remove the uxtb here as all the calculations are ; performed on i8s. The promotion of i8 to i16 and then the later truncation ; results in the uxtb. define i8 @search_through_zext_3(i8 zeroext %a, i8 zeroext %b, i16 zeroext %c, i32 %d) { ; CHECK-NODSP-LABEL: search_through_zext_3: ; CHECK-NODSP: @ %bb.0: @ %entry ; CHECK-NODSP-NEXT: add.w r12, r0, r1 ; CHECK-NODSP-NEXT: uxtb.w r12, r12 ; CHECK-NODSP-NEXT: cmp r12, r2 ; CHECK-NODSP-NEXT: itt hs ; CHECK-NODSP-NEXT: movhs r0, #0 ; CHECK-NODSP-NEXT: bxhs lr ; CHECK-NODSP-NEXT: sub.w r2, r1, r12 ; CHECK-NODSP-NEXT: uxtb r2, r2 ; CHECK-NODSP-NEXT: cmp r2, r3 ; CHECK-NODSP-NEXT: it ls ; CHECK-NODSP-NEXT: movls r0, r1 ; CHECK-NODSP-NEXT: bx lr ; ; CHECK-DSP-LABEL: search_through_zext_3: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: add.w r12, r0, r1 ; CHECK-DSP-NEXT: uxtb.w r12, r12 ; CHECK-DSP-NEXT: cmp r12, r2 ; CHECK-DSP-NEXT: itt hs ; CHECK-DSP-NEXT: movhs r0, #0 ; CHECK-DSP-NEXT: bxhs lr ; CHECK-DSP-NEXT: sub.w r2, r1, r12 ; CHECK-DSP-NEXT: uxtb r2, r2 ; CHECK-DSP-NEXT: cmp r2, r3 ; CHECK-DSP-NEXT: it ls ; CHECK-DSP-NEXT: movls r0, r1 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: search_through_zext_3: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: add.w r12, r0, r1 ; CHECK-DSP-IMM-NEXT: uxtb.w r12, r12 ; CHECK-DSP-IMM-NEXT: cmp r12, r2 ; CHECK-DSP-IMM-NEXT: bhs .LBB14_2 ; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %if.then ; CHECK-DSP-IMM-NEXT: sub.w r2, r1, r12 ; CHECK-DSP-IMM-NEXT: uxtb r2, r2 ; CHECK-DSP-IMM-NEXT: cmp r2, r3 ; CHECK-DSP-IMM-NEXT: it ls ; CHECK-DSP-IMM-NEXT: movls r0, r1 ; CHECK-DSP-IMM-NEXT: bx lr ; CHECK-DSP-IMM-NEXT: .LBB14_2: ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: bx lr entry: %add = add nuw i8 %a, %b %conv = zext i8 %add to i16 %cmp = icmp ult i16 %conv, %c br i1 %cmp, label %if.then, label %if.end if.then: %trunc = trunc i16 %conv to i8 %sub = sub nuw i8 %b, %trunc %conv2 = zext i8 %sub to i32 %cmp2 = icmp ugt i32 %conv2, %d %res = select i1 %cmp2, i8 %a, i8 %b br label %if.end if.end: %retval = phi i8 [ 0, %entry ], [ %res, %if.then ] ret i8 %retval } ; TODO: We should be able to remove the uxt that gets introduced for %conv2 define i8 @search_through_zext_cmp(i8 zeroext %a, i8 zeroext %b, i16 zeroext %c) { ; CHECK-NODSP-V8-LABEL: search_through_zext_cmp: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: subs r3, r1, r0 ; CHECK-NODSP-V8-NEXT: subs.w r12, r1, r0 ; CHECK-NODSP-V8-NEXT: uxtb r3, r3 ; CHECK-NODSP-V8-NEXT: it ne ; CHECK-NODSP-V8-NEXT: movne.w r12, #1 ; CHECK-NODSP-V8-NEXT: cmp r3, r2 ; CHECK-NODSP-V8-NEXT: it ls ; CHECK-NODSP-V8-NEXT: movls r0, r1 ; CHECK-NODSP-V8-NEXT: cmp r12, r2 ; CHECK-NODSP-V8-NEXT: it hs ; CHECK-NODSP-V8-NEXT: movhs r0, #0 ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: search_through_zext_cmp: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: subs r3, r1, r0 ; CHECK-NODSP-V7-NEXT: subs.w r12, r1, r0 ; CHECK-NODSP-V7-NEXT: it ne ; CHECK-NODSP-V7-NEXT: movne.w r12, #1 ; CHECK-NODSP-V7-NEXT: uxtb r3, r3 ; CHECK-NODSP-V7-NEXT: cmp r3, r2 ; CHECK-NODSP-V7-NEXT: it ls ; CHECK-NODSP-V7-NEXT: movls r0, r1 ; CHECK-NODSP-V7-NEXT: cmp r12, r2 ; CHECK-NODSP-V7-NEXT: it hs ; CHECK-NODSP-V7-NEXT: movhs r0, #0 ; CHECK-NODSP-V7-NEXT: bx lr ; ; CHECK-DSP-LABEL: search_through_zext_cmp: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: subs r3, r1, r0 ; CHECK-DSP-NEXT: subs.w r12, r1, r0 ; CHECK-DSP-NEXT: uxtb r3, r3 ; CHECK-DSP-NEXT: it ne ; CHECK-DSP-NEXT: movne.w r12, #1 ; CHECK-DSP-NEXT: cmp r3, r2 ; CHECK-DSP-NEXT: it ls ; CHECK-DSP-NEXT: movls r0, r1 ; CHECK-DSP-NEXT: cmp r12, r2 ; CHECK-DSP-NEXT: it hs ; CHECK-DSP-NEXT: movhs r0, #0 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: search_through_zext_cmp: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: subs.w r12, r1, r0 ; CHECK-DSP-IMM-NEXT: it ne ; CHECK-DSP-IMM-NEXT: movne.w r12, #1 ; CHECK-DSP-IMM-NEXT: subs r3, r1, r0 ; CHECK-DSP-IMM-NEXT: uxtb r3, r3 ; CHECK-DSP-IMM-NEXT: cmp r3, r2 ; CHECK-DSP-IMM-NEXT: it hi ; CHECK-DSP-IMM-NEXT: movhi r1, r0 ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: cmp r12, r2 ; CHECK-DSP-IMM-NEXT: it lo ; CHECK-DSP-IMM-NEXT: movlo r0, r1 ; CHECK-DSP-IMM-NEXT: bx lr entry: %cmp = icmp ne i8 %a, %b %conv = zext i1 %cmp to i16 %cmp1 = icmp ult i16 %conv, %c br i1 %cmp1, label %if.then, label %if.end if.then: %sub = sub nuw i8 %b, %a %conv2 = zext i8 %sub to i16 %cmp3 = icmp ugt i16 %conv2, %c %res = select i1 %cmp3, i8 %a, i8 %b br label %if.end if.end: %retval = phi i8 [ 0, %entry ], [ %res, %if.then ] ret i8 %retval } define i8 @search_through_zext_load(i8* %a, i8 zeroext %b, i16 zeroext %c) { ; CHECK-NODSP-V8-LABEL: search_through_zext_load: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: ldrb r3, [r0] ; CHECK-NODSP-V8-NEXT: mov r0, r1 ; CHECK-NODSP-V8-NEXT: subs r1, r1, r3 ; CHECK-NODSP-V8-NEXT: cmp r1, r2 ; CHECK-NODSP-V8-NEXT: it hi ; CHECK-NODSP-V8-NEXT: movhi r0, r3 ; CHECK-NODSP-V8-NEXT: cmp r3, r2 ; CHECK-NODSP-V8-NEXT: it hs ; CHECK-NODSP-V8-NEXT: movhs r0, #0 ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: search_through_zext_load: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: ldrb r0, [r0] ; CHECK-NODSP-V7-NEXT: subs r3, r1, r0 ; CHECK-NODSP-V7-NEXT: cmp r3, r2 ; CHECK-NODSP-V7-NEXT: it hi ; CHECK-NODSP-V7-NEXT: movhi r1, r0 ; CHECK-NODSP-V7-NEXT: cmp r0, r2 ; CHECK-NODSP-V7-NEXT: it hs ; CHECK-NODSP-V7-NEXT: movhs r1, #0 ; CHECK-NODSP-V7-NEXT: mov r0, r1 ; CHECK-NODSP-V7-NEXT: bx lr ; ; CHECK-DSP-LABEL: search_through_zext_load: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: ldrb r0, [r0] ; CHECK-DSP-NEXT: subs r3, r1, r0 ; CHECK-DSP-NEXT: cmp r3, r2 ; CHECK-DSP-NEXT: it hi ; CHECK-DSP-NEXT: movhi r1, r0 ; CHECK-DSP-NEXT: cmp r0, r2 ; CHECK-DSP-NEXT: it hs ; CHECK-DSP-NEXT: movhs r1, #0 ; CHECK-DSP-NEXT: mov r0, r1 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: search_through_zext_load: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: ldrb r3, [r0] ; CHECK-DSP-IMM-NEXT: subs r0, r1, r3 ; CHECK-DSP-IMM-NEXT: cmp r0, r2 ; CHECK-DSP-IMM-NEXT: it hi ; CHECK-DSP-IMM-NEXT: movhi r1, r3 ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: cmp r3, r2 ; CHECK-DSP-IMM-NEXT: it lo ; CHECK-DSP-IMM-NEXT: movlo r0, r1 ; CHECK-DSP-IMM-NEXT: bx lr entry: %load = load i8, i8* %a %conv = zext i8 %load to i16 %cmp1 = icmp ult i16 %conv, %c br i1 %cmp1, label %if.then, label %if.end if.then: %sub = sub nuw i8 %b, %load %conv2 = zext i8 %sub to i16 %cmp3 = icmp ugt i16 %conv2, %c %res = select i1 %cmp3, i8 %load, i8 %b br label %if.end if.end: %retval = phi i8 [ 0, %entry ], [ %res, %if.then ] ret i8 %retval } define i16 @trunc_sink_less_than_cmp(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i8 zeroext %d) { ; CHECK-NODSP-V8-LABEL: trunc_sink_less_than_cmp: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: push {r7, lr} ; CHECK-NODSP-V8-NEXT: sub.w r12, r1, r0 ; CHECK-NODSP-V8-NEXT: adds r3, #1 ; CHECK-NODSP-V8-NEXT: uxth.w lr, r12 ; CHECK-NODSP-V8-NEXT: uxtb.w r12, r12 ; CHECK-NODSP-V8-NEXT: uxtb r3, r3 ; CHECK-NODSP-V8-NEXT: cmp r12, r3 ; CHECK-NODSP-V8-NEXT: it ls ; CHECK-NODSP-V8-NEXT: movls r0, r1 ; CHECK-NODSP-V8-NEXT: cmp lr, r2 ; CHECK-NODSP-V8-NEXT: it hs ; CHECK-NODSP-V8-NEXT: movhs r0, #0 ; CHECK-NODSP-V8-NEXT: pop {r7, pc} ; ; CHECK-NODSP-V7-LABEL: trunc_sink_less_than_cmp: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: .save {r7, lr} ; CHECK-NODSP-V7-NEXT: push {r7, lr} ; CHECK-NODSP-V7-NEXT: adds r3, #1 ; CHECK-NODSP-V7-NEXT: sub.w r12, r1, r0 ; CHECK-NODSP-V7-NEXT: uxtb.w lr, r12 ; CHECK-NODSP-V7-NEXT: uxtb r3, r3 ; CHECK-NODSP-V7-NEXT: cmp lr, r3 ; CHECK-NODSP-V7-NEXT: it ls ; CHECK-NODSP-V7-NEXT: movls r0, r1 ; CHECK-NODSP-V7-NEXT: uxth.w r1, r12 ; CHECK-NODSP-V7-NEXT: cmp r1, r2 ; CHECK-NODSP-V7-NEXT: it hs ; CHECK-NODSP-V7-NEXT: movhs r0, #0 ; CHECK-NODSP-V7-NEXT: pop {r7, pc} ; ; CHECK-DSP-LABEL: trunc_sink_less_than_cmp: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: push {r7, lr} ; CHECK-DSP-NEXT: adds r3, #1 ; CHECK-DSP-NEXT: sub.w r12, r1, r0 ; CHECK-DSP-NEXT: uxtb.w lr, r12 ; CHECK-DSP-NEXT: uxtb r3, r3 ; CHECK-DSP-NEXT: cmp lr, r3 ; CHECK-DSP-NEXT: it ls ; CHECK-DSP-NEXT: movls r0, r1 ; CHECK-DSP-NEXT: uxth.w r1, r12 ; CHECK-DSP-NEXT: cmp r1, r2 ; CHECK-DSP-NEXT: it hs ; CHECK-DSP-NEXT: movhs r0, #0 ; CHECK-DSP-NEXT: pop {r7, pc} ; ; CHECK-DSP-IMM-LABEL: trunc_sink_less_than_cmp: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: push {r7, lr} ; CHECK-DSP-IMM-NEXT: adds r3, #1 ; CHECK-DSP-IMM-NEXT: sub.w r12, r1, r0 ; CHECK-DSP-IMM-NEXT: uxtb r3, r3 ; CHECK-DSP-IMM-NEXT: uxtb.w lr, r12 ; CHECK-DSP-IMM-NEXT: cmp lr, r3 ; CHECK-DSP-IMM-NEXT: it hi ; CHECK-DSP-IMM-NEXT: movhi r1, r0 ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: uxth.w r3, r12 ; CHECK-DSP-IMM-NEXT: cmp r3, r2 ; CHECK-DSP-IMM-NEXT: it lo ; CHECK-DSP-IMM-NEXT: movlo r0, r1 ; CHECK-DSP-IMM-NEXT: pop {r7, pc} entry: %sub = sub nuw i16 %b, %a %cmp = icmp ult i16 %sub, %c br i1 %cmp, label %if.then, label %if.end if.then: %trunc = trunc i16 %sub to i8 %add = add nuw i8 %d, 1 %cmp2 = icmp ugt i8 %trunc, %add %res = select i1 %cmp2, i16 %a, i16 %b br label %if.end if.end: %retval = phi i16 [ 0, %entry ], [ %res, %if.then ] ret i16 %retval } ; TODO: We should be able to remove the uxth introduced to handle %sub define i16 @trunc_sink_less_than_arith(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i8 zeroext %d, i8 zeroext %e) { ; CHECK-NODSP-V8-LABEL: trunc_sink_less_than_arith: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: push {r4, lr} ; CHECK-NODSP-V8-NEXT: sub.w lr, r1, r0 ; CHECK-NODSP-V8-NEXT: ldr.w r12, [sp, #8] ; CHECK-NODSP-V8-NEXT: add r3, lr ; CHECK-NODSP-V8-NEXT: uxtb r3, r3 ; CHECK-NODSP-V8-NEXT: uxth.w r4, lr ; CHECK-NODSP-V8-NEXT: cmp r12, r3 ; CHECK-NODSP-V8-NEXT: it ls ; CHECK-NODSP-V8-NEXT: movls r0, r1 ; CHECK-NODSP-V8-NEXT: cmp r4, r2 ; CHECK-NODSP-V8-NEXT: it hs ; CHECK-NODSP-V8-NEXT: movhs r0, #0 ; CHECK-NODSP-V8-NEXT: pop {r4, pc} ; ; CHECK-NODSP-V7-LABEL: trunc_sink_less_than_arith: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: .save {r7, lr} ; CHECK-NODSP-V7-NEXT: push {r7, lr} ; CHECK-NODSP-V7-NEXT: sub.w lr, r1, r0 ; CHECK-NODSP-V7-NEXT: ldr.w r12, [sp, #8] ; CHECK-NODSP-V7-NEXT: add r3, lr ; CHECK-NODSP-V7-NEXT: uxtb r3, r3 ; CHECK-NODSP-V7-NEXT: cmp r12, r3 ; CHECK-NODSP-V7-NEXT: it ls ; CHECK-NODSP-V7-NEXT: movls r0, r1 ; CHECK-NODSP-V7-NEXT: uxth.w r1, lr ; CHECK-NODSP-V7-NEXT: cmp r1, r2 ; CHECK-NODSP-V7-NEXT: it hs ; CHECK-NODSP-V7-NEXT: movhs r0, #0 ; CHECK-NODSP-V7-NEXT: pop {r7, pc} ; ; CHECK-DSP-LABEL: trunc_sink_less_than_arith: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: push {r7, lr} ; CHECK-DSP-NEXT: sub.w r12, r1, r0 ; CHECK-DSP-NEXT: add r3, r12 ; CHECK-DSP-NEXT: uxtb.w lr, r3 ; CHECK-DSP-NEXT: ldr r3, [sp, #8] ; CHECK-DSP-NEXT: cmp r3, lr ; CHECK-DSP-NEXT: it ls ; CHECK-DSP-NEXT: movls r0, r1 ; CHECK-DSP-NEXT: uxth.w r1, r12 ; CHECK-DSP-NEXT: cmp r1, r2 ; CHECK-DSP-NEXT: it hs ; CHECK-DSP-NEXT: movhs r0, #0 ; CHECK-DSP-NEXT: pop {r7, pc} ; ; CHECK-DSP-IMM-LABEL: trunc_sink_less_than_arith: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: push {r7, lr} ; CHECK-DSP-IMM-NEXT: sub.w lr, r1, r0 ; CHECK-DSP-IMM-NEXT: ldr.w r12, [sp, #8] ; CHECK-DSP-IMM-NEXT: add r3, lr ; CHECK-DSP-IMM-NEXT: uxtb r3, r3 ; CHECK-DSP-IMM-NEXT: cmp r12, r3 ; CHECK-DSP-IMM-NEXT: it hi ; CHECK-DSP-IMM-NEXT: movhi r1, r0 ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: uxth.w r3, lr ; CHECK-DSP-IMM-NEXT: cmp r3, r2 ; CHECK-DSP-IMM-NEXT: it lo ; CHECK-DSP-IMM-NEXT: movlo r0, r1 ; CHECK-DSP-IMM-NEXT: pop {r7, pc} entry: %sub = sub nuw i16 %b, %a %cmp = icmp ult i16 %sub, %c br i1 %cmp, label %if.then, label %if.end if.then: %trunc = trunc i16 %sub to i8 %add = add nuw i8 %d, %trunc %cmp2 = icmp ugt i8 %e, %add %res = select i1 %cmp2, i16 %a, i16 %b br label %if.end if.end: %retval = phi i16 [ 0, %entry ], [ %res, %if.then ] ret i16 %retval } define i16 @trunc_sink_less_than_store(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i8 zeroext %d, i8* %e) { ; CHECK-NODSP-LABEL: trunc_sink_less_than_store: ; CHECK-NODSP: @ %bb.0: @ %entry ; CHECK-NODSP-NEXT: subs r0, r1, r0 ; CHECK-NODSP-NEXT: cmp r0, r2 ; CHECK-NODSP-NEXT: iteee hs ; CHECK-NODSP-NEXT: movhs r0, #0 ; CHECK-NODSP-NEXT: ldrlo r1, [sp] ; CHECK-NODSP-NEXT: addlo r2, r3, r0 ; CHECK-NODSP-NEXT: strblo r2, [r1] ; CHECK-NODSP-NEXT: bx lr ; ; CHECK-DSP-LABEL: trunc_sink_less_than_store: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: subs r0, r1, r0 ; CHECK-DSP-NEXT: cmp r0, r2 ; CHECK-DSP-NEXT: iteee hs ; CHECK-DSP-NEXT: movhs r0, #0 ; CHECK-DSP-NEXT: ldrlo r1, [sp] ; CHECK-DSP-NEXT: addlo r2, r3, r0 ; CHECK-DSP-NEXT: strblo r2, [r1] ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: trunc_sink_less_than_store: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: subs r0, r1, r0 ; CHECK-DSP-IMM-NEXT: cmp r0, r2 ; CHECK-DSP-IMM-NEXT: bhs .LBB19_2 ; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %if.then ; CHECK-DSP-IMM-NEXT: ldr r1, [sp] ; CHECK-DSP-IMM-NEXT: adds r2, r3, r0 ; CHECK-DSP-IMM-NEXT: strb r2, [r1] ; CHECK-DSP-IMM-NEXT: bx lr ; CHECK-DSP-IMM-NEXT: .LBB19_2: ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: bx lr entry: %sub = sub nuw i16 %b, %a %cmp = icmp ult i16 %sub, %c br i1 %cmp, label %if.then, label %if.end if.then: %trunc = trunc i16 %sub to i8 %add = add nuw i8 %d, %trunc store i8 %add, i8* %e br label %if.end if.end: %retval = phi i16 [ 0, %entry ], [ %sub, %if.then ] ret i16 %retval } define i8 @trunc_sink_less_than_ret(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i8 zeroext %d, i8 zeroext %e) { ; CHECK-NODSP-LABEL: trunc_sink_less_than_ret: ; CHECK-NODSP: @ %bb.0: @ %entry ; CHECK-NODSP-NEXT: subs r1, r1, r0 ; CHECK-NODSP-NEXT: movs r0, #0 ; CHECK-NODSP-NEXT: cmp r1, r2 ; CHECK-NODSP-NEXT: it lo ; CHECK-NODSP-NEXT: uxtablo r0, r3, r1 ; CHECK-NODSP-NEXT: bx lr ; ; CHECK-DSP-LABEL: trunc_sink_less_than_ret: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: subs r1, r1, r0 ; CHECK-DSP-NEXT: movs r0, #0 ; CHECK-DSP-NEXT: cmp r1, r2 ; CHECK-DSP-NEXT: it lo ; CHECK-DSP-NEXT: uxtablo r0, r3, r1 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: trunc_sink_less_than_ret: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: subs r1, r1, r0 ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: cmp r1, r2 ; CHECK-DSP-IMM-NEXT: uxtab r3, r3, r1 ; CHECK-DSP-IMM-NEXT: it lo ; CHECK-DSP-IMM-NEXT: movlo r0, r3 ; CHECK-DSP-IMM-NEXT: bx lr entry: %sub = sub nuw i16 %b, %a %cmp = icmp ult i16 %sub, %c br i1 %cmp, label %if.then, label %if.end if.then: %trunc = trunc i16 %sub to i8 %add = add nuw i8 %d, %trunc br label %if.end if.end: %retval = phi i8 [ 0, %entry ], [ %add, %if.then ] ret i8 %retval } define zeroext i8 @trunc_sink_less_than_zext_ret(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i8 zeroext %d, i8 zeroext %e) { ; CHECK-NODSP-LABEL: trunc_sink_less_than_zext_ret: ; CHECK-NODSP: @ %bb.0: @ %entry ; CHECK-NODSP-NEXT: subs r0, r1, r0 ; CHECK-NODSP-NEXT: movs r1, #0 ; CHECK-NODSP-NEXT: cmp r0, r2 ; CHECK-NODSP-NEXT: it lo ; CHECK-NODSP-NEXT: addlo r1, r3, r0 ; CHECK-NODSP-NEXT: uxtb r0, r1 ; CHECK-NODSP-NEXT: bx lr ; ; CHECK-DSP-LABEL: trunc_sink_less_than_zext_ret: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: subs r0, r1, r0 ; CHECK-DSP-NEXT: movs r1, #0 ; CHECK-DSP-NEXT: cmp r0, r2 ; CHECK-DSP-NEXT: it lo ; CHECK-DSP-NEXT: addlo r1, r3, r0 ; CHECK-DSP-NEXT: uxtb r0, r1 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: trunc_sink_less_than_zext_ret: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: subs r0, r1, r0 ; CHECK-DSP-IMM-NEXT: adds r1, r3, r0 ; CHECK-DSP-IMM-NEXT: movs r3, #0 ; CHECK-DSP-IMM-NEXT: cmp r0, r2 ; CHECK-DSP-IMM-NEXT: it lo ; CHECK-DSP-IMM-NEXT: movlo r3, r1 ; CHECK-DSP-IMM-NEXT: uxtb r0, r3 ; CHECK-DSP-IMM-NEXT: bx lr entry: %sub = sub nuw i16 %b, %a %cmp = icmp ult i16 %sub, %c br i1 %cmp, label %if.then, label %if.end if.then: %trunc = trunc i16 %sub to i8 %add = add nuw i8 %d, %trunc br label %if.end if.end: %retval = phi i8 [ 0, %entry ], [ %add, %if.then ] ret i8 %retval } define i32 @bitcast_i1(i16 zeroext %a, i32 %b, i32 %c) { ; CHECK-LABEL: bitcast_i1: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: ands r0, r0, #1 ; CHECK-NEXT: it ne ; CHECK-NEXT: movne r0, r1 ; CHECK-NEXT: bx lr entry: %0 = bitcast i1 1 to i1 %1 = trunc i16 %a to i1 %cmp = icmp eq i1 %1, %0 br i1 %cmp, label %if.then, label %exit if.then: %conv = zext i1 %0 to i16 %conv1 = zext i1 %1 to i16 %cmp1 = icmp uge i16 %conv, %conv1 %select = select i1 %cmp1, i32 %b, i32 %c br label %exit exit: %retval = phi i32 [ %select, %if.then ], [ 0, %entry ] ret i32 %retval } define void @search_back_through_trunc(i8* %a, i8* %b, i8* %c, i8* %d, i16* %e) { ; CHECK-NODSP-V8-LABEL: search_back_through_trunc: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: push {r7, lr} ; CHECK-NODSP-V8-NEXT: ldrb.w r12, [r0] ; CHECK-NODSP-V8-NEXT: ldrb.w lr, [r1] ; CHECK-NODSP-V8-NEXT: ldrb r1, [r2] ; CHECK-NODSP-V8-NEXT: ldrb r0, [r3] ; CHECK-NODSP-V8-NEXT: orr.w r12, lr, r12, lsl #8 ; CHECK-NODSP-V8-NEXT: orr.w r0, r0, r1, lsl #8 ; CHECK-NODSP-V8-NEXT: cmp r12, r0 ; CHECK-NODSP-V8-NEXT: beq .LBB23_2 ; CHECK-NODSP-V8-NEXT: @ %bb.1: @ %if.else136 ; CHECK-NODSP-V8-NEXT: ldr r0, [sp, #8] ; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] ; CHECK-NODSP-V8-NEXT: uxtb.w lr, r0 ; CHECK-NODSP-V8-NEXT: lsrs r1, r0, #8 ; CHECK-NODSP-V8-NEXT: .LBB23_2: @ %if.end183 ; CHECK-NODSP-V8-NEXT: strb r1, [r2] ; CHECK-NODSP-V8-NEXT: strb.w lr, [r3] ; CHECK-NODSP-V8-NEXT: pop {r7, pc} ; ; CHECK-NODSP-V7-LABEL: search_back_through_trunc: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: .save {r4, lr} ; CHECK-NODSP-V7-NEXT: push {r4, lr} ; CHECK-NODSP-V7-NEXT: ldrb r4, [r0] ; CHECK-NODSP-V7-NEXT: ldrb.w r12, [r2] ; CHECK-NODSP-V7-NEXT: ldrb r0, [r1] ; CHECK-NODSP-V7-NEXT: ldrb.w lr, [r3] ; CHECK-NODSP-V7-NEXT: orr.w r4, r0, r4, lsl #8 ; CHECK-NODSP-V7-NEXT: orr.w r1, lr, r12, lsl #8 ; CHECK-NODSP-V7-NEXT: cmp r4, r1 ; CHECK-NODSP-V7-NEXT: itttt ne ; CHECK-NODSP-V7-NEXT: ldrne r0, [sp, #8] ; CHECK-NODSP-V7-NEXT: ldrhne r0, [r0] ; CHECK-NODSP-V7-NEXT: lsrne.w r12, r0, #8 ; CHECK-NODSP-V7-NEXT: uxtbne r0, r0 ; CHECK-NODSP-V7-NEXT: strb.w r12, [r2] ; CHECK-NODSP-V7-NEXT: strb r0, [r3] ; CHECK-NODSP-V7-NEXT: pop {r4, pc} ; ; CHECK-DSP-LABEL: search_back_through_trunc: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: push {r4, lr} ; CHECK-DSP-NEXT: ldrb r4, [r0] ; CHECK-DSP-NEXT: ldrb r0, [r1] ; CHECK-DSP-NEXT: ldrb.w r12, [r2] ; CHECK-DSP-NEXT: ldrb.w lr, [r3] ; CHECK-DSP-NEXT: orr.w lr, lr, r12, lsl #8 ; CHECK-DSP-NEXT: orr.w r1, r0, r4, lsl #8 ; CHECK-DSP-NEXT: cmp r1, lr ; CHECK-DSP-NEXT: itttt ne ; CHECK-DSP-NEXT: ldrne r0, [sp, #8] ; CHECK-DSP-NEXT: ldrhne r0, [r0] ; CHECK-DSP-NEXT: lsrne.w r12, r0, #8 ; CHECK-DSP-NEXT: uxtbne r0, r0 ; CHECK-DSP-NEXT: strb.w r12, [r2] ; CHECK-DSP-NEXT: strb r0, [r3] ; CHECK-DSP-NEXT: pop {r4, pc} ; ; CHECK-DSP-IMM-LABEL: search_back_through_trunc: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: push {r4, lr} ; CHECK-DSP-IMM-NEXT: ldrb r4, [r0] ; CHECK-DSP-IMM-NEXT: ldrb.w r12, [r2] ; CHECK-DSP-IMM-NEXT: ldrb r0, [r1] ; CHECK-DSP-IMM-NEXT: ldrb.w lr, [r3] ; CHECK-DSP-IMM-NEXT: orr.w r4, r0, r4, lsl #8 ; CHECK-DSP-IMM-NEXT: orr.w r1, lr, r12, lsl #8 ; CHECK-DSP-IMM-NEXT: cmp r4, r1 ; CHECK-DSP-IMM-NEXT: beq .LBB23_2 ; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %if.else136 ; CHECK-DSP-IMM-NEXT: ldr r0, [sp, #8] ; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] ; CHECK-DSP-IMM-NEXT: lsr.w r12, r0, #8 ; CHECK-DSP-IMM-NEXT: uxtb r0, r0 ; CHECK-DSP-IMM-NEXT: .LBB23_2: @ %if.end183 ; CHECK-DSP-IMM-NEXT: strb.w r12, [r2] ; CHECK-DSP-IMM-NEXT: strb r0, [r3] ; CHECK-DSP-IMM-NEXT: pop {r4, pc} entry: %0 = load i8, i8* %a, align 1 %conv106 = zext i8 %0 to i16 %shl = shl nuw i16 %conv106, 8 %1 = load i8, i8* %b, align 1 %conv108 = zext i8 %1 to i16 %or109 = or i16 %shl, %conv108 %2 = load i8, i8* %c, align 1 %conv119 = zext i8 %2 to i16 %shl120 = shl nuw i16 %conv119, 8 %3 = load i8, i8* %d, align 1 %conv122 = zext i8 %3 to i16 %or123 = or i16 %shl120, %conv122 %cmp133 = icmp eq i16 %or109, %or123 br i1 %cmp133, label %if.end183, label %if.else136 if.else136: %4 = load i16, i16* %e, align 2 %extract.t854 = trunc i16 %4 to i8 %extract856 = lshr i16 %4, 8 %extract.t857 = trunc i16 %extract856 to i8 br label %if.end183 if.end183: %w.0.off0 = phi i8 [ %extract.t854, %if.else136 ], [ %1, %entry ] %w.0.off8 = phi i8 [ %extract.t857, %if.else136 ], [ %2, %entry ] store i8 %w.0.off8, i8* %c, align 1 store i8 %w.0.off0, i8* %d, align 1 ret void } @c = common dso_local local_unnamed_addr global i16 0, align 2 @b = common dso_local local_unnamed_addr global i16 0, align 2 @f = common dso_local local_unnamed_addr global i32 0, align 4 @e = common dso_local local_unnamed_addr global i8 0, align 1 @a = common dso_local local_unnamed_addr global i8 0, align 1 @d = common dso_local local_unnamed_addr global i32 0, align 4 define void @and_trunc_two_zext() { ; CHECK-NODSP-V8-LABEL: and_trunc_two_zext: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: movw r1, :lower16:b ; CHECK-NODSP-V8-NEXT: movt r1, :upper16:b ; CHECK-NODSP-V8-NEXT: ldrh r1, [r1] ; CHECK-NODSP-V8-NEXT: movw r3, :lower16:f ; CHECK-NODSP-V8-NEXT: sxth r2, r1 ; CHECK-NODSP-V8-NEXT: movt r3, :upper16:f ; CHECK-NODSP-V8-NEXT: str r2, [r3] ; CHECK-NODSP-V8-NEXT: movw r3, :lower16:a ; CHECK-NODSP-V8-NEXT: movt r3, :upper16:a ; CHECK-NODSP-V8-NEXT: movw r0, :lower16:c ; CHECK-NODSP-V8-NEXT: movw r2, :lower16:e ; CHECK-NODSP-V8-NEXT: ldrb r3, [r3] ; CHECK-NODSP-V8-NEXT: movt r0, :upper16:c ; CHECK-NODSP-V8-NEXT: and r1, r1, #1 ; CHECK-NODSP-V8-NEXT: movt r2, :upper16:e ; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] ; CHECK-NODSP-V8-NEXT: strb r1, [r2] ; CHECK-NODSP-V8-NEXT: muls r1, r3, r1 ; CHECK-NODSP-V8-NEXT: uxtb r1, r1 ; CHECK-NODSP-V8-NEXT: movw r2, :lower16:d ; CHECK-NODSP-V8-NEXT: orrs r0, r1 ; CHECK-NODSP-V8-NEXT: movt r2, :upper16:d ; CHECK-NODSP-V8-NEXT: lsls r0, r0, #16 ; CHECK-NODSP-V8-NEXT: str r1, [r2] ; CHECK-NODSP-V8-NEXT: it eq ; CHECK-NODSP-V8-NEXT: bxeq lr ; CHECK-NODSP-V8-NEXT: .p2align 2 ; CHECK-NODSP-V8-NEXT: .LBB24_1: @ %for.cond ; CHECK-NODSP-V8-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NODSP-V8-NEXT: b .LBB24_1 ; ; CHECK-NODSP-V7-LABEL: and_trunc_two_zext: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: movw r1, :lower16:b ; CHECK-NODSP-V7-NEXT: movw r2, :lower16:a ; CHECK-NODSP-V7-NEXT: movt r1, :upper16:b ; CHECK-NODSP-V7-NEXT: movt r2, :upper16:a ; CHECK-NODSP-V7-NEXT: ldrh r1, [r1] ; CHECK-NODSP-V7-NEXT: movw r0, :lower16:c ; CHECK-NODSP-V7-NEXT: ldrb r2, [r2] ; CHECK-NODSP-V7-NEXT: movt r0, :upper16:c ; CHECK-NODSP-V7-NEXT: and r3, r1, #1 ; CHECK-NODSP-V7-NEXT: ldrh.w r12, [r0] ; CHECK-NODSP-V7-NEXT: movw r0, :lower16:e ; CHECK-NODSP-V7-NEXT: muls r2, r3, r2 ; CHECK-NODSP-V7-NEXT: movt r0, :upper16:e ; CHECK-NODSP-V7-NEXT: strb r3, [r0] ; CHECK-NODSP-V7-NEXT: sxth r0, r1 ; CHECK-NODSP-V7-NEXT: movw r1, :lower16:f ; CHECK-NODSP-V7-NEXT: movt r1, :upper16:f ; CHECK-NODSP-V7-NEXT: str r0, [r1] ; CHECK-NODSP-V7-NEXT: movw r1, :lower16:d ; CHECK-NODSP-V7-NEXT: movt r1, :upper16:d ; CHECK-NODSP-V7-NEXT: uxtb r0, r2 ; CHECK-NODSP-V7-NEXT: str r0, [r1] ; CHECK-NODSP-V7-NEXT: orr.w r0, r0, r12 ; CHECK-NODSP-V7-NEXT: lsls r0, r0, #16 ; CHECK-NODSP-V7-NEXT: it eq ; CHECK-NODSP-V7-NEXT: bxeq lr ; CHECK-NODSP-V7-NEXT: .LBB24_1: @ %for.cond ; CHECK-NODSP-V7-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NODSP-V7-NEXT: b .LBB24_1 ; ; CHECK-DSP-LABEL: and_trunc_two_zext: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: movw r0, :lower16:b ; CHECK-DSP-NEXT: movw r2, :lower16:f ; CHECK-DSP-NEXT: movt r0, :upper16:b ; CHECK-DSP-NEXT: movt r2, :upper16:f ; CHECK-DSP-NEXT: ldrh r0, [r0] ; CHECK-DSP-NEXT: sxth r1, r0 ; CHECK-DSP-NEXT: and r0, r0, #1 ; CHECK-DSP-NEXT: str r1, [r2] ; CHECK-DSP-NEXT: movw r1, :lower16:e ; CHECK-DSP-NEXT: movt r1, :upper16:e ; CHECK-DSP-NEXT: strb r0, [r1] ; CHECK-DSP-NEXT: movw r1, :lower16:a ; CHECK-DSP-NEXT: movt r1, :upper16:a ; CHECK-DSP-NEXT: ldrb r1, [r1] ; CHECK-DSP-NEXT: muls r0, r1, r0 ; CHECK-DSP-NEXT: movw r1, :lower16:d ; CHECK-DSP-NEXT: uxtb r0, r0 ; CHECK-DSP-NEXT: movt r1, :upper16:d ; CHECK-DSP-NEXT: str r0, [r1] ; CHECK-DSP-NEXT: movw r1, :lower16:c ; CHECK-DSP-NEXT: movt r1, :upper16:c ; CHECK-DSP-NEXT: ldrh r1, [r1] ; CHECK-DSP-NEXT: orrs r0, r1 ; CHECK-DSP-NEXT: lsls r0, r0, #16 ; CHECK-DSP-NEXT: it eq ; CHECK-DSP-NEXT: bxeq lr ; CHECK-DSP-NEXT: .LBB24_1: @ %for.cond ; CHECK-DSP-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-DSP-NEXT: b .LBB24_1 ; ; CHECK-DSP-IMM-LABEL: and_trunc_two_zext: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: movw r1, :lower16:b ; CHECK-DSP-IMM-NEXT: movw r2, :lower16:a ; CHECK-DSP-IMM-NEXT: movt r1, :upper16:b ; CHECK-DSP-IMM-NEXT: movt r2, :upper16:a ; CHECK-DSP-IMM-NEXT: ldrh r1, [r1] ; CHECK-DSP-IMM-NEXT: movw r0, :lower16:c ; CHECK-DSP-IMM-NEXT: ldrb r2, [r2] ; CHECK-DSP-IMM-NEXT: movt r0, :upper16:c ; CHECK-DSP-IMM-NEXT: and r3, r1, #1 ; CHECK-DSP-IMM-NEXT: ldrh.w r12, [r0] ; CHECK-DSP-IMM-NEXT: movw r0, :lower16:e ; CHECK-DSP-IMM-NEXT: muls r2, r3, r2 ; CHECK-DSP-IMM-NEXT: movt r0, :upper16:e ; CHECK-DSP-IMM-NEXT: strb r3, [r0] ; CHECK-DSP-IMM-NEXT: sxth r0, r1 ; CHECK-DSP-IMM-NEXT: movw r1, :lower16:f ; CHECK-DSP-IMM-NEXT: movt r1, :upper16:f ; CHECK-DSP-IMM-NEXT: str r0, [r1] ; CHECK-DSP-IMM-NEXT: movw r1, :lower16:d ; CHECK-DSP-IMM-NEXT: uxtb r0, r2 ; CHECK-DSP-IMM-NEXT: movt r1, :upper16:d ; CHECK-DSP-IMM-NEXT: str r0, [r1] ; CHECK-DSP-IMM-NEXT: orr.w r0, r0, r12 ; CHECK-DSP-IMM-NEXT: lsls r0, r0, #16 ; CHECK-DSP-IMM-NEXT: beq .LBB24_2 ; CHECK-DSP-IMM-NEXT: .LBB24_1: @ %for.cond ; CHECK-DSP-IMM-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-DSP-IMM-NEXT: b .LBB24_1 ; CHECK-DSP-IMM-NEXT: .LBB24_2: @ %if.end ; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i16, i16* @c, align 2 %1 = load i16, i16* @b, align 2 %conv = sext i16 %1 to i32 store i32 %conv, i32* @f, align 4 %2 = trunc i16 %1 to i8 %conv1 = and i8 %2, 1 store i8 %conv1, i8* @e, align 1 %3 = load i8, i8* @a, align 1 %narrow = mul nuw i8 %3, %conv1 %mul = zext i8 %narrow to i32 store i32 %mul, i32* @d, align 4 %4 = zext i8 %narrow to i16 %conv5 = or i16 %0, %4 %tobool = icmp eq i16 %conv5, 0 br i1 %tobool, label %if.end, label %for.cond for.cond: br label %for.cond if.end: ret void } define void @zext_urem_trunc() { ; CHECK-NODSP-V8-LABEL: zext_urem_trunc: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: movw r0, :lower16:c ; CHECK-NODSP-V8-NEXT: movt r0, :upper16:c ; CHECK-NODSP-V8-NEXT: ldrh r1, [r0] ; CHECK-NODSP-V8-NEXT: movw r0, :lower16:e ; CHECK-NODSP-V8-NEXT: movt r0, :upper16:e ; CHECK-NODSP-V8-NEXT: ldrb r0, [r0] ; CHECK-NODSP-V8-NEXT: cbz r1, .LBB25_2 ; CHECK-NODSP-V8-NEXT: @ %bb.1: @ %cond.false ; CHECK-NODSP-V8-NEXT: udiv r2, r0, r1 ; CHECK-NODSP-V8-NEXT: mls r0, r2, r1, r0 ; CHECK-NODSP-V8-NEXT: .LBB25_2: @ %cond.end ; CHECK-NODSP-V8-NEXT: movw r1, :lower16:a ; CHECK-NODSP-V8-NEXT: movt r1, :upper16:a ; CHECK-NODSP-V8-NEXT: strb r0, [r1] ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: zext_urem_trunc: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: .save {r7, lr} ; CHECK-NODSP-V7-NEXT: push {r7, lr} ; CHECK-NODSP-V7-NEXT: movw r0, :lower16:e ; CHECK-NODSP-V7-NEXT: movw r1, :lower16:c ; CHECK-NODSP-V7-NEXT: movt r0, :upper16:e ; CHECK-NODSP-V7-NEXT: movt r1, :upper16:c ; CHECK-NODSP-V7-NEXT: ldrh r1, [r1] ; CHECK-NODSP-V7-NEXT: ldrb r0, [r0] ; CHECK-NODSP-V7-NEXT: cbz r1, .LBB25_2 ; CHECK-NODSP-V7-NEXT: @ %bb.1: @ %cond.false ; CHECK-NODSP-V7-NEXT: bl __aeabi_uidivmod ; CHECK-NODSP-V7-NEXT: mov r0, r1 ; CHECK-NODSP-V7-NEXT: .LBB25_2: @ %cond.end ; CHECK-NODSP-V7-NEXT: movw r1, :lower16:a ; CHECK-NODSP-V7-NEXT: movt r1, :upper16:a ; CHECK-NODSP-V7-NEXT: strb r0, [r1] ; CHECK-NODSP-V7-NEXT: pop {r7, pc} ; ; CHECK-DSP-LABEL: zext_urem_trunc: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: movw r1, :lower16:c ; CHECK-DSP-NEXT: movw r0, :lower16:e ; CHECK-DSP-NEXT: movt r1, :upper16:c ; CHECK-DSP-NEXT: movt r0, :upper16:e ; CHECK-DSP-NEXT: ldrh r1, [r1] ; CHECK-DSP-NEXT: ldrb r0, [r0] ; CHECK-DSP-NEXT: cmp r1, #0 ; CHECK-DSP-NEXT: itt ne ; CHECK-DSP-NEXT: udivne r2, r0, r1 ; CHECK-DSP-NEXT: mlsne r0, r2, r1, r0 ; CHECK-DSP-NEXT: movw r1, :lower16:a ; CHECK-DSP-NEXT: movt r1, :upper16:a ; CHECK-DSP-NEXT: strb r0, [r1] ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: zext_urem_trunc: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: movw r0, :lower16:e ; CHECK-DSP-IMM-NEXT: movw r1, :lower16:c ; CHECK-DSP-IMM-NEXT: movt r0, :upper16:e ; CHECK-DSP-IMM-NEXT: movt r1, :upper16:c ; CHECK-DSP-IMM-NEXT: ldrh r1, [r1] ; CHECK-DSP-IMM-NEXT: ldrb r0, [r0] ; CHECK-DSP-IMM-NEXT: cbz r1, .LBB25_2 ; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %cond.false ; CHECK-DSP-IMM-NEXT: udiv r2, r0, r1 ; CHECK-DSP-IMM-NEXT: mls r0, r2, r1, r0 ; CHECK-DSP-IMM-NEXT: .LBB25_2: @ %cond.end ; CHECK-DSP-IMM-NEXT: movw r1, :lower16:a ; CHECK-DSP-IMM-NEXT: movt r1, :upper16:a ; CHECK-DSP-IMM-NEXT: strb r0, [r1] ; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i16, i16* @c, align 2 %cmp = icmp eq i16 %0, 0 %1 = load i8, i8* @e, align 1 br i1 %cmp, label %cond.end, label %cond.false cond.false: %rem.lhs.trunc = zext i8 %1 to i16 %rem7 = urem i16 %rem.lhs.trunc, %0 %rem.zext = trunc i16 %rem7 to i8 br label %cond.end cond.end: %cond = phi i8 [ %rem.zext, %cond.false ], [ %1, %entry ] store i8 %cond, i8* @a, align 1 ret void } define i1 @dont_replace_trunc_1(i8* %a, i16* %b, i16* %c, i32* %d, i8* %e, i32* %f) { ; CHECK-NODSP-V8-LABEL: dont_replace_trunc_1: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: push {r4, lr} ; CHECK-NODSP-V8-NEXT: ldrh r1, [r1] ; CHECK-NODSP-V8-NEXT: ldrd r12, lr, [sp, #8] ; CHECK-NODSP-V8-NEXT: sxth r4, r1 ; CHECK-NODSP-V8-NEXT: and r1, r1, #1 ; CHECK-NODSP-V8-NEXT: ldrh r2, [r2] ; CHECK-NODSP-V8-NEXT: str.w r4, [lr] ; CHECK-NODSP-V8-NEXT: strb.w r1, [r12] ; CHECK-NODSP-V8-NEXT: ldrb r0, [r0] ; CHECK-NODSP-V8-NEXT: muls r0, r1, r0 ; CHECK-NODSP-V8-NEXT: uxtb r1, r0 ; CHECK-NODSP-V8-NEXT: orr.w r0, r2, r1 ; CHECK-NODSP-V8-NEXT: uxth r0, r0 ; CHECK-NODSP-V8-NEXT: clz r0, r0 ; CHECK-NODSP-V8-NEXT: lsrs r0, r0, #5 ; CHECK-NODSP-V8-NEXT: str r1, [r3] ; CHECK-NODSP-V8-NEXT: pop {r4, pc} ; ; CHECK-NODSP-V7-LABEL: dont_replace_trunc_1: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: .save {r4, lr} ; CHECK-NODSP-V7-NEXT: push {r4, lr} ; CHECK-NODSP-V7-NEXT: ldrh r1, [r1] ; CHECK-NODSP-V7-NEXT: ldrd lr, r12, [sp, #8] ; CHECK-NODSP-V7-NEXT: ldrh r2, [r2] ; CHECK-NODSP-V7-NEXT: sxth r4, r1 ; CHECK-NODSP-V7-NEXT: and r1, r1, #1 ; CHECK-NODSP-V7-NEXT: str.w r4, [r12] ; CHECK-NODSP-V7-NEXT: strb.w r1, [lr] ; CHECK-NODSP-V7-NEXT: ldrb r0, [r0] ; CHECK-NODSP-V7-NEXT: muls r0, r1, r0 ; CHECK-NODSP-V7-NEXT: uxtb r0, r0 ; CHECK-NODSP-V7-NEXT: str r0, [r3] ; CHECK-NODSP-V7-NEXT: orrs r0, r2 ; CHECK-NODSP-V7-NEXT: uxth r0, r0 ; CHECK-NODSP-V7-NEXT: clz r0, r0 ; CHECK-NODSP-V7-NEXT: lsrs r0, r0, #5 ; CHECK-NODSP-V7-NEXT: pop {r4, pc} ; ; CHECK-DSP-LABEL: dont_replace_trunc_1: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: push {r7, lr} ; CHECK-DSP-NEXT: ldrh r1, [r1] ; CHECK-DSP-NEXT: ldrh.w r12, [r2] ; CHECK-DSP-NEXT: ldr r2, [sp, #12] ; CHECK-DSP-NEXT: sxth.w lr, r1 ; CHECK-DSP-NEXT: and r1, r1, #1 ; CHECK-DSP-NEXT: str.w lr, [r2] ; CHECK-DSP-NEXT: ldr r2, [sp, #8] ; CHECK-DSP-NEXT: strb r1, [r2] ; CHECK-DSP-NEXT: ldrb r0, [r0] ; CHECK-DSP-NEXT: muls r0, r1, r0 ; CHECK-DSP-NEXT: uxtb r0, r0 ; CHECK-DSP-NEXT: str r0, [r3] ; CHECK-DSP-NEXT: orr.w r0, r0, r12 ; CHECK-DSP-NEXT: uxth r0, r0 ; CHECK-DSP-NEXT: clz r0, r0 ; CHECK-DSP-NEXT: lsrs r0, r0, #5 ; CHECK-DSP-NEXT: pop {r7, pc} ; ; CHECK-DSP-IMM-LABEL: dont_replace_trunc_1: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: push {r4, lr} ; CHECK-DSP-IMM-NEXT: ldrd lr, r12, [sp, #8] ; CHECK-DSP-IMM-NEXT: ldrh r1, [r1] ; CHECK-DSP-IMM-NEXT: ldrh r2, [r2] ; CHECK-DSP-IMM-NEXT: sxth r4, r1 ; CHECK-DSP-IMM-NEXT: str.w r4, [r12] ; CHECK-DSP-IMM-NEXT: and r1, r1, #1 ; CHECK-DSP-IMM-NEXT: strb.w r1, [lr] ; CHECK-DSP-IMM-NEXT: ldrb r0, [r0] ; CHECK-DSP-IMM-NEXT: muls r0, r1, r0 ; CHECK-DSP-IMM-NEXT: uxtb r0, r0 ; CHECK-DSP-IMM-NEXT: str r0, [r3] ; CHECK-DSP-IMM-NEXT: orrs r0, r2 ; CHECK-DSP-IMM-NEXT: uxth r0, r0 ; CHECK-DSP-IMM-NEXT: clz r0, r0 ; CHECK-DSP-IMM-NEXT: lsrs r0, r0, #5 ; CHECK-DSP-IMM-NEXT: pop {r4, pc} entry: %0 = load i16, i16* %c, align 2 %1 = load i16, i16* %b, align 2 %conv = sext i16 %1 to i32 store i32 %conv, i32* %f, align 4 %2 = trunc i16 %1 to i8 %conv1 = and i8 %2, 1 store i8 %conv1, i8* %e, align 1 %3 = load i8, i8* %a, align 1 %narrow = mul nuw i8 %3, %conv1 %mul = zext i8 %narrow to i32 store i32 %mul, i32* %d, align 4 %4 = zext i8 %narrow to i16 %conv5 = or i16 %0, %4 %tobool = icmp eq i16 %conv5, 0 ret i1 %tobool } define i32 @dont_replace_trunc_2(i16* %a, i8* %b) { ; CHECK-NODSP-V8-LABEL: dont_replace_trunc_2: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] ; CHECK-NODSP-V8-NEXT: cmp r0, #8 ; CHECK-NODSP-V8-NEXT: it ls ; CHECK-NODSP-V8-NEXT: movls r0, #0 ; CHECK-NODSP-V8-NEXT: ldrb r2, [r1] ; CHECK-NODSP-V8-NEXT: uxtb r0, r0 ; CHECK-NODSP-V8-NEXT: orrs r0, r2 ; CHECK-NODSP-V8-NEXT: strb r0, [r1] ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: dont_replace_trunc_2: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: ldrh r0, [r0] ; CHECK-NODSP-V7-NEXT: ldrb r2, [r1] ; CHECK-NODSP-V7-NEXT: cmp r0, #8 ; CHECK-NODSP-V7-NEXT: it ls ; CHECK-NODSP-V7-NEXT: movls r0, #0 ; CHECK-NODSP-V7-NEXT: uxtb r0, r0 ; CHECK-NODSP-V7-NEXT: orrs r0, r2 ; CHECK-NODSP-V7-NEXT: strb r0, [r1] ; CHECK-NODSP-V7-NEXT: bx lr ; ; CHECK-DSP-LABEL: dont_replace_trunc_2: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: ldrh r0, [r0] ; CHECK-DSP-NEXT: cmp r0, #8 ; CHECK-DSP-NEXT: it ls ; CHECK-DSP-NEXT: movls r0, #0 ; CHECK-DSP-NEXT: ldrb r2, [r1] ; CHECK-DSP-NEXT: uxtb r0, r0 ; CHECK-DSP-NEXT: orrs r0, r2 ; CHECK-DSP-NEXT: strb r0, [r1] ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: dont_replace_trunc_2: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] ; CHECK-DSP-IMM-NEXT: movs r2, #0 ; CHECK-DSP-IMM-NEXT: ldrb r3, [r1] ; CHECK-DSP-IMM-NEXT: cmp r0, #8 ; CHECK-DSP-IMM-NEXT: it hi ; CHECK-DSP-IMM-NEXT: movhi r2, r0 ; CHECK-DSP-IMM-NEXT: uxtb r0, r2 ; CHECK-DSP-IMM-NEXT: orrs r0, r3 ; CHECK-DSP-IMM-NEXT: strb r0, [r1] ; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i16, i16* %a, align 2 %cmp = icmp ugt i16 %0, 8 %narrow = select i1 %cmp, i16 %0, i16 0 %cond = trunc i16 %narrow to i8 %1 = load i8, i8* %b, align 1 %or = or i8 %1, %cond store i8 %or, i8* %b, align 1 %conv5 = zext i8 %or to i32 ret i32 %conv5 } define i32 @replace_trunk_with_mask(i16* %a) { ; CHECK-NODSP-V8-LABEL: replace_trunk_with_mask: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] ; CHECK-NODSP-V8-NEXT: cmp r0, #0 ; CHECK-NODSP-V8-NEXT: itt eq ; CHECK-NODSP-V8-NEXT: moveq r0, #0 ; CHECK-NODSP-V8-NEXT: bxeq lr ; CHECK-NODSP-V8-NEXT: movw r1, #535 ; CHECK-NODSP-V8-NEXT: udiv r2, r1, r0 ; CHECK-NODSP-V8-NEXT: mls r0, r2, r0, r1 ; CHECK-NODSP-V8-NEXT: movw r1, #43691 ; CHECK-NODSP-V8-NEXT: uxtb r0, r0 ; CHECK-NODSP-V8-NEXT: movt r1, #43690 ; CHECK-NODSP-V8-NEXT: umull r0, r1, r0, r1 ; CHECK-NODSP-V8-NEXT: lsrs r0, r1, #1 ; CHECK-NODSP-V8-NEXT: bx lr ; ; CHECK-NODSP-V7-LABEL: replace_trunk_with_mask: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: .save {r7, lr} ; CHECK-NODSP-V7-NEXT: push {r7, lr} ; CHECK-NODSP-V7-NEXT: ldrh r1, [r0] ; CHECK-NODSP-V7-NEXT: cbz r1, .LBB28_2 ; CHECK-NODSP-V7-NEXT: @ %bb.1: @ %cond.false ; CHECK-NODSP-V7-NEXT: movw r0, #535 ; CHECK-NODSP-V7-NEXT: bl __aeabi_uidivmod ; CHECK-NODSP-V7-NEXT: uxtb r0, r1 ; CHECK-NODSP-V7-NEXT: movw r1, #43691 ; CHECK-NODSP-V7-NEXT: movt r1, #43690 ; CHECK-NODSP-V7-NEXT: umull r0, r1, r0, r1 ; CHECK-NODSP-V7-NEXT: lsrs r0, r1, #1 ; CHECK-NODSP-V7-NEXT: pop {r7, pc} ; CHECK-NODSP-V7-NEXT: .LBB28_2: ; CHECK-NODSP-V7-NEXT: movs r0, #0 ; CHECK-NODSP-V7-NEXT: pop {r7, pc} ; ; CHECK-DSP-LABEL: replace_trunk_with_mask: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: ldrh r0, [r0] ; CHECK-DSP-NEXT: cmp r0, #0 ; CHECK-DSP-NEXT: itt eq ; CHECK-DSP-NEXT: moveq r0, #0 ; CHECK-DSP-NEXT: bxeq lr ; CHECK-DSP-NEXT: movw r1, #535 ; CHECK-DSP-NEXT: udiv r2, r1, r0 ; CHECK-DSP-NEXT: mls r0, r2, r0, r1 ; CHECK-DSP-NEXT: movw r1, #43691 ; CHECK-DSP-NEXT: uxtb r0, r0 ; CHECK-DSP-NEXT: movt r1, #43690 ; CHECK-DSP-NEXT: umull r0, r1, r0, r1 ; CHECK-DSP-NEXT: lsrs r0, r1, #1 ; CHECK-DSP-NEXT: bx lr ; ; CHECK-DSP-IMM-LABEL: replace_trunk_with_mask: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] ; CHECK-DSP-IMM-NEXT: cbz r0, .LBB28_2 ; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %cond.false ; CHECK-DSP-IMM-NEXT: movw r1, #535 ; CHECK-DSP-IMM-NEXT: udiv r2, r1, r0 ; CHECK-DSP-IMM-NEXT: mls r0, r2, r0, r1 ; CHECK-DSP-IMM-NEXT: movw r1, #43691 ; CHECK-DSP-IMM-NEXT: movt r1, #43690 ; CHECK-DSP-IMM-NEXT: uxtb r0, r0 ; CHECK-DSP-IMM-NEXT: umull r0, r1, r0, r1 ; CHECK-DSP-IMM-NEXT: lsrs r0, r1, #1 ; CHECK-DSP-IMM-NEXT: bx lr ; CHECK-DSP-IMM-NEXT: .LBB28_2: ; CHECK-DSP-IMM-NEXT: movs r0, #0 ; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i16, i16* %a %cmp = icmp eq i16 %0, 0 br i1 %cmp, label %cond.end, label %cond.false cond.false: %1 = urem i16 535, %0 %.lhs.trunc = trunc i16 %1 to i8 %2 = udiv i8 %.lhs.trunc, 3 %phitmp = zext i8 %2 to i32 br label %cond.end cond.end: %cond = phi i32 [ %phitmp, %cond.false ], [ 0, %entry ] ret i32 %cond } define float @test_i8_sitofp(i8* %ptr, i8 %arg) { ; CHECK-NODSP-V8-LABEL: test_i8_sitofp: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: ldrb r0, [r0] ; CHECK-NODSP-V8-NEXT: uxtb r2, r1 ; CHECK-NODSP-V8-NEXT: cmp r0, r2 ; CHECK-NODSP-V8-NEXT: bne .LBB29_2 ; CHECK-NODSP-V8-NEXT: @ %bb.1: ; CHECK-NODSP-V8-NEXT: vldr s0, .LCPI29_0 ; CHECK-NODSP-V8-NEXT: vmov r0, s0 ; CHECK-NODSP-V8-NEXT: bx lr ; CHECK-NODSP-V8-NEXT: .LBB29_2: @ %if.end ; CHECK-NODSP-V8-NEXT: sxtb r0, r1 ; CHECK-NODSP-V8-NEXT: vmov s0, r0 ; CHECK-NODSP-V8-NEXT: vcvt.f32.s32 s0, s0 ; CHECK-NODSP-V8-NEXT: vmov.f32 s2, #2.000000e+01 ; CHECK-NODSP-V8-NEXT: vdiv.f32 s0, s0, s2 ; CHECK-NODSP-V8-NEXT: vmov r0, s0 ; CHECK-NODSP-V8-NEXT: bx lr ; CHECK-NODSP-V8-NEXT: .p2align 2 ; CHECK-NODSP-V8-NEXT: @ %bb.3: ; CHECK-NODSP-V8-NEXT: .LCPI29_0: ; CHECK-NODSP-V8-NEXT: .long 0 @ float 0 ; ; CHECK-NODSP-V7-LABEL: test_i8_sitofp: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: ldrb r0, [r0] ; CHECK-NODSP-V7-NEXT: uxtb r2, r1 ; CHECK-NODSP-V7-NEXT: cmp r0, r2 ; CHECK-NODSP-V7-NEXT: ittt eq ; CHECK-NODSP-V7-NEXT: vldreq s0, .LCPI29_0 ; CHECK-NODSP-V7-NEXT: vmoveq r0, s0 ; CHECK-NODSP-V7-NEXT: bxeq lr ; CHECK-NODSP-V7-NEXT: sxtb r0, r1 ; CHECK-NODSP-V7-NEXT: vmov.f32 s0, #2.000000e+01 ; CHECK-NODSP-V7-NEXT: vmov s2, r0 ; CHECK-NODSP-V7-NEXT: vcvt.f32.s32 s2, s2 ; CHECK-NODSP-V7-NEXT: vdiv.f32 s0, s2, s0 ; CHECK-NODSP-V7-NEXT: vmov r0, s0 ; CHECK-NODSP-V7-NEXT: bx lr ; CHECK-NODSP-V7-NEXT: .p2align 2 ; CHECK-NODSP-V7-NEXT: @ %bb.1: ; CHECK-NODSP-V7-NEXT: .LCPI29_0: ; CHECK-NODSP-V7-NEXT: .long 0 @ float 0 ; ; CHECK-DSP-LABEL: test_i8_sitofp: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: ldrb r0, [r0] ; CHECK-DSP-NEXT: uxtb r2, r1 ; CHECK-DSP-NEXT: cmp r0, r2 ; CHECK-DSP-NEXT: ittt eq ; CHECK-DSP-NEXT: vldreq s0, .LCPI29_0 ; CHECK-DSP-NEXT: vmoveq r0, s0 ; CHECK-DSP-NEXT: bxeq lr ; CHECK-DSP-NEXT: sxtb r0, r1 ; CHECK-DSP-NEXT: vmov.f32 s0, #2.000000e+01 ; CHECK-DSP-NEXT: vmov s2, r0 ; CHECK-DSP-NEXT: vcvt.f32.s32 s2, s2 ; CHECK-DSP-NEXT: vdiv.f32 s0, s2, s0 ; CHECK-DSP-NEXT: vmov r0, s0 ; CHECK-DSP-NEXT: bx lr ; CHECK-DSP-NEXT: .p2align 2 ; CHECK-DSP-NEXT: @ %bb.1: ; CHECK-DSP-NEXT: .LCPI29_0: ; CHECK-DSP-NEXT: .long 0 @ float 0 ; ; CHECK-DSP-IMM-LABEL: test_i8_sitofp: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: ldrb r0, [r0] ; CHECK-DSP-IMM-NEXT: uxtb r2, r1 ; CHECK-DSP-IMM-NEXT: cmp r0, r2 ; CHECK-DSP-IMM-NEXT: bne .LBB29_2 ; CHECK-DSP-IMM-NEXT: @ %bb.1: ; CHECK-DSP-IMM-NEXT: vldr s0, .LCPI29_0 ; CHECK-DSP-IMM-NEXT: vmov r0, s0 ; CHECK-DSP-IMM-NEXT: bx lr ; CHECK-DSP-IMM-NEXT: .LBB29_2: @ %if.end ; CHECK-DSP-IMM-NEXT: sxtb r0, r1 ; CHECK-DSP-IMM-NEXT: vmov.f32 s0, #2.000000e+01 ; CHECK-DSP-IMM-NEXT: vmov s2, r0 ; CHECK-DSP-IMM-NEXT: vcvt.f32.s32 s2, s2 ; CHECK-DSP-IMM-NEXT: vdiv.f32 s0, s2, s0 ; CHECK-DSP-IMM-NEXT: vmov r0, s0 ; CHECK-DSP-IMM-NEXT: bx lr ; CHECK-DSP-IMM-NEXT: .p2align 2 ; CHECK-DSP-IMM-NEXT: @ %bb.3: ; CHECK-DSP-IMM-NEXT: .LCPI29_0: ; CHECK-DSP-IMM-NEXT: .long 0 @ float 0 entry: %0 = load i8, i8* %ptr, align 1 %cmp = icmp eq i8 %0, %arg br i1 %cmp, label %exit, label %if.end if.end: %conv = sitofp i8 %arg to float %div = fdiv float %conv, 2.000000e+01 br label %exit exit: %res = phi float [ 0.0, %entry ], [ %div, %if.end ] ret float %res } define float @test_i16_sitofp(i16* %ptr, i16 %arg) { ; CHECK-NODSP-V8-LABEL: test_i16_sitofp: ; CHECK-NODSP-V8: @ %bb.0: @ %entry ; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] ; CHECK-NODSP-V8-NEXT: uxth r2, r1 ; CHECK-NODSP-V8-NEXT: cmp r0, r2 ; CHECK-NODSP-V8-NEXT: bne .LBB30_2 ; CHECK-NODSP-V8-NEXT: @ %bb.1: ; CHECK-NODSP-V8-NEXT: vldr s0, .LCPI30_0 ; CHECK-NODSP-V8-NEXT: vmov r0, s0 ; CHECK-NODSP-V8-NEXT: bx lr ; CHECK-NODSP-V8-NEXT: .LBB30_2: @ %if.end ; CHECK-NODSP-V8-NEXT: sxth r0, r1 ; CHECK-NODSP-V8-NEXT: vmov s0, r0 ; CHECK-NODSP-V8-NEXT: vcvt.f32.s32 s0, s0 ; CHECK-NODSP-V8-NEXT: vmov.f32 s2, #2.000000e+01 ; CHECK-NODSP-V8-NEXT: vdiv.f32 s0, s0, s2 ; CHECK-NODSP-V8-NEXT: vmov r0, s0 ; CHECK-NODSP-V8-NEXT: bx lr ; CHECK-NODSP-V8-NEXT: .p2align 2 ; CHECK-NODSP-V8-NEXT: @ %bb.3: ; CHECK-NODSP-V8-NEXT: .LCPI30_0: ; CHECK-NODSP-V8-NEXT: .long 0 @ float 0 ; ; CHECK-NODSP-V7-LABEL: test_i16_sitofp: ; CHECK-NODSP-V7: @ %bb.0: @ %entry ; CHECK-NODSP-V7-NEXT: ldrh r0, [r0] ; CHECK-NODSP-V7-NEXT: uxth r2, r1 ; CHECK-NODSP-V7-NEXT: cmp r0, r2 ; CHECK-NODSP-V7-NEXT: ittt eq ; CHECK-NODSP-V7-NEXT: vldreq s0, .LCPI30_0 ; CHECK-NODSP-V7-NEXT: vmoveq r0, s0 ; CHECK-NODSP-V7-NEXT: bxeq lr ; CHECK-NODSP-V7-NEXT: sxth r0, r1 ; CHECK-NODSP-V7-NEXT: vmov.f32 s0, #2.000000e+01 ; CHECK-NODSP-V7-NEXT: vmov s2, r0 ; CHECK-NODSP-V7-NEXT: vcvt.f32.s32 s2, s2 ; CHECK-NODSP-V7-NEXT: vdiv.f32 s0, s2, s0 ; CHECK-NODSP-V7-NEXT: vmov r0, s0 ; CHECK-NODSP-V7-NEXT: bx lr ; CHECK-NODSP-V7-NEXT: .p2align 2 ; CHECK-NODSP-V7-NEXT: @ %bb.1: ; CHECK-NODSP-V7-NEXT: .LCPI30_0: ; CHECK-NODSP-V7-NEXT: .long 0 @ float 0 ; ; CHECK-DSP-LABEL: test_i16_sitofp: ; CHECK-DSP: @ %bb.0: @ %entry ; CHECK-DSP-NEXT: ldrh r0, [r0] ; CHECK-DSP-NEXT: uxth r2, r1 ; CHECK-DSP-NEXT: cmp r0, r2 ; CHECK-DSP-NEXT: ittt eq ; CHECK-DSP-NEXT: vldreq s0, .LCPI30_0 ; CHECK-DSP-NEXT: vmoveq r0, s0 ; CHECK-DSP-NEXT: bxeq lr ; CHECK-DSP-NEXT: sxth r0, r1 ; CHECK-DSP-NEXT: vmov.f32 s0, #2.000000e+01 ; CHECK-DSP-NEXT: vmov s2, r0 ; CHECK-DSP-NEXT: vcvt.f32.s32 s2, s2 ; CHECK-DSP-NEXT: vdiv.f32 s0, s2, s0 ; CHECK-DSP-NEXT: vmov r0, s0 ; CHECK-DSP-NEXT: bx lr ; CHECK-DSP-NEXT: .p2align 2 ; CHECK-DSP-NEXT: @ %bb.1: ; CHECK-DSP-NEXT: .LCPI30_0: ; CHECK-DSP-NEXT: .long 0 @ float 0 ; ; CHECK-DSP-IMM-LABEL: test_i16_sitofp: ; CHECK-DSP-IMM: @ %bb.0: @ %entry ; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] ; CHECK-DSP-IMM-NEXT: uxth r2, r1 ; CHECK-DSP-IMM-NEXT: cmp r0, r2 ; CHECK-DSP-IMM-NEXT: bne .LBB30_2 ; CHECK-DSP-IMM-NEXT: @ %bb.1: ; CHECK-DSP-IMM-NEXT: vldr s0, .LCPI30_0 ; CHECK-DSP-IMM-NEXT: vmov r0, s0 ; CHECK-DSP-IMM-NEXT: bx lr ; CHECK-DSP-IMM-NEXT: .LBB30_2: @ %if.end ; CHECK-DSP-IMM-NEXT: sxth r0, r1 ; CHECK-DSP-IMM-NEXT: vmov.f32 s0, #2.000000e+01 ; CHECK-DSP-IMM-NEXT: vmov s2, r0 ; CHECK-DSP-IMM-NEXT: vcvt.f32.s32 s2, s2 ; CHECK-DSP-IMM-NEXT: vdiv.f32 s0, s2, s0 ; CHECK-DSP-IMM-NEXT: vmov r0, s0 ; CHECK-DSP-IMM-NEXT: bx lr ; CHECK-DSP-IMM-NEXT: .p2align 2 ; CHECK-DSP-IMM-NEXT: @ %bb.3: ; CHECK-DSP-IMM-NEXT: .LCPI30_0: ; CHECK-DSP-IMM-NEXT: .long 0 @ float 0 entry: %0 = load i16, i16* %ptr, align 1 %cmp = icmp eq i16 %0, %arg br i1 %cmp, label %exit, label %if.end if.end: %conv = sitofp i16 %arg to float %div = fdiv float %conv, 2.000000e+01 br label %exit exit: %res = phi float [ 0.0, %entry ], [ %div, %if.end ] ret float %res }