.\"/*
.\" * Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
.\" *
.\" * Licensed under the Apache License, Version 2.0 (the "License");
.\" * you may not use this file except in compliance with the License.
.\" * You may obtain a copy of the License at
.\" *
.\" *     http://www.apache.org/licenses/LICENSE-2.0
.\" *
.\" * Unless required by applicable law or agreed to in writing, software
.\" * distributed under the License is distributed on an "AS IS" BASIS,
.\" * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
.\" * See the License for the specific language governing permissions and
.\" * limitations under the License.
.\" * 
.\" */

.IL FLOAT128CON sym
.AT cons null float128 cse
.IL FLOAT128LD arlnk nme stc
.AT load null float128
.IL FLOAT128ST float128lnk arlnk nme stc
.AT store null trm
.IL FLOAT128ABS float128lnk
.AT arth null float128 cse
.IL FLOAT128CHS float128lnk
.AT arth null float128 cse
.IL FLOAT128RNDINT float128lnk
.AT arth null float128 cse
.IL FLOAT128FROM dplnk
.AT arth null float128 cse
.IL FLOAT128TO float128lnk
.AT arth null dp cse
.IL FLOAT128ADD float128lnk float128lnk
.AT arth comm float128 cse
.IL FLOAT128SUB float128lnk float128lnk
.AT arth null float128 cse
.IL FLOAT128MUL float128lnk float128lnk
.AT arth comm float128 cse
.IL FLOAT128DIV float128lnk float128lnk
.AT arth null float128 cse
.IL FLOAT128CMP float128lnk float128lnk stc
.AT arth null ir cse
.IL FLOAT128ARG float128lnk lnk
.AT define null lnk
.IL FLOAT128RETURN float128lnk
.AT define null trm
.IL FLOAT128RESULT lnk
.AT define null float128 dom
.IL FLOAT128FREE float128lnk
.AT other null trm
.IL FLOAT128CSE float128lnk
.AT arth null float128