; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -amdgpu-spill-cfi-saved-regs -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -amdgpu-spill-cfi-saved-regs -filetype=obj < %s | llvm-dwarfdump --debug-line - | FileCheck --check-prefix=DWARFLINE %s

; Test that the prologue end line directive is emitted after all the prologue instructions
; and also before the beginning of the epilogue instructions in a trivial function.

; Function Attrs: convergent noinline nounwind optnone mustprogress
define hidden void @_Z9base_casev() #0 !dbg !6 {
; CHECK-LABEL: _Z9base_casev:
; CHECK:       .Lfunc_begin0:
; CHECK-NEXT:    .file 0 "dir" "file.cpp"
; CHECK-NEXT:    .loc 0 5 0 ; file.cpp:5:0
; CHECK-NEXT:    .cfi_sections .debug_frame
; CHECK-NEXT:    .cfi_startproc
; CHECK-NEXT:  ; %bb.0: ; %entry
; CHECK-NEXT:    .cfi_llvm_def_aspace_cfa 64, 0, 6
; CHECK-NEXT:    .cfi_escape 0x10, 0x10, 0x08, 0x90, 0x3e, 0x93, 0x04, 0x90, 0x3f, 0x93, 0x04 ;
; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT:    s_or_saveexec_b64 s[4:5], -1
; CHECK-NEXT:    buffer_store_dword v0, off, s[0:3], s32 ; 4-byte Folded Spill
; CHECK-NEXT:    .cfi_offset 2560, 0
; CHECK-NEXT:    s_mov_b64 exec, s[4:5]
; CHECK-NEXT:    v_writelane_b32 v0, s30, 0
; CHECK-NEXT:    v_writelane_b32 v0, s31, 1
; CHECK-NEXT:    .cfi_escape 0x10, 0x10, 0x0c, 0x90, 0x80, 0x14, 0x9d, 0x20, 0x00, 0x90, 0x80, 0x14, 0x9d, 0x20, 0x20 ;
; CHECK-NEXT:    v_writelane_b32 v0, exec_lo, 2
; CHECK-NEXT:    v_writelane_b32 v0, exec_hi, 3
; CHECK-NEXT:    .cfi_escape 0x10, 0x11, 0x0c, 0x90, 0x80, 0x14, 0x9d, 0x20, 0x40, 0x90, 0x80, 0x14, 0x9d, 0x20, 0x60 ;
; CHECK-NEXT:  .Ltmp0:
; CHECK-NEXT:    .loc 0 7 3 prologue_end ; file.cpp:7:3
; CHECK-NEXT:    s_or_saveexec_b64 s[4:5], -1
; CHECK-NEXT:    buffer_load_dword v0, off, s[0:3], s32 ; 4-byte Folded Reload
; CHECK-NEXT:    s_mov_b64 exec, s[4:5]
; CHECK-NEXT:    s_waitcnt vmcnt(0)
; CHECK-NEXT:    s_setpc_b64 s[30:31]
; CHECK-NEXT:  .Ltmp1:

; DWARFLINE:		file format elf64-amdgpu
; DWARFLINE:		.debug_line contents
; DWARFLINE:		Address            Line   Column File   ISA Discriminator Flags
; DWARFLINE:		0x0000000000000000      5      0      0   0             0  is_stmt
; DWARFLINE-NEXT:	0x0000000000000034      7      3      0   0             0  is_stmt prologue_end
; DWARFLINE-NEXT:	0x000000000000004c      7      3      0   0             0  is_stmt end_sequence

entry:
  ret void, !dbg !7
}

attributes #0 = { nounwind }

!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!4, !5}

!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_11, file: !1, isOptimized: false, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
!1 = !DIFile(filename: "file.cpp", directory: "dir")
!2 = !DISubroutineType(types: !3)
!3 = !{null}
!4 = !{i32 7, !"Dwarf Version", i32 5}
!5 = !{i32 2, !"Debug Info Version", i32 3}
!6 = distinct !DISubprogram(name: "base_case", linkageName: "_Z9base_casev", scope: !1, file: !1, line: 5, type: !2, scopeLine: 5, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0)
!7 = !DILocation(line: 7, column: 3, scope: !6)