/* Generated automatically by the program `genoutput' from the machine description file `md'. */ #include "config.h" #include "system.h" #include "coretypes.h" #include "tm.h" #include "flags.h" #include "ggc.h" #include "hash-set.h" #include "machmode.h" #include "vec.h" #include "double-int.h" #include "input.h" #include "alias.h" #include "symtab.h" #include "wide-int.h" #include "inchash.h" #include "tree.h" #include "varasm.h" #include "stor-layout.h" #include "calls.h" #include "rtl.h" #include "hashtab.h" #include "hard-reg-set.h" #include "function.h" #include "statistics.h" #include "real.h" #include "fixed-value.h" #include "insn-config.h" #include "expmed.h" #include "dojump.h" #include "explow.h" #include "emit-rtl.h" #include "stmt.h" #include "expr.h" #include "insn-codes.h" #include "tm_p.h" #include "regs.h" #include "conditions.h" #include "insn-attr.h" #include "recog.h" #include "diagnostic-core.h" #include "output.h" #include "target.h" #include "tm-constrs.h" #include "predict.h" static const char * const output_1[] = { "test{b}\t%0, %0", "cmp{b}\t{%1, %0|%0, %1}", }; static const char * const output_2[] = { "test{w}\t%0, %0", "cmp{w}\t{%1, %0|%0, %1}", }; static const char * const output_3[] = { "test{l}\t%0, %0", "cmp{l}\t{%1, %0|%0, %1}", }; static const char * const output_4[] = { "test{q}\t%0, %0", "cmp{q}\t{%1, %0|%0, %1}", }; static const char * output_17 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1431 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_18 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1431 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_19 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1431 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_23 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1464 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_25 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1497 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_26 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1497 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_29 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1530 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, true); } static const char * output_30 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1530 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, true); } static const char * output_31 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1530 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, true); } static const char * output_35 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1566 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_36 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1566 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_37 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1566 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_38 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1566 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_39 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1566 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_40 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1566 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, false, false); } static const char * output_48 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1618 "../../gcc-5.1.0/gcc/config/i386/i386.md" { #ifndef HAVE_AS_IX86_SAHF if (TARGET_64BIT) return ASM_BYTE "0x9e"; else #endif return "sahf"; } } static const char * output_49 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1646 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPmode == CCFPUmode); } static const char * output_50 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1646 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPmode == CCFPUmode); } static const char * output_51 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1646 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPUmode == CCFPUmode); } static const char * output_52 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1646 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPUmode == CCFPUmode); } static const char * output_53 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1673 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPmode == CCFPUmode); } static const char * output_54 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1673 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPmode == CCFPUmode); } static const char * output_55 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1673 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPUmode == CCFPUmode); } static const char * output_56 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1673 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPUmode == CCFPUmode); } static const char * output_57 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1694 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPmode == CCFPUmode); } static const char * output_58 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1694 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPmode == CCFPUmode); } static const char * output_59 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1694 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPmode == CCFPUmode); } static const char * output_60 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1694 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPUmode == CCFPUmode); } static const char * output_61 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1694 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPUmode == CCFPUmode); } static const char * output_62 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1694 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fp_compare (insn, operands, true, CCFPUmode == CCFPUmode); } static const char * output_79 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1965 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: if (misaligned_operand (operands[0], XImode) || misaligned_operand (operands[1], XImode)) return "vmovdqu32\t{%1, %0|%0, %1}"; else return "vmovdqa32\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } } } static const char * output_80 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1989 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_SSELOG1: return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: if (misaligned_operand (operands[0], OImode) || misaligned_operand (operands[1], OImode)) { if (get_attr_mode (insn) == MODE_V8SF) return "vmovups\t{%1, %0|%0, %1}"; else if (get_attr_mode (insn) == MODE_XI) return "vmovdqu32\t{%1, %0|%0, %1}"; else return "vmovdqu\t{%1, %0|%0, %1}"; } else { if (get_attr_mode (insn) == MODE_V8SF) return "vmovaps\t{%1, %0|%0, %1}"; else if (get_attr_mode (insn) == MODE_XI) return "vmovdqa32\t{%1, %0|%0, %1}"; else return "vmovdqa\t{%1, %0|%0, %1}"; } default: gcc_unreachable (); } } } static const char * output_81 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2039 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_MULTI: return "#"; case TYPE_SSELOG1: return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: /* TDmode values are passed as TImode on the stack. Moving them to stack may result in unaligned memory access. */ if (misaligned_operand (operands[0], TImode) || misaligned_operand (operands[1], TImode)) { if (get_attr_mode (insn) == MODE_V4SF) return "%vmovups\t{%1, %0|%0, %1}"; else if (get_attr_mode (insn) == MODE_XI) return "vmovdqu32\t{%1, %0|%0, %1}"; else return "%vmovdqu\t{%1, %0|%0, %1}"; } else { if (get_attr_mode (insn) == MODE_V4SF) return "%vmovaps\t{%1, %0|%0, %1}"; else if (get_attr_mode (insn) == MODE_XI) return "vmovdqa32\t{%1, %0|%0, %1}"; else return "%vmovdqa\t{%1, %0|%0, %1}"; } default: gcc_unreachable (); } } } static const char * output_82 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2114 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_MSKMOV: return "kmovq\t{%1, %0|%0, %1}"; case TYPE_MULTI: return "#"; case TYPE_MMX: return "pxor\t%0, %0"; case TYPE_MMXMOV: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "movd\t{%1, %0|%0, %1}"; return "movq\t{%1, %0|%0, %1}"; case TYPE_SSELOG1: if (GENERAL_REG_P (operands[0])) return "%vpextrq\t{$0, %1, %0|%0, %1, 0}"; return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: switch (get_attr_mode (insn)) { case MODE_DI: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; return "%vmovq\t{%1, %0|%0, %1}"; case MODE_TI: return "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; case MODE_V2SF: gcc_assert (!TARGET_AVX); return "movlps\t{%1, %0|%0, %1}"; case MODE_V4SF: return "%vmovaps\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } case TYPE_SSECVT: if (SSE_REG_P (operands[0])) return "movq2dq\t{%1, %0|%0, %1}"; else return "movdq2q\t{%1, %0|%0, %1}"; case TYPE_LEA: return "lea{q}\t{%E1, %0|%0, %E1}"; case TYPE_IMOV: gcc_assert (!flag_pic || LEGITIMATE_PIC_OPERAND_P (operands[1])); if (get_attr_mode (insn) == MODE_SI) return "mov{l}\t{%k1, %k0|%k0, %k1}"; else if (which_alternative == 4) return "movabs{q}\t{%1, %0|%0, %1}"; else if (ix86_use_lea_for_mov (insn, operands)) return "lea{q}\t{%E1, %0|%0, %E1}"; else return "mov{q}\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } } } static const char * output_83 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2288 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_SSELOG1: if (GENERAL_REG_P (operands[0])) return "%vpextrd\t{$0, %1, %0|%0, %1, 0}"; return standard_sse_constant_opcode (insn, operands[1]); case TYPE_MSKMOV: return "kmovd\t{%1, %0|%0, %1}"; case TYPE_SSEMOV: switch (get_attr_mode (insn)) { case MODE_SI: return "%vmovd\t{%1, %0|%0, %1}"; case MODE_TI: return "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: return "vmovdqa32\t{%g1, %g0|%g0, %g1}"; case MODE_V4SF: return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_SF: gcc_assert (!TARGET_AVX); return "movss\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } case TYPE_MMX: return "pxor\t%0, %0"; case TYPE_MMXMOV: switch (get_attr_mode (insn)) { case MODE_DI: return "movq\t{%1, %0|%0, %1}"; case MODE_SI: return "movd\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } case TYPE_LEA: return "lea{l}\t{%E1, %0|%0, %E1}"; case TYPE_IMOV: gcc_assert (!flag_pic || LEGITIMATE_PIC_OPERAND_P (operands[1])); if (ix86_use_lea_for_mov (insn, operands)) return "lea{l}\t{%E1, %0|%0, %E1}"; else return "mov{l}\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } } } static const char * const output_84[] = { "kmovw\t{%k1, %0|%0, %k1}", "kmovw\t{%1, %0|%0, %1}", }; static const char * output_85 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2429 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_IMOVX: /* movzwl is faster than movw on p2 due to partial word stalls, though not as fast as an aligned movl. */ return "movz{wl|x}\t{%1, %k0|%k0, %1}"; case TYPE_MSKMOV: switch (which_alternative) { case 4: return "kmovw\t{%k1, %0|%0, %k1}"; case 5: return "kmovw\t{%1, %0|%0, %1}"; case 6: return "kmovw\t{%1, %k0|%k0, %1}"; default: gcc_unreachable (); } default: if (get_attr_mode (insn) == MODE_SI) return "mov{l}\t{%k1, %k0|%k0, %k1}"; else return "mov{w}\t{%1, %0|%0, %1}"; } } } static const char * output_86 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2504 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_IMOVX: gcc_assert (ANY_QI_REG_P (operands[1]) || MEM_P (operands[1])); return "movz{bl|x}\t{%1, %k0|%k0, %1}"; case TYPE_MSKMOV: switch (which_alternative) { case 7: return TARGET_AVX512DQ ? "kmovb\t{%k1, %0|%0, %k1}" : "kmovw\t{%k1, %0|%0, %k1}"; case 8: return TARGET_AVX512DQ ? "kmovb\t{%1, %0|%0, %1}" : "kmovw\t{%1, %0|%0, %1}"; case 9: return TARGET_AVX512DQ ? "kmovb\t{%1, %k0|%k0, %1}" : "kmovw\t{%1, %k0|%k0, %1}"; case 10: case 11: gcc_assert (TARGET_AVX512DQ); return "kmovb\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: if (get_attr_mode (insn) == MODE_SI) return "mov{l}\t{%k1, %k0|%k0, %k1}"; else return "mov{b}\t{%1, %0|%0, %1}"; } } } static const char * const output_87[] = { "movabs{b}\t{%1, %P0|[%P0], %1}", "mov{b}\t{%1, %a0|BYTE PTR %a0, %1}", }; static const char * const output_88[] = { "movabs{w}\t{%1, %P0|[%P0], %1}", "mov{w}\t{%1, %a0|WORD PTR %a0, %1}", }; static const char * const output_89[] = { "movabs{l}\t{%1, %P0|[%P0], %1}", "mov{l}\t{%1, %a0|DWORD PTR %a0, %1}", }; static const char * const output_90[] = { "movabs{q}\t{%1, %P0|[%P0], %1}", "mov{q}\t{%1, %a0|QWORD PTR %a0, %1}", }; static const char * const output_91[] = { "movabs{b}\t{%P1, %0|%0, [%P1]}", "mov{b}\t{%a1, %0|%0, BYTE PTR %a1}", }; static const char * const output_92[] = { "movabs{w}\t{%P1, %0|%0, [%P1]}", "mov{w}\t{%a1, %0|%0, WORD PTR %a1}", }; static const char * const output_93[] = { "movabs{l}\t{%P1, %0|%0, [%P1]}", "mov{l}\t{%a1, %0|%0, DWORD PTR %a1}", }; static const char * const output_94[] = { "movabs{q}\t{%P1, %0|%0, [%P1]}", "mov{q}\t{%a1, %0|%0, QWORD PTR %a1}", }; static const char * output_106 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2704 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_IMOVX: return "movs{bl|x}\t{%h1, %k0|%k0, %h1}"; default: return "mov{b}\t{%h1, %0|%0, %h1}"; } } } static const char * output_108 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2742 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_IMOVX: return "movz{bl|x}\t{%h1, %k0|%k0, %h1}"; default: return "mov{b}\t{%h1, %0|%0, %h1}"; } } } static const char * output_109 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2769 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (CONST_INT_P (operands[1])) operands[1] = simplify_gen_subreg (QImode, operands[1], SImode, 0); return "mov{b}\t{%b1, %h0|%h0, %b1}"; } } static const char * output_111 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2795 "../../gcc-5.1.0/gcc/config/i386/i386.md" { /* This insn should be already split before reg-stack. */ gcc_unreachable (); } } static const char * output_112 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2820 "../../gcc-5.1.0/gcc/config/i386/i386.md" { /* This insn should be already split before reg-stack. */ gcc_unreachable (); } } static const char * output_113 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2855 "../../gcc-5.1.0/gcc/config/i386/i386.md" { /* This insn should be already split before reg-stack. */ gcc_unreachable (); } } static const char * output_114 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2901 "../../gcc-5.1.0/gcc/config/i386/i386.md" { /* Anything else should be already split before reg-stack. */ gcc_assert (which_alternative == 1); return "push{l}\t%1"; } } static const char * output_115 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2979 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_SSELOG1: return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: /* Handle misaligned load/store since we don't have movmisaligntf pattern. */ if (misaligned_operand (operands[0], TFmode) || misaligned_operand (operands[1], TFmode)) { if (get_attr_mode (insn) == MODE_V4SF) return "%vmovups\t{%1, %0|%0, %1}"; else return "%vmovdqu\t{%1, %0|%0, %1}"; } else { if (get_attr_mode (insn) == MODE_V4SF) return "%vmovaps\t{%1, %0|%0, %1}"; else return "%vmovdqa\t{%1, %0|%0, %1}"; } case TYPE_MULTI: return "#"; default: gcc_unreachable (); } } } static const char * output_116 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3049 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_FMOV: if (which_alternative == 2) return standard_80387_constant_opcode (operands[1]); return output_387_reg_move (insn, operands); case TYPE_MULTI: return "#"; default: gcc_unreachable (); } } } static const char * output_117 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3106 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_FMOV: if (which_alternative == 2) return standard_80387_constant_opcode (operands[1]); return output_387_reg_move (insn, operands); case TYPE_MULTI: return "#"; case TYPE_IMOV: if (get_attr_mode (insn) == MODE_SI) return "mov{l}\t{%1, %k0|%k0, %1}"; else if (which_alternative == 11) return "movabs{q}\t{%1, %0|%0, %1}"; else return "mov{q}\t{%1, %0|%0, %1}"; case TYPE_SSELOG1: return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: switch (get_attr_mode (insn)) { case MODE_DF: if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1])) return "vmovsd\t{%1, %0, %0|%0, %0, %1}"; return "%vmovsd\t{%1, %0|%0, %1}"; case MODE_V4SF: return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_V2DF: return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_V2SF: gcc_assert (!TARGET_AVX); return "movlps\t{%1, %0|%0, %1}"; case MODE_V1DF: gcc_assert (!TARGET_AVX); return "movlpd\t{%1, %0|%0, %1}"; case MODE_DI: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; return "%vmovq\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_118 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3287 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_FMOV: if (which_alternative == 2) return standard_80387_constant_opcode (operands[1]); return output_387_reg_move (insn, operands); case TYPE_IMOV: return "mov{l}\t{%1, %0|%0, %1}"; case TYPE_SSELOG1: return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: switch (get_attr_mode (insn)) { case MODE_SF: if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1])) return "vmovss\t{%1, %0, %0|%0, %0, %1}"; return "%vmovss\t{%1, %0|%0, %1}"; case MODE_V16SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4SF: return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_SI: return "%vmovd\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } case TYPE_MMXMOV: switch (get_attr_mode (insn)) { case MODE_DI: return "movq\t{%1, %0|%0, %1}"; case MODE_SI: return "movd\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_119 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3471 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (STACK_TOP_P (operands[0])) return "fxch\t%1"; else return "fxch\t%0"; } } static const char * output_120 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3486 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (STACK_TOP_P (operands[0])) return "fxch\t%1"; else return "fxch\t%0"; } } static const char * output_121 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3486 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (STACK_TOP_P (operands[0])) return "fxch\t%1"; else return "fxch\t%0"; } } static const char * output_122 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3508 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_IMOVX: if (ix86_use_lea_for_mov (insn, operands)) return "lea{l}\t{%E1, %k0|%k0, %E1}"; else return "mov{l}\t{%1, %k0|%k0, %1}"; case TYPE_MULTI: return "#"; case TYPE_MMXMOV: return "movd\t{%1, %0|%0, %1}"; case TYPE_SSELOG1: return "%vpextrd\t{$0, %1, %k0|%k0, %1, 0}"; case TYPE_SSEMOV: if (GENERAL_REG_P (operands[0])) return "%vmovd\t{%1, %k0|%k0, %1}"; return "%vmovd\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } } } static const char * output_130 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3858 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_prefix_0f (insn)) { case 0: return "{cwtl|cwde}"; default: return "movs{wl|x}\t{%1, %0|%0, %1}"; } } } static const char * output_132 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3929 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_prefix_0f (insn)) { case 0: return "{cbtw|cbw}"; default: return "movs{bw|x}\t{%1, %0|%0, %1}"; } } } static const char * output_133 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4055 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (which_alternative) { case 0: case 1: return output_387_reg_move (insn, operands); case 2: return "%vcvtss2sd\t{%1, %d0|%d0, %1}"; default: gcc_unreachable (); } } } static const char * output_135 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4086 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_136 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4115 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_137 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4115 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_138 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4213 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (which_alternative) { case 0: return output_387_reg_move (insn, operands); case 1: return "%vcvtsd2ss\t{%1, %d0|%d0, %1}"; default: gcc_unreachable (); } } } static const char * output_140 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4245 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_141 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4255 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (which_alternative) { case 0: return output_387_reg_move (insn, operands); case 1: return "%vcvtsd2ss\t{%1, %d0|%d0, %1}"; default: return "#"; } } } static const char * output_142 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4279 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (which_alternative) { case 0: return output_387_reg_move (insn, operands); default: return "#"; } } } static const char * output_143 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4300 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_144 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4341 "../../gcc-5.1.0/gcc/config/i386/i386.md" { gcc_assert (!which_alternative); return output_387_reg_move (insn, operands); } } static const char * output_145 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4355 "../../gcc-5.1.0/gcc/config/i386/i386.md" { gcc_assert (!which_alternative); return output_387_reg_move (insn, operands); } } static const char * output_146 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4369 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_147 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4369 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_148 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4378 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_149 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4378 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_157 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4610 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, true); } static const char * output_158 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4610 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, true); } static const char * output_159 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4610 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, true); } static const char * output_166 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4694 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * output_168 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4749 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * output_169 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4749 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * const output_179[] = { "fild%Z1\t%1", "%vcvtsi2ss\t{%1, %d0|%d0, %1}", "%vcvtsi2ss\t{%1, %d0|%d0, %1}", }; static const char * const output_180[] = { "fild%Z1\t%1", "%vcvtsi2sd\t{%1, %d0|%d0, %1}", "%vcvtsi2sd\t{%1, %d0|%d0, %1}", }; static const char * output_191 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5151 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (SImode_address_operand (operands[1], VOIDmode)) { gcc_assert (TARGET_64BIT); return "lea{l}\t{%E1, %k0|%k0, %E1}"; } else return "lea{l}\t{%E1, %0|%0, %E1}"; } } static const char * output_197 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5258 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_LEA: return "#"; case TYPE_INCDEC: gcc_assert (rtx_equal_p (operands[0], operands[1])); if (operands[2] == const1_rtx) return "inc{l}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{l}\t%0"; } default: /* For most processors, ADD is faster than LEA. This alternative was added to use ADD as much as possible. */ if (which_alternative == 2) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], SImode)) return "sub{l}\t{%2, %0|%0, %2}"; return "add{l}\t{%2, %0|%0, %2}"; } } } static const char * output_198 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5258 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_LEA: return "#"; case TYPE_INCDEC: gcc_assert (rtx_equal_p (operands[0], operands[1])); if (operands[2] == const1_rtx) return "inc{q}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{q}\t%0"; } default: /* For most processors, ADD is faster than LEA. This alternative was added to use ADD as much as possible. */ if (which_alternative == 2) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], DImode)) return "sub{q}\t{%2, %0|%0, %2}"; return "add{q}\t{%2, %0|%0, %2}"; } } } static const char * output_199 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5361 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_LEA: return "#"; case TYPE_INCDEC: gcc_assert (rtx_equal_p (operands[0], operands[1])); if (operands[2] == const1_rtx) return "inc{w}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{w}\t%0"; } default: /* For most processors, ADD is faster than LEA. This alternative was added to use ADD as much as possible. */ if (which_alternative == 2) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], HImode)) return "sub{w}\t{%2, %0|%0, %2}"; return "add{w}\t{%2, %0|%0, %2}"; } } } static const char * output_200 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5411 "../../gcc-5.1.0/gcc/config/i386/i386.md" { bool widen = (which_alternative == 3 || which_alternative == 4); switch (get_attr_type (insn)) { case TYPE_LEA: return "#"; case TYPE_INCDEC: gcc_assert (rtx_equal_p (operands[0], operands[1])); if (operands[2] == const1_rtx) return widen ? "inc{l}\t%k0" : "inc{b}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return widen ? "dec{l}\t%k0" : "dec{b}\t%0"; } default: /* For most processors, ADD is faster than LEA. These alternatives were added to use ADD as much as possible. */ if (which_alternative == 2 || which_alternative == 4) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], QImode)) { if (widen) return "sub{l}\t{%2, %k0|%k0, %2}"; else return "sub{b}\t{%2, %0|%0, %2}"; } if (widen) return "add{l}\t{%k2, %k0|%k0, %k2}"; else return "add{b}\t{%2, %0|%0, %2}"; } } } static const char * output_201 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5470 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[1] == const1_rtx) return "inc{b}\t%0"; else { gcc_assert (operands[1] == constm1_rtx); return "dec{b}\t%0"; } default: if (x86_maybe_negate_const_int (&operands[1], QImode)) return "sub{b}\t{%1, %0|%0, %1}"; return "add{b}\t{%1, %0|%0, %1}"; } } } static const char * output_202 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5573 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{b}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{b}\t%0"; } default: if (which_alternative == 2) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], QImode)) return "sub{b}\t{%2, %0|%0, %2}"; return "add{b}\t{%2, %0|%0, %2}"; } } } static const char * output_203 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5573 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{w}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{w}\t%0"; } default: if (which_alternative == 2) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], HImode)) return "sub{w}\t{%2, %0|%0, %2}"; return "add{w}\t{%2, %0|%0, %2}"; } } } static const char * output_204 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5573 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{l}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{l}\t%0"; } default: if (which_alternative == 2) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], SImode)) return "sub{l}\t{%2, %0|%0, %2}"; return "add{l}\t{%2, %0|%0, %2}"; } } } static const char * output_205 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5573 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{q}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{q}\t%0"; } default: if (which_alternative == 2) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], DImode)) return "sub{q}\t{%2, %0|%0, %2}"; return "add{q}\t{%2, %0|%0, %2}"; } } } static const char * output_206 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5659 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{b}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{b}\t%0"; } default: if (which_alternative == 1) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], QImode)) return "sub{b}\t{%2, %0|%0, %2}"; return "add{b}\t{%2, %0|%0, %2}"; } } } static const char * output_207 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5659 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{w}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{w}\t%0"; } default: if (which_alternative == 1) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], HImode)) return "sub{w}\t{%2, %0|%0, %2}"; return "add{w}\t{%2, %0|%0, %2}"; } } } static const char * output_208 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5659 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{l}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{l}\t%0"; } default: if (which_alternative == 1) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], SImode)) return "sub{l}\t{%2, %0|%0, %2}"; return "add{l}\t{%2, %0|%0, %2}"; } } } static const char * output_209 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5659 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{q}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{q}\t%0"; } default: if (which_alternative == 1) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], DImode)) return "sub{q}\t{%2, %0|%0, %2}"; return "add{q}\t{%2, %0|%0, %2}"; } } } static const char * output_210 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5795 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == constm1_rtx) return "inc{b}\t%0"; else { gcc_assert (operands[2] == const1_rtx); return "dec{b}\t%0"; } default: if (x86_maybe_negate_const_int (&operands[2], QImode)) return "add{b}\t{%2, %0|%0, %2}"; return "sub{b}\t{%2, %0|%0, %2}"; } } } static const char * output_211 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5795 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == constm1_rtx) return "inc{w}\t%0"; else { gcc_assert (operands[2] == const1_rtx); return "dec{w}\t%0"; } default: if (x86_maybe_negate_const_int (&operands[2], HImode)) return "add{w}\t{%2, %0|%0, %2}"; return "sub{w}\t{%2, %0|%0, %2}"; } } } static const char * output_212 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5795 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == constm1_rtx) return "inc{l}\t%0"; else { gcc_assert (operands[2] == const1_rtx); return "dec{l}\t%0"; } default: if (x86_maybe_negate_const_int (&operands[2], SImode)) return "add{l}\t{%2, %0|%0, %2}"; return "sub{l}\t{%2, %0|%0, %2}"; } } } static const char * output_213 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5835 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{b}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{b}\t%0"; } default: if (which_alternative == 1) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], QImode)) return "sub{b}\t{%2, %0|%0, %2}"; return "add{b}\t{%2, %0|%0, %2}"; } } } static const char * output_214 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5835 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{w}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{w}\t%0"; } default: if (which_alternative == 1) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], HImode)) return "sub{w}\t{%2, %0|%0, %2}"; return "add{w}\t{%2, %0|%0, %2}"; } } } static const char * output_215 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5835 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{l}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{l}\t%0"; } default: if (which_alternative == 1) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], SImode)) return "sub{l}\t{%2, %0|%0, %2}"; return "add{l}\t{%2, %0|%0, %2}"; } } } static const char * output_216 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5835 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{q}\t%0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{q}\t%0"; } default: if (which_alternative == 1) std::swap (operands[1], operands[2]); gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], DImode)) return "sub{q}\t{%2, %0|%0, %2}"; return "add{q}\t{%2, %0|%0, %2}"; } } } static const char * output_217 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 5881 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) return "inc{b}\t%h0"; else { gcc_assert (operands[2] == constm1_rtx); return "dec{b}\t%h0"; } default: return "add{b}\t{%2, %h0|%h0, %2}"; } } } static const char * const output_272[] = { "imul{l}\t{%2, %1, %0|%0, %1, %2}", "imul{l}\t{%2, %1, %0|%0, %1, %2}", "imul{l}\t{%2, %0|%0, %2}", }; static const char * const output_273[] = { "imul{w}\t{%2, %1, %0|%0, %1, %2}", "imul{w}\t{%2, %1, %0|%0, %1, %2}", "imul{w}\t{%2, %0|%0, %2}", }; static const char * const output_275[] = { "imul{l}\t{%2, %1, %0|%0, %1, %2}", "imul{l}\t{%2, %0|%0, %2}", }; static const char * const output_276[] = { "imul{b}\t{%2, %1, %0|%0, %1, %2}", "imul{b}\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_277[] = { "imul{w}\t{%2, %1, %0|%0, %1, %2}", "imul{w}\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_278[] = { "imul{l}\t{%2, %1, %0|%0, %1, %2}", "imul{l}\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_283[] = { "#", "mul{l}\t%2", }; static const char * output_302 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7505 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (which_alternative == 3) { if (CONST_INT_P (operands[1]) && INTVAL (operands[1]) < 0) operands[1] = GEN_INT (INTVAL (operands[1]) & 0xff); return "test{l}\t{%1, %k0|%k0, %1}"; } return "test{b}\t{%1, %0|%0, %1}"; } } static const char * output_311 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && QImode == QImode) return "kandw\t{%2, %1, %0|%0, %1, %2}"; else return "kandb\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_312 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && QImode == QImode) return "korw\t{%2, %1, %0|%0, %1, %2}"; else return "korb\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_313 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && QImode == QImode) return "kxorw\t{%2, %1, %0|%0, %1, %2}"; else return "kxorb\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_314 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && HImode == QImode) return "kandw\t{%2, %1, %0|%0, %1, %2}"; else return "kandw\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_315 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && HImode == QImode) return "korw\t{%2, %1, %0|%0, %1, %2}"; else return "korw\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_316 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && HImode == QImode) return "kxorw\t{%2, %1, %0|%0, %1, %2}"; else return "kxorw\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_317 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && SImode == QImode) return "kandw\t{%2, %1, %0|%0, %1, %2}"; else return "kandd\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_318 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && SImode == QImode) return "korw\t{%2, %1, %0|%0, %1, %2}"; else return "kord\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_319 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && SImode == QImode) return "kxorw\t{%2, %1, %0|%0, %1, %2}"; else return "kxord\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_320 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && DImode == QImode) return "kandw\t{%2, %1, %0|%0, %1, %2}"; else return "kandq\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_321 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && DImode == QImode) return "korw\t{%2, %1, %0|%0, %1, %2}"; else return "korq\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_322 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7738 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (!TARGET_AVX512DQ && DImode == QImode) return "kxorw\t{%2, %1, %0|%0, %1, %2}"; else return "kxorq\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_323 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7839 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_IMOVX: return "#"; case TYPE_MSKLOG: return "kandd\t{%2, %1, %0|%0, %1, %2}"; default: gcc_assert (rtx_equal_p (operands[0], operands[1])); return "and{l}\t{%2, %0|%0, %2}"; } } } static const char * output_324 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7882 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_IMOVX: return "#"; case TYPE_MSKLOG: return "kandw\t{%2, %1, %0|%0, %1, %2}"; default: gcc_assert (rtx_equal_p (operands[0], operands[1])); return "and{w}\t{%2, %0|%0, %2}"; } } } static const char * output_325 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7913 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (which_alternative) { case 0: case 1: return "and{b}\t{%2, %0|%0, %2}"; case 2: return "and{l}\t{%k2, %k0|%k0, %k2}"; case 3: return TARGET_AVX512DQ ? "kandb\t{%2, %1, %0|%0, %1, %2}" : "kandw\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_327 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7950 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (which_alternative) { case 0: return "andn\t{%k2, %k1, %k0|%k0, %k1, %k2}"; case 1: return "#"; case 2: if (TARGET_AVX512DQ && QImode == QImode) return "kandnb\t{%2, %1, %0|%0, %1, %2}"; else return "kandnw\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_328 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7950 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (which_alternative) { case 0: return "andn\t{%k2, %k1, %k0|%k0, %k1, %k2}"; case 1: return "#"; case 2: if (TARGET_AVX512DQ && HImode == QImode) return "kandnb\t{%2, %1, %0|%0, %1, %2}"; else return "kandnw\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_329 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 8123 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (which_alternative == 2) { if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) < 0) operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff); return "and{l}\t{%2, %k0|%k0, %2}"; } return "and{b}\t{%2, %0|%0, %2}"; } } static const char * const output_338[] = { "or{l}\t{%2, %0|%0, %2}", "or{l}\t{%2, %0|%0, %2}", "kord\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_339[] = { "xor{l}\t{%2, %0|%0, %2}", "xor{l}\t{%2, %0|%0, %2}", "kxord\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_340[] = { "or{q}\t{%2, %0|%0, %2}", "or{q}\t{%2, %0|%0, %2}", "korq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_341[] = { "xor{q}\t{%2, %0|%0, %2}", "xor{q}\t{%2, %0|%0, %2}", "kxorq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_342[] = { "or{w}\t{%2, %0|%0, %2}", "or{w}\t{%2, %0|%0, %2}", "korw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_343[] = { "xor{w}\t{%2, %0|%0, %2}", "xor{w}\t{%2, %0|%0, %2}", "kxorw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_344[] = { "or{b}\t{%2, %0|%0, %2}", "or{b}\t{%2, %0|%0, %2}", "or{l}\t{%k2, %k0|%k0, %k2}", "korw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_345[] = { "xor{b}\t{%2, %0|%0, %2}", "xor{b}\t{%2, %0|%0, %2}", "xor{l}\t{%k2, %k0|%k0, %k2}", "kxorw\t{%2, %1, %0|%0, %1, %2}", }; static const char * output_356 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 8427 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (which_alternative == 1 && QImode == QImode && TARGET_AVX512DQ) return "kxnorb\t{%2, %1, %0|%0, %1, %2}"; return "kxnorw\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_357 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 8427 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (which_alternative == 1 && HImode == QImode && TARGET_AVX512DQ) return "kxnorb\t{%2, %1, %0|%0, %1, %2}"; return "kxnorw\t{%2, %1, %0|%0, %1, %2}"; } } static const char * const output_358[] = { "#", "kxnord\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_359[] = { "#", "kxnorq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_422[] = { "not{l}\t%0", "knotd\t{%1, %0|%0, %1}", }; static const char * const output_423[] = { "not{q}\t%0", "knotq\t{%1, %0|%0, %1}", }; static const char * const output_424[] = { "not{w}\t%0", "knotw\t{%1, %0|%0, %1}", }; static const char * output_425 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9152 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (which_alternative) { case 0: return "not{b}\t%0"; case 1: return "not{l}\t%k0"; case 2: if (TARGET_AVX512DQ) return "knotb\t{%1, %0|%0, %1}"; return "knotw\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } } } static const char * output_432 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9391 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return "sal{l}\t{%b2, %0|%0, %b2}"; } } static const char * output_433 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9391 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return "sal{q}\t{%b2, %0|%0, %b2}"; } } static const char * output_435 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9412 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_LEA: case TYPE_ISHIFTX: return "#"; case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); gcc_assert (rtx_equal_p (operands[0], operands[1])); return "add{l}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{l}\t%0"; else return "sal{l}\t{%2, %0|%0, %2}"; } } } static const char * output_436 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9412 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_LEA: case TYPE_ISHIFTX: return "#"; case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); gcc_assert (rtx_equal_p (operands[0], operands[1])); return "add{q}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{q}\t%0"; else return "sal{q}\t{%2, %0|%0, %2}"; } } } static const char * output_437 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9542 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_LEA: return "#"; case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); return "add{w}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{w}\t%0"; else return "sal{w}\t{%2, %0|%0, %2}"; } } } static const char * output_438 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9587 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_LEA: return "#"; case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); if (REG_P (operands[1]) && !ANY_QI_REG_P (operands[1])) return "add{l}\t%k0, %k0"; else return "add{b}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) { if (get_attr_mode (insn) == MODE_SI) return "sal{l}\t%k0"; else return "sal{b}\t%0"; } else { if (get_attr_mode (insn) == MODE_SI) return "sal{l}\t{%2, %k0|%k0, %2}"; else return "sal{b}\t{%2, %0|%0, %2}"; } } } } static const char * output_439 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9648 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ALU: gcc_assert (operands[1] == const1_rtx); return "add{b}\t%0, %0"; default: if (operands[1] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{b}\t%0"; else return "sal{b}\t{%1, %0|%0, %1}"; } } } static const char * output_440 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9744 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); return "add{b}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{b}\t%0"; else return "sal{b}\t{%2, %0|%0, %2}"; } } } static const char * output_441 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9744 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); return "add{w}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{w}\t%0"; else return "sal{w}\t{%2, %0|%0, %2}"; } } } static const char * output_442 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9744 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); return "add{l}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{l}\t%0"; else return "sal{l}\t{%2, %0|%0, %2}"; } } } static const char * output_443 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9744 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); return "add{q}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{q}\t%0"; else return "sal{q}\t{%2, %0|%0, %2}"; } } } static const char * output_444 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9838 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); return "add{b}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{b}\t%0"; else return "sal{b}\t{%2, %0|%0, %2}"; } } } static const char * output_445 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9838 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); return "add{w}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{w}\t%0"; else return "sal{w}\t{%2, %0|%0, %2}"; } } } static const char * output_446 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9838 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); return "add{l}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{l}\t%0"; else return "sal{l}\t{%2, %0|%0, %2}"; } } } static const char * output_447 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9838 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); return "add{q}\t%0, %0"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sal{q}\t%0"; else return "sal{q}\t{%2, %0|%0, %2}"; } } } static const char * output_448 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9893 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return "shr{l}\t{%b2, %0|%0, %b2}"; } } static const char * output_449 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9893 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return "sar{l}\t{%b2, %0|%0, %b2}"; } } static const char * output_450 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9893 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return "shr{q}\t{%b2, %0|%0, %b2}"; } } static const char * output_451 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 9893 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return "sar{q}\t{%b2, %0|%0, %b2}"; } } static const char * const output_455[] = { "{cltd|cdq}", "sar{l}\t{%2, %0|%0, %2}", }; static const char * output_458 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10057 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ISHIFTX: return "#"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{l}\t%0"; else return "shr{l}\t{%2, %0|%0, %2}"; } } } static const char * output_459 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10057 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ISHIFTX: return "#"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{l}\t%0"; else return "sar{l}\t{%2, %0|%0, %2}"; } } } static const char * output_460 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10057 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ISHIFTX: return "#"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{q}\t%0"; else return "shr{q}\t{%2, %0|%0, %2}"; } } } static const char * output_461 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10057 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ISHIFTX: return "#"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{q}\t%0"; else return "sar{q}\t{%2, %0|%0, %2}"; } } } static const char * output_462 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10154 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{b}\t%0"; else return "shr{b}\t{%2, %0|%0, %2}"; } } static const char * output_463 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10154 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{b}\t%0"; else return "sar{b}\t{%2, %0|%0, %2}"; } } static const char * output_464 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10154 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{w}\t%0"; else return "shr{w}\t{%2, %0|%0, %2}"; } } static const char * output_465 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10154 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{w}\t%0"; else return "sar{w}\t{%2, %0|%0, %2}"; } } static const char * output_466 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10180 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[1] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{b}\t%0"; else return "shr{b}\t{%1, %0|%0, %1}"; } } static const char * output_467 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10180 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[1] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{b}\t%0"; else return "sar{b}\t{%1, %0|%0, %1}"; } } static const char * output_468 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10215 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{b}\t%0"; else return "shr{b}\t{%2, %0|%0, %2}"; } } static const char * output_469 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10215 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{b}\t%0"; else return "sar{b}\t{%2, %0|%0, %2}"; } } static const char * output_470 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10215 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{w}\t%0"; else return "shr{w}\t{%2, %0|%0, %2}"; } } static const char * output_471 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10215 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{w}\t%0"; else return "sar{w}\t{%2, %0|%0, %2}"; } } static const char * output_472 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10215 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{l}\t%0"; else return "shr{l}\t{%2, %0|%0, %2}"; } } static const char * output_473 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10215 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{l}\t%0"; else return "sar{l}\t{%2, %0|%0, %2}"; } } static const char * output_474 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10215 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{q}\t%0"; else return "shr{q}\t{%2, %0|%0, %2}"; } } static const char * output_475 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10215 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{q}\t%0"; else return "sar{q}\t{%2, %0|%0, %2}"; } } static const char * output_476 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10277 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{b}\t%0"; else return "shr{b}\t{%2, %0|%0, %2}"; } } static const char * output_477 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10277 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{b}\t%0"; else return "sar{b}\t{%2, %0|%0, %2}"; } } static const char * output_478 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10277 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{w}\t%0"; else return "shr{w}\t{%2, %0|%0, %2}"; } } static const char * output_479 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10277 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{w}\t%0"; else return "sar{w}\t{%2, %0|%0, %2}"; } } static const char * output_480 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10277 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{l}\t%0"; else return "shr{l}\t{%2, %0|%0, %2}"; } } static const char * output_481 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10277 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{l}\t%0"; else return "sar{l}\t{%2, %0|%0, %2}"; } } static const char * output_482 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10277 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "shr{q}\t%0"; else return "shr{q}\t{%2, %0|%0, %2}"; } } static const char * output_483 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10277 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "sar{q}\t%0"; else return "sar{q}\t{%2, %0|%0, %2}"; } } static const char * output_484 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10348 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return "rol{l}\t{%b2, %0|%0, %b2}"; } } static const char * output_485 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10348 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return "ror{l}\t{%b2, %0|%0, %b2}"; } } static const char * output_486 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10348 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return "rol{q}\t{%b2, %0|%0, %b2}"; } } static const char * output_487 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10348 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return "ror{q}\t{%b2, %0|%0, %b2}"; } } static const char * output_491 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10429 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ROTATEX: return "#"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "rol{l}\t%0"; else return "rol{l}\t{%2, %0|%0, %2}"; } } } static const char * output_492 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10429 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ROTATEX: return "#"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "ror{l}\t%0"; else return "ror{l}\t{%2, %0|%0, %2}"; } } } static const char * output_493 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10429 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ROTATEX: return "#"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "rol{q}\t%0"; else return "rol{q}\t{%2, %0|%0, %2}"; } } } static const char * output_494 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10429 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_ROTATEX: return "#"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "ror{q}\t%0"; else return "ror{q}\t{%2, %0|%0, %2}"; } } } static const char * output_495 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10552 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "rol{b}\t%0"; else return "rol{b}\t{%2, %0|%0, %2}"; } } static const char * output_496 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10552 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "ror{b}\t%0"; else return "ror{b}\t{%2, %0|%0, %2}"; } } static const char * output_497 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10552 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "rol{w}\t%0"; else return "rol{w}\t{%2, %0|%0, %2}"; } } static const char * output_498 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10552 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "ror{w}\t%0"; else return "ror{w}\t{%2, %0|%0, %2}"; } } static const char * output_499 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10578 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[1] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "rol{b}\t%0"; else return "rol{b}\t{%1, %0|%0, %1}"; } } static const char * output_500 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10578 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[1] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) return "ror{b}\t%0"; else return "ror{b}\t{%1, %0|%0, %1}"; } } static const char * const output_507[] = { "cmp%D3ss\t{%2, %0|%0, %2}", "vcmp%D3ss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_508[] = { "cmp%D3sd\t{%2, %0|%0, %2}", "vcmp%D3sd\t{%2, %1, %0|%0, %1, %2}", }; static const char * output_557 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11707 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[0]); } static const char * output_558 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11707 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[0]); } static const char * output_559 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11714 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[0]); } static const char * output_560 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11714 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[0]); } static const char * output_561 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11722 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[0]); } static const char * output_562 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11722 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[0]); } static const char * output_563 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11769 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[0]); } static const char * output_564 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11779 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[0]); } static const char * output_565 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11790 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[0]); } static const char * output_566 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11869 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[1]); } static const char * output_567 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11869 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[1]); } static const char * output_568 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11877 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[1]); } static const char * output_569 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11877 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[1]); } static const char * output_570 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11886 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[1]); } static const char * output_571 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11886 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[1]); } static const char * output_572 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11939 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[1]); } static const char * output_573 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11950 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[1]); } static const char * output_574 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11962 "../../gcc-5.1.0/gcc/config/i386/i386.md" return ix86_output_call_insn (insn, operands[1]); } static const char * output_579 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12135 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (ix86_bnd_prefixed_insn_p (insn)) return "%!ret"; return "rep%; ret"; } } static const char * output_583 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12178 "../../gcc-5.1.0/gcc/config/i386/i386.md" { int num = INTVAL (operands[0]); gcc_assert (IN_RANGE (num, 1, 8)); while (num--) fputs ("\tnop\n", asm_out_file); return ""; } } static const char * output_584 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12199 "../../gcc-5.1.0/gcc/config/i386/i386.md" { #ifdef ASM_OUTPUT_MAX_SKIP_PAD ASM_OUTPUT_MAX_SKIP_PAD (asm_out_file, 4, (int)INTVAL (operands[0])); #else /* It is tempting to use ASM_OUTPUT_ALIGN here, but we don't want to do that. The align insn is used to avoid 3 jump instructions in the row to improve branch prediction and the benefits hardly outweigh the cost of extra 8 nops on the average inserted by full alignment pseudo operation. */ #endif return ""; } } static const char * output_585 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12222 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_set_got (operands[0], NULL_RTX); } static const char * output_586 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12232 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_set_got (operands[0], operands[1]); } static const char * output_590 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12335 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (operands[0] == const0_rtx) return "ret"; else return "ret\t%0"; } } static const char * output_596 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12502 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (TARGET_BMI) return "tzcnt{l}\t{%1, %0|%0, %1}"; else if (TARGET_GENERIC) /* tzcnt expands to 'rep bsf' and we can use it even if !TARGET_BMI. */ return "rep%; bsf{l}\t{%1, %0|%0, %1}"; else gcc_unreachable (); } } static const char * output_597 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12521 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (TARGET_BMI) return "tzcnt{w}\t{%1, %0|%0, %1}"; else if (optimize_function_for_size_p (cfun)) ; else if (TARGET_GENERIC) /* tzcnt expands to 'rep bsf' and we can use it even if !TARGET_BMI. */ return "rep%; bsf{w}\t{%1, %0|%0, %1}"; return "bsf{w}\t{%1, %0|%0, %1}"; } } static const char * output_598 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12521 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (TARGET_BMI) return "tzcnt{l}\t{%1, %0|%0, %1}"; else if (optimize_function_for_size_p (cfun)) ; else if (TARGET_GENERIC) /* tzcnt expands to 'rep bsf' and we can use it even if !TARGET_BMI. */ return "rep%; bsf{l}\t{%1, %0|%0, %1}"; return "bsf{l}\t{%1, %0|%0, %1}"; } } static const char * output_613 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12758 "../../gcc-5.1.0/gcc/config/i386/i386.md" { operands[2] = GEN_INT (INTVAL (operands[2]) << 8 | INTVAL (operands[3])); return "bextr\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_627 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12955 "../../gcc-5.1.0/gcc/config/i386/i386.md" { #if TARGET_MACHO return "popcnt\t{%1, %0|%0, %1}"; #else return "popcnt{l}\t{%1, %0|%0, %1}"; #endif } } static const char * output_628 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12972 "../../gcc-5.1.0/gcc/config/i386/i386.md" { #if TARGET_MACHO return "popcnt\t{%1, %0|%0, %1}"; #else return "popcnt{w}\t{%1, %0|%0, %1}"; #endif } } static const char * output_629 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12972 "../../gcc-5.1.0/gcc/config/i386/i386.md" { #if TARGET_MACHO return "popcnt\t{%1, %0|%0, %1}"; #else return "popcnt{l}\t{%1, %0|%0, %1}"; #endif } } static const char * const output_630[] = { "bswap\t%0", "movbe\t{%1, %0|%0, %1}", "movbe\t{%1, %0|%0, %1}", }; static const char * const output_632[] = { "xchg{b}\t{%h0, %b0|%b0, %h0}", "rol{w}\t{$8, %0|%0, 8}", }; static const char * output_637 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13187 "../../gcc-5.1.0/gcc/config/i386/i386.md" { output_asm_insn ("lea{l}\t{%E2@tlsgd(,%1,1), %0|%0, %E2@tlsgd[%1*1]}", operands); if (TARGET_SUN_TLS) #ifdef HAVE_AS_IX86_TLSGDPLT return "call\t%a2@tlsgdplt"; #else return "call\t%p3@plt"; #endif return "call\t%P3"; } } static const char * output_638 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13282 "../../gcc-5.1.0/gcc/config/i386/i386.md" { output_asm_insn ("lea{l}\t{%&@tlsldm(%1), %0|%0, %&@tlsldm[%1]}", operands); if (TARGET_SUN_TLS) { if (HAVE_AS_IX86_TLSLDMPLT) return "call\t%&@tlsldmplt"; else return "call\t%p2@plt"; } return "call\t%P2"; } } static const char * output_651 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13627 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_652 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13627 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_653 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13648 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_654 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13648 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_655 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13665 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_656 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13665 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_657 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13680 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_658 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13680 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_660 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13719 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_661 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13719 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_662 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13741 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_663 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13741 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_664 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13762 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_665 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13762 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_666 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13762 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_667 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13762 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_668 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13783 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_669 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13783 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_670 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13783 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_671 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13783 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_672 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13803 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_673 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13821 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_674 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13840 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_675 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13857 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_676 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13871 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_677 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13889 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_678 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13889 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_679 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13908 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_680 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13908 "../../gcc-5.1.0/gcc/config/i386/i386.md" { return output_387_binary_op (insn, operands); } } static const char * output_681 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13926 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_682 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13926 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_683 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13943 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_684 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13943 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_685 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13961 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_686 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13961 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_binary_op (insn, operands); } static const char * output_687 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13981 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_688 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13981 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_387_reg_move (insn, operands); } static const char * output_727 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15319 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * output_731 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15378 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * output_732 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15378 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * output_749 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15692 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * output_750 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15692 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * output_753 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15751 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * output_754 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15751 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * output_755 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15751 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * output_756 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15751 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_fix_trunc (insn, operands, false); } static const char * const output_797[] = { "cmov%O2%C1\t{%2, %0|%0, %2}", "cmov%O2%c1\t{%3, %0|%0, %3}", }; static const char * const output_798[] = { "cmov%O2%C1\t{%2, %0|%0, %2}", "cmov%O2%c1\t{%3, %0|%0, %3}", }; static const char * const output_800[] = { "fcmov%F1\t{%2, %0|%0, %2}", "fcmov%f1\t{%3, %0|%0, %3}", }; static const char * const output_801[] = { "fcmov%F1\t{%2, %0|%0, %2}", "fcmov%f1\t{%3, %0|%0, %3}", "#", "#", "cmov%O2%C1\t{%2, %0|%0, %2}", "cmov%O2%c1\t{%3, %0|%0, %3}", }; static const char * const output_802[] = { "fcmov%F1\t{%2, %0|%0, %2}", "fcmov%f1\t{%3, %0|%0, %3}", "cmov%O2%C1\t{%2, %0|%0, %2}", "cmov%O2%c1\t{%3, %0|%0, %3}", }; static const char * const output_805[] = { "maxss\t{%2, %0|%0, %2}", "vmaxss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_806[] = { "minss\t{%2, %0|%0, %2}", "vminss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_807[] = { "maxsd\t{%2, %0|%0, %2}", "vmaxsd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_808[] = { "minsd\t{%2, %0|%0, %2}", "vminsd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_809[] = { "maxss\t{%2, %0|%0, %2}", "vmaxss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_810[] = { "minss\t{%2, %0|%0, %2}", "vminss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_811[] = { "maxsd\t{%2, %0|%0, %2}", "vmaxsd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_812[] = { "minsd\t{%2, %0|%0, %2}", "vminsd\t{%2, %1, %0|%0, %1, %2}", }; static const char * output_813 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17070 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_IMOV: return "mov{l}\t{%1, %0|%0, %1}"; case TYPE_ALU: gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], SImode)) return "sub{l}\t{%2, %0|%0, %2}"; return "add{l}\t{%2, %0|%0, %2}"; default: operands[2] = SET_SRC (XVECEXP (PATTERN (insn), 0, 0)); return "lea{l}\t{%E2, %0|%0, %E2}"; } } } static const char * output_814 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17070 "../../gcc-5.1.0/gcc/config/i386/i386.md" { switch (get_attr_type (insn)) { case TYPE_IMOV: return "mov{q}\t{%1, %0|%0, %1}"; case TYPE_ALU: gcc_assert (rtx_equal_p (operands[0], operands[1])); if (x86_maybe_negate_const_int (&operands[2], DImode)) return "sub{q}\t{%2, %0|%0, %2}"; return "add{q}\t{%2, %0|%0, %2}"; default: operands[2] = SET_SRC (XVECEXP (PATTERN (insn), 0, 0)); return "lea{q}\t{%E2, %0|%0, %E2}"; } } } static const char * output_819 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17187 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_adjust_stack_and_probe (operands[0]); } static const char * output_820 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17187 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_adjust_stack_and_probe (operands[0]); } static const char * output_821 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17197 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_probe_stack_range (operands[0], operands[2]); } static const char * output_822 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17197 "../../gcc-5.1.0/gcc/config/i386/i386.md" return output_probe_stack_range (operands[0], operands[2]); } static const char * output_823 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18111 "../../gcc-5.1.0/gcc/config/i386/i386.md" { #ifdef HAVE_AS_IX86_UD2 return "ud2"; #else return ASM_SHORT "0x0b0f"; #endif } } static const char * output_824 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18148 "../../gcc-5.1.0/gcc/config/i386/i386.md" { static const char * const patterns[4] = { "prefetchnta\t%a0", "prefetcht2\t%a0", "prefetcht1\t%a0", "prefetcht0\t%a0" }; int locality = INTVAL (operands[1]); gcc_assert (IN_RANGE (locality, 0, 3)); return patterns[locality]; } } static const char * output_825 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18169 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (INTVAL (operands[1]) == 0) return "prefetch\t%a0"; else return "prefetchw\t%a0"; } } static const char * output_885 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 19009 "../../gcc-5.1.0/gcc/config/i386/i386.md" { if (x86_64_immediate_size_operand (operands[1], VOIDmode)) return "mov{l}\t{%1@SIZE, %k0|%k0, %1@SIZE}"; else return "movabs{q}\t{%1@SIZE, %0|%0, %1@SIZE}"; } } static const char * output_886 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 86 "../../gcc-5.1.0/gcc/config/i386/mmx.md" { switch (get_attr_type (insn)) { case TYPE_MULTI: return "#"; case TYPE_IMOV: if (get_attr_mode (insn) == MODE_SI) return "mov{l}\t{%1, %k0|%k0, %1}"; else return "mov{q}\t{%1, %0|%0, %1}"; case TYPE_MMX: return "pxor\t%0, %0"; case TYPE_MMXMOV: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "movd\t{%1, %0|%0, %1}"; return "movq\t{%1, %0|%0, %1}"; case TYPE_SSECVT: if (SSE_REG_P (operands[0])) return "movq2dq\t{%1, %0|%0, %1}"; else return "movdq2q\t{%1, %0|%0, %1}"; case TYPE_SSELOG1: return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: switch (get_attr_mode (insn)) { case MODE_DI: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; return "%vmovq\t{%1, %0|%0, %1}"; case MODE_TI: return "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; case MODE_V2SF: if (TARGET_AVX && REG_P (operands[0])) return "vmovlps\t{%1, %0, %0|%0, %0, %1}"; return "%vmovlps\t{%1, %0|%0, %1}"; case MODE_V4SF: return "%vmovaps\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_887 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 86 "../../gcc-5.1.0/gcc/config/i386/mmx.md" { switch (get_attr_type (insn)) { case TYPE_MULTI: return "#"; case TYPE_IMOV: if (get_attr_mode (insn) == MODE_SI) return "mov{l}\t{%1, %k0|%k0, %1}"; else return "mov{q}\t{%1, %0|%0, %1}"; case TYPE_MMX: return "pxor\t%0, %0"; case TYPE_MMXMOV: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "movd\t{%1, %0|%0, %1}"; return "movq\t{%1, %0|%0, %1}"; case TYPE_SSECVT: if (SSE_REG_P (operands[0])) return "movq2dq\t{%1, %0|%0, %1}"; else return "movdq2q\t{%1, %0|%0, %1}"; case TYPE_SSELOG1: return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: switch (get_attr_mode (insn)) { case MODE_DI: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; return "%vmovq\t{%1, %0|%0, %1}"; case MODE_TI: return "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; case MODE_V2SF: if (TARGET_AVX && REG_P (operands[0])) return "vmovlps\t{%1, %0, %0|%0, %0, %1}"; return "%vmovlps\t{%1, %0|%0, %1}"; case MODE_V4SF: return "%vmovaps\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_888 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 86 "../../gcc-5.1.0/gcc/config/i386/mmx.md" { switch (get_attr_type (insn)) { case TYPE_MULTI: return "#"; case TYPE_IMOV: if (get_attr_mode (insn) == MODE_SI) return "mov{l}\t{%1, %k0|%k0, %1}"; else return "mov{q}\t{%1, %0|%0, %1}"; case TYPE_MMX: return "pxor\t%0, %0"; case TYPE_MMXMOV: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "movd\t{%1, %0|%0, %1}"; return "movq\t{%1, %0|%0, %1}"; case TYPE_SSECVT: if (SSE_REG_P (operands[0])) return "movq2dq\t{%1, %0|%0, %1}"; else return "movdq2q\t{%1, %0|%0, %1}"; case TYPE_SSELOG1: return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: switch (get_attr_mode (insn)) { case MODE_DI: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; return "%vmovq\t{%1, %0|%0, %1}"; case MODE_TI: return "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; case MODE_V2SF: if (TARGET_AVX && REG_P (operands[0])) return "vmovlps\t{%1, %0, %0|%0, %0, %1}"; return "%vmovlps\t{%1, %0|%0, %1}"; case MODE_V4SF: return "%vmovaps\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_889 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 86 "../../gcc-5.1.0/gcc/config/i386/mmx.md" { switch (get_attr_type (insn)) { case TYPE_MULTI: return "#"; case TYPE_IMOV: if (get_attr_mode (insn) == MODE_SI) return "mov{l}\t{%1, %k0|%k0, %1}"; else return "mov{q}\t{%1, %0|%0, %1}"; case TYPE_MMX: return "pxor\t%0, %0"; case TYPE_MMXMOV: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "movd\t{%1, %0|%0, %1}"; return "movq\t{%1, %0|%0, %1}"; case TYPE_SSECVT: if (SSE_REG_P (operands[0])) return "movq2dq\t{%1, %0|%0, %1}"; else return "movdq2q\t{%1, %0|%0, %1}"; case TYPE_SSELOG1: return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: switch (get_attr_mode (insn)) { case MODE_DI: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; return "%vmovq\t{%1, %0|%0, %1}"; case MODE_TI: return "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; case MODE_V2SF: if (TARGET_AVX && REG_P (operands[0])) return "vmovlps\t{%1, %0, %0|%0, %0, %1}"; return "%vmovlps\t{%1, %0|%0, %1}"; case MODE_V4SF: return "%vmovaps\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_890 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 86 "../../gcc-5.1.0/gcc/config/i386/mmx.md" { switch (get_attr_type (insn)) { case TYPE_MULTI: return "#"; case TYPE_IMOV: if (get_attr_mode (insn) == MODE_SI) return "mov{l}\t{%1, %k0|%k0, %1}"; else return "mov{q}\t{%1, %0|%0, %1}"; case TYPE_MMX: return "pxor\t%0, %0"; case TYPE_MMXMOV: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "movd\t{%1, %0|%0, %1}"; return "movq\t{%1, %0|%0, %1}"; case TYPE_SSECVT: if (SSE_REG_P (operands[0])) return "movq2dq\t{%1, %0|%0, %1}"; else return "movdq2q\t{%1, %0|%0, %1}"; case TYPE_SSELOG1: return standard_sse_constant_opcode (insn, operands[1]); case TYPE_SSEMOV: switch (get_attr_mode (insn)) { case MODE_DI: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; return "%vmovq\t{%1, %0|%0, %1}"; case MODE_TI: return "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; case MODE_V2SF: if (TARGET_AVX && REG_P (operands[0])) return "vmovlps\t{%1, %0, %0|%0, %0, %1}"; return "%vmovlps\t{%1, %0|%0, %1}"; case MODE_V4SF: return "%vmovaps\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * const output_893[] = { "pfsub\t{%2, %0|%0, %2}", "pfsubr\t{%1, %0|%0, %1}", }; static const char * const output_916[] = { "punpckldq\t{%2, %0|%0, %2}", "movd\t{%1, %0|%0, %1}", }; static const char * const output_918[] = { "punpckhdq\t%0, %0", "%vmovshdup\t{%1, %0|%0, %1}", "shufps\t{$0xe5, %1, %0|%0, %1, 0xe5}", "#", "#", "#", "#", }; static const char * output_980 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/mmx.md" { operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3]))); if (MEM_P (operands[2])) return "pinsrw\t{%3, %2, %0|%0, %2, %3}"; else return "pinsrw\t{%3, %k2, %0|%0, %k2, %3}"; } } static const char * output_982 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1207 "../../gcc-5.1.0/gcc/config/i386/mmx.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "pshufw\t{%2, %1, %0|%0, %1, %2}"; } } static const char * const output_986[] = { "punpckldq\t{%2, %0|%0, %2}", "movd\t{%1, %0|%0, %1}", }; static const char * const output_988[] = { "punpckhdq\t%0, %0", "%vpshufd\t{$0xe5, %1, %0|%0, %1, 0xe5}", "shufps\t{$0xe5, %1, %0|%0, %1, 0xe5}", "#", "#", "#", }; static const char * output_989 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1460 "../../gcc-5.1.0/gcc/config/i386/mmx.md" { /* These two instructions have the same operation, but their encoding is different. Prefer the one that is de facto standard. */ if (TARGET_SSE || TARGET_3DNOW_A) return "pavgb\t{%2, %0|%0, %2}"; else return "pavgusb\t{%2, %0|%0, %2}"; } } static const char * output_997 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 64 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V64QImode)) { if (64 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (64 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V64QImode)) { if (64 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (64 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V64QImode) || misaligned_operand (operands[1], V64QImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V64QImode) || misaligned_operand (operands[1], V64QImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V64QImode) || misaligned_operand (operands[1], V64QImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V64QImode) || misaligned_operand (operands[1], V64QImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_998 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 32 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V32QImode)) { if (32 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (32 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V32QImode)) { if (32 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (32 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V32QImode) || misaligned_operand (operands[1], V32QImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V32QImode) || misaligned_operand (operands[1], V32QImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V32QImode) || misaligned_operand (operands[1], V32QImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V32QImode) || misaligned_operand (operands[1], V32QImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_999 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 16 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V16QImode)) { if (16 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (16 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V16QImode)) { if (16 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (16 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V16QImode) || misaligned_operand (operands[1], V16QImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V16QImode) || misaligned_operand (operands[1], V16QImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V16QImode) || misaligned_operand (operands[1], V16QImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V16QImode) || misaligned_operand (operands[1], V16QImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1000 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 64 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V32HImode)) { if (64 == 32) return "vextract64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (64 == 16) return "vextract32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V32HImode)) { if (64 == 32) return "vbroadcast64x4\t{%1, %g0|%g0, %1}"; else if (64 == 16) return "vbroadcast32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V32HImode) || misaligned_operand (operands[1], V32HImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V32HImode) || misaligned_operand (operands[1], V32HImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V32HImode) || misaligned_operand (operands[1], V32HImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V32HImode) || misaligned_operand (operands[1], V32HImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1001 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 32 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V16HImode)) { if (32 == 32) return "vextractu64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (32 == 16) return "vextractu32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V16HImode)) { if (32 == 32) return "vbroadcastu64x4\t{%1, %g0|%g0, %1}"; else if (32 == 16) return "vbroadcastu32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V16HImode) || misaligned_operand (operands[1], V16HImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V16HImode) || misaligned_operand (operands[1], V16HImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V16HImode) || misaligned_operand (operands[1], V16HImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V16HImode) || misaligned_operand (operands[1], V16HImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1002 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 16 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V8HImode)) { if (16 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (16 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V8HImode)) { if (16 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (16 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V8HImode) || misaligned_operand (operands[1], V8HImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V8HImode) || misaligned_operand (operands[1], V8HImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V8HImode) || misaligned_operand (operands[1], V8HImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V8HImode) || misaligned_operand (operands[1], V8HImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1003 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 64 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V16SImode)) { if (64 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (64 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V16SImode)) { if (64 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (64 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V16SImode) || misaligned_operand (operands[1], V16SImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V16SImode) || misaligned_operand (operands[1], V16SImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V16SImode) || misaligned_operand (operands[1], V16SImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V16SImode) || misaligned_operand (operands[1], V16SImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1004 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 32 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V8SImode)) { if (32 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (32 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V8SImode)) { if (32 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (32 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V8SImode) || misaligned_operand (operands[1], V8SImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V8SImode) || misaligned_operand (operands[1], V8SImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V8SImode) || misaligned_operand (operands[1], V8SImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V8SImode) || misaligned_operand (operands[1], V8SImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1005 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 16 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V4SImode)) { if (16 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (16 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V4SImode)) { if (16 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (16 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V4SImode) || misaligned_operand (operands[1], V4SImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V4SImode) || misaligned_operand (operands[1], V4SImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V4SImode) || misaligned_operand (operands[1], V4SImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V4SImode) || misaligned_operand (operands[1], V4SImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1006 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 64 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V8DImode)) { if (64 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (64 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V8DImode)) { if (64 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (64 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V8DImode) || misaligned_operand (operands[1], V8DImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V8DImode) || misaligned_operand (operands[1], V8DImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V8DImode) || misaligned_operand (operands[1], V8DImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V8DImode) || misaligned_operand (operands[1], V8DImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1007 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 32 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V4DImode)) { if (32 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (32 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V4DImode)) { if (32 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (32 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V4DImode) || misaligned_operand (operands[1], V4DImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V4DImode) || misaligned_operand (operands[1], V4DImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V4DImode) || misaligned_operand (operands[1], V4DImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V4DImode) || misaligned_operand (operands[1], V4DImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1008 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 16 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V2DImode)) { if (16 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (16 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V2DImode)) { if (16 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (16 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V2DImode) || misaligned_operand (operands[1], V2DImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V2DImode) || misaligned_operand (operands[1], V2DImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V2DImode) || misaligned_operand (operands[1], V2DImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V2DImode) || misaligned_operand (operands[1], V2DImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1009 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 64 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V4TImode)) { if (64 == 32) return "vextract64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (64 == 16) return "vextract32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V4TImode)) { if (64 == 32) return "vbroadcast64x4\t{%1, %g0|%g0, %1}"; else if (64 == 16) return "vbroadcast32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V4TImode) || misaligned_operand (operands[1], V4TImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V4TImode) || misaligned_operand (operands[1], V4TImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V4TImode) || misaligned_operand (operands[1], V4TImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V4TImode) || misaligned_operand (operands[1], V4TImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1010 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 32 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V2TImode)) { if (32 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (32 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V2TImode)) { if (32 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (32 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V2TImode) || misaligned_operand (operands[1], V2TImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V2TImode) || misaligned_operand (operands[1], V2TImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V2TImode) || misaligned_operand (operands[1], V2TImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V2TImode) || misaligned_operand (operands[1], V2TImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1011 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 16 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V1TImode)) { if (16 == 32) return "vextracti64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (16 == 16) return "vextracti32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V1TImode)) { if (16 == 32) return "vbroadcasti64x4\t{%1, %g0|%g0, %1}"; else if (16 == 16) return "vbroadcasti32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V1TImode) || misaligned_operand (operands[1], V1TImode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V1TImode) || misaligned_operand (operands[1], V1TImode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V1TImode) || misaligned_operand (operands[1], V1TImode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V1TImode) || misaligned_operand (operands[1], V1TImode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1012 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 64 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V16SFmode)) { if (64 == 32) return "vextractf64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (64 == 16) return "vextractf32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V16SFmode)) { if (64 == 32) return "vbroadcastf64x4\t{%1, %g0|%g0, %1}"; else if (64 == 16) return "vbroadcastf32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V16SFmode) || misaligned_operand (operands[1], V16SFmode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V16SFmode) || misaligned_operand (operands[1], V16SFmode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V16SFmode) || misaligned_operand (operands[1], V16SFmode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V16SFmode) || misaligned_operand (operands[1], V16SFmode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1013 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 32 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V8SFmode)) { if (32 == 32) return "vextractf64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (32 == 16) return "vextractf32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V8SFmode)) { if (32 == 32) return "vbroadcastf64x4\t{%1, %g0|%g0, %1}"; else if (32 == 16) return "vbroadcastf32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V8SFmode) || misaligned_operand (operands[1], V8SFmode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V8SFmode) || misaligned_operand (operands[1], V8SFmode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V8SFmode) || misaligned_operand (operands[1], V8SFmode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V8SFmode) || misaligned_operand (operands[1], V8SFmode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1014 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 16 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V4SFmode)) { if (16 == 32) return "vextractf64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (16 == 16) return "vextractf32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V4SFmode)) { if (16 == 32) return "vbroadcastf64x4\t{%1, %g0|%g0, %1}"; else if (16 == 16) return "vbroadcastf32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V4SFmode) || misaligned_operand (operands[1], V4SFmode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V4SFmode) || misaligned_operand (operands[1], V4SFmode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V4SFmode) || misaligned_operand (operands[1], V4SFmode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V4SFmode) || misaligned_operand (operands[1], V4SFmode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1015 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 64 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V8DFmode)) { if (64 == 32) return "vextractf64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (64 == 16) return "vextractf32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V8DFmode)) { if (64 == 32) return "vbroadcastf64x4\t{%1, %g0|%g0, %1}"; else if (64 == 16) return "vbroadcastf32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V8DFmode) || misaligned_operand (operands[1], V8DFmode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V8DFmode) || misaligned_operand (operands[1], V8DFmode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V8DFmode) || misaligned_operand (operands[1], V8DFmode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V8DFmode) || misaligned_operand (operands[1], V8DFmode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1016 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 32 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V4DFmode)) { if (32 == 32) return "vextractf64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (32 == 16) return "vextractf32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V4DFmode)) { if (32 == 32) return "vbroadcastf64x4\t{%1, %g0|%g0, %1}"; else if (32 == 16) return "vbroadcastf32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V4DFmode) || misaligned_operand (operands[1], V4DFmode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V4DFmode) || misaligned_operand (operands[1], V4DFmode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V4DFmode) || misaligned_operand (operands[1], V4DFmode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V4DFmode) || misaligned_operand (operands[1], V4DFmode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1017 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 803 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mode = get_attr_mode (insn); switch (which_alternative) { case 0: return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. In avx512vl we don't need workarounds. */ if (TARGET_AVX512F && 16 < 64 && !TARGET_AVX512VL && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1]))))) { if (memory_operand (operands[0], V2DFmode)) { if (16 == 32) return "vextractf64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else if (16 == 16) return "vextractf32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], V2DFmode)) { if (16 == 32) return "vbroadcastf64x4\t{%1, %g0|%g0, %1}"; else if (16 == 16) return "vbroadcastf32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); } else /* Reg -> reg move is always aligned. Just use wider move. */ switch (mode) { case MODE_V8SF: case MODE_V4SF: return "vmovaps\t{%g1, %g0|%g0, %g1}"; case MODE_V4DF: case MODE_V2DF: return "vmovapd\t{%g1, %g0|%g0, %g1}"; case MODE_OI: case MODE_TI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; default: gcc_unreachable (); } } switch (mode) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: if (TARGET_AVX && (misaligned_operand (operands[0], V2DFmode) || misaligned_operand (operands[1], V2DFmode))) return "vmovups\t{%1, %0|%0, %1}"; else return "%vmovaps\t{%1, %0|%0, %1}"; case MODE_V8DF: case MODE_V4DF: case MODE_V2DF: if (TARGET_AVX && (misaligned_operand (operands[0], V2DFmode) || misaligned_operand (operands[1], V2DFmode))) return "vmovupd\t{%1, %0|%0, %1}"; else return "%vmovapd\t{%1, %0|%0, %1}"; case MODE_OI: case MODE_TI: if (TARGET_AVX && (misaligned_operand (operands[0], V2DFmode) || misaligned_operand (operands[1], V2DFmode))) return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}" : "vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; case MODE_XI: if (misaligned_operand (operands[0], V2DFmode) || misaligned_operand (operands[1], V2DFmode)) return "vmovdqu64\t{%1, %0|%0, %1}"; else return "vmovdqa64\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_1018 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V16SImode))) { insn_op = "vmov"; sse_suffix = "d"; } else { insn_op = "vmovdq"; sse_suffix = "32"; } if (misaligned_operand (operands[1], V16SImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1019 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V8SImode))) { insn_op = "vmov"; sse_suffix = "d"; } else { insn_op = "vmovdq"; sse_suffix = "32"; } if (misaligned_operand (operands[1], V8SImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1020 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V4SImode))) { insn_op = "vmov"; sse_suffix = "d"; } else { insn_op = "vmovdq"; sse_suffix = "32"; } if (misaligned_operand (operands[1], V4SImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1021 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V8DImode))) { insn_op = "vmov"; sse_suffix = "q"; } else { insn_op = "vmovdq"; sse_suffix = "64"; } if (misaligned_operand (operands[1], V8DImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1022 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V4DImode))) { insn_op = "vmov"; sse_suffix = "q"; } else { insn_op = "vmovdq"; sse_suffix = "64"; } if (misaligned_operand (operands[1], V4DImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1023 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V2DImode))) { insn_op = "vmov"; sse_suffix = "q"; } else { insn_op = "vmovdq"; sse_suffix = "64"; } if (misaligned_operand (operands[1], V2DImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1024 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V16SFmode))) { insn_op = "vmov"; sse_suffix = "ps"; } else { insn_op = "vmovdq"; sse_suffix = "32"; } if (misaligned_operand (operands[1], V16SFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1025 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V8SFmode))) { insn_op = "vmov"; sse_suffix = "ps"; } else { insn_op = "vmovdq"; sse_suffix = ""; } if (misaligned_operand (operands[1], V8SFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1026 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V4SFmode))) { insn_op = "vmov"; sse_suffix = "ps"; } else { insn_op = "vmovdq"; sse_suffix = ""; } if (misaligned_operand (operands[1], V4SFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1027 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V8DFmode))) { insn_op = "vmov"; sse_suffix = "pd"; } else { insn_op = "vmovdq"; sse_suffix = "64"; } if (misaligned_operand (operands[1], V8DFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1028 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V4DFmode))) { insn_op = "vmov"; sse_suffix = "pd"; } else { insn_op = "vmovdq"; sse_suffix = ""; } if (misaligned_operand (operands[1], V4DFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1029 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 925 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V2DFmode))) { insn_op = "vmov"; sse_suffix = "pd"; } else { insn_op = "vmovdq"; sse_suffix = ""; } if (misaligned_operand (operands[1], V2DFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%3%%}%%N2|%%0%%{%%3%%}%%N2, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1054 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V16SImode))) { insn_op = "vmov"; sse_suffix = "d"; } else { insn_op = "vmovdq"; sse_suffix = "32"; } if (misaligned_operand (operands[1], V16SImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1055 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V8SImode))) { insn_op = "vmov"; sse_suffix = "d"; } else { insn_op = "vmovdq"; sse_suffix = "32"; } if (misaligned_operand (operands[1], V8SImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1056 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V4SImode))) { insn_op = "vmov"; sse_suffix = "d"; } else { insn_op = "vmovdq"; sse_suffix = "32"; } if (misaligned_operand (operands[1], V4SImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1057 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V8DImode))) { insn_op = "vmov"; sse_suffix = "q"; } else { insn_op = "vmovdq"; sse_suffix = "64"; } if (misaligned_operand (operands[1], V8DImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1058 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V4DImode))) { insn_op = "vmov"; sse_suffix = "q"; } else { insn_op = "vmovdq"; sse_suffix = "64"; } if (misaligned_operand (operands[1], V4DImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1059 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V2DImode))) { insn_op = "vmov"; sse_suffix = "q"; } else { insn_op = "vmovdq"; sse_suffix = "64"; } if (misaligned_operand (operands[1], V2DImode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1060 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V16SFmode))) { insn_op = "vmov"; sse_suffix = "ps"; } else { insn_op = "vmovdq"; sse_suffix = "32"; } if (misaligned_operand (operands[1], V16SFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1061 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V8SFmode))) { insn_op = "vmov"; sse_suffix = "ps"; } else { insn_op = "vmovdq"; sse_suffix = ""; } if (misaligned_operand (operands[1], V8SFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1062 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V4SFmode))) { insn_op = "vmov"; sse_suffix = "ps"; } else { insn_op = "vmovdq"; sse_suffix = ""; } if (misaligned_operand (operands[1], V4SFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1063 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V8DFmode))) { insn_op = "vmov"; sse_suffix = "pd"; } else { insn_op = "vmovdq"; sse_suffix = "64"; } if (misaligned_operand (operands[1], V8DFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1064 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V4DFmode))) { insn_op = "vmov"; sse_suffix = "pd"; } else { insn_op = "vmovdq"; sse_suffix = ""; } if (misaligned_operand (operands[1], V4DFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1065 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1000 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf [64]; const char *insn_op; const char *sse_suffix; const char *align; if (FLOAT_MODE_P (GET_MODE_INNER (V2DFmode))) { insn_op = "vmov"; sse_suffix = "pd"; } else { insn_op = "vmovdq"; sse_suffix = ""; } if (misaligned_operand (operands[1], V2DFmode)) align = "u"; else align = "a"; snprintf (buf, sizeof (buf), "%s%s%s\t{%%1, %%0%%{%%2%%}|%%0%%{%%2%%}, %%1}", insn_op, align, sse_suffix); return buf; } } static const char * output_1074 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovups\t{%1, %0|%0, %1}"; } } } static const char * output_1075 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; default: return "%vmovups\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; } } } static const char * output_1076 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovups\t{%1, %0|%0, %1}"; } } } static const char * output_1077 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; default: return "%vmovups\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; } } } static const char * output_1078 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovups\t{%1, %0|%0, %1}"; } } } static const char * output_1079 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; default: return "%vmovups\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; } } } static const char * output_1080 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovupd\t{%1, %0|%0, %1}"; } } } static const char * output_1081 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; default: return "%vmovupd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; } } } static const char * output_1082 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovupd\t{%1, %0|%0, %1}"; } } } static const char * output_1083 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; default: return "%vmovupd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; } } } static const char * output_1084 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovupd\t{%1, %0|%0, %1}"; } } } static const char * output_1085 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1160 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; default: return "%vmovupd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; } } } static const char * output_1086 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1192 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovups\t{%1, %0|%0, %1}"; } } } static const char * output_1087 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1192 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovups\t{%1, %0|%0, %1}"; } } } static const char * output_1088 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1192 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovups\t{%1, %0|%0, %1}"; } } } static const char * output_1089 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1192 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovupd\t{%1, %0|%0, %1}"; } } } static const char * output_1090 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1192 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovupd\t{%1, %0|%0, %1}"; } } } static const char * output_1091 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1192 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: return "%vmovupd\t{%1, %0|%0, %1}"; } } } static const char * output_1092 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1228 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "vmovups\t{%1, %0%{%2%}|%0%{%2%}, %1}"; default: return "vmovups\t{%1, %0%{%2%}|%0%{%2%}, %1}"; } } } static const char * output_1093 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1228 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "vmovups\t{%1, %0%{%2%}|%0%{%2%}, %1}"; default: return "vmovups\t{%1, %0%{%2%}|%0%{%2%}, %1}"; } } } static const char * output_1094 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1228 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "vmovups\t{%1, %0%{%2%}|%0%{%2%}, %1}"; default: return "vmovups\t{%1, %0%{%2%}|%0%{%2%}, %1}"; } } } static const char * output_1095 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1228 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "vmovups\t{%1, %0%{%2%}|%0%{%2%}, %1}"; default: return "vmovupd\t{%1, %0%{%2%}|%0%{%2%}, %1}"; } } } static const char * output_1096 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1228 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "vmovups\t{%1, %0%{%2%}|%0%{%2%}, %1}"; default: return "vmovupd\t{%1, %0%{%2%}|%0%{%2%}, %1}"; } } } static const char * output_1097 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1228 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "vmovups\t{%1, %0%{%2%}|%0%{%2%}, %1}"; default: return "vmovupd\t{%1, %0%{%2%}|%0%{%2%}, %1}"; } } } static const char * output_1098 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1314 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: if (!(TARGET_AVX512VL && TARGET_AVX512BW)) return "%vmovdqu\t{%1, %0|%0, %1}"; else return "vmovdqu8\t{%1, %0|%0, %1}"; } } } static const char * output_1099 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1314 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: if (!(TARGET_AVX512VL && TARGET_AVX512BW)) return "%vmovdqu\t{%1, %0|%0, %1}"; else return "vmovdqu8\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; } } } static const char * output_1100 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1314 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: if (!(TARGET_AVX512VL && TARGET_AVX512BW)) return "%vmovdqu\t{%1, %0|%0, %1}"; else return "vmovdqu8\t{%1, %0|%0, %1}"; } } } static const char * output_1101 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1314 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: if (!(TARGET_AVX512VL && TARGET_AVX512BW)) return "%vmovdqu\t{%1, %0|%0, %1}"; else return "vmovdqu8\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; } } } static const char * output_1122 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1377 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: switch (V32QImode) { case V32QImode: case V16QImode: if (!(TARGET_AVX512VL && TARGET_AVX512BW)) return "%vmovdqu\t{%1, %0|%0, %1}"; default: return "vmovdqu8\t{%1, %0|%0, %1}"; } } } } static const char * output_1123 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 1377 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (get_attr_mode (insn)) { case MODE_V16SF: case MODE_V8SF: case MODE_V4SF: return "%vmovups\t{%1, %0|%0, %1}"; default: switch (V16QImode) { case V32QImode: case V16QImode: if (!(TARGET_AVX512VL && TARGET_AVX512BW)) return "%vmovdqu\t{%1, %0|%0, %1}"; default: return "vmovdqu8\t{%1, %0|%0, %1}"; } } } } static const char * const output_1164[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1165[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1166[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1167[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1168[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1169[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1170[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1171[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1172[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1173[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1174[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1175[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1176[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1177[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1178[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1179[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1180[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1181[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1182[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1183[] = { "addps\t{%2, %0|%0, %2}", "vaddps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1184[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1185[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1186[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1187[] = { "subps\t{%2, %0|%0, %2}", "vsubps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1188[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1189[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1190[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1191[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1192[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1193[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1194[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1195[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1196[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1197[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1198[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1199[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1200[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1201[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1202[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1203[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1204[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1205[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1206[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1207[] = { "addpd\t{%2, %0|%0, %2}", "vaddpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1208[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1209[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1210[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1211[] = { "subpd\t{%2, %0|%0, %2}", "vsubpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1212[] = { "addss\t{%2, %0|%0, %k2}", "vaddss\t{%2, %1, %0|%0, %1, %k2}", }; static const char * const output_1213[] = { "addss\t{%2, %0|%0, %k2}", "vaddss\t{%R3%2, %1, %0|%0, %1, %k2%R3}", }; static const char * const output_1214[] = { "subss\t{%2, %0|%0, %k2}", "vsubss\t{%2, %1, %0|%0, %1, %k2}", }; static const char * const output_1215[] = { "subss\t{%2, %0|%0, %k2}", "vsubss\t{%R3%2, %1, %0|%0, %1, %k2%R3}", }; static const char * const output_1216[] = { "addsd\t{%2, %0|%0, %q2}", "vaddsd\t{%2, %1, %0|%0, %1, %q2}", }; static const char * const output_1217[] = { "addsd\t{%2, %0|%0, %q2}", "vaddsd\t{%R3%2, %1, %0|%0, %1, %q2%R3}", }; static const char * const output_1218[] = { "subsd\t{%2, %0|%0, %q2}", "vsubsd\t{%2, %1, %0|%0, %1, %q2}", }; static const char * const output_1219[] = { "subsd\t{%2, %0|%0, %q2}", "vsubsd\t{%R3%2, %1, %0|%0, %1, %q2%R3}", }; static const char * const output_1220[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1221[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1222[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1223[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1224[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1225[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1226[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1227[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1228[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1229[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1230[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1231[] = { "mulps\t{%2, %0|%0, %2}", "vmulps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1232[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1233[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1234[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1235[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1236[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1237[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1238[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1239[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1240[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1241[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1242[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1243[] = { "mulpd\t{%2, %0|%0, %2}", "vmulpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1244[] = { "mulss\t{%2, %0|%0, %k2}", "vmulss\t{%2, %1, %0|%0, %1, %k2}", }; static const char * const output_1245[] = { "mulss\t{%2, %0|%0, %k2}", "vmulss\t{%R3%2, %1, %0|%0, %1, %k2%R3}", }; static const char * const output_1246[] = { "divss\t{%2, %0|%0, %k2}", "vdivss\t{%2, %1, %0|%0, %1, %k2}", }; static const char * const output_1247[] = { "divss\t{%2, %0|%0, %k2}", "vdivss\t{%R3%2, %1, %0|%0, %1, %k2%R3}", }; static const char * const output_1248[] = { "mulsd\t{%2, %0|%0, %q2}", "vmulsd\t{%2, %1, %0|%0, %1, %q2}", }; static const char * const output_1249[] = { "mulsd\t{%2, %0|%0, %q2}", "vmulsd\t{%R3%2, %1, %0|%0, %1, %q2%R3}", }; static const char * const output_1250[] = { "divsd\t{%2, %0|%0, %q2}", "vdivsd\t{%2, %1, %0|%0, %1, %q2}", }; static const char * const output_1251[] = { "divsd\t{%2, %0|%0, %q2}", "vdivsd\t{%R3%2, %1, %0|%0, %1, %q2%R3}", }; static const char * const output_1252[] = { "divps\t{%2, %0|%0, %2}", "vdivps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1253[] = { "divps\t{%2, %0|%0, %2}", "vdivps\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1254[] = { "divps\t{%2, %0|%0, %2}", "vdivps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1255[] = { "divps\t{%2, %0|%0, %2}", "vdivps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1256[] = { "divps\t{%2, %0|%0, %2}", "vdivps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1257[] = { "divps\t{%2, %0|%0, %2}", "vdivps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1258[] = { "divps\t{%2, %0|%0, %2}", "vdivps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1259[] = { "divps\t{%2, %0|%0, %2}", "vdivps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1260[] = { "divpd\t{%2, %0|%0, %2}", "vdivpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1261[] = { "divpd\t{%2, %0|%0, %2}", "vdivpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_1262[] = { "divpd\t{%2, %0|%0, %2}", "vdivpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1263[] = { "divpd\t{%2, %0|%0, %2}", "vdivpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", }; static const char * const output_1264[] = { "divpd\t{%2, %0|%0, %2}", "vdivpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1265[] = { "divpd\t{%2, %0|%0, %2}", "vdivpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1266[] = { "divpd\t{%2, %0|%0, %2}", "vdivpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1267[] = { "divpd\t{%2, %0|%0, %2}", "vdivpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1270[] = { "rcpss\t{%1, %0|%0, %k1}", "vrcpss\t{%1, %2, %0|%0, %2, %k1}", }; static const char * const output_1301[] = { "sqrtss\t{%1, %0|%0, %k1}", "vsqrtss\t{%1, %2, %0|%0, %2, %k1}", }; static const char * const output_1302[] = { "sqrtss\t{%1, %0|%0, %k1}", "vsqrtss\t{%R3%1, %2, %0|%0, %2, %k1%R3}", }; static const char * const output_1303[] = { "sqrtsd\t{%1, %0|%0, %q1}", "vsqrtsd\t{%1, %2, %0|%0, %2, %q1}", }; static const char * const output_1304[] = { "sqrtsd\t{%1, %0|%0, %q1}", "vsqrtsd\t{%R3%1, %2, %0|%0, %2, %q1%R3}", }; static const char * const output_1321[] = { "rsqrtss\t{%1, %0|%0, %k1}", "vrsqrtss\t{%1, %2, %0|%0, %2, %k1}", }; static const char * const output_1322[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1323[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1324[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1325[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1326[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1327[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1328[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1329[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1330[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1331[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1332[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1333[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1334[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1335[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1336[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1337[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1338[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1339[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1340[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1341[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1342[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1343[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1344[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1345[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1346[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1347[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1348[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1349[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1350[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1351[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1352[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1353[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1354[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1355[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1356[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1357[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1358[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1359[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1360[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1361[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1362[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1363[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1364[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1365[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1366[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1367[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1368[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1369[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1370[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1371[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1372[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1373[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1374[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1375[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1376[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1377[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1378[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1379[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1380[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1381[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1382[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1383[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1384[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1385[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1386[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1387[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1388[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1389[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1390[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1391[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%r3%2, %1, %0|%0, %1, %2%r3}", }; static const char * const output_1392[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1393[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%r5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%r5}", }; static const char * const output_1394[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1395[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1396[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1397[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1398[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1399[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1400[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1401[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_1402[] = { "maxss\t{%2, %0|%0, %k2}", "vmaxss\t{%2, %1, %0|%0, %1, %k2}", }; static const char * const output_1403[] = { "maxss\t{%2, %0|%0, %k2}", "vmaxss\t{%r3%2, %1, %0|%0, %1, %k2%r3}", }; static const char * const output_1404[] = { "minss\t{%2, %0|%0, %k2}", "vminss\t{%2, %1, %0|%0, %1, %k2}", }; static const char * const output_1405[] = { "minss\t{%2, %0|%0, %k2}", "vminss\t{%r3%2, %1, %0|%0, %1, %k2%r3}", }; static const char * const output_1406[] = { "maxsd\t{%2, %0|%0, %q2}", "vmaxsd\t{%2, %1, %0|%0, %1, %q2}", }; static const char * const output_1407[] = { "maxsd\t{%2, %0|%0, %q2}", "vmaxsd\t{%r3%2, %1, %0|%0, %1, %q2%r3}", }; static const char * const output_1408[] = { "minsd\t{%2, %0|%0, %q2}", "vminsd\t{%2, %1, %0|%0, %1, %q2}", }; static const char * const output_1409[] = { "minsd\t{%2, %0|%0, %q2}", "vminsd\t{%r3%2, %1, %0|%0, %1, %q2%r3}", }; static const char * const output_1410[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1411[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1412[] = { "minps\t{%2, %0|%0, %2}", "vminps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1413[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1414[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1415[] = { "minpd\t{%2, %0|%0, %2}", "vminpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1416[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1417[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1418[] = { "maxps\t{%2, %0|%0, %2}", "vmaxps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1419[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1420[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1421[] = { "maxpd\t{%2, %0|%0, %2}", "vmaxpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1423[] = { "addsubpd\t{%2, %0|%0, %2}", "vaddsubpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1425[] = { "addsubps\t{%2, %0|%0, %2}", "vaddsubps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1428[] = { "haddpd\t{%2, %0|%0, %2}", "vhaddpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1429[] = { "hsubpd\t{%2, %0|%0, %2}", "vhsubpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1430[] = { "haddpd\t{%0, %0|%0, %0}", "vhaddpd\t{%1, %1, %0|%0, %1, %1}", }; static const char * const output_1431[] = { "hsubpd\t{%0, %0|%0, %0}", "vhsubpd\t{%1, %1, %0|%0, %1, %1}", }; static const char * const output_1434[] = { "haddps\t{%2, %0|%0, %2}", "vhaddps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1435[] = { "hsubps\t{%2, %0|%0, %2}", "vhsubps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1456[] = { "cmp%D3ps\t{%2, %0|%0, %2}", "vcmp%D3ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1457[] = { "cmp%D3ps\t{%2, %0|%0, %2}", "vcmp%D3ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1458[] = { "cmp%D3pd\t{%2, %0|%0, %2}", "vcmp%D3pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1459[] = { "cmp%D3pd\t{%2, %0|%0, %2}", "vcmp%D3pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1460[] = { "cmp%D3ps\t{%2, %0|%0, %2}", "vcmp%D3ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1461[] = { "cmp%D3ps\t{%2, %0|%0, %2}", "vcmp%D3ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1462[] = { "cmp%D3pd\t{%2, %0|%0, %2}", "vcmp%D3pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1463[] = { "cmp%D3pd\t{%2, %0|%0, %2}", "vcmp%D3pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1464[] = { "cmp%D3ss\t{%2, %0|%0, %k2}", "vcmp%D3ss\t{%2, %1, %0|%0, %1, %k2}", }; static const char * const output_1465[] = { "cmp%D3sd\t{%2, %0|%0, %q2}", "vcmp%D3sd\t{%2, %1, %0|%0, %1, %q2}", }; static const char * output_1556 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2711 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8SFmode) == DFmode ? "q" : "d"; ops = "vpandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1557 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2711 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vandn%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8SFmode) == DFmode ? "q" : "d"; ops = "vpandn%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1558 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2711 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4SFmode) == DFmode ? "q" : "d"; ops = "vpandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1559 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2711 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vandn%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4SFmode) == DFmode ? "q" : "d"; ops = "vpandn%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1560 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2711 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4DFmode) == DFmode ? "q" : "d"; ops = "vpandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1561 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2711 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vandn%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4DFmode) == DFmode ? "q" : "d"; ops = "vpandn%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1562 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2711 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V2DFmode) == DFmode ? "q" : "d"; ops = "vpandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1563 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2711 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vandn%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V2DFmode) == DFmode ? "q" : "d"; ops = "vpandn%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1564 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2770 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "ps"; ops = ""; /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (!TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V16SFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1565 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2770 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "ps"; ops = ""; /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (!TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V16SFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sandn%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1566 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2770 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "pd"; ops = ""; /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (!TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8DFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1567 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2770 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "pd"; ops = ""; /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ if (!TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8DFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sandn%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1568 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "and%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8SFmode) == DFmode ? "q" : "d"; ops = "vpand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1569 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "and%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vand%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8SFmode) == DFmode ? "q" : "d"; ops = "vpand%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1570 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "or%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8SFmode) == DFmode ? "q" : "d"; ops = "vpor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1571 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "or%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8SFmode) == DFmode ? "q" : "d"; ops = "vpor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1572 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "xor%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8SFmode) == DFmode ? "q" : "d"; ops = "vpxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1573 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "xor%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vxor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8SFmode) == DFmode ? "q" : "d"; ops = "vpxor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1574 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "and%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4SFmode) == DFmode ? "q" : "d"; ops = "vpand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1575 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "and%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vand%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4SFmode) == DFmode ? "q" : "d"; ops = "vpand%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1576 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "or%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4SFmode) == DFmode ? "q" : "d"; ops = "vpor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1577 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "or%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4SFmode) == DFmode ? "q" : "d"; ops = "vpor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1578 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "xor%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4SFmode) == DFmode ? "q" : "d"; ops = "vpxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1579 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "ps"; } switch (which_alternative) { case 0: ops = "xor%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vxor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4SFmode) == DFmode ? "q" : "d"; ops = "vpxor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1580 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "and%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4DFmode) == DFmode ? "q" : "d"; ops = "vpand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1581 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "and%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vand%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4DFmode) == DFmode ? "q" : "d"; ops = "vpand%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1582 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "or%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4DFmode) == DFmode ? "q" : "d"; ops = "vpor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1583 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "or%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4DFmode) == DFmode ? "q" : "d"; ops = "vpor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1584 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "xor%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4DFmode) == DFmode ? "q" : "d"; ops = "vpxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1585 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "xor%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vxor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V4DFmode) == DFmode ? "q" : "d"; ops = "vpxor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1586 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "and%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V2DFmode) == DFmode ? "q" : "d"; ops = "vpand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1587 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "and%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vand%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V2DFmode) == DFmode ? "q" : "d"; ops = "vpand%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1588 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "or%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V2DFmode) == DFmode ? "q" : "d"; ops = "vpor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1589 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "or%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V2DFmode) == DFmode ? "q" : "d"; ops = "vpor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1590 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "xor%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if (false && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V2DFmode) == DFmode ? "q" : "d"; ops = "vpxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1591 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; switch (get_attr_mode (insn)) { case MODE_V8SF: case MODE_V4SF: suffix = "ps"; break; default: suffix = "pd"; } switch (which_alternative) { case 0: ops = "xor%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vxor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if (true && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V2DFmode) == DFmode ? "q" : "d"; ops = "vpxor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1592 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "ps"; ops = ""; /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if ((64 == 64 || false) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V16SFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1593 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "ps"; ops = ""; /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if ((64 == 64 || true) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V16SFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sand%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1594 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "ps"; ops = ""; /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if ((64 == 64 || false) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V16SFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1595 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "ps"; ops = ""; /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if ((64 == 64 || true) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V16SFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1596 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "ps"; ops = ""; /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if ((64 == 64 || false) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V16SFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1597 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "ps"; ops = ""; /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if ((64 == 64 || true) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V16SFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sxor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1598 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "pd"; ops = ""; /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if ((64 == 64 || false) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8DFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1599 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "pd"; ops = ""; /* There is no vandp[sd] in avx512f. Use vpand[dq]. */ if ((64 == 64 || true) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8DFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sand%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1600 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "pd"; ops = ""; /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if ((64 == 64 || false) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8DFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1601 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "pd"; ops = ""; /* There is no vorp[sd] in avx512f. Use vpor[dq]. */ if ((64 == 64 || true) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8DFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1602 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "pd"; ops = ""; /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if ((64 == 64 || false) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8DFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1603 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2874 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[128]; const char *ops; const char *suffix; suffix = "pd"; ops = ""; /* There is no vxorp[sd] in avx512f. Use vpxor[dq]. */ if ((64 == 64 || true) && !TARGET_AVX512DQ) { suffix = GET_MODE_INNER (V8DFmode) == DFmode ? "q" : "d"; ops = "p"; } snprintf (buf, sizeof (buf), "v%sxor%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}", ops, suffix); return buf; } } static const char * output_1604 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2928 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *suffix = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "ps"; switch (which_alternative) { case 0: ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1605 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2928 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *suffix = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "pd"; switch (which_alternative) { case 0: ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1606 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 2969 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *tmp = (get_attr_mode (insn) == MODE_V4SF) ? "andnps" : "pandn"; switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_1607 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3016 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *suffix = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "ps"; switch (which_alternative) { case 0: ops = "and%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1608 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3016 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *suffix = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "ps"; switch (which_alternative) { case 0: ops = "or%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1609 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3016 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *suffix = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "ps"; switch (which_alternative) { case 0: ops = "xor%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1610 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3016 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *suffix = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "pd"; switch (which_alternative) { case 0: ops = "and%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vand%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1611 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3016 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *suffix = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "pd"; switch (which_alternative) { case 0: ops = "or%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1612 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3016 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *suffix = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "pd"; switch (which_alternative) { case 0: ops = "xor%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "vxor%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, suffix); return buf; } } static const char * output_1613 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3066 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *tmp = (get_attr_mode (insn) == MODE_V4SF) ? "andps" : "pand"; switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_1614 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3066 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *tmp = (get_attr_mode (insn) == MODE_V4SF) ? "orps" : "por"; switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_1615 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 3066 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[32]; const char *ops; const char *tmp = (get_attr_mode (insn) == MODE_V4SF) ? "xorps" : "pxor"; switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * const output_1616[] = { "vfmadd132ss\t{%2, %3, %0|%0, %3, %2}", "vfmadd213ss\t{%3, %2, %0|%0, %2, %3}", "vfmadd231ss\t{%2, %1, %0|%0, %1, %2}", "vfmaddss\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmaddss\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1617[] = { "vfmadd132sd\t{%2, %3, %0|%0, %3, %2}", "vfmadd213sd\t{%3, %2, %0|%0, %2, %3}", "vfmadd231sd\t{%2, %1, %0|%0, %1, %2}", "vfmaddsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmaddsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1618[] = { "vfmadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfmadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfmadd231ps\t{%2, %1, %0|%0, %1, %2}", "vfmaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1619[] = { "vfmadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfmadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfmadd231pd\t{%2, %1, %0|%0, %1, %2}", "vfmaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1620[] = { "vfmadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfmadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfmadd231ps\t{%2, %1, %0|%0, %1, %2}", "vfmaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1621[] = { "vfmadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfmadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfmadd231pd\t{%2, %1, %0|%0, %1, %2}", "vfmaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1622[] = { "vfmadd132ss\t{%2, %3, %0|%0, %3, %2}", "vfmadd213ss\t{%3, %2, %0|%0, %2, %3}", "vfmadd231ss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1623[] = { "vfmadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfmadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfmadd231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1624[] = { "vfmadd132ps\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfmadd213ps\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfmadd231ps\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1625[] = { "vfmadd132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmadd213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmadd231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1626[] = { "vfmadd132ps\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfmadd213ps\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfmadd231ps\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1627[] = { "vfmadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfmadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfmadd231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1628[] = { "vfmadd132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmadd213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmadd231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1629[] = { "vfmadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfmadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfmadd231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1630[] = { "vfmadd132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmadd213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmadd231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1631[] = { "vfmadd132sd\t{%2, %3, %0|%0, %3, %2}", "vfmadd213sd\t{%3, %2, %0|%0, %2, %3}", "vfmadd231sd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1632[] = { "vfmadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfmadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfmadd231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1633[] = { "vfmadd132pd\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfmadd213pd\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfmadd231pd\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1634[] = { "vfmadd132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmadd213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmadd231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1635[] = { "vfmadd132pd\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfmadd213pd\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfmadd231pd\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1636[] = { "vfmadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfmadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfmadd231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1637[] = { "vfmadd132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmadd213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmadd231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1638[] = { "vfmadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfmadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfmadd231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1639[] = { "vfmadd132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmadd213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmadd231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1640[] = { "vfmadd132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmadd213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1641[] = { "vfmadd132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmadd213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1642[] = { "vfmadd132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmadd213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1643[] = { "vfmadd132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmadd213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1644[] = { "vfmadd132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmadd213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1645[] = { "vfmadd132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmadd213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1646[] = { "vfmadd132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmadd213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1647[] = { "vfmadd132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmadd213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1660[] = { "vfmsub132ss\t{%2, %3, %0|%0, %3, %2}", "vfmsub213ss\t{%3, %2, %0|%0, %2, %3}", "vfmsub231ss\t{%2, %1, %0|%0, %1, %2}", "vfmsubss\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmsubss\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1661[] = { "vfmsub132sd\t{%2, %3, %0|%0, %3, %2}", "vfmsub213sd\t{%3, %2, %0|%0, %2, %3}", "vfmsub231sd\t{%2, %1, %0|%0, %1, %2}", "vfmsubsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmsubsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1662[] = { "vfmsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfmsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfmsub231ps\t{%2, %1, %0|%0, %1, %2}", "vfmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1663[] = { "vfmsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfmsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfmsub231pd\t{%2, %1, %0|%0, %1, %2}", "vfmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1664[] = { "vfmsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfmsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfmsub231ps\t{%2, %1, %0|%0, %1, %2}", "vfmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1665[] = { "vfmsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfmsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfmsub231pd\t{%2, %1, %0|%0, %1, %2}", "vfmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1666[] = { "vfmsub132ss\t{%2, %3, %0|%0, %3, %2}", "vfmsub213ss\t{%3, %2, %0|%0, %2, %3}", "vfmsub231ss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1667[] = { "vfmsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfmsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfmsub231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1668[] = { "vfmsub132ps\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfmsub213ps\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfmsub231ps\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1669[] = { "vfmsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1670[] = { "vfmsub132ps\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfmsub213ps\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfmsub231ps\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1671[] = { "vfmsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfmsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfmsub231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1672[] = { "vfmsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1673[] = { "vfmsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfmsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfmsub231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1674[] = { "vfmsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1675[] = { "vfmsub132sd\t{%2, %3, %0|%0, %3, %2}", "vfmsub213sd\t{%3, %2, %0|%0, %2, %3}", "vfmsub231sd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1676[] = { "vfmsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfmsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfmsub231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1677[] = { "vfmsub132pd\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfmsub213pd\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfmsub231pd\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1678[] = { "vfmsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1679[] = { "vfmsub132pd\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfmsub213pd\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfmsub231pd\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1680[] = { "vfmsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfmsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfmsub231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1681[] = { "vfmsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1682[] = { "vfmsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfmsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfmsub231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1683[] = { "vfmsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1684[] = { "vfmsub132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsub213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1685[] = { "vfmsub132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsub213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1686[] = { "vfmsub132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsub213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1687[] = { "vfmsub132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsub213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1688[] = { "vfmsub132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsub213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1689[] = { "vfmsub132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsub213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1690[] = { "vfmsub132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsub213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1691[] = { "vfmsub132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsub213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1692[] = { "vfmsub132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsub213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1693[] = { "vfmsub132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsub213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1694[] = { "vfmsub132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsub213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1695[] = { "vfmsub132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsub213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1704[] = { "vfnmadd132ss\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213ss\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231ss\t{%2, %1, %0|%0, %1, %2}", "vfnmaddss\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmaddss\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1705[] = { "vfnmadd132sd\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213sd\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231sd\t{%2, %1, %0|%0, %1, %2}", "vfnmaddsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmaddsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1706[] = { "vfnmadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231ps\t{%2, %1, %0|%0, %1, %2}", "vfnmaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1707[] = { "vfnmadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231pd\t{%2, %1, %0|%0, %1, %2}", "vfnmaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1708[] = { "vfnmadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231ps\t{%2, %1, %0|%0, %1, %2}", "vfnmaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1709[] = { "vfnmadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231pd\t{%2, %1, %0|%0, %1, %2}", "vfnmaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1710[] = { "vfnmadd132ss\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213ss\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231ss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1711[] = { "vfnmadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1712[] = { "vfnmadd132ps\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfnmadd213ps\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfnmadd231ps\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1713[] = { "vfnmadd132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmadd213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmadd231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1714[] = { "vfnmadd132ps\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfnmadd213ps\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfnmadd231ps\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1715[] = { "vfnmadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1716[] = { "vfnmadd132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmadd213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmadd231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1717[] = { "vfnmadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1718[] = { "vfnmadd132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmadd213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmadd231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1719[] = { "vfnmadd132sd\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213sd\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231sd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1720[] = { "vfnmadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1721[] = { "vfnmadd132pd\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfnmadd213pd\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfnmadd231pd\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1722[] = { "vfnmadd132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmadd213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmadd231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1723[] = { "vfnmadd132pd\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfnmadd213pd\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfnmadd231pd\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1724[] = { "vfnmadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1725[] = { "vfnmadd132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmadd213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmadd231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1726[] = { "vfnmadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfnmadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfnmadd231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1727[] = { "vfnmadd132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmadd213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmadd231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1728[] = { "vfnmadd132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmadd213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1729[] = { "vfnmadd132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfnmadd213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1730[] = { "vfnmadd132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmadd213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1731[] = { "vfnmadd132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmadd213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1732[] = { "vfnmadd132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmadd213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1733[] = { "vfnmadd132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfnmadd213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1734[] = { "vfnmadd132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmadd213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1735[] = { "vfnmadd132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmadd213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1744[] = { "vfnmsub132ss\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213ss\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231ss\t{%2, %1, %0|%0, %1, %2}", "vfnmsubss\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubss\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1745[] = { "vfnmsub132ss\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfnmsub213ss\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfnmsub231ss\t{%R4%2, %1, %0|%0, %1, %2%R4}", "vfnmsubss\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubss\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1746[] = { "vfnmsub132sd\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213sd\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231sd\t{%2, %1, %0|%0, %1, %2}", "vfnmsubsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1747[] = { "vfnmsub132sd\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfnmsub213sd\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfnmsub231sd\t{%R4%2, %1, %0|%0, %1, %2%R4}", "vfnmsubsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1748[] = { "vfnmsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231ps\t{%2, %1, %0|%0, %1, %2}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1749[] = { "vfnmsub132ps\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfnmsub213ps\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfnmsub231ps\t{%R4%2, %1, %0|%0, %1, %2%R4}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1750[] = { "vfnmsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1751[] = { "vfnmsub132ps\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfnmsub213ps\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfnmsub231ps\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1752[] = { "vfnmsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231pd\t{%2, %1, %0|%0, %1, %2}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1753[] = { "vfnmsub132pd\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfnmsub213pd\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfnmsub231pd\t{%R4%2, %1, %0|%0, %1, %2%R4}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1754[] = { "vfnmsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1755[] = { "vfnmsub132pd\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfnmsub213pd\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfnmsub231pd\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1756[] = { "vfnmsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231ps\t{%2, %1, %0|%0, %1, %2}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1757[] = { "vfnmsub132ps\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfnmsub213ps\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfnmsub231ps\t{%R4%2, %1, %0|%0, %1, %2%R4}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1758[] = { "vfnmsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1759[] = { "vfnmsub132ps\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfnmsub213ps\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfnmsub231ps\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1760[] = { "vfnmsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231pd\t{%2, %1, %0|%0, %1, %2}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1761[] = { "vfnmsub132pd\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfnmsub213pd\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfnmsub231pd\t{%R4%2, %1, %0|%0, %1, %2%R4}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1762[] = { "vfnmsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1763[] = { "vfnmsub132pd\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfnmsub213pd\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfnmsub231pd\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfnmsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1764[] = { "vfnmsub132ss\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213ss\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231ss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1765[] = { "vfnmsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1766[] = { "vfnmsub132ps\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfnmsub213ps\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfnmsub231ps\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1767[] = { "vfnmsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1768[] = { "vfnmsub132ps\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfnmsub213ps\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfnmsub231ps\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1769[] = { "vfnmsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1770[] = { "vfnmsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1771[] = { "vfnmsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1772[] = { "vfnmsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1773[] = { "vfnmsub132sd\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213sd\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231sd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1774[] = { "vfnmsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1775[] = { "vfnmsub132pd\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfnmsub213pd\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfnmsub231pd\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1776[] = { "vfnmsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1777[] = { "vfnmsub132pd\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfnmsub213pd\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfnmsub231pd\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1778[] = { "vfnmsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1779[] = { "vfnmsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1780[] = { "vfnmsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfnmsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfnmsub231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1781[] = { "vfnmsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfnmsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfnmsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1782[] = { "vfnmsub132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmsub213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1783[] = { "vfnmsub132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfnmsub213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1784[] = { "vfnmsub132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmsub213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1785[] = { "vfnmsub132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmsub213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1786[] = { "vfnmsub132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmsub213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1787[] = { "vfnmsub132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfnmsub213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1788[] = { "vfnmsub132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmsub213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1789[] = { "vfnmsub132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfnmsub213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1802[] = { "vfmaddsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231ps\t{%2, %1, %0|%0, %1, %2}", "vfmaddsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmaddsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1803[] = { "vfmaddsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231ps\t{%2, %1, %0|%0, %1, %2}", "vfmaddsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmaddsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1804[] = { "vfmaddsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231pd\t{%2, %1, %0|%0, %1, %2}", "vfmaddsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmaddsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1805[] = { "vfmaddsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231pd\t{%2, %1, %0|%0, %1, %2}", "vfmaddsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmaddsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1806[] = { "vfmaddsub132ss\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213ss\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231ss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1807[] = { "vfmaddsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1808[] = { "vfmaddsub132ps\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfmaddsub213ps\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfmaddsub231ps\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1809[] = { "vfmaddsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmaddsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1810[] = { "vfmaddsub132ps\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfmaddsub213ps\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfmaddsub231ps\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1811[] = { "vfmaddsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1812[] = { "vfmaddsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmaddsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1813[] = { "vfmaddsub132ps\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1814[] = { "vfmaddsub132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmaddsub231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1815[] = { "vfmaddsub132sd\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213sd\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231sd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1816[] = { "vfmaddsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1817[] = { "vfmaddsub132pd\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfmaddsub213pd\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfmaddsub231pd\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1818[] = { "vfmaddsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmaddsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1819[] = { "vfmaddsub132pd\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfmaddsub213pd\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfmaddsub231pd\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1820[] = { "vfmaddsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1821[] = { "vfmaddsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmaddsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1822[] = { "vfmaddsub132pd\t{%2, %3, %0|%0, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0|%0, %2, %3}", "vfmaddsub231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1823[] = { "vfmaddsub132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmaddsub231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1824[] = { "vfmaddsub132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1825[] = { "vfmaddsub132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmaddsub213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1826[] = { "vfmaddsub132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1827[] = { "vfmaddsub132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmaddsub213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1828[] = { "vfmaddsub132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmaddsub213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1829[] = { "vfmaddsub132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmaddsub213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1830[] = { "vfmaddsub132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1831[] = { "vfmaddsub132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmaddsub213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1832[] = { "vfmaddsub132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1833[] = { "vfmaddsub132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmaddsub213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1834[] = { "vfmaddsub132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmaddsub213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1835[] = { "vfmaddsub132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmaddsub213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1848[] = { "vfmsubadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231ps\t{%2, %1, %0|%0, %1, %2}", "vfmsubaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmsubaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1849[] = { "vfmsubadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231ps\t{%2, %1, %0|%0, %1, %2}", "vfmsubaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmsubaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1850[] = { "vfmsubadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231pd\t{%2, %1, %0|%0, %1, %2}", "vfmsubaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmsubaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1851[] = { "vfmsubadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231pd\t{%2, %1, %0|%0, %1, %2}", "vfmsubaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", "vfmsubaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_1852[] = { "vfmsubadd132ss\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213ss\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231ss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1853[] = { "vfmsubadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1854[] = { "vfmsubadd132ps\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfmsubadd213ps\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfmsubadd231ps\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1855[] = { "vfmsubadd132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsubadd231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1856[] = { "vfmsubadd132ps\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfmsubadd213ps\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfmsubadd231ps\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1857[] = { "vfmsubadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1858[] = { "vfmsubadd132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsubadd231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1859[] = { "vfmsubadd132ps\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231ps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1860[] = { "vfmsubadd132ps\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsubadd231ps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1861[] = { "vfmsubadd132sd\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213sd\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231sd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1862[] = { "vfmsubadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1863[] = { "vfmsubadd132pd\t{%R4%2, %3, %0|%0, %3, %2%R4}", "vfmsubadd213pd\t{%R4%3, %2, %0|%0, %2, %3%R4}", "vfmsubadd231pd\t{%R4%2, %1, %0|%0, %1, %2%R4}", }; static const char * const output_1864[] = { "vfmsubadd132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsubadd231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1865[] = { "vfmsubadd132pd\t{%R6%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2%R6}", "vfmsubadd213pd\t{%R6%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3%R6}", "vfmsubadd231pd\t{%R6%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2%R6}", }; static const char * const output_1866[] = { "vfmsubadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1867[] = { "vfmsubadd132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsubadd231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1868[] = { "vfmsubadd132pd\t{%2, %3, %0|%0, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0|%0, %2, %3}", "vfmsubadd231pd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1869[] = { "vfmsubadd132pd\t{%2, %3, %0%{%5%}%N4|%0%{%5%}%N4, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", "vfmsubadd231pd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_1870[] = { "vfmsubadd132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1871[] = { "vfmsubadd132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsubadd213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1872[] = { "vfmsubadd132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1873[] = { "vfmsubadd132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsubadd213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1874[] = { "vfmsubadd132ps\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsubadd213ps\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1875[] = { "vfmsubadd132ps\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsubadd213ps\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1876[] = { "vfmsubadd132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1877[] = { "vfmsubadd132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsubadd213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1878[] = { "vfmsubadd132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1879[] = { "vfmsubadd132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsubadd213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1880[] = { "vfmsubadd132pd\t{%2, %3, %0%{%4%}|%0%{%4%}, %3, %2}", "vfmsubadd213pd\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", }; static const char * const output_1881[] = { "vfmsubadd132pd\t{%R5%2, %3, %0%{%4%}|%0%{%4%}, %3, %2%R5}", "vfmsubadd213pd\t{%R5%3, %2, %0%{%4%}|%0%{%4%}, %2, %3%R5}", }; static const char * const output_1894[] = { "vfmadd132ss\t{%2, %3, %0|%0, %k3, %k2}", "vfmadd213ss\t{%3, %2, %0|%0, %k2, %k3}", }; static const char * const output_1895[] = { "vfmadd132ss\t{%R4%2, %3, %0|%0, %k3, %k2%R4}", "vfmadd213ss\t{%R4%3, %2, %0|%0, %k2, %k3%R4}", }; static const char * const output_1896[] = { "vfmadd132sd\t{%2, %3, %0|%0, %q3, %q2}", "vfmadd213sd\t{%3, %2, %0|%0, %q2, %q3}", }; static const char * const output_1897[] = { "vfmadd132sd\t{%R4%2, %3, %0|%0, %q3, %q2%R4}", "vfmadd213sd\t{%R4%3, %2, %0|%0, %q2, %q3%R4}", }; static const char * const output_1898[] = { "vfmsub132ss\t{%2, %3, %0|%0, %k3, %k2}", "vfmsub213ss\t{%3, %2, %0|%0, %k2, %k3}", }; static const char * const output_1899[] = { "vfmsub132ss\t{%R4%2, %3, %0|%0, %k3, %k2%R4}", "vfmsub213ss\t{%R4%3, %2, %0|%0, %k2, %k3%R4}", }; static const char * const output_1900[] = { "vfmsub132sd\t{%2, %3, %0|%0, %q3, %q2}", "vfmsub213sd\t{%3, %2, %0|%0, %q2, %q3}", }; static const char * const output_1901[] = { "vfmsub132sd\t{%R4%2, %3, %0|%0, %q3, %q2%R4}", "vfmsub213sd\t{%R4%3, %2, %0|%0, %q2, %q3%R4}", }; static const char * const output_1902[] = { "vfnmadd132ss\t{%2, %3, %0|%0, %k3, %k2}", "vfnmadd213ss\t{%3, %2, %0|%0, %k2, %k3}", }; static const char * const output_1903[] = { "vfnmadd132ss\t{%R4%2, %3, %0|%0, %k3, %k2%R4}", "vfnmadd213ss\t{%R4%3, %2, %0|%0, %k2, %k3%R4}", }; static const char * const output_1904[] = { "vfnmadd132sd\t{%2, %3, %0|%0, %q3, %q2}", "vfnmadd213sd\t{%3, %2, %0|%0, %q2, %q3}", }; static const char * const output_1905[] = { "vfnmadd132sd\t{%R4%2, %3, %0|%0, %q3, %q2%R4}", "vfnmadd213sd\t{%R4%3, %2, %0|%0, %q2, %q3%R4}", }; static const char * const output_1906[] = { "vfnmsub132ss\t{%2, %3, %0|%0, %k3, %k2}", "vfnmsub213ss\t{%3, %2, %0|%0, %k2, %k3}", }; static const char * const output_1907[] = { "vfnmsub132ss\t{%R4%2, %3, %0|%0, %k3, %k2%R4}", "vfnmsub213ss\t{%R4%3, %2, %0|%0, %k2, %k3%R4}", }; static const char * const output_1908[] = { "vfnmsub132sd\t{%2, %3, %0|%0, %q3, %q2}", "vfnmsub213sd\t{%3, %2, %0|%0, %q2, %q3}", }; static const char * const output_1909[] = { "vfnmsub132sd\t{%R4%2, %3, %0|%0, %q3, %q2%R4}", "vfnmsub213sd\t{%R4%3, %2, %0|%0, %q2, %q3%R4}", }; static const char * const output_1921[] = { "cvtsi2ss\t{%2, %0|%0, %2}", "cvtsi2ss\t{%2, %0|%0, %2}", "vcvtsi2ss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_1922[] = { "cvtsi2ss\t{%2, %0|%0, %2}", "cvtsi2ss\t{%2, %0|%0, %2}", "vcvtsi2ss\t{%R3%2, %1, %0|%0, %1, %2%R3}", }; static const char * const output_2002[] = { "cvtsi2sd\t{%2, %0|%0, %2}", "cvtsi2sd\t{%2, %0|%0, %2}", "vcvtsi2sd\t{%2, %1, %0|%0, %1, %2}", }; static const char * output_2077 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4657 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX) return "vcvtpd2dq{x}\t{%1, %0|%0, %1}"; else return "cvtpd2dq\t{%1, %0|%0, %1}"; } } static const char * output_2078 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4657 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX) return "vcvtpd2dq{x}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; else return "cvtpd2dq\t{%1, %0|%0, %1}"; } } static const char * output_2155 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX) return "vcvttpd2dq{x}\t{%1, %0|%0, %1}"; else return "cvttpd2dq\t{%1, %0|%0, %1}"; } } static const char * output_2156 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4817 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX) return "vcvttpd2dq{x}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"; else return "cvttpd2dq\t{%1, %0|%0, %1}"; } } static const char * const output_2157[] = { "cvtsd2ss\t{%2, %0|%0, %2}", "cvtsd2ss\t{%2, %0|%0, %q2}", "vcvtsd2ss\t{%2, %1, %0|%0, %1, %q2}", }; static const char * const output_2158[] = { "cvtsd2ss\t{%2, %0|%0, %2}", "cvtsd2ss\t{%2, %0|%0, %q2}", "vcvtsd2ss\t{%R3%2, %1, %0|%0, %1, %q2%R3}", }; static const char * const output_2159[] = { "cvtss2sd\t{%2, %0|%0, %2}", "cvtss2sd\t{%2, %0|%0, %k2}", "vcvtss2sd\t{%2, %1, %0|%0, %1, %k2}", }; static const char * const output_2160[] = { "cvtss2sd\t{%2, %0|%0, %2}", "cvtss2sd\t{%2, %0|%0, %k2}", "vcvtss2sd\t{%r3%2, %1, %0|%0, %1, %k2%r3}", }; static const char * output_2167 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4924 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX) return "vcvtpd2ps{x}\t{%1, %0|%0, %1}"; else return "cvtpd2ps\t{%1, %0|%0, %1}"; } } static const char * output_2168 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 4924 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX) return "vcvtpd2ps{x}\t{%1, %0%{%4%}%N3|%0%{%4%}%N3, %1}"; else return "cvtpd2ps\t{%1, %0|%0, %1}"; } } static const char * const output_2203[] = { "movhlps\t{%2, %0|%0, %2}", "vmovhlps\t{%2, %1, %0|%0, %1, %2}", "movlps\t{%H2, %0|%0, %H2}", "vmovlps\t{%H2, %1, %0|%0, %1, %H2}", "%vmovhps\t{%2, %0|%q0, %2}", }; static const char * const output_2204[] = { "movlhps\t{%2, %0|%0, %2}", "vmovlhps\t{%2, %1, %0|%0, %1, %2}", "movhps\t{%2, %0|%0, %q2}", "vmovhps\t{%2, %1, %0|%0, %1, %q2}", "%vmovlps\t{%2, %H0|%H0, %2}", }; static const char * const output_2209[] = { "unpckhps\t{%2, %0|%0, %2}", "vunpckhps\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2210[] = { "unpckhps\t{%2, %0|%0, %2}", "vunpckhps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2216[] = { "unpcklps\t{%2, %0|%0, %2}", "vunpcklps\t{%2, %1, %0|%0, %1, %2}", }; static const char * output_2229 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6063 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= INTVAL (operands[4]) << 2; mask |= (INTVAL (operands[5]) - 8) << 4; mask |= (INTVAL (operands[6]) - 8) << 6; operands[3] = GEN_INT (mask); return "vshufps\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_2230 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6063 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= INTVAL (operands[4]) << 2; mask |= (INTVAL (operands[5]) - 8) << 4; mask |= (INTVAL (operands[6]) - 8) << 6; operands[3] = GEN_INT (mask); return "vshufps\t{%3, %2, %1, %0%{%12%}%N11|%0%{%12%}%N11, %1, %2, %3}"; } } static const char * output_2231 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6111 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[3]) << 0; mask |= INTVAL (operands[4]) << 2; mask |= (INTVAL (operands[5]) - 4) << 4; mask |= (INTVAL (operands[6]) - 4) << 6; operands[3] = GEN_INT (mask); return "vshufps\t{%3, %2, %1, %0%{%8%}%N7|%0%{%8%}%N7, %1, %2, %3}"; } } static const char * output_2232 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6137 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[3]) << 0; mask |= INTVAL (operands[4]) << 2; mask |= (INTVAL (operands[5]) - 4) << 4; mask |= (INTVAL (operands[6]) - 4) << 6; operands[3] = GEN_INT (mask); switch (which_alternative) { case 0: return "shufps\t{%3, %2, %0|%0, %2, %3}"; case 1: return "vshufps\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * output_2233 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6137 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[3]) << 0; mask |= INTVAL (operands[4]) << 2; mask |= (INTVAL (operands[5]) - 4) << 4; mask |= (INTVAL (operands[6]) - 4) << 6; operands[3] = GEN_INT (mask); switch (which_alternative) { case 0: return "shufps\t{%3, %2, %0|%0, %2, %3}"; case 1: return "vshufps\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * const output_2234[] = { "%vmovhps\t{%1, %0|%q0, %1}", "%vmovhlps\t{%1, %d0|%d0, %1}", "%vmovlps\t{%H1, %d0|%d0, %H1}", }; static const char * const output_2235[] = { "movhps\t{%2, %0|%0, %q2}", "vmovhps\t{%2, %1, %0|%0, %1, %q2}", "movlhps\t{%2, %0|%0, %2}", "vmovlhps\t{%2, %1, %0|%0, %1, %2}", "%vmovlps\t{%2, %H0|%H0, %2}", }; static const char * const output_2236[] = { "%vmovlps\t{%1, %0|%q0, %1}", "%vmovaps\t{%1, %0|%0, %1}", "%vmovlps\t{%1, %d0|%d0, %q1}", }; static const char * const output_2237[] = { "shufps\t{$0xe4, %1, %0|%0, %1, 0xe4}", "vshufps\t{$0xe4, %1, %2, %0|%0, %2, %1, 0xe4}", "movlps\t{%2, %0|%0, %q2}", "vmovlps\t{%2, %1, %0|%0, %1, %q2}", "%vmovlps\t{%2, %0|%q0, %2}", }; static const char * const output_2238[] = { "movss\t{%2, %0|%0, %2}", "vmovss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2244[] = { "unpcklps\t{%2, %0|%0, %2}", "unpcklps\t{%2, %0|%0, %2}", "vunpcklps\t{%2, %1, %0|%0, %1, %2}", "insertps\t{$0x10, %2, %0|%0, %2, 0x10}", "insertps\t{$0x10, %2, %0|%0, %2, 0x10}", "vinsertps\t{$0x10, %2, %1, %0|%0, %1, %2, 0x10}", "%vmovss\t{%1, %0|%0, %1}", "punpckldq\t{%2, %0|%0, %2}", "movd\t{%1, %0|%0, %1}", }; static const char * const output_2245[] = { "unpcklps\t{%2, %0|%0, %2}", "movss\t{%1, %0|%0, %1}", "punpckldq\t{%2, %0|%0, %2}", "movd\t{%1, %0|%0, %1}", }; static const char * const output_2246[] = { "movlhps\t{%2, %0|%0, %2}", "vmovlhps\t{%2, %1, %0|%0, %1, %2}", "movhps\t{%2, %0|%0, %q2}", "vmovhps\t{%2, %1, %0|%0, %1, %q2}", }; static const char * const output_2247[] = { "%vinsertps\t{$0xe, %d2, %0|%0, %d2, 0xe}", "%vinsertps\t{$0xe, %d2, %0|%0, %d2, 0xe}", "%vmovd\t{%2, %0|%0, %2}", "%vmovd\t{%2, %0|%0, %2}", "movss\t{%2, %0|%0, %2}", "movss\t{%2, %0|%0, %2}", "vmovss\t{%2, %1, %0|%0, %1, %2}", "pinsrd\t{$0, %2, %0|%0, %2, 0}", "pinsrd\t{$0, %2, %0|%0, %2, 0}", "vpinsrd\t{$0, %2, %1, %0|%0, %1, %2, 0}", "#", "#", "#", }; static const char * const output_2248[] = { "%vinsertps\t{$0xe, %d2, %0|%0, %d2, 0xe}", "%vinsertps\t{$0xe, %d2, %0|%0, %d2, 0xe}", "%vmovss\t{%2, %0|%0, %2}", "%vmovd\t{%2, %0|%0, %2}", "movss\t{%2, %0|%0, %2}", "movss\t{%2, %0|%0, %2}", "vmovss\t{%2, %1, %0|%0, %1, %2}", "pinsrd\t{$0, %2, %0|%0, %2, 0}", "pinsrd\t{$0, %2, %0|%0, %2, 0}", "vpinsrd\t{$0, %2, %1, %0|%0, %1, %2, 0}", "#", "#", "#", }; static const char * output_2249 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6443 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3])) << 4); switch (which_alternative) { case 0: case 1: return "insertps\t{%3, %2, %0|%0, %2, %3}"; case 2: return "vinsertps\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * output_2250 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6471 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (MEM_P (operands[2])) { unsigned count_s = INTVAL (operands[3]) >> 6; if (count_s) operands[3] = GEN_INT (INTVAL (operands[3]) & 0x3f); operands[2] = adjust_address_nv (operands[2], SFmode, count_s * 4); } switch (which_alternative) { case 0: case 1: return "insertps\t{%3, %2, %0|%0, %2, %3}"; case 2: return "vinsertps\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * const output_2252[] = { "%vextractps\t{%2, %1, %0|%0, %1, %2}", "%vextractps\t{%2, %1, %0|%0, %1, %2}", "#", "#", }; static const char * output_2254 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6638 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 1); return "vextractf64x2\t{%2, %1, %0%{%5%}|%0%{%5%}, %1, %2}"; } } static const char * output_2255 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6638 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 1); return "vextracti64x2\t{%2, %1, %0%{%5%}|%0%{%5%}, %1, %2}"; } } static const char * output_2256 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6666 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2); return "vextractf32x4\t{%2, %1, %0%{%7%}|%0%{%7%}, %1, %2}"; } } static const char * output_2257 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6666 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2); return "vextracti32x4\t{%2, %1, %0%{%7%}|%0%{%7%}, %1, %2}"; } } static const char * output_2258 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6684 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 1); return "vextractf64x2\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_2259 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6684 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 1); return "vextractf64x2\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}"; } } static const char * output_2260 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6684 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 1); return "vextracti64x2\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_2261 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6684 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 1); return "vextracti64x2\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}"; } } static const char * output_2262 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6706 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2); return "vextractf32x4\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_2263 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6706 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2); return "vextractf32x4\t{%2, %1, %0%{%7%}%N6|%0%{%7%}%N6, %1, %2}"; } } static const char * output_2264 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6706 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2); return "vextracti32x4\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_2265 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6706 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2); return "vextracti32x4\t{%2, %1, %0%{%7%}%N6|%0%{%7%}%N6, %1, %2}"; } } static const char * output_2268 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6798 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (false) return "vextractf64x4\t{$0x0, %1, %0|%0, %1, 0x0}"; else return "#"; } } static const char * output_2269 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6798 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (true) return "vextractf64x4\t{$0x0, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x0}"; else return "#"; } } static const char * output_2270 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6798 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (false) return "vextracti64x4\t{$0x0, %1, %0|%0, %1, 0x0}"; else return "#"; } } static const char * output_2271 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6798 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (true) return "vextracti64x4\t{$0x0, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x0}"; else return "#"; } } static const char * const output_2280[] = { "vextractf32x8\t{$0x1, %1, %0|%0, %1, 0x1}", "vextracti64x4\t{$0x1, %1, %0|%0, %1, 0x1}", }; static const char * const output_2281[] = { "vextractf32x8\t{$0x1, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x1}", "vextracti64x4\t{$0x1, %1, %0|%0, %1, 0x1}", }; static const char * const output_2282[] = { "vextracti32x8\t{$0x1, %1, %0|%0, %1, 0x1}", "vextracti64x4\t{$0x1, %1, %0|%0, %1, 0x1}", }; static const char * const output_2283[] = { "vextracti32x8\t{$0x1, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x1}", "vextracti64x4\t{$0x1, %1, %0|%0, %1, 0x1}", }; static const char * output_2284 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6946 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (false) return "vextractf32x8\t{$0x0, %1, %0|%0, %1, 0x0}"; else return "#"; } } static const char * output_2285 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6946 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (true) return "vextractf32x8\t{$0x0, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x0}"; else return "#"; } } static const char * output_2286 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6946 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (false) return "vextracti32x8\t{$0x0, %1, %0|%0, %1, 0x0}"; else return "#"; } } static const char * output_2287 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6946 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (true) return "vextracti32x8\t{$0x0, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x0}"; else return "#"; } } static const char * output_2288 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6982 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (false) return "vextracti64x2\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}"; else return "#"; } } static const char * output_2289 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6982 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (true) return "vextracti64x2\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}"; else return "#"; } } static const char * output_2290 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6982 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (false) return "vextractf64x2\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}"; else return "#"; } } static const char * output_2291 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 6982 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (true) return "vextractf64x2\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}"; else return "#"; } } static const char * output_2292 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7019 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) { if (TARGET_AVX512DQ) return "vextracti64x2\t{$0x1, %1, %0|%0, %1, 0x1}"; else return "vextracti32x4\t{$0x1, %1, %0|%0, %1, 0x1}"; } else return "vextract%~128\t{$0x1, %1, %0|%0, %1, 0x1}"; } } static const char * output_2293 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7019 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) { if (TARGET_AVX512DQ) return "vextracti64x2\t{$0x1, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x1}"; else return "vextracti32x4\t{$0x1, %1, %0|%0, %1, 0x1}"; } else return "vextract%~128\t{$0x1, %1, %0|%0, %1, 0x1}"; } } static const char * output_2294 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7019 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) { if (TARGET_AVX512DQ) return "vextractf64x2\t{$0x1, %1, %0|%0, %1, 0x1}"; else return "vextractf32x4\t{$0x1, %1, %0|%0, %1, 0x1}"; } else return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"; } } static const char * output_2295 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7019 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) { if (TARGET_AVX512DQ) return "vextractf64x2\t{$0x1, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x1}"; else return "vextractf32x4\t{$0x1, %1, %0|%0, %1, 0x1}"; } else return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"; } } static const char * output_2296 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7063 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (false) return "vextracti32x4\t{$0x0, %1, %0|%0, %1, 0x0}"; else return "#"; } } static const char * output_2297 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7063 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (true) return "vextracti32x4\t{$0x0, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x0}"; else return "#"; } } static const char * output_2298 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7063 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (false) return "vextractf32x4\t{$0x0, %1, %0|%0, %1, 0x0}"; else return "#"; } } static const char * output_2299 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7063 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (true) return "vextractf32x4\t{$0x0, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x0}"; else return "#"; } } static const char * output_2304 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7118 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vextracti32x4\t{$0x1, %1, %0|%0, %1, 0x1}"; else return "vextract%~128\t{$0x1, %1, %0|%0, %1, 0x1}"; } } static const char * output_2305 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7118 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vextracti32x4\t{$0x1, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x1}"; else return "vextract%~128\t{$0x1, %1, %0|%0, %1, 0x1}"; } } static const char * output_2306 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7118 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vextractf32x4\t{$0x1, %1, %0|%0, %1, 0x1}"; else return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"; } } static const char * output_2307 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7118 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vextractf32x4\t{$0x1, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x1}"; else return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"; } } static const char * const output_2321[] = { "unpckhpd\t{%2, %0|%0, %2}", "vunpckhpd\t{%2, %1, %0|%0, %1, %2}", "%vmovddup\t{%H1, %0|%0, %H1}", "movlpd\t{%H1, %0|%0, %H1}", "vmovlpd\t{%H1, %2, %0|%0, %2, %H1}", "%vmovhpd\t{%1, %0|%q0, %1}", }; static const char * const output_2322[] = { "vmovddup\t{%1, %0|%0, %1}", "vunpcklpd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2323[] = { "vmovddup\t{%1, %0%{%4%}%N3|%0%{%4%}%N3, %1}", "vunpcklpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2324[] = { "vunpcklpd\t{%2, %1, %0|%0, %1, %2}", "vmovddup\t{%1, %0|%0, %1}", }; static const char * const output_2325[] = { "vunpcklpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", "vmovddup\t{%1, %0%{%4%}%N3|%0%{%4%}%N3, %1}", }; static const char * const output_2327[] = { "unpcklpd\t{%2, %0|%0, %2}", "vunpcklpd\t{%2, %1, %0|%0, %1, %2}", "%vmovddup\t{%1, %0|%0, %q1}", "movhpd\t{%2, %0|%0, %q2}", "vmovhpd\t{%2, %1, %0|%0, %1, %q2}", "%vmovlpd\t{%2, %H0|%H0, %2}", }; static const char * output_2490 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7945 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= INTVAL (operands[4]) << 2; mask |= (INTVAL (operands[5]) - 16) << 4; mask |= (INTVAL (operands[6]) - 16) << 6; operands[3] = GEN_INT (mask); return "vshufps\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_2491 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7945 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= INTVAL (operands[4]) << 2; mask |= (INTVAL (operands[5]) - 16) << 4; mask |= (INTVAL (operands[6]) - 16) << 6; operands[3] = GEN_INT (mask); return "vshufps\t{%3, %2, %1, %0%{%20%}%N19|%0%{%20%}%N19, %1, %2, %3}"; } } static const char * output_2492 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7998 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= (INTVAL (operands[4]) - 8) << 1; mask |= (INTVAL (operands[5]) - 2) << 2; mask |= (INTVAL (operands[6]) - 10) << 3; mask |= (INTVAL (operands[7]) - 4) << 4; mask |= (INTVAL (operands[8]) - 12) << 5; mask |= (INTVAL (operands[9]) - 6) << 6; mask |= (INTVAL (operands[10]) - 14) << 7; operands[3] = GEN_INT (mask); return "vshufpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_2493 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 7998 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= (INTVAL (operands[4]) - 8) << 1; mask |= (INTVAL (operands[5]) - 2) << 2; mask |= (INTVAL (operands[6]) - 10) << 3; mask |= (INTVAL (operands[7]) - 4) << 4; mask |= (INTVAL (operands[8]) - 12) << 5; mask |= (INTVAL (operands[9]) - 6) << 6; mask |= (INTVAL (operands[10]) - 14) << 7; operands[3] = GEN_INT (mask); return "vshufpd\t{%3, %2, %1, %0%{%12%}%N11|%0%{%12%}%N11, %1, %2, %3}"; } } static const char * output_2494 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 8047 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= (INTVAL (operands[4]) - 4) << 1; mask |= (INTVAL (operands[5]) - 2) << 2; mask |= (INTVAL (operands[6]) - 6) << 3; operands[3] = GEN_INT (mask); return "vshufpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_2495 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 8047 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= (INTVAL (operands[4]) - 4) << 1; mask |= (INTVAL (operands[5]) - 2) << 2; mask |= (INTVAL (operands[6]) - 6) << 3; operands[3] = GEN_INT (mask); return "vshufpd\t{%3, %2, %1, %0%{%8%}%N7|%0%{%8%}%N7, %1, %2, %3}"; } } static const char * output_2496 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 8089 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= (INTVAL (operands[4]) - 2) << 1; operands[3] = GEN_INT (mask); return "vshufpd\t{%3, %2, %1, %0%{%6%}%N5|%0%{6%}%N5, %1, %2, %3}"; } } static const char * const output_2501[] = { "punpckhqdq\t{%2, %0|%0, %2}", "vpunpckhqdq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2502[] = { "punpckhqdq\t{%2, %0|%0, %2}", "vpunpckhqdq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2507[] = { "punpcklqdq\t{%2, %0|%0, %2}", "vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2508[] = { "punpcklqdq\t{%2, %0|%0, %2}", "vpunpcklqdq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * output_2509 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 8212 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= (INTVAL (operands[4]) - 2) << 1; operands[3] = GEN_INT (mask); switch (which_alternative) { case 0: return "shufpd\t{%3, %2, %0|%0, %2, %3}"; case 1: return "vshufpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * output_2510 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 8212 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]); mask |= (INTVAL (operands[4]) - 2) << 1; operands[3] = GEN_INT (mask); switch (which_alternative) { case 0: return "shufpd\t{%3, %2, %0|%0, %2, %3}"; case 1: return "vshufpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * const output_2511[] = { "%vmovhpd\t{%1, %0|%0, %1}", "unpckhpd\t%0, %0", "vunpckhpd\t{%d1, %0|%0, %d1}", "#", "#", "#", }; static const char * const output_2512[] = { "movhps\t{%1, %0|%q0, %1}", "movhlps\t{%1, %0|%0, %1}", "movlps\t{%H1, %0|%0, %H1}", }; static const char * const output_2513[] = { "%vmovlpd\t{%1, %0|%0, %1}", "#", "#", "#", "#", }; static const char * const output_2514[] = { "movlps\t{%1, %0|%0, %1}", "movaps\t{%1, %0|%0, %1}", "movlps\t{%1, %0|%0, %q1}", }; static const char * const output_2515[] = { "movhpd\t{%2, %0|%0, %2}", "vmovhpd\t{%2, %1, %0|%0, %1, %2}", "unpcklpd\t{%2, %0|%0, %2}", "vunpcklpd\t{%2, %1, %0|%0, %1, %2}", "#", "#", "#", }; static const char * const output_2516[] = { "%vmovsd\t{%2, %0|%0, %2}", "movlpd\t{%2, %0|%0, %2}", "vmovlpd\t{%2, %1, %0|%0, %1, %2}", "movsd\t{%2, %0|%0, %2}", "vmovsd\t{%2, %1, %0|%0, %1, %2}", "shufpd\t{$2, %1, %0|%0, %1, 2}", "movhpd\t{%H1, %0|%0, %H1}", "vmovhpd\t{%H1, %2, %0|%0, %2, %H1}", "#", "#", "#", }; static const char * const output_2517[] = { "movsd\t{%2, %0|%0, %2}", "vmovsd\t{%2, %1, %0|%0, %1, %2}", "movlpd\t{%2, %0|%0, %q2}", "vmovlpd\t{%2, %1, %0|%0, %1, %q2}", "%vmovlpd\t{%2, %0|%q0, %2}", "shufpd\t{$2, %1, %0|%0, %1, 2}", "movhps\t{%H1, %0|%0, %H1}", "vmovhps\t{%H1, %2, %0|%0, %2, %H1}", "%vmovhps\t{%1, %H0|%H0, %1}", }; static const char * const output_2518[] = { "unpcklpd\t%0, %0", "%vmovddup\t{%1, %0|%0, %1}", }; static const char * const output_2519[] = { "unpcklpd\t%0, %0", "%vmovddup\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_2520[] = { "unpcklpd\t{%2, %0|%0, %2}", "vunpcklpd\t{%2, %1, %0|%0, %1, %2}", "%vmovddup\t{%1, %0|%0, %1}", "movhpd\t{%2, %0|%0, %2}", "vmovhpd\t{%2, %1, %0|%0, %1, %2}", "%vmovsd\t{%1, %0|%0, %1}", "movlhps\t{%2, %0|%0, %2}", "movhps\t{%2, %0|%0, %2}", }; static const char * const output_2689[] = { "paddb\t{%2, %0|%0, %2}", "vpaddb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2690[] = { "paddb\t{%2, %0|%0, %2}", "vpaddb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2691[] = { "psubb\t{%2, %0|%0, %2}", "vpsubb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2692[] = { "psubb\t{%2, %0|%0, %2}", "vpsubb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2693[] = { "paddb\t{%2, %0|%0, %2}", "vpaddb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2694[] = { "paddb\t{%2, %0|%0, %2}", "vpaddb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2695[] = { "psubb\t{%2, %0|%0, %2}", "vpsubb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2696[] = { "psubb\t{%2, %0|%0, %2}", "vpsubb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2697[] = { "paddb\t{%2, %0|%0, %2}", "vpaddb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2698[] = { "paddb\t{%2, %0|%0, %2}", "vpaddb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2699[] = { "psubb\t{%2, %0|%0, %2}", "vpsubb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2700[] = { "psubb\t{%2, %0|%0, %2}", "vpsubb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2701[] = { "paddw\t{%2, %0|%0, %2}", "vpaddw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2702[] = { "paddw\t{%2, %0|%0, %2}", "vpaddw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2703[] = { "psubw\t{%2, %0|%0, %2}", "vpsubw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2704[] = { "psubw\t{%2, %0|%0, %2}", "vpsubw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2705[] = { "paddw\t{%2, %0|%0, %2}", "vpaddw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2706[] = { "paddw\t{%2, %0|%0, %2}", "vpaddw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2707[] = { "psubw\t{%2, %0|%0, %2}", "vpsubw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2708[] = { "psubw\t{%2, %0|%0, %2}", "vpsubw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2709[] = { "paddw\t{%2, %0|%0, %2}", "vpaddw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2710[] = { "paddw\t{%2, %0|%0, %2}", "vpaddw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2711[] = { "psubw\t{%2, %0|%0, %2}", "vpsubw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2712[] = { "psubw\t{%2, %0|%0, %2}", "vpsubw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2713[] = { "paddd\t{%2, %0|%0, %2}", "vpaddd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2714[] = { "paddd\t{%2, %0|%0, %2}", "vpaddd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2715[] = { "psubd\t{%2, %0|%0, %2}", "vpsubd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2716[] = { "psubd\t{%2, %0|%0, %2}", "vpsubd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2717[] = { "paddd\t{%2, %0|%0, %2}", "vpaddd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2718[] = { "paddd\t{%2, %0|%0, %2}", "vpaddd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2719[] = { "psubd\t{%2, %0|%0, %2}", "vpsubd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2720[] = { "psubd\t{%2, %0|%0, %2}", "vpsubd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2721[] = { "paddd\t{%2, %0|%0, %2}", "vpaddd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2722[] = { "paddd\t{%2, %0|%0, %2}", "vpaddd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2723[] = { "psubd\t{%2, %0|%0, %2}", "vpsubd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2724[] = { "psubd\t{%2, %0|%0, %2}", "vpsubd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2725[] = { "paddq\t{%2, %0|%0, %2}", "vpaddq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2726[] = { "paddq\t{%2, %0|%0, %2}", "vpaddq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2727[] = { "psubq\t{%2, %0|%0, %2}", "vpsubq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2728[] = { "psubq\t{%2, %0|%0, %2}", "vpsubq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2729[] = { "paddq\t{%2, %0|%0, %2}", "vpaddq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2730[] = { "paddq\t{%2, %0|%0, %2}", "vpaddq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2731[] = { "psubq\t{%2, %0|%0, %2}", "vpsubq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2732[] = { "psubq\t{%2, %0|%0, %2}", "vpsubq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2733[] = { "paddq\t{%2, %0|%0, %2}", "vpaddq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2734[] = { "paddq\t{%2, %0|%0, %2}", "vpaddq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2735[] = { "psubq\t{%2, %0|%0, %2}", "vpsubq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2736[] = { "psubq\t{%2, %0|%0, %2}", "vpsubq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2761[] = { "paddsb\t{%2, %0|%0, %2}", "vpaddsb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2762[] = { "paddsb\t{%2, %0|%0, %2}", "vpaddsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2763[] = { "paddusb\t{%2, %0|%0, %2}", "vpaddusb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2764[] = { "paddusb\t{%2, %0|%0, %2}", "vpaddusb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2765[] = { "psubsb\t{%2, %0|%0, %2}", "vpsubsb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2766[] = { "psubsb\t{%2, %0|%0, %2}", "vpsubsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2767[] = { "psubusb\t{%2, %0|%0, %2}", "vpsubusb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2768[] = { "psubusb\t{%2, %0|%0, %2}", "vpsubusb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2769[] = { "paddsb\t{%2, %0|%0, %2}", "vpaddsb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2770[] = { "paddsb\t{%2, %0|%0, %2}", "vpaddsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2771[] = { "paddusb\t{%2, %0|%0, %2}", "vpaddusb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2772[] = { "paddusb\t{%2, %0|%0, %2}", "vpaddusb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2773[] = { "psubsb\t{%2, %0|%0, %2}", "vpsubsb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2774[] = { "psubsb\t{%2, %0|%0, %2}", "vpsubsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2775[] = { "psubusb\t{%2, %0|%0, %2}", "vpsubusb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2776[] = { "psubusb\t{%2, %0|%0, %2}", "vpsubusb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2777[] = { "paddsb\t{%2, %0|%0, %2}", "vpaddsb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2778[] = { "paddsb\t{%2, %0|%0, %2}", "vpaddsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2779[] = { "paddusb\t{%2, %0|%0, %2}", "vpaddusb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2780[] = { "paddusb\t{%2, %0|%0, %2}", "vpaddusb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2781[] = { "psubsb\t{%2, %0|%0, %2}", "vpsubsb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2782[] = { "psubsb\t{%2, %0|%0, %2}", "vpsubsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2783[] = { "psubusb\t{%2, %0|%0, %2}", "vpsubusb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2784[] = { "psubusb\t{%2, %0|%0, %2}", "vpsubusb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2785[] = { "paddsw\t{%2, %0|%0, %2}", "vpaddsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2786[] = { "paddsw\t{%2, %0|%0, %2}", "vpaddsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2787[] = { "paddusw\t{%2, %0|%0, %2}", "vpaddusw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2788[] = { "paddusw\t{%2, %0|%0, %2}", "vpaddusw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2789[] = { "psubsw\t{%2, %0|%0, %2}", "vpsubsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2790[] = { "psubsw\t{%2, %0|%0, %2}", "vpsubsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2791[] = { "psubusw\t{%2, %0|%0, %2}", "vpsubusw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2792[] = { "psubusw\t{%2, %0|%0, %2}", "vpsubusw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2793[] = { "paddsw\t{%2, %0|%0, %2}", "vpaddsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2794[] = { "paddsw\t{%2, %0|%0, %2}", "vpaddsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2795[] = { "paddusw\t{%2, %0|%0, %2}", "vpaddusw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2796[] = { "paddusw\t{%2, %0|%0, %2}", "vpaddusw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2797[] = { "psubsw\t{%2, %0|%0, %2}", "vpsubsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2798[] = { "psubsw\t{%2, %0|%0, %2}", "vpsubsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2799[] = { "psubusw\t{%2, %0|%0, %2}", "vpsubusw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2800[] = { "psubusw\t{%2, %0|%0, %2}", "vpsubusw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2801[] = { "paddsw\t{%2, %0|%0, %2}", "vpaddsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2802[] = { "paddsw\t{%2, %0|%0, %2}", "vpaddsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2803[] = { "paddusw\t{%2, %0|%0, %2}", "vpaddusw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2804[] = { "paddusw\t{%2, %0|%0, %2}", "vpaddusw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2805[] = { "psubsw\t{%2, %0|%0, %2}", "vpsubsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2806[] = { "psubsw\t{%2, %0|%0, %2}", "vpsubsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2807[] = { "psubusw\t{%2, %0|%0, %2}", "vpsubusw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2808[] = { "psubusw\t{%2, %0|%0, %2}", "vpsubusw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2809[] = { "pmullw\t{%2, %0|%0, %2}", "vpmullw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2810[] = { "pmullw\t{%2, %0|%0, %2}", "vpmullw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2811[] = { "pmullw\t{%2, %0|%0, %2}", "vpmullw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2812[] = { "pmullw\t{%2, %0|%0, %2}", "vpmullw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2813[] = { "pmullw\t{%2, %0|%0, %2}", "vpmullw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2814[] = { "pmullw\t{%2, %0|%0, %2}", "vpmullw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2815[] = { "pmulhw\t{%2, %0|%0, %2}", "vpmulhw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2816[] = { "pmulhw\t{%2, %0|%0, %2}", "vpmulhw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2817[] = { "pmulhuw\t{%2, %0|%0, %2}", "vpmulhuw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2818[] = { "pmulhuw\t{%2, %0|%0, %2}", "vpmulhuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2819[] = { "pmulhw\t{%2, %0|%0, %2}", "vpmulhw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2820[] = { "pmulhw\t{%2, %0|%0, %2}", "vpmulhw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2821[] = { "pmulhuw\t{%2, %0|%0, %2}", "vpmulhuw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2822[] = { "pmulhuw\t{%2, %0|%0, %2}", "vpmulhuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2823[] = { "pmulhw\t{%2, %0|%0, %2}", "vpmulhw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2824[] = { "pmulhw\t{%2, %0|%0, %2}", "vpmulhw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2825[] = { "pmulhuw\t{%2, %0|%0, %2}", "vpmulhuw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2826[] = { "pmulhuw\t{%2, %0|%0, %2}", "vpmulhuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2831[] = { "pmuludq\t{%2, %0|%0, %2}", "vpmuludq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2832[] = { "pmuludq\t{%2, %0|%0, %2}", "vpmuludq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2837[] = { "pmuldq\t{%2, %0|%0, %2}", "pmuldq\t{%2, %0|%0, %2}", "vpmuldq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2838[] = { "pmuldq\t{%2, %0|%0, %2}", "pmuldq\t{%2, %0|%0, %2}", "vpmuldq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2846[] = { "pmaddwd\t{%2, %0|%0, %2}", "vpmaddwd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2853[] = { "pmulld\t{%2, %0|%0, %2}", "pmulld\t{%2, %0|%0, %2}", "vpmulld\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2854[] = { "pmulld\t{%2, %0|%0, %2}", "pmulld\t{%2, %0|%0, %2}", "vpmulld\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2855[] = { "pmulld\t{%2, %0|%0, %2}", "pmulld\t{%2, %0|%0, %2}", "vpmulld\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2856[] = { "pmulld\t{%2, %0|%0, %2}", "pmulld\t{%2, %0|%0, %2}", "vpmulld\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2857[] = { "pmulld\t{%2, %0|%0, %2}", "pmulld\t{%2, %0|%0, %2}", "vpmulld\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2858[] = { "pmulld\t{%2, %0|%0, %2}", "pmulld\t{%2, %0|%0, %2}", "vpmulld\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2859[] = { "psraw\t{%2, %0|%0, %2}", "vpsraw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2860[] = { "psraw\t{%2, %0|%0, %2}", "vpsraw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2861[] = { "psrad\t{%2, %0|%0, %2}", "vpsrad\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2862[] = { "psrad\t{%2, %0|%0, %2}", "vpsrad\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2881[] = { "psllw\t{%2, %0|%0, %2}", "vpsllw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2882[] = { "psllw\t{%2, %0|%0, %2}", "vpsllw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2883[] = { "psrlw\t{%2, %0|%0, %2}", "vpsrlw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2884[] = { "psrlw\t{%2, %0|%0, %2}", "vpsrlw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2885[] = { "psllw\t{%2, %0|%0, %2}", "vpsllw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2886[] = { "psllw\t{%2, %0|%0, %2}", "vpsllw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2887[] = { "psrlw\t{%2, %0|%0, %2}", "vpsrlw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2888[] = { "psrlw\t{%2, %0|%0, %2}", "vpsrlw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2889[] = { "psllw\t{%2, %0|%0, %2}", "vpsllw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2890[] = { "psllw\t{%2, %0|%0, %2}", "vpsllw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2891[] = { "psrlw\t{%2, %0|%0, %2}", "vpsrlw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2892[] = { "psrlw\t{%2, %0|%0, %2}", "vpsrlw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2893[] = { "pslld\t{%2, %0|%0, %2}", "vpslld\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2894[] = { "pslld\t{%2, %0|%0, %2}", "vpslld\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2895[] = { "psrld\t{%2, %0|%0, %2}", "vpsrld\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2896[] = { "psrld\t{%2, %0|%0, %2}", "vpsrld\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2897[] = { "pslld\t{%2, %0|%0, %2}", "vpslld\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2898[] = { "pslld\t{%2, %0|%0, %2}", "vpslld\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2899[] = { "psrld\t{%2, %0|%0, %2}", "vpsrld\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2900[] = { "psrld\t{%2, %0|%0, %2}", "vpsrld\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2901[] = { "psllq\t{%2, %0|%0, %2}", "vpsllq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2902[] = { "psllq\t{%2, %0|%0, %2}", "vpsllq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2903[] = { "psrlq\t{%2, %0|%0, %2}", "vpsrlq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2904[] = { "psrlq\t{%2, %0|%0, %2}", "vpsrlq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2905[] = { "psllq\t{%2, %0|%0, %2}", "vpsllq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2906[] = { "psllq\t{%2, %0|%0, %2}", "vpsllq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_2907[] = { "psrlq\t{%2, %0|%0, %2}", "vpsrlq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_2908[] = { "psrlq\t{%2, %0|%0, %2}", "vpsrlq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * output_2917 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10031 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT (INTVAL (operands[2]) / 8); switch (which_alternative) { case 0: return "pslldq\t{%2, %0|%0, %2}"; case 1: return "vpslldq\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_2918 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10031 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT (INTVAL (operands[2]) / 8); switch (which_alternative) { case 0: return "pslldq\t{%2, %0|%0, %2}"; case 1: return "vpslldq\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_2919 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10031 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT (INTVAL (operands[2]) / 8); switch (which_alternative) { case 0: return "pslldq\t{%2, %0|%0, %2}"; case 1: return "vpslldq\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_2920 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10070 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT (INTVAL (operands[2]) / 8); switch (which_alternative) { case 0: return "psrldq\t{%2, %0|%0, %2}"; case 1: return "vpsrldq\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_2921 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10070 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT (INTVAL (operands[2]) / 8); switch (which_alternative) { case 0: return "psrldq\t{%2, %0|%0, %2}"; case 1: return "vpsrldq\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_2922 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10070 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[2] = GEN_INT (INTVAL (operands[2]) / 8); switch (which_alternative) { case 0: return "psrldq\t{%2, %0|%0, %2}"; case 1: return "vpsrldq\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * const output_3079[] = { "pmaxsb\t{%2, %0|%0, %2}", "pmaxsb\t{%2, %0|%0, %2}", "vpmaxsb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3080[] = { "pmaxsb\t{%2, %0|%0, %2}", "pmaxsb\t{%2, %0|%0, %2}", "vpmaxsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3081[] = { "pminsb\t{%2, %0|%0, %2}", "pminsb\t{%2, %0|%0, %2}", "vpminsb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3082[] = { "pminsb\t{%2, %0|%0, %2}", "pminsb\t{%2, %0|%0, %2}", "vpminsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3083[] = { "pmaxsd\t{%2, %0|%0, %2}", "pmaxsd\t{%2, %0|%0, %2}", "vpmaxsd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3084[] = { "pmaxsd\t{%2, %0|%0, %2}", "pmaxsd\t{%2, %0|%0, %2}", "vpmaxsd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3085[] = { "pminsd\t{%2, %0|%0, %2}", "pminsd\t{%2, %0|%0, %2}", "vpminsd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3086[] = { "pminsd\t{%2, %0|%0, %2}", "pminsd\t{%2, %0|%0, %2}", "vpminsd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3087[] = { "pmaxsw\t{%2, %0|%0, %2}", "vpmaxsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3088[] = { "pminsw\t{%2, %0|%0, %2}", "vpminsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3089[] = { "pmaxuw\t{%2, %0|%0, %2}", "pmaxuw\t{%2, %0|%0, %2}", "vpmaxuw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3090[] = { "pmaxuw\t{%2, %0|%0, %2}", "pmaxuw\t{%2, %0|%0, %2}", "vpmaxuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3091[] = { "pminuw\t{%2, %0|%0, %2}", "pminuw\t{%2, %0|%0, %2}", "vpminuw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3092[] = { "pminuw\t{%2, %0|%0, %2}", "pminuw\t{%2, %0|%0, %2}", "vpminuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3093[] = { "pmaxud\t{%2, %0|%0, %2}", "pmaxud\t{%2, %0|%0, %2}", "vpmaxud\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3094[] = { "pmaxud\t{%2, %0|%0, %2}", "pmaxud\t{%2, %0|%0, %2}", "vpmaxud\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3095[] = { "pminud\t{%2, %0|%0, %2}", "pminud\t{%2, %0|%0, %2}", "vpminud\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3096[] = { "pminud\t{%2, %0|%0, %2}", "pminud\t{%2, %0|%0, %2}", "vpminud\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3097[] = { "pmaxub\t{%2, %0|%0, %2}", "vpmaxub\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3098[] = { "pminub\t{%2, %0|%0, %2}", "vpminub\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3127[] = { "pcmpeqq\t{%2, %0|%0, %2}", "pcmpeqq\t{%2, %0|%0, %2}", "vpcmpeqq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3128[] = { "pcmpeqb\t{%2, %0|%0, %2}", "vpcmpeqb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3129[] = { "pcmpeqw\t{%2, %0|%0, %2}", "vpcmpeqw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3130[] = { "pcmpeqd\t{%2, %0|%0, %2}", "vpcmpeqd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3131[] = { "pcmpgtq\t{%2, %0|%0, %2}", "pcmpgtq\t{%2, %0|%0, %2}", "vpcmpgtq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3160[] = { "pcmpgtb\t{%2, %0|%0, %2}", "vpcmpgtb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3161[] = { "pcmpgtw\t{%2, %0|%0, %2}", "vpcmpgtw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3162[] = { "pcmpgtd\t{%2, %0|%0, %2}", "vpcmpgtd\t{%2, %1, %0|%0, %1, %2}", }; static const char * output_3163 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnd"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3164 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnd"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3165 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnq"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3166 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnq"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3167 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V64QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnb"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3168 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V64QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnb"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3169 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnb"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3170 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnb"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3171 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnb"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3172 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnb"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3173 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnw"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3174 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnw"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3175 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnw"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3176 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnw"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3177 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnw"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3178 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnw"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3179 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnd"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3180 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnd"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3181 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnd"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3182 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnd"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3183 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnq"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3184 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnq"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3185 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V2DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnq"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3186 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10781 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V2DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandnq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandnq"; break; } default: tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andnps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3199 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandd"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3200 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandd"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3201 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pord"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3202 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pord"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3203 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxord"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3204 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxord"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3205 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandq"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3206 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandq"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3207 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porq"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3208 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porq"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3209 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorq"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3210 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorq"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3211 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V64QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandb"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3212 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V64QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandb"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3213 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V64QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porb"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3214 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V64QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porb"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3215 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V64QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorb"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3216 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V64QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorb"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3217 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandb"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3218 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandb"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3219 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porb"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3220 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porb"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3221 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorb"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3222 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorb"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3223 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandb"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3224 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandb"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3225 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porb"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3226 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porb"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3227 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorb"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3228 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16QImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorb"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorb"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3229 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandw"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3230 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandw"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3231 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porw"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3232 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porw"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3233 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorw"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3234 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V32HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorw"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3235 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandw"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3236 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandw"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3237 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porw"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3238 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porw"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3239 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorw"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3240 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V16HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorw"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3241 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandw"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3242 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandw"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3243 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porw"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3244 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porw"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3245 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorw"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3246 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8HImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorw"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorw"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3247 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandd"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3248 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandd"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3249 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pord"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3250 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pord"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3251 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxord"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3252 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V8SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxord"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3253 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandd"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3254 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandd"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandd"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3255 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pord"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3256 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pord"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3257 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxord"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3258 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4SImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxord"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxord"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3259 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandq"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3260 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandq"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3261 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porq"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3262 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porq"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3263 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorq"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3264 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V4DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorq"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3265 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V2DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandq"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3266 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V2DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pandq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pandq"; break; } default: tmp = TARGET_AVX512VL ? "pandq" : "pand"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "andps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3267 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V2DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porq"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3268 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V2DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "porq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "porq"; break; } default: tmp = TARGET_AVX512VL ? "porq" : "por"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "orps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3269 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V2DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorq"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * output_3270 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 10920 "../../gcc-5.1.0/gcc/config/i386/sse.md" { static char buf[64]; const char *ops; const char *tmp; switch (get_attr_mode (insn)) { case MODE_XI: gcc_assert (TARGET_AVX512F); case MODE_OI: gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); switch (V2DImode) { case V16SImode: case V8DImode: if (TARGET_AVX512F) { tmp = "pxorq"; break; } case V8SImode: case V4DImode: case V4SImode: case V2DImode: if (TARGET_AVX512VL) { tmp = "pxorq"; break; } default: tmp = TARGET_AVX512VL ? "pxorq" : "pxor"; } break; case MODE_V16SF: gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); tmp = "xorps"; break; default: gcc_unreachable (); } switch (which_alternative) { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: ops = "v%s\t{%%2, %%1, %%0%%{%%4%%}%%N3|%%0%%{%%4%%}%%N3, %%1, %%2}"; break; default: gcc_unreachable (); } snprintf (buf, sizeof (buf), ops, tmp); return buf; } } static const char * const output_3319[] = { "packsswb\t{%2, %0|%0, %2}", "vpacksswb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3320[] = { "packsswb\t{%2, %0|%0, %2}", "vpacksswb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3321[] = { "packsswb\t{%2, %0|%0, %2}", "vpacksswb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3322[] = { "packsswb\t{%2, %0|%0, %2}", "vpacksswb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3323[] = { "packsswb\t{%2, %0|%0, %2}", "vpacksswb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3324[] = { "packsswb\t{%2, %0|%0, %2}", "vpacksswb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3325[] = { "packssdw\t{%2, %0|%0, %2}", "vpackssdw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3326[] = { "packssdw\t{%2, %0|%0, %2}", "vpackssdw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3327[] = { "packssdw\t{%2, %0|%0, %2}", "vpackssdw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3328[] = { "packssdw\t{%2, %0|%0, %2}", "vpackssdw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3329[] = { "packssdw\t{%2, %0|%0, %2}", "vpackssdw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3330[] = { "packssdw\t{%2, %0|%0, %2}", "vpackssdw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3331[] = { "packuswb\t{%2, %0|%0, %2}", "vpackuswb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3332[] = { "packuswb\t{%2, %0|%0, %2}", "vpackuswb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3333[] = { "packuswb\t{%2, %0|%0, %2}", "vpackuswb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3334[] = { "packuswb\t{%2, %0|%0, %2}", "vpackuswb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3335[] = { "packuswb\t{%2, %0|%0, %2}", "vpackuswb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3336[] = { "packuswb\t{%2, %0|%0, %2}", "vpackuswb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3341[] = { "punpckhbw\t{%2, %0|%0, %2}", "vpunpckhbw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3342[] = { "punpckhbw\t{%2, %0|%0, %2}", "vpunpckhbw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3347[] = { "punpcklbw\t{%2, %0|%0, %2}", "vpunpcklbw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3348[] = { "punpcklbw\t{%2, %0|%0, %2}", "vpunpcklbw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3353[] = { "punpckhwd\t{%2, %0|%0, %2}", "vpunpckhwd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3354[] = { "punpckhwd\t{%2, %0|%0, %2}", "vpunpckhwd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3359[] = { "punpcklwd\t{%2, %0|%0, %2}", "vpunpcklwd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3360[] = { "punpcklwd\t{%2, %0|%0, %2}", "vpunpcklwd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3365[] = { "punpckhdq\t{%2, %0|%0, %2}", "vpunpckhdq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3366[] = { "punpckhdq\t{%2, %0|%0, %2}", "vpunpckhdq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3371[] = { "punpckldq\t{%2, %0|%0, %2}", "vpunpckldq\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3372[] = { "punpckldq\t{%2, %0|%0, %2}", "vpunpckldq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * output_3373 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11618 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3]))); switch (which_alternative) { case 0: if (GET_MODE_SIZE (QImode) < GET_MODE_SIZE (SImode)) return "pinsrb\t{%3, %k2, %0|%0, %k2, %3}"; /* FALLTHRU */ case 1: return "pinsrb\t{%3, %2, %0|%0, %2, %3}"; case 2: if (GET_MODE_SIZE (QImode) < GET_MODE_SIZE (SImode)) return "vpinsrb\t{%3, %k2, %1, %0|%0, %1, %k2, %3}"; /* FALLTHRU */ case 3: return "vpinsrb\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * output_3374 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11618 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3]))); switch (which_alternative) { case 0: if (GET_MODE_SIZE (HImode) < GET_MODE_SIZE (SImode)) return "pinsrw\t{%3, %k2, %0|%0, %k2, %3}"; /* FALLTHRU */ case 1: return "pinsrw\t{%3, %2, %0|%0, %2, %3}"; case 2: if (GET_MODE_SIZE (HImode) < GET_MODE_SIZE (SImode)) return "vpinsrw\t{%3, %k2, %1, %0|%0, %1, %k2, %3}"; /* FALLTHRU */ case 3: return "vpinsrw\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * output_3375 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11618 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3]))); switch (which_alternative) { case 0: if (GET_MODE_SIZE (SImode) < GET_MODE_SIZE (SImode)) return "pinsrd\t{%3, %k2, %0|%0, %k2, %3}"; /* FALLTHRU */ case 1: return "pinsrd\t{%3, %2, %0|%0, %2, %3}"; case 2: if (GET_MODE_SIZE (SImode) < GET_MODE_SIZE (SImode)) return "vpinsrd\t{%3, %k2, %1, %0|%0, %1, %k2, %3}"; /* FALLTHRU */ case 3: return "vpinsrd\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * output_3376 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11618 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3]))); switch (which_alternative) { case 0: if (GET_MODE_SIZE (DImode) < GET_MODE_SIZE (SImode)) return "pinsrq\t{%3, %k2, %0|%0, %k2, %3}"; /* FALLTHRU */ case 1: return "pinsrq\t{%3, %2, %0|%0, %2, %3}"; case 2: if (GET_MODE_SIZE (DImode) < GET_MODE_SIZE (SImode)) return "vpinsrq\t{%3, %k2, %1, %0|%0, %1, %k2, %3}"; /* FALLTHRU */ case 3: return "vpinsrq\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * output_3377 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11691 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; int selector = INTVAL (operands[3]); if (selector == 0xFFF || selector == 0x3F) mask = 0; else if ( selector == 0xF0FF || selector == 0xCF) mask = 1; else if ( selector == 0xFF0F || selector == 0xF3) mask = 2; else if ( selector == 0xFFF0 || selector == 0xFC) mask = 3; else gcc_unreachable (); operands[3] = GEN_INT (mask); return "vinsertf64x2\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3378 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11691 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; int selector = INTVAL (operands[3]); if (selector == 0xFFF || selector == 0x3F) mask = 0; else if ( selector == 0xF0FF || selector == 0xCF) mask = 1; else if ( selector == 0xFF0F || selector == 0xF3) mask = 2; else if ( selector == 0xFFF0 || selector == 0xFC) mask = 3; else gcc_unreachable (); operands[3] = GEN_INT (mask); return "vinsertf64x2\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}"; } } static const char * output_3379 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11691 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; int selector = INTVAL (operands[3]); if (selector == 0xFFF || selector == 0x3F) mask = 0; else if ( selector == 0xF0FF || selector == 0xCF) mask = 1; else if ( selector == 0xFF0F || selector == 0xF3) mask = 2; else if ( selector == 0xFFF0 || selector == 0xFC) mask = 3; else gcc_unreachable (); operands[3] = GEN_INT (mask); return "vinserti64x2\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3380 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11691 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; int selector = INTVAL (operands[3]); if (selector == 0xFFF || selector == 0x3F) mask = 0; else if ( selector == 0xF0FF || selector == 0xCF) mask = 1; else if ( selector == 0xFF0F || selector == 0xF3) mask = 2; else if ( selector == 0xFFF0 || selector == 0xFC) mask = 3; else gcc_unreachable (); operands[3] = GEN_INT (mask); return "vinserti64x2\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}"; } } static const char * output_3381 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11691 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; int selector = INTVAL (operands[3]); if (selector == 0xFFF || selector == 0x3F) mask = 0; else if ( selector == 0xF0FF || selector == 0xCF) mask = 1; else if ( selector == 0xFF0F || selector == 0xF3) mask = 2; else if ( selector == 0xFFF0 || selector == 0xFC) mask = 3; else gcc_unreachable (); operands[3] = GEN_INT (mask); return "vinsertf32x4\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3382 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11691 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; int selector = INTVAL (operands[3]); if (selector == 0xFFF || selector == 0x3F) mask = 0; else if ( selector == 0xF0FF || selector == 0xCF) mask = 1; else if ( selector == 0xFF0F || selector == 0xF3) mask = 2; else if ( selector == 0xFFF0 || selector == 0xFC) mask = 3; else gcc_unreachable (); operands[3] = GEN_INT (mask); return "vinsertf32x4\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}"; } } static const char * output_3383 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11691 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; int selector = INTVAL (operands[3]); if (selector == 0xFFF || selector == 0x3F) mask = 0; else if ( selector == 0xF0FF || selector == 0xCF) mask = 1; else if ( selector == 0xFF0F || selector == 0xF3) mask = 2; else if ( selector == 0xFFF0 || selector == 0xFC) mask = 3; else gcc_unreachable (); operands[3] = GEN_INT (mask); return "vinserti32x4\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3384 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11691 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; int selector = INTVAL (operands[3]); if (selector == 0xFFF || selector == 0x3F) mask = 0; else if ( selector == 0xF0FF || selector == 0xCF) mask = 1; else if ( selector == 0xFF0F || selector == 0xF3) mask = 2; else if ( selector == 0xFFF0 || selector == 0xFC) mask = 3; else gcc_unreachable (); operands[3] = GEN_INT (mask); return "vinserti32x4\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}"; } } static const char * output_3401 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11833 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 2; mask |= (INTVAL (operands[5]) - 4) / 2 << 1; operands[3] = GEN_INT (mask); return "vshufi64x2\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3402 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11833 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 2; mask |= (INTVAL (operands[5]) - 4) / 2 << 1; operands[3] = GEN_INT (mask); return "vshufi64x2\t{%3, %2, %1, %0%{%8%}%N7|%0%{%8%}%N7, %1, %2, %3}"; } } static const char * output_3403 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11833 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 2; mask |= (INTVAL (operands[5]) - 4) / 2 << 1; operands[3] = GEN_INT (mask); return "vshuff64x2\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3404 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11833 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 2; mask |= (INTVAL (operands[5]) - 4) / 2 << 1; operands[3] = GEN_INT (mask); return "vshuff64x2\t{%3, %2, %1, %0%{%8%}%N7|%0%{%8%}%N7, %1, %2, %3}"; } } static const char * output_3405 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11888 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 2; mask |= INTVAL (operands[5]) / 2 << 2; mask |= (INTVAL (operands[7]) - 8) / 2 << 4; mask |= (INTVAL (operands[9]) - 8) / 2 << 6; operands[3] = GEN_INT (mask); return "vshuff64x2\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3406 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11888 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 2; mask |= INTVAL (operands[5]) / 2 << 2; mask |= (INTVAL (operands[7]) - 8) / 2 << 4; mask |= (INTVAL (operands[9]) - 8) / 2 << 6; operands[3] = GEN_INT (mask); return "vshuff64x2\t{%3, %2, %1, %0%{%12%}%N11|%0%{%12%}%N11, %1, %2, %3}"; } } static const char * output_3407 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11888 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 2; mask |= INTVAL (operands[5]) / 2 << 2; mask |= (INTVAL (operands[7]) - 8) / 2 << 4; mask |= (INTVAL (operands[9]) - 8) / 2 << 6; operands[3] = GEN_INT (mask); return "vshufi64x2\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3408 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11888 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 2; mask |= INTVAL (operands[5]) / 2 << 2; mask |= (INTVAL (operands[7]) - 8) / 2 << 4; mask |= (INTVAL (operands[9]) - 8) / 2 << 6; operands[3] = GEN_INT (mask); return "vshufi64x2\t{%3, %2, %1, %0%{%12%}%N11|%0%{%12%}%N11, %1, %2, %3}"; } } static const char * output_3409 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11948 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 4; mask |= (INTVAL (operands[7]) - 8) / 4 << 1; operands[3] = GEN_INT (mask); return "vshufi32x4\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3410 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11948 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 4; mask |= (INTVAL (operands[7]) - 8) / 4 << 1; operands[3] = GEN_INT (mask); return "vshufi32x4\t{%3, %2, %1, %0%{%12%}%N11|%0%{%12%}%N11, %1, %2, %3}"; } } static const char * output_3411 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11948 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 4; mask |= (INTVAL (operands[7]) - 8) / 4 << 1; operands[3] = GEN_INT (mask); return "vshuff32x4\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3412 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 11948 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 4; mask |= (INTVAL (operands[7]) - 8) / 4 << 1; operands[3] = GEN_INT (mask); return "vshuff32x4\t{%3, %2, %1, %0%{%12%}%N11|%0%{%12%}%N11, %1, %2, %3}"; } } static const char * output_3413 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12028 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 4; mask |= INTVAL (operands[7]) / 4 << 2; mask |= (INTVAL (operands[11]) - 16) / 4 << 4; mask |= (INTVAL (operands[15]) - 16) / 4 << 6; operands[3] = GEN_INT (mask); return "vshuff32x4\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3414 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12028 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 4; mask |= INTVAL (operands[7]) / 4 << 2; mask |= (INTVAL (operands[11]) - 16) / 4 << 4; mask |= (INTVAL (operands[15]) - 16) / 4 << 6; operands[3] = GEN_INT (mask); return "vshuff32x4\t{%3, %2, %1, %0%{%20%}%N19|%0%{%20%}%N19, %1, %2, %3}"; } } static const char * output_3415 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12028 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 4; mask |= INTVAL (operands[7]) / 4 << 2; mask |= (INTVAL (operands[11]) - 16) / 4 << 4; mask |= (INTVAL (operands[15]) - 16) / 4 << 6; operands[3] = GEN_INT (mask); return "vshufi32x4\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_3416 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12028 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask; mask = INTVAL (operands[3]) / 4; mask |= INTVAL (operands[7]) / 4 << 2; mask |= (INTVAL (operands[11]) - 16) / 4 << 4; mask |= (INTVAL (operands[15]) - 16) / 4 << 6; operands[3] = GEN_INT (mask); return "vshufi32x4\t{%3, %2, %1, %0%{%20%}%N19|%0%{%20%}%N19, %1, %2, %3}"; } } static const char * output_3417 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12106 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpshufd\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3418 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12106 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpshufd\t{%2, %1, %0%{%19%}%N18|%0%{%19%}%N18, %1, %2}"; } } static const char * output_3419 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12180 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpshufd\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3420 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12180 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpshufd\t{%2, %1, %0%{%11%}%N10|%0%{%11%}%N10, %1, %2}"; } } static const char * output_3421 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12237 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "%vpshufd\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3422 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12237 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "%vpshufd\t{%2, %1, %0%{%7%}%N6|%0%{%7%}%N6, %1, %2}"; } } static const char * output_3425 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12332 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpshuflw\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3426 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12332 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpshuflw\t{%2, %1, %0%{%11%}%N10|%0%{%11%}%N10, %1, %2}"; } } static const char * output_3427 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12393 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "%vpshuflw\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3428 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12393 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "%vpshuflw\t{%2, %1, %0%{%7%}%N6|%0%{%7%}%N6, %1, %2}"; } } static const char * output_3431 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12489 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= (INTVAL (operands[2]) - 4) << 0; mask |= (INTVAL (operands[3]) - 4) << 2; mask |= (INTVAL (operands[4]) - 4) << 4; mask |= (INTVAL (operands[5]) - 4) << 6; operands[2] = GEN_INT (mask); return "vpshufhw\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3432 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12489 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= (INTVAL (operands[2]) - 4) << 0; mask |= (INTVAL (operands[3]) - 4) << 2; mask |= (INTVAL (operands[4]) - 4) << 4; mask |= (INTVAL (operands[5]) - 4) << 6; operands[2] = GEN_INT (mask); return "vpshufhw\t{%2, %1, %0%{%11%}%N10|%0%{%11%}%N10, %1, %2}"; } } static const char * output_3433 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12550 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= (INTVAL (operands[2]) - 4) << 0; mask |= (INTVAL (operands[3]) - 4) << 2; mask |= (INTVAL (operands[4]) - 4) << 4; mask |= (INTVAL (operands[5]) - 4) << 6; operands[2] = GEN_INT (mask); return "%vpshufhw\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3434 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12550 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= (INTVAL (operands[2]) - 4) << 0; mask |= (INTVAL (operands[3]) - 4) << 2; mask |= (INTVAL (operands[4]) - 4) << 4; mask |= (INTVAL (operands[5]) - 4) << 6; operands[2] = GEN_INT (mask); return "%vpshufhw\t{%2, %1, %0%{%7%}%N6|%0%{%7%}%N6, %1, %2}"; } } static const char * const output_3435[] = { "%vmovd\t{%2, %0|%0, %2}", "%vmovd\t{%2, %0|%0, %2}", "movss\t{%2, %0|%0, %2}", "movss\t{%2, %0|%0, %2}", "vmovss\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3436[] = { "%vpextrb\t{%2, %1, %k0|%k0, %1, %2}", "%vpextrb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3437[] = { "%vpextrw\t{%2, %1, %k0|%k0, %1, %2}", "%vpextrw\t{%2, %1, %0|%0, %1, %2}", }; static const char * output_3445 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 12720 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "%vpextrd\t{%2, %1, %0|%0, %1, %2}"; case 1: case 2: operands [2] = GEN_INT (INTVAL (operands[2]) * 4); return "psrldq\t{%2, %0|%0, %2}"; case 3: operands [2] = GEN_INT (INTVAL (operands[2]) * 4); return "vpsrldq\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * const output_3447[] = { "%vpextrq\t{$1, %1, %0|%0, %1, 1}", "%vmovhps\t{%1, %0|%0, %1}", "psrldq\t{$8, %0|%0, 8}", "vpsrldq\t{$8, %1, %0|%0, %1, 8}", "movhlps\t{%1, %0|%0, %1}", "#", "#", }; static const char * const output_3448[] = { "pinsrd\t{$1, %2, %0|%0, %2, 1}", "pinsrd\t{$1, %2, %0|%0, %2, 1}", "vpinsrd\t{$1, %2, %1, %0|%0, %1, %2, 1}", "punpckldq\t{%2, %0|%0, %2}", "punpckldq\t{%2, %0|%0, %2}", "vpunpckldq\t{%2, %1, %0|%0, %1, %2}", "%vmovd\t{%1, %0|%0, %1}", "punpckldq\t{%2, %0|%0, %2}", "movd\t{%1, %0|%0, %1}", }; static const char * const output_3449[] = { "punpckldq\t{%2, %0|%0, %2}", "movd\t{%1, %0|%0, %1}", "movd\t{%1, %0|%0, %1}", "unpcklps\t{%2, %0|%0, %2}", "movss\t{%1, %0|%0, %1}", "punpckldq\t{%2, %0|%0, %2}", "movd\t{%1, %0|%0, %1}", }; static const char * const output_3450[] = { "punpcklqdq\t{%2, %0|%0, %2}", "vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}", "movlhps\t{%2, %0|%0, %2}", "movhps\t{%2, %0|%0, %q2}", "vmovhps\t{%2, %1, %0|%0, %1, %q2}", }; static const char * output_3451 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { switch (which_alternative) { case 0: return "pinsrq\t{$1, %2, %0|%0, %2, 1}"; case 1: return "pinsrq\t{$1, %2, %0|%0, %2, 1}"; case 2: return "vpinsrq\t{$1, %2, %1, %0|%0, %1, %2, 1}"; case 3: return HAVE_AS_IX86_INTERUNIT_MOVQ ? "%vmovq\t{%1, %0|%0, %1}" : "%vmovd\t{%1, %0|%0, %1}"; case 4: return "%vmovq\t{%1, %0|%0, %1}"; case 5: return "movq2dq\t{%1, %0|%0, %1}"; case 6: return "punpcklqdq\t{%2, %0|%0, %2}"; case 7: return "vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}"; case 8: return "movlhps\t{%2, %0|%0, %2}"; case 9: return "movhps\t{%2, %0|%0, %2}"; case 10: return "vmovhps\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } static const char * const output_3452[] = { "pavgb\t{%2, %0|%0, %2}", "vpavgb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3453[] = { "pavgb\t{%2, %0|%0, %2}", "vpavgb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3454[] = { "pavgb\t{%2, %0|%0, %2}", "vpavgb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3455[] = { "pavgb\t{%2, %0|%0, %2}", "vpavgb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3456[] = { "pavgb\t{%2, %0|%0, %2}", "vpavgb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3457[] = { "pavgb\t{%2, %0|%0, %2}", "vpavgb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3458[] = { "pavgw\t{%2, %0|%0, %2}", "vpavgw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3459[] = { "pavgw\t{%2, %0|%0, %2}", "vpavgw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3460[] = { "pavgw\t{%2, %0|%0, %2}", "vpavgw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3461[] = { "pavgw\t{%2, %0|%0, %2}", "vpavgw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3462[] = { "pavgw\t{%2, %0|%0, %2}", "vpavgw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3463[] = { "pavgw\t{%2, %0|%0, %2}", "vpavgw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3464[] = { "psadbw\t{%2, %0|%0, %2}", "vpsadbw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3465[] = { "psadbw\t{%2, %0|%0, %2}", "vpsadbw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3466[] = { "psadbw\t{%2, %0|%0, %2}", "vpsadbw\t{%2, %1, %0|%0, %1, %2}", }; static const char * output_3473 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13118 "../../gcc-5.1.0/gcc/config/i386/sse.md" { /* We can't use %^ here due to ASM_OUTPUT_OPCODE processing that requires %v to be at the beginning of the opcode name. */ if (Pmode != word_mode) fputs ("\taddr32", asm_out_file); return "%vmaskmovdqu\t{%2, %1|%1, %2}"; } } static const char * output_3474 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13118 "../../gcc-5.1.0/gcc/config/i386/sse.md" { /* We can't use %^ here due to ASM_OUTPUT_OPCODE processing that requires %v to be at the beginning of the opcode name. */ if (Pmode != word_mode) fputs ("\taddr32", asm_out_file); return "%vmaskmovdqu\t{%2, %1|%1, %2}"; } } static const char * const output_3485[] = { "phaddw\t{%2, %0|%0, %2}", "vphaddw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3486[] = { "phaddsw\t{%2, %0|%0, %2}", "vphaddsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3487[] = { "phsubw\t{%2, %0|%0, %2}", "vphsubw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3488[] = { "phsubsw\t{%2, %0|%0, %2}", "vphsubsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3495[] = { "phaddd\t{%2, %0|%0, %2}", "vphaddd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3496[] = { "phsubd\t{%2, %0|%0, %2}", "vphsubd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3508[] = { "pmaddubsw\t{%2, %0|%0, %2}", "vpmaddubsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3510[] = { "pmulhrsw\t{%2, %0|%0, %2}", "vpmulhrsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3511[] = { "pmulhrsw\t{%2, %0|%0, %2}", "vpmulhrsw\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_3512[] = { "pmulhrsw\t{%2, %0|%0, %2}", "vpmulhrsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3513[] = { "pmulhrsw\t{%2, %0|%0, %2}", "vpmulhrsw\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_3514[] = { "pmulhrsw\t{%2, %0|%0, %2}", "vpmulhrsw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3515[] = { "pmulhrsw\t{%2, %0|%0, %2}", "vpmulhrsw\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", }; static const char * const output_3517[] = { "pshufb\t{%2, %0|%0, %2}", "vpshufb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3518[] = { "pshufb\t{%2, %0|%0, %2}", "vpshufb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3519[] = { "pshufb\t{%2, %0|%0, %2}", "vpshufb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3520[] = { "pshufb\t{%2, %0|%0, %2}", "vpshufb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3521[] = { "pshufb\t{%2, %0|%0, %2}", "vpshufb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3522[] = { "pshufb\t{%2, %0|%0, %2}", "vpshufb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3524[] = { "psignb\t{%2, %0|%0, %2}", "vpsignb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3525[] = { "psignb\t{%2, %0|%0, %2}", "vpsignb\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3526[] = { "psignw\t{%2, %0|%0, %2}", "vpsignw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3527[] = { "psignw\t{%2, %0|%0, %2}", "vpsignw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3528[] = { "psignd\t{%2, %0|%0, %2}", "vpsignd\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3529[] = { "psignd\t{%2, %0|%0, %2}", "vpsignd\t{%2, %1, %0|%0, %1, %2}", }; static const char * output_3533 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13790 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (INTVAL (operands[3]) / 8); return "vpalignr\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}"; } } static const char * output_3534 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13790 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (INTVAL (operands[3]) / 8); return "vpalignr\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}"; } } static const char * output_3535 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13790 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (INTVAL (operands[3]) / 8); return "vpalignr\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}"; } } static const char * output_3536 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13809 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (INTVAL (operands[3]) / 8); switch (which_alternative) { case 0: return "palignr\t{%3, %2, %0|%0, %2, %3}"; case 1: return "vpalignr\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * output_3537 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13809 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (INTVAL (operands[3]) / 8); switch (which_alternative) { case 0: return "palignr\t{%3, %2, %0|%0, %2, %3}"; case 1: return "vpalignr\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * output_3538 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13809 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (INTVAL (operands[3]) / 8); switch (which_alternative) { case 0: return "palignr\t{%3, %2, %0|%0, %2, %3}"; case 1: return "vpalignr\t{%3, %2, %1, %0|%0, %1, %2, %3}"; default: gcc_unreachable (); } } } static const char * output_3539 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 13838 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (INTVAL (operands[3]) / 8); return "palignr\t{%3, %2, %0|%0, %2, %3}"; } } static const char * const output_3575[] = { "blendps\t{%3, %2, %0|%0, %2, %3}", "blendps\t{%3, %2, %0|%0, %2, %3}", "vblendps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3576[] = { "blendps\t{%3, %2, %0|%0, %2, %3}", "blendps\t{%3, %2, %0|%0, %2, %3}", "vblendps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3577[] = { "blendpd\t{%3, %2, %0|%0, %2, %3}", "blendpd\t{%3, %2, %0|%0, %2, %3}", "vblendpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3578[] = { "blendpd\t{%3, %2, %0|%0, %2, %3}", "blendpd\t{%3, %2, %0|%0, %2, %3}", "vblendpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3579[] = { "blendvps\t{%3, %2, %0|%0, %2, %3}", "blendvps\t{%3, %2, %0|%0, %2, %3}", "vblendvps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3580[] = { "blendvps\t{%3, %2, %0|%0, %2, %3}", "blendvps\t{%3, %2, %0|%0, %2, %3}", "vblendvps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3581[] = { "blendvpd\t{%3, %2, %0|%0, %2, %3}", "blendvpd\t{%3, %2, %0|%0, %2, %3}", "vblendvpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3582[] = { "blendvpd\t{%3, %2, %0|%0, %2, %3}", "blendvpd\t{%3, %2, %0|%0, %2, %3}", "vblendvpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3583[] = { "dpps\t{%3, %2, %0|%0, %2, %3}", "dpps\t{%3, %2, %0|%0, %2, %3}", "vdpps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3584[] = { "dpps\t{%3, %2, %0|%0, %2, %3}", "dpps\t{%3, %2, %0|%0, %2, %3}", "vdpps\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3585[] = { "dppd\t{%3, %2, %0|%0, %2, %3}", "dppd\t{%3, %2, %0|%0, %2, %3}", "vdppd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3586[] = { "dppd\t{%3, %2, %0|%0, %2, %3}", "dppd\t{%3, %2, %0|%0, %2, %3}", "vdppd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3590[] = { "mpsadbw\t{%3, %2, %0|%0, %2, %3}", "mpsadbw\t{%3, %2, %0|%0, %2, %3}", "vmpsadbw\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3591[] = { "mpsadbw\t{%3, %2, %0|%0, %2, %3}", "mpsadbw\t{%3, %2, %0|%0, %2, %3}", "vmpsadbw\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3592[] = { "packusdw\t{%2, %0|%0, %2}", "packusdw\t{%2, %0|%0, %2}", "vpackusdw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3593[] = { "packusdw\t{%2, %0|%0, %2}", "packusdw\t{%2, %0|%0, %2}", "vpackusdw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3594[] = { "packusdw\t{%2, %0|%0, %2}", "packusdw\t{%2, %0|%0, %2}", "vpackusdw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3595[] = { "packusdw\t{%2, %0|%0, %2}", "packusdw\t{%2, %0|%0, %2}", "vpackusdw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3596[] = { "packusdw\t{%2, %0|%0, %2}", "packusdw\t{%2, %0|%0, %2}", "vpackusdw\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3597[] = { "packusdw\t{%2, %0|%0, %2}", "packusdw\t{%2, %0|%0, %2}", "vpackusdw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", }; static const char * const output_3598[] = { "pblendvb\t{%3, %2, %0|%0, %2, %3}", "pblendvb\t{%3, %2, %0|%0, %2, %3}", "vpblendvb\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3599[] = { "pblendvb\t{%3, %2, %0|%0, %2, %3}", "pblendvb\t{%3, %2, %0|%0, %2, %3}", "vpblendvb\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3600[] = { "pblendw\t{%3, %2, %0|%0, %2, %3}", "pblendw\t{%3, %2, %0|%0, %2, %3}", "vpblendw\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * output_3601 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 14181 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (INTVAL (operands[3]) & 0xff); return "vpblendw\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * const output_3687[] = { "roundss\t{%3, %2, %0|%0, %2, %3}", "roundss\t{%3, %2, %0|%0, %2, %3}", "vroundss\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3688[] = { "roundsd\t{%3, %2, %0|%0, %2, %3}", "roundsd\t{%3, %2, %0|%0, %2, %3}", "vroundsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3693[] = { "%vpcmpestrm\t{%6, %4, %2|%2, %4, %6}", "%vpcmpestrm\t{%6, %4, %2|%2, %4, %6}", "%vpcmpestri\t{%6, %4, %2|%2, %4, %6}", "%vpcmpestri\t{%6, %4, %2|%2, %4, %6}", }; static const char * const output_3698[] = { "%vpcmpistrm\t{%4, %3, %2|%2, %3, %4}", "%vpcmpistrm\t{%4, %3, %2|%2, %3, %4}", "%vpcmpistri\t{%4, %3, %2|%2, %3, %4}", "%vpcmpistri\t{%4, %3, %2|%2, %3, %4}", }; static const char * output_3699 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15105 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: return "vgatherpf0dps\t{%5%{%0%}|%5%{%0%}}"; case 2: return "vgatherpf1dps\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3700 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15105 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: return "vgatherpf0dps\t{%5%{%0%}|%5%{%0%}}"; case 2: return "vgatherpf1dps\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3701 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15105 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: return "vgatherpf0qps\t{%5%{%0%}|%5%{%0%}}"; case 2: return "vgatherpf1qps\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3702 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15105 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: return "vgatherpf0qps\t{%5%{%0%}|%5%{%0%}}"; case 2: return "vgatherpf1qps\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3703 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15132 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: return "vgatherpf0dps\t{%4|%4}"; case 2: return "vgatherpf1dps\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3704 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15132 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: return "vgatherpf0dps\t{%4|%4}"; case 2: return "vgatherpf1dps\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3705 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15132 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: return "vgatherpf0qps\t{%4|%4}"; case 2: return "vgatherpf1qps\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3706 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15132 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: return "vgatherpf0qps\t{%4|%4}"; case 2: return "vgatherpf1qps\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3707 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15177 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: return "vgatherpf0dpd\t{%5%{%0%}|%5%{%0%}}"; case 2: return "vgatherpf1dpd\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3708 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15177 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: return "vgatherpf0dpd\t{%5%{%0%}|%5%{%0%}}"; case 2: return "vgatherpf1dpd\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3709 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15177 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: return "vgatherpf0qpd\t{%5%{%0%}|%5%{%0%}}"; case 2: return "vgatherpf1qpd\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3710 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15177 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: return "vgatherpf0qpd\t{%5%{%0%}|%5%{%0%}}"; case 2: return "vgatherpf1qpd\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3711 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15204 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: return "vgatherpf0dpd\t{%4|%4}"; case 2: return "vgatherpf1dpd\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3712 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15204 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: return "vgatherpf0dpd\t{%4|%4}"; case 2: return "vgatherpf1dpd\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3713 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15204 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: return "vgatherpf0qpd\t{%4|%4}"; case 2: return "vgatherpf1qpd\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3714 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15204 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: return "vgatherpf0qpd\t{%4|%4}"; case 2: return "vgatherpf1qpd\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3715 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15249 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: case 7: return "vscatterpf0dps\t{%5%{%0%}|%5%{%0%}}"; case 2: case 6: return "vscatterpf1dps\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3716 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15249 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: case 7: return "vscatterpf0dps\t{%5%{%0%}|%5%{%0%}}"; case 2: case 6: return "vscatterpf1dps\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3717 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15249 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: case 7: return "vscatterpf0qps\t{%5%{%0%}|%5%{%0%}}"; case 2: case 6: return "vscatterpf1qps\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3718 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15249 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: case 7: return "vscatterpf0qps\t{%5%{%0%}|%5%{%0%}}"; case 2: case 6: return "vscatterpf1qps\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3719 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15278 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: case 7: return "vscatterpf0dps\t{%4|%4}"; case 2: case 6: return "vscatterpf1dps\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3720 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15278 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: case 7: return "vscatterpf0dps\t{%4|%4}"; case 2: case 6: return "vscatterpf1dps\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3721 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15278 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: case 7: return "vscatterpf0qps\t{%4|%4}"; case 2: case 6: return "vscatterpf1qps\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3722 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15278 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: case 7: return "vscatterpf0qps\t{%4|%4}"; case 2: case 6: return "vscatterpf1qps\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3723 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15325 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: case 7: return "vscatterpf0dpd\t{%5%{%0%}|%5%{%0%}}"; case 2: case 6: return "vscatterpf1dpd\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3724 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15325 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: case 7: return "vscatterpf0dpd\t{%5%{%0%}|%5%{%0%}}"; case 2: case 6: return "vscatterpf1dpd\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3725 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15325 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: case 7: return "vscatterpf0qpd\t{%5%{%0%}|%5%{%0%}}"; case 2: case 6: return "vscatterpf1qpd\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3726 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15325 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[4])) { case 3: case 7: return "vscatterpf0qpd\t{%5%{%0%}|%5%{%0%}}"; case 2: case 6: return "vscatterpf1qpd\t{%5%{%0%}|%5%{%0%}}"; default: gcc_unreachable (); } } } static const char * output_3727 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15354 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: case 7: return "vscatterpf0dpd\t{%4|%4}"; case 2: case 6: return "vscatterpf1dpd\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3728 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15354 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: case 7: return "vscatterpf0dpd\t{%4|%4}"; case 2: case 6: return "vscatterpf1dpd\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3729 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15354 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: case 7: return "vscatterpf0qpd\t{%4|%4}"; case 2: case 6: return "vscatterpf1qpd\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3730 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15354 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (INTVAL (operands[3])) { case 3: case 7: return "vscatterpf0qpd\t{%4|%4}"; case 2: case 6: return "vscatterpf1qpd\t{%4|%4}"; default: gcc_unreachable (); } } } static const char * output_3814 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15900 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (GET_MODE_BITSIZE (QImode) - INTVAL (operands[2])); return "vprotb\t{%3, %1, %0|%0, %1, %3}"; } } static const char * output_3815 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15900 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (GET_MODE_BITSIZE (HImode) - INTVAL (operands[2])); return "vprotw\t{%3, %1, %0|%0, %1, %3}"; } } static const char * output_3816 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15900 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (GET_MODE_BITSIZE (SImode) - INTVAL (operands[2])); return "vprotd\t{%3, %1, %0|%0, %1, %3}"; } } static const char * output_3817 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 15900 "../../gcc-5.1.0/gcc/config/i386/sse.md" { operands[3] = GEN_INT (GET_MODE_BITSIZE (DImode) - INTVAL (operands[2])); return "vprotq\t{%3, %1, %0|%0, %1, %3}"; } } static const char * output_3850 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16307 "../../gcc-5.1.0/gcc/config/i386/sse.md" { return ((INTVAL (operands[3]) != 0) ? "vpcomtrueb\t{%2, %1, %0|%0, %1, %2}" : "vpcomfalseb\t{%2, %1, %0|%0, %1, %2}"); } } static const char * output_3851 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16307 "../../gcc-5.1.0/gcc/config/i386/sse.md" { return ((INTVAL (operands[3]) != 0) ? "vpcomtruew\t{%2, %1, %0|%0, %1, %2}" : "vpcomfalsew\t{%2, %1, %0|%0, %1, %2}"); } } static const char * output_3852 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16307 "../../gcc-5.1.0/gcc/config/i386/sse.md" { return ((INTVAL (operands[3]) != 0) ? "vpcomtrued\t{%2, %1, %0|%0, %1, %2}" : "vpcomfalsed\t{%2, %1, %0|%0, %1, %2}"); } } static const char * output_3853 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16307 "../../gcc-5.1.0/gcc/config/i386/sse.md" { return ((INTVAL (operands[3]) != 0) ? "vpcomtrueq\t{%2, %1, %0|%0, %1, %2}" : "vpcomfalseq\t{%2, %1, %0|%0, %1, %2}"); } } static const char * const output_3858[] = { "aesenc\t{%2, %0|%0, %2}", "vaesenc\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3859[] = { "aesenclast\t{%2, %0|%0, %2}", "vaesenclast\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3860[] = { "aesdec\t{%2, %0|%0, %2}", "vaesdec\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3861[] = { "aesdeclast\t{%2, %0|%0, %2}", "vaesdeclast\t{%2, %1, %0|%0, %1, %2}", }; static const char * const output_3864[] = { "pclmulqdq\t{%3, %2, %0|%0, %2, %3}", "vpclmulqdq\t{%3, %2, %1, %0|%0, %1, %2, %3}", }; static const char * const output_3879[] = { "vpbroadcastb\t{%1, %0|%0, %b1}", "vpbroadcastb\t{%x1, %0|%0, %x1}", }; static const char * const output_3880[] = { "vpbroadcastw\t{%1, %0|%0, %w1}", "vpbroadcastw\t{%x1, %0|%0, %x1}", }; static const char * const output_3881[] = { "vpbroadcastd\t{%1, %0|%0, %k1}", "vpbroadcastd\t{%x1, %0|%0, %x1}", }; static const char * const output_3882[] = { "vpbroadcastq\t{%1, %0|%0, %q1}", "vpbroadcastq\t{%x1, %0|%0, %x1}", }; static const char * output_3911 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpermq\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3912 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpermq\t{%2, %1, %0%{%7%}%N6|%0%{%7%}%N6, %1, %2}"; } } static const char * output_3913 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpermpd\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3914 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpermpd\t{%2, %1, %0%{%7%}%N6|%0%{%7%}%N6, %1, %2}"; } } static const char * output_3915 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpermq\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3916 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpermq\t{%2, %1, %0%{%7%}%N6|%0%{%7%}%N6, %1, %2}"; } } static const char * output_3917 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpermpd\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_3918 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = 0; mask |= INTVAL (operands[2]) << 0; mask |= INTVAL (operands[3]) << 2; mask |= INTVAL (operands[4]) << 4; mask |= INTVAL (operands[5]) << 6; operands[2] = GEN_INT (mask); return "vpermpd\t{%2, %1, %0%{%7%}%N6|%0%{%7%}%N6, %1, %2}"; } } static const char * const output_3961[] = { "vshuff32x4\t{$0x0, %g1, %g1, %0|%0, %g1, %g1, 0x0}", "vbroadcastf32x4\t{%1, %0|%0, %1}", }; static const char * const output_3962[] = { "vshuff32x4\t{$0x0, %g1, %g1, %0%{%3%}%N2|%0%{%3%}%N2, %g1, %g1, 0x0}", "vbroadcastf32x4\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_3963[] = { "vshufi32x4\t{$0x0, %g1, %g1, %0|%0, %g1, %g1, 0x0}", "vbroadcasti32x4\t{%1, %0|%0, %1}", }; static const char * const output_3964[] = { "vshufi32x4\t{$0x0, %g1, %g1, %0%{%3%}%N2|%0%{%3%}%N2, %g1, %g1, 0x0}", "vbroadcasti32x4\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_3965[] = { "vshuff64x2\t{$0x44, %g1, %g1, %0|%0, %g1, %g1, 0x44}", "vbroadcastf64x4\t{%1, %0|%0, %1}", }; static const char * const output_3966[] = { "vshuff64x2\t{$0x44, %g1, %g1, %0%{%3%}%N2|%0%{%3%}%N2, %g1, %g1, 0x44}", "vbroadcastf64x4\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_3967[] = { "vshufi64x2\t{$0x44, %g1, %g1, %0|%0, %g1, %g1, 0x44}", "vbroadcasti64x4\t{%1, %0|%0, %1}", }; static const char * const output_3968[] = { "vshufi64x2\t{$0x44, %g1, %g1, %0%{%3%}%N2|%0%{%3%}%N2, %g1, %g1, 0x44}", "vbroadcasti64x4\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_3969[] = { "vpbroadcastb\t{%1, %0|%0, %1}", "vpbroadcastb\t{%k1, %0|%0, %k1}", }; static const char * const output_3970[] = { "vpbroadcastb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", "vpbroadcastb\t{%k1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", }; static const char * const output_3971[] = { "vpbroadcastb\t{%1, %0|%0, %1}", "vpbroadcastb\t{%k1, %0|%0, %k1}", }; static const char * const output_3972[] = { "vpbroadcastb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", "vpbroadcastb\t{%k1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", }; static const char * const output_3973[] = { "vpbroadcastb\t{%1, %0|%0, %1}", "vpbroadcastb\t{%k1, %0|%0, %k1}", }; static const char * const output_3974[] = { "vpbroadcastb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", "vpbroadcastb\t{%k1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", }; static const char * const output_3975[] = { "vpbroadcastw\t{%1, %0|%0, %1}", "vpbroadcastw\t{%k1, %0|%0, %k1}", }; static const char * const output_3976[] = { "vpbroadcastw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", "vpbroadcastw\t{%k1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", }; static const char * const output_3977[] = { "vpbroadcastw\t{%1, %0|%0, %1}", "vpbroadcastw\t{%k1, %0|%0, %k1}", }; static const char * const output_3978[] = { "vpbroadcastw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", "vpbroadcastw\t{%k1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", }; static const char * const output_3979[] = { "vpbroadcastw\t{%1, %0|%0, %1}", "vpbroadcastw\t{%k1, %0|%0, %k1}", }; static const char * const output_3980[] = { "vpbroadcastw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", "vpbroadcastw\t{%k1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", }; static const char * const output_4005[] = { "vshufps\t{$0, %1, %1, %0|%0, %1, %1, 0}", "vbroadcastss\t{%1, %0|%0, %1}", "shufps\t{$0, %0, %0|%0, %0, 0}", }; static const char * const output_4006[] = { "%vpshufd\t{$0, %1, %0|%0, %1, 0}", "vbroadcastss\t{%1, %0|%0, %1}", "shufps\t{$0, %0, %0|%0, %0, 0}", }; static const char * const output_4007[] = { "punpcklqdq\t%0, %0", "vpunpcklqdq\t{%d1, %0|%0, %d1}", "%vmovddup\t{%1, %0|%0, %1}", "movlhps\t%0, %0", }; static const char * const output_4012[] = { "vpbroadcastb\t{%1, %0|%0, %1}", "vpbroadcastb\t{%x1, %0|%0, %x1}", "#", }; static const char * const output_4013[] = { "vpbroadcastb\t{%1, %0|%0, %1}", "vpbroadcastb\t{%x1, %0|%0, %x1}", "#", }; static const char * const output_4014[] = { "vpbroadcastw\t{%1, %0|%0, %1}", "vpbroadcastw\t{%x1, %0|%0, %x1}", "#", }; static const char * const output_4015[] = { "vpbroadcastw\t{%1, %0|%0, %1}", "vpbroadcastw\t{%x1, %0|%0, %x1}", "#", }; static const char * const output_4016[] = { "vpbroadcastd\t{%1, %0|%0, %1}", "vpbroadcastd\t{%x1, %0|%0, %x1}", "#", }; static const char * const output_4017[] = { "vpbroadcastd\t{%1, %0|%0, %1}", "vpbroadcastd\t{%x1, %0|%0, %x1}", "#", }; static const char * const output_4018[] = { "vpbroadcastd\t{%1, %0|%0, %1}", "vbroadcastss\t{%1, %0|%0, %1}", "vpbroadcastd\t{%x1, %0|%0, %x1}", "#", }; static const char * const output_4019[] = { "vbroadcastss\t{%1, %0|%0, %1}", "vbroadcastss\t{%1, %0|%0, %1}", "vbroadcastss\t{%x1, %0|%0, %x1}", "#", }; static const char * const output_4020[] = { "vpbroadcastq\t{%1, %0|%0, %1}", "vbroadcastsd\t{%1, %0|%0, %1}", "vpbroadcastq\t{%x1, %0|%0, %x1}", "#", }; static const char * const output_4021[] = { "vbroadcastsd\t{%1, %0|%0, %1}", "vbroadcastsd\t{%1, %0|%0, %1}", "vbroadcastsd\t{%x1, %0|%0, %x1}", "#", }; static const char * const output_4022[] = { "vbroadcast%~128\t{%1, %0|%0, %1}", "vinsert%~128\t{$1, %1, %0, %0|%0, %0, %1, 1}", "vperm2%~128\t{$0, %t1, %t1, %0|%0, %t1, %t1, 0}", }; static const char * const output_4023[] = { "vbroadcast%~128\t{%1, %0|%0, %1}", "vinsert%~128\t{$1, %1, %0, %0|%0, %0, %1, 1}", "vperm2%~128\t{$0, %t1, %t1, %0|%0, %t1, %t1, 0}", }; static const char * const output_4024[] = { "vbroadcast%~128\t{%1, %0|%0, %1}", "vinsert%~128\t{$1, %1, %0, %0|%0, %0, %1, 1}", "vperm2%~128\t{$0, %t1, %t1, %0|%0, %t1, %t1, 0}", }; static const char * const output_4025[] = { "vbroadcast%~128\t{%1, %0|%0, %1}", "vinsert%~128\t{$1, %1, %0, %0|%0, %0, %1, 1}", "vperm2%~128\t{$0, %t1, %t1, %0|%0, %t1, %t1, 0}", }; static const char * const output_4026[] = { "vbroadcastf128\t{%1, %0|%0, %1}", "vinsertf128\t{$1, %1, %0, %0|%0, %0, %1, 1}", "vperm2f128\t{$0, %t1, %t1, %0|%0, %t1, %t1, 0}", }; static const char * const output_4027[] = { "vbroadcastf128\t{%1, %0|%0, %1}", "vinsertf128\t{$1, %1, %0, %0|%0, %0, %1, 1}", "vperm2f128\t{$0, %t1, %t1, %0|%0, %t1, %t1, 0}", }; static const char * const output_4038[] = { "vshufi32x4\t{$0x0, %t1, %t1, %0|%0, %t1, %t1, 0x0}", "vbroadcasti32x4\t{%1, %0|%0, %1}", }; static const char * const output_4039[] = { "vshufi32x4\t{$0x0, %t1, %t1, %0%{%3%}%N2|%0%{%3%}%N2, %t1, %t1, 0x0}", "vbroadcasti32x4\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_4040[] = { "vshuff32x4\t{$0x0, %t1, %t1, %0|%0, %t1, %t1, 0x0}", "vbroadcastf32x4\t{%1, %0|%0, %1}", }; static const char * const output_4041[] = { "vshuff32x4\t{$0x0, %t1, %t1, %0%{%3%}%N2|%0%{%3%}%N2, %t1, %t1, 0x0}", "vbroadcastf32x4\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_4042[] = { "vshuff32x4\t{$0x44, %g1, %g1, %0|%0, %g1, %g1, 0x44}", "vbroadcastf32x8\t{%1, %0|%0, %1}", }; static const char * const output_4043[] = { "vshuff32x4\t{$0x44, %g1, %g1, %0%{%3%}%N2|%0%{%3%}%N2, %g1, %g1, 0x44}", "vbroadcastf32x8\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_4044[] = { "vshufi32x4\t{$0x44, %g1, %g1, %0|%0, %g1, %g1, 0x44}", "vbroadcasti32x8\t{%1, %0|%0, %1}", }; static const char * const output_4045[] = { "vshufi32x4\t{$0x44, %g1, %g1, %0%{%3%}%N2|%0%{%3%}%N2, %g1, %g1, 0x44}", "vbroadcasti32x8\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_4046[] = { "vshufi64x2\t{$0x0, %g1, %g1, %0|%0, %g1, %g1, 0x0}", "vbroadcasti64x2\t{%1, %0|%0, %1}", }; static const char * const output_4047[] = { "vshufi64x2\t{$0x0, %g1, %g1, %0%{%3%}%N2|%0%{%3%}%N2, %g1, %g1, 0x0}", "vbroadcasti64x2\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_4048[] = { "vshuff64x2\t{$0x0, %g1, %g1, %0|%0, %g1, %g1, 0x0}", "vbroadcastf64x2\t{%1, %0|%0, %1}", }; static const char * const output_4049[] = { "vshuff64x2\t{$0x0, %g1, %g1, %0%{%3%}%N2|%0%{%3%}%N2, %g1, %g1, 0x0}", "vbroadcastf64x2\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_4050[] = { "vshufi64x2\t{$0x0, %t1, %t1, %0|%0, %t1, %t1, 0x0}", "vbroadcasti64x2\t{%1, %0|%0, %1}", }; static const char * const output_4051[] = { "vshufi64x2\t{$0x0, %t1, %t1, %0%{%3%}%N2|%0%{%3%}%N2, %t1, %t1, 0x0}", "vbroadcasti64x2\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * const output_4052[] = { "vshuff64x2\t{$0x0, %t1, %t1, %0|%0, %t1, %t1, 0x0}", "vbroadcastf64x2\t{%1, %0|%0, %1}", }; static const char * const output_4053[] = { "vshuff64x2\t{$0x0, %t1, %t1, %0%{%3%}%N2|%0%{%3%}%N2, %t1, %t1, 0x0}", "vbroadcastf64x2\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", }; static const char * output_4060 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 16962 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int elt = INTVAL (operands[3]); switch (which_alternative) { case 0: case 1: operands[1] = adjust_address_nv (operands[1], SFmode, elt * 4); return "vbroadcastss\t{%1, %0|%0, %k1}"; case 2: operands[2] = GEN_INT (elt * 0x55); return "vpermilps\t{%2, %1, %0|%0, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_4063 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V16SFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilps\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_4064 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V16SFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}"; } } static const char * output_4065 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V8SFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilps\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_4066 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V8SFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}"; } } static const char * output_4067 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V4SFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilps\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_4068 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V4SFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilps\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}"; } } static const char * output_4069 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V8DFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilpd\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_4070 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V8DFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilpd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}"; } } static const char * output_4071 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V4DFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilpd\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_4072 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V4DFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilpd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}"; } } static const char * output_4073 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V2DFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilpd\t{%2, %1, %0|%0, %1, %2}"; } } static const char * output_4074 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17078 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vpermilp_parallel (operands[2], V2DFmode) - 1; operands[2] = GEN_INT (mask); return "vpermilpd\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}"; } } static const char * output_4198 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17423 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vperm2f128_parallel (operands[3], V8SImode) - 1; if (mask == 0x12) return "vinsert%~128\t{$0, %x2, %1, %0|%0, %1, %x2, 0}"; if (mask == 0x20) return "vinsert%~128\t{$1, %x2, %1, %0|%0, %1, %x2, 1}"; operands[3] = GEN_INT (mask); return "vperm2%~128\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_4199 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17423 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vperm2f128_parallel (operands[3], V8SFmode) - 1; if (mask == 0x12) return "vinsertf128\t{$0, %x2, %1, %0|%0, %1, %x2, 0}"; if (mask == 0x20) return "vinsertf128\t{$1, %x2, %1, %0|%0, %1, %x2, 1}"; operands[3] = GEN_INT (mask); return "vperm2f128\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_4200 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17423 "../../gcc-5.1.0/gcc/config/i386/sse.md" { int mask = avx_vperm2f128_parallel (operands[3], V4DFmode) - 1; if (mask == 0x12) return "vinsertf128\t{$0, %x2, %1, %0|%0, %1, %x2, 0}"; if (mask == 0x20) return "vinsertf128\t{$1, %x2, %1, %0|%0, %1, %x2, 1}"; operands[3] = GEN_INT (mask); return "vperm2f128\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } } static const char * output_4201 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17445 "../../gcc-5.1.0/gcc/config/i386/sse.md" { machine_mode imode = GET_MODE_INNER (GET_MODE (operands[0])); operands[2] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (imode)); switch (which_alternative) { case 0: return "palignr\t{%2, %1, %0|%0, %1, %2}"; case 1: return "vpalignr\t{%2, %1, %1, %0|%0, %1, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_4202 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17445 "../../gcc-5.1.0/gcc/config/i386/sse.md" { machine_mode imode = GET_MODE_INNER (GET_MODE (operands[0])); operands[2] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (imode)); switch (which_alternative) { case 0: return "palignr\t{%2, %1, %0|%0, %1, %2}"; case 1: return "vpalignr\t{%2, %1, %1, %0|%0, %1, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_4203 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17445 "../../gcc-5.1.0/gcc/config/i386/sse.md" { machine_mode imode = GET_MODE_INNER (GET_MODE (operands[0])); operands[2] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (imode)); switch (which_alternative) { case 0: return "palignr\t{%2, %1, %0|%0, %1, %2}"; case 1: return "vpalignr\t{%2, %1, %1, %0|%0, %1, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_4204 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17445 "../../gcc-5.1.0/gcc/config/i386/sse.md" { machine_mode imode = GET_MODE_INNER (GET_MODE (operands[0])); operands[2] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (imode)); switch (which_alternative) { case 0: return "palignr\t{%2, %1, %0|%0, %1, %2}"; case 1: return "vpalignr\t{%2, %1, %1, %0|%0, %1, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_4205 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17445 "../../gcc-5.1.0/gcc/config/i386/sse.md" { machine_mode imode = GET_MODE_INNER (GET_MODE (operands[0])); operands[2] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (imode)); switch (which_alternative) { case 0: return "palignr\t{%2, %1, %0|%0, %1, %2}"; case 1: return "vpalignr\t{%2, %1, %1, %0|%0, %1, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_4206 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17445 "../../gcc-5.1.0/gcc/config/i386/sse.md" { machine_mode imode = GET_MODE_INNER (GET_MODE (operands[0])); operands[2] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (imode)); switch (which_alternative) { case 0: return "palignr\t{%2, %1, %0|%0, %1, %2}"; case 1: return "vpalignr\t{%2, %1, %1, %0|%0, %1, %1, %2}"; default: gcc_unreachable (); } } } static const char * output_4207 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17528 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinserti64x2\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; else return "vinsert%~128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; } } static const char * output_4208 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17528 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinserti64x2\t{$0x0, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, 0x0}"; else return "vinsert%~128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; } } static const char * output_4209 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17528 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinsertf64x2\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; else return "vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; } } static const char * output_4210 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17528 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinsertf64x2\t{$0x0, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, 0x0}"; else return "vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; } } static const char * output_4211 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17548 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinserti64x2\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; else return "vinsert%~128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; } } static const char * output_4212 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17548 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinserti64x2\t{$0x1, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, 0x1}"; else return "vinsert%~128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; } } static const char * output_4213 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17548 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinsertf64x2\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; else return "vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; } } static const char * output_4214 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17548 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinsertf64x2\t{$0x1, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, 0x1}"; else return "vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; } } static const char * output_4215 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17569 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinserti32x4\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; else return "vinsert%~128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; } } static const char * output_4216 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17569 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinserti32x4\t{$0x0, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, 0x0}"; else return "vinsert%~128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; } } static const char * output_4217 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17569 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinsertf32x4\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; else return "vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; } } static const char * output_4218 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17569 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinsertf32x4\t{$0x0, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, 0x0}"; else return "vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"; } } static const char * output_4219 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinserti32x4\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; else return "vinsert%~128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; } } static const char * output_4220 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinserti32x4\t{$0x1, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, 0x1}"; else return "vinsert%~128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; } } static const char * output_4221 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinsertf32x4\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; else return "vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; } } static const char * output_4222 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17590 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (TARGET_AVX512VL) return "vinsertf32x4\t{$0x1, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, 0x1}"; else return "vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"; } } static const char * output_4300 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinsert%~128\t{$0x1, %2, %t1, %0|%0, %t1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4301 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinsert%~128\t{$0x1, %2, %t1, %0|%0, %t1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4302 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinsert%~128\t{$0x1, %2, %t1, %0|%0, %t1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4303 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinsert%~128\t{$0x1, %2, %t1, %0|%0, %t1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4304 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinsertf128\t{$0x1, %2, %t1, %0|%0, %t1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4305 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinsertf128\t{$0x1, %2, %t1, %0|%0, %t1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4306 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinserti64x4\t{$0x1, %2, %g1, %0|%0, %g1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4307 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinserti64x4\t{$0x1, %2, %g1, %0|%0, %g1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4308 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinserti64x4\t{$0x1, %2, %g1, %0|%0, %g1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4309 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinserti64x4\t{$0x1, %2, %g1, %0|%0, %g1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4310 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinsertf64x4\t{$0x1, %2, %g1, %0|%0, %g1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4311 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 17816 "../../gcc-5.1.0/gcc/config/i386/sse.md" { switch (which_alternative) { case 0: return "vinsertf64x4\t{$0x1, %2, %g1, %0|%0, %g1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) { case MODE_V16SF: return "vmovaps\t{%1, %t0|%t0, %1}"; case MODE_V8DF: return "vmovapd\t{%1, %t0|%t0, %1}"; case MODE_V8SF: return "vmovaps\t{%1, %x0|%x0, %1}"; case MODE_V4DF: return "vmovapd\t{%1, %x0|%x0, %1}"; case MODE_XI: return "vmovdqa\t{%1, %t0|%t0, %1}"; case MODE_OI: return "vmovdqa\t{%1, %x0|%x0, %1}"; default: gcc_unreachable (); } default: gcc_unreachable (); } } } static const char * output_4377 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V2DImode != V2DImode) return "vpgatherqq\t{%4, %6, %x0|%x0, %6, %4}"; return "vpgatherqq\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4378 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V2DImode != V2DImode) return "vpgatherqq\t{%4, %6, %x0|%x0, %6, %4}"; return "vpgatherqq\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4379 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V2DFmode != V2DFmode) return "vgatherqpd\t{%4, %6, %x0|%x0, %6, %4}"; return "vgatherqpd\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4380 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V2DFmode != V2DFmode) return "vgatherqpd\t{%4, %6, %x0|%x0, %6, %4}"; return "vgatherqpd\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4381 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4DImode != V4DImode) return "vpgatherqq\t{%4, %6, %x0|%x0, %6, %4}"; return "vpgatherqq\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4382 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4DImode != V4DImode) return "vpgatherqq\t{%4, %6, %x0|%x0, %6, %4}"; return "vpgatherqq\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4383 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4DFmode != V4DFmode) return "vgatherqpd\t{%4, %6, %x0|%x0, %6, %4}"; return "vgatherqpd\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4384 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4DFmode != V4DFmode) return "vgatherqpd\t{%4, %6, %x0|%x0, %6, %4}"; return "vgatherqpd\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4385 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4SImode != V4SImode) return "vpgatherqd\t{%4, %6, %x0|%x0, %6, %4}"; return "vpgatherqd\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4386 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4SImode != V4SImode) return "vpgatherqd\t{%4, %6, %x0|%x0, %6, %4}"; return "vpgatherqd\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4387 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4SFmode != V4SFmode) return "vgatherqps\t{%4, %6, %x0|%x0, %6, %4}"; return "vgatherqps\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4388 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4SFmode != V4SFmode) return "vgatherqps\t{%4, %6, %x0|%x0, %6, %4}"; return "vgatherqps\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4389 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8SImode != V4SImode) return "vpgatherqd\t{%4, %6, %x0|%x0, %6, %4}"; return "vpgatherqd\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4390 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8SImode != V4SImode) return "vpgatherqd\t{%4, %6, %x0|%x0, %6, %4}"; return "vpgatherqd\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4391 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8SFmode != V4SFmode) return "vgatherqps\t{%4, %6, %x0|%x0, %6, %4}"; return "vgatherqps\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4392 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18104 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8SFmode != V4SFmode) return "vgatherqps\t{%4, %6, %x0|%x0, %6, %4}"; return "vgatherqps\t{%4, %6, %0|%0, %6, %4}"; } } static const char * output_4473 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V16SImode != V8SImode) { if (64 != 64) return "vpgatherqd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4474 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V16SImode != V8SImode) { if (64 != 64) return "vpgatherqd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4475 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V16SFmode != V8SFmode) { if (64 != 64) return "vgatherqps\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqps\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqps\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4476 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V16SFmode != V8SFmode) { if (64 != 64) return "vgatherqps\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqps\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqps\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4477 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8DImode != V8DImode) { if (64 != 64) return "vpgatherqq\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqq\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqq\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4478 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8DImode != V8DImode) { if (64 != 64) return "vpgatherqq\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqq\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqq\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4479 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8DFmode != V8DFmode) { if (64 != 64) return "vgatherqpd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqpd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4480 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8DFmode != V8DFmode) { if (64 != 64) return "vgatherqpd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqpd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4481 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8SImode != V4SImode) { if (32 != 64) return "vpgatherqd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4482 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8SImode != V4SImode) { if (32 != 64) return "vpgatherqd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4483 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8SFmode != V4SFmode) { if (32 != 64) return "vgatherqps\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqps\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqps\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4484 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V8SFmode != V4SFmode) { if (32 != 64) return "vgatherqps\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqps\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqps\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4485 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4DImode != V4DImode) { if (32 != 64) return "vpgatherqq\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqq\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqq\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4486 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4DImode != V4DImode) { if (32 != 64) return "vpgatherqq\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqq\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqq\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4487 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4DFmode != V4DFmode) { if (32 != 64) return "vgatherqpd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqpd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4488 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4DFmode != V4DFmode) { if (32 != 64) return "vgatherqpd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqpd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4489 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4SImode != V4SImode) { if (16 != 64) return "vpgatherqd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4490 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4SImode != V4SImode) { if (16 != 64) return "vpgatherqd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4491 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4SFmode != V4SFmode) { if (16 != 64) return "vgatherqps\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqps\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqps\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4492 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V4SFmode != V4SFmode) { if (16 != 64) return "vgatherqps\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqps\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqps\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4493 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V2DImode != V2DImode) { if (16 != 64) return "vpgatherqq\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqq\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqq\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4494 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V2DImode != V2DImode) { if (16 != 64) return "vpgatherqq\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vpgatherqq\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vpgatherqq\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4495 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V2DFmode != V2DFmode) { if (16 != 64) return "vgatherqpd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqpd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4496 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 18269 "../../gcc-5.1.0/gcc/config/i386/sse.md" { if (V2DFmode != V2DFmode) { if (16 != 64) return "vgatherqpd\t{%5, %x0%{%1%}|%t0%{%1%}, %g5}"; else return "vgatherqpd\t{%5, %t0%{%1%}|%t0%{%1%}, %g5}"; } return "vgatherqpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}"; } } static const char * output_4720 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 321 "../../gcc-5.1.0/gcc/config/i386/sync.md" { gcc_assert (find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != NULL_RTX); return "fistp%Z0\t%0"; } } static const char * output_4728 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 483 "../../gcc-5.1.0/gcc/config/i386/sync.md" { if (incdec_operand (operands[1], QImode)) { if (operands[1] == const1_rtx) return "lock{%;} %K3inc{b}\t%0"; else { gcc_assert (operands[1] == constm1_rtx); return "lock{%;} %K3dec{b}\t%0"; } } if (x86_maybe_negate_const_int (&operands[1], QImode)) return "lock{%;} %K3sub{b}\t{%1, %0|%0, %1}"; return "lock{%;} %K3add{b}\t{%1, %0|%0, %1}"; } } static const char * output_4729 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 483 "../../gcc-5.1.0/gcc/config/i386/sync.md" { if (incdec_operand (operands[1], HImode)) { if (operands[1] == const1_rtx) return "lock{%;} %K3inc{w}\t%0"; else { gcc_assert (operands[1] == constm1_rtx); return "lock{%;} %K3dec{w}\t%0"; } } if (x86_maybe_negate_const_int (&operands[1], HImode)) return "lock{%;} %K3sub{w}\t{%1, %0|%0, %1}"; return "lock{%;} %K3add{w}\t{%1, %0|%0, %1}"; } } static const char * output_4730 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 483 "../../gcc-5.1.0/gcc/config/i386/sync.md" { if (incdec_operand (operands[1], SImode)) { if (operands[1] == const1_rtx) return "lock{%;} %K3inc{l}\t%0"; else { gcc_assert (operands[1] == constm1_rtx); return "lock{%;} %K3dec{l}\t%0"; } } if (x86_maybe_negate_const_int (&operands[1], SImode)) return "lock{%;} %K3sub{l}\t{%1, %0|%0, %1}"; return "lock{%;} %K3add{l}\t{%1, %0|%0, %1}"; } } static const char * output_4734 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 523 "../../gcc-5.1.0/gcc/config/i386/sync.md" { if (incdec_operand (operands[1], QImode)) { if (operands[1] == const1_rtx) return "lock{%;} %K2inc{b}\t%0"; else { gcc_assert (operands[1] == constm1_rtx); return "lock{%;} %K2dec{b}\t%0"; } } if (x86_maybe_negate_const_int (&operands[1], QImode)) return "lock{%;} %K2sub{b}\t{%1, %0|%0, %1}"; return "lock{%;} %K2add{b}\t{%1, %0|%0, %1}"; } } static const char * output_4735 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 523 "../../gcc-5.1.0/gcc/config/i386/sync.md" { if (incdec_operand (operands[1], HImode)) { if (operands[1] == const1_rtx) return "lock{%;} %K2inc{w}\t%0"; else { gcc_assert (operands[1] == constm1_rtx); return "lock{%;} %K2dec{w}\t%0"; } } if (x86_maybe_negate_const_int (&operands[1], HImode)) return "lock{%;} %K2sub{w}\t{%1, %0|%0, %1}"; return "lock{%;} %K2add{w}\t{%1, %0|%0, %1}"; } } static const char * output_4736 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 523 "../../gcc-5.1.0/gcc/config/i386/sync.md" { if (incdec_operand (operands[1], SImode)) { if (operands[1] == const1_rtx) return "lock{%;} %K2inc{l}\t%0"; else { gcc_assert (operands[1] == constm1_rtx); return "lock{%;} %K2dec{l}\t%0"; } } if (x86_maybe_negate_const_int (&operands[1], SImode)) return "lock{%;} %K2sub{l}\t{%1, %0|%0, %1}"; return "lock{%;} %K2add{l}\t{%1, %0|%0, %1}"; } } static const char * output_4737 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 550 "../../gcc-5.1.0/gcc/config/i386/sync.md" { if (incdec_operand (operands[1], QImode)) { if (operands[1] == const1_rtx) return "lock{%;} %K2dec{b}\t%0"; else { gcc_assert (operands[1] == constm1_rtx); return "lock{%;} %K2inc{b}\t%0"; } } if (x86_maybe_negate_const_int (&operands[1], QImode)) return "lock{%;} %K2add{b}\t{%1, %0|%0, %1}"; return "lock{%;} %K2sub{b}\t{%1, %0|%0, %1}"; } } static const char * output_4738 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 550 "../../gcc-5.1.0/gcc/config/i386/sync.md" { if (incdec_operand (operands[1], HImode)) { if (operands[1] == const1_rtx) return "lock{%;} %K2dec{w}\t%0"; else { gcc_assert (operands[1] == constm1_rtx); return "lock{%;} %K2inc{w}\t%0"; } } if (x86_maybe_negate_const_int (&operands[1], HImode)) return "lock{%;} %K2add{w}\t{%1, %0|%0, %1}"; return "lock{%;} %K2sub{w}\t{%1, %0|%0, %1}"; } } static const char * output_4739 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED) { #line 550 "../../gcc-5.1.0/gcc/config/i386/sync.md" { if (incdec_operand (operands[1], SImode)) { if (operands[1] == const1_rtx) return "lock{%;} %K2dec{l}\t%0"; else { gcc_assert (operands[1] == constm1_rtx); return "lock{%;} %K2inc{l}\t%0"; } } if (x86_maybe_negate_const_int (&operands[1], SImode)) return "lock{%;} %K2add{l}\t{%1, %0|%0, %1}"; return "lock{%;} %K2sub{l}\t{%1, %0|%0, %1}"; } } static const struct insn_operand_data operand_data[] = { { 0, "", VOIDmode, 0, 0, 0, 0 }, { nonimmediate_operand, "q,?mq", QImode, 0, 0, 1, 1 }, { const0_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,?mr", HImode, 0, 0, 1, 1 }, { const0_operand, "", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,?mr", SImode, 0, 0, 1, 1 }, { const0_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,?mr", DImode, 0, 0, 1, 1 }, { const0_operand, "", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "qm,q", QImode, 0, 0, 1, 1 }, { general_operand, "qn,qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm,r", HImode, 0, 0, 1, 1 }, { general_operand, "rn,rm", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm,r", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm,r", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm", DImode, 0, 0, 1, 1 }, { nonimmediate_x64nomem_operand, "Q,m", QImode, 0, 0, 1, 1 }, { ext_register_operand, "Q,Q", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "Q", VOIDmode, 0, 0, 1, 0 }, { const0_operand, "", QImode, 0, 0, 1, 0 }, { ext_register_operand, "Q,Q", VOIDmode, 0, 0, 1, 0 }, { general_x64nomem_operand, "Qn,m", QImode, 0, 0, 1, 1 }, { ext_register_operand, "Q", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "Q", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { const0_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { const0_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { const0_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm", SFmode, 0, 0, 1, 1 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm", DFmode, 0, 0, 1, 1 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { float_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { float_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { float_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { memory_operand, "m", SImode, 0, 0, 1, 1 }, { float_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { memory_operand, "m", SImode, 0, 0, 1, 1 }, { float_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { memory_operand, "m", SImode, 0, 0, 1, 1 }, { float_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "a", HImode, 0, 0, 1, 0 }, { register_operand, "f,x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "f,xm", SFmode, 0, 0, 1, 1 }, { register_operand, "f,x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "f,xm", DFmode, 0, 0, 1, 1 }, { register_operand, "x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", SFmode, 0, 0, 1, 1 }, { register_operand, "x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", DFmode, 0, 0, 1, 1 }, { push_operand, "=<", DImode, 0, 0, 1, 1 }, { general_no_elim_operand, "riF*o", DImode, 0, 0, 1, 1 }, { push_operand, "=<", SImode, 0, 0, 1, 1 }, { general_no_elim_operand, "ri*m", SImode, 0, 0, 1, 1 }, { push_operand, "=X", QImode, 0, 0, 1, 1 }, { nonmemory_no_elim_operand, "rn", QImode, 0, 0, 1, 0 }, { push_operand, "=X", HImode, 0, 0, 1, 1 }, { nonmemory_no_elim_operand, "rn", HImode, 0, 0, 1, 0 }, { push_operand, "=<", SImode, 0, 0, 1, 1 }, { general_no_elim_operand, "re*m", SImode, 0, 0, 1, 1 }, { push_operand, "=<", DImode, 0, 0, 1, 1 }, { general_no_elim_operand, "re*m", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r*m", SImode, 0, 0, 1, 1 }, { pop_operand, ">", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r*m", DImode, 0, 0, 1, 1 }, { pop_operand, ">", DImode, 0, 0, 1, 1 }, { push_operand, "=<", SImode, 0, 0, 1, 1 }, { flags_reg_operand, "", SImode, 0, 0, 1, 0 }, { push_operand, "=<", DImode, 0, 0, 1, 1 }, { flags_reg_operand, "", DImode, 0, 0, 1, 0 }, { flags_reg_operand, "", SImode, 0, 0, 1, 0 }, { pop_operand, ">", SImode, 0, 0, 1, 1 }, { flags_reg_operand, "", DImode, 0, 0, 1, 0 }, { pop_operand, ">", DImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { const0_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=x,x,m", XImode, 0, 0, 1, 1 }, { vector_move_operand, "C,xm,x", XImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", OImode, 0, 0, 1, 1 }, { vector_move_operand, "C,vm,v", OImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=!r,o,v,v,m", TImode, 0, 0, 1, 1 }, { general_operand, "riFo,re,C,vm,v", TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,o,r,r,r,m,*y,*y,?*y,?m,?r,?*Ym,*v,*v,*v,m,?r,?r,?*Yi,?*Ym,?*Yi,*k,*k,*r,*m", DImode, 0, 0, 1, 1 }, { general_operand, "riFo,riF,Z,rem,i,re,C,*y,m,*y,*Yn,r,C,*v,m,*v,*Yj,*v,r,*Yj,*Yn,*r,*km,*k,*k", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,m,*y,*y,?rm,?*y,*v,*v,*v,m,?r,?r,?*Yi,*k,*rm", SImode, 0, 0, 1, 1 }, { general_operand, "g,re,C,*y,*y,rm,C,*v,m,*v,*Yj,*v,r,*krm,*k", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=k,k", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm,k", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,r,r,m,k,k,rm", HImode, 0, 0, 1, 1 }, { general_operand, "r,rn,rm,rn,rm,k,k", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=q,q,q,r,r,?r,m,k,k,r,m,k", QImode, 0, 0, 1, 1 }, { general_operand, "q,qn,qm,q,rn,qm,qn,r,k,k,k,m", QImode, 0, 0, 1, 1 }, { x86_64_movabs_operand, "i,r", DImode, 0, 0, 1, 0 }, { nonmemory_operand, "a,rn", QImode, 0, 0, 1, 0 }, { x86_64_movabs_operand, "i,r", DImode, 0, 0, 1, 0 }, { nonmemory_operand, "a,rn", HImode, 0, 0, 1, 0 }, { x86_64_movabs_operand, "i,r", DImode, 0, 0, 1, 0 }, { nonmemory_operand, "a,re", SImode, 0, 0, 1, 0 }, { x86_64_movabs_operand, "i,r", DImode, 0, 0, 1, 0 }, { nonmemory_operand, "a,re", DImode, 0, 0, 1, 0 }, { register_operand, "=a,r", QImode, 0, 0, 1, 0 }, { x86_64_movabs_operand, "i,r", DImode, 0, 0, 1, 0 }, { register_operand, "=a,r", HImode, 0, 0, 1, 0 }, { x86_64_movabs_operand, "i,r", DImode, 0, 0, 1, 0 }, { register_operand, "=a,r", SImode, 0, 0, 1, 0 }, { x86_64_movabs_operand, "i,r", DImode, 0, 0, 1, 0 }, { register_operand, "=a,r", DImode, 0, 0, 1, 0 }, { x86_64_movabs_operand, "i,r", DImode, 0, 0, 1, 0 }, { register_operand, "+r", SImode, 0, 0, 1, 0 }, { register_operand, "+r", SImode, 0, 0, 1, 0 }, { register_operand, "+r", QImode, 0, 0, 1, 0 }, { register_operand, "+r", QImode, 0, 0, 1, 0 }, { register_operand, "+r", HImode, 0, 0, 1, 0 }, { register_operand, "+r", HImode, 0, 0, 1, 0 }, { register_operand, "+q", QImode, 0, 0, 1, 0 }, { register_operand, "+q", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "+qm,q", QImode, 1, 0, 1, 1 }, { general_operand, "qn,m", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "+rm,r", HImode, 1, 0, 1, 1 }, { general_operand, "rn,m", HImode, 0, 0, 1, 1 }, { register_operand, "+q", QImode, 1, 0, 1, 0 }, { const0_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "+r", HImode, 1, 0, 1, 0 }, { const0_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "=R", HImode, 0, 0, 1, 0 }, { ext_register_operand, "Q", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=R", SImode, 0, 0, 1, 0 }, { ext_register_operand, "Q", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_x64nomem_operand, "=Q,?R,m", QImode, 0, 0, 1, 1 }, { ext_register_operand, "Q,Q,Q", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "+Q,Q", VOIDmode, 0, 0, 1, 0 }, { general_x64nomem_operand, "Qn,m", SImode, 0, 0, 1, 1 }, { ext_register_operand, "+Q", VOIDmode, 0, 0, 1, 0 }, { register_operand, "Q", SImode, 0, 0, 1, 0 }, { push_operand, "=<,<", TFmode, 0, 0, 1, 1 }, { general_no_elim_operand, "x,*roF", TFmode, 0, 0, 1, 1 }, { push_operand, "=<,<,<,<", XFmode, 0, 0, 1, 1 }, { general_no_elim_operand, "f,r,*r,oF", XFmode, 0, 0, 1, 1 }, { push_operand, "=<,<,<,<,<,<", DFmode, 0, 0, 1, 1 }, { general_no_elim_operand, "f,r,*r,oF,rmF,x", DFmode, 0, 0, 1, 1 }, { push_operand, "=<,<,<", SFmode, 0, 0, 1, 1 }, { general_no_elim_operand, "f,rmF,x", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,x,m,?*r,!o", TFmode, 0, 0, 1, 1 }, { general_operand, "C,xm,x,*roF,*rC", TFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=f,m,f,?r,!o,?*r,!o,!o,!o", XFmode, 0, 0, 1, 1 }, { general_operand, "fm,f,G,roF,r,*roF,*r,F,C", XFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=Yf*f,m,Yf*f,?r,!o,?*r,!o,!o,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m,r,Yi", DFmode, 0, 0, 1, 1 }, { general_operand, "Yf*fm,Yf*f,G,roF,r,*roF,*r,F,rm,rC,C,F,C,v,m,v,C,*x,m,*x,Yj,r", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=Yf*f,m,Yf*f,?r,?m,v,v,v,m,?r,?Yi,!*y,!*y,!m,!r,!*Ym", SFmode, 0, 0, 1, 1 }, { general_operand, "Yf*fm,Yf*f,G,rmF,rF,C,v,m,v,Yj,r,*y,m,*y,*Yn,r", SFmode, 0, 0, 1, 1 }, { register_operand, "+f", XFmode, 0, 0, 1, 0 }, { register_operand, "+f", XFmode, 0, 0, 1, 0 }, { fp_register_operand, "+f", SFmode, 0, 0, 1, 0 }, { fp_register_operand, "+f", SFmode, 0, 0, 1, 0 }, { fp_register_operand, "+f", DFmode, 0, 0, 1, 0 }, { fp_register_operand, "+f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "=r,?r,?o,r,o,?*Ym,?!*y,?r,?r,?*Yi,?*x", DImode, 0, 0, 1, 1 }, { x86_64_zext_operand, "0,rm,r,rmWz,0,r,m,*Yj,*x,r,m", SImode, 0, 0, 1, 1 }, { register_operand, "=r,?&q", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,qm", QImode, 0, 0, 1, 1 }, { register_operand, "=r,?&r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,rm", HImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "qm", QImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", HImode, 0, 0, 1, 1 }, { register_operand, "=r,?&q", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,qm", QImode, 0, 0, 1, 1 }, { register_operand, "=r", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=*A,r,?r,?*o", DImode, 0, 0, 1, 1 }, { register_operand, "0,0,r,r", SImode, 0, 0, 1, 0 }, { scratch_operand, "=X,X,X,&r", SImode, 0, 0, 0, 0 }, { register_operand, "=*a,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "*0,rm", HImode, 0, 0, 1, 1 }, { register_operand, "=*a,r", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "*0,qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=f,m,x", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm,f,xm", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=f,m", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm,f", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=f,m", XFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm,f", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=f,m", XFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm,f", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=fm,x", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "f,xm", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=fm", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "f", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,x,?f,?x,?*r", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "f,xm,f,f,f", DFmode, 0, 0, 1, 1 }, { memory_operand, "=X,X,m,m,m", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,?f,?x,?*r", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "f,f,f,f", DFmode, 0, 0, 1, 1 }, { memory_operand, "=X,m,m,m", SFmode, 0, 0, 1, 1 }, { memory_operand, "=m", SFmode, 0, 0, 1, 1 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "=m,?f,?x,?*r", SFmode, 0, 0, 1, 1 }, { register_operand, "f,f,f,f", XFmode, 0, 0, 1, 0 }, { memory_operand, "=X,m,m,m", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,?f,?x,?*r", DFmode, 0, 0, 1, 1 }, { register_operand, "f,f,f,f", XFmode, 0, 0, 1, 0 }, { memory_operand, "=X,m,m,m", DFmode, 0, 0, 1, 1 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { memory_operand, "=m", SFmode, 0, 0, 1, 1 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { memory_operand, "=m", DFmode, 0, 0, 1, 1 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { register_operand, "=&x,&x", SImode, 0, 0, 1, 0 }, { scratch_operand, "=x,&x", V4SFmode, 0, 0, 0, 0 }, { scratch_operand, "=x,x", V4SFmode, 0, 0, 0, 0 }, { nonimmediate_operand, "xm,xm", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "m,x", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=&x,&x", SImode, 0, 0, 1, 0 }, { scratch_operand, "=x,&x", V2DFmode, 0, 0, 0, 0 }, { scratch_operand, "=x,x", V2DFmode, 0, 0, 0, 0 }, { nonimmediate_operand, "xm,xm", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "m,x", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m", SFmode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "=m", HImode, 0, 0, 1, 1 }, { register_operand, "f", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=&1f", XFmode, 0, 0, 0, 0 }, { memory_operand, "=m", SImode, 0, 0, 1, 1 }, { register_operand, "f", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=&1f", XFmode, 0, 0, 0, 0 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { register_operand, "f", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=&1f", XFmode, 0, 0, 0, 0 }, { nonimmediate_operand, "=m,?r", HImode, 0, 0, 1, 1 }, { register_operand, "f,f", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "=X,m", HImode, 0, 0, 1, 1 }, { scratch_operand, "=&1f,&1f", XFmode, 0, 0, 0, 0 }, { nonimmediate_operand, "=m,?r", SImode, 0, 0, 1, 1 }, { register_operand, "f,f", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "=X,m", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&1f,&1f", XFmode, 0, 0, 0, 0 }, { nonimmediate_operand, "=m,?r", DImode, 0, 0, 1, 1 }, { register_operand, "f,f", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "=X,m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&1f,&1f", XFmode, 0, 0, 0, 0 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { register_operand, "f", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { scratch_operand, "=&1f", XFmode, 0, 0, 0, 0 }, { nonimmediate_operand, "=m,?r", DImode, 0, 0, 1, 1 }, { register_operand, "f,f", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "=X,m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&1f,&1f", XFmode, 0, 0, 0, 0 }, { memory_operand, "=m", HImode, 0, 0, 1, 1 }, { register_operand, "f", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { memory_operand, "=m", SImode, 0, 0, 1, 1 }, { register_operand, "f", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,?r", HImode, 0, 0, 1, 1 }, { register_operand, "f,f", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "=X,m", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,?r", SImode, 0, 0, 1, 1 }, { register_operand, "f,f", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "=X,m", SImode, 0, 0, 1, 1 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", DImode, 0, 0, 1, 1 }, { register_operand, "=f,x,x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,r,m", SImode, 0, 0, 1, 1 }, { register_operand, "=f,x,x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,r,m", SImode, 0, 0, 1, 1 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", DImode, 0, 0, 1, 1 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", DImode, 0, 0, 1, 1 }, { register_operand, "=f,f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,?r", DImode, 0, 0, 1, 1 }, { memory_operand, "=X,m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=X,x", V4SImode, 0, 0, 0, 0 }, { scratch_operand, "=X,x", V4SImode, 0, 0, 0, 0 }, { register_operand, "=f,f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,?r", DImode, 0, 0, 1, 1 }, { memory_operand, "=X,m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=X,x", V4SImode, 0, 0, 0, 0 }, { scratch_operand, "=X,x", V4SImode, 0, 0, 0, 0 }, { register_operand, "=f,f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,?r", DImode, 0, 0, 1, 1 }, { memory_operand, "=X,m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=X,x", V4SImode, 0, 0, 0, 0 }, { scratch_operand, "=X,x", V4SImode, 0, 0, 0, 0 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=x", DImode, 0, 0, 0, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=x", DImode, 0, 0, 0, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=x", DImode, 0, 0, 0, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { address_no_seg_operand, "Ts", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,o", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "ronF,rnF", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,o", TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", TImode, 0, 0, 1, 1 }, { x86_64_general_operand, "roe,re", TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=qm,q", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", QImode, 0, 0, 1, 1 }, { general_operand, "qn,qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm,r,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,r,r", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme,re,0,le", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm,r,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,r,r", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme,re,0,le", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,r,r,Yp", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,r,Yp", HImode, 0, 0, 1, 1 }, { general_operand, "rn,rm,0,ln", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=qm,q,q,r,r,Yp", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,q,0,r,Yp", QImode, 0, 0, 1, 1 }, { general_operand, "qn,qm,0,rn,0,ln", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "+qm,q", QImode, 1, 0, 1, 1 }, { general_operand, "qn,qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=q,qm,q", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,q", QImode, 0, 0, 1, 1 }, { general_operand, "qmn,qn,0", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm,r", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,r", HImode, 0, 0, 1, 1 }, { general_operand, "rmn,rn,0", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,r", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme,re,0", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,r", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme,re,0", DImode, 0, 0, 1, 1 }, { scratch_operand, "=q,q", QImode, 0, 0, 0, 0 }, { nonimmediate_operand, "%0,q", QImode, 0, 0, 1, 1 }, { general_operand, "qmn,0", QImode, 0, 0, 1, 1 }, { scratch_operand, "=r,r", HImode, 0, 0, 0, 0 }, { nonimmediate_operand, "%0,r", HImode, 0, 0, 1, 1 }, { general_operand, "rmn,0", HImode, 0, 0, 1, 1 }, { scratch_operand, "=r,r", SImode, 0, 0, 0, 0 }, { nonimmediate_operand, "%0,r", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme,0", SImode, 0, 0, 1, 1 }, { scratch_operand, "=r,r", DImode, 0, 0, 0, 0 }, { nonimmediate_operand, "%0,r", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme,0", DImode, 0, 0, 1, 1 }, { scratch_operand, "=qm", QImode, 0, 0, 0, 0 }, { nonimmediate_operand, "0", QImode, 0, 0, 1, 1 }, { const_int_operand, "n", QImode, 0, 0, 1, 0 }, { scratch_operand, "=rm", HImode, 0, 0, 0, 0 }, { nonimmediate_operand, "0", HImode, 0, 0, 1, 1 }, { const_int_operand, "n", HImode, 0, 0, 1, 0 }, { scratch_operand, "=rm", SImode, 0, 0, 0, 0 }, { nonimmediate_operand, "0", SImode, 0, 0, 1, 1 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { ext_register_operand, "=Q,Q", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "0,0", VOIDmode, 0, 0, 1, 0 }, { general_x64nomem_operand, "Qn,m", QImode, 0, 0, 1, 1 }, { ext_register_operand, "=Q", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "%0", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "Q", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "=q,qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", QImode, 0, 0, 1, 1 }, { sext_operand, "qmWe,qWe", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", HImode, 0, 0, 1, 1 }, { sext_operand, "rmWe,rWe", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", SImode, 0, 0, 1, 1 }, { x86_64_sext_operand, "rmWe,rWe", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", DImode, 0, 0, 1, 1 }, { x86_64_sext_operand, "rmWe,rWe", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", QImode, 0, 0, 1, 1 }, { x86_64_immediate_operand, "n", QImode, 0, 0, 1, 0 }, { const_int_operand, "i", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", HImode, 0, 0, 1, 1 }, { x86_64_immediate_operand, "n", HImode, 0, 0, 1, 0 }, { const_int_operand, "i", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", SImode, 0, 0, 1, 1 }, { x86_64_immediate_operand, "e", SImode, 0, 0, 1, 0 }, { const_int_operand, "i", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", DImode, 0, 0, 1, 1 }, { x86_64_immediate_operand, "e", DImode, 0, 0, 1, 0 }, { const_int_operand, "i", TImode, 0, 0, 1, 0 }, { register_operand, "=r", VOIDmode, 0, 0, 1, 0 }, { index_register_operand, "l", VOIDmode, 0, 0, 1, 0 }, { register_operand, "r", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "i", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=r", VOIDmode, 0, 0, 1, 0 }, { index_register_operand, "l", VOIDmode, 0, 0, 1, 0 }, { const248_operand, "n", VOIDmode, 0, 0, 1, 0 }, { nonmemory_operand, "ri", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=r", VOIDmode, 0, 0, 1, 0 }, { index_register_operand, "l", VOIDmode, 0, 0, 1, 0 }, { const248_operand, "n", VOIDmode, 0, 0, 1, 0 }, { register_operand, "r", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "i", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=r", VOIDmode, 0, 0, 1, 0 }, { index_register_operand, "l", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "n", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "n", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "=r,o", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "ronF,rnF", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,o", TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", TImode, 0, 0, 1, 1 }, { x86_64_general_operand, "roe,re", TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=qm,q", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", QImode, 0, 0, 1, 1 }, { general_operand, "qn,qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,r", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", HImode, 0, 0, 1, 1 }, { general_operand, "rn,rm", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=qm,q", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", QImode, 0, 0, 1, 1 }, { sext_operand, "qWe,qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,r", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", HImode, 0, 0, 1, 1 }, { sext_operand, "rWe,rm", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", SImode, 0, 0, 1, 1 }, { x86_64_sext_operand, "rWe,rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", DImode, 0, 0, 1, 1 }, { x86_64_sext_operand, "rWe,rm", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=qm,q", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", QImode, 0, 0, 1, 1 }, { general_operand, "qn,qm", QImode, 0, 0, 1, 1 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "=qm,q", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", QImode, 0, 0, 1, 1 }, { general_operand, "qn,qm", QImode, 0, 0, 1, 1 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "=rm,r", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", HImode, 0, 0, 1, 1 }, { general_operand, "rn,rm", HImode, 0, 0, 1, 1 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "=rm,r", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", HImode, 0, 0, 1, 1 }, { general_operand, "rn,rm", HImode, 0, 0, 1, 1 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "=rm,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm", SImode, 0, 0, 1, 1 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "=rm,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm", SImode, 0, 0, 1, 1 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "=rm,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm", DImode, 0, 0, 1, 1 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "=rm,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm", DImode, 0, 0, 1, 1 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "=r", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm", DImode, 0, 0, 1, 1 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "=q", QImode, 0, 0, 0, 0 }, { nonimmediate_operand, "%0", QImode, 0, 0, 1, 1 }, { general_operand, "qmn", QImode, 0, 0, 1, 1 }, { scratch_operand, "=r", HImode, 0, 0, 0, 0 }, { nonimmediate_operand, "%0", HImode, 0, 0, 1, 1 }, { general_operand, "rmn", HImode, 0, 0, 1, 1 }, { scratch_operand, "=r", SImode, 0, 0, 0, 0 }, { nonimmediate_operand, "%0", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme", SImode, 0, 0, 1, 1 }, { register_operand, "=r,r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%rm,rm,0", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "K,e,mr", SImode, 0, 0, 1, 1 }, { register_operand, "=r,r,r", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%rm,rm,0", HImode, 0, 0, 1, 1 }, { general_operand, "K,n,mr", HImode, 0, 0, 1, 1 }, { register_operand, "=a", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "qm", QImode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%rm,0", SImode, 0, 0, 1, 1 }, { x86_64_sext_operand, "We,mr", SImode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm,rm", SImode, 0, 0, 1, 1 }, { x86_64_immediate_operand, "K,n", QImode, 0, 0, 1, 0 }, { const_int_operand, "K,i", HImode, 0, 0, 1, 0 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm,rm", SImode, 0, 0, 1, 1 }, { x86_64_immediate_operand, "K,n", HImode, 0, 0, 1, 0 }, { const_int_operand, "K,i", SImode, 0, 0, 1, 0 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm,rm", SImode, 0, 0, 1, 1 }, { x86_64_immediate_operand, "K,e", SImode, 0, 0, 1, 0 }, { const_int_operand, "K,i", DImode, 0, 0, 1, 0 }, { register_operand, "=a", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { scratch_operand, "=d", SImode, 0, 0, 0, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%d", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "=r,A", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%d,0", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm,rm", SImode, 0, 0, 1, 1 }, { register_operand, "=A", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "qm", QImode, 0, 0, 1, 1 }, { register_operand, "=d", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%a", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { scratch_operand, "=1", SImode, 0, 0, 0, 0 }, { register_operand, "=a", SImode, 0, 0, 1, 0 }, { register_operand, "=&d", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "=&d", HImode, 0, 0, 1, 0 }, { register_operand, "0", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", HImode, 0, 0, 1, 1 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "=d", HImode, 0, 0, 1, 0 }, { register_operand, "0", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", HImode, 0, 0, 1, 1 }, { register_operand, "1", HImode, 0, 0, 1, 0 }, { register_operand, "=a", SImode, 0, 0, 1, 0 }, { register_operand, "=d", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "1", SImode, 0, 0, 1, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { register_operand, "0", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "qm", QImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%!*a,q,qm,r", QImode, 0, 0, 1, 1 }, { general_operand, "n,n,qn,n", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%!*a,q,qm", QImode, 0, 0, 1, 1 }, { general_operand, "n,n,qn", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%!*a,r,rm", HImode, 0, 0, 1, 1 }, { general_operand, "n,n,rn", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%!*a,r,rm", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "e,e,re", SImode, 0, 0, 1, 1 }, { ext_register_operand, "Q", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "n", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "Q,Q", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_x64nomem_operand, "Q,m", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "rm", VOIDmode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", VOIDmode, 0, 0, 1, 1 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { mask_reg_operand, "=k", QImode, 0, 0, 1, 0 }, { mask_reg_operand, "k", QImode, 0, 0, 1, 0 }, { mask_reg_operand, "k", QImode, 0, 0, 1, 0 }, { mask_reg_operand, "=k", HImode, 0, 0, 1, 0 }, { mask_reg_operand, "k", HImode, 0, 0, 1, 0 }, { mask_reg_operand, "k", HImode, 0, 0, 1, 0 }, { mask_reg_operand, "=k", SImode, 0, 0, 1, 0 }, { mask_reg_operand, "k", SImode, 0, 0, 1, 0 }, { mask_reg_operand, "k", SImode, 0, 0, 1, 0 }, { mask_reg_operand, "=k", DImode, 0, 0, 1, 0 }, { mask_reg_operand, "k", DImode, 0, 0, 1, 0 }, { mask_reg_operand, "k", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm,r,Ya,!k", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,qm,k", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "re,rm,L,k", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,r,Ya,!k", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,qm,k", HImode, 0, 0, 1, 1 }, { general_operand, "rn,rm,L,k", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=qm,q,r,!k", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,0,k", QImode, 0, 0, 1, 1 }, { general_operand, "qn,qmn,rn,k", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "+qm,q", QImode, 1, 0, 1, 1 }, { general_operand, "qn,qmn", QImode, 0, 0, 1, 1 }, { register_operand, "=r,&r,!k", QImode, 0, 0, 1, 0 }, { register_operand, "r,0,k", QImode, 0, 0, 1, 0 }, { register_operand, "r,r,k", QImode, 0, 0, 1, 0 }, { register_operand, "=r,&r,!k", HImode, 0, 0, 1, 0 }, { register_operand, "r,0,k", HImode, 0, 0, 1, 0 }, { register_operand, "r,r,k", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=q,qm,*r", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,0", QImode, 0, 0, 1, 1 }, { general_operand, "qmn,qn,n", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=q,qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", QImode, 0, 0, 1, 1 }, { general_operand, "qmn,qn", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", HImode, 0, 0, 1, 1 }, { general_operand, "rmn,rn", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme,re", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "+q,qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "qmn,qn", QImode, 0, 0, 1, 1 }, { ext_register_operand, "=Q", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "0", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "n", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "=Q,Q", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "0,0", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_x64nomem_operand, "Q,m", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm,k", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,k", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme,re,k", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm,k", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,k", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme,re,k", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm,!k", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,k", HImode, 0, 0, 1, 1 }, { general_operand, ",r,k", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=q,m,r,!k", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0,0,k", QImode, 0, 0, 1, 1 }, { general_operand, "qmn,qn,rn,k", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "+q,m", QImode, 1, 0, 1, 1 }, { general_operand, "qmn,qn", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,rm", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "%0,0", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme,re", DImode, 0, 0, 1, 1 }, { register_operand, "=r,!k", QImode, 0, 0, 1, 0 }, { register_operand, "0,k", QImode, 0, 0, 1, 0 }, { register_operand, "r,k", QImode, 0, 0, 1, 0 }, { register_operand, "=r,!k", HImode, 0, 0, 1, 0 }, { register_operand, "0,k", HImode, 0, 0, 1, 0 }, { register_operand, "r,k", HImode, 0, 0, 1, 0 }, { register_operand, "=r,!k", SImode, 0, 0, 1, 0 }, { register_operand, "0,k", SImode, 0, 0, 1, 0 }, { register_operand, "r,k", SImode, 0, 0, 1, 0 }, { register_operand, "=r,!k", DImode, 0, 0, 1, 0 }, { register_operand, "0,k", DImode, 0, 0, 1, 0 }, { register_operand, "r,k", DImode, 0, 0, 1, 0 }, { register_operand, "k", HImode, 0, 0, 1, 0 }, { register_operand, "k", HImode, 0, 0, 1, 0 }, { register_operand, "=k", HImode, 0, 0, 1, 0 }, { register_operand, "k", HImode, 0, 0, 1, 0 }, { register_operand, "k", QImode, 0, 0, 1, 0 }, { register_operand, "=k", SImode, 0, 0, 1, 0 }, { register_operand, "k", SImode, 0, 0, 1, 0 }, { register_operand, "k", SImode, 0, 0, 1, 0 }, { register_operand, "=k", DImode, 0, 0, 1, 0 }, { register_operand, "k", DImode, 0, 0, 1, 0 }, { register_operand, "k", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "+q,qm", QImode, 0, 0, 1, 1 }, { general_operand, "qmn,qn", QImode, 0, 0, 1, 1 }, { scratch_operand, "=r", DImode, 0, 0, 0, 0 }, { nonimmediate_operand, "%0", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "rme", DImode, 0, 0, 1, 1 }, { ext_register_operand, "=Q", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "0", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "Q", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "=ro", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=ro", TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", QImode, 0, 0, 1, 1 }, { const_int_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", HImode, 0, 0, 1, 1 }, { const_int_operand, "", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", SImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", DImode, 0, 0, 1, 1 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "=x,x,f,!r", SFmode, 0, 0, 1, 0 }, { register_operand, "0,x,0,0", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,0,X,X", V4SFmode, 0, 0, 1, 1 }, { absneg_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x,f,!r", DFmode, 0, 0, 1, 0 }, { register_operand, "0,x,0,0", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,0,X,X", V2DFmode, 0, 0, 1, 1 }, { absneg_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=x,x,!r", SFmode, 0, 0, 1, 0 }, { register_operand, "0,x,0", SFmode, 0, 0, 1, 0 }, { register_operand, "xm,0,X", V4SFmode, 0, 0, 1, 0 }, { absneg_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x,!r", DFmode, 0, 0, 1, 0 }, { register_operand, "0,x,0", DFmode, 0, 0, 1, 0 }, { register_operand, "xm,0,X", V2DFmode, 0, 0, 1, 0 }, { absneg_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f,!r", SFmode, 0, 0, 1, 0 }, { register_operand, "0,0", SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { absneg_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=f,!r", DFmode, 0, 0, 1, 0 }, { register_operand, "0,0", DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { absneg_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f,!r", XFmode, 0, 0, 1, 0 }, { register_operand, "0,0", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { absneg_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=x,x", TFmode, 0, 0, 1, 0 }, { register_operand, "0,x", TFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,0", TFmode, 0, 0, 1, 1 }, { absneg_operator, "", TFmode, 0, 1, 0, 0 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", XFmode, 0, 0, 1, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { register_operand, "=x", SFmode, 0, 0, 1, 0 }, { vector_move_operand, "xmC", V4SFmode, 0, 0, 1, 1 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x", DFmode, 0, 0, 1, 0 }, { vector_move_operand, "xmC", V2DFmode, 0, 0, 1, 1 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x", TFmode, 0, 0, 1, 0 }, { vector_move_operand, "xmC", TFmode, 0, 0, 1, 1 }, { register_operand, "0", TFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", TFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,x,x,x", SFmode, 0, 0, 1, 0 }, { scratch_operand, "=x,x,x,x,x", V4SFmode, 0, 0, 0, 0 }, { register_operand, "x,0,0,x,x", SFmode, 0, 0, 1, 0 }, { register_operand, "1,1,x,1,x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "X,xm,xm,0,0", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,xm,1,xm,1", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,x,x,x", DFmode, 0, 0, 1, 0 }, { scratch_operand, "=x,x,x,x,x", V2DFmode, 0, 0, 0, 0 }, { register_operand, "x,0,0,x,x", DFmode, 0, 0, 1, 0 }, { register_operand, "1,1,x,1,x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "X,xm,xm,0,0", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,xm,1,xm,1", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,x,x,x", TFmode, 0, 0, 1, 0 }, { scratch_operand, "=x,x,x,x,x", TFmode, 0, 0, 0, 0 }, { register_operand, "x,0,0,x,x", TFmode, 0, 0, 1, 0 }, { register_operand, "1,1,x,1,x", TFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "X,xm,xm,0,0", TFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,xm,1,xm,1", TFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,k", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,k", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,k", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,k", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,!k", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,k", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=qm,r,!k", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0,k", QImode, 0, 0, 1, 1 }, { register_operand, "=&r,r", DImode, 0, 0, 1, 0 }, { reg_or_pm1_operand, "n,0", DImode, 0, 0, 1, 0 }, { nonmemory_operand, "Jc,Jc", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "+r*m", SImode, 0, 0, 1, 1 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { nonmemory_operand, "Ic", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", SImode, 0, 0, 1, 1 }, { register_operand, "c", SImode, 0, 0, 1, 0 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", DImode, 0, 0, 1, 1 }, { register_operand, "c", SImode, 0, 0, 1, 0 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm,r,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,l,rm", SImode, 0, 0, 1, 1 }, { nonmemory_operand, "cI,M,r", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm,r,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,l,rm", DImode, 0, 0, 1, 1 }, { nonmemory_operand, "cJ,M,r", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm,Yp", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,l", HImode, 0, 0, 1, 1 }, { nonmemory_operand, "cI,M", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=qm,r,Yp", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,0,l", QImode, 0, 0, 1, 1 }, { nonmemory_operand, "cI,cI,M", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "+qm", QImode, 1, 0, 1, 1 }, { nonmemory_operand, "cI", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", QImode, 0, 0, 1, 1 }, { const_1_to_31_operand, "I", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", HImode, 0, 0, 1, 1 }, { const_1_to_31_operand, "I", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", SImode, 0, 0, 1, 1 }, { const_1_to_31_operand, "I", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", DImode, 0, 0, 1, 1 }, { const_1_to_63_operand, "J", QImode, 0, 0, 1, 0 }, { scratch_operand, "=q", QImode, 0, 0, 0, 0 }, { register_operand, "0", QImode, 0, 0, 1, 0 }, { const_1_to_31_operand, "I", QImode, 0, 0, 1, 0 }, { scratch_operand, "=r", HImode, 0, 0, 0, 0 }, { register_operand, "0", HImode, 0, 0, 1, 0 }, { const_1_to_31_operand, "I", QImode, 0, 0, 1, 0 }, { scratch_operand, "=r", SImode, 0, 0, 0, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { const_1_to_31_operand, "I", QImode, 0, 0, 1, 0 }, { scratch_operand, "=r", DImode, 0, 0, 0, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { const_1_to_63_operand, "J", QImode, 0, 0, 1, 0 }, { register_operand, "=r", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { nonmemory_operand, "Jc", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=*d,rm", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "*a,0", SImode, 0, 0, 1, 1 }, { const_int_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,rm", SImode, 0, 0, 1, 1 }, { nonmemory_operand, "cI,r", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,rm", DImode, 0, 0, 1, 1 }, { nonmemory_operand, "cJ,r", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=qm", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", QImode, 0, 0, 1, 1 }, { nonmemory_operand, "cI", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0", HImode, 0, 0, 1, 1 }, { nonmemory_operand, "cI", QImode, 0, 0, 1, 0 }, { register_operand, "=r", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { const_1_to_31_operand, "I", QImode, 0, 0, 1, 0 }, { scratch_operand, "=&r", SImode, 0, 0, 0, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { immediate_operand, "I", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,rm", SImode, 0, 0, 1, 1 }, { nonmemory_operand, "cI,I", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,rm", DImode, 0, 0, 1, 1 }, { nonmemory_operand, "cJ,J", QImode, 0, 0, 1, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { x86_64_nonmemory_operand, "rN", SImode, 0, 0, 1, 0 }, { register_operand, "r", DImode, 0, 0, 1, 0 }, { x86_64_nonmemory_operand, "rN", DImode, 0, 0, 1, 0 }, { register_operand, "=q", SImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", SImode, 0, 1, 0, 0 }, { nonimmediate_operand, "=qm", QImode, 0, 0, 1, 1 }, { ix86_comparison_operator, "", QImode, 0, 1, 0, 0 }, { nonimmediate_operand, "+qm", QImode, 1, 0, 1, 1 }, { ix86_comparison_operator, "", QImode, 0, 1, 0, 0 }, { register_operand, "=x,x", SFmode, 0, 0, 1, 0 }, { register_operand, "0,x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", SFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x", DFmode, 0, 0, 1, 0 }, { register_operand, "0,x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", DFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", DFmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { register_operand, "r", QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "r", DImode, 0, 0, 1, 0 }, { register_operand, "r", QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "r", DImode, 0, 0, 1, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "r", DImode, 0, 0, 1, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { const0_operand, "", SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { const0_operand, "", DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { const0_operand, "", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm", SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm", DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_fp_comparison_operator, "", CCFPUmode, 0, 1, 0, 0 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_fp_comparison_operator, "", CCFPUmode, 0, 1, 0, 0 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_fp_comparison_operator, "", CCFPUmode, 0, 1, 0, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", SFmode, 0, 1, 0, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", DFmode, 0, 1, 0, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", XFmode, 0, 1, 0, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", SFmode, 0, 1, 0, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { register_operand, "f", SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", DFmode, 0, 1, 0, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", XFmode, 0, 1, 0, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=a", HImode, 0, 0, 0, 0 }, { indirect_branch_operand, "rBw", SImode, 0, 0, 1, 1 }, { indirect_branch_operand, "rBw", DImode, 0, 0, 1, 1 }, { indirect_branch_operand, "rBw", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { indirect_branch_operand, "rBw", DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { call_insn_operand, "lBwBz", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { call_insn_operand, "rBwBz", DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { sibcall_insn_operand, "UBsBz", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { sibcall_insn_operand, "UBsBz", DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "m", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "m", DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { call_insn_operand, "lmBz", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "i", SImode, 0, 0, 1, 0 }, { sibcall_insn_operand, "UBsBz", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "i", SImode, 0, 0, 1, 0 }, { memory_operand, "m", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "i", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { sibcall_insn_operand, "UBsBz", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "i", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "m", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "i", SImode, 0, 0, 1, 0 }, { 0, "", BLKmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=r", DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&q", SImode, 0, 0, 0, 0 }, { register_operand, "=r", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", DImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "=r", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", HImode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { register_operand, "r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,m", SImode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,m", SImode, 0, 0, 1, 1 }, { register_operand, "r,r", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "r", QImode, 0, 0, 1, 0 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=r,r,m", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,m,r", SImode, 0, 0, 1, 1 }, { register_operand, "+Q,r", HImode, 1, 0, 1, 0 }, { scratch_operand, "=r", DImode, 0, 0, 0, 0 }, { scratch_operand, "=&r", SImode, 0, 0, 0, 0 }, { scratch_operand, "=Q", HImode, 0, 0, 0, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { scratch_operand, "=r", SImode, 0, 0, 0, 0 }, { scratch_operand, "=&Q", HImode, 0, 0, 0, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { scratch_operand, "=Q", HImode, 0, 0, 0, 0 }, { register_operand, "0", HImode, 0, 0, 1, 0 }, { register_operand, "=a", SImode, 0, 0, 1, 0 }, { register_operand, "b", SImode, 0, 0, 1, 0 }, { tls_symbolic_operand, "", VOIDmode, 0, 0, 1, 0 }, { constant_call_address_operand, "Bz", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=d", SImode, 0, 0, 0, 0 }, { scratch_operand, "=c", SImode, 0, 0, 0, 0 }, { register_operand, "=a", SImode, 0, 0, 1, 0 }, { register_operand, "b", SImode, 0, 0, 1, 0 }, { constant_call_address_operand, "Bz", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=d", SImode, 0, 0, 0, 0 }, { scratch_operand, "=c", SImode, 0, 0, 0, 0 }, { register_operand, "=a", SImode, 0, 0, 1, 0 }, { register_operand, "b", SImode, 0, 0, 1, 0 }, { constant_call_address_operand, "Bz", VOIDmode, 0, 0, 1, 0 }, { tls_symbolic_operand, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "=d", SImode, 0, 0, 0, 0 }, { scratch_operand, "=c", SImode, 0, 0, 0, 0 }, { register_operand, "=r", DImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "b", SImode, 0, 0, 1, 0 }, { tls_symbolic_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=a", SImode, 0, 0, 1, 0 }, { tls_symbolic_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "b", SImode, 0, 0, 1, 0 }, { register_operand, "=&a", SImode, 0, 0, 1, 0 }, { tls_symbolic_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "b", SImode, 0, 0, 1, 0 }, { tls_modbase_operand, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", SImode, 0, 0, 1, 0 }, { register_operand, "=f,x,x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,x", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm,xm,xm", SFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=f,x,x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,x", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm,xm,xm", DFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=x,v", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", SFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=x,v", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", DFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm", SFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm", DFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f,f,x,x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,fm,0,x", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm,0,xm,xm", SFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=f,f,x,x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,fm,0,x", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm,0,xm,xm", DFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", SFmode, 0, 0, 1, 0 }, { register_operand, "0,x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", SFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x", DFmode, 0, 0, 1, 0 }, { register_operand, "0,x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", DFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,fm", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm,0", SFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,fm", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "fm,0", DFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { binary_fp_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { binary_fp_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm,0", SFmode, 0, 0, 1, 1 }, { register_operand, "0,f", DFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", DFmode, 0, 0, 1, 0 }, { register_operand, "0,f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm,0", SFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", DFmode, 0, 0, 1, 0 }, { register_operand, "0,f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm,0", SFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "%0", XFmode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", XFmode, 0, 0, 1, 0 }, { register_operand, "0,f", XFmode, 0, 0, 1, 0 }, { register_operand, "f,0", XFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { register_operand, "0", XFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { register_operand, "0", XFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", HImode, 0, 0, 1, 1 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m", SImode, 0, 0, 1, 1 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm,0", SFmode, 0, 0, 1, 1 }, { register_operand, "0,f", XFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm,0", DFmode, 0, 0, 1, 1 }, { register_operand, "0,f", XFmode, 0, 0, 1, 0 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", XFmode, 0, 0, 1, 0 }, { register_operand, "0,f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm,0", SFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", XFmode, 0, 0, 1, 0 }, { register_operand, "0,f", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm,0", DFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", XFmode, 0, 0, 1, 0 }, { register_operand, "0,f", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm,0", SFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=f,f", XFmode, 0, 0, 1, 0 }, { register_operand, "0,f", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "fm,0", DFmode, 0, 0, 1, 1 }, { binary_fp_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "=x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", DFmode, 0, 0, 1, 1 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "=u", XFmode, 0, 0, 1, 0 }, { register_operand, "0", XFmode, 0, 0, 1, 0 }, { register_operand, "1", XFmode, 0, 0, 1, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "=u", XFmode, 0, 0, 1, 0 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "=u", XFmode, 0, 0, 1, 0 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "=u", XFmode, 0, 0, 1, 0 }, { register_operand, "0", XFmode, 0, 0, 1, 0 }, { const_double_operand, "F", XFmode, 0, 0, 1, 0 }, { register_operand, "=f", SFmode, 0, 0, 1, 0 }, { register_operand, "=u", XFmode, 0, 0, 1, 0 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { const_double_operand, "F", SFmode, 0, 0, 1, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { register_operand, "=u", XFmode, 0, 0, 1, 0 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { const_double_operand, "F", DFmode, 0, 0, 1, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", XFmode, 0, 0, 1, 0 }, { register_operand, "u", XFmode, 0, 0, 1, 0 }, { scratch_operand, "=2", XFmode, 0, 0, 0, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { register_operand, "u", SFmode, 0, 0, 1, 0 }, { scratch_operand, "=2", XFmode, 0, 0, 0, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { register_operand, "u", DFmode, 0, 0, 1, 0 }, { scratch_operand, "=2", XFmode, 0, 0, 0, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { register_operand, "u", XFmode, 0, 0, 1, 0 }, { scratch_operand, "=2", XFmode, 0, 0, 0, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", DFmode, 0, 0, 1, 0 }, { register_operand, "u", XFmode, 0, 0, 1, 0 }, { scratch_operand, "=2", XFmode, 0, 0, 0, 0 }, { register_operand, "=x", SFmode, 0, 0, 1, 0 }, { register_operand, "x", SFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", DFmode, 0, 0, 1, 0 }, { register_operand, "x", DFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "n", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { scratch_operand, "=&1f", XFmode, 0, 0, 0, 0 }, { nonimmediate_operand, "=m,?r", DImode, 0, 0, 1, 1 }, { register_operand, "f,f", XFmode, 0, 0, 1, 0 }, { memory_operand, "=X,m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&1f,&1f", XFmode, 0, 0, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "=m", HImode, 0, 0, 1, 1 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { memory_operand, "=m", SImode, 0, 0, 1, 1 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { register_operand, "=r", HImode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { memory_operand, "=m", HImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { memory_operand, "=m", SImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "=f", XFmode, 0, 0, 1, 0 }, { register_operand, "0", XFmode, 0, 0, 1, 0 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { scratch_operand, "=&1f", XFmode, 0, 0, 0, 0 }, { nonimmediate_operand, "=m,?r", DImode, 0, 0, 1, 1 }, { register_operand, "f,f", XFmode, 0, 0, 1, 0 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "=X,m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&1f,&1f", XFmode, 0, 0, 0, 0 }, { memory_operand, "=m", HImode, 0, 0, 1, 1 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { memory_operand, "=m", SImode, 0, 0, 1, 1 }, { register_operand, "f", XFmode, 0, 0, 1, 0 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { memory_operand, "m", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,?r", HImode, 0, 0, 1, 1 }, { register_operand, "f,f", XFmode, 0, 0, 1, 0 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "=X,m", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,?r", SImode, 0, 0, 1, 1 }, { register_operand, "f,f", XFmode, 0, 0, 1, 0 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "m,m", HImode, 0, 0, 1, 1 }, { memory_operand, "=X,m", SImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { memory_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "x", DFmode, 0, 0, 1, 0 }, { register_operand, "=D", SImode, 0, 0, 1, 0 }, { register_operand, "=S", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "1", SImode, 0, 0, 1, 0 }, { register_operand, "=D", DImode, 0, 0, 1, 0 }, { register_operand, "=S", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "1", DImode, 0, 0, 1, 0 }, { register_operand, "=D", SImode, 0, 0, 1, 0 }, { register_operand, "=S", SImode, 0, 0, 1, 0 }, { register_operand, "=c", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "1", SImode, 0, 0, 1, 0 }, { register_operand, "2", SImode, 0, 0, 1, 0 }, { register_operand, "=D", DImode, 0, 0, 1, 0 }, { register_operand, "=S", DImode, 0, 0, 1, 0 }, { register_operand, "=c", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "1", DImode, 0, 0, 1, 0 }, { register_operand, "2", DImode, 0, 0, 1, 0 }, { register_operand, "=D", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "a", SImode, 0, 0, 1, 0 }, { register_operand, "=D", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "a", SImode, 0, 0, 1, 0 }, { register_operand, "=D", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "a", HImode, 0, 0, 1, 0 }, { register_operand, "=D", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "a", HImode, 0, 0, 1, 0 }, { register_operand, "=D", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "a", QImode, 0, 0, 1, 0 }, { register_operand, "=D", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "a", QImode, 0, 0, 1, 0 }, { register_operand, "=D", SImode, 0, 0, 1, 0 }, { register_operand, "=c", SImode, 0, 0, 1, 0 }, { register_operand, "a", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "1", SImode, 0, 0, 1, 0 }, { register_operand, "=D", DImode, 0, 0, 1, 0 }, { register_operand, "=c", DImode, 0, 0, 1, 0 }, { register_operand, "a", SImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "1", DImode, 0, 0, 1, 0 }, { register_operand, "=D", SImode, 0, 0, 1, 0 }, { register_operand, "=c", SImode, 0, 0, 1, 0 }, { register_operand, "a", QImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "1", SImode, 0, 0, 1, 0 }, { register_operand, "=D", DImode, 0, 0, 1, 0 }, { register_operand, "=c", DImode, 0, 0, 1, 0 }, { register_operand, "a", QImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "1", DImode, 0, 0, 1, 0 }, { register_operand, "=S", SImode, 0, 0, 1, 0 }, { register_operand, "=D", SImode, 0, 0, 1, 0 }, { register_operand, "=c", SImode, 0, 0, 1, 0 }, { immediate_operand, "i", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "1", SImode, 0, 0, 1, 0 }, { register_operand, "2", SImode, 0, 0, 1, 0 }, { register_operand, "=S", DImode, 0, 0, 1, 0 }, { register_operand, "=D", DImode, 0, 0, 1, 0 }, { register_operand, "=c", DImode, 0, 0, 1, 0 }, { immediate_operand, "i", SImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "1", DImode, 0, 0, 1, 0 }, { register_operand, "2", DImode, 0, 0, 1, 0 }, { register_operand, "=&c", SImode, 0, 0, 1, 0 }, { register_operand, "=D", SImode, 0, 0, 1, 0 }, { register_operand, "a", QImode, 0, 0, 1, 0 }, { immediate_operand, "i", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "1", SImode, 0, 0, 1, 0 }, { register_operand, "=&c", DImode, 0, 0, 1, 0 }, { register_operand, "=D", DImode, 0, 0, 1, 0 }, { register_operand, "a", QImode, 0, 0, 1, 0 }, { immediate_operand, "i", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "1", DImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { ix86_carry_flag_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "=r,r", HImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "rm,0", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,rm", HImode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "rm,0", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,rm", SImode, 0, 0, 1, 1 }, { register_operand, "=r,r", QImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "r,0", QImode, 0, 0, 1, 0 }, { register_operand, "0,r", QImode, 0, 0, 1, 0 }, { register_operand, "=f,f", XFmode, 0, 0, 1, 0 }, { fcmov_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "f,0", XFmode, 0, 0, 1, 0 }, { register_operand, "0,f", XFmode, 0, 0, 1, 0 }, { register_operand, "=f,f,&r,&r,r,r", DFmode, 0, 0, 1, 0 }, { fcmov_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "f,0,rm,0,rm,0", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,f,0,rm,0,rm", DFmode, 0, 0, 1, 1 }, { register_operand, "=f,f,r,r", SFmode, 0, 0, 1, 0 }, { fcmov_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "f,0,rm,0", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,f,0,rm", SFmode, 0, 0, 1, 1 }, { register_operand, "=x", SFmode, 0, 0, 1, 0 }, { register_operand, "x", SFmode, 0, 0, 1, 0 }, { register_operand, "x", SFmode, 0, 0, 1, 0 }, { register_operand, "x", SFmode, 0, 0, 1, 0 }, { register_operand, "=x", DFmode, 0, 0, 1, 0 }, { register_operand, "x", DFmode, 0, 0, 1, 0 }, { register_operand, "x", DFmode, 0, 0, 1, 0 }, { register_operand, "x", DFmode, 0, 0, 1, 0 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { register_operand, "0,r", SImode, 0, 0, 1, 0 }, { x86_64_nonmemory_operand, "re,le", SImode, 0, 0, 1, 0 }, { register_operand, "=r,r", DImode, 0, 0, 1, 0 }, { register_operand, "0,r", DImode, 0, 0, 1, 0 }, { x86_64_nonmemory_operand, "re,le", DImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { register_operand, "=r", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "r", DImode, 0, 0, 1, 0 }, { register_operand, "=a", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "=a", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "=r", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { const_int_operand, "n", DImode, 0, 0, 1, 0 }, { address_operand, "p", VOIDmode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { address_operand, "p", VOIDmode, 0, 0, 1, 1 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { memory_operand, "=m", SImode, 0, 0, 1, 1 }, { memory_operand, "m", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&r", SImode, 0, 0, 0, 0 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { memory_operand, "m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&r", DImode, 0, 0, 0, 0 }, { memory_operand, "=m", SImode, 0, 0, 1, 1 }, { const_int_operand, "i", SImode, 0, 0, 1, 0 }, { scratch_operand, "=&r", SImode, 0, 0, 0, 0 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { const_int_operand, "i", DImode, 0, 0, 1, 0 }, { scratch_operand, "=&r", DImode, 0, 0, 0, 0 }, { flags_reg_operand, "", CCZmode, 0, 0, 1, 0 }, { memory_operand, "m", SImode, 0, 0, 1, 1 }, { memory_operand, "m", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&r", SImode, 0, 0, 0, 0 }, { flags_reg_operand, "", CCZmode, 0, 0, 1, 0 }, { memory_operand, "m", DImode, 0, 0, 1, 1 }, { memory_operand, "m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&r", DImode, 0, 0, 0, 0 }, { flags_reg_operand, "", CCZmode, 0, 0, 1, 0 }, { memory_operand, "m", SImode, 0, 0, 1, 1 }, { const_int_operand, "i", SImode, 0, 0, 1, 0 }, { scratch_operand, "=r", SImode, 0, 0, 0, 0 }, { flags_reg_operand, "", CCZmode, 0, 0, 1, 0 }, { memory_operand, "m", DImode, 0, 0, 1, 1 }, { const_int_operand, "i", DImode, 0, 0, 1, 0 }, { scratch_operand, "=r", DImode, 0, 0, 0, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "qm", QImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", HImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "=A", DImode, 0, 0, 1, 0 }, { register_operand, "c", SImode, 0, 0, 1, 0 }, { register_operand, "=A", DImode, 0, 0, 1, 0 }, { register_operand, "=c", SImode, 0, 0, 1, 0 }, { memory_operand, "=m", BLKmode, 0, 0, 1, 1 }, { memory_operand, "m", BLKmode, 0, 0, 1, 1 }, { memory_operand, "=m", BLKmode, 0, 0, 1, 1 }, { register_operand, "A", DImode, 0, 0, 1, 0 }, { memory_operand, "m", BLKmode, 0, 0, 1, 1 }, { register_operand, "A", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=a,m", HImode, 0, 0, 1, 1 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { const_int_operand, "i", SImode, 0, 0, 1, 0 }, { register_operand, "+a", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=w", BND32mode, 0, 0, 1, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { address_mpx_no_base_operand, "Tb", SImode, 0, 0, 1, 1 }, { bnd_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=w", BND64mode, 0, 0, 1, 0 }, { register_operand, "r", DImode, 0, 0, 1, 0 }, { address_mpx_no_base_operand, "Tb", DImode, 0, 0, 1, 1 }, { bnd_mem_operator, "", DImode, 0, 1, 0, 1 }, { nonimmediate_operand, "=w,m", BND32mode, 0, 0, 1, 1 }, { general_operand, "wm,w", BND32mode, 0, 0, 1, 1 }, { nonimmediate_operand, "=w,m", BND64mode, 0, 0, 1, 1 }, { general_operand, "wm,w", BND64mode, 0, 0, 1, 1 }, { register_operand, "w", BND32mode, 0, 0, 1, 0 }, { address_no_seg_operand, "Ts", SImode, 0, 0, 1, 1 }, { bnd_mem_operator, "", BLKmode, 0, 0, 1, 1 }, { register_operand, "w", BND64mode, 0, 0, 1, 0 }, { address_no_seg_operand, "Ts", DImode, 0, 0, 1, 1 }, { bnd_mem_operator, "", BLKmode, 0, 0, 1, 1 }, { register_operand, "=w", BND32mode, 0, 0, 1, 0 }, { address_mpx_no_index_operand, "Ti", SImode, 0, 0, 1, 1 }, { register_operand, "l", SImode, 0, 0, 1, 0 }, { bnd_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=w", BND64mode, 0, 0, 1, 0 }, { address_mpx_no_index_operand, "Ti", DImode, 0, 0, 1, 1 }, { register_operand, "l", DImode, 0, 0, 1, 0 }, { bnd_mem_operator, "", DImode, 0, 1, 0, 1 }, { address_mpx_no_index_operand, "Ti", SImode, 0, 0, 1, 1 }, { register_operand, "l", SImode, 0, 0, 1, 0 }, { register_operand, "w", BND32mode, 0, 0, 1, 0 }, { bnd_mem_operator, "", SImode, 0, 1, 0, 1 }, { bnd_mem_operator, "", BLKmode, 0, 0, 1, 1 }, { address_mpx_no_index_operand, "Ti", DImode, 0, 0, 1, 1 }, { register_operand, "l", DImode, 0, 0, 1, 0 }, { register_operand, "w", BND64mode, 0, 0, 1, 0 }, { bnd_mem_operator, "", DImode, 0, 1, 0, 1 }, { bnd_mem_operator, "", BLKmode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { symbol_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=r,o,r,r,m,?!y,!y,?!y,m,r,?!Ym,v,v,v,m,*x,*x,*x,m,r,Yi,!Ym,*Yi", V8QImode, 0, 0, 1, 1 }, { vector_move_operand, "rCo,rC,C,rm,rC,C,!y,m,?!y,?!Yn,r,C,v,m,v,C,*x,m,*x,Yj,r,*Yj,!Yn", V8QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,o,r,r,m,?!y,!y,?!y,m,r,?!Ym,v,v,v,m,*x,*x,*x,m,r,Yi,!Ym,*Yi", V4HImode, 0, 0, 1, 1 }, { vector_move_operand, "rCo,rC,C,rm,rC,C,!y,m,?!y,?!Yn,r,C,v,m,v,C,*x,m,*x,Yj,r,*Yj,!Yn", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,o,r,r,m,?!y,!y,?!y,m,r,?!Ym,v,v,v,m,*x,*x,*x,m,r,Yi,!Ym,*Yi", V2SImode, 0, 0, 1, 1 }, { vector_move_operand, "rCo,rC,C,rm,rC,C,!y,m,?!y,?!Yn,r,C,v,m,v,C,*x,m,*x,Yj,r,*Yj,!Yn", V2SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,o,r,r,m,?!y,!y,?!y,m,r,?!Ym,v,v,v,m,*x,*x,*x,m,r,Yi,!Ym,*Yi", V1DImode, 0, 0, 1, 1 }, { vector_move_operand, "rCo,rC,C,rm,rC,C,!y,m,?!y,?!Yn,r,C,v,m,v,C,*x,m,*x,Yj,r,*Yj,!Yn", V1DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,o,r,r,m,?!y,!y,?!y,m,r,?!Ym,v,v,v,m,*x,*x,*x,m,r,Yi,!Ym,*Yi", V2SFmode, 0, 0, 1, 1 }, { vector_move_operand, "rCo,rC,C,rm,rC,C,!y,m,?!y,?!Yn,r,C,v,m,v,C,*x,m,*x,Yj,r,*Yj,!Yn", V2SFmode, 0, 0, 1, 1 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { register_operand, "y", DImode, 0, 0, 1, 0 }, { register_operand, "=y", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V2SFmode, 0, 0, 1, 1 }, { register_operand, "=y,y", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,ym", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym,0", V2SFmode, 0, 0, 1, 1 }, { register_operand, "=y", V2SFmode, 0, 0, 1, 0 }, { register_operand, "0", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V2SFmode, 0, 0, 1, 1 }, { register_operand, "=y", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V2SFmode, 0, 0, 1, 1 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V2SFmode, 0, 0, 1, 1 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { register_operand, "0", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V2SFmode, 0, 0, 1, 1 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V2SFmode, 0, 0, 1, 1 }, { register_operand, "=y", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V2SImode, 0, 0, 1, 1 }, { register_operand, "=y", V2SFmode, 0, 0, 1, 0 }, { register_operand, "0", SFmode, 0, 0, 1, 0 }, { register_operand, "=y,y", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,rm", SFmode, 0, 0, 1, 1 }, { vector_move_operand, "ym,C", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m,y,m,f,r", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x,ym,y,m,m", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=y,x,x,y,x,f,r", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,x,x,o,o,o,o", V2SFmode, 0, 0, 1, 1 }, { register_operand, "=y", V8QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", V8QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V8QImode, 0, 0, 1, 1 }, { register_operand, "=y", V8QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0", V8QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V8QImode, 0, 0, 1, 1 }, { register_operand, "=y", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V4HImode, 0, 0, 1, 1 }, { register_operand, "=y", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V4HImode, 0, 0, 1, 1 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", V2SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V2SImode, 0, 0, 1, 1 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0", V2SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V2SImode, 0, 0, 1, 1 }, { register_operand, "=y", V1DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", V1DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V1DImode, 0, 0, 1, 1 }, { register_operand, "=y", V1DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0", V1DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V1DImode, 0, 0, 1, 1 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V4HImode, 0, 0, 1, 1 }, { register_operand, "=y", V1DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", V2SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V2SImode, 0, 0, 1, 1 }, { register_operand, "=y", V4HImode, 0, 0, 1, 0 }, { register_operand, "0", V4HImode, 0, 0, 1, 0 }, { nonmemory_operand, "yN", SImode, 0, 0, 1, 0 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { register_operand, "0", V2SImode, 0, 0, 1, 0 }, { nonmemory_operand, "yN", SImode, 0, 0, 1, 0 }, { register_operand, "=y", V1DImode, 0, 0, 1, 0 }, { register_operand, "0", V1DImode, 0, 0, 1, 0 }, { nonmemory_operand, "yN", SImode, 0, 0, 1, 0 }, { register_operand, "=y", V8QImode, 0, 0, 1, 0 }, { register_operand, "0", V8QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V8QImode, 0, 0, 1, 1 }, { register_operand, "=y", V4HImode, 0, 0, 1, 0 }, { register_operand, "0", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V4HImode, 0, 0, 1, 1 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { register_operand, "0", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V2SImode, 0, 0, 1, 1 }, { register_operand, "=y", V8QImode, 0, 0, 1, 0 }, { register_operand, "0", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V4HImode, 0, 0, 1, 1 }, { register_operand, "=y", V4HImode, 0, 0, 1, 0 }, { register_operand, "0", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V2SImode, 0, 0, 1, 1 }, { register_operand, "=y", V4HImode, 0, 0, 1, 0 }, { register_operand, "0", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", HImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "y", V4HImode, 0, 0, 1, 0 }, { const_0_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=y", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V4HImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V2SImode, 0, 0, 1, 1 }, { register_operand, "=y", V4HImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "=y,y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,rm", SImode, 0, 0, 1, 1 }, { vector_move_operand, "ym,C", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m,y,m,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x,ym,y,m", V2SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=y,x,x,y,x,r", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,x,x,o,o,o", V2SImode, 0, 0, 1, 1 }, { register_operand, "=y", V1DImode, 0, 0, 1, 0 }, { register_operand, "0", V8QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V8QImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "y", V8QImode, 0, 0, 1, 0 }, { register_operand, "D", SImode, 0, 0, 1, 0 }, { register_operand, "y", V8QImode, 0, 0, 1, 0 }, { register_operand, "y", V8QImode, 0, 0, 1, 0 }, { register_operand, "D", DImode, 0, 0, 1, 0 }, { register_operand, "y", V8QImode, 0, 0, 1, 0 }, { register_operand, "y", V8QImode, 0, 0, 1, 0 }, { emms_operation, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "=v,v,m", V64QImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V32QImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V16QImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V32HImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V16HImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V8HImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V16SImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V8SImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V4SImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V8DImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V4DImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V2DImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V4TImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V4TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V2TImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V2TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V1TImode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V1TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,v,m", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_or_sse_const_operand, "C,vm,v", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { register_operand, "v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16SImode, 0, 0, 1, 1 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8SImode, 0, 0, 1, 1 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SImode, 0, 0, 1, 1 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8DImode, 0, 0, 1, 1 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4DImode, 0, 0, 1, 1 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V2DImode, 0, 0, 1, 1 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16SFmode, 0, 0, 1, 1 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8SFmode, 0, 0, 1, 1 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SFmode, 0, 0, 1, 1 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8DFmode, 0, 0, 1, 1 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4DFmode, 0, 0, 1, 1 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V2DFmode, 0, 0, 1, 1 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V64QImode, 0, 0, 1, 1 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { memory_operand, "=m", V32QImode, 0, 0, 1, 1 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { memory_operand, "=m", V32HImode, 0, 0, 1, 1 }, { register_operand, "v", V32HImode, 0, 0, 1, 0 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16HImode, 0, 0, 1, 1 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DImode, 0, 0, 1, 1 }, { register_operand, "=?x,x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&x,X", V4SImode, 0, 0, 0, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V32QImode, 0, 0, 1, 0 }, { memory_operand, "m", V32QImode, 0, 0, 1, 1 }, { register_operand, "=x", V16QImode, 0, 0, 1, 0 }, { memory_operand, "m", V16QImode, 0, 0, 1, 1 }, { memory_operand, "=m", SImode, 0, 0, 1, 1 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x,v,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,xm,v,m", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,0,vm,v", V16SFmode, 0, 0, 1, 1 }, { absneg_operator, "", V16SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x,v,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,xm,v,m", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,0,vm,v", V8SFmode, 0, 0, 1, 1 }, { absneg_operator, "", V8SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x,v,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,xm,v,m", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,0,vm,v", V4SFmode, 0, 0, 1, 1 }, { absneg_operator, "", V4SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x,v,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,xm,v,m", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,0,vm,v", V8DFmode, 0, 0, 1, 1 }, { absneg_operator, "", V8DFmode, 0, 1, 0, 0 }, { register_operand, "=x,x,v,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,xm,v,m", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,0,vm,v", V4DFmode, 0, 0, 1, 1 }, { absneg_operator, "", V4DFmode, 0, 1, 0, 0 }, { register_operand, "=x,x,v,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,xm,v,m", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,0,vm,v", V2DFmode, 0, 0, 1, 1 }, { absneg_operator, "", V2DFmode, 0, 1, 0, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V16SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V16SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V2DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V2DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V2DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V2DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,v", V4SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,v", V2DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "0,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "0,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,v", V4SFmode, 0, 0, 1, 1 }, { register_operand, "0,v", V4SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "0,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,v", V2DFmode, 0, 0, 1, 1 }, { register_operand, "0,v", V2DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V16SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V4DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V2DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "%0,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V2DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V16SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "xm,v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,v", V4SFmode, 0, 0, 1, 1 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,v", V2DFmode, 0, 0, 1, 1 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", DFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V2DFmode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "%0,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V8SFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", V8SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "%0,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V4SFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", V4SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "%0,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V4DFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", V4DFmode, 0, 1, 0, 0 }, { register_operand, "=x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "%0,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V2DFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", V2DFmode, 0, 1, 0, 0 }, { register_operand, "=x,x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V8SFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", V8SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V4SFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", V4SFmode, 0, 1, 0, 0 }, { register_operand, "=x,x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V4DFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", V4DFmode, 0, 1, 0, 0 }, { register_operand, "=x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V2DFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", V2DFmode, 0, 1, 0, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", DImode, 0, 0, 1, 0 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", SImode, 0, 0, 1, 0 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", SImode, 0, 0, 1, 0 }, { register_operand, "v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", HImode, 0, 1, 0, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", QImode, 0, 1, 0, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", QImode, 0, 1, 0, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", QImode, 0, 1, 0, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", QImode, 0, 1, 0, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { sse_comparison_operator, "", QImode, 0, 1, 0, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,x", SFmode, 0, 0, 1, 0 }, { register_operand, "0,x", SFmode, 0, 0, 1, 0 }, { register_operand, "x,x", SFmode, 0, 0, 1, 0 }, { register_operand, "=x,x", DFmode, 0, 0, 1, 0 }, { register_operand, "0,x", DFmode, 0, 0, 1, 0 }, { register_operand, "x,x", DFmode, 0, 0, 1, 0 }, { register_operand, "=x,x", TFmode, 0, 0, 1, 0 }, { register_operand, "0,x", TFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", TFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", SFmode, 0, 0, 1, 0 }, { register_operand, "%0,x", SFmode, 0, 0, 1, 0 }, { register_operand, "x,x", SFmode, 0, 0, 1, 0 }, { register_operand, "=x,x", DFmode, 0, 0, 1, 0 }, { register_operand, "%0,x", DFmode, 0, 0, 1, 0 }, { register_operand, "x,x", DFmode, 0, 0, 1, 0 }, { register_operand, "=x,x", TFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,x", TFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,xm", TFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v,x,x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", SFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v,x,x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v,x,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v,x,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v,x,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v,x,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V4DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0", SFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0", V16SFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "%0,0,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v,v,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v,v,0", V16SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0", V16SFmode, 0, 0, 1, 1 }, { const0_operand, "C,C,C", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "%0,0,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v,v,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v,v,0", V16SFmode, 0, 0, 1, 0 }, { const0_operand, "C,C,C", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0", V8SFmode, 0, 0, 1, 1 }, { const0_operand, "C,C,C", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0", V4SFmode, 0, 0, 1, 1 }, { const0_operand, "C,C,C", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0", DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0", V8DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "%0,0,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v,v,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v,v,0", V8DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0", V8DFmode, 0, 0, 1, 1 }, { const0_operand, "C,C,C", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "%0,0,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v,v,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v,v,0", V8DFmode, 0, 0, 1, 0 }, { const0_operand, "C,C,C", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0", V4DFmode, 0, 0, 1, 1 }, { const0_operand, "C,C,C", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0", V2DFmode, 0, 0, 1, 1 }, { const0_operand, "C,C,C", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,v", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,v", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,v", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,v", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,v", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,v", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,v", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,v", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V16SFmode, 0, 0, 1, 0 }, { register_operand, "x", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x", V16SFmode, 0, 0, 1, 0 }, { register_operand, "x", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SFmode, 0, 0, 1, 1 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V8DFmode, 0, 0, 1, 0 }, { register_operand, "x", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V8DFmode, 0, 0, 1, 0 }, { register_operand, "x", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DFmode, 0, 0, 1, 1 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DFmode, 0, 0, 1, 1 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,v", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,v", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,v", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,v", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,v", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,v", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,v", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,v", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v,x,x", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v,x,x", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v,x,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V4SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v,x,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V4SFmode, 0, 0, 1, 1 }, { const0_operand, "C,C,C,C,C", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v,x,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V2DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v,x,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V2DFmode, 0, 0, 1, 1 }, { const0_operand, "C,C,C,C,C", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v,x,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V8SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v,x,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V8SFmode, 0, 0, 1, 1 }, { const0_operand, "C,C,C,C,C", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v,x,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V4DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v,v,x,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v,x,x", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v,vm,x,m", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm,0,xm,x", V4DFmode, 0, 0, 1, 1 }, { const0_operand, "C,C,C,C,C", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk,Yk,Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SFmode, 0, 0, 1, 1 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DFmode, 0, 0, 1, 1 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DFmode, 0, 0, 1, 1 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,0", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v,v", V4SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,0", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v,v", V2DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x,x", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V4SFmode, 0, 0, 1, 1 }, { const0_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "=x,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x,x", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V2DFmode, 0, 0, 1, 1 }, { const0_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "=x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V2SImode, 0, 0, 1, 1 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,m,rm", SImode, 0, 0, 1, 1 }, { register_operand, "=x,x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "r,m,r", SImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { register_operand, "v,v", V4SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", SFmode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { register_operand, "v,v", V4SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SImode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SImode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SImode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "y,m", V2SImode, 0, 0, 1, 1 }, { register_operand, "=y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,m,rm", SImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { register_operand, "v,v", V2DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", DFmode, 0, 0, 1, 1 }, { register_operand, "=r,r", SImode, 0, 0, 1, 0 }, { register_operand, "v,v", V2DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DImode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4DFmode, 0, 0, 1, 1 }, { const0_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m,vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m,v", V2DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,0,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m,vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,0,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "x,m,v", V4SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const0_operand, "", V2SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { constm1_operand, "", V64QImode, 0, 0, 1, 0 }, { const0_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { constm1_operand, "", V16QImode, 0, 0, 1, 0 }, { const0_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { constm1_operand, "", V32QImode, 0, 0, 1, 0 }, { const0_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { constm1_operand, "", V32HImode, 0, 0, 1, 0 }, { const0_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { constm1_operand, "", V16HImode, 0, 0, 1, 0 }, { const0_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { constm1_operand, "", V8HImode, 0, 0, 1, 0 }, { const0_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { constm1_operand, "", V16SImode, 0, 0, 1, 0 }, { const0_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { constm1_operand, "", V8SImode, 0, 0, 1, 0 }, { const0_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { constm1_operand, "", V4SImode, 0, 0, 1, 0 }, { const0_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { constm1_operand, "", V8DImode, 0, 0, 1, 0 }, { const0_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { constm1_operand, "", V4DImode, 0, 0, 1, 0 }, { const0_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { constm1_operand, "", V2DImode, 0, 0, 1, 0 }, { const0_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=x,x,x,x,m", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,x,0,x,0", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,o,o,x", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,x,x,x,o", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,x,0,x,0", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,m,m,x", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V4SImode, 0, 0, 1, 0 }, { register_operand, "0,x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V4SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "=m,x,x", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,o", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,x,x,x,o", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,x,0,x,0", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "m,m,x,x,x", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,x,x", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,m", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,x,x,x,m", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,0,x,0", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,x,m,m,x", V2SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "=x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x,Yr,*x,x,x,*y,*y", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,0,x,0,0,x,m,0,m", SFmode, 0, 0, 1, 1 }, { vector_move_operand, "Yr,*x,x,m,m,m,C,*ym,C", SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,*y,*y", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,m,0,m", SFmode, 0, 0, 1, 1 }, { reg_or_0_operand, "x,C,*y,C", SFmode, 0, 0, 1, 0 }, { register_operand, "=x,x,x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,x,0,x", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,x,m,m", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=Yr,*v,v,Yi,x,x,v,Yr,*x,x,m,m,m", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "C,C,C,C,C,0,v,0,0,x,0,0,0", V4SImode, 0, 0, 1, 1 }, { general_operand, "Yr,*v,m,r,m,x,v,*rm,*rm,*rm,!x,!*re,!*fF", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=Yr,*v,v,Yi,x,x,v,Yr,*x,x,m,m,m", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "C,C,C,C,C,0,v,0,0,x,0,0,0", V4SFmode, 0, 0, 1, 1 }, { general_operand, "Yr,*v,m,r,m,x,v,*rm,*rm,*rm,!x,!*re,!*fF", SFmode, 0, 0, 1, 1 }, { register_operand, "=Yr,*x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", SFmode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n,n", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=x,m,f,r", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x,m,m", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,rm,x,x", SFmode, 0, 0, 1, 1 }, { register_operand, "Yr,*x,0,x", V4SFmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "n,n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=x,*r,f", SFmode, 0, 0, 1, 0 }, { memory_operand, "o,o,o", V4SFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "n,n,n", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "=m", V2DFmode, 0, 0, 1, 1 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "0", V2DFmode, 0, 0, 1, 1 }, { register_operand, "k", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V2DImode, 0, 0, 1, 1 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "0", V2DImode, 0, 0, 1, 1 }, { register_operand, "k", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SFmode, 0, 0, 1, 1 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "0", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SImode, 0, 0, 1, 1 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "0", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V2DImode, 0, 0, 1, 1 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V4SImode, 0, 0, 1, 1 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4DFmode, 0, 0, 1, 1 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { memory_operand, "0", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4DImode, 0, 0, 1, 1 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { memory_operand, "0", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm,v", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,m", V8DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm,v", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,m", V8DImode, 0, 0, 1, 1 }, { register_operand, "=v,v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V4DImode, 0, 0, 1, 1 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8SFmode, 0, 0, 1, 1 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { memory_operand, "0", V8SFmode, 0, 0, 1, 1 }, { register_operand, "k", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8SImode, 0, 0, 1, 1 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { memory_operand, "0", V8SImode, 0, 0, 1, 1 }, { register_operand, "k", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm,vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "v,v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "=v,vm", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v,v", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm,vm", V8SImode, 0, 0, 1, 1 }, { register_operand, "v,v", V16SImode, 0, 0, 1, 0 }, { register_operand, "=v,vm", V8SImode, 0, 0, 1, 0 }, { register_operand, "v,v", V16SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v", V4DImode, 0, 0, 1, 1 }, { register_operand, "=v,m", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,v", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v", V4DFmode, 0, 0, 1, 1 }, { register_operand, "=v,m", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,v", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,vm", V2DImode, 0, 0, 1, 1 }, { register_operand, "v,v", V4DImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v,v", V4DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "v,v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "=v,v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v,v", V4DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "v", V8SImode, 0, 0, 1, 1 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SImode, 0, 0, 1, 1 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { memory_operand, "0", V4SImode, 0, 0, 1, 1 }, { register_operand, "k", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SFmode, 0, 0, 1, 1 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { memory_operand, "0", V4SFmode, 0, 0, 1, 1 }, { register_operand, "k", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SImode, 0, 0, 1, 1 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { memory_operand, "0", V4SImode, 0, 0, 1, 1 }, { register_operand, "k", V4SImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SFmode, 0, 0, 1, 1 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { memory_operand, "0", V4SFmode, 0, 0, 1, 1 }, { register_operand, "k", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V4SImode, 0, 0, 1, 1 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,m", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,v", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V8HImode, 0, 0, 1, 1 }, { register_operand, "x,x", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,v", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,m", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "v,v", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V16QImode, 0, 0, 1, 1 }, { register_operand, "x,x", V32QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=x,x,x,x,x,m", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,x,o,o,o,x", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,1,0,x,0", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,v", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "1,vm", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm,1", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=x,x,x,x,x,o", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,x,m,0,x,0", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,1,m,m,x", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DFmode, 0, 0, 1, 1 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V16SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V8SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V4SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V8DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V4DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V2DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const0_operand, "C", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_19_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_19_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_20_to_23_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_20_to_23_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_24_to_27_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_24_to_27_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_28_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_28_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_9_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_2_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_10_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_5_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_13_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_6_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_14_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_5_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_2_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_6_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_2_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0,v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V2DImode, 0, 0, 1, 0 }, { register_operand, "0,x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V2DImode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_2_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_2_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "=m,x,x,x,*f,r", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,0,x,o,o,o", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,x,x", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,o", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,x,x,*f,r", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,m,m,m", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=m,x,x", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,m", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,x,x,x,o,o,o", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,x,0,x,0,0,0", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "m,m,x,x,x,*f,r", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,x,x,x,x,x,x,x,m,m,m", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "C,0,x,0,x,x,o,o,0,0,0", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "m,m,m,x,x,0,0,x,x,*f,r", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,x,x,x,m,x,x,x,o", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "0,x,0,x,0,x,o,o,x", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,m,m,x,0,0,x,0", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,vm", DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v,v,x,x,v,x,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v,m,0,x,m,0,0", DFmode, 0, 0, 1, 1 }, { vector_move_operand, "x,v,1,m,m,C,x,m", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=v,m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V16HImode, 0, 0, 1, 1 }, { register_operand, "v,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V8SImode, 0, 0, 1, 1 }, { register_operand, "v,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v,v", V16SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V16HImode, 0, 0, 1, 1 }, { register_operand, "v,v", V16SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V8SImode, 0, 0, 1, 1 }, { register_operand, "v,v", V8DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v,v", V8DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V32QImode, 0, 0, 1, 1 }, { register_operand, "v,v", V32HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V4SImode, 0, 0, 1, 1 }, { register_operand, "v,v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V4SImode, 0, 0, 1, 1 }, { register_operand, "v,v", V4DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v,v", V8SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=v,m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v,v", V16HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { const0_operand, "", V12QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { const0_operand, "", V14QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { const0_operand, "", V8QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const0_operand, "", V12QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { const0_operand, "", V8QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { const0_operand, "", V4HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { const0_operand, "", V6HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const0_operand, "", V4HImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8HImode, 0, 0, 1, 1 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { const0_operand, "", V2SImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SImode, 0, 0, 1, 1 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SImode, 0, 0, 1, 1 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,v", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%v", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V16HImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,x", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C,0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C,0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V16HImode, 0, 0, 1, 0 }, { register_operand, "0,x", V16HImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,xN", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V8HImode, 0, 0, 1, 0 }, { register_operand, "0,x", V8HImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,xN", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V8SImode, 0, 0, 1, 0 }, { register_operand, "0,x", V8SImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,xN", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V4SImode, 0, 0, 1, 0 }, { register_operand, "0,x", V4SImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,xN", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,vm", V16HImode, 0, 0, 1, 1 }, { nonmemory_operand, "v,N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,vm", V8HImode, 0, 0, 1, 1 }, { nonmemory_operand, "v,N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,vm", V8SImode, 0, 0, 1, 1 }, { nonmemory_operand, "v,N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,vm", V4SImode, 0, 0, 1, 1 }, { nonmemory_operand, "v,N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,vm", V2DImode, 0, 0, 1, 1 }, { nonmemory_operand, "v,N", DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,vm", V32HImode, 0, 0, 1, 1 }, { nonmemory_operand, "v,N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,vm", V4DImode, 0, 0, 1, 1 }, { nonmemory_operand, "v,N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,vm", V16SImode, 0, 0, 1, 1 }, { nonmemory_operand, "v,N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,vm", V8DImode, 0, 0, 1, 1 }, { nonmemory_operand, "v,N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32HImode, 0, 0, 1, 0 }, { register_operand, "0,v", V32HImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,vN", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16HImode, 0, 0, 1, 0 }, { register_operand, "0,v", V16HImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,vN", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8HImode, 0, 0, 1, 0 }, { register_operand, "0,v", V8HImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,vN", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0,v", V8SImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,vN", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0,v", V4SImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,vN", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0,v", V4DImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,vN", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0,v", V2DImode, 0, 0, 1, 0 }, { nonmemory_operand, "xN,vN", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V16SImode, 0, 0, 1, 1 }, { nonmemory_operand, "vN,N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V8DImode, 0, 0, 1, 1 }, { nonmemory_operand, "vN,N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4TImode, 0, 0, 1, 0 }, { register_operand, "0,v", V4TImode, 0, 0, 1, 0 }, { const_0_to_255_mul_8_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2TImode, 0, 0, 1, 0 }, { register_operand, "0,v", V2TImode, 0, 0, 1, 0 }, { const_0_to_255_mul_8_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V1TImode, 0, 0, 1, 0 }, { register_operand, "0,v", V1TImode, 0, 0, 1, 0 }, { const_0_to_255_mul_8_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { register_operand, "v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C,0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,x", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=Yr,*x,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,v", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,x", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V32QImode, 0, 0, 1, 1 }, { register_operand, "=x", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V16HImode, 0, 0, 1, 1 }, { register_operand, "=x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V8SImode, 0, 0, 1, 1 }, { register_operand, "=x", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V4DImode, 0, 0, 1, 1 }, { register_operand, "=Yk", DImode, 0, 0, 1, 0 }, { register_operand, "%v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "%v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", SImode, 0, 0, 1, 0 }, { register_operand, "%v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", SImode, 0, 0, 1, 0 }, { register_operand, "%v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "%v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "%v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "%v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "%v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "%v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "%v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "%v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "%v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,x", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,xm", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,x", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,xm", V4SImode, 0, 0, 1, 1 }, { register_operand, "=Yr,*x,x", V2DImode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x", V32QImode, 0, 0, 1, 0 }, { register_operand, "x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V32QImode, 0, 0, 1, 1 }, { register_operand, "=x", V16HImode, 0, 0, 1, 0 }, { register_operand, "x", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16HImode, 0, 0, 1, 1 }, { register_operand, "=x", V8SImode, 0, 0, 1, 0 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8SImode, 0, 0, 1, 1 }, { register_operand, "=x", V4DImode, 0, 0, 1, 0 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4DImode, 0, 0, 1, 1 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", DImode, 0, 0, 1, 0 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", SImode, 0, 0, 1, 0 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", SImode, 0, 0, 1, 0 }, { register_operand, "v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "0,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8HImode, 0, 0, 1, 0 }, { register_operand, "0,x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x,v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V64QImode, 0, 0, 1, 0 }, { register_operand, "0,v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32QImode, 0, 0, 1, 0 }, { register_operand, "0,v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16QImode, 0, 0, 1, 0 }, { register_operand, "0,v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32HImode, 0, 0, 1, 0 }, { register_operand, "0,v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16HImode, 0, 0, 1, 0 }, { register_operand, "0,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8HImode, 0, 0, 1, 0 }, { register_operand, "0,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0,v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0,v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V64QImode, 0, 0, 1, 0 }, { register_operand, "0,v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V32QImode, 0, 0, 1, 0 }, { register_operand, "0,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "0,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32HImode, 0, 0, 1, 0 }, { register_operand, "0,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16HImode, 0, 0, 1, 0 }, { register_operand, "0,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8HImode, 0, 0, 1, 0 }, { register_operand, "0,v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,x,x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "0,0,x,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,m,r,m", QImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x,x,x", V8HImode, 0, 0, 1, 0 }, { register_operand, "0,0,x,x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,m,r,m", HImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x,x,x", V4SImode, 0, 0, 1, 0 }, { register_operand, "0,0,x,x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,m,r,m", SImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x,x,x", V2DImode, 0, 0, 1, 0 }, { register_operand, "0,0,x,x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "r,m,r,m", DImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_16_to_31_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_8_to_11_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_12_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_4_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,Yi,x,x,x", V4SImode, 0, 0, 1, 0 }, { reg_or_0_operand, "C,C,C,0,x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,r,m,x,x", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=r,m", QImode, 0, 0, 1, 1 }, { register_operand, "x,x", V16QImode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=r,m", HImode, 0, 0, 1, 1 }, { register_operand, "x,x", V8HImode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", HImode, 0, 0, 1, 0 }, { register_operand, "x", V8HImode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "x", V8HImode, 0, 0, 1, 0 }, { const_0_to_7_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", QImode, 0, 0, 1, 0 }, { memory_operand, "o", V16QImode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=r", HImode, 0, 0, 1, 0 }, { memory_operand, "o", V8HImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "=r,r,x,m", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "mYj,x,xm,x", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=rm,Yr,*x,x", SImode, 0, 0, 1, 1 }, { register_operand, "x,0,0,x", V4SImode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=x,r", SImode, 0, 0, 1, 0 }, { memory_operand, "o,o", V4SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "=rm,m,x,x,x,x,r", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,x,0,x,x,o,o", V2DImode, 0, 0, 1, 1 }, { register_operand, "=Yr,*x,x,Yr,*x,x,x,*y,*y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,0,x,0,0,x,rm,0,rm", SImode, 0, 0, 1, 1 }, { vector_move_operand, "rm,rm,rm,Yr,*x,x,C,*ym,C", SImode, 0, 0, 1, 1 }, { register_operand, "=x,x,*y,x,x,*y,*y", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,rm,rm,0,m,0,*rm", SImode, 0, 0, 1, 1 }, { reg_or_0_operand, "x,C,C,x,C,*y,C", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x,x,x,x", V4SImode, 0, 0, 1, 0 }, { register_operand, "0,x,0,0,x", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,x,x,m,m", V2SImode, 0, 0, 1, 1 }, { register_operand, "=Yr,*x,x,Yi,x,!x,x,x,x,x,x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,0,x,r,xm,*y,0,x,0,0,x", DImode, 0, 0, 1, 1 }, { vector_move_operand, "*rm,rm,rm,C,C,C,x,x,x,m,m", DImode, 0, 0, 1, 1 }, { register_operand, "=x,v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V64QImode, 0, 0, 1, 1 }, { const1_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", DImode, 0, 0, 1, 0 }, { const1_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V32QImode, 0, 0, 1, 1 }, { const1_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { const1_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16QImode, 0, 0, 1, 1 }, { const1_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { const1_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V32HImode, 0, 0, 1, 1 }, { const1_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { const1_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16HImode, 0, 0, 1, 1 }, { const1_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { const1_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8HImode, 0, 0, 1, 1 }, { const1_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { const1_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0,v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V64QImode, 0, 0, 1, 1 }, { register_operand, "=x,v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0,v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V32QImode, 0, 0, 1, 1 }, { register_operand, "=x,v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0,v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { register_operand, "x", V32QImode, 0, 0, 1, 0 }, { register_operand, "D", SImode, 0, 0, 1, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { register_operand, "D", DImode, 0, 0, 1, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { register_operand, "a", SImode, 0, 0, 1, 0 }, { register_operand, "c", SImode, 0, 0, 1, 0 }, { register_operand, "d", SImode, 0, 0, 1, 0 }, { register_operand, "a", DImode, 0, 0, 1, 0 }, { register_operand, "c", SImode, 0, 0, 1, 0 }, { register_operand, "d", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V16HImode, 0, 0, 1, 0 }, { register_operand, "x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V32QImode, 0, 0, 1, 1 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V8HImode, 0, 0, 1, 0 }, { register_operand, "0,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=y", V4HImode, 0, 0, 1, 0 }, { register_operand, "0", V8QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V8QImode, 0, 0, 1, 1 }, { register_operand, "=x,v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V32HImode, 0, 0, 1, 1 }, { const1_operand, "", V32HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V16HImode, 0, 0, 1, 1 }, { const1_operand, "", V16HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,v", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,vm", V8HImode, 0, 0, 1, 1 }, { const1_operand, "", V8HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=y", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "ym", V4HImode, 0, 0, 1, 1 }, { const1_operand, "", V4HImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V32QImode, 0, 0, 1, 0 }, { register_operand, "0,x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V32QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16HImode, 0, 0, 1, 0 }, { register_operand, "0,x", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V16HImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8SImode, 0, 0, 1, 0 }, { register_operand, "0,x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V8SImode, 0, 0, 1, 1 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { const_0_to_255_mul_8_operand, "n", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { const_0_to_255_mul_8_operand, "n", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { const_0_to_255_mul_8_operand, "n", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V4TImode, 0, 0, 1, 0 }, { register_operand, "0,v", V4TImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V4TImode, 0, 0, 1, 1 }, { const_0_to_255_mul_8_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", V2TImode, 0, 0, 1, 0 }, { register_operand, "0,v", V2TImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", V2TImode, 0, 0, 1, 1 }, { const_0_to_255_mul_8_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=x,v", TImode, 0, 0, 1, 0 }, { register_operand, "0,v", TImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,vm", TImode, 0, 0, 1, 1 }, { const_0_to_255_mul_8_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=y", DImode, 0, 0, 1, 0 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", DImode, 0, 0, 1, 1 }, { const_0_to_255_mul_8_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=y", V8QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "ym", V8QImode, 0, 0, 1, 1 }, { memory_operand, "=m", SFmode, 0, 0, 1, 1 }, { register_operand, "x", SFmode, 0, 0, 1, 0 }, { memory_operand, "=m", DFmode, 0, 0, 1, 1 }, { register_operand, "x", DFmode, 0, 0, 1, 0 }, { memory_operand, "=m", SFmode, 0, 0, 1, 1 }, { register_operand, "x", V4SFmode, 0, 0, 1, 0 }, { memory_operand, "=m", DFmode, 0, 0, 1, 1 }, { register_operand, "x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yz,Yz,x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yz,Yz,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yz,Yz,x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yz,Yz,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,x", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,xm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,x", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,xm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,x", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,xm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%0,0,x", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "Yrm,*xm,xm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,v", V8DImode, 0, 0, 1, 0 }, { memory_operand, "m,m,m", V8DImode, 0, 0, 1, 1 }, { register_operand, "=Yr,*x,v", V4DImode, 0, 0, 1, 0 }, { memory_operand, "m,m,m", V4DImode, 0, 0, 1, 1 }, { register_operand, "=Yr,*x,v", V2DImode, 0, 0, 1, 0 }, { memory_operand, "m,m,m", V2DImode, 0, 0, 1, 1 }, { register_operand, "=Yr,*x,x", V32QImode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V32QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V16QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,v", V32HImode, 0, 0, 1, 0 }, { register_operand, "0,0,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,v", V16HImode, 0, 0, 1, 0 }, { register_operand, "0,0,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,v", V8HImode, 0, 0, 1, 0 }, { register_operand, "0,0,v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V32QImode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yz,Yz,x", V32QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yz,Yz,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V8HImode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm,xm", V8HImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V16HImode, 0, 0, 1, 0 }, { register_operand, "x", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16HImode, 0, 0, 1, 1 }, { avx2_pblendw_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SImode, 0, 0, 1, 0 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "Yr,*x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm", V2DImode, 0, 0, 1, 1 }, { register_operand, "=Yr,*x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "Yrm,*xm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yr,*x,x", V4SFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=Yr,*x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,0,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yr,*x,x", V2DFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=c,c", SImode, 0, 0, 1, 0 }, { register_operand, "=Yz,Yz", V16QImode, 0, 0, 1, 0 }, { register_operand, "x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "a,a", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m", V16QImode, 0, 0, 1, 1 }, { register_operand, "d,d", SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=c", SImode, 0, 0, 1, 0 }, { register_operand, "=Yz", V16QImode, 0, 0, 1, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { register_operand, "a", SImode, 0, 0, 1, 0 }, { memory_operand, "m", V16QImode, 0, 0, 1, 1 }, { register_operand, "d", SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=c,c", SImode, 0, 0, 1, 0 }, { register_operand, "x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "a,a", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m", V16QImode, 0, 0, 1, 1 }, { register_operand, "d,d", SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n,n", SImode, 0, 0, 1, 0 }, { scratch_operand, "=Yz,Yz,X,X", V16QImode, 0, 0, 0, 0 }, { scratch_operand, "=X,X,c,c", SImode, 0, 0, 0, 0 }, { register_operand, "x,x,x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "a,a,a,a", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m,x,m", V16QImode, 0, 0, 1, 1 }, { register_operand, "d,d,d,d", SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n,n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=c,c", SImode, 0, 0, 1, 0 }, { register_operand, "=Yz,Yz", V16QImode, 0, 0, 1, 0 }, { register_operand, "x,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m", V16QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n", SImode, 0, 0, 1, 0 }, { register_operand, "=c", SImode, 0, 0, 1, 0 }, { register_operand, "=Yz", V16QImode, 0, 0, 1, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { memory_operand, "m", V16QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=c,c", SImode, 0, 0, 1, 0 }, { register_operand, "x,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m", V16QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n", SImode, 0, 0, 1, 0 }, { scratch_operand, "=Yz,Yz,X,X", V16QImode, 0, 0, 0, 0 }, { scratch_operand, "=X,X,c,c", SImode, 0, 0, 0, 0 }, { register_operand, "x,x,x,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m,x,m", V16QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n,n,n", SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SFmode, 0, 1, 0, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const2367_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SFmode, 0, 1, 0, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const2367_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const2367_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const2367_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const2367_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const2367_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const2367_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { const2367_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "=x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "x", V8HImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V32QImode, 0, 0, 1, 0 }, { register_operand, "x,x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V32QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "x,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16HImode, 0, 0, 1, 0 }, { register_operand, "x,x", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V16HImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8HImode, 0, 0, 1, 0 }, { register_operand, "x,x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16SImode, 0, 0, 1, 0 }, { register_operand, "x,x", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V16SImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8SImode, 0, 0, 1, 0 }, { register_operand, "x,x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V8SImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4SImode, 0, 0, 1, 0 }, { register_operand, "x,x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V4SImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8DImode, 0, 0, 1, 0 }, { register_operand, "x,x", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V8DImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4DImode, 0, 0, 1, 0 }, { register_operand, "x,x", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V4DImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V2DImode, 0, 0, 1, 0 }, { register_operand, "x,x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16SFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V16SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8DFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V8DFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V4DFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "x,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4SImode, 0, 0, 1, 0 }, { register_operand, "x,x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8HImode, 0, 0, 1, 0 }, { register_operand, "x,x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "x,x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16QImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { const_0_to_15_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { const_0_to_31_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DImode, 0, 0, 1, 1 }, { const_0_to_63_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V4SImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,x", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "=x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SFmode, 0, 0, 1, 1 }, { const0_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "=x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DFmode, 0, 0, 1, 1 }, { const0_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "=x", V16QImode, 0, 0, 1, 0 }, { ix86_comparison_int_operator, "", V16QImode, 0, 1, 0, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V8HImode, 0, 0, 1, 0 }, { ix86_comparison_int_operator, "", V8HImode, 0, 1, 0, 0 }, { register_operand, "x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { ix86_comparison_int_operator, "", V4SImode, 0, 1, 0, 0 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { ix86_comparison_int_operator, "", V2DImode, 0, 1, 0, 0 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x", V16QImode, 0, 0, 1, 0 }, { ix86_comparison_uns_operator, "", V16QImode, 0, 1, 0, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V8HImode, 0, 0, 1, 0 }, { ix86_comparison_uns_operator, "", V8HImode, 0, 1, 0, 0 }, { register_operand, "x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { ix86_comparison_uns_operator, "", V4SImode, 0, 1, 0, 0 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { ix86_comparison_uns_operator, "", V2DImode, 0, 1, 0, 0 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x", V16QImode, 0, 0, 1, 0 }, { register_operand, "x", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16QImode, 0, 0, 1, 1 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V8HImode, 0, 0, 1, 0 }, { register_operand, "x", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DImode, 0, 0, 1, 1 }, { const_int_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V8SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V4DImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "x", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "%x", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm", V2DImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x,x", V2DImode, 0, 0, 1, 0 }, { register_operand, "0,x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm,xm", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n,n", SImode, 0, 0, 1, 0 }, { vzeroall_operation, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "=x", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { register_operand, "=x", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { register_operand, "=x", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,x", V32QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,x", V16HImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,x", V8SImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,x", V4DImode, 0, 0, 1, 1 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { register_operand, "v", V32HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V4DImode, 0, 0, 1, 0 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", QImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm,r", DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x,x,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m,0", SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,x", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "x,m,0", SImode, 0, 0, 1, 1 }, { register_operand, "=x,x,x,x", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "0,x,m,0", DImode, 0, 0, 1, 1 }, { register_operand, "=x", V32QImode, 0, 0, 1, 0 }, { memory_operand, "m", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V16HImode, 0, 0, 1, 0 }, { memory_operand, "m", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x", V8SImode, 0, 0, 1, 0 }, { memory_operand, "m", V4SImode, 0, 0, 1, 1 }, { register_operand, "=x", V4DImode, 0, 0, 1, 0 }, { memory_operand, "m", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x,x,Yi", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,x,$r", QImode, 0, 0, 1, 1 }, { register_operand, "=x,x,Yi", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,x,$r", QImode, 0, 0, 1, 1 }, { register_operand, "=x,x,Yi", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,x,$r", HImode, 0, 0, 1, 1 }, { register_operand, "=x,x,Yi", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,x,$r", HImode, 0, 0, 1, 1 }, { register_operand, "=x,x,Yi", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,x,$r", SImode, 0, 0, 1, 1 }, { register_operand, "=x,x,Yi", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,x,$r", SImode, 0, 0, 1, 1 }, { register_operand, "=x,x,v,x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,m,v,?x", SImode, 0, 0, 1, 1 }, { register_operand, "=x,x,v,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,m,v,?x", SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,v,x", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,m,v,?x", DImode, 0, 0, 1, 1 }, { register_operand, "=x,x,v,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,m,v,?x", DFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,0,?x", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x,x,x", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,0,?x", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x,x,x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,0,?x", V4SImode, 0, 0, 1, 1 }, { register_operand, "=x,x,x", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,0,?x", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x,x,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,0,?x", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,0,?x", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=v,v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v,v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v,m", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C,0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk,Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=x,x,x", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,o,x", V4SFmode, 0, 0, 1, 1 }, { avx_vbroadcast_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "C,n,n", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x,x,x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,o,?x", V8SFmode, 0, 0, 1, 1 }, { avx_vbroadcast_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "C,n,n", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x,x,x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "m,o,?x", V4DFmode, 0, 0, 1, 1 }, { avx_vbroadcast_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "C,n,n", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { const0_operand, "C", V16SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { const0_operand, "C", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const0_operand, "C", V8DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const0_operand, "C", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { const0_operand, "C", V8SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { const0_operand, "C", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const0_operand, "C", V4DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { const0_operand, "C", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { const0_operand, "C", V4SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { const0_operand, "C", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const0_operand, "C", V2DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const0_operand, "C", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { register_operand, "0", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { const0_operand, "C", V64QImode, 0, 0, 1, 0 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { register_operand, "0", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { const0_operand, "C", V16QImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { register_operand, "0", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { const0_operand, "C", V32QImode, 0, 0, 1, 0 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { register_operand, "0", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { const0_operand, "C", V8HImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { register_operand, "0", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { const0_operand, "C", V16HImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { register_operand, "v", V32HImode, 0, 0, 1, 0 }, { register_operand, "0", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { const0_operand, "C", V32HImode, 0, 0, 1, 0 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V64QImode, 0, 0, 1, 0 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { register_operand, "0", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { register_operand, "Yk", DImode, 0, 0, 1, 0 }, { register_operand, "=v", V16QImode, 0, 0, 1, 0 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { register_operand, "0", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32QImode, 0, 0, 1, 0 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { register_operand, "0", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { register_operand, "0", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { register_operand, "0", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { register_operand, "v", V32HImode, 0, 0, 1, 0 }, { register_operand, "0", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { const0_operand, "C", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const0_operand, "C", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { const0_operand, "C", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { const0_operand, "C", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { const0_operand, "C", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const0_operand, "C", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SImode, 0, 0, 1, 0 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x,x", V16QImode, 0, 0, 1, 0 }, { register_operand, "0,x", V16QImode, 0, 0, 1, 0 }, { palignr_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "n,n", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x,x", V8HImode, 0, 0, 1, 0 }, { register_operand, "0,x", V8HImode, 0, 0, 1, 0 }, { palignr_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "n,n", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x,x", V4SImode, 0, 0, 1, 0 }, { register_operand, "0,x", V4SImode, 0, 0, 1, 0 }, { palignr_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "n,n", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x,x", V2DImode, 0, 0, 1, 0 }, { register_operand, "0,x", V2DImode, 0, 0, 1, 0 }, { palignr_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "n,n", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x,x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V4SFmode, 0, 0, 1, 0 }, { palignr_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "n,n", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=x,x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0,x", V2DFmode, 0, 0, 1, 0 }, { palignr_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "n,n", VOIDmode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=x", V16HImode, 0, 0, 1, 0 }, { register_operand, "x", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x", V32QImode, 0, 0, 1, 0 }, { register_operand, "x", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x", V4SFmode, 0, 0, 1, 0 }, { memory_operand, "m", V4SFmode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DFmode, 0, 0, 1, 0 }, { memory_operand, "m", V2DFmode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SFmode, 0, 0, 1, 0 }, { memory_operand, "m", V8SFmode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4DFmode, 0, 0, 1, 0 }, { memory_operand, "m", V4DFmode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { memory_operand, "m", V4SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "=x", V2DImode, 0, 0, 1, 0 }, { memory_operand, "m", V2DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "=x", V8SImode, 0, 0, 1, 0 }, { memory_operand, "m", V8SImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4DImode, 0, 0, 1, 0 }, { memory_operand, "m", V4DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { memory_operand, "+m", V4SFmode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "x", V4SFmode, 0, 0, 1, 0 }, { memory_operand, "+m", V2DFmode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "x", V2DFmode, 0, 0, 1, 0 }, { memory_operand, "+m", V8SFmode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { memory_operand, "+m", V4DFmode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { memory_operand, "+m", V4SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { memory_operand, "+m", V2DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { memory_operand, "+m", V8SImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { memory_operand, "+m", V4DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=x,m", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V32QImode, 0, 0, 1, 0 }, { register_operand, "x,x", V16QImode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V16QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16HImode, 0, 0, 1, 0 }, { register_operand, "x,x", V8HImode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V8HImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8SImode, 0, 0, 1, 0 }, { register_operand, "x,x", V4SImode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V4SImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4DImode, 0, 0, 1, 0 }, { register_operand, "x,x", V2DImode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V2DImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V4SFmode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V2DFmode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V64QImode, 0, 0, 1, 0 }, { register_operand, "x,x", V32QImode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V32QImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V32HImode, 0, 0, 1, 0 }, { register_operand, "x,x", V16HImode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V16HImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16SImode, 0, 0, 1, 0 }, { register_operand, "x,x", V8SImode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V8SImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8DImode, 0, 0, 1, 0 }, { register_operand, "x,x", V4DImode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V4DImode, 0, 0, 1, 1 }, { register_operand, "=x,x", V16SFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V8SFmode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "=x,x", V8DFmode, 0, 0, 1, 0 }, { register_operand, "x,x", V4DFmode, 0, 0, 1, 0 }, { vector_move_operand, "xm,C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { memory_operand, "m", V4HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "N", SImode, 0, 0, 1, 0 }, { const0_operand, "", V4HImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4HImode, 0, 0, 1, 1 }, { register_operand, "x", V4SFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "N", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=xm", V8HImode, 0, 0, 1, 1 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=vm", V16HImode, 0, 0, 1, 1 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "N", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=&x", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DImode, 0, 0, 0, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DImode, 0, 0, 0, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DFmode, 0, 0, 0, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DFmode, 0, 0, 0, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DImode, 0, 0, 0, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DImode, 0, 0, 0, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DFmode, 0, 0, 0, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DFmode, 0, 0, 0, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SImode, 0, 0, 0, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SImode, 0, 0, 0, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SFmode, 0, 0, 0, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SFmode, 0, 0, 0, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "1", V8SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "1", V8SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "1", V8SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "1", V8SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "1", V8SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "1", V8SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "1", V8SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "1", V8SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DImode, 0, 0, 0, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DImode, 0, 0, 0, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DFmode, 0, 0, 0, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DFmode, 0, 0, 0, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DImode, 0, 0, 0, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DImode, 0, 0, 0, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DFmode, 0, 0, 0, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DFmode, 0, 0, 0, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SImode, 0, 0, 0, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SImode, 0, 0, 0, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SFmode, 0, 0, 0, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SFmode, 0, 0, 0, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V2DFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4DFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V4SFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SImode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&x", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&x", V8SFmode, 0, 0, 0, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "1", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "=&v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0", V16SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", HImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0", V16SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", HImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", HImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V16SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", HImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", HImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", HImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", HImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", HImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SImode, 0, 0, 1, 0 }, { register_operand, "0", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "0", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "0", V8DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "0", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "0", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "0", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "2", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V16SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V8SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V4SFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DImode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=&v", V2DFmode, 0, 0, 1, 0 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SImode, 0, 1, 0, 1 }, { register_operand, "1", HImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SImode, 0, 1, 0, 1 }, { register_operand, "1", HImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SFmode, 0, 1, 0, 1 }, { register_operand, "1", HImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", HImode, 0, 0, 0, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SFmode, 0, 1, 0, 1 }, { register_operand, "1", HImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V2DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V2DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V2DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V2DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V16SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V8SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4SImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V4SFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V2DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V2DImode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", SImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V2DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { vsib_address_operand, "Tv", DImode, 0, 0, 1, 1 }, { scratch_operand, "=&Yk", QImode, 0, 0, 0, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "n", SImode, 0, 0, 1, 0 }, { vsib_mem_operator, "", V2DFmode, 0, 1, 0, 1 }, { register_operand, "1", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SImode, 0, 0, 1, 0 }, { register_operand, "v", V16SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SImode, 0, 0, 1, 0 }, { register_operand, "v", V8SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SImode, 0, 0, 1, 0 }, { register_operand, "v", V4SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16SImode, 0, 0, 1, 1 }, { register_operand, "x", V16SImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { memory_operand, "=m", V16SFmode, 0, 0, 1, 1 }, { register_operand, "x", V16SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8DImode, 0, 0, 1, 1 }, { register_operand, "x", V8DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8DFmode, 0, 0, 1, 1 }, { register_operand, "x", V8DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8SImode, 0, 0, 1, 1 }, { register_operand, "x", V8SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V8SFmode, 0, 0, 1, 1 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4DImode, 0, 0, 1, 1 }, { register_operand, "x", V4DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4DFmode, 0, 0, 1, 1 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SImode, 0, 0, 1, 1 }, { register_operand, "x", V4SImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V4SFmode, 0, 0, 1, 1 }, { register_operand, "x", V4SFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V2DImode, 0, 0, 1, 1 }, { register_operand, "x", V2DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { memory_operand, "=m", V2DFmode, 0, 0, 1, 1 }, { register_operand, "x", V2DFmode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=Yk", HImode, 0, 0, 1, 0 }, { register_operand, "v", V16SFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n", QImode, 0, 0, 1, 0 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8SFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n", QImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4SFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n", QImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V8DFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n", QImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V4DFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n", QImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=Yk", QImode, 0, 0, 1, 0 }, { register_operand, "v", V2DFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "n", QImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V16SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4SFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V8DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V4DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V4DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "v", V2DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V2DFmode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=v", V8HImode, 0, 0, 1, 0 }, { register_operand, "v", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V16QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V8HImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V16HImode, 0, 0, 1, 0 }, { register_operand, "v", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V32QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V16HImode, 0, 0, 1, 1 }, { register_operand, "Yk", HImode, 0, 0, 1, 0 }, { register_operand, "=v", V32HImode, 0, 0, 1, 0 }, { register_operand, "v", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V64QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "0C", V32HImode, 0, 0, 1, 1 }, { register_operand, "Yk", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "n", SImode, 0, 0, 1, 0 }, { register_operand, "=x", V4SImode, 0, 0, 1, 0 }, { register_operand, "0", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4SImode, 0, 0, 1, 1 }, { register_operand, "Yz", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=x,m", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "=x,m", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "xm,x", V4DFmode, 0, 0, 1, 1 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { const0_operand, "C", V8DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { const0_operand, "C", V4DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { const0_operand, "C", V2DImode, 0, 0, 1, 0 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V8DImode, 0, 0, 1, 0 }, { register_operand, "0", V8DImode, 0, 0, 1, 0 }, { register_operand, "v", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V8DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V4DImode, 0, 0, 1, 0 }, { register_operand, "0", V4DImode, 0, 0, 1, 0 }, { register_operand, "v", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V4DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { register_operand, "=v", V2DImode, 0, 0, 1, 0 }, { register_operand, "0", V2DImode, 0, 0, 1, 0 }, { register_operand, "v", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "vm", V2DImode, 0, 0, 1, 1 }, { register_operand, "Yk", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=x,m,?r", DImode, 0, 0, 1, 1 }, { memory_operand, "m,m,m", DImode, 0, 0, 1, 1 }, { memory_operand, "=X,X,m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=X,xf,xf", DFmode, 0, 0, 0, 0 }, { memory_operand, "=m", QImode, 0, 0, 1, 1 }, { nonmemory_operand, "qn", QImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "=m", HImode, 0, 0, 1, 1 }, { nonmemory_operand, "rn", HImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "=m", SImode, 0, 0, 1, 1 }, { x86_64_nonmemory_operand, "re", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "=m,m,m", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "x,m,?r", DImode, 0, 0, 1, 1 }, { memory_operand, "=X,X,m", DImode, 0, 0, 1, 1 }, { scratch_operand, "=X,xf,xf", DFmode, 0, 0, 0, 0 }, { register_operand, "=f", DFmode, 0, 0, 1, 0 }, { memory_operand, "m", DImode, 0, 0, 1, 1 }, { memory_operand, "=m", DImode, 0, 0, 1, 1 }, { register_operand, "f", DFmode, 0, 0, 1, 0 }, { register_operand, "=A", DImode, 0, 0, 1, 0 }, { memory_operand, "+m", DImode, 0, 0, 1, 1 }, { register_operand, "0", DImode, 0, 0, 1, 0 }, { register_operand, "b", SImode, 0, 0, 1, 0 }, { register_operand, "c", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=a", QImode, 0, 0, 1, 0 }, { memory_operand, "+m", QImode, 0, 0, 1, 1 }, { register_operand, "0", QImode, 0, 0, 1, 0 }, { register_operand, "q", QImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=a", HImode, 0, 0, 1, 0 }, { memory_operand, "+m", HImode, 0, 0, 1, 1 }, { register_operand, "0", HImode, 0, 0, 1, 0 }, { register_operand, "r", HImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=a", SImode, 0, 0, 1, 0 }, { memory_operand, "+m", SImode, 0, 0, 1, 1 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=q", QImode, 0, 0, 1, 0 }, { memory_operand, "+m", QImode, 0, 0, 1, 1 }, { nonmemory_operand, "0", QImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", HImode, 0, 0, 1, 0 }, { memory_operand, "+m", HImode, 0, 0, 1, 1 }, { nonmemory_operand, "0", HImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { memory_operand, "+m", SImode, 0, 0, 1, 1 }, { nonmemory_operand, "0", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "+m", QImode, 0, 0, 1, 1 }, { const_int_operand, "i", QImode, 0, 0, 1, 0 }, { const_int_operand, "i", QImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "+m", HImode, 0, 0, 1, 1 }, { const_int_operand, "i", HImode, 0, 0, 1, 0 }, { const_int_operand, "i", HImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "+m", SImode, 0, 0, 1, 1 }, { const_int_operand, "i", SImode, 0, 0, 1, 0 }, { const_int_operand, "i", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=q", QImode, 0, 0, 1, 0 }, { memory_operand, "+m", QImode, 0, 0, 1, 1 }, { register_operand, "0", QImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", HImode, 0, 0, 1, 0 }, { memory_operand, "+m", HImode, 0, 0, 1, 1 }, { register_operand, "0", HImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "=r", SImode, 0, 0, 1, 0 }, { memory_operand, "+m", SImode, 0, 0, 1, 1 }, { register_operand, "0", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "+m", QImode, 0, 0, 1, 1 }, { nonmemory_operand, "qn", QImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "+m", HImode, 0, 0, 1, 1 }, { nonmemory_operand, "rn", HImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "+m", SImode, 0, 0, 1, 1 }, { nonmemory_operand, "re", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { ordered_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { general_operand, "", QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { ordered_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { general_operand, "", HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { ordered_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { ordered_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "", DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { ordered_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { general_operand, "", QImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { ordered_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { general_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { ordered_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "", SImode, 0, 0, 1, 1 }, { ext_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", QImode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonmemory_operand, "", XFmode, 0, 0, 1, 0 }, { nonmemory_operand, "", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonmemory_operand, "", XFmode, 0, 0, 1, 0 }, { nonmemory_operand, "", XFmode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { cmp_fp_expander_operand, "", SFmode, 0, 0, 1, 1 }, { cmp_fp_expander_operand, "", SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { cmp_fp_expander_operand, "", DFmode, 0, 0, 1, 1 }, { cmp_fp_expander_operand, "", DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { cmp_fp_expander_operand, "", SFmode, 0, 0, 1, 1 }, { cmp_fp_expander_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { cmp_fp_expander_operand, "", DFmode, 0, 0, 1, 1 }, { cmp_fp_expander_operand, "", DFmode, 0, 0, 1, 1 }, { comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { const0_operand, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { const0_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { const0_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { const0_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { const0_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { float_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { float_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { float_operator, "", XFmode, 0, 1, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { float_operator, "", SFmode, 0, 1, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { float_operator, "", DFmode, 0, 1, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { float_operator, "", XFmode, 0, 1, 0, 0 }, { push_operand, "", DImode, 0, 0, 1, 1 }, { general_operand, "", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", XImode, 0, 0, 1, 1 }, { general_operand, "", XImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", OImode, 0, 0, 1, 1 }, { general_operand, "", OImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", CDImode, 0, 0, 1, 1 }, { general_operand, "", CDImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { general_operand, "", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { general_operand, "", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", TImode, 0, 0, 1, 1 }, { general_operand, "", TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", QImode, 1, 0, 1, 1 }, { general_operand, "", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 1, 0, 1, 1 }, { general_operand, "", HImode, 0, 0, 1, 1 }, { push_operand, "", TFmode, 0, 0, 1, 1 }, { sse_reg_operand, "", TFmode, 0, 0, 1, 0 }, { push_operand, "", XFmode, 0, 0, 1, 1 }, { fp_register_operand, "", XFmode, 0, 0, 1, 0 }, { push_operand, "", DFmode, 0, 0, 1, 1 }, { any_fp_register_operand, "", DFmode, 0, 0, 1, 0 }, { push_operand, "", SFmode, 0, 0, 1, 1 }, { any_fp_register_operand, "", SFmode, 0, 0, 1, 0 }, { push_operand, "", SFmode, 0, 0, 1, 1 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { push_operand, "", VOIDmode, 0, 0, 1, 1 }, { general_operand, "", VOIDmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", TFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", TFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { general_operand, "", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { general_operand, "", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", XFmode, 0, 0, 1, 1 }, { general_operand, "", XFmode, 0, 0, 1, 1 }, { any_fp_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { fp_register_operand, "", SFmode, 0, 0, 1, 0 }, { immediate_operand, "", SFmode, 0, 0, 1, 0 }, { fp_register_operand, "", DFmode, 0, 0, 1, 0 }, { immediate_operand, "", DFmode, 0, 0, 1, 0 }, { fp_register_operand, "", XFmode, 0, 0, 1, 0 }, { immediate_operand, "", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", VOIDmode, 0, 0, 1, 1 }, { general_operand, "", VOIDmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { push_operand, "", DFmode, 0, 0, 1, 1 }, { fp_register_operand, "", SFmode, 0, 0, 1, 0 }, { push_operand, "", XFmode, 0, 0, 1, 1 }, { fp_register_operand, "", SFmode, 0, 0, 1, 0 }, { push_operand, "", XFmode, 0, 0, 1, 1 }, { fp_register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { general_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", XFmode, 0, 0, 1, 1 }, { general_operand, "", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", XFmode, 0, 0, 1, 1 }, { general_operand, "", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { memory_operand, "", DFmode, 0, 0, 1, 1 }, { 0, "", SFmode, 0, 0, 1, 0 }, { 0, "", DFmode, 0, 0, 1, 0 }, { 0, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { fp_register_operand, "", DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", DFmode, 0, 0, 1, 1 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { memory_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", V4SFmode, 0, 0, 0, 0 }, { scratch_operand, "", V4SFmode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", V2DFmode, 0, 0, 0, 0 }, { scratch_operand, "", V2DFmode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V4SFmode, 0, 0, 0, 0 }, { scratch_operand, "", V4SFmode, 0, 0, 0, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V2DFmode, 0, 0, 0, 0 }, { scratch_operand, "", V2DFmode, 0, 0, 0, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { scratch_operand, "x", SFmode, 0, 0, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { scratch_operand, "x", SFmode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", DFmode, 0, 0, 1, 1 }, { scratch_operand, "x", DFmode, 0, 0, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DFmode, 0, 0, 1, 1 }, { scratch_operand, "x", DFmode, 0, 0, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { fp_register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { fp_register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { fp_register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { fp_register_operand, "", SFmode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { fp_register_operand, "", DFmode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { fp_register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", DImode, 0, 0, 0, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", DImode, 0, 0, 0, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", DImode, 0, 0, 0, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", DImode, 0, 0, 0, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", DImode, 0, 0, 0, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", DImode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { address_no_seg_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { address_no_seg_operand, "", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { general_operand, "", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { general_operand, "", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { x86_64_nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { x86_64_nonmemory_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { nonmemory_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { general_operand, "", QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { general_operand, "", HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { index_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { index_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const248_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonmemory_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { index_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const248_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { index_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { general_operand, "", QImode, 0, 0, 1, 1 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { ix86_carry_flag_operator, "", QImode, 0, 1, 0, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { general_operand, "", HImode, 0, 0, 1, 1 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { ix86_carry_flag_operator, "", HImode, 0, 1, 0, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "", SImode, 0, 0, 1, 1 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { ix86_carry_flag_operator, "", SImode, 0, 1, 0, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { x86_64_general_operand, "", DImode, 0, 0, 1, 1 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { ix86_carry_flag_operator, "", DImode, 0, 1, 0, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { general_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { x86_64_general_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { x86_64_general_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", TImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { x86_64_nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { ext_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", VOIDmode, 0, 0, 1, 1 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { mask_reg_operand, "", QImode, 0, 0, 1, 0 }, { mask_reg_operand, "", QImode, 0, 0, 1, 0 }, { mask_reg_operand, "", QImode, 0, 0, 1, 0 }, { mask_reg_operand, "", HImode, 0, 0, 1, 0 }, { mask_reg_operand, "", HImode, 0, 0, 1, 0 }, { mask_reg_operand, "", HImode, 0, 0, 1, 0 }, { mask_reg_operand, "", SImode, 0, 0, 1, 0 }, { mask_reg_operand, "", SImode, 0, 0, 1, 0 }, { mask_reg_operand, "", SImode, 0, 0, 1, 0 }, { mask_reg_operand, "", DImode, 0, 0, 1, 0 }, { mask_reg_operand, "", DImode, 0, 0, 1, 0 }, { mask_reg_operand, "", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { x86_64_szext_general_operand, "", SImode, 0, 0, 1, 1 }, { general_reg_operand, "", QImode, 0, 0, 1, 0 }, { general_reg_operand, "", QImode, 0, 0, 1, 0 }, { general_reg_operand, "", HImode, 0, 0, 1, 0 }, { general_reg_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { const_int_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { general_operand, "", VOIDmode, 0, 0, 1, 1 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { general_reg_operand, "", SImode, 0, 0, 1, 0 }, { general_reg_operand, "", SImode, 0, 0, 1, 0 }, { general_reg_operand, "", DImode, 0, 0, 1, 0 }, { general_reg_operand, "", DImode, 0, 0, 1, 0 }, { ext_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { ext_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", TFmode, 0, 0, 1, 0 }, { register_operand, "", TFmode, 0, 0, 1, 0 }, { fp_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { absneg_operator, "", VOIDmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", VOIDmode, 0, 0, 1, 1 }, { absneg_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { absneg_operator, "", SFmode, 0, 1, 0, 0 }, { 0, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { absneg_operator, "", DFmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { absneg_operator, "", XFmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonmemory_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonmemory_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", TFmode, 0, 0, 1, 0 }, { nonmemory_operand, "", TFmode, 0, 0, 1, 0 }, { register_operand, "", TFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { vector_move_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { vector_move_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", TFmode, 0, 0, 1, 0 }, { vector_move_operand, "", TFmode, 0, 0, 1, 1 }, { register_operand, "", TFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", TFmode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { scratch_operand, "", V4SFmode, 0, 0, 0, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { 0, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { scratch_operand, "", V2DFmode, 0, 0, 0, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { 0, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", TFmode, 0, 0, 1, 0 }, { scratch_operand, "", TFmode, 0, 0, 0, 0 }, { register_operand, "", TFmode, 0, 0, 1, 0 }, { register_operand, "", TFmode, 0, 0, 1, 0 }, { 0, "", TFmode, 0, 0, 1, 0 }, { 0, "", TFmode, 0, 0, 1, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { shiftdi_operand, "", DImode, 0, 0, 1, 1 }, { ashldi_input_operand, "", DImode, 0, 0, 1, 1 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { nonmemory_operand, "", DImode, 0, 0, 1, 0 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { index_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", QImode, 0, 0, 1, 0 }, { shiftdi_operand, "", DImode, 0, 0, 1, 1 }, { shiftdi_operand, "", DImode, 0, 0, 1, 1 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { const_1_to_31_operand, "", QImode, 0, 0, 1, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { immediate_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const8_operand, "", SImode, 0, 0, 1, 0 }, { const8_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { ext_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const8_operand, "", SImode, 0, 0, 1, 0 }, { const8_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", SImode, 0, 1, 0, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", QImode, 1, 0, 1, 1 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { bt_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", XFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { general_operand, "", SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { general_operand, "", DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { ix86_fp_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { general_operand, "", XFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", SFmode, 0, 1, 0, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", DFmode, 0, 1, 0, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", XFmode, 0, 1, 0, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", SFmode, 0, 1, 0, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", DFmode, 0, 1, 0, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { ix86_swapped_fp_comparison_operator, "", CCFPmode, 0, 1, 0, 0 }, { float_operator, "", XFmode, 0, 1, 0, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { indirect_branch_operand, "", VOIDmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", QImode, 0, 1, 0, 0 }, { q_regs_operand, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", QImode, 0, 1, 0, 0 }, { q_regs_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", QImode, 0, 0, 1, 0 }, { 0, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { 0, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { scratch_operand, "", DImode, 0, 0, 0, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { tls_symbolic_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { constant_call_address_operand, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { constant_call_address_operand, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { constant_call_address_operand, "", VOIDmode, 0, 0, 1, 0 }, { tls_symbolic_operand, "", VOIDmode, 0, 0, 1, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { scratch_operand, "", SImode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { tls_symbolic_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { tls_modbase_operand, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", SImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { tls_symbolic_operand, "", VOIDmode, 0, 0, 1, 0 }, { tls_modbase_operand, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", DImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { general_operand, "", XFmode, 0, 0, 1, 1 }, { general_operand, "", XFmode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { general_operand, "", SFmode, 0, 0, 1, 1 }, { general_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { general_operand, "", DFmode, 0, 0, 1, 1 }, { general_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { scratch_operand, "", XFmode, 0, 0, 0, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", XFmode, 0, 0, 0, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", XFmode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { general_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { general_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", VOIDmode, 0, 0, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { memory_operand, "", BLKmode, 0, 0, 1, 1 }, { memory_operand, "", BLKmode, 0, 0, 1, 1 }, { nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", SImode, 0, 0, 1, 0 }, { 0, "", SImode, 0, 0, 1, 0 }, { 0, "", SImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", BLKmode, 0, 0, 1, 1 }, { nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", SImode, 0, 0, 1, 0 }, { 0, "", SImode, 0, 0, 1, 0 }, { 0, "", SImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { general_operand, "", BLKmode, 0, 0, 1, 1 }, { general_operand, "", BLKmode, 0, 0, 1, 1 }, { general_operand, "", VOIDmode, 0, 0, 1, 1 }, { immediate_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { general_operand, "", BLKmode, 0, 0, 1, 1 }, { immediate_operand, "", QImode, 0, 0, 1, 0 }, { immediate_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { general_operand, "", BLKmode, 0, 0, 1, 1 }, { immediate_operand, "", QImode, 0, 0, 1, 0 }, { immediate_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { immediate_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { comparison_operator, "", VOIDmode, 0, 0, 1, 0 }, { general_operand, "", QImode, 0, 0, 1, 1 }, { general_operand, "", QImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { comparison_operator, "", VOIDmode, 0, 0, 1, 0 }, { general_operand, "", HImode, 0, 0, 1, 1 }, { general_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { comparison_operator, "", VOIDmode, 0, 0, 1, 0 }, { x86_64_general_operand, "", SImode, 0, 0, 1, 1 }, { x86_64_general_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { ix86_carry_flag_operator, "", SImode, 0, 1, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "r", HImode, 0, 0, 0, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { comparison_operator, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { comparison_operator, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { comparison_operator, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_operand, "", XFmode, 0, 0, 1, 0 }, { register_and_not_any_fp_reg_operand, "", DFmode, 0, 0, 1, 0 }, { fcmov_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { ix86_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { register_and_not_any_fp_reg_operand, "", SFmode, 0, 0, 1, 0 }, { fcmov_comparison_operator, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "r", SFmode, 0, 0, 0, 0 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { fp_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { fp_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { binary_fp_operator, "", VOIDmode, 0, 1, 0, 0 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { ordered_comparison_operator, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_int_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { ordered_comparison_operator, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const_int_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { ordered_comparison_operator, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { general_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { general_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { aligned_operand, "", VOIDmode, 0, 0, 1, 1 }, { promotable_binary_operator, "", VOIDmode, 0, 1, 0, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { aligned_operand, "", VOIDmode, 0, 0, 1, 1 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { aligned_operand, "", HImode, 0, 0, 1, 1 }, { const_int_operand, "", HImode, 0, 0, 1, 0 }, { push_operand, "", QImode, 0, 0, 1, 1 }, { memory_operand, "", QImode, 0, 0, 1, 1 }, { scratch_operand, "q", QImode, 0, 0, 0, 0 }, { push_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { scratch_operand, "r", HImode, 0, 0, 0, 0 }, { push_operand, "", SImode, 0, 0, 1, 1 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { push_operand, "", DImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { push_operand, "", SFmode, 0, 0, 1, 1 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { scratch_operand, "r", SFmode, 0, 0, 0, 0 }, { memory_operand, "", QImode, 0, 0, 1, 1 }, { immediate_operand, "", QImode, 0, 0, 1, 0 }, { scratch_operand, "q", QImode, 0, 0, 0, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { immediate_operand, "", HImode, 0, 0, 1, 0 }, { scratch_operand, "r", HImode, 0, 0, 0, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { immediate_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { immediate_operand, "", SImode, 0, 0, 1, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { immediate_operand, "", QImode, 0, 0, 1, 0 }, { flags_reg_operand, "", VOIDmode, 0, 0, 1, 0 }, { compare_operator, "", VOIDmode, 0, 1, 0, 0 }, { ext_register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { arith_or_logical_operator, "", SImode, 0, 1, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { commutative_operator, "", SImode, 0, 1, 0, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { commutative_operator, "", VOIDmode, 0, 1, 0, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { arith_or_logical_operator, "", SImode, 0, 1, 0, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { memory_operand, "", QImode, 0, 0, 1, 1 }, { nonmemory_operand, "", QImode, 0, 0, 1, 0 }, { plusminuslogic_operator, "", QImode, 0, 1, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { nonmemory_operand, "", HImode, 0, 0, 1, 0 }, { plusminuslogic_operator, "", HImode, 0, 1, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { x86_64_nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { plusminuslogic_operator, "", SImode, 0, 1, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { x86_64_nonmemory_operand, "", DImode, 0, 0, 1, 0 }, { plusminuslogic_operator, "", DImode, 0, 1, 0, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { memory_operand, "", QImode, 0, 0, 1, 1 }, { plusminuslogic_operator, "", QImode, 0, 1, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { plusminuslogic_operator, "", HImode, 0, 1, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { plusminuslogic_operator, "", SImode, 0, 1, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { plusminuslogic_operator, "", DImode, 0, 1, 0, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { memory_operand, "", QImode, 0, 0, 1, 1 }, { nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { plusminuslogic_operator, "", SImode, 0, 1, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { plusminuslogic_operator, "", SImode, 0, 1, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const0_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 1, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const359_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { const359_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { const359_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { const359_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { immediate_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { immediate_operand, "", DImode, 0, 0, 1, 0 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { const_int_operand, "", HImode, 0, 0, 1, 0 }, { scratch_operand, "r", HImode, 0, 0, 0, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { x86_64_general_operand, "", VOIDmode, 0, 0, 1, 1 }, { scratch_operand, "r", SImode, 0, 0, 0, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", VOIDmode, 0, 0, 1, 0 }, { x86_64_general_operand, "", VOIDmode, 0, 0, 1, 1 }, { scratch_operand, "r", DImode, 0, 0, 0, 0 }, { address_operand, "", VOIDmode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { memory_operand, "", VOIDmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { const_int_operand, "i", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "=qm", QImode, 0, 0, 1, 1 }, { register_operand, "r", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "rm", SImode, 0, 0, 1, 1 }, { const_int_operand, "i", SImode, 0, 0, 1, 0 }, { register_operand, "", BND32mode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { address_mpx_no_base_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", BND64mode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { address_mpx_no_base_operand, "", DImode, 0, 0, 1, 1 }, { general_operand, "", BND32mode, 0, 0, 1, 1 }, { general_operand, "", BND32mode, 0, 0, 1, 1 }, { general_operand, "", BND64mode, 0, 0, 1, 1 }, { general_operand, "", BND64mode, 0, 0, 1, 1 }, { register_operand, "", BND32mode, 0, 0, 1, 0 }, { address_no_seg_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", BND64mode, 0, 0, 1, 0 }, { address_no_seg_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", BND32mode, 0, 0, 1, 0 }, { address_mpx_no_index_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", BND64mode, 0, 0, 1, 0 }, { address_mpx_no_index_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { address_mpx_no_index_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", BND32mode, 0, 0, 1, 0 }, { address_mpx_no_index_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", BND64mode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V1DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V1DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8QImode, 0, 0, 1, 1 }, { general_operand, "", V8QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4HImode, 0, 0, 1, 1 }, { general_operand, "", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SImode, 0, 0, 1, 1 }, { general_operand, "", V2SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V1DImode, 0, 0, 1, 1 }, { general_operand, "", V1DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SFmode, 0, 0, 1, 1 }, { general_operand, "", V2SFmode, 0, 0, 1, 1 }, { register_operand, "", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SFmode, 0, 0, 1, 1 }, { register_operand, "", V2SFmode, 0, 0, 1, 0 }, { register_operand, "", V2SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2SFmode, 0, 0, 1, 1 }, { register_operand, "", V2SFmode, 0, 0, 1, 0 }, { register_operand, "", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SFmode, 0, 0, 1, 1 }, { register_operand, "", V2SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SFmode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { memory_operand, "", V2SFmode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", V2SFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V2SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8QImode, 0, 0, 1, 1 }, { register_operand, "", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4HImode, 0, 0, 1, 1 }, { register_operand, "", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SImode, 0, 0, 1, 1 }, { register_operand, "", V1DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V1DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V1DImode, 0, 0, 1, 1 }, { register_operand, "", V2SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4HImode, 0, 0, 1, 1 }, { register_operand, "", V1DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SImode, 0, 0, 1, 1 }, { register_operand, "", V4HImode, 0, 0, 1, 0 }, { register_operand, "", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4HImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V2SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", V2SImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V2SImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V2SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V4HImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8QImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", V8QImode, 0, 0, 1, 1 }, { register_operand, "", V8QImode, 0, 0, 1, 0 }, { register_operand, "", V8QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V1TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V1TImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { zero_extended_scalar_load_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { zero_extended_scalar_load_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { memory_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { memory_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { memory_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { memory_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { memory_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { memory_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { memory_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { memory_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { memory_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { memory_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { memory_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { absneg_operator, "", V16SFmode, 0, 1, 0, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { absneg_operator, "", V8SFmode, 0, 1, 0, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { absneg_operator, "", V4SFmode, 0, 1, 0, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { absneg_operator, "", V8DFmode, 0, 1, 0, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { absneg_operator, "", V4DFmode, 0, 1, 0, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { absneg_operator, "", V2DFmode, 0, 1, 0, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { vector_move_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { vector_move_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { general_operand, "", V4SFmode, 0, 0, 1, 1 }, { general_operand, "", V4SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { general_operand, "", V4SFmode, 0, 0, 1, 1 }, { general_operand, "", V4SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", TFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", TFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", TFmode, 0, 0, 1, 1 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { const_4_or_8_to_11_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "x", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2SFmode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { memory_operand, "", V4SImode, 0, 0, 1, 1 }, { nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonmemory_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SFmode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { memory_operand, "", V4SFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "x", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "xm", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { vector_move_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { memory_operand, "", V2DFmode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const48_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { memory_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DFmode, 0, 0, 1, 1 }, { memory_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", DFmode, 0, 0, 1, 0 }, { memory_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { memory_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { memory_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { memory_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { vector_move_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { vector_move_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { vector_move_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { general_vector_operand, "", V16SImode, 0, 0, 1, 1 }, { general_vector_operand, "", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { general_vector_operand, "", V8SImode, 0, 0, 1, 1 }, { general_vector_operand, "", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { general_vector_operand, "", V4SImode, 0, 0, 1, 1 }, { general_vector_operand, "", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { general_vector_operand, "", V16SImode, 0, 0, 1, 1 }, { general_vector_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { general_vector_operand, "", V8SImode, 0, 0, 1, 1 }, { general_vector_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { general_vector_operand, "", V4SImode, 0, 0, 1, 1 }, { general_vector_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { const_0_to_255_mul_8_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { const_0_to_255_mul_8_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { const_0_to_255_mul_8_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { const_0_to_255_mul_8_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { 0, "", V64QImode, 0, 0, 1, 0 }, { 0, "", V64QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { 0, "", V32HImode, 0, 0, 1, 0 }, { 0, "", V32HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { 0, "", V16SImode, 0, 0, 1, 0 }, { 0, "", V16SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { 0, "", V8DImode, 0, 0, 1, 0 }, { 0, "", V8DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { 0, "", V64QImode, 0, 0, 1, 0 }, { 0, "", V64QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { 0, "", V32HImode, 0, 0, 1, 0 }, { 0, "", V32HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { 0, "", V16SImode, 0, 0, 1, 0 }, { 0, "", V16SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { 0, "", V8DImode, 0, 0, 1, 0 }, { 0, "", V8DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { 0, "", V64QImode, 0, 0, 1, 0 }, { 0, "", V64QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { 0, "", V32HImode, 0, 0, 1, 0 }, { 0, "", V32HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { 0, "", V16SImode, 0, 0, 1, 0 }, { 0, "", V16SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { 0, "", V8DImode, 0, 0, 1, 0 }, { 0, "", V8DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { 0, "", V64QImode, 0, 0, 1, 0 }, { 0, "", V64QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { 0, "", V32HImode, 0, 0, 1, 0 }, { 0, "", V32HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { 0, "", V16SImode, 0, 0, 1, 0 }, { 0, "", V16SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { 0, "", V8DImode, 0, 0, 1, 0 }, { 0, "", V8DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { 0, "", V32QImode, 0, 0, 1, 0 }, { 0, "", V32QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { 0, "", V32QImode, 0, 0, 1, 0 }, { 0, "", V32QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { 0, "", V32QImode, 0, 0, 1, 0 }, { 0, "", V32QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { 0, "", V32QImode, 0, 0, 1, 0 }, { 0, "", V32QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { 0, "", V16HImode, 0, 0, 1, 0 }, { 0, "", V16HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { 0, "", V16HImode, 0, 0, 1, 0 }, { 0, "", V16HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { 0, "", V16HImode, 0, 0, 1, 0 }, { 0, "", V16HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { 0, "", V16HImode, 0, 0, 1, 0 }, { 0, "", V16HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { 0, "", V8SImode, 0, 0, 1, 0 }, { 0, "", V8SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { 0, "", V8SImode, 0, 0, 1, 0 }, { 0, "", V8SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { 0, "", V8SImode, 0, 0, 1, 0 }, { 0, "", V8SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { 0, "", V8SImode, 0, 0, 1, 0 }, { 0, "", V8SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { 0, "", V4DImode, 0, 0, 1, 0 }, { 0, "", V4DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { 0, "", V4DImode, 0, 0, 1, 0 }, { 0, "", V4DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { 0, "", V4DImode, 0, 0, 1, 0 }, { 0, "", V4DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { 0, "", V4DImode, 0, 0, 1, 0 }, { 0, "", V4DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { 0, "", V16QImode, 0, 0, 1, 0 }, { 0, "", V16QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { 0, "", V8HImode, 0, 0, 1, 0 }, { 0, "", V8HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { 0, "", V4SImode, 0, 0, 1, 0 }, { 0, "", V4SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { 0, "", V2DImode, 0, 0, 1, 0 }, { 0, "", V2DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { 0, "", V16QImode, 0, 0, 1, 0 }, { 0, "", V16QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { 0, "", V8HImode, 0, 0, 1, 0 }, { 0, "", V8HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { 0, "", V4SImode, 0, 0, 1, 0 }, { 0, "", V4SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { 0, "", V2DImode, 0, 0, 1, 0 }, { 0, "", V2DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { 0, "", V16QImode, 0, 0, 1, 0 }, { 0, "", V16QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { 0, "", V8HImode, 0, 0, 1, 0 }, { 0, "", V8HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { 0, "", V4SImode, 0, 0, 1, 0 }, { 0, "", V4SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { 0, "", V2DImode, 0, 0, 1, 0 }, { 0, "", V2DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { 0, "", V2DImode, 0, 0, 1, 0 }, { 0, "", V2DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { general_operand, "", V64QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { general_operand, "", V32HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { general_operand, "", V16SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { general_operand, "", V8DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { general_operand, "", V16SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { general_operand, "", V8DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { general_operand, "", V32QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { general_operand, "", V16HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { general_operand, "", V8SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { general_operand, "", V4DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { general_operand, "", V8SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { general_operand, "", V4DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { general_operand, "", V4SFmode, 0, 0, 1, 1 }, { general_operand, "", V4SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { general_operand, "", V4SFmode, 0, 0, 1, 1 }, { general_operand, "", V4SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", V16QImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", V8HImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", V4SImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { general_operand, "", V4SFmode, 0, 0, 1, 1 }, { general_operand, "", V4SFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { general_operand, "", V2DImode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { general_operand, "", V2DFmode, 0, 0, 1, 1 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { 0, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { 0, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { 0, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { 0, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { 0, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { 0, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { 0, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { 0, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { 0, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { 0, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { 0, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { 0, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { 0, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { 0, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { vector_move_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { vector_move_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { vector_move_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { vector_move_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { vector_move_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { vector_move_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32HImode, 0, 0, 1, 1 }, { vector_move_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { vector_move_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { vector_move_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V16SImode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V8DImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V64QImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V32QImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V16QImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V32HImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V32HImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V8SImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V4DImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonimmediate_or_const_vector_operand, "", V2DImode, 0, 0, 1, 1 }, { nonimmediate_or_const_vector_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { memory_operand, "", V16QImode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { memory_operand, "", V8HImode, 0, 0, 1, 1 }, { const_0_to_7_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", V4SImode, 0, 0, 1, 1 }, { const_0_to_3_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", V2DImode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", VOIDmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { memory_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V4HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4HImode, 0, 0, 1, 1 }, { register_operand, "", V4HImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16HImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { const_0_to_15_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { memory_operand, "", V16QImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_or_constm1_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_or_constm1_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_or_constm1_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { const_2_to_3_operand, "", SImode, 0, 0, 1, 0 }, { register_or_constm1_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { const2367_operand, "", SImode, 0, 0, 1, 0 }, { register_or_constm1_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { const2367_operand, "", SImode, 0, 0, 1, 0 }, { register_or_constm1_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { const2367_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { general_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { general_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { general_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { general_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonmemory_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonmemory_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V8DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { avx_vbroadcast_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { avx_vbroadcast_operand, "", VOIDmode, 0, 1, 0, 0 }, { const_int_operand, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V16SFmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V64QImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { register_operand, "", V16QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V32QImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8SFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DFmode, 0, 0, 1, 1 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V16QImode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8HImode, 0, 0, 1, 1 }, { const_0_to_1_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { memory_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { memory_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { memory_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { memory_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { memory_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { memory_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { memory_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { memory_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { memory_operand, "", V4SFmode, 0, 0, 1, 1 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { memory_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { memory_operand, "", V8SFmode, 0, 0, 1, 1 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { memory_operand, "", V4DFmode, 0, 0, 1, 1 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { memory_operand, "", V4SImode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { memory_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { memory_operand, "", V8SImode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { memory_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V32QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V16HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V32HImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V64QImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 0, 1, 0 }, { register_operand, "", V8HImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { const_0_to_255_operand, "", SImode, 0, 0, 1, 0 }, { vector_move_operand, "", V8HImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V2DImode, 0, 0, 0, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V2DFmode, 0, 0, 0, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V4DImode, 0, 0, 0, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V4DFmode, 0, 0, 0, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V4SFmode, 0, 0, 0, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V8SImode, 0, 0, 0, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V8SFmode, 0, 0, 0, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V2DImode, 0, 0, 0, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V2DFmode, 0, 0, 0, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V4DImode, 0, 0, 0, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V4DFmode, 0, 0, 0, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V4SImode, 0, 0, 0, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V4SFmode, 0, 0, 0, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V8SImode, 0, 0, 0, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { const1248_operand , "", SImode, 0, 0, 1, 0 }, { scratch_operand, "", V8SFmode, 0, 0, 0, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", V16SImode, 0, 0, 1, 0 }, { register_operand, "", V16SFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", HImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8SImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8SFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V4SImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V4SFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { vsib_address_operand, "", VOIDmode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DFmode, 0, 0, 1, 0 }, { const1248_operand, "", SImode, 0, 0, 1, 0 }, { 0, "", VOIDmode, 0, 1, 0, 0 }, { scratch_operand, "", QImode, 0, 0, 0, 0 }, { nonimmediate_operand, "", V16SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V16SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V4SFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V8DFmode, 0, 0, 1, 1 }, { nonimmediate_operand, "", V2DFmode, 0, 0, 1, 1 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { register_operand, "", V8DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V8DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { register_operand, "", V4DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V4DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { register_operand, "", V2DImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", V2DImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { memory_operand, "", QImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", DFmode, 0, 0, 0, 0 }, { memory_operand, "", QImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", QImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", HImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", SImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { nonimmediate_operand, "", DImode, 0, 0, 1, 1 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { scratch_operand, "", DFmode, 0, 0, 0, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { memory_operand, "", QImode, 0, 0, 1, 1 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", QImode, 0, 0, 1, 0 }, { memory_operand, "", QImode, 0, 0, 1, 1 }, { const_int_operand, "", QImode, 0, 0, 1, 0 }, { const_int_operand, "", QImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", HImode, 0, 0, 1, 0 }, { memory_operand, "", HImode, 0, 0, 1, 1 }, { const_int_operand, "", HImode, 0, 0, 1, 0 }, { const_int_operand, "", HImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", SImode, 0, 0, 1, 0 }, { memory_operand, "", SImode, 0, 0, 1, 1 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, { register_operand, "", DImode, 0, 0, 1, 0 }, { memory_operand, "", DImode, 0, 0, 1, 1 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { const_int_operand, "", DImode, 0, 0, 1, 0 }, { const_int_operand, "", SImode, 0, 0, 1, 0 }, }; #if GCC_VERSION >= 2007 __extension__ #endif const struct insn_data_d insn_data[] = { /* :0 */ { "*placeholder_for_nothing", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[0], 0, 0, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1212 */ { "*cmpqi_ccno_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1 }, #else { 0, output_1, 0 }, #endif { 0 }, &operand_data[1], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1212 */ { "*cmphi_ccno_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2 }, #else { 0, output_2, 0 }, #endif { 0 }, &operand_data[3], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1212 */ { "*cmpsi_ccno_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3 }, #else { 0, output_3, 0 }, #endif { 0 }, &operand_data[5], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1212 */ { "*cmpdi_ccno_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4 }, #else { 0, output_4, 0 }, #endif { 0 }, &operand_data[7], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1224 */ { "*cmpqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1224 */ { "*cmphi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[11], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1224 */ { "*cmpsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[13], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1224 */ { "*cmpdi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{q}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[15], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1233 */ { "*cmpqi_minus_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1233 */ { "*cmphi_minus_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[11], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1233 */ { "*cmpsi_minus_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[13], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1233 */ { "*cmpdi_minus_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{q}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[15], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1244 */ { "*cmpqi_ext_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{b}\t{%h1, %0|%0, %h1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[17], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1259 */ { "*cmpqi_ext_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "test{b}\t%h0, %h0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[19], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1284 */ { "*cmpqi_ext_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{b}\t{%1, %h0|%h0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[21], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1300 */ { "*cmpqi_ext_4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cmp{b}\t{%h1, %h0|%h0, %h1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[23], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1423 */ { "*cmpsf_0_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_17 }, #else { 0, 0, output_17 }, #endif { 0 }, &operand_data[25], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1423 */ { "*cmpdf_0_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_18 }, #else { 0, 0, output_18 }, #endif { 0 }, &operand_data[28], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1423 */ { "*cmpxf_0_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_19 }, #else { 0, 0, output_19 }, #endif { 0 }, &operand_data[31], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1436 */ { "*cmpsf_0_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[25], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1436 */ { "*cmpdf_0_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[28], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1436 */ { "*cmpxf_0_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[31], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1456 */ { "*cmpxf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_23 }, #else { 0, 0, output_23 }, #endif { 0 }, &operand_data[34], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1469 */ { "*cmpxf_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[34], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1489 */ { "*cmpsf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_25 }, #else { 0, 0, output_25 }, #endif { 0 }, &operand_data[37], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1489 */ { "*cmpdf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_26 }, #else { 0, 0, output_26 }, #endif { 0 }, &operand_data[40], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1502 */ { "*cmpsf_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[37], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1502 */ { "*cmpdf_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[40], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1522 */ { "*cmpusf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_29 }, #else { 0, 0, output_29 }, #endif { 0 }, &operand_data[43], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1522 */ { "*cmpudf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_30 }, #else { 0, 0, output_30 }, #endif { 0 }, &operand_data[46], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1522 */ { "*cmpuxf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_31 }, #else { 0, 0, output_31 }, #endif { 0 }, &operand_data[34], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1535 */ { "*cmpusf_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[43], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1535 */ { "*cmpudf_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[46], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1535 */ { "*cmpuxf_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[34], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1555 */ { "*cmpsf_hi_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_35 }, #else { 0, 0, output_35 }, #endif { 0 }, &operand_data[49], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1555 */ { "*cmpdf_hi_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_36 }, #else { 0, 0, output_36 }, #endif { 0 }, &operand_data[53], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1555 */ { "*cmpxf_hi_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_37 }, #else { 0, 0, output_37 }, #endif { 0 }, &operand_data[57], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1555 */ { "*cmpsf_si_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_38 }, #else { 0, 0, output_38 }, #endif { 0 }, &operand_data[61], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1555 */ { "*cmpdf_si_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_39 }, #else { 0, 0, output_39 }, #endif { 0 }, &operand_data[65], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1555 */ { "*cmpxf_si_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_40 }, #else { 0, 0, output_40 }, #endif { 0 }, &operand_data[69], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "*cmpsf_hi_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[49], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "*cmpdf_hi_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[53], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "*cmpxf_hi_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[57], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "*cmpsf_si_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[61], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "*cmpdf_si_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[65], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "*cmpxf_si_cc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[69], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1601 */ { "x86_fnstsw_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fnstsw\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_x86_fnstsw_1 }, &operand_data[25], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1613 */ { "x86_sahf_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_48 }, #else { 0, 0, output_48 }, #endif { (insn_gen_fn::stored_funcptr) gen_x86_sahf_1 }, &operand_data[73], 1, 1, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1639 */ { "*cmpisf_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_49 }, #else { 0, 0, output_49 }, #endif { 0 }, &operand_data[74], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1639 */ { "*cmpidf_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_50 }, #else { 0, 0, output_50 }, #endif { 0 }, &operand_data[76], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1639 */ { "*cmpiusf_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_51 }, #else { 0, 0, output_51 }, #endif { 0 }, &operand_data[74], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1639 */ { "*cmpiudf_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_52 }, #else { 0, 0, output_52 }, #endif { 0 }, &operand_data[76], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1666 */ { "*cmpisf_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_53 }, #else { 0, 0, output_53 }, #endif { 0 }, &operand_data[78], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1666 */ { "*cmpidf_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_54 }, #else { 0, 0, output_54 }, #endif { 0 }, &operand_data[80], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1666 */ { "*cmpiusf_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_55 }, #else { 0, 0, output_55 }, #endif { 0 }, &operand_data[78], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1666 */ { "*cmpiudf_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_56 }, #else { 0, 0, output_56 }, #endif { 0 }, &operand_data[80], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1687 */ { "*cmpisf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_57 }, #else { 0, 0, output_57 }, #endif { 0 }, &operand_data[44], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1687 */ { "*cmpidf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_58 }, #else { 0, 0, output_58 }, #endif { 0 }, &operand_data[47], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1687 */ { "*cmpixf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_59 }, #else { 0, 0, output_59 }, #endif { 0 }, &operand_data[35], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1687 */ { "*cmpiusf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_60 }, #else { 0, 0, output_60 }, #endif { 0 }, &operand_data[44], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1687 */ { "*cmpiudf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_61 }, #else { 0, 0, output_61 }, #endif { 0 }, &operand_data[47], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1687 */ { "*cmpiuxf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_62 }, #else { 0, 0, output_62 }, #endif { 0 }, &operand_data[35], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1704 */ { "*pushdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[82], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1786 */ { "*pushsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "push{l}\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[84], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1807 */ { "*pushqi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "push{l}\t%k1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[86], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1807 */ { "*pushhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "push{l}\t%k1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[88], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1815 */ { "*pushsi2_prologue", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "push{l}\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[90], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1815 */ { "*pushdi2_prologue", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "push{q}\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[92], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1824 */ { "*popsi1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pop{l}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[94], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1824 */ { "*popdi1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pop{q}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[96], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1832 */ { "*popsi1_epilogue", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pop{l}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[94], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1832 */ { "*popdi1_epilogue", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pop{q}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[96], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1841 */ { "*pushflsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pushf{l}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[98], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1841 */ { "*pushfldi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pushf{q}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[100], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1849 */ { "*popflsi1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "popf{l}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[102], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1849 */ { "*popfldi1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "popf{q}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[104], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1940 */ { "*movsi_xor", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{l}\t%k0, %k0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[106], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1950 */ { "*movsi_or", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[108], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1961 */ { "*movxi_internal_avx512f", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_79 }, #else { 0, 0, output_79 }, #endif { 0 }, &operand_data[110], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1985 */ { "*movoi_internal_avx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_80 }, #else { 0, 0, output_80 }, #endif { 0 }, &operand_data[112], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2034 */ { "*movti_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_81 }, #else { 0, 0, output_81 }, #endif { 0 }, &operand_data[114], 2, 2, 0, 5, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2108 */ { "*movdi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_82 }, #else { 0, 0, output_82 }, #endif { 0 }, &operand_data[116], 2, 2, 0, 25, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2282 */ { "*movsi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_83 }, #else { 0, 0, output_83 }, #endif { 0 }, &operand_data[118], 2, 2, 0, 15, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2411 */ { "kmovw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_84 }, #else { 0, output_84, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_kmovw }, &operand_data[120], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2425 */ { "*movhi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_85 }, #else { 0, 0, output_85 }, #endif { 0 }, &operand_data[122], 2, 2, 0, 7, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2498 */ { "*movqi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_86 }, #else { 0, 0, output_86 }, #endif { 0 }, &operand_data[124], 2, 2, 0, 12, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2583 */ { "*movabsqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_87 }, #else { 0, output_87, 0 }, #endif { 0 }, &operand_data[126], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2583 */ { "*movabshi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_88 }, #else { 0, output_88, 0 }, #endif { 0 }, &operand_data[128], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2583 */ { "*movabssi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_89 }, #else { 0, output_89, 0 }, #endif { 0 }, &operand_data[130], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2583 */ { "*movabsdi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_90 }, #else { 0, output_90, 0 }, #endif { 0 }, &operand_data[132], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2597 */ { "*movabsqi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_91 }, #else { 0, output_91, 0 }, #endif { 0 }, &operand_data[134], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2597 */ { "*movabshi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_92 }, #else { 0, output_92, 0 }, #endif { 0 }, &operand_data[136], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2597 */ { "*movabssi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_93 }, #else { 0, output_93, 0 }, #endif { 0 }, &operand_data[138], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2597 */ { "*movabsdi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_94 }, #else { 0, output_94, 0 }, #endif { 0 }, &operand_data[140], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2611 */ { "*swapsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xchg{l}\t%1, %0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[142], 2, 2, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2625 */ { "*swapqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xchg{l}\t%k1, %k0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[144], 2, 2, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2625 */ { "*swaphi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xchg{l}\t%k1, %k0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[146], 2, 2, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2641 */ { "*swapqi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xchg{b}\t%1, %0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[148], 2, 2, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2641 */ { "*swaphi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xchg{w}\t%1, %0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[146], 2, 2, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2668 */ { "*movstrictqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[150], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2668 */ { "*movstricthi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[152], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2678 */ { "*movstrictqi_xor", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{b}\t%0, %0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[154], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2678 */ { "*movstricthi_xor", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{w}\t%0, %0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[156], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2688 */ { "*movhi_extv_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movs{bl|x}\t{%h1, %k0|%k0, %h1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[158], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2688 */ { "*movsi_extv_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movs{bl|x}\t{%h1, %k0|%k0, %h1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[160], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2698 */ { "*movqi_extv_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_106 }, #else { 0, 0, output_106 }, #endif { 0 }, &operand_data[162], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2725 */ { "*movsi_extzv_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movz{bl|x}\t{%h1, %k0|%k0, %h1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[160], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2735 */ { "*movqi_extzv_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_108 }, #else { 0, 0, output_108 }, #endif { 0 }, &operand_data[162], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2763 */ { "movsi_insv_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_109 }, #else { 0, 0, output_109 }, #endif { (insn_gen_fn::stored_funcptr) gen_movsi_insv_1 }, &operand_data[164], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2778 */ { "*movqi_insv_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{b}\t{%h1, %h0|%h0, %h1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[166], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2791 */ { "*pushtf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_111 }, #else { 0, 0, output_111 }, #endif { 0 }, &operand_data[168], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2816 */ { "*pushxf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_112 }, #else { 0, 0, output_112 }, #endif { 0 }, &operand_data[170], 2, 2, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2851 */ { "*pushdf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_113 }, #else { 0, 0, output_113 }, #endif { 0 }, &operand_data[172], 2, 2, 0, 6, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2897 */ { "*pushsf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_114 }, #else { 0, 0, output_114 }, #endif { 0 }, &operand_data[174], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2966 */ { "*movtf_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_115 }, #else { 0, 0, output_115 }, #endif { 0 }, &operand_data[176], 2, 2, 0, 5, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3035 */ { "*movxf_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_116 }, #else { 0, 0, output_116 }, #endif { 0 }, &operand_data[178], 2, 2, 0, 9, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3089 */ { "*movdf_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_117 }, #else { 0, 0, output_117 }, #endif { 0 }, &operand_data[180], 2, 2, 0, 22, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3272 */ { "*movsf_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_118 }, #else { 0, 0, output_118 }, #endif { 0 }, &operand_data[182], 2, 2, 0, 16, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3465 */ { "swapxf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_119 }, #else { 0, 0, output_119 }, #endif { (insn_gen_fn::stored_funcptr) gen_swapxf }, &operand_data[184], 2, 2, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3480 */ { "*swapsf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_120 }, #else { 0, 0, output_120 }, #endif { 0 }, &operand_data[186], 2, 2, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3480 */ { "*swapdf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_121 }, #else { 0, 0, output_121 }, #endif { 0 }, &operand_data[188], 2, 2, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3501 */ { "*zero_extendsidi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_122 }, #else { 0, 0, output_122 }, #endif { 0 }, &operand_data[190], 2, 2, 0, 11, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3630 */ { "zero_extendqisi2_and", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_zero_extendqisi2_and }, &operand_data[192], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3630 */ { "zero_extendhisi2_and", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_zero_extendhisi2_and }, &operand_data[194], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3656 */ { "*zero_extendqisi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movz{bl|x}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[196], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3656 */ { "*zero_extendhisi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movz{wl|x}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[198], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3678 */ { "zero_extendqihi2_and", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_zero_extendqihi2_and }, &operand_data[200], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3704 */ { "*zero_extendqihi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movz{bl|x}\t{%1, %k0|%k0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[202], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3738 */ { "extendsidi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_extendsidi2_1 }, &operand_data[204], 2, 3, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3854 */ { "extendhisi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_130 }, #else { 0, 0, output_130 }, #endif { (insn_gen_fn::stored_funcptr) gen_extendhisi2 }, &operand_data[207], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3908 */ { "extendqisi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movs{bl|x}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_extendqisi2 }, &operand_data[196], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3925 */ { "extendqihi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_132 }, #else { 0, 0, output_132 }, #endif { (insn_gen_fn::stored_funcptr) gen_extendqihi2 }, &operand_data[209], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4050 */ { "*extendsfdf2_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_133 }, #else { 0, 0, output_133 }, #endif { 0 }, &operand_data[211], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4073 */ { "*extendsfdf2_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtss2sd\t{%1, %d0|%d0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[213], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4082 */ { "*extendsfdf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_135 }, #else { 0, 0, output_135 }, #endif { 0 }, &operand_data[215], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4110 */ { "*extendsfxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_136 }, #else { 0, 0, output_136 }, #endif { 0 }, &operand_data[217], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4110 */ { "*extenddfxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_137 }, #else { 0, 0, output_137 }, #endif { 0 }, &operand_data[219], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4208 */ { "*truncdfsf_fast_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_138 }, #else { 0, 0, output_138 }, #endif { 0 }, &operand_data[221], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4230 */ { "*truncdfsf_fast_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtsd2ss\t{%1, %d0|%d0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[223], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4240 */ { "*truncdfsf_fast_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_140 }, #else { 0, 0, output_140 }, #endif { 0 }, &operand_data[225], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4249 */ { "*truncdfsf_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_141 }, #else { 0, 0, output_141 }, #endif { 0 }, &operand_data[227], 3, 3, 0, 5, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4273 */ { "*truncdfsf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_142 }, #else { 0, 0, output_142 }, #endif { 0 }, &operand_data[230], 3, 3, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4293 */ { "*truncdfsf2_i387_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_143 }, #else { 0, 0, output_143 }, #endif { 0 }, &operand_data[233], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4335 */ { "*truncxfsf2_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_144 }, #else { 0, 0, output_144 }, #endif { 0 }, &operand_data[235], 3, 3, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4349 */ { "*truncxfdf2_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_145 }, #else { 0, 0, output_145 }, #endif { 0 }, &operand_data[238], 3, 3, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4364 */ { "truncxfsf2_i387_noop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_146 }, #else { 0, 0, output_146 }, #endif { (insn_gen_fn::stored_funcptr) gen_truncxfsf2_i387_noop }, &operand_data[241], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4364 */ { "truncxfdf2_i387_noop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_147 }, #else { 0, 0, output_147 }, #endif { (insn_gen_fn::stored_funcptr) gen_truncxfdf2_i387_noop }, &operand_data[243], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4373 */ { "*truncxfsf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_148 }, #else { 0, 0, output_148 }, #endif { 0 }, &operand_data[245], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4373 */ { "*truncxfdf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_149 }, #else { 0, 0, output_149 }, #endif { 0 }, &operand_data[247], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4515 */ { "*fixuns_truncsf_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[249], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4515 */ { "*fixuns_truncdf_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[254], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4545 */ { "fix_truncsfsi_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvttss2si\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncsfsi_sse }, &operand_data[259], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4545 */ { "fix_truncdfsi_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvttsd2si\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncdfsi_sse }, &operand_data[261], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4574 */ { "fix_trunchi_fisttp_i387_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_trunchi_fisttp_i387_1 }, &operand_data[263], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4574 */ { "fix_truncsi_fisttp_i387_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncsi_fisttp_i387_1 }, &operand_data[265], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4574 */ { "fix_truncdi_fisttp_i387_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncdi_fisttp_i387_1 }, &operand_data[267], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4601 */ { "fix_trunchi_i387_fisttp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_157 }, #else { 0, 0, output_157 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_trunchi_i387_fisttp }, &operand_data[269], 2, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4601 */ { "fix_truncsi_i387_fisttp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_158 }, #else { 0, 0, output_158 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncsi_i387_fisttp }, &operand_data[272], 2, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4601 */ { "fix_truncdi_i387_fisttp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_159 }, #else { 0, 0, output_159 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncdi_i387_fisttp }, &operand_data[275], 2, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4614 */ { "fix_trunchi_i387_fisttp_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_trunchi_i387_fisttp_with_temp }, &operand_data[278], 3, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4614 */ { "fix_truncsi_i387_fisttp_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncsi_i387_fisttp_with_temp }, &operand_data[282], 3, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4614 */ { "fix_truncdi_i387_fisttp_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncdi_i387_fisttp_with_temp }, &operand_data[286], 3, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4652 */ { "*fix_trunchi_i387_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[263], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4652 */ { "*fix_truncsi_i387_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[265], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4652 */ { "*fix_truncdi_i387_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[267], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4685 */ { "fix_truncdi_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_166 }, #else { 0, 0, output_166 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncdi_i387 }, &operand_data[290], 4, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4699 */ { "fix_truncdi_i387_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncdi_i387_with_temp }, &operand_data[295], 5, 6, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4741 */ { "fix_trunchi_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_168 }, #else { 0, 0, output_168 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_trunchi_i387 }, &operand_data[301], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4741 */ { "fix_truncsi_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_169 }, #else { 0, 0, output_169 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncsi_i387 }, &operand_data[305], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4754 */ { "fix_trunchi_i387_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_trunchi_i387_with_temp }, &operand_data[309], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4754 */ { "fix_truncsi_i387_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncsi_i387_with_temp }, &operand_data[314], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4791 */ { "x86_fnstcw_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fnstcw\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_x86_fnstcw_1 }, &operand_data[269], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4802 */ { "x86_fldcw_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fldcw\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_x86_fldcw_1 }, &operand_data[51], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4821 */ { "floathisf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fild%Z1\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floathisf2 }, &operand_data[319], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4821 */ { "floathidf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fild%Z1\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floathidf2 }, &operand_data[321], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4821 */ { "floathixf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fild%Z1\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floathixf2 }, &operand_data[323], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4832 */ { "floatsixf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fild%Z1\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatsixf2 }, &operand_data[325], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4832 */ { "floatdixf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fild%Z1\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatdixf2 }, &operand_data[327], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4866 */ { "*floatsisf2_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_179 }, #else { 0, output_179, 0 }, #endif { 0 }, &operand_data[329], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4866 */ { "*floatsidf2_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_180 }, #else { 0, output_180, 0 }, #endif { 0 }, &operand_data[331], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4901 */ { "*floatsisf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fild%Z1\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[333], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4901 */ { "*floatsidf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fild%Z1\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[335], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4901 */ { "*floatdisf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fild%Z1\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[337], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4901 */ { "*floatdidf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fild%Z1\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[339], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5017 */ { "floatdisf2_i387_with_xmm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatdisf2_i387_with_xmm }, &operand_data[341], 3, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5017 */ { "floatdidf2_i387_with_xmm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatdidf2_i387_with_xmm }, &operand_data[346], 3, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5017 */ { "floatdixf2_i387_with_xmm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatdixf2_i387_with_xmm }, &operand_data[351], 3, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5086 */ { "*floatunssisf2_i387_with_xmm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[356], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5086 */ { "*floatunssidf2_i387_with_xmm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[360], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5086 */ { "*floatunssixf2_i387_with_xmm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[364], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5147 */ { "*leasi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_191 }, #else { 0, 0, output_191 }, #endif { 0 }, &operand_data[368], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5202 */ { "*adddi3_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[370], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5202 */ { "*addti3_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[373], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5225 */ { "*addsi3_cc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[376], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5225 */ { "*adddi3_cc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[379], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5238 */ { "addqi3_cc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addqi3_cc }, &operand_data[382], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5251 */ { "*addsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_197 }, #else { 0, 0, output_197 }, #endif { 0 }, &operand_data[385], 3, 3, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5251 */ { "*adddi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_198 }, #else { 0, 0, output_198 }, #endif { 0 }, &operand_data[388], 3, 3, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5355 */ { "*addhi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_199 }, #else { 0, 0, output_199 }, #endif { 0 }, &operand_data[391], 3, 3, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5405 */ { "*addqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_200 }, #else { 0, 0, output_200 }, #endif { 0 }, &operand_data[394], 3, 3, 0, 6, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5463 */ { "*addqi_1_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_201 }, #else { 0, 0, output_201 }, #endif { 0 }, &operand_data[397], 2, 2, 1, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5562 */ { "*addqi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_202 }, #else { 0, 0, output_202 }, #endif { 0 }, &operand_data[399], 3, 3, 2, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5562 */ { "*addhi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_203 }, #else { 0, 0, output_203 }, #endif { 0 }, &operand_data[402], 3, 3, 2, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5562 */ { "*addsi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_204 }, #else { 0, 0, output_204 }, #endif { 0 }, &operand_data[405], 3, 3, 2, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5562 */ { "*adddi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_205 }, #else { 0, 0, output_205 }, #endif { 0 }, &operand_data[408], 3, 3, 2, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5651 */ { "*addqi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_206 }, #else { 0, 0, output_206 }, #endif { 0 }, &operand_data[411], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5651 */ { "*addhi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_207 }, #else { 0, 0, output_207 }, #endif { 0 }, &operand_data[414], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5651 */ { "*addsi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_208 }, #else { 0, 0, output_208 }, #endif { 0 }, &operand_data[417], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5651 */ { "*adddi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_209 }, #else { 0, 0, output_209 }, #endif { 0 }, &operand_data[420], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5788 */ { "*addqi_4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_210 }, #else { 0, 0, output_210 }, #endif { 0 }, &operand_data[423], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5788 */ { "*addhi_4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_211 }, #else { 0, 0, output_211 }, #endif { 0 }, &operand_data[426], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5788 */ { "*addsi_4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_212 }, #else { 0, 0, output_212 }, #endif { 0 }, &operand_data[429], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5825 */ { "*addqi_5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_213 }, #else { 0, 0, output_213 }, #endif { 0 }, &operand_data[411], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5825 */ { "*addhi_5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_214 }, #else { 0, 0, output_214 }, #endif { 0 }, &operand_data[414], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5825 */ { "*addsi_5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_215 }, #else { 0, 0, output_215 }, #endif { 0 }, &operand_data[417], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5825 */ { "*adddi_5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_216 }, #else { 0, 0, output_216 }, #endif { 0 }, &operand_data[420], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5869 */ { "addqi_ext_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_217 }, #else { 0, 0, output_217 }, #endif { (insn_gen_fn::stored_funcptr) gen_addqi_ext_1 }, &operand_data[432], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5905 */ { "*addqi_ext_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{b}\t{%h2, %h0|%h0, %h2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[435], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5950 */ { "*addvqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[438], 3, 3, 4, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5950 */ { "*addvhi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[441], 3, 3, 4, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5950 */ { "*addvsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[444], 3, 3, 4, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5950 */ { "*addvdi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[447], 3, 3, 4, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5967 */ { "*addvqi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[450], 4, 4, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5967 */ { "*addvhi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[454], 4, 4, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5967 */ { "*addvsi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[458], 4, 4, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5967 */ { "*addvdi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[462], 4, 4, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5995 */ { "*lea_general_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[466], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6027 */ { "*lea_general_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[470], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6057 */ { "*lea_general_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[474], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6092 */ { "*lea_general_4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[479], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6092 */ { "*lea_general_4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[479], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6143 */ { "*subdi3_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[483], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6143 */ { "*subti3_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[486], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6165 */ { "*subqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[489], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6165 */ { "*subhi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[492], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6165 */ { "*subsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[495], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6165 */ { "*subdi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[498], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6187 */ { "*subqi_1_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[397], 2, 2, 1, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6198 */ { "*subqi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[489], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6198 */ { "*subhi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[492], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6198 */ { "*subsi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[495], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6198 */ { "*subdi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[498], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6255 */ { "*subvqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[501], 3, 3, 4, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6255 */ { "*subvhi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[504], 3, 3, 4, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6255 */ { "*subvsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[507], 3, 3, 4, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6255 */ { "*subvdi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[510], 3, 3, 4, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6272 */ { "*subvqi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[450], 4, 4, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6272 */ { "*subvhi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[454], 4, 4, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6272 */ { "*subvsi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[458], 4, 4, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6272 */ { "*subvdi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[462], 4, 4, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6297 */ { "*subqi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[489], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6297 */ { "*subhi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[492], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6297 */ { "*subsi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[495], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6297 */ { "*subdi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[498], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6337 */ { "*addqi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "adc{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[513], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6337 */ { "*subqi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sbb{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[517], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6337 */ { "*addhi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "adc{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[521], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6337 */ { "*subhi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sbb{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[525], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6337 */ { "*addsi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "adc{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[529], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6337 */ { "*subsi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sbb{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[533], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6337 */ { "*adddi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "adc{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[537], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6337 */ { "*subdi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sbb{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[541], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6384 */ { "adcxsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "adcx\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_adcxsi3 }, &operand_data[545], 5, 5, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6384 */ { "adcxdi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "adcx\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_adcxdi3 }, &operand_data[550], 5, 5, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6407 */ { "*addqi3_cconly_overflow", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[555], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6407 */ { "*addhi3_cconly_overflow", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[558], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6407 */ { "*addsi3_cconly_overflow", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[561], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6420 */ { "*addqi3_cc_overflow", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[382], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6420 */ { "*addhi3_cc_overflow", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[521], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6420 */ { "*addsi3_cc_overflow", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[376], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6420 */ { "*adddi3_cc_overflow", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[379], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6492 */ { "*mulsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_272 }, #else { 0, output_272, 0 }, #endif { 0 }, &operand_data[564], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6563 */ { "*mulhi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_273 }, #else { 0, output_273, 0 }, #endif { 0 }, &operand_data[567], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6593 */ { "*mulqi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mul{b}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[570], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6636 */ { "*mulvsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_275 }, #else { 0, output_275, 0 }, #endif { 0 }, &operand_data[573], 3, 3, 4, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6671 */ { "*mulvqi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_276 }, #else { 0, output_276, 0 }, #endif { 0 }, &operand_data[576], 4, 4, 3, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6671 */ { "*mulvhi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_277 }, #else { 0, output_277, 0 }, #endif { 0 }, &operand_data[580], 4, 4, 3, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6671 */ { "*mulvsi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_278 }, #else { 0, output_278, 0 }, #endif { 0 }, &operand_data[584], 4, 4, 3, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6733 */ { "*umulvsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mul{l}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[588], 3, 4, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6778 */ { "*mulvqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "imul{b}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[570], 3, 3, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6778 */ { "*umulvqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mul{b}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[570], 3, 3, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6839 */ { "*bmi2_umulsidi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mulx\t{%3, %0, %1|%1, %0, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[592], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6857 */ { "*umulsidi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_283 }, #else { 0, output_283, 0 }, #endif { 0 }, &operand_data[596], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6908 */ { "*mulsidi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "imul{l}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[599], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6928 */ { "*mulqihi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "imul{b}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[602], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6928 */ { "*umulqihi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mul{b}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[602], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6989 */ { "*smulsi3_highpart_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "imul{l}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[605], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6989 */ { "*umulsi3_highpart_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mul{l}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[605], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7118 */ { "divmodsi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divmodsi4_1 }, &operand_data[609], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7153 */ { "*divmodhi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[613], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7153 */ { "*divmodsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[609], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7188 */ { "*divmodhi4_noext", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "idiv{w}\t%3", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[617], 5, 5, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7188 */ { "*divmodsi4_noext", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "idiv{l}\t%3", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[622], 5, 5, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7244 */ { "divmodhiqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "idiv{b}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divmodhiqi3 }, &operand_data[627], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7291 */ { "udivmodsi4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_udivmodsi4_1 }, &operand_data[609], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7313 */ { "*udivmodhi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[613], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7313 */ { "*udivmodsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[609], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7336 */ { "*udivmodsi4_pow2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[630], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7360 */ { "*udivmodhi4_noext", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "div{w}\t%3", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[617], 5, 5, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7360 */ { "*udivmodsi4_noext", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "div{l}\t%3", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[622], 5, 5, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7411 */ { "udivmodhiqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "div{b}\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_udivmodhiqi3 }, &operand_data[627], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7494 */ { "*testqi_1_maybe_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_302 }, #else { 0, 0, output_302 }, #endif { 0 }, &operand_data[634], 2, 2, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7519 */ { "*testqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "test{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[636], 2, 2, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7519 */ { "*testhi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "test{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[638], 2, 2, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7519 */ { "*testsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "test{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[640], 2, 2, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7545 */ { "*testqi_ext_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "test{b}\t{%1, %h0|%h0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[642], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7563 */ { "*testqi_ext_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "test{b}\t{%1, %h0|%h0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[644], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7580 */ { "*testqi_ext_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "test{b}\t{%h1, %h0|%h0, %h1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[23], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7599 */ { "*testqi_ext_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[646], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7599 */ { "*testqi_ext_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[649], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*kandqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_311 }, #else { 0, 0, output_311 }, #endif { 0 }, &operand_data[652], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*korqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_312 }, #else { 0, 0, output_312 }, #endif { 0 }, &operand_data[652], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*kxorqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_313 }, #else { 0, 0, output_313 }, #endif { 0 }, &operand_data[652], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*kandhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_314 }, #else { 0, 0, output_314 }, #endif { 0 }, &operand_data[655], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*korhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_315 }, #else { 0, 0, output_315 }, #endif { 0 }, &operand_data[655], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*kxorhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_316 }, #else { 0, 0, output_316 }, #endif { 0 }, &operand_data[655], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*kandsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_317 }, #else { 0, 0, output_317 }, #endif { 0 }, &operand_data[658], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*korsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_318 }, #else { 0, 0, output_318 }, #endif { 0 }, &operand_data[658], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*kxorsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_319 }, #else { 0, 0, output_319 }, #endif { 0 }, &operand_data[658], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*kanddi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_320 }, #else { 0, 0, output_320 }, #endif { 0 }, &operand_data[661], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*kordi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_321 }, #else { 0, 0, output_321 }, #endif { 0 }, &operand_data[661], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7733 */ { "*kxordi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_322 }, #else { 0, 0, output_322 }, #endif { 0 }, &operand_data[661], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7833 */ { "*andsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_323 }, #else { 0, 0, output_323 }, #endif { 0 }, &operand_data[664], 3, 3, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7876 */ { "*andhi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_324 }, #else { 0, 0, output_324 }, #endif { 0 }, &operand_data[667], 3, 3, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7907 */ { "*andqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_325 }, #else { 0, 0, output_325 }, #endif { 0 }, &operand_data[670], 3, 3, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7931 */ { "*andqi_1_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "and{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[673], 2, 2, 1, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7942 */ { "kandnqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_327 }, #else { 0, 0, output_327 }, #endif { (insn_gen_fn::stored_funcptr) gen_kandnqi }, &operand_data[675], 3, 3, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7942 */ { "kandnhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_328 }, #else { 0, 0, output_328 }, #endif { (insn_gen_fn::stored_funcptr) gen_kandnhi }, &operand_data[678], 3, 3, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8111 */ { "*andqi_2_maybe_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_329 }, #else { 0, 0, output_329 }, #endif { 0 }, &operand_data[681], 3, 3, 2, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8135 */ { "*andqi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "and{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[684], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8135 */ { "*andhi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "and{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[687], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8135 */ { "*andsi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "and{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[690], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8164 */ { "*andqi_2_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "and{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[693], 2, 2, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8182 */ { "andqi_ext_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "and{b}\t{%2, %h0|%h0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andqi_ext_0 }, &operand_data[695], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8202 */ { "*andqi_ext_0_cc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "and{b}\t{%2, %h0|%h0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[695], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8228 */ { "*andqi_ext_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "and{b}\t{%2, %h0|%h0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[698], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8247 */ { "*andqi_ext_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "and{b}\t{%h2, %h0|%h0, %h2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[435], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8328 */ { "*iorsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_338 }, #else { 0, output_338, 0 }, #endif { 0 }, &operand_data[701], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8328 */ { "*xorsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_339 }, #else { 0, output_339, 0 }, #endif { 0 }, &operand_data[701], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8328 */ { "*iordi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_340 }, #else { 0, output_340, 0 }, #endif { 0 }, &operand_data[704], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8328 */ { "*xordi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_341 }, #else { 0, output_341, 0 }, #endif { 0 }, &operand_data[704], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8342 */ { "*iorhi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_342 }, #else { 0, output_342, 0 }, #endif { 0 }, &operand_data[707], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8342 */ { "*xorhi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_343 }, #else { 0, output_343, 0 }, #endif { 0 }, &operand_data[707], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8357 */ { "*iorqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_344 }, #else { 0, output_344, 0 }, #endif { 0 }, &operand_data[710], 3, 3, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8357 */ { "*xorqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_345 }, #else { 0, output_345, 0 }, #endif { 0 }, &operand_data[710], 3, 3, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8394 */ { "*iorqi_1_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[713], 2, 2, 1, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8394 */ { "*xorqi_1_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[713], 2, 2, 1, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8405 */ { "*iorqi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[684], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8405 */ { "*xorqi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[684], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8405 */ { "*iorhi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[687], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8405 */ { "*xorhi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[687], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8405 */ { "*iorsi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[690], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8405 */ { "*xorsi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[690], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8405 */ { "*iordi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[715], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8405 */ { "*xordi_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[715], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8419 */ { "kxnorqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_356 }, #else { 0, 0, output_356 }, #endif { (insn_gen_fn::stored_funcptr) gen_kxnorqi }, &operand_data[718], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8419 */ { "kxnorhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_357 }, #else { 0, 0, output_357 }, #endif { (insn_gen_fn::stored_funcptr) gen_kxnorhi }, &operand_data[721], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8436 */ { "kxnorsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_358 }, #else { 0, output_358, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_kxnorsi }, &operand_data[724], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8436 */ { "kxnordi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_359 }, #else { 0, output_359, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_kxnordi }, &operand_data[727], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8468 */ { "kortestzhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "kortestw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_kortestzhi }, &operand_data[730], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8481 */ { "kortestchi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "kortestw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_kortestchi }, &operand_data[730], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8494 */ { "kunpckhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "kunpckbw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_kunpckhi }, &operand_data[732], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8507 */ { "kunpcksi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "kunpckwd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_kunpcksi }, &operand_data[735], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8518 */ { "kunpckdi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "kunpckdq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_kunpckdi }, &operand_data[738], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8558 */ { "*iorqi_2_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[741], 2, 2, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8558 */ { "*xorqi_2_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[741], 2, 2, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8572 */ { "*iorqi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[555], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8572 */ { "*xorqi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[555], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8572 */ { "*iorhi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[558], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8572 */ { "*xorhi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[558], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8572 */ { "*iorsi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[561], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8572 */ { "*xorsi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[561], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8572 */ { "*iordi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[743], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8572 */ { "*xordi_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[743], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8585 */ { "*iorqi_ext_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{b}\t{%2, %h0|%h0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[695], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8585 */ { "*xorqi_ext_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{b}\t{%2, %h0|%h0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[695], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8603 */ { "*iorqi_ext_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{b}\t{%2, %h0|%h0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[698], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8603 */ { "*xorqi_ext_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{b}\t{%2, %h0|%h0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[698], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8622 */ { "*iorqi_ext_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "or{b}\t{%h2, %h0|%h0, %h2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[746], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8622 */ { "*xorqi_ext_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{b}\t{%h2, %h0|%h0, %h2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[746], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8705 */ { "*xorqi_cc_ext_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{b}\t{%2, %h0|%h0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[432], 3, 3, 2, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8739 */ { "*negdi2_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[749], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8739 */ { "*negti2_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[751], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8762 */ { "*negqi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{b}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[450], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8762 */ { "*neghi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{w}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[454], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8762 */ { "*negsi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{l}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[458], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8762 */ { "*negdi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{q}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[462], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8788 */ { "*negqi2_cmpz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{b}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[450], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8788 */ { "*neghi2_cmpz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{w}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[454], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8788 */ { "*negsi2_cmpz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{l}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[458], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8788 */ { "*negdi2_cmpz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{q}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[462], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8836 */ { "*negvqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{b}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[753], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8836 */ { "*negvhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{w}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[756], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8836 */ { "*negvsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{l}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[759], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8836 */ { "*negvdi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "neg{q}\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[762], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8856 */ { "*absnegsf2_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[765], 4, 4, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8856 */ { "*absnegdf2_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[769], 4, 4, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8865 */ { "*absnegsf2_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[773], 4, 4, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8865 */ { "*absnegdf2_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[777], 4, 4, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8874 */ { "*absnegsf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[781], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8874 */ { "*absnegdf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[785], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8874 */ { "*absnegxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[789], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8889 */ { "*absnegtf2_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[793], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9023 */ { "*abssf2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fabs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[797], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9023 */ { "*negsf2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fchs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[797], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9023 */ { "*absdf2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fabs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[799], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9023 */ { "*negdf2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fchs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[799], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9023 */ { "*absxf2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fabs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[801], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9023 */ { "*negxf2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fchs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[801], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9033 */ { "*absextendsfdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fabs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[803], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9033 */ { "*negextendsfdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fchs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[803], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9042 */ { "*absextendsfxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fabs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[805], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9042 */ { "*negextendsfxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fchs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[805], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9051 */ { "*absextenddfxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fabs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[807], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9051 */ { "*negextenddfxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fchs", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[807], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9073 */ { "copysignsf3_const", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysignsf3_const }, &operand_data[809], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9073 */ { "copysigndf3_const", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysigndf3_const }, &operand_data[813], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9073 */ { "copysigntf3_const", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysigntf3_const }, &operand_data[817], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9087 */ { "copysignsf3_var", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysignsf3_var }, &operand_data[821], 6, 6, 0, 5, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9087 */ { "copysigndf3_var", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysigndf3_var }, &operand_data[827], 6, 6, 0, 5, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9087 */ { "copysigntf3_var", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysigntf3_var }, &operand_data[833], 6, 6, 0, 5, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9123 */ { "*one_cmplsi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_422 }, #else { 0, output_422, 0 }, #endif { 0 }, &operand_data[839], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9123 */ { "*one_cmpldi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_423 }, #else { 0, output_423, 0 }, #endif { 0 }, &operand_data[841], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9135 */ { "*one_cmplhi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_424 }, #else { 0, output_424, 0 }, #endif { 0 }, &operand_data[843], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9148 */ { "*one_cmplqi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_425 }, #else { 0, 0, output_425 }, #endif { 0 }, &operand_data[845], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9182 */ { "*one_cmplqi2_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[450], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9182 */ { "*one_cmplhi2_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[454], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9182 */ { "*one_cmplsi2_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[458], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9182 */ { "*one_cmpldi2_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[462], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9266 */ { "*ashldi3_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[847], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9316 */ { "x86_shld", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "shld{l}\t{%s2%1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_x86_shld }, &operand_data[850], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9379 */ { "*ashlsi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_432 }, #else { 0, 0, output_432 }, #endif { 0 }, &operand_data[853], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9379 */ { "*ashldi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_433 }, #else { 0, 0, output_433 }, #endif { 0 }, &operand_data[857], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9397 */ { "*bmi2_ashlsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "shlx\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9406 */ { "*ashlsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_435 }, #else { 0, 0, output_435 }, #endif { 0 }, &operand_data[864], 3, 3, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9406 */ { "*ashldi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_436 }, #else { 0, 0, output_436 }, #endif { 0 }, &operand_data[867], 3, 3, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9536 */ { "*ashlhi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_437 }, #else { 0, 0, output_437 }, #endif { 0 }, &operand_data[870], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9581 */ { "*ashlqi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_438 }, #else { 0, 0, output_438 }, #endif { 0 }, &operand_data[873], 3, 3, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9638 */ { "*ashlqi3_1_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_439 }, #else { 0, 0, output_439 }, #endif { 0 }, &operand_data[876], 2, 2, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9729 */ { "*ashlqi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_440 }, #else { 0, 0, output_440 }, #endif { 0 }, &operand_data[878], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9729 */ { "*ashlhi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_441 }, #else { 0, 0, output_441 }, #endif { 0 }, &operand_data[881], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9729 */ { "*ashlsi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_442 }, #else { 0, 0, output_442 }, #endif { 0 }, &operand_data[884], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9729 */ { "*ashldi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_443 }, #else { 0, 0, output_443 }, #endif { 0 }, &operand_data[887], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9825 */ { "*ashlqi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_444 }, #else { 0, 0, output_444 }, #endif { 0 }, &operand_data[890], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9825 */ { "*ashlhi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_445 }, #else { 0, 0, output_445 }, #endif { 0 }, &operand_data[893], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9825 */ { "*ashlsi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_446 }, #else { 0, 0, output_446 }, #endif { 0 }, &operand_data[896], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9825 */ { "*ashldi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_447 }, #else { 0, 0, output_447 }, #endif { 0 }, &operand_data[899], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9881 */ { "*lshrsi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_448 }, #else { 0, 0, output_448 }, #endif { 0 }, &operand_data[853], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9881 */ { "*ashrsi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_449 }, #else { 0, 0, output_449 }, #endif { 0 }, &operand_data[853], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9881 */ { "*lshrdi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_450 }, #else { 0, 0, output_450 }, #endif { 0 }, &operand_data[857], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9881 */ { "*ashrdi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_451 }, #else { 0, 0, output_451 }, #endif { 0 }, &operand_data[857], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9899 */ { "*lshrdi3_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[902], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9899 */ { "*ashrdi3_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[902], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9943 */ { "x86_shrd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "shrd{l}\t{%s2%1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_x86_shrd }, &operand_data[850], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9977 */ { "ashrsi3_cvt", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_455 }, #else { 0, output_455, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrsi3_cvt }, &operand_data[905], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10041 */ { "*bmi2_lshrsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "shrx\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10041 */ { "*bmi2_ashrsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sarx\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10050 */ { "*lshrsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_458 }, #else { 0, 0, output_458 }, #endif { 0 }, &operand_data[908], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10050 */ { "*ashrsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_459 }, #else { 0, 0, output_459 }, #endif { 0 }, &operand_data[908], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10050 */ { "*lshrdi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_460 }, #else { 0, 0, output_460 }, #endif { 0 }, &operand_data[911], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10050 */ { "*ashrdi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_461 }, #else { 0, 0, output_461 }, #endif { 0 }, &operand_data[911], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10147 */ { "*lshrqi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_462 }, #else { 0, 0, output_462 }, #endif { 0 }, &operand_data[914], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10147 */ { "*ashrqi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_463 }, #else { 0, 0, output_463 }, #endif { 0 }, &operand_data[914], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10147 */ { "*lshrhi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_464 }, #else { 0, 0, output_464 }, #endif { 0 }, &operand_data[917], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10147 */ { "*ashrhi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_465 }, #else { 0, 0, output_465 }, #endif { 0 }, &operand_data[917], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10171 */ { "*lshrqi3_1_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_466 }, #else { 0, 0, output_466 }, #endif { 0 }, &operand_data[876], 2, 2, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10171 */ { "*ashrqi3_1_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_467 }, #else { 0, 0, output_467 }, #endif { 0 }, &operand_data[876], 2, 2, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10200 */ { "*lshrqi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_468 }, #else { 0, 0, output_468 }, #endif { 0 }, &operand_data[878], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10200 */ { "*ashrqi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_469 }, #else { 0, 0, output_469 }, #endif { 0 }, &operand_data[878], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10200 */ { "*lshrhi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_470 }, #else { 0, 0, output_470 }, #endif { 0 }, &operand_data[881], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10200 */ { "*ashrhi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_471 }, #else { 0, 0, output_471 }, #endif { 0 }, &operand_data[881], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10200 */ { "*lshrsi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_472 }, #else { 0, 0, output_472 }, #endif { 0 }, &operand_data[884], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10200 */ { "*ashrsi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_473 }, #else { 0, 0, output_473 }, #endif { 0 }, &operand_data[884], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10200 */ { "*lshrdi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_474 }, #else { 0, 0, output_474 }, #endif { 0 }, &operand_data[887], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10200 */ { "*ashrdi3_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_475 }, #else { 0, 0, output_475 }, #endif { 0 }, &operand_data[887], 3, 3, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10264 */ { "*lshrqi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_476 }, #else { 0, 0, output_476 }, #endif { 0 }, &operand_data[890], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10264 */ { "*ashrqi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_477 }, #else { 0, 0, output_477 }, #endif { 0 }, &operand_data[890], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10264 */ { "*lshrhi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_478 }, #else { 0, 0, output_478 }, #endif { 0 }, &operand_data[893], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10264 */ { "*ashrhi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_479 }, #else { 0, 0, output_479 }, #endif { 0 }, &operand_data[893], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10264 */ { "*lshrsi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_480 }, #else { 0, 0, output_480 }, #endif { 0 }, &operand_data[896], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10264 */ { "*ashrsi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_481 }, #else { 0, 0, output_481 }, #endif { 0 }, &operand_data[896], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10264 */ { "*lshrdi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_482 }, #else { 0, 0, output_482 }, #endif { 0 }, &operand_data[899], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10264 */ { "*ashrdi3_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_483 }, #else { 0, 0, output_483 }, #endif { 0 }, &operand_data[899], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10336 */ { "*rotlsi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_484 }, #else { 0, 0, output_484 }, #endif { 0 }, &operand_data[853], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10336 */ { "*rotrsi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_485 }, #else { 0, 0, output_485 }, #endif { 0 }, &operand_data[853], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10336 */ { "*rotldi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_486 }, #else { 0, 0, output_486 }, #endif { 0 }, &operand_data[857], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10336 */ { "*rotrdi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_487 }, #else { 0, 0, output_487 }, #endif { 0 }, &operand_data[857], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10357 */ { "ix86_rotldi3_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ix86_rotldi3_doubleword }, &operand_data[920], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10385 */ { "ix86_rotrdi3_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ix86_rotrdi3_doubleword }, &operand_data[920], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10413 */ { "*bmi2_rorxsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "rorx\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[924], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10422 */ { "*rotlsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_491 }, #else { 0, 0, output_491 }, #endif { 0 }, &operand_data[927], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10422 */ { "*rotrsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_492 }, #else { 0, 0, output_492 }, #endif { 0 }, &operand_data[927], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10422 */ { "*rotldi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_493 }, #else { 0, 0, output_493 }, #endif { 0 }, &operand_data[930], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10422 */ { "*rotrdi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_494 }, #else { 0, 0, output_494 }, #endif { 0 }, &operand_data[930], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10546 */ { "*rotlqi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_495 }, #else { 0, 0, output_495 }, #endif { 0 }, &operand_data[914], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10546 */ { "*rotrqi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_496 }, #else { 0, 0, output_496 }, #endif { 0 }, &operand_data[914], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10546 */ { "*rotlhi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_497 }, #else { 0, 0, output_497 }, #endif { 0 }, &operand_data[917], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10546 */ { "*rotrhi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_498 }, #else { 0, 0, output_498 }, #endif { 0 }, &operand_data[917], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10569 */ { "*rotlqi3_1_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_499 }, #else { 0, 0, output_499 }, #endif { 0 }, &operand_data[876], 2, 2, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10569 */ { "*rotrqi3_1_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_500 }, #else { 0, 0, output_500 }, #endif { 0 }, &operand_data[876], 2, 2, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10817 */ { "*btsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bt{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[933], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10817 */ { "*btdi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bt{q}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[935], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10850 */ { "*setcc_si_1_and", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[937], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10867 */ { "*setcc_si_1_movzbl", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[937], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10882 */ { "*setcc_qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "set%C1\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[939], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10891 */ { "*setcc_qi_slp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "set%C1\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[941], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10971 */ { "setcc_sf_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_507 }, #else { 0, output_507, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_setcc_sf_sse }, &operand_data[943], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10971 */ { "setcc_df_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_508 }, #else { 0, output_508, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_setcc_df_sse }, &operand_data[947], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10989 */ { "*jcc_1_bnd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bnd %+j%C1\t%l0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[951], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11007 */ { "*jcc_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%+j%C1\t%l0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[951], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11025 */ { "*jcc_2_bnd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bnd %+j%c1\t%l0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[951], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11043 */ { "*jcc_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%+j%c1\t%l0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[951], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11113 */ { "*jcc_btsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[953], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11113 */ { "*jcc_btdi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[957], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11147 */ { "*jcc_btsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[961], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11147 */ { "*jcc_btdi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[965], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11180 */ { "*jcc_btsi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[969], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11180 */ { "*jcc_btdi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[974], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11214 */ { "*jcc_btsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[953], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11247 */ { "*jcc_btsi_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[969], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11283 */ { "*jccsf_0_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[979], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11283 */ { "*jccdf_0_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[984], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11283 */ { "*jccxf_0_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[989], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11296 */ { "*jccsf_0_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[979], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11296 */ { "*jccdf_0_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[984], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11296 */ { "*jccxf_0_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[989], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11309 */ { "*jccxf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[994], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11322 */ { "*jccxf_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[994], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11335 */ { "*jccsf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[999], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11335 */ { "*jccdf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1004], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11348 */ { "*jccsf_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[999], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11348 */ { "*jccdf_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1004], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11361 */ { "*jccusf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1009], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11361 */ { "*jccudf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1014], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11361 */ { "*jccuxf_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1019], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11374 */ { "*jccusf_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1009], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11374 */ { "*jccudf_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1014], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11374 */ { "*jccuxf_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1019], 4, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11429 */ { "*jccsf_hi_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1024], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11429 */ { "*jccdf_hi_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1030], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11429 */ { "*jccxf_hi_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1036], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11429 */ { "*jccsf_si_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1042], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11429 */ { "*jccdf_si_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1048], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11429 */ { "*jccxf_si_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1054], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11446 */ { "*jccsf_hi_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1024], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11446 */ { "*jccdf_hi_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1030], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11446 */ { "*jccxf_hi_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1036], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11446 */ { "*jccsf_si_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1042], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11446 */ { "*jccdf_si_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1048], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11446 */ { "*jccxf_si_r_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1054], 5, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11487 */ { "jump_bnd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bnd jmp\t%l0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_jump_bnd }, &operand_data[783], 1, 1, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11502 */ { "jump", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "jmp\t%l0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_jump }, &operand_data[783], 1, 1, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11525 */ { "*indirect_jump", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%!jmp\t%A0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1060], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11525 */ { "*indirect_jump", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%!jmp\t%A0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1061], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11573 */ { "*tablejump_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%!jmp\t%A0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1062], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11573 */ { "*tablejump_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%!jmp\t%A0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1064], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11703 */ { "*call", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_557 }, #else { 0, 0, output_557 }, #endif { 0 }, &operand_data[1066], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11703 */ { "*call", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_558 }, #else { 0, 0, output_558 }, #endif { 0 }, &operand_data[1068], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11710 */ { "*sibcall", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_559 }, #else { 0, 0, output_559 }, #endif { 0 }, &operand_data[1070], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11710 */ { "*sibcall", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_560 }, #else { 0, 0, output_560 }, #endif { 0 }, &operand_data[1072], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11717 */ { "*sibcall_memory", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_561 }, #else { 0, 0, output_561 }, #endif { 0 }, &operand_data[1074], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11717 */ { "*sibcall_memory", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_562 }, #else { 0, 0, output_562 }, #endif { 0 }, &operand_data[1076], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11762 */ { "*call_pop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_563 }, #else { 0, 0, output_563 }, #endif { 0 }, &operand_data[1078], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11772 */ { "*sibcall_pop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_564 }, #else { 0, 0, output_564 }, #endif { 0 }, &operand_data[1081], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11782 */ { "*sibcall_pop_memory", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_565 }, #else { 0, 0, output_565 }, #endif { 0 }, &operand_data[1084], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11864 */ { "*call_value", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_566 }, #else { 0, 0, output_566 }, #endif { 0 }, &operand_data[1065], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11864 */ { "*call_value", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_567 }, #else { 0, 0, output_567 }, #endif { 0 }, &operand_data[1067], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11872 */ { "*sibcall_value", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_568 }, #else { 0, 0, output_568 }, #endif { 0 }, &operand_data[1069], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11872 */ { "*sibcall_value", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_569 }, #else { 0, 0, output_569 }, #endif { 0 }, &operand_data[1071], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11880 */ { "*sibcall_value_memory", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_570 }, #else { 0, 0, output_570 }, #endif { 0 }, &operand_data[1073], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11880 */ { "*sibcall_value_memory", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_571 }, #else { 0, 0, output_571 }, #endif { 0 }, &operand_data[1075], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11931 */ { "*call_value_pop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_572 }, #else { 0, 0, output_572 }, #endif { 0 }, &operand_data[1077], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11942 */ { "*sibcall_value_pop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_573 }, #else { 0, 0, output_573 }, #endif { 0 }, &operand_data[1087], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11953 */ { "*sibcall_value_pop_memory", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_574 }, #else { 0, 0, output_574 }, #endif { 0 }, &operand_data[1091], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12055 */ { "blockage", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_blockage }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12072 */ { "*memory_blockage", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1095], 1, 1, 1, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12081 */ { "prologue_use", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_prologue_use }, &operand_data[783], 1, 1, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12119 */ { "simple_return_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%!ret", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_simple_return_internal }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12131 */ { "simple_return_internal_long", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_579 }, #else { 0, 0, output_579 }, #endif { (insn_gen_fn::stored_funcptr) gen_simple_return_internal_long }, &operand_data[0], 0, 0, 0, 0, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12147 */ { "simple_return_pop_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%!ret\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_simple_return_pop_internal }, &operand_data[109], 1, 1, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12157 */ { "simple_return_indirect_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%!jmp\t%A0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_simple_return_indirect_internal }, &operand_data[851], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12165 */ { "nop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "nop", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_nop }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12174 */ { "nops", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_583 }, #else { 0, 0, output_583 }, #endif { (insn_gen_fn::stored_funcptr) gen_nops }, &operand_data[1096], 1, 1, 0, 0, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12196 */ { "pad", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_584 }, #else { 0, 0, output_584 }, #endif { (insn_gen_fn::stored_funcptr) gen_pad }, &operand_data[783], 1, 1, 0, 0, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12217 */ { "set_got", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_585 }, #else { 0, 0, output_585 }, #endif { (insn_gen_fn::stored_funcptr) gen_set_got }, &operand_data[106], 1, 1, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12226 */ { "set_got_labelled", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_586 }, #else { 0, 0, output_586 }, #endif { (insn_gen_fn::stored_funcptr) gen_set_got_labelled }, &operand_data[1097], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12254 */ { "set_got_offset_rex64", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movabs{q}\t{$_GLOBAL_OFFSET_TABLE_-%l1, %0|%0, OFFSET FLAT:_GLOBAL_OFFSET_TABLE_-%l1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_set_got_offset_rex64 }, &operand_data[1099], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12295 */ { "eh_return_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_eh_return_internal }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12303 */ { "leave", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "leave", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_leave }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12331 */ { "split_stack_return", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_590 }, #else { 0, 0, output_590 }, #endif { (insn_gen_fn::stored_funcptr) gen_split_stack_return }, &operand_data[109], 1, 1, 0, 0, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12409 */ { "ffssi2_no_cmove", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ffssi2_no_cmove }, &operand_data[1101], 2, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12438 */ { "*tzcntsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "tzcnt{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12452 */ { "*bsfsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bsf{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12475 */ { "*ctzsi2_falsedep_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12475 */ { "*ctzdi2_falsedep_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1104], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12494 */ { "*ctzsi2_falsedep", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_596 }, #else { 0, 0, output_596 }, #endif { 0 }, &operand_data[1106], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12516 */ { "*ctzhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_597 }, #else { 0, 0, output_597 }, #endif { 0 }, &operand_data[1109], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12516 */ { "*ctzsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_598 }, #else { 0, 0, output_598 }, #endif { 0 }, &operand_data[861], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12571 */ { "*clzsi2_lzcnt_falsedep_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12571 */ { "*clzdi2_lzcnt_falsedep_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1104], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12590 */ { "*clzsi2_lzcnt_falsedep", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lzcnt{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1106], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12603 */ { "*clzhi2_lzcnt", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lzcnt{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1109], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12603 */ { "*clzsi2_lzcnt", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lzcnt{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12614 */ { "*bmi_andn_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "andn\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1111], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12627 */ { "bmi_bextr_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bextr\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bmi_bextr_si }, &operand_data[1114], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12639 */ { "*bmi_blsi_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "blsi\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12652 */ { "*bmi_blsmsk_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "blsmsk\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12666 */ { "*bmi_blsr_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "blsr\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12695 */ { "*bmi2_bzhi_si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bzhi\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1117], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12712 */ { "*bmi2_bzhi_si3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bzhi\t{%k2, %1, %0|%0, %1, %k2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1121], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12727 */ { "bmi2_pdep_si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pdep\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bmi2_pdep_si3 }, &operand_data[1125], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12738 */ { "bmi2_pext_si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pext\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bmi2_pext_si3 }, &operand_data[1125], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12750 */ { "tbm_bextri_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_613 }, #else { 0, 0, output_613 }, #endif { (insn_gen_fn::stored_funcptr) gen_tbm_bextri_si }, &operand_data[1128], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12765 */ { "*tbm_blcfill_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "blcfill\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12778 */ { "*tbm_blci_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "blci\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12792 */ { "*tbm_blcic_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "blcic\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12806 */ { "*tbm_blcmsk_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "blcmsk\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12819 */ { "*tbm_blcs_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "blcs\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12832 */ { "*tbm_blsfill_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "blsfill\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12845 */ { "*tbm_blsic_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "blsic\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12859 */ { "*tbm_t1mskc_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "t1mskc\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12873 */ { "*tbm_tzmsk_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "tzmsk\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12898 */ { "bsr", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bsr{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bsr }, &operand_data[861], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12909 */ { "*bsrhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bsr{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1109], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12928 */ { "*popcountsi2_falsedep_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[861], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12928 */ { "*popcountdi2_falsedep_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1104], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12947 */ { "*popcountsi2_falsedep", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_627 }, #else { 0, 0, output_627 }, #endif { 0 }, &operand_data[1106], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12966 */ { "*popcounthi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_628 }, #else { 0, 0, output_628 }, #endif { 0 }, &operand_data[1109], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12966 */ { "*popcountsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_629 }, #else { 0, 0, output_629 }, #endif { 0 }, &operand_data[861], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13013 */ { "*bswapsi2_movbe", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_630 }, #else { 0, output_630, 0 }, #endif { 0 }, &operand_data[1132], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13028 */ { "*bswapsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bswap\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[631], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13037 */ { "*bswaphi_lowpart_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_632 }, #else { 0, output_632, 0 }, #endif { 0 }, &operand_data[1134], 1, 1, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13048 */ { "bswaphi_lowpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "rol{w}\t{$8, %0|%0, 8}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bswaphi_lowpart }, &operand_data[156], 1, 1, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13104 */ { "paritydi2_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_paritydi2_cmp }, &operand_data[1135], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13135 */ { "paritysi2_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_paritysi2_cmp }, &operand_data[1139], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13159 */ { "*parityhi2_cmp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xor{b}\t{%h0, %b0|%b0, %h0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1142], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13175 */ { "*tls_global_dynamic_32_gnu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_637 }, #else { 0, 0, output_637 }, #endif { 0 }, &operand_data[1144], 4, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13271 */ { "*tls_local_dynamic_base_32_gnu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_638 }, #else { 0, 0, output_638 }, #endif { 0 }, &operand_data[1150], 3, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13362 */ { "*tls_local_dynamic_32_once", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1155], 4, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13391 */ { "*load_tp_x32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{l}\t{%%fs:0, %0|%0, DWORD PTR fs:0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[106], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13402 */ { "*load_tp_x32_zext", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{l}\t{%%fs:0, %k0|%k0, DWORD PTR fs:0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[550], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13413 */ { "*load_tp_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{l}\t{%%gs:0, %0|%0, DWORD PTR gs:0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[106], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13413 */ { "*load_tp_di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{q}\t{%%fs:0, %0|%0, QWORD PTR fs:0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[550], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13424 */ { "*add_tp_x32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{l}\t{%%fs:0, %0|%0, DWORD PTR fs:0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[631], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13437 */ { "*add_tp_x32_zext", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{l}\t{%%fs:0, %k0|%k0, DWORD PTR fs:0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1161], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13451 */ { "*add_tp_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{l}\t{%%gs:0, %0|%0, DWORD PTR gs:0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[631], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13451 */ { "*add_tp_di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "add{q}\t{%%fs:0, %0|%0, QWORD PTR fs:0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[902], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13500 */ { "*tls_dynamic_gnu2_lea_32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lea{l}\t{%E2@TLSDESC(%1), %0|%0, %E2@TLSDESC[%1]}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1163], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13513 */ { "*tls_dynamic_gnu2_call_32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "call\t{*%a1@TLSCALL(%2)|[DWORD PTR [%2+%a1@TLSCALL]]}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1166], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13528 */ { "*tls_dynamic_gnu2_combine_32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1170], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13619 */ { "*fop_sf_comm_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_651 }, #else { 0, 0, output_651 }, #endif { 0 }, &operand_data[1175], 4, 4, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13619 */ { "*fop_df_comm_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_652 }, #else { 0, 0, output_652 }, #endif { 0 }, &operand_data[1179], 4, 4, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13640 */ { "*fop_sf_comm_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_653 }, #else { 0, 0, output_653 }, #endif { 0 }, &operand_data[1183], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13640 */ { "*fop_df_comm_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_654 }, #else { 0, 0, output_654 }, #endif { 0 }, &operand_data[1187], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13657 */ { "*fop_sf_comm_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_655 }, #else { 0, 0, output_655 }, #endif { 0 }, &operand_data[1191], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13657 */ { "*fop_df_comm_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_656 }, #else { 0, 0, output_656 }, #endif { 0 }, &operand_data[1195], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13672 */ { "*fop_sf_1_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_657 }, #else { 0, 0, output_657 }, #endif { 0 }, &operand_data[1199], 4, 4, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13672 */ { "*fop_df_1_mixed", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_658 }, #else { 0, 0, output_658 }, #endif { 0 }, &operand_data[1203], 4, 4, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13700 */ { "*rcpsf2_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vrcpss\t{%1, %d0|%d0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1207], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13712 */ { "*fop_sf_1_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_660 }, #else { 0, 0, output_660 }, #endif { 0 }, &operand_data[1209], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13712 */ { "*fop_df_1_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_661 }, #else { 0, 0, output_661 }, #endif { 0 }, &operand_data[1213], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13732 */ { "*fop_sf_1_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_662 }, #else { 0, 0, output_662 }, #endif { 0 }, &operand_data[1217], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13732 */ { "*fop_df_1_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_663 }, #else { 0, 0, output_663 }, #endif { 0 }, &operand_data[1221], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13752 */ { "*fop_sf_2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_664 }, #else { 0, 0, output_664 }, #endif { 0 }, &operand_data[1225], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13752 */ { "*fop_df_2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_665 }, #else { 0, 0, output_665 }, #endif { 0 }, &operand_data[1229], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13752 */ { "*fop_sf_2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_666 }, #else { 0, 0, output_666 }, #endif { 0 }, &operand_data[1233], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13752 */ { "*fop_df_2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_667 }, #else { 0, 0, output_667 }, #endif { 0 }, &operand_data[1237], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13773 */ { "*fop_sf_3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_668 }, #else { 0, 0, output_668 }, #endif { 0 }, &operand_data[1241], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13773 */ { "*fop_df_3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_669 }, #else { 0, 0, output_669 }, #endif { 0 }, &operand_data[1245], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13773 */ { "*fop_sf_3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_670 }, #else { 0, 0, output_670 }, #endif { 0 }, &operand_data[1249], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13773 */ { "*fop_df_3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_671 }, #else { 0, 0, output_671 }, #endif { 0 }, &operand_data[1253], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13794 */ { "*fop_df_4_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_672 }, #else { 0, 0, output_672 }, #endif { 0 }, &operand_data[1257], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13813 */ { "*fop_df_5_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_673 }, #else { 0, 0, output_673 }, #endif { 0 }, &operand_data[1261], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13831 */ { "*fop_df_6_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_674 }, #else { 0, 0, output_674 }, #endif { 0 }, &operand_data[1265], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13850 */ { "*fop_xf_comm_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_675 }, #else { 0, 0, output_675 }, #endif { 0 }, &operand_data[1269], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13864 */ { "*fop_xf_1_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_676 }, #else { 0, 0, output_676 }, #endif { 0 }, &operand_data[1273], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13881 */ { "*fop_xf_2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_677 }, #else { 0, 0, output_677 }, #endif { 0 }, &operand_data[1277], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13881 */ { "*fop_xf_2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_678 }, #else { 0, 0, output_678 }, #endif { 0 }, &operand_data[1281], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13900 */ { "*fop_xf_3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_679 }, #else { 0, 0, output_679 }, #endif { 0 }, &operand_data[1285], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13900 */ { "*fop_xf_3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_680 }, #else { 0, 0, output_680 }, #endif { 0 }, &operand_data[1289], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13919 */ { "*fop_xf_4_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_681 }, #else { 0, 0, output_681 }, #endif { 0 }, &operand_data[1293], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13919 */ { "*fop_xf_4_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_682 }, #else { 0, 0, output_682 }, #endif { 0 }, &operand_data[1297], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13936 */ { "*fop_xf_5_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_683 }, #else { 0, 0, output_683 }, #endif { 0 }, &operand_data[1301], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13936 */ { "*fop_xf_5_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_684 }, #else { 0, 0, output_684 }, #endif { 0 }, &operand_data[1305], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13953 */ { "*fop_xf_6_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_685 }, #else { 0, 0, output_685 }, #endif { 0 }, &operand_data[1309], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13953 */ { "*fop_xf_6_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_686 }, #else { 0, 0, output_686 }, #endif { 0 }, &operand_data[1313], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13976 */ { "truncxfsf2_i387_noop_unspec", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_687 }, #else { 0, 0, output_687 }, #endif { (insn_gen_fn::stored_funcptr) gen_truncxfsf2_i387_noop_unspec }, &operand_data[241], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13976 */ { "truncxfdf2_i387_noop_unspec", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_688 }, #else { 0, 0, output_688 }, #endif { (insn_gen_fn::stored_funcptr) gen_truncxfdf2_i387_noop_unspec }, &operand_data[243], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13985 */ { "sqrtxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fsqrt", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrtxf2 }, &operand_data[801], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13996 */ { "sqrt_extendsfxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fsqrt", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrt_extendsfxf2_i387 }, &operand_data[805], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13996 */ { "sqrt_extenddfxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fsqrt", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrt_extenddfxf2_i387 }, &operand_data[807], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14009 */ { "*rsqrtsf2_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vrsqrtss\t{%1, %d0|%d0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1207], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14031 */ { "*sqrtsf2_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtss\t{%1, %d0|%d0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1207], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14031 */ { "*sqrtdf2_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtsd\t{%1, %d0|%d0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1317], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14075 */ { "fpremxf4_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fprem", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fpremxf4_i387 }, &operand_data[1319], 4, 4, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14149 */ { "fprem1xf4_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fprem1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fprem1xf4_i387 }, &operand_data[1319], 4, 4, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14232 */ { "*sinxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fsin", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[801], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14232 */ { "*cosxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fcos", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[801], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14242 */ { "*sin_extendsfxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fsin", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[805], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14242 */ { "*cos_extendsfxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fcos", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[805], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14242 */ { "*sin_extenddfxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fsin", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[807], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14242 */ { "*cos_extenddfxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fcos", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[807], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14261 */ { "sincosxf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fsincos", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sincosxf3 }, &operand_data[1319], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14293 */ { "sincos_extendsfxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fsincos", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sincos_extendsfxf3_i387 }, &operand_data[1323], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14293 */ { "sincos_extenddfxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fsincos", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sincos_extenddfxf3_i387 }, &operand_data[1326], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14350 */ { "fptanxf4_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fptan", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fptanxf4_i387 }, &operand_data[1329], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14363 */ { "fptan_extendsfxf4_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fptan", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fptan_extendsfxf4_i387 }, &operand_data[1333], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14363 */ { "fptan_extenddfxf4_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fptan", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fptan_extenddfxf4_i387 }, &operand_data[1337], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14411 */ { "*fpatanxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fpatan", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1341], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14423 */ { "fpatan_extendsfxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fpatan", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fpatan_extendsfxf3_i387 }, &operand_data[1345], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14423 */ { "fpatan_extenddfxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fpatan", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fpatan_extenddfxf3_i387 }, &operand_data[1349], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14583 */ { "fyl2xxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fyl2x", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fyl2xxf3_i387 }, &operand_data[1341], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14595 */ { "fyl2x_extendsfxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fyl2x", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fyl2x_extendsfxf3_i387 }, &operand_data[1353], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14595 */ { "fyl2x_extenddfxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fyl2x", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fyl2x_extenddfxf3_i387 }, &operand_data[1357], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14700 */ { "fyl2xp1xf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fyl2xp1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fyl2xp1xf3_i387 }, &operand_data[1341], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14712 */ { "fyl2xp1_extendsfxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fyl2xp1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fyl2xp1_extendsfxf3_i387 }, &operand_data[1353], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14712 */ { "fyl2xp1_extenddfxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fyl2xp1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fyl2xp1_extenddfxf3_i387 }, &operand_data[1357], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14762 */ { "fxtractxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fxtract", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fxtractxf3_i387 }, &operand_data[1319], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14774 */ { "fxtract_extendsfxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fxtract", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fxtract_extendsfxf3_i387 }, &operand_data[1323], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14774 */ { "fxtract_extenddfxf3_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fxtract", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fxtract_extenddfxf3_i387 }, &operand_data[1326], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14855 */ { "*f2xm1xf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "f2xm1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[801], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14865 */ { "fscalexf4_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fscale", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fscalexf4_i387 }, &operand_data[1319], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15200 */ { "sse4_1_roundsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vroundss\t{%2, %1, %d0|%d0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_roundsf2 }, &operand_data[1361], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15200 */ { "sse4_1_rounddf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vroundsd\t{%2, %1, %d0|%d0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_rounddf2 }, &operand_data[1364], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15212 */ { "rintxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "frndint", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rintxf2 }, &operand_data[801], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15290 */ { "*fistdi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1367], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15313 */ { "fistdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_727 }, #else { 0, 0, output_727 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistdi2 }, &operand_data[1369], 2, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15323 */ { "fistdi2_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistdi2_with_temp }, &operand_data[1372], 3, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15355 */ { "*fisthi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1376], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15355 */ { "*fistsi2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1378], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15373 */ { "fisthi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_731 }, #else { 0, 0, output_731 }, #endif { (insn_gen_fn::stored_funcptr) gen_fisthi2 }, &operand_data[1380], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15373 */ { "fistsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_732 }, #else { 0, 0, output_732 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistsi2 }, &operand_data[1382], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15382 */ { "fisthi2_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fisthi2_with_temp }, &operand_data[1384], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15382 */ { "fistsi2_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistsi2_with_temp }, &operand_data[1387], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15478 */ { "frndintxf2_floor", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_frndintxf2_floor }, &operand_data[1390], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15478 */ { "frndintxf2_ceil", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_frndintxf2_ceil }, &operand_data[1390], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15478 */ { "frndintxf2_trunc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_frndintxf2_trunc }, &operand_data[1390], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15503 */ { "frndintxf2_floor_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fldcw\t%3\n\tfrndint\n\tfldcw\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_frndintxf2_floor_i387 }, &operand_data[1392], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15503 */ { "frndintxf2_ceil_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fldcw\t%3\n\tfrndint\n\tfldcw\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_frndintxf2_ceil_i387 }, &operand_data[1392], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15503 */ { "frndintxf2_trunc_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fldcw\t%3\n\tfrndint\n\tfldcw\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_frndintxf2_trunc_i387 }, &operand_data[1392], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15586 */ { "frndintxf2_mask_pm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_frndintxf2_mask_pm }, &operand_data[1390], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15611 */ { "frndintxf2_mask_pm_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fldcw\t%3\n\tfrndint\n\tfclex\n\tfldcw\t%2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_frndintxf2_mask_pm_i387 }, &operand_data[1392], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "*fisthi2_floor_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1396], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "*fisthi2_ceil_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1396], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "*fistsi2_floor_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1398], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "*fistsi2_ceil_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1398], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "*fistdi2_floor_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1367], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "*fistdi2_ceil_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1367], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15683 */ { "fistdi2_floor", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_749 }, #else { 0, 0, output_749 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistdi2_floor }, &operand_data[1400], 4, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15683 */ { "fistdi2_ceil", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_750 }, #else { 0, 0, output_750 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistdi2_ceil }, &operand_data[1400], 4, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15697 */ { "fistdi2_floor_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistdi2_floor_with_temp }, &operand_data[1405], 5, 6, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15697 */ { "fistdi2_ceil_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistdi2_ceil_with_temp }, &operand_data[1405], 5, 6, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15743 */ { "fisthi2_floor", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_753 }, #else { 0, 0, output_753 }, #endif { (insn_gen_fn::stored_funcptr) gen_fisthi2_floor }, &operand_data[1411], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15743 */ { "fisthi2_ceil", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_754 }, #else { 0, 0, output_754 }, #endif { (insn_gen_fn::stored_funcptr) gen_fisthi2_ceil }, &operand_data[1411], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15743 */ { "fistsi2_floor", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_755 }, #else { 0, 0, output_755 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistsi2_floor }, &operand_data[1415], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15743 */ { "fistsi2_ceil", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_756 }, #else { 0, 0, output_756 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistsi2_ceil }, &operand_data[1415], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15756 */ { "fisthi2_floor_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fisthi2_floor_with_temp }, &operand_data[1419], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15756 */ { "fisthi2_ceil_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fisthi2_ceil_with_temp }, &operand_data[1419], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15756 */ { "fistsi2_floor_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistsi2_floor_with_temp }, &operand_data[1424], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15756 */ { "fistsi2_ceil_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fistsi2_ceil_with_temp }, &operand_data[1424], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15827 */ { "fxamsf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fxam\n\tfnstsw\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fxamsf2_i387 }, &operand_data[25], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15827 */ { "fxamdf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fxam\n\tfnstsw\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fxamdf2_i387 }, &operand_data[28], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15827 */ { "fxamxf2_i387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fxam\n\tfnstsw\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fxamxf2_i387 }, &operand_data[31], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15839 */ { "fxamsf2_i387_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fxamsf2_i387_with_temp }, &operand_data[1429], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15839 */ { "fxamdf2_i387_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fxamdf2_i387_with_temp }, &operand_data[1431], 2, 2, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15935 */ { "movmsk_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovmskpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmsk_df }, &operand_data[1433], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15986 */ { "cld", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cld", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cld }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16074 */ { "*strmovsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^movs{l|d}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1435], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16074 */ { "*strmovsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^movs{l|d}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1439], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16089 */ { "*strmovhi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^movsw", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1435], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16089 */ { "*strmovhi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^movsw", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1439], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16104 */ { "*strmovqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^movsb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1435], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16104 */ { "*strmovqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^movsb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1439], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16156 */ { "*rep_movsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^rep{%;} movs{l|d}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1443], 6, 6, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16156 */ { "*rep_movsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^rep{%;} movs{l|d}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1449], 6, 6, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16175 */ { "*rep_movqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^rep{%;} movsb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1443], 6, 6, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16175 */ { "*rep_movqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^rep{%;} movsb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1449], 6, 6, 4, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16266 */ { "*strsetsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^stos{l|d}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1455], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16266 */ { "*strsetsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^stos{l|d}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1458], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16279 */ { "*strsethi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^stosw", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1461], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16279 */ { "*strsethi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^stosw", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1464], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16292 */ { "*strsetqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^stosb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1467], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16292 */ { "*strsetqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^stosb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1470], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16338 */ { "*rep_stossi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^rep{%;} stos{l|d}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1473], 5, 5, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16338 */ { "*rep_stossi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^rep{%;} stos{l|d}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1478], 5, 5, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16355 */ { "*rep_stosqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^rep{%;} stosb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1483], 5, 5, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16355 */ { "*rep_stosqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^rep{%;} stosb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1488], 5, 5, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16476 */ { "*cmpstrnqi_nz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^repz{%;} cmpsb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1493], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16476 */ { "*cmpstrnqi_nz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^repz{%;} cmpsb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1500], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16513 */ { "*cmpstrnqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^repz{%;} cmpsb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1493], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16513 */ { "*cmpstrnqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^repz{%;} cmpsb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1500], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16558 */ { "*strlenqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^repnz{%;} scasb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1507], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16558 */ { "*strlenqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^repnz{%;} scasb", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1513], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16679 */ { "*x86_movsicc_0_m1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sbb{l}\t%0, %0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1519], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16698 */ { "*x86_movsicc_0_m1_se", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sbb{l}\t%0, %0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1519], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16715 */ { "*x86_movsicc_0_m1_neg", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sbb{l}\t%0, %0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1519], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16730 */ { "*movhicc_noc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_797 }, #else { 0, output_797, 0 }, #endif { 0 }, &operand_data[1521], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16730 */ { "*movsicc_noc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_798 }, #else { 0, output_798, 0 }, #endif { 0 }, &operand_data[1525], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16765 */ { "*movqicc_noc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1529], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16829 */ { "*movxfcc_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_800 }, #else { 0, output_800, 0 }, #endif { 0 }, &operand_data[1533], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16842 */ { "*movdfcc_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_801 }, #else { 0, output_801, 0 }, #endif { 0 }, &operand_data[1537], 4, 4, 0, 6, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16879 */ { "*movsfcc_1_387", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_802 }, #else { 0, output_802, 0 }, #endif { 0 }, &operand_data[1541], 4, 4, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16952 */ { "*xop_pcmov_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%1, %3, %2, %0|%0, %2, %3, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1545], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16952 */ { "*xop_pcmov_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%1, %3, %2, %0|%0, %2, %3, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1549], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16967 */ { "smaxsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_805 }, #else { 0, output_805, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxsf3 }, &operand_data[1183], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16967 */ { "sminsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_806 }, #else { 0, output_806, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminsf3 }, &operand_data[1183], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16967 */ { "smaxdf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_807 }, #else { 0, output_807, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxdf3 }, &operand_data[1187], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16967 */ { "smindf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_808 }, #else { 0, output_808, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smindf3 }, &operand_data[1187], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16995 */ { "*ieee_smaxsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_809 }, #else { 0, output_809, 0 }, #endif { 0 }, &operand_data[943], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16995 */ { "*ieee_sminsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_810 }, #else { 0, output_810, 0 }, #endif { 0 }, &operand_data[943], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16995 */ { "*ieee_smaxdf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_811 }, #else { 0, output_811, 0 }, #endif { 0 }, &operand_data[947], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16995 */ { "*ieee_smindf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_812 }, #else { 0, output_812, 0 }, #endif { 0 }, &operand_data[947], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17063 */ { "pro_epilogue_adjust_stack_si_add", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_813 }, #else { 0, 0, output_813 }, #endif { (insn_gen_fn::stored_funcptr) gen_pro_epilogue_adjust_stack_si_add }, &operand_data[1553], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17063 */ { "pro_epilogue_adjust_stack_di_add", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_814 }, #else { 0, 0, output_814 }, #endif { (insn_gen_fn::stored_funcptr) gen_pro_epilogue_adjust_stack_di_add }, &operand_data[1556], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17106 */ { "pro_epilogue_adjust_stack_si_sub", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_pro_epilogue_adjust_stack_si_sub }, &operand_data[1559], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17106 */ { "pro_epilogue_adjust_stack_di_sub", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sub{q}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_pro_epilogue_adjust_stack_di_sub }, &operand_data[1562], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17117 */ { "allocate_stack_worker_probe_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "call\t___chkstk_ms", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_allocate_stack_worker_probe_si }, &operand_data[1565], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17117 */ { "allocate_stack_worker_probe_di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "call\t___chkstk_ms", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_allocate_stack_worker_probe_di }, &operand_data[1567], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17178 */ { "adjust_stack_and_probesi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_819 }, #else { 0, 0, output_819 }, #endif { (insn_gen_fn::stored_funcptr) gen_adjust_stack_and_probesi }, &operand_data[631], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17178 */ { "adjust_stack_and_probedi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_820 }, #else { 0, 0, output_820 }, #endif { (insn_gen_fn::stored_funcptr) gen_adjust_stack_and_probedi }, &operand_data[1569], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17190 */ { "probe_stack_rangesi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_821 }, #else { 0, 0, output_821 }, #endif { (insn_gen_fn::stored_funcptr) gen_probe_stack_rangesi }, &operand_data[631], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17190 */ { "probe_stack_rangedi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_822 }, #else { 0, 0, output_822 }, #endif { (insn_gen_fn::stored_funcptr) gen_probe_stack_rangedi }, &operand_data[1569], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18108 */ { "trap", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_823 }, #else { 0, 0, output_823 }, #endif { (insn_gen_fn::stored_funcptr) gen_trap }, &operand_data[0], 0, 0, 0, 0, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18143 */ { "*prefetch_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_824 }, #else { 0, 0, output_824 }, #endif { 0 }, &operand_data[1572], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18164 */ { "*prefetch_3dnow", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_825 }, #else { 0, 0, output_825 }, #endif { 0 }, &operand_data[1574], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18180 */ { "*prefetch_prefetchwt1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "prefetchwt1\t%a0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1572], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18213 */ { "stack_protect_set_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{l}\t{%1, %2|%2, %1}\n\tmov{l}\t{%2, %0|%0, %2}\n\txor{l}\t%k2, %k2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_stack_protect_set_si }, &operand_data[1576], 2, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18213 */ { "stack_protect_set_di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{q}\t{%1, %2|%2, %1}\n\tmov{q}\t{%2, %0|%0, %2}\n\txor{l}\t%k2, %k2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_stack_protect_set_di }, &operand_data[1579], 2, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18223 */ { "stack_tls_protect_set_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{l}\t{%@:%P1, %2|%2, DWORD PTR %@:%P1}\n\tmov{l}\t{%2, %0|%0, %2}\n\txor{l}\t%k2, %k2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_stack_tls_protect_set_si }, &operand_data[1582], 2, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18223 */ { "stack_tls_protect_set_di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{q}\t{%@:%P1, %2|%2, QWORD PTR %@:%P1}\n\tmov{q}\t{%2, %0|%0, %2}\n\txor{l}\t%k2, %k2", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_stack_tls_protect_set_di }, &operand_data[1585], 2, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18261 */ { "stack_protect_test_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{l}\t{%1, %3|%3, %1}\n\txor{l}\t{%2, %3|%3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_stack_protect_test_si }, &operand_data[1588], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18261 */ { "stack_protect_test_di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{q}\t{%1, %3|%3, %1}\n\txor{q}\t{%2, %3|%3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_stack_protect_test_di }, &operand_data[1592], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18271 */ { "stack_tls_protect_test_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{l}\t{%1, %3|%3, %1}\n\txor{l}\t{%@:%P2, %3|%3, DWORD PTR %@:%P2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_stack_tls_protect_test_si }, &operand_data[1596], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18271 */ { "stack_tls_protect_test_di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mov{q}\t{%1, %3|%3, %1}\n\txor{q}\t{%@:%P2, %3|%3, QWORD PTR %@:%P2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_stack_tls_protect_test_di }, &operand_data[1600], 3, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18281 */ { "sse4_2_crc32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "crc32{b}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_crc32qi }, &operand_data[1604], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18281 */ { "sse4_2_crc32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "crc32{w}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_crc32hi }, &operand_data[1607], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18281 */ { "sse4_2_crc32si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "crc32{l}\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_crc32si }, &operand_data[1610], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18315 */ { "rdpmc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "rdpmc", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rdpmc }, &operand_data[1613], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18335 */ { "rdtsc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "rdtsc", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rdtsc }, &operand_data[599], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18353 */ { "rdtscp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "rdtscp", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rdtscp }, &operand_data[1615], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18381 */ { "fxsave", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fxsave\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fxsave }, &operand_data[1617], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18401 */ { "fxrstor", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fxrstor\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fxrstor }, &operand_data[1618], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18457 */ { "xsave", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xsave\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xsave }, &operand_data[1619], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18457 */ { "xsaveopt", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xsaveopt\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xsaveopt }, &operand_data[1619], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18457 */ { "xsavec", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xsavec\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xsavec }, &operand_data[1619], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18457 */ { "xsaves", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xsaves\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xsaves }, &operand_data[1619], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18495 */ { "xrstor", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xrstor\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xrstor }, &operand_data[1621], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18495 */ { "xrstors", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xrstors\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xrstors }, &operand_data[1621], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18541 */ { "fnstenv", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fnstenv\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnstenv }, &operand_data[1617], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18560 */ { "fldenv", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fldenv\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fldenv }, &operand_data[1618], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18580 */ { "fnstsw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fnstsw\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnstsw }, &operand_data[1623], 1, 1, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18590 */ { "fnclex", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fnclex", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnclex }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18609 */ { "*lwp_llwpcbsi1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "llwpcb\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[851], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18609 */ { "*lwp_llwpcbdi1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "llwpcb\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[935], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18633 */ { "lwp_slwpcbsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "slwpcb\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lwp_slwpcbsi }, &operand_data[106], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18633 */ { "lwp_slwpcbdi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "slwpcb\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lwp_slwpcbdi }, &operand_data[550], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18651 */ { "*lwp_lwpvalsi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lwpval\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1624], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18673 */ { "*lwp_lwpinssi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lwpins\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1624], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18716 */ { "rdrandhi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "rdrand\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rdrandhi_1 }, &operand_data[202], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18716 */ { "rdrandsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "rdrand\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rdrandsi_1 }, &operand_data[106], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18726 */ { "rdseedhi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "rdseed\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rdseedhi_1 }, &operand_data[202], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18726 */ { "rdseedsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "rdseed\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rdseedsi_1 }, &operand_data[106], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18747 */ { "*pause", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "rep%; nop", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1095], 1, 1, 1, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18777 */ { "xbegin_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xbegin\t%l1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xbegin_1 }, &operand_data[1627], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18790 */ { "xend", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xend", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xend }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18797 */ { "xabort", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xabort\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xabort }, &operand_data[1130], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18817 */ { "xtest_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "xtest", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xtest_1 }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18825 */ { "pcommit", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pcommit", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_pcommit }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18832 */ { "clwb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "clwb\t%a0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clwb }, &operand_data[1572], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18841 */ { "clflushopt", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "clflushopt\t%a0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clflushopt }, &operand_data[1572], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18867 */ { "*bnd32_mk", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndmk\t{%3, %0|%0, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1629], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18867 */ { "*bnd64_mk", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndmk\t{%3, %0|%0, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1633], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18888 */ { "*movbnd32_internal_mpx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndmov\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1637], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18888 */ { "*movbnd64_internal_mpx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndmov\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1639], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18906 */ { "*bnd32_cl", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndcl\t{%a1, %0|%0, %a1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1641], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18906 */ { "*bnd32_cu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndcu\t{%a1, %0|%0, %a1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1641], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18906 */ { "*bnd32_cn", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndcn\t{%a1, %0|%0, %a1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1641], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18906 */ { "*bnd64_cl", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndcl\t{%a1, %0|%0, %a1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1644], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18906 */ { "*bnd64_cu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndcu\t{%a1, %0|%0, %a1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1644], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18906 */ { "*bnd64_cn", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndcn\t{%a1, %0|%0, %a1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1644], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18945 */ { "*bnd32_ldx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndldx\t{%3, %0|%0, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1647], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18945 */ { "*bnd64_ldx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndldx\t{%3, %0|%0, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1651], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18990 */ { "*bnd32_stx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndstx\t{%2, %3|%3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1655], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18990 */ { "*bnd64_stx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "bndstx\t{%2, %3|%3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1660], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:19003 */ { "move_size_reloc_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_885 }, #else { 0, 0, output_885 }, #endif { (insn_gen_fn::stored_funcptr) gen_move_size_reloc_si }, &operand_data[1665], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:79 */ { "*movv8qi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_886 }, #else { 0, 0, output_886 }, #endif { 0 }, &operand_data[1667], 2, 2, 0, 23, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:79 */ { "*movv4hi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_887 }, #else { 0, 0, output_887 }, #endif { 0 }, &operand_data[1669], 2, 2, 0, 23, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:79 */ { "*movv2si_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_888 }, #else { 0, 0, output_888 }, #endif { 0 }, &operand_data[1671], 2, 2, 0, 23, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:79 */ { "*movv1di_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_889 }, #else { 0, 0, output_889 }, #endif { 0 }, &operand_data[1673], 2, 2, 0, 23, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:79 */ { "*movv2sf_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_890 }, #else { 0, 0, output_890 }, #endif { 0 }, &operand_data[1675], 2, 2, 0, 23, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:225 */ { "sse_movntq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movntq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_movntq }, &operand_data[1677], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:248 */ { "*mmx_addv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfadd\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1679], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:270 */ { "*mmx_subv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_893 }, #else { 0, output_893, 0 }, #endif { 0 }, &operand_data[1682], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:289 */ { "*mmx_mulv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfmul\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1679], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:315 */ { "*mmx_smaxv2sf3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfmax\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1679], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:315 */ { "*mmx_sminv2sf3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfmin\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1679], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:327 */ { "*mmx_smaxv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfmax\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1685], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:327 */ { "*mmx_sminv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfmin\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1685], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:338 */ { "mmx_rcpv2sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfrcp\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_rcpv2sf2 }, &operand_data[1688], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:348 */ { "mmx_rcpit1v2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfrcpit1\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_rcpit1v2sf3 }, &operand_data[1685], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:359 */ { "mmx_rcpit2v2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfrcpit2\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_rcpit2v2sf3 }, &operand_data[1685], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:370 */ { "mmx_rsqrtv2sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfrsqrt\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_rsqrtv2sf2 }, &operand_data[1688], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:380 */ { "mmx_rsqit1v2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfrsqit1\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_rsqit1v2sf3 }, &operand_data[1685], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:391 */ { "mmx_haddv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfacc\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_haddv2sf3 }, &operand_data[1685], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:410 */ { "mmx_hsubv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfnacc\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_hsubv2sf3 }, &operand_data[1685], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:429 */ { "mmx_addsubv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfpnacc\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_addsubv2sf3 }, &operand_data[1685], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:456 */ { "*mmx_eqv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfcmpeq\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1690], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:466 */ { "mmx_gtv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfcmpgt\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_gtv2sf3 }, &operand_data[1693], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:476 */ { "mmx_gev2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pfcmpge\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_gev2sf3 }, &operand_data[1693], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:492 */ { "mmx_pf2id", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pf2id\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pf2id }, &operand_data[1696], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:501 */ { "mmx_pf2iw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pf2iw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pf2iw }, &operand_data[1696], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:513 */ { "mmx_pi2fw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pi2fw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pi2fw }, &operand_data[1698], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:525 */ { "mmx_floatv2si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pi2fd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_floatv2si2 }, &operand_data[1698], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:540 */ { "mmx_pswapdv2sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pswapd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pswapdv2sf2 }, &operand_data[1688], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:550 */ { "*vec_dupv2sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "punpckldq\t%0, %0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1700], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:559 */ { "*mmx_concatv2sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_916 }, #else { 0, output_916, 0 }, #endif { 0 }, &operand_data[1702], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:584 */ { "*vec_extractv2sf_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1705], 2, 2, 0, 6, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:602 */ { "*vec_extractv2sf_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_918 }, #else { 0, output_918, 0 }, #endif { 0 }, &operand_data[1707], 2, 2, 0, 7, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:666 */ { "*mmx_addv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "paddb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1709], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:666 */ { "*mmx_subv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psubb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1712], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:666 */ { "*mmx_addv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "paddw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:666 */ { "*mmx_subv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psubw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1718], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:666 */ { "*mmx_addv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "paddd\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1721], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:666 */ { "*mmx_subv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psubd\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1724], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:666 */ { "*mmx_addv1di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "paddq\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1727], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:666 */ { "*mmx_subv1di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psubq\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1730], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:685 */ { "*mmx_ssaddv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "paddsb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1709], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:685 */ { "*mmx_usaddv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "paddusb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1709], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:685 */ { "*mmx_sssubv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psubsb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1712], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:685 */ { "*mmx_ussubv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psubusb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1712], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:685 */ { "*mmx_ssaddv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "paddsw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:685 */ { "*mmx_usaddv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "paddusw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:685 */ { "*mmx_sssubv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psubsw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1718], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:685 */ { "*mmx_ussubv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psubusw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1718], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:702 */ { "*mmx_mulv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmullw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:724 */ { "*mmx_smulv4hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmulhw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:752 */ { "*mmx_umulv4hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmulhuw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:790 */ { "*mmx_pmaddwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmaddwd\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1733], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:830 */ { "*mmx_pmulhrwv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmulhrw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:863 */ { "*sse2_umulv1siv1di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmuludq\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1736], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:887 */ { "*mmx_smaxv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmaxsw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:887 */ { "*mmx_sminv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pminsw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:906 */ { "*mmx_umaxv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmaxub\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1709], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:906 */ { "*mmx_uminv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pminub\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1709], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:917 */ { "mmx_ashrv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psraw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_ashrv4hi3 }, &operand_data[1739], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:917 */ { "mmx_ashrv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psrad\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_ashrv2si3 }, &operand_data[1742], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:931 */ { "mmx_ashlv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psllw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_ashlv4hi3 }, &operand_data[1739], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:931 */ { "mmx_lshrv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psrlw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_lshrv4hi3 }, &operand_data[1739], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:931 */ { "mmx_ashlv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pslld\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_ashlv2si3 }, &operand_data[1742], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:931 */ { "mmx_lshrv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psrld\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_lshrv2si3 }, &operand_data[1742], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:931 */ { "mmx_ashlv1di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psllq\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_ashlv1di3 }, &operand_data[1745], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:931 */ { "mmx_lshrv1di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psrlq\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_lshrv1di3 }, &operand_data[1745], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:959 */ { "*mmx_eqv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pcmpeqb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1709], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:959 */ { "*mmx_eqv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pcmpeqw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:959 */ { "*mmx_eqv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pcmpeqd\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1721], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:969 */ { "mmx_gtv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pcmpgtb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_gtv8qi3 }, &operand_data[1748], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:969 */ { "mmx_gtv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pcmpgtw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_gtv4hi3 }, &operand_data[1751], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:969 */ { "mmx_gtv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pcmpgtd\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_gtv2si3 }, &operand_data[1754], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:985 */ { "mmx_andnotv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pandn\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_andnotv8qi3 }, &operand_data[1748], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:985 */ { "mmx_andnotv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pandn\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_andnotv4hi3 }, &operand_data[1751], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:985 */ { "mmx_andnotv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pandn\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_andnotv2si3 }, &operand_data[1754], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1003 */ { "*mmx_andv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pand\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1709], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1003 */ { "*mmx_iorv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "por\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1709], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1003 */ { "*mmx_xorv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pxor\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1709], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1003 */ { "*mmx_andv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pand\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1003 */ { "*mmx_iorv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "por\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1003 */ { "*mmx_xorv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pxor\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1003 */ { "*mmx_andv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pand\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1721], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1003 */ { "*mmx_iorv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "por\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1721], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1003 */ { "*mmx_xorv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pxor\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1721], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1019 */ { "mmx_packsswb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "packsswb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_packsswb }, &operand_data[1757], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1031 */ { "mmx_packssdw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "packssdw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_packssdw }, &operand_data[1760], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1043 */ { "mmx_packuswb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "packuswb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_packuswb }, &operand_data[1757], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1055 */ { "mmx_punpckhbw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "punpckhbw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_punpckhbw }, &operand_data[1748], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1070 */ { "mmx_punpcklbw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "punpcklbw\t{%2, %0|%0, %k2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_punpcklbw }, &operand_data[1748], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1085 */ { "mmx_punpckhwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "punpckhwd\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_punpckhwd }, &operand_data[1751], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1098 */ { "mmx_punpcklwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "punpcklwd\t{%2, %0|%0, %k2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_punpcklwd }, &operand_data[1751], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1111 */ { "mmx_punpckhdq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "punpckhdq\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_punpckhdq }, &operand_data[1754], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1124 */ { "mmx_punpckldq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "punpckldq\t{%2, %0|%0, %k2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_punpckldq }, &operand_data[1754], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1150 */ { "*mmx_pinsrw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_980 }, #else { 0, 0, output_980 }, #endif { 0 }, &operand_data[1763], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1171 */ { "mmx_pextrw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pextrw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pextrw }, &operand_data[1767], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1198 */ { "mmx_pshufw_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_982 }, #else { 0, 0, output_982 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pshufw_1 }, &operand_data[1770], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1221 */ { "mmx_pswapdv2si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pswapd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pswapdv2si2 }, &operand_data[1776], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1232 */ { "*vec_dupv4hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pshufw\t{$0, %0, %0|%0, %0, 0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1778], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1243 */ { "*vec_dupv2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "punpckldq\t%0, %0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1780], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1252 */ { "*mmx_concatv2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_986 }, #else { 0, output_986, 0 }, #endif { 0 }, &operand_data[1782], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1277 */ { "*vec_extractv2si_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1785], 2, 2, 0, 5, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1295 */ { "*vec_extractv2si_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_988 }, #else { 0, output_988, 0 }, #endif { 0 }, &operand_data[1787], 2, 2, 0, 6, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1443 */ { "*mmx_uavgv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_989 }, #else { 0, 0, output_989 }, #endif { 0 }, &operand_data[1709], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1493 */ { "*mmx_uavgv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pavgw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1715], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1512 */ { "mmx_psadbw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psadbw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_psadbw }, &operand_data[1789], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1522 */ { "mmx_pmovmskb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmovmskb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pmovmskb }, &operand_data[1792], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1539 */ { "*mmx_maskmovq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "maskmovq\t{%2, %1|%1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1794], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1539 */ { "*mmx_maskmovq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "maskmovq\t{%2, %1|%1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1797], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1575 */ { "*mmx_emms", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "emms", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1800], 1, 1, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1608 */ { "*mmx_femms", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "femms", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1800], 1, 1, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv64qi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_997 }, #else { 0, 0, output_997 }, #endif { 0 }, &operand_data[1801], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv32qi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_998 }, #else { 0, 0, output_998 }, #endif { 0 }, &operand_data[1803], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv16qi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_999 }, #else { 0, 0, output_999 }, #endif { 0 }, &operand_data[1805], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv32hi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1000 }, #else { 0, 0, output_1000 }, #endif { 0 }, &operand_data[1807], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv16hi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1001 }, #else { 0, 0, output_1001 }, #endif { 0 }, &operand_data[1809], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv8hi_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1002 }, #else { 0, 0, output_1002 }, #endif { 0 }, &operand_data[1811], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv16si_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1003 }, #else { 0, 0, output_1003 }, #endif { 0 }, &operand_data[1813], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv8si_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1004 }, #else { 0, 0, output_1004 }, #endif { 0 }, &operand_data[1815], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv4si_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1005 }, #else { 0, 0, output_1005 }, #endif { 0 }, &operand_data[1817], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv8di_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1006 }, #else { 0, 0, output_1006 }, #endif { 0 }, &operand_data[1819], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv4di_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1007 }, #else { 0, 0, output_1007 }, #endif { 0 }, &operand_data[1821], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv2di_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1008 }, #else { 0, 0, output_1008 }, #endif { 0 }, &operand_data[1823], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv4ti_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1009 }, #else { 0, 0, output_1009 }, #endif { 0 }, &operand_data[1825], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv2ti_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1010 }, #else { 0, 0, output_1010 }, #endif { 0 }, &operand_data[1827], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv1ti_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1011 }, #else { 0, 0, output_1011 }, #endif { 0 }, &operand_data[1829], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv16sf_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1012 }, #else { 0, 0, output_1012 }, #endif { 0 }, &operand_data[1831], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv8sf_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1013 }, #else { 0, 0, output_1013 }, #endif { 0 }, &operand_data[1833], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv4sf_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1014 }, #else { 0, 0, output_1014 }, #endif { 0 }, &operand_data[1835], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv8df_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1015 }, #else { 0, 0, output_1015 }, #endif { 0 }, &operand_data[1837], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv4df_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1016 }, #else { 0, 0, output_1016 }, #endif { 0 }, &operand_data[1839], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:797 */ { "*movv2df_internal", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1017 }, #else { 0, 0, output_1017 }, #endif { 0 }, &operand_data[1841], 2, 2, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512f_loadv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1018 }, #else { 0, 0, output_1018 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loadv16si_mask }, &operand_data[1843], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512vl_loadv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1019 }, #else { 0, 0, output_1019 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv8si_mask }, &operand_data[1847], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512vl_loadv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1020 }, #else { 0, 0, output_1020 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv4si_mask }, &operand_data[1851], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512f_loadv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1021 }, #else { 0, 0, output_1021 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loadv8di_mask }, &operand_data[1855], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512vl_loadv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1022 }, #else { 0, 0, output_1022 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv4di_mask }, &operand_data[1859], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512vl_loadv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1023 }, #else { 0, 0, output_1023 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv2di_mask }, &operand_data[1863], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512f_loadv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1024 }, #else { 0, 0, output_1024 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loadv16sf_mask }, &operand_data[1867], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512vl_loadv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1025 }, #else { 0, 0, output_1025 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv8sf_mask }, &operand_data[1871], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512vl_loadv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1026 }, #else { 0, 0, output_1026 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv4sf_mask }, &operand_data[1875], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512f_loadv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1027 }, #else { 0, 0, output_1027 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loadv8df_mask }, &operand_data[1879], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512vl_loadv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1028 }, #else { 0, 0, output_1028 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv4df_mask }, &operand_data[1883], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:918 */ { "avx512vl_loadv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1029 }, #else { 0, 0, output_1029 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv2df_mask }, &operand_data[1887], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:956 */ { "avx512bw_loadv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_loadv64qi_mask }, &operand_data[1891], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:956 */ { "avx512vl_loadv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv16qi_mask }, &operand_data[1895], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:956 */ { "avx512vl_loadv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv32qi_mask }, &operand_data[1899], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:956 */ { "avx512bw_loadv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_loadv32hi_mask }, &operand_data[1903], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:956 */ { "avx512vl_loadv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv16hi_mask }, &operand_data[1907], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:956 */ { "avx512vl_loadv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loadv8hi_mask }, &operand_data[1911], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512f_blendmv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_blendmv16si }, &operand_data[1915], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512vl_blendmv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv8si }, &operand_data[1919], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512vl_blendmv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv4si }, &operand_data[1923], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512f_blendmv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_blendmv8di }, &operand_data[1927], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512vl_blendmv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv4di }, &operand_data[1931], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512vl_blendmv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv2di }, &operand_data[1935], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512f_blendmv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmps\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_blendmv16sf }, &operand_data[1939], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512vl_blendmv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmps\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv8sf }, &operand_data[1943], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512vl_blendmv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmps\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv4sf }, &operand_data[1947], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512f_blendmv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmpd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_blendmv8df }, &operand_data[1951], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512vl_blendmv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmpd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv4df }, &operand_data[1955], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:969 */ { "avx512vl_blendmv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vblendmpd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv2df }, &operand_data[1959], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:981 */ { "avx512bw_blendmv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpblendmb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_blendmv64qi }, &operand_data[1963], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:981 */ { "avx512vl_blendmv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpblendmb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv16qi }, &operand_data[1967], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:981 */ { "avx512vl_blendmv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpblendmb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv32qi }, &operand_data[1971], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:981 */ { "avx512bw_blendmv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpblendmw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_blendmv32hi }, &operand_data[1975], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:981 */ { "avx512vl_blendmv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpblendmw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv16hi }, &operand_data[1979], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:981 */ { "avx512vl_blendmv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpblendmw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_blendmv8hi }, &operand_data[1983], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512f_storev16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1054 }, #else { 0, 0, output_1054 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storev16si_mask }, &operand_data[1987], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512vl_storev8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1055 }, #else { 0, 0, output_1055 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev8si_mask }, &operand_data[1990], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512vl_storev4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1056 }, #else { 0, 0, output_1056 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev4si_mask }, &operand_data[1993], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512f_storev8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1057 }, #else { 0, 0, output_1057 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storev8di_mask }, &operand_data[1996], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512vl_storev4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1058 }, #else { 0, 0, output_1058 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev4di_mask }, &operand_data[1999], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512vl_storev2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1059 }, #else { 0, 0, output_1059 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev2di_mask }, &operand_data[2002], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512f_storev16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1060 }, #else { 0, 0, output_1060 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storev16sf_mask }, &operand_data[2005], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512vl_storev8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1061 }, #else { 0, 0, output_1061 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev8sf_mask }, &operand_data[2008], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512vl_storev4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1062 }, #else { 0, 0, output_1062 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev4sf_mask }, &operand_data[2011], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512f_storev8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1063 }, #else { 0, 0, output_1063 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storev8df_mask }, &operand_data[2014], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512vl_storev4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1064 }, #else { 0, 0, output_1064 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev4df_mask }, &operand_data[2017], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:993 */ { "avx512vl_storev2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1065 }, #else { 0, 0, output_1065 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev2df_mask }, &operand_data[2020], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1031 */ { "avx512bw_storev64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_storev64qi_mask }, &operand_data[2023], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1031 */ { "avx512vl_storev16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev16qi_mask }, &operand_data[2026], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1031 */ { "avx512vl_storev32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev32qi_mask }, &operand_data[2029], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1031 */ { "avx512bw_storev32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_storev32hi_mask }, &operand_data[2032], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1031 */ { "avx512vl_storev16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev16hi_mask }, &operand_data[2035], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1031 */ { "avx512vl_storev8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storev8hi_mask }, &operand_data[2038], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1044 */ { "sse2_movq128", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovq\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_movq128 }, &operand_data[2041], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1066 */ { "movdi_to_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movdi_to_sse }, &operand_data[2043], 2, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*avx512f_loadups512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1074 }, #else { 0, 0, output_1074 }, #endif { 0 }, &operand_data[2046], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*avx512f_loadups512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1075 }, #else { 0, 0, output_1075 }, #endif { 0 }, &operand_data[2046], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*avx_loadups256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1076 }, #else { 0, 0, output_1076 }, #endif { 0 }, &operand_data[2050], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*avx_loadups256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1077 }, #else { 0, 0, output_1077 }, #endif { 0 }, &operand_data[2050], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*sse_loadups", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1078 }, #else { 0, 0, output_1078 }, #endif { 0 }, &operand_data[2054], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*sse_loadups_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1079 }, #else { 0, 0, output_1079 }, #endif { 0 }, &operand_data[2054], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*avx512f_loadupd512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1080 }, #else { 0, 0, output_1080 }, #endif { 0 }, &operand_data[2058], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*avx512f_loadupd512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1081 }, #else { 0, 0, output_1081 }, #endif { 0 }, &operand_data[2058], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*avx_loadupd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1082 }, #else { 0, 0, output_1082 }, #endif { 0 }, &operand_data[2062], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*avx_loadupd256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1083 }, #else { 0, 0, output_1083 }, #endif { 0 }, &operand_data[2062], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*sse2_loadupd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1084 }, #else { 0, 0, output_1084 }, #endif { 0 }, &operand_data[2066], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1154 */ { "*sse2_loadupd_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1085 }, #else { 0, 0, output_1085 }, #endif { 0 }, &operand_data[2066], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1186 */ { "avx512f_storeups512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1086 }, #else { 0, 0, output_1086 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storeups512 }, &operand_data[2005], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1186 */ { "avx_storeups256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1087 }, #else { 0, 0, output_1087 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_storeups256 }, &operand_data[2008], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1186 */ { "sse_storeups", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1088 }, #else { 0, 0, output_1088 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_storeups }, &operand_data[2011], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1186 */ { "avx512f_storeupd512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1089 }, #else { 0, 0, output_1089 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storeupd512 }, &operand_data[2014], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1186 */ { "avx_storeupd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1090 }, #else { 0, 0, output_1090 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_storeupd256 }, &operand_data[2017], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1186 */ { "sse2_storeupd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1091 }, #else { 0, 0, output_1091 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_storeupd }, &operand_data[2020], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1219 */ { "avx512f_storeups512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1092 }, #else { 0, 0, output_1092 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storeups512_mask }, &operand_data[2005], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1219 */ { "avx512vl_storeups256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1093 }, #else { 0, 0, output_1093 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storeups256_mask }, &operand_data[2008], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1219 */ { "avx512vl_storeups_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1094 }, #else { 0, 0, output_1094 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storeups_mask }, &operand_data[2011], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1219 */ { "avx512f_storeupd512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1095 }, #else { 0, 0, output_1095 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storeupd512_mask }, &operand_data[2014], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1219 */ { "avx512vl_storeupd256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1096 }, #else { 0, 0, output_1096 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storeupd256_mask }, &operand_data[2017], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1219 */ { "avx512vl_storeupd_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1097 }, #else { 0, 0, output_1097 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storeupd_mask }, &operand_data[2020], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1308 */ { "*avx_loaddquv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1098 }, #else { 0, 0, output_1098 }, #endif { 0 }, &operand_data[2070], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1308 */ { "*avx_loaddquv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1099 }, #else { 0, 0, output_1099 }, #endif { 0 }, &operand_data[2070], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1308 */ { "*sse2_loaddquv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1100 }, #else { 0, 0, output_1100 }, #endif { 0 }, &operand_data[2074], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1308 */ { "*sse2_loaddquv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1101 }, #else { 0, 0, output_1101 }, #endif { 0 }, &operand_data[2074], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1347 */ { "*avx512f_loaddquv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2078], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1347 */ { "*avx512f_loaddquv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2078], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1347 */ { "*avx512bw_loaddquv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2082], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1347 */ { "*avx512bw_loaddquv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2082], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1347 */ { "*avx512vl_loaddquv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2086], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1347 */ { "*avx512vl_loaddquv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2086], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1347 */ { "*avx512vl_loaddquv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2090], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1347 */ { "*avx512vl_loaddquv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2090], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*avx512f_loaddquv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2094], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*avx512f_loaddquv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2094], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*avx_loaddquv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2098], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*avx_loaddquv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2098], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*sse2_loaddquv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2102], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*sse2_loaddquv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2102], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*avx512f_loaddquv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2106], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*avx512f_loaddquv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2106], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*avx512vl_loaddquv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2110], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*avx512vl_loaddquv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2110], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*avx512vl_loaddquv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2114], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1359 */ { "*avx512vl_loaddquv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2114], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1371 */ { "avx_storedquv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1122 }, #else { 0, 0, output_1122 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_storedquv32qi }, &operand_data[2029], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1371 */ { "sse2_storedquv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1123 }, #else { 0, 0, output_1123 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_storedquv16qi }, &operand_data[2026], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1417 */ { "avx512f_storedquv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storedquv64qi }, &operand_data[2023], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1417 */ { "avx512bw_storedquv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_storedquv32hi }, &operand_data[2032], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1417 */ { "avx512vl_storedquv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv8hi }, &operand_data[2038], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1417 */ { "avx512vl_storedquv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv16hi }, &operand_data[2035], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1429 */ { "avx512f_storedquv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storedquv16si }, &operand_data[1987], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1429 */ { "avx_storedquv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_storedquv8si }, &operand_data[1990], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1429 */ { "sse2_storedquv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_storedquv4si }, &operand_data[1993], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1429 */ { "avx512f_storedquv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storedquv8di }, &operand_data[1996], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1429 */ { "avx512vl_storedquv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv4di }, &operand_data[1999], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1429 */ { "avx512vl_storedquv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv2di }, &operand_data[2002], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1441 */ { "avx512f_storedquv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storedquv16si_mask }, &operand_data[1987], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1441 */ { "avx512vl_storedquv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv8si_mask }, &operand_data[1990], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1441 */ { "avx512vl_storedquv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu32\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv4si_mask }, &operand_data[1993], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1441 */ { "avx512f_storedquv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_storedquv8di_mask }, &operand_data[1996], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1441 */ { "avx512vl_storedquv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv4di_mask }, &operand_data[1999], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1441 */ { "avx512vl_storedquv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu64\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv2di_mask }, &operand_data[2002], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1457 */ { "avx512bw_storedquv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_storedquv64qi_mask }, &operand_data[2023], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1457 */ { "avx512vl_storedquv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv16qi_mask }, &operand_data[2026], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1457 */ { "avx512vl_storedquv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu8\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv32qi_mask }, &operand_data[2029], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1457 */ { "avx512bw_storedquv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_storedquv32hi_mask }, &operand_data[2032], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1457 */ { "avx512vl_storedquv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv16hi_mask }, &operand_data[2035], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1457 */ { "avx512vl_storedquv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovdqu16\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_storedquv8hi_mask }, &operand_data[2038], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1473 */ { "avx_lddqu256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vlddqu\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_lddqu256 }, &operand_data[2118], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1473 */ { "sse3_lddqu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vlddqu\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_lddqu }, &operand_data[2120], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1495 */ { "sse2_movntisi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movnti\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_movntisi }, &operand_data[2122], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1505 */ { "avx512f_movntv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_movntv16sf }, &operand_data[2005], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1505 */ { "avx_movntv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movntv8sf }, &operand_data[2008], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1505 */ { "sse_movntv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_movntv4sf }, &operand_data[2011], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1505 */ { "avx512f_movntv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_movntv8df }, &operand_data[2014], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1505 */ { "avx_movntv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movntv4df }, &operand_data[2017], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1505 */ { "sse2_movntv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_movntv2df }, &operand_data[2020], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1516 */ { "avx512f_movntv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntdq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_movntv8di }, &operand_data[1996], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1516 */ { "avx_movntv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntdq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movntv4di }, &operand_data[1999], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1516 */ { "sse2_movntv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntdq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_movntv2di }, &operand_data[2002], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "*absnegv16sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2124], 4, 4, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "*absnegv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2128], 4, 4, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "*absnegv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2132], 4, 4, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "*absnegv8df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2136], 4, 4, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "*absnegv4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2140], 4, 4, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "*absnegv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2144], 4, 4, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1164 }, #else { 0, output_1164, 0 }, #endif { 0 }, &operand_data[2148], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1165 }, #else { 0, output_1165, 0 }, #endif { 0 }, &operand_data[2151], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1166 }, #else { 0, output_1166, 0 }, #endif { 0 }, &operand_data[2155], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1167 }, #else { 0, output_1167, 0 }, #endif { 0 }, &operand_data[2160], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1168 }, #else { 0, output_1168, 0 }, #endif { 0 }, &operand_data[2166], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1169 }, #else { 0, output_1169, 0 }, #endif { 0 }, &operand_data[2169], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1170 }, #else { 0, output_1170, 0 }, #endif { 0 }, &operand_data[2173], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1171 }, #else { 0, output_1171, 0 }, #endif { 0 }, &operand_data[2178], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1172 }, #else { 0, output_1172, 0 }, #endif { 0 }, &operand_data[2184], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv8sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1173 }, #else { 0, output_1173, 0 }, #endif { 0 }, &operand_data[2187], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1174 }, #else { 0, output_1174, 0 }, #endif { 0 }, &operand_data[2191], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv8sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1175 }, #else { 0, output_1175, 0 }, #endif { 0 }, &operand_data[2196], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1176 }, #else { 0, output_1176, 0 }, #endif { 0 }, &operand_data[2202], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv8sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1177 }, #else { 0, output_1177, 0 }, #endif { 0 }, &operand_data[2205], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1178 }, #else { 0, output_1178, 0 }, #endif { 0 }, &operand_data[2209], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv8sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1179 }, #else { 0, output_1179, 0 }, #endif { 0 }, &operand_data[2214], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1180 }, #else { 0, output_1180, 0 }, #endif { 0 }, &operand_data[2220], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv4sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1181 }, #else { 0, output_1181, 0 }, #endif { 0 }, &operand_data[2223], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1182 }, #else { 0, output_1182, 0 }, #endif { 0 }, &operand_data[2227], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv4sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1183 }, #else { 0, output_1183, 0 }, #endif { 0 }, &operand_data[2232], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1184 }, #else { 0, output_1184, 0 }, #endif { 0 }, &operand_data[2238], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv4sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1185 }, #else { 0, output_1185, 0 }, #endif { 0 }, &operand_data[2241], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1186 }, #else { 0, output_1186, 0 }, #endif { 0 }, &operand_data[2245], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv4sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1187 }, #else { 0, output_1187, 0 }, #endif { 0 }, &operand_data[2250], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1188 }, #else { 0, output_1188, 0 }, #endif { 0 }, &operand_data[2256], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1189 }, #else { 0, output_1189, 0 }, #endif { 0 }, &operand_data[2259], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1190 }, #else { 0, output_1190, 0 }, #endif { 0 }, &operand_data[2263], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1191 }, #else { 0, output_1191, 0 }, #endif { 0 }, &operand_data[2268], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1192 }, #else { 0, output_1192, 0 }, #endif { 0 }, &operand_data[2274], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1193 }, #else { 0, output_1193, 0 }, #endif { 0 }, &operand_data[2277], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1194 }, #else { 0, output_1194, 0 }, #endif { 0 }, &operand_data[2281], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1195 }, #else { 0, output_1195, 0 }, #endif { 0 }, &operand_data[2286], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1196 }, #else { 0, output_1196, 0 }, #endif { 0 }, &operand_data[2292], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv4df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1197 }, #else { 0, output_1197, 0 }, #endif { 0 }, &operand_data[2295], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1198 }, #else { 0, output_1198, 0 }, #endif { 0 }, &operand_data[2299], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv4df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1199 }, #else { 0, output_1199, 0 }, #endif { 0 }, &operand_data[2304], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1200 }, #else { 0, output_1200, 0 }, #endif { 0 }, &operand_data[2310], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv4df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1201 }, #else { 0, output_1201, 0 }, #endif { 0 }, &operand_data[2313], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1202 }, #else { 0, output_1202, 0 }, #endif { 0 }, &operand_data[2317], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv4df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1203 }, #else { 0, output_1203, 0 }, #endif { 0 }, &operand_data[2322], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1204 }, #else { 0, output_1204, 0 }, #endif { 0 }, &operand_data[2328], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv2df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1205 }, #else { 0, output_1205, 0 }, #endif { 0 }, &operand_data[2331], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1206 }, #else { 0, output_1206, 0 }, #endif { 0 }, &operand_data[2335], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*addv2df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1207 }, #else { 0, output_1207, 0 }, #endif { 0 }, &operand_data[2340], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1208 }, #else { 0, output_1208, 0 }, #endif { 0 }, &operand_data[2346], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv2df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1209 }, #else { 0, output_1209, 0 }, #endif { 0 }, &operand_data[2349], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1210 }, #else { 0, output_1210, 0 }, #endif { 0 }, &operand_data[2353], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1609 */ { "*subv2df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1211 }, #else { 0, output_1211, 0 }, #endif { 0 }, &operand_data[2358], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1623 */ { "sse_vmaddv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1212 }, #else { 0, output_1212, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmaddv4sf3 }, &operand_data[2364], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1623 */ { "sse_vmaddv4sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1213 }, #else { 0, output_1213, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmaddv4sf3_round }, &operand_data[2367], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1623 */ { "sse_vmsubv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1214 }, #else { 0, output_1214, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmsubv4sf3 }, &operand_data[2364], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1623 */ { "sse_vmsubv4sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1215 }, #else { 0, output_1215, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmsubv4sf3_round }, &operand_data[2367], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1623 */ { "sse2_vmaddv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1216 }, #else { 0, output_1216, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmaddv2df3 }, &operand_data[2371], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1623 */ { "sse2_vmaddv2df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1217 }, #else { 0, output_1217, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmaddv2df3_round }, &operand_data[2374], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1623 */ { "sse2_vmsubv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1218 }, #else { 0, output_1218, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmsubv2df3 }, &operand_data[2371], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1623 */ { "sse2_vmsubv2df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1219 }, #else { 0, output_1219, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmsubv2df3_round }, &operand_data[2374], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1220 }, #else { 0, output_1220, 0 }, #endif { 0 }, &operand_data[2148], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1221 }, #else { 0, output_1221, 0 }, #endif { 0 }, &operand_data[2151], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1222 }, #else { 0, output_1222, 0 }, #endif { 0 }, &operand_data[2155], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1223 }, #else { 0, output_1223, 0 }, #endif { 0 }, &operand_data[2160], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1224 }, #else { 0, output_1224, 0 }, #endif { 0 }, &operand_data[2184], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv8sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1225 }, #else { 0, output_1225, 0 }, #endif { 0 }, &operand_data[2187], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1226 }, #else { 0, output_1226, 0 }, #endif { 0 }, &operand_data[2191], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv8sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1227 }, #else { 0, output_1227, 0 }, #endif { 0 }, &operand_data[2196], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1228 }, #else { 0, output_1228, 0 }, #endif { 0 }, &operand_data[2220], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv4sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1229 }, #else { 0, output_1229, 0 }, #endif { 0 }, &operand_data[2223], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1230 }, #else { 0, output_1230, 0 }, #endif { 0 }, &operand_data[2227], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv4sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1231 }, #else { 0, output_1231, 0 }, #endif { 0 }, &operand_data[2232], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1232 }, #else { 0, output_1232, 0 }, #endif { 0 }, &operand_data[2256], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1233 }, #else { 0, output_1233, 0 }, #endif { 0 }, &operand_data[2259], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1234 }, #else { 0, output_1234, 0 }, #endif { 0 }, &operand_data[2263], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1235 }, #else { 0, output_1235, 0 }, #endif { 0 }, &operand_data[2268], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1236 }, #else { 0, output_1236, 0 }, #endif { 0 }, &operand_data[2292], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv4df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1237 }, #else { 0, output_1237, 0 }, #endif { 0 }, &operand_data[2295], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1238 }, #else { 0, output_1238, 0 }, #endif { 0 }, &operand_data[2299], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv4df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1239 }, #else { 0, output_1239, 0 }, #endif { 0 }, &operand_data[2304], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1240 }, #else { 0, output_1240, 0 }, #endif { 0 }, &operand_data[2328], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv2df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1241 }, #else { 0, output_1241, 0 }, #endif { 0 }, &operand_data[2331], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1242 }, #else { 0, output_1242, 0 }, #endif { 0 }, &operand_data[2335], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1648 */ { "*mulv2df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1243 }, #else { 0, output_1243, 0 }, #endif { 0 }, &operand_data[2340], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1663 */ { "sse_vmmulv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1244 }, #else { 0, output_1244, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmmulv4sf3 }, &operand_data[2364], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1663 */ { "sse_vmmulv4sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1245 }, #else { 0, output_1245, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmmulv4sf3_round }, &operand_data[2367], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1663 */ { "sse_vmdivv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1246 }, #else { 0, output_1246, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmdivv4sf3 }, &operand_data[2364], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1663 */ { "sse_vmdivv4sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1247 }, #else { 0, output_1247, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmdivv4sf3_round }, &operand_data[2367], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1663 */ { "sse2_vmmulv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1248 }, #else { 0, output_1248, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmmulv2df3 }, &operand_data[2371], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1663 */ { "sse2_vmmulv2df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1249 }, #else { 0, output_1249, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmmulv2df3_round }, &operand_data[2374], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1663 */ { "sse2_vmdivv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1250 }, #else { 0, output_1250, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmdivv2df3 }, &operand_data[2371], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1663 */ { "sse2_vmdivv2df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1251 }, #else { 0, output_1251, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmdivv2df3_round }, &operand_data[2374], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx512f_divv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1252 }, #else { 0, output_1252, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_divv16sf3 }, &operand_data[2378], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx512f_divv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1253 }, #else { 0, output_1253, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_divv16sf3_round }, &operand_data[2169], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx512f_divv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1254 }, #else { 0, output_1254, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_divv16sf3_mask }, &operand_data[2378], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx512f_divv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1255 }, #else { 0, output_1255, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_divv16sf3_mask_round }, &operand_data[2178], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx_divv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1256 }, #else { 0, output_1256, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_divv8sf3 }, &operand_data[2383], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx_divv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1257 }, #else { 0, output_1257, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_divv8sf3_mask }, &operand_data[2383], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "sse_divv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1258 }, #else { 0, output_1258, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_divv4sf3 }, &operand_data[2364], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "sse_divv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1259 }, #else { 0, output_1259, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_divv4sf3_mask }, &operand_data[2388], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx512f_divv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1260 }, #else { 0, output_1260, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_divv8df3 }, &operand_data[2393], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx512f_divv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1261 }, #else { 0, output_1261, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_divv8df3_round }, &operand_data[2277], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx512f_divv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1262 }, #else { 0, output_1262, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_divv8df3_mask }, &operand_data[2393], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx512f_divv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1263 }, #else { 0, output_1263, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_divv8df3_mask_round }, &operand_data[2286], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx_divv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1264 }, #else { 0, output_1264, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_divv4df3 }, &operand_data[2398], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "avx_divv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1265 }, #else { 0, output_1265, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_divv4df3_mask }, &operand_data[2398], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "sse2_divv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1266 }, #else { 0, output_1266, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_divv2df3 }, &operand_data[2371], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1707 */ { "sse2_divv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1267 }, #else { 0, output_1267, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_divv2df3_mask }, &operand_data[2403], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1721 */ { "avx_rcpv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vrcpps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_rcpv8sf2 }, &operand_data[2408], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1721 */ { "sse_rcpv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vrcpps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_rcpv4sf2 }, &operand_data[2410], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1733 */ { "sse_vmrcpv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1270 }, #else { 0, output_1270, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmrcpv4sf2 }, &operand_data[2412], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "*rcp14v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2046], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "rcp14v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rcp14v16sf_mask }, &operand_data[2046], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "*rcp14v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2050], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "rcp14v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rcp14v8sf_mask }, &operand_data[2050], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "*rcp14v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2054], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "rcp14v4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rcp14v4sf_mask }, &operand_data[2054], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "*rcp14v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2058], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "rcp14v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rcp14v8df_mask }, &operand_data[2058], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "*rcp14v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2062], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "rcp14v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rcp14v4df_mask }, &operand_data[2062], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "*rcp14v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2066], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1752 */ { "rcp14v2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rcp14v2df_mask }, &operand_data[2066], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1763 */ { "srcp14v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14ss\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_srcp14v4sf }, &operand_data[2415], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1763 */ { "srcp14v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp14sd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_srcp14v2df }, &operand_data[2418], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx512f_sqrtv16sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sqrtv16sf2 }, &operand_data[2046], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx512f_sqrtv16sf2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtps\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sqrtv16sf2_round }, &operand_data[2421], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx512f_sqrtv16sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sqrtv16sf2_mask }, &operand_data[2046], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx512f_sqrtv16sf2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtps\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sqrtv16sf2_mask_round }, &operand_data[2424], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx_sqrtv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_sqrtv8sf2 }, &operand_data[2050], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx_sqrtv8sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_sqrtv8sf2_mask }, &operand_data[2050], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "sse_sqrtv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_sqrtv4sf2 }, &operand_data[2054], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "sse_sqrtv4sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_sqrtv4sf2_mask }, &operand_data[2054], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx512f_sqrtv8df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sqrtv8df2 }, &operand_data[2058], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx512f_sqrtv8df2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtpd\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sqrtv8df2_round }, &operand_data[2429], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx512f_sqrtv8df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtpd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sqrtv8df2_mask }, &operand_data[2058], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx512f_sqrtv8df2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtpd\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sqrtv8df2_mask_round }, &operand_data[2432], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx_sqrtv4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_sqrtv4df2 }, &operand_data[2062], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "avx_sqrtv4df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtpd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_sqrtv4df2_mask }, &operand_data[2062], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "sse2_sqrtv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_sqrtv2df2 }, &operand_data[2066], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1798 */ { "sse2_sqrtv2df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vsqrtpd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_sqrtv2df2_mask }, &operand_data[2066], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1809 */ { "sse_vmsqrtv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1301 }, #else { 0, output_1301, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmsqrtv4sf2 }, &operand_data[2437], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1809 */ { "sse_vmsqrtv4sf2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1302 }, #else { 0, output_1302, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmsqrtv4sf2_round }, &operand_data[2440], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1809 */ { "sse2_vmsqrtv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1303 }, #else { 0, output_1303, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmsqrtv2df2 }, &operand_data[2444], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1809 */ { "sse2_vmsqrtv2df2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1304 }, #else { 0, output_1304, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmsqrtv2df2_round }, &operand_data[2447], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1837 */ { "avx_rsqrtv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vrsqrtps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_rsqrtv8sf2 }, &operand_data[2408], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1837 */ { "sse_rsqrtv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vrsqrtps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_rsqrtv4sf2 }, &operand_data[2410], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "*rsqrt14v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2046], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "rsqrt14v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrt14v16sf_mask }, &operand_data[2046], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "*rsqrt14v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2050], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "rsqrt14v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrt14v8sf_mask }, &operand_data[2050], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "*rsqrt14v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2054], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "rsqrt14v4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrt14v4sf_mask }, &operand_data[2054], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "*rsqrt14v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2058], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "rsqrt14v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrt14v8df_mask }, &operand_data[2058], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "*rsqrt14v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2062], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "rsqrt14v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrt14v4df_mask }, &operand_data[2062], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "*rsqrt14v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2066], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1847 */ { "rsqrt14v2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrt14v2df_mask }, &operand_data[2066], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1858 */ { "rsqrt14v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14ss\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrt14v4sf }, &operand_data[2415], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1858 */ { "rsqrt14v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt14sd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrt14v2df }, &operand_data[2418], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1872 */ { "sse_vmrsqrtv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1321 }, #else { 0, output_1321, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmrsqrtv4sf2 }, &operand_data[2412], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv16sf3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1322 }, #else { 0, output_1322, 0 }, #endif { 0 }, &operand_data[2148], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv16sf3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1323 }, #else { 0, output_1323, 0 }, #endif { 0 }, &operand_data[2451], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv16sf3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1324 }, #else { 0, output_1324, 0 }, #endif { 0 }, &operand_data[2155], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv16sf3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1325 }, #else { 0, output_1325, 0 }, #endif { 0 }, &operand_data[2455], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv16sf3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1326 }, #else { 0, output_1326, 0 }, #endif { 0 }, &operand_data[2148], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv16sf3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1327 }, #else { 0, output_1327, 0 }, #endif { 0 }, &operand_data[2451], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv16sf3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1328 }, #else { 0, output_1328, 0 }, #endif { 0 }, &operand_data[2155], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv16sf3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1329 }, #else { 0, output_1329, 0 }, #endif { 0 }, &operand_data[2455], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv8sf3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1330 }, #else { 0, output_1330, 0 }, #endif { 0 }, &operand_data[2184], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv8sf3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1331 }, #else { 0, output_1331, 0 }, #endif { 0 }, &operand_data[2461], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv8sf3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1332 }, #else { 0, output_1332, 0 }, #endif { 0 }, &operand_data[2191], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv8sf3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1333 }, #else { 0, output_1333, 0 }, #endif { 0 }, &operand_data[2465], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv8sf3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1334 }, #else { 0, output_1334, 0 }, #endif { 0 }, &operand_data[2184], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv8sf3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1335 }, #else { 0, output_1335, 0 }, #endif { 0 }, &operand_data[2461], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv8sf3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1336 }, #else { 0, output_1336, 0 }, #endif { 0 }, &operand_data[2191], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv8sf3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1337 }, #else { 0, output_1337, 0 }, #endif { 0 }, &operand_data[2465], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv4sf3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1338 }, #else { 0, output_1338, 0 }, #endif { 0 }, &operand_data[2220], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv4sf3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1339 }, #else { 0, output_1339, 0 }, #endif { 0 }, &operand_data[2471], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv4sf3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1340 }, #else { 0, output_1340, 0 }, #endif { 0 }, &operand_data[2227], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv4sf3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1341 }, #else { 0, output_1341, 0 }, #endif { 0 }, &operand_data[2475], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv4sf3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1342 }, #else { 0, output_1342, 0 }, #endif { 0 }, &operand_data[2220], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv4sf3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1343 }, #else { 0, output_1343, 0 }, #endif { 0 }, &operand_data[2471], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv4sf3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1344 }, #else { 0, output_1344, 0 }, #endif { 0 }, &operand_data[2227], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv4sf3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1345 }, #else { 0, output_1345, 0 }, #endif { 0 }, &operand_data[2475], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv8df3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1346 }, #else { 0, output_1346, 0 }, #endif { 0 }, &operand_data[2256], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv8df3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1347 }, #else { 0, output_1347, 0 }, #endif { 0 }, &operand_data[2481], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv8df3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1348 }, #else { 0, output_1348, 0 }, #endif { 0 }, &operand_data[2263], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv8df3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1349 }, #else { 0, output_1349, 0 }, #endif { 0 }, &operand_data[2485], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv8df3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1350 }, #else { 0, output_1350, 0 }, #endif { 0 }, &operand_data[2256], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv8df3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1351 }, #else { 0, output_1351, 0 }, #endif { 0 }, &operand_data[2481], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv8df3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1352 }, #else { 0, output_1352, 0 }, #endif { 0 }, &operand_data[2263], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv8df3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1353 }, #else { 0, output_1353, 0 }, #endif { 0 }, &operand_data[2485], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv4df3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1354 }, #else { 0, output_1354, 0 }, #endif { 0 }, &operand_data[2292], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv4df3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1355 }, #else { 0, output_1355, 0 }, #endif { 0 }, &operand_data[2491], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv4df3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1356 }, #else { 0, output_1356, 0 }, #endif { 0 }, &operand_data[2299], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv4df3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1357 }, #else { 0, output_1357, 0 }, #endif { 0 }, &operand_data[2495], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv4df3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1358 }, #else { 0, output_1358, 0 }, #endif { 0 }, &operand_data[2292], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv4df3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1359 }, #else { 0, output_1359, 0 }, #endif { 0 }, &operand_data[2491], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv4df3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1360 }, #else { 0, output_1360, 0 }, #endif { 0 }, &operand_data[2299], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv4df3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1361 }, #else { 0, output_1361, 0 }, #endif { 0 }, &operand_data[2495], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv2df3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1362 }, #else { 0, output_1362, 0 }, #endif { 0 }, &operand_data[2328], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv2df3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1363 }, #else { 0, output_1363, 0 }, #endif { 0 }, &operand_data[2501], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv2df3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1364 }, #else { 0, output_1364, 0 }, #endif { 0 }, &operand_data[2335], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*smaxv2df3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1365 }, #else { 0, output_1365, 0 }, #endif { 0 }, &operand_data[2505], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv2df3_finite", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1366 }, #else { 0, output_1366, 0 }, #endif { 0 }, &operand_data[2328], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv2df3_finite_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1367 }, #else { 0, output_1367, 0 }, #endif { 0 }, &operand_data[2501], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv2df3_finite_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1368 }, #else { 0, output_1368, 0 }, #endif { 0 }, &operand_data[2335], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1905 */ { "*sminv2df3_finite_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1369 }, #else { 0, output_1369, 0 }, #endif { 0 }, &operand_data[2505], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1370 }, #else { 0, output_1370, 0 }, #endif { 0 }, &operand_data[2378], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1371 }, #else { 0, output_1371, 0 }, #endif { 0 }, &operand_data[2511], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1372 }, #else { 0, output_1372, 0 }, #endif { 0 }, &operand_data[2378], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1373 }, #else { 0, output_1373, 0 }, #endif { 0 }, &operand_data[2515], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1374 }, #else { 0, output_1374, 0 }, #endif { 0 }, &operand_data[2378], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1375 }, #else { 0, output_1375, 0 }, #endif { 0 }, &operand_data[2511], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1376 }, #else { 0, output_1376, 0 }, #endif { 0 }, &operand_data[2378], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1377 }, #else { 0, output_1377, 0 }, #endif { 0 }, &operand_data[2515], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1378 }, #else { 0, output_1378, 0 }, #endif { 0 }, &operand_data[2383], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1379 }, #else { 0, output_1379, 0 }, #endif { 0 }, &operand_data[2383], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1380 }, #else { 0, output_1380, 0 }, #endif { 0 }, &operand_data[2383], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1381 }, #else { 0, output_1381, 0 }, #endif { 0 }, &operand_data[2383], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1382 }, #else { 0, output_1382, 0 }, #endif { 0 }, &operand_data[2364], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1383 }, #else { 0, output_1383, 0 }, #endif { 0 }, &operand_data[2388], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1384 }, #else { 0, output_1384, 0 }, #endif { 0 }, &operand_data[2364], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1385 }, #else { 0, output_1385, 0 }, #endif { 0 }, &operand_data[2388], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1386 }, #else { 0, output_1386, 0 }, #endif { 0 }, &operand_data[2393], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1387 }, #else { 0, output_1387, 0 }, #endif { 0 }, &operand_data[2521], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1388 }, #else { 0, output_1388, 0 }, #endif { 0 }, &operand_data[2393], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1389 }, #else { 0, output_1389, 0 }, #endif { 0 }, &operand_data[2525], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1390 }, #else { 0, output_1390, 0 }, #endif { 0 }, &operand_data[2393], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1391 }, #else { 0, output_1391, 0 }, #endif { 0 }, &operand_data[2521], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1392 }, #else { 0, output_1392, 0 }, #endif { 0 }, &operand_data[2393], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1393 }, #else { 0, output_1393, 0 }, #endif { 0 }, &operand_data[2525], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1394 }, #else { 0, output_1394, 0 }, #endif { 0 }, &operand_data[2398], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1395 }, #else { 0, output_1395, 0 }, #endif { 0 }, &operand_data[2398], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1396 }, #else { 0, output_1396, 0 }, #endif { 0 }, &operand_data[2398], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1397 }, #else { 0, output_1397, 0 }, #endif { 0 }, &operand_data[2398], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1398 }, #else { 0, output_1398, 0 }, #endif { 0 }, &operand_data[2371], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*smaxv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1399 }, #else { 0, output_1399, 0 }, #endif { 0 }, &operand_data[2403], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1400 }, #else { 0, output_1400, 0 }, #endif { 0 }, &operand_data[2371], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1922 */ { "*sminv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1401 }, #else { 0, output_1401, 0 }, #endif { 0 }, &operand_data[2403], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1938 */ { "sse_vmsmaxv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1402 }, #else { 0, output_1402, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmsmaxv4sf3 }, &operand_data[2364], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1938 */ { "sse_vmsmaxv4sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1403 }, #else { 0, output_1403, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmsmaxv4sf3_round }, &operand_data[2531], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1938 */ { "sse_vmsminv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1404 }, #else { 0, output_1404, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmsminv4sf3 }, &operand_data[2364], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1938 */ { "sse_vmsminv4sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1405 }, #else { 0, output_1405, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmsminv4sf3_round }, &operand_data[2531], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1938 */ { "sse2_vmsmaxv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1406 }, #else { 0, output_1406, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmsmaxv2df3 }, &operand_data[2371], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1938 */ { "sse2_vmsmaxv2df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1407 }, #else { 0, output_1407, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmsmaxv2df3_round }, &operand_data[2535], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1938 */ { "sse2_vmsminv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1408 }, #else { 0, output_1408, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmsminv2df3 }, &operand_data[2371], 3, 3, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1938 */ { "sse2_vmsminv2df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1409 }, #else { 0, output_1409, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmsminv2df3_round }, &operand_data[2535], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1962 */ { "*ieee_sminv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1410 }, #else { 0, output_1410, 0 }, #endif { 0 }, &operand_data[2539], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1962 */ { "*ieee_sminv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1411 }, #else { 0, output_1411, 0 }, #endif { 0 }, &operand_data[2542], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1962 */ { "*ieee_sminv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1412 }, #else { 0, output_1412, 0 }, #endif { 0 }, &operand_data[2545], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1962 */ { "*ieee_sminv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1413 }, #else { 0, output_1413, 0 }, #endif { 0 }, &operand_data[2548], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1962 */ { "*ieee_sminv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1414 }, #else { 0, output_1414, 0 }, #endif { 0 }, &operand_data[2551], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1962 */ { "*ieee_sminv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1415 }, #else { 0, output_1415, 0 }, #endif { 0 }, &operand_data[2554], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1977 */ { "*ieee_smaxv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1416 }, #else { 0, output_1416, 0 }, #endif { 0 }, &operand_data[2539], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1977 */ { "*ieee_smaxv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1417 }, #else { 0, output_1417, 0 }, #endif { 0 }, &operand_data[2542], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1977 */ { "*ieee_smaxv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1418 }, #else { 0, output_1418, 0 }, #endif { 0 }, &operand_data[2545], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1977 */ { "*ieee_smaxv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1419 }, #else { 0, output_1419, 0 }, #endif { 0 }, &operand_data[2548], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1977 */ { "*ieee_smaxv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1420 }, #else { 0, output_1420, 0 }, #endif { 0 }, &operand_data[2551], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1977 */ { "*ieee_smaxv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1421 }, #else { 0, output_1421, 0 }, #endif { 0 }, &operand_data[2554], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1992 */ { "avx_addsubv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vaddsubpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_addsubv4df3 }, &operand_data[2557], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2006 */ { "sse3_addsubv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1423 }, #else { 0, output_1423, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_addsubv2df3 }, &operand_data[2560], 3, 3, 2, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2024 */ { "avx_addsubv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vaddsubps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_addsubv8sf3 }, &operand_data[2563], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2038 */ { "sse3_addsubv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1425 }, #else { 0, output_1425, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_addsubv4sf3 }, &operand_data[2566], 3, 3, 2, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2056 */ { "avx_haddv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vhaddpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_haddv4df3 }, &operand_data[2557], 3, 3, 6, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2056 */ { "avx_hsubv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vhsubpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_hsubv4df3 }, &operand_data[2557], 3, 3, 6, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2098 */ { "*sse3_haddv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1428 }, #else { 0, output_1428, 0 }, #endif { 0 }, &operand_data[2569], 7, 7, 2, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2126 */ { "sse3_hsubv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1429 }, #else { 0, output_1429, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_hsubv2df3 }, &operand_data[2560], 3, 3, 2, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2148 */ { "*sse3_haddv2df3_low", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1430 }, #else { 0, output_1430, 0 }, #endif { 0 }, &operand_data[2576], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2167 */ { "*sse3_hsubv2df3_low", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1431 }, #else { 0, output_1431, 0 }, #endif { 0 }, &operand_data[2576], 2, 2, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2185 */ { "avx_haddv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vhaddps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_haddv8sf3 }, &operand_data[2563], 3, 3, 14, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2185 */ { "avx_hsubv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vhsubps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_hsubv8sf3 }, &operand_data[2563], 3, 3, 14, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2228 */ { "sse3_haddv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1434 }, #else { 0, output_1434, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_haddv4sf3 }, &operand_data[2566], 3, 3, 6, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2228 */ { "sse3_hsubv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1435 }, #else { 0, output_1435, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_hsubv4sf3 }, &operand_data[2566], 3, 3, 6, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "*reducepv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreduceps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2580], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "reducepv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreduceps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reducepv16sf_mask }, &operand_data[2580], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "*reducepv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreduceps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2585], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "reducepv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreduceps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reducepv8sf_mask }, &operand_data[2585], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "*reducepv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreduceps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2590], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "reducepv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreduceps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reducepv4sf_mask }, &operand_data[2590], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "*reducepv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreducepd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2595], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "reducepv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreducepd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reducepv8df_mask }, &operand_data[2595], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "*reducepv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreducepd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2600], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "reducepv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreducepd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reducepv4df_mask }, &operand_data[2600], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "*reducepv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreducepd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2605], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2380 */ { "reducepv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreducepd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reducepv2df_mask }, &operand_data[2605], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2392 */ { "reducesv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreducess\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reducesv4sf }, &operand_data[2610], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2392 */ { "reducesv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vreducesd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reducesv2df }, &operand_data[2614], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2414 */ { "avx_cmpv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpps\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cmpv8sf3 }, &operand_data[2618], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2414 */ { "avx_cmpv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpps\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cmpv4sf3 }, &operand_data[2622], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2414 */ { "avx_cmpv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmppd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cmpv4df3 }, &operand_data[2626], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2414 */ { "avx_cmpv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmppd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cmpv2df3 }, &operand_data[2630], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2428 */ { "avx_vmcmpv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpss\t{%3, %2, %1, %0|%0, %1, %k2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vmcmpv4sf3 }, &operand_data[2622], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2428 */ { "avx_vmcmpv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpsd\t{%3, %2, %1, %0|%0, %1, %q2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vmcmpv2df3 }, &operand_data[2630], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2445 */ { "*avx_maskcmpv8sf3_comm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1456 }, #else { 0, output_1456, 0 }, #endif { 0 }, &operand_data[2634], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2445 */ { "*sse_maskcmpv4sf3_comm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1457 }, #else { 0, output_1457, 0 }, #endif { 0 }, &operand_data[2638], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2445 */ { "*avx_maskcmpv4df3_comm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1458 }, #else { 0, output_1458, 0 }, #endif { 0 }, &operand_data[2642], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2445 */ { "*sse2_maskcmpv2df3_comm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1459 }, #else { 0, output_1459, 0 }, #endif { 0 }, &operand_data[2646], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2461 */ { "avx_maskcmpv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1460 }, #else { 0, output_1460, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_maskcmpv8sf3 }, &operand_data[2650], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2461 */ { "sse_maskcmpv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1461 }, #else { 0, output_1461, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_maskcmpv4sf3 }, &operand_data[2654], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2461 */ { "avx_maskcmpv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1462 }, #else { 0, output_1462, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_maskcmpv4df3 }, &operand_data[2658], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2461 */ { "sse2_maskcmpv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1463 }, #else { 0, output_1463, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_maskcmpv2df3 }, &operand_data[2662], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2476 */ { "sse_vmmaskcmpv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1464 }, #else { 0, output_1464, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_vmmaskcmpv4sf3 }, &operand_data[2654], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2476 */ { "sse2_vmmaskcmpv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1465 }, #else { 0, output_1465, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_vmmaskcmpv2df3 }, &operand_data[2662], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv16si3 }, &operand_data[2666], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpd\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv16si3_mask }, &operand_data[2666], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv16si3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpd\t{%3, %r4%2, %1, %0|%0, %1, %2%r4, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv16si3_round }, &operand_data[2671], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv16si3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpd\t{%3, %r5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%r5, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv16si3_mask_round }, &operand_data[2676], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv8si3 }, &operand_data[2682], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpd\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv8si3_mask }, &operand_data[2682], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv4si3 }, &operand_data[2687], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpd\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv4si3_mask }, &operand_data[2687], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpq\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv8di3 }, &operand_data[2692], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpq\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv8di3_mask }, &operand_data[2692], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv8di3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpq\t{%3, %r4%2, %1, %0|%0, %1, %2%r4, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv8di3_round }, &operand_data[2697], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv8di3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpq\t{%3, %r5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%r5, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv8di3_mask_round }, &operand_data[2702], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpq\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv4di3 }, &operand_data[2708], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpq\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv4di3_mask }, &operand_data[2708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpq\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv2di3 }, &operand_data[2713], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpq\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv2di3_mask }, &operand_data[2713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpps\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv16sf3 }, &operand_data[2718], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpps\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv16sf3_mask }, &operand_data[2718], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpps\t{%3, %r4%2, %1, %0|%0, %1, %2%r4, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv16sf3_round }, &operand_data[2723], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpps\t{%3, %r5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%r5, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv16sf3_mask_round }, &operand_data[2728], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpps\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv8sf3 }, &operand_data[2734], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpps\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv8sf3_mask }, &operand_data[2734], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpps\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv4sf3 }, &operand_data[2739], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpps\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv4sf3_mask }, &operand_data[2739], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmppd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv8df3 }, &operand_data[2744], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmppd\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv8df3_mask }, &operand_data[2744], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmppd\t{%3, %r4%2, %1, %0|%0, %1, %2%r4, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv8df3_round }, &operand_data[2749], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512f_cmpv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmppd\t{%3, %r5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%r5, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cmpv8df3_mask_round }, &operand_data[2754], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmppd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv4df3 }, &operand_data[2760], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmppd\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv4df3_mask }, &operand_data[2760], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmppd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv2df3 }, &operand_data[2765], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2505 */ { "avx512vl_cmpv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmppd\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv2df3_mask }, &operand_data[2765], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512bw_cmpv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpb\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_cmpv64qi3 }, &operand_data[2770], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512bw_cmpv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpb\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_cmpv64qi3_mask }, &operand_data[2770], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512vl_cmpv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpb\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv16qi3 }, &operand_data[2775], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512vl_cmpv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpb\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv16qi3_mask }, &operand_data[2775], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512vl_cmpv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpb\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv32qi3 }, &operand_data[2780], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512vl_cmpv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpb\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv32qi3_mask }, &operand_data[2780], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512bw_cmpv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpw\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_cmpv32hi3 }, &operand_data[2785], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512bw_cmpv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpw\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_cmpv32hi3_mask }, &operand_data[2785], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512vl_cmpv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpw\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv16hi3 }, &operand_data[2790], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512vl_cmpv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpw\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv16hi3_mask }, &operand_data[2790], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512vl_cmpv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpw\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv8hi3 }, &operand_data[2795], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2519 */ { "avx512vl_cmpv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpw\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cmpv8hi3_mask }, &operand_data[2795], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512bw_ucmpv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpub\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ucmpv64qi3 }, &operand_data[2770], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512bw_ucmpv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpub\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ucmpv64qi3_mask }, &operand_data[2770], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512vl_ucmpv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpub\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv16qi3 }, &operand_data[2775], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512vl_ucmpv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpub\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv16qi3_mask }, &operand_data[2775], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512vl_ucmpv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpub\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv32qi3 }, &operand_data[2780], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512vl_ucmpv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpub\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv32qi3_mask }, &operand_data[2780], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512bw_ucmpv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuw\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ucmpv32hi3 }, &operand_data[2785], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512bw_ucmpv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuw\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ucmpv32hi3_mask }, &operand_data[2785], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512vl_ucmpv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuw\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv16hi3 }, &operand_data[2790], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512vl_ucmpv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuw\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv16hi3_mask }, &operand_data[2790], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512vl_ucmpv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuw\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv8hi3 }, &operand_data[2795], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2533 */ { "avx512vl_ucmpv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuw\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv8hi3_mask }, &operand_data[2795], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512f_ucmpv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpud\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ucmpv16si3 }, &operand_data[2666], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512f_ucmpv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpud\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ucmpv16si3_mask }, &operand_data[2666], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512vl_ucmpv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpud\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv8si3 }, &operand_data[2682], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512vl_ucmpv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpud\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv8si3_mask }, &operand_data[2682], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512vl_ucmpv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpud\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv4si3 }, &operand_data[2687], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512vl_ucmpv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpud\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv4si3_mask }, &operand_data[2687], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512f_ucmpv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuq\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ucmpv8di3 }, &operand_data[2692], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512f_ucmpv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuq\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ucmpv8di3_mask }, &operand_data[2692], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512vl_ucmpv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuq\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv4di3 }, &operand_data[2708], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512vl_ucmpv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuq\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv4di3_mask }, &operand_data[2708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512vl_ucmpv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuq\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv2di3 }, &operand_data[2713], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2547 */ { "avx512vl_ucmpv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpuq\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ucmpv2di3_mask }, &operand_data[2713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2561 */ { "avx512f_vmcmpv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpss\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmcmpv4sf3 }, &operand_data[2739], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2561 */ { "avx512f_vmcmpv4sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpss\t{%3, %r4%2, %1, %0|%0, %1, %2%r4, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmcmpv4sf3_round }, &operand_data[2800], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2561 */ { "avx512f_vmcmpv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmcmpv2df3 }, &operand_data[2765], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2561 */ { "avx512f_vmcmpv2df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpsd\t{%3, %r4%2, %1, %0|%0, %1, %2%r4, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmcmpv2df3_round }, &operand_data[2805], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2577 */ { "avx512f_vmcmpv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpss\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmcmpv4sf3_mask }, &operand_data[2739], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2577 */ { "avx512f_vmcmpv4sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpss\t{%3, %r5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%r5, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmcmpv4sf3_mask_round }, &operand_data[2810], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2577 */ { "avx512f_vmcmpv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpsd\t{%3, %2, %1, %0%{%4%}|%0%{%4%}, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmcmpv2df3_mask }, &operand_data[2765], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2577 */ { "avx512f_vmcmpv2df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmpsd\t{%3, %r5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%r5, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmcmpv2df3_mask_round }, &operand_data[2816], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2595 */ { "avx512f_maskcmpv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmp%D3ps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_maskcmpv16sf3 }, &operand_data[2822], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2595 */ { "avx512f_maskcmpv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmp%D3ps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_maskcmpv8sf3 }, &operand_data[2826], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2595 */ { "avx512f_maskcmpv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmp%D3ps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_maskcmpv4sf3 }, &operand_data[2830], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2595 */ { "avx512f_maskcmpv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmp%D3pd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_maskcmpv8df3 }, &operand_data[2834], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2595 */ { "avx512f_maskcmpv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmp%D3pd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_maskcmpv4df3 }, &operand_data[2838], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2595 */ { "avx512f_maskcmpv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcmp%D3pd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_maskcmpv2df3 }, &operand_data[2842], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2607 */ { "sse_comi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcomiss\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_comi }, &operand_data[1948], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2607 */ { "sse_comi_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcomiss\t{%r2%1, %0|%0, %k1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_comi_round }, &operand_data[2846], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2607 */ { "sse2_comi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcomisd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_comi }, &operand_data[1960], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2607 */ { "sse2_comi_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcomisd\t{%r2%1, %0|%0, %q1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_comi_round }, &operand_data[2849], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2627 */ { "sse_ucomi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vucomiss\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_ucomi }, &operand_data[1948], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2627 */ { "sse_ucomi_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vucomiss\t{%r2%1, %0|%0, %k1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_ucomi_round }, &operand_data[2846], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2627 */ { "sse2_ucomi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vucomisd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ucomi }, &operand_data[1960], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2627 */ { "sse2_ucomi_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vucomisd\t{%r2%1, %0|%0, %q1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ucomi_round }, &operand_data[2849], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2704 */ { "avx_andnotv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1556 }, #else { 0, 0, output_1556 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_andnotv8sf3 }, &operand_data[2383], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2704 */ { "avx_andnotv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1557 }, #else { 0, 0, output_1557 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_andnotv8sf3_mask }, &operand_data[2383], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2704 */ { "sse_andnotv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1558 }, #else { 0, 0, output_1558 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_andnotv4sf3 }, &operand_data[2364], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2704 */ { "sse_andnotv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1559 }, #else { 0, 0, output_1559 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_andnotv4sf3_mask }, &operand_data[2388], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2704 */ { "avx_andnotv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1560 }, #else { 0, 0, output_1560 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_andnotv4df3 }, &operand_data[2398], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2704 */ { "avx_andnotv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1561 }, #else { 0, 0, output_1561 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_andnotv4df3_mask }, &operand_data[2398], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2704 */ { "sse2_andnotv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1562 }, #else { 0, 0, output_1562 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_andnotv2df3 }, &operand_data[2371], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2704 */ { "sse2_andnotv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1563 }, #else { 0, 0, output_1563 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_andnotv2df3_mask }, &operand_data[2403], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2763 */ { "avx512f_andnotv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1564 }, #else { 0, 0, output_1564 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_andnotv16sf3 }, &operand_data[1939], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2763 */ { "avx512f_andnotv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1565 }, #else { 0, 0, output_1565 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_andnotv16sf3_mask }, &operand_data[2852], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2763 */ { "avx512f_andnotv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1566 }, #else { 0, 0, output_1566 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_andnotv8df3 }, &operand_data[1951], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2763 */ { "avx512f_andnotv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1567 }, #else { 0, 0, output_1567 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_andnotv8df3_mask }, &operand_data[2857], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*andv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1568 }, #else { 0, 0, output_1568 }, #endif { 0 }, &operand_data[2184], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*andv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1569 }, #else { 0, 0, output_1569 }, #endif { 0 }, &operand_data[2191], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*iorv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1570 }, #else { 0, 0, output_1570 }, #endif { 0 }, &operand_data[2184], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*iorv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1571 }, #else { 0, 0, output_1571 }, #endif { 0 }, &operand_data[2191], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*xorv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1572 }, #else { 0, 0, output_1572 }, #endif { 0 }, &operand_data[2184], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*xorv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1573 }, #else { 0, 0, output_1573 }, #endif { 0 }, &operand_data[2191], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*andv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1574 }, #else { 0, 0, output_1574 }, #endif { 0 }, &operand_data[2220], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*andv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1575 }, #else { 0, 0, output_1575 }, #endif { 0 }, &operand_data[2227], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*iorv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1576 }, #else { 0, 0, output_1576 }, #endif { 0 }, &operand_data[2220], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*iorv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1577 }, #else { 0, 0, output_1577 }, #endif { 0 }, &operand_data[2227], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*xorv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1578 }, #else { 0, 0, output_1578 }, #endif { 0 }, &operand_data[2220], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*xorv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1579 }, #else { 0, 0, output_1579 }, #endif { 0 }, &operand_data[2227], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*andv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1580 }, #else { 0, 0, output_1580 }, #endif { 0 }, &operand_data[2292], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*andv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1581 }, #else { 0, 0, output_1581 }, #endif { 0 }, &operand_data[2299], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*iorv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1582 }, #else { 0, 0, output_1582 }, #endif { 0 }, &operand_data[2292], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*iorv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1583 }, #else { 0, 0, output_1583 }, #endif { 0 }, &operand_data[2299], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*xorv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1584 }, #else { 0, 0, output_1584 }, #endif { 0 }, &operand_data[2292], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*xorv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1585 }, #else { 0, 0, output_1585 }, #endif { 0 }, &operand_data[2299], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*andv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1586 }, #else { 0, 0, output_1586 }, #endif { 0 }, &operand_data[2328], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*andv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1587 }, #else { 0, 0, output_1587 }, #endif { 0 }, &operand_data[2335], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*iorv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1588 }, #else { 0, 0, output_1588 }, #endif { 0 }, &operand_data[2328], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*iorv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1589 }, #else { 0, 0, output_1589 }, #endif { 0 }, &operand_data[2335], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*xorv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1590 }, #else { 0, 0, output_1590 }, #endif { 0 }, &operand_data[2328], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2810 */ { "*xorv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1591 }, #else { 0, 0, output_1591 }, #endif { 0 }, &operand_data[2335], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*andv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1592 }, #else { 0, 0, output_1592 }, #endif { 0 }, &operand_data[2862], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*andv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1593 }, #else { 0, 0, output_1593 }, #endif { 0 }, &operand_data[2862], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*iorv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1594 }, #else { 0, 0, output_1594 }, #endif { 0 }, &operand_data[2862], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*iorv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1595 }, #else { 0, 0, output_1595 }, #endif { 0 }, &operand_data[2862], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*xorv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1596 }, #else { 0, 0, output_1596 }, #endif { 0 }, &operand_data[2862], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*xorv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1597 }, #else { 0, 0, output_1597 }, #endif { 0 }, &operand_data[2862], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*andv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1598 }, #else { 0, 0, output_1598 }, #endif { 0 }, &operand_data[2867], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*andv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1599 }, #else { 0, 0, output_1599 }, #endif { 0 }, &operand_data[2867], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*iorv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1600 }, #else { 0, 0, output_1600 }, #endif { 0 }, &operand_data[2867], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*iorv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1601 }, #else { 0, 0, output_1601 }, #endif { 0 }, &operand_data[2867], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*xorv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1602 }, #else { 0, 0, output_1602 }, #endif { 0 }, &operand_data[2867], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2868 */ { "*xorv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1603 }, #else { 0, 0, output_1603 }, #endif { 0 }, &operand_data[2867], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2921 */ { "*andnotsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1604 }, #else { 0, 0, output_1604 }, #endif { 0 }, &operand_data[2872], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2921 */ { "*andnotdf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1605 }, #else { 0, 0, output_1605 }, #endif { 0 }, &operand_data[2875], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2963 */ { "*andnottf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1606 }, #else { 0, 0, output_1606 }, #endif { 0 }, &operand_data[2878], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3010 */ { "*andsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1607 }, #else { 0, 0, output_1607 }, #endif { 0 }, &operand_data[2881], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3010 */ { "*iorsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1608 }, #else { 0, 0, output_1608 }, #endif { 0 }, &operand_data[2881], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3010 */ { "*xorsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1609 }, #else { 0, 0, output_1609 }, #endif { 0 }, &operand_data[2881], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3010 */ { "*anddf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1610 }, #else { 0, 0, output_1610 }, #endif { 0 }, &operand_data[2884], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3010 */ { "*iordf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1611 }, #else { 0, 0, output_1611 }, #endif { 0 }, &operand_data[2884], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3010 */ { "*xordf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1612 }, #else { 0, 0, output_1612 }, #endif { 0 }, &operand_data[2884], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3059 */ { "*andtf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1613 }, #else { 0, 0, output_1613 }, #endif { 0 }, &operand_data[2887], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3059 */ { "*iortf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1614 }, #else { 0, 0, output_1614 }, #endif { 0 }, &operand_data[2887], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3059 */ { "*xortf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_1615 }, #else { 0, 0, output_1615 }, #endif { 0 }, &operand_data[2887], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3195 */ { "*fma_fmadd_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1616 }, #else { 0, output_1616, 0 }, #endif { 0 }, &operand_data[2890], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3195 */ { "*fma_fmadd_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1617 }, #else { 0, output_1617, 0 }, #endif { 0 }, &operand_data[2894], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3195 */ { "*fma_fmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1618 }, #else { 0, output_1618, 0 }, #endif { 0 }, &operand_data[2898], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3195 */ { "*fma_fmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1619 }, #else { 0, output_1619, 0 }, #endif { 0 }, &operand_data[2902], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3195 */ { "*fma_fmadd_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1620 }, #else { 0, output_1620, 0 }, #endif { 0 }, &operand_data[2906], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3195 */ { "*fma_fmadd_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1621 }, #else { 0, output_1621, 0 }, #endif { 0 }, &operand_data[2910], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "*fma_fmadd_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1622 }, #else { 0, output_1622, 0 }, #endif { 0 }, &operand_data[2914], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "*fma_fmadd_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1623 }, #else { 0, output_1623, 0 }, #endif { 0 }, &operand_data[2918], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "*fma_fmadd_v16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1624 }, #else { 0, output_1624, 0 }, #endif { 0 }, &operand_data[2922], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "fma_fmadd_v16sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1625 }, #else { 0, output_1625, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmadd_v16sf_maskz_1 }, &operand_data[2927], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "fma_fmadd_v16sf_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1626 }, #else { 0, output_1626, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmadd_v16sf_maskz_1_round }, &operand_data[2933], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "*fma_fmadd_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1627 }, #else { 0, output_1627, 0 }, #endif { 0 }, &operand_data[2940], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "fma_fmadd_v8sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1628 }, #else { 0, output_1628, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmadd_v8sf_maskz_1 }, &operand_data[2940], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "*fma_fmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1629 }, #else { 0, output_1629, 0 }, #endif { 0 }, &operand_data[2946], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "fma_fmadd_v4sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1630 }, #else { 0, output_1630, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmadd_v4sf_maskz_1 }, &operand_data[2946], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "*fma_fmadd_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1631 }, #else { 0, output_1631, 0 }, #endif { 0 }, &operand_data[2952], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "*fma_fmadd_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1632 }, #else { 0, output_1632, 0 }, #endif { 0 }, &operand_data[2956], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "*fma_fmadd_v8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1633 }, #else { 0, output_1633, 0 }, #endif { 0 }, &operand_data[2960], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "fma_fmadd_v8df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1634 }, #else { 0, output_1634, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmadd_v8df_maskz_1 }, &operand_data[2965], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "fma_fmadd_v8df_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1635 }, #else { 0, output_1635, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmadd_v8df_maskz_1_round }, &operand_data[2971], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "*fma_fmadd_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1636 }, #else { 0, output_1636, 0 }, #endif { 0 }, &operand_data[2978], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "fma_fmadd_v4df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1637 }, #else { 0, output_1637, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmadd_v4df_maskz_1 }, &operand_data[2978], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "*fma_fmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1638 }, #else { 0, output_1638, 0 }, #endif { 0 }, &operand_data[2984], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3217 */ { "fma_fmadd_v2df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1639 }, #else { 0, output_1639, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmadd_v2df_maskz_1 }, &operand_data[2984], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3231 */ { "avx512f_fmadd_v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1640 }, #else { 0, output_1640, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v16sf_mask }, &operand_data[2990], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3231 */ { "avx512f_fmadd_v16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1641 }, #else { 0, output_1641, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v16sf_mask_round }, &operand_data[2995], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3231 */ { "avx512vl_fmadd_v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1642 }, #else { 0, output_1642, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v8sf_mask }, &operand_data[3001], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3231 */ { "avx512vl_fmadd_v4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1643 }, #else { 0, output_1643, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v4sf_mask }, &operand_data[3006], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3231 */ { "avx512f_fmadd_v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1644 }, #else { 0, output_1644, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v8df_mask }, &operand_data[3011], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3231 */ { "avx512f_fmadd_v8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1645 }, #else { 0, output_1645, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v8df_mask_round }, &operand_data[3016], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3231 */ { "avx512vl_fmadd_v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1646 }, #else { 0, output_1646, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v4df_mask }, &operand_data[3022], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3231 */ { "avx512vl_fmadd_v2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1647 }, #else { 0, output_1647, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v2df_mask }, &operand_data[3027], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512f_fmadd_v16sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v16sf_mask3 }, &operand_data[3032], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512f_fmadd_v16sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v16sf_mask3_round }, &operand_data[3037], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512vl_fmadd_v8sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v8sf_mask3 }, &operand_data[3043], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512vl_fmadd_v8sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v8sf_mask3_round }, &operand_data[3048], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512vl_fmadd_v4sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v4sf_mask3 }, &operand_data[3054], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512vl_fmadd_v4sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v4sf_mask3_round }, &operand_data[3059], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512f_fmadd_v8df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v8df_mask3 }, &operand_data[3065], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512f_fmadd_v8df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v8df_mask3_round }, &operand_data[3070], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512vl_fmadd_v4df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v4df_mask3 }, &operand_data[3076], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512vl_fmadd_v4df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v4df_mask3_round }, &operand_data[3081], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512vl_fmadd_v2df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v2df_mask3 }, &operand_data[3087], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3248 */ { "avx512vl_fmadd_v2df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmadd231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v2df_mask3_round }, &operand_data[3092], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3263 */ { "*fma_fmsub_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1660 }, #else { 0, output_1660, 0 }, #endif { 0 }, &operand_data[2890], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3263 */ { "*fma_fmsub_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1661 }, #else { 0, output_1661, 0 }, #endif { 0 }, &operand_data[2894], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3263 */ { "*fma_fmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1662 }, #else { 0, output_1662, 0 }, #endif { 0 }, &operand_data[2898], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3263 */ { "*fma_fmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1663 }, #else { 0, output_1663, 0 }, #endif { 0 }, &operand_data[2902], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3263 */ { "*fma_fmsub_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1664 }, #else { 0, output_1664, 0 }, #endif { 0 }, &operand_data[2906], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3263 */ { "*fma_fmsub_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1665 }, #else { 0, output_1665, 0 }, #endif { 0 }, &operand_data[2910], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "*fma_fmsub_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1666 }, #else { 0, output_1666, 0 }, #endif { 0 }, &operand_data[2914], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "*fma_fmsub_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1667 }, #else { 0, output_1667, 0 }, #endif { 0 }, &operand_data[2918], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "*fma_fmsub_v16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1668 }, #else { 0, output_1668, 0 }, #endif { 0 }, &operand_data[2922], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "fma_fmsub_v16sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1669 }, #else { 0, output_1669, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsub_v16sf_maskz_1 }, &operand_data[2927], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "fma_fmsub_v16sf_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1670 }, #else { 0, output_1670, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsub_v16sf_maskz_1_round }, &operand_data[2933], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "*fma_fmsub_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1671 }, #else { 0, output_1671, 0 }, #endif { 0 }, &operand_data[2940], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "fma_fmsub_v8sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1672 }, #else { 0, output_1672, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsub_v8sf_maskz_1 }, &operand_data[2940], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "*fma_fmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1673 }, #else { 0, output_1673, 0 }, #endif { 0 }, &operand_data[2946], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "fma_fmsub_v4sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1674 }, #else { 0, output_1674, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsub_v4sf_maskz_1 }, &operand_data[2946], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "*fma_fmsub_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1675 }, #else { 0, output_1675, 0 }, #endif { 0 }, &operand_data[2952], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "*fma_fmsub_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1676 }, #else { 0, output_1676, 0 }, #endif { 0 }, &operand_data[2956], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "*fma_fmsub_v8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1677 }, #else { 0, output_1677, 0 }, #endif { 0 }, &operand_data[2960], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "fma_fmsub_v8df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1678 }, #else { 0, output_1678, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsub_v8df_maskz_1 }, &operand_data[2965], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "fma_fmsub_v8df_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1679 }, #else { 0, output_1679, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsub_v8df_maskz_1_round }, &operand_data[2971], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "*fma_fmsub_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1680 }, #else { 0, output_1680, 0 }, #endif { 0 }, &operand_data[2978], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "fma_fmsub_v4df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1681 }, #else { 0, output_1681, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsub_v4df_maskz_1 }, &operand_data[2978], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "*fma_fmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1682 }, #else { 0, output_1682, 0 }, #endif { 0 }, &operand_data[2984], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3281 */ { "fma_fmsub_v2df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1683 }, #else { 0, output_1683, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsub_v2df_maskz_1 }, &operand_data[2984], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512f_fmsub_v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1684 }, #else { 0, output_1684, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsub_v16sf_mask }, &operand_data[2990], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512f_fmsub_v16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1685 }, #else { 0, output_1685, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsub_v16sf_mask_round }, &operand_data[2995], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512vl_fmsub_v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1686 }, #else { 0, output_1686, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v8sf_mask }, &operand_data[3001], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512vl_fmsub_v8sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1687 }, #else { 0, output_1687, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v8sf_mask_round }, &operand_data[3098], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512vl_fmsub_v4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1688 }, #else { 0, output_1688, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v4sf_mask }, &operand_data[3006], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512vl_fmsub_v4sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1689 }, #else { 0, output_1689, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v4sf_mask_round }, &operand_data[3104], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512f_fmsub_v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1690 }, #else { 0, output_1690, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsub_v8df_mask }, &operand_data[3011], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512f_fmsub_v8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1691 }, #else { 0, output_1691, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsub_v8df_mask_round }, &operand_data[3016], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512vl_fmsub_v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1692 }, #else { 0, output_1692, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v4df_mask }, &operand_data[3022], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512vl_fmsub_v4df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1693 }, #else { 0, output_1693, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v4df_mask_round }, &operand_data[3110], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512vl_fmsub_v2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1694 }, #else { 0, output_1694, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v2df_mask }, &operand_data[3027], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3296 */ { "avx512vl_fmsub_v2df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1695 }, #else { 0, output_1695, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v2df_mask_round }, &operand_data[3116], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3314 */ { "avx512f_fmsub_v16sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsub231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsub_v16sf_mask3 }, &operand_data[3122], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3314 */ { "avx512f_fmsub_v16sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsub231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsub_v16sf_mask3_round }, &operand_data[3127], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3314 */ { "avx512vl_fmsub_v8sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsub231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v8sf_mask3 }, &operand_data[3133], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3314 */ { "avx512vl_fmsub_v4sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsub231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v4sf_mask3 }, &operand_data[3138], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3314 */ { "avx512f_fmsub_v8df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsub231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsub_v8df_mask3 }, &operand_data[3143], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3314 */ { "avx512f_fmsub_v8df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsub231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsub_v8df_mask3_round }, &operand_data[3148], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3314 */ { "avx512vl_fmsub_v4df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsub231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v4df_mask3 }, &operand_data[3154], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3314 */ { "avx512vl_fmsub_v2df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsub231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsub_v2df_mask3 }, &operand_data[3159], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3330 */ { "*fma_fnmadd_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1704 }, #else { 0, output_1704, 0 }, #endif { 0 }, &operand_data[2890], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3330 */ { "*fma_fnmadd_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1705 }, #else { 0, output_1705, 0 }, #endif { 0 }, &operand_data[2894], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3330 */ { "*fma_fnmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1706 }, #else { 0, output_1706, 0 }, #endif { 0 }, &operand_data[2898], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3330 */ { "*fma_fnmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1707 }, #else { 0, output_1707, 0 }, #endif { 0 }, &operand_data[2902], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3330 */ { "*fma_fnmadd_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1708 }, #else { 0, output_1708, 0 }, #endif { 0 }, &operand_data[2906], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3330 */ { "*fma_fnmadd_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1709 }, #else { 0, output_1709, 0 }, #endif { 0 }, &operand_data[2910], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "*fma_fnmadd_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1710 }, #else { 0, output_1710, 0 }, #endif { 0 }, &operand_data[2914], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "*fma_fnmadd_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1711 }, #else { 0, output_1711, 0 }, #endif { 0 }, &operand_data[2918], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "*fma_fnmadd_v16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1712 }, #else { 0, output_1712, 0 }, #endif { 0 }, &operand_data[2922], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "fma_fnmadd_v16sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1713 }, #else { 0, output_1713, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmadd_v16sf_maskz_1 }, &operand_data[2927], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "fma_fnmadd_v16sf_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1714 }, #else { 0, output_1714, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmadd_v16sf_maskz_1_round }, &operand_data[2933], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "*fma_fnmadd_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1715 }, #else { 0, output_1715, 0 }, #endif { 0 }, &operand_data[2940], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "fma_fnmadd_v8sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1716 }, #else { 0, output_1716, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmadd_v8sf_maskz_1 }, &operand_data[2940], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "*fma_fnmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1717 }, #else { 0, output_1717, 0 }, #endif { 0 }, &operand_data[2946], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "fma_fnmadd_v4sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1718 }, #else { 0, output_1718, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmadd_v4sf_maskz_1 }, &operand_data[2946], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "*fma_fnmadd_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1719 }, #else { 0, output_1719, 0 }, #endif { 0 }, &operand_data[2952], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "*fma_fnmadd_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1720 }, #else { 0, output_1720, 0 }, #endif { 0 }, &operand_data[2956], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "*fma_fnmadd_v8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1721 }, #else { 0, output_1721, 0 }, #endif { 0 }, &operand_data[2960], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "fma_fnmadd_v8df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1722 }, #else { 0, output_1722, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmadd_v8df_maskz_1 }, &operand_data[2965], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "fma_fnmadd_v8df_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1723 }, #else { 0, output_1723, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmadd_v8df_maskz_1_round }, &operand_data[2971], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "*fma_fnmadd_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1724 }, #else { 0, output_1724, 0 }, #endif { 0 }, &operand_data[2978], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "fma_fnmadd_v4df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1725 }, #else { 0, output_1725, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmadd_v4df_maskz_1 }, &operand_data[2978], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "*fma_fnmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1726 }, #else { 0, output_1726, 0 }, #endif { 0 }, &operand_data[2984], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3348 */ { "fma_fnmadd_v2df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1727 }, #else { 0, output_1727, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmadd_v2df_maskz_1 }, &operand_data[2984], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3363 */ { "avx512f_fnmadd_v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1728 }, #else { 0, output_1728, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmadd_v16sf_mask }, &operand_data[2990], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3363 */ { "avx512f_fnmadd_v16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1729 }, #else { 0, output_1729, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmadd_v16sf_mask_round }, &operand_data[2995], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3363 */ { "avx512vl_fnmadd_v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1730 }, #else { 0, output_1730, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmadd_v8sf_mask }, &operand_data[3001], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3363 */ { "avx512vl_fnmadd_v4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1731 }, #else { 0, output_1731, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmadd_v4sf_mask }, &operand_data[3006], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3363 */ { "avx512f_fnmadd_v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1732 }, #else { 0, output_1732, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmadd_v8df_mask }, &operand_data[3011], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3363 */ { "avx512f_fnmadd_v8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1733 }, #else { 0, output_1733, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmadd_v8df_mask_round }, &operand_data[3016], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3363 */ { "avx512vl_fnmadd_v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1734 }, #else { 0, output_1734, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmadd_v4df_mask }, &operand_data[3022], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3363 */ { "avx512vl_fnmadd_v2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1735 }, #else { 0, output_1735, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmadd_v2df_mask }, &operand_data[3027], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3381 */ { "avx512f_fnmadd_v16sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmadd231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmadd_v16sf_mask3 }, &operand_data[3122], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3381 */ { "avx512f_fnmadd_v16sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmadd231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmadd_v16sf_mask3_round }, &operand_data[3127], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3381 */ { "avx512vl_fnmadd_v8sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmadd231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmadd_v8sf_mask3 }, &operand_data[3133], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3381 */ { "avx512vl_fnmadd_v4sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmadd231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmadd_v4sf_mask3 }, &operand_data[3138], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3381 */ { "avx512f_fnmadd_v8df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmadd231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmadd_v8df_mask3 }, &operand_data[3143], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3381 */ { "avx512f_fnmadd_v8df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmadd231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmadd_v8df_mask3_round }, &operand_data[3148], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3381 */ { "avx512vl_fnmadd_v4df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmadd231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmadd_v4df_mask3 }, &operand_data[3154], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3381 */ { "avx512vl_fnmadd_v2df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmadd231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmadd_v2df_mask3 }, &operand_data[3159], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1744 }, #else { 0, output_1744, 0 }, #endif { 0 }, &operand_data[2890], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1745 }, #else { 0, output_1745, 0 }, #endif { 0 }, &operand_data[3164], 5, 5, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1746 }, #else { 0, output_1746, 0 }, #endif { 0 }, &operand_data[2894], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1747 }, #else { 0, output_1747, 0 }, #endif { 0 }, &operand_data[3169], 5, 5, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1748 }, #else { 0, output_1748, 0 }, #endif { 0 }, &operand_data[2898], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1749 }, #else { 0, output_1749, 0 }, #endif { 0 }, &operand_data[3174], 5, 5, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1750 }, #else { 0, output_1750, 0 }, #endif { 0 }, &operand_data[3179], 6, 6, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1751 }, #else { 0, output_1751, 0 }, #endif { 0 }, &operand_data[3179], 7, 7, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1752 }, #else { 0, output_1752, 0 }, #endif { 0 }, &operand_data[2902], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1753 }, #else { 0, output_1753, 0 }, #endif { 0 }, &operand_data[3186], 5, 5, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1754 }, #else { 0, output_1754, 0 }, #endif { 0 }, &operand_data[3191], 6, 6, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1755 }, #else { 0, output_1755, 0 }, #endif { 0 }, &operand_data[3191], 7, 7, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1756 }, #else { 0, output_1756, 0 }, #endif { 0 }, &operand_data[2906], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1757 }, #else { 0, output_1757, 0 }, #endif { 0 }, &operand_data[3198], 5, 5, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1758 }, #else { 0, output_1758, 0 }, #endif { 0 }, &operand_data[3203], 6, 6, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1759 }, #else { 0, output_1759, 0 }, #endif { 0 }, &operand_data[3203], 7, 7, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1760 }, #else { 0, output_1760, 0 }, #endif { 0 }, &operand_data[2910], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1761 }, #else { 0, output_1761, 0 }, #endif { 0 }, &operand_data[3210], 5, 5, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1762 }, #else { 0, output_1762, 0 }, #endif { 0 }, &operand_data[3215], 6, 6, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3397 */ { "*fma_fnmsub_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1763 }, #else { 0, output_1763, 0 }, #endif { 0 }, &operand_data[3215], 7, 7, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "*fma_fnmsub_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1764 }, #else { 0, output_1764, 0 }, #endif { 0 }, &operand_data[2914], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "*fma_fnmsub_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1765 }, #else { 0, output_1765, 0 }, #endif { 0 }, &operand_data[2918], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "*fma_fnmsub_v16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1766 }, #else { 0, output_1766, 0 }, #endif { 0 }, &operand_data[2922], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "fma_fnmsub_v16sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1767 }, #else { 0, output_1767, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmsub_v16sf_maskz_1 }, &operand_data[2927], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "fma_fnmsub_v16sf_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1768 }, #else { 0, output_1768, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmsub_v16sf_maskz_1_round }, &operand_data[2933], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "*fma_fnmsub_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1769 }, #else { 0, output_1769, 0 }, #endif { 0 }, &operand_data[2940], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "fma_fnmsub_v8sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1770 }, #else { 0, output_1770, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmsub_v8sf_maskz_1 }, &operand_data[2940], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "*fma_fnmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1771 }, #else { 0, output_1771, 0 }, #endif { 0 }, &operand_data[2946], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "fma_fnmsub_v4sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1772 }, #else { 0, output_1772, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmsub_v4sf_maskz_1 }, &operand_data[2946], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "*fma_fnmsub_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1773 }, #else { 0, output_1773, 0 }, #endif { 0 }, &operand_data[2952], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "*fma_fnmsub_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1774 }, #else { 0, output_1774, 0 }, #endif { 0 }, &operand_data[2956], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "*fma_fnmsub_v8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1775 }, #else { 0, output_1775, 0 }, #endif { 0 }, &operand_data[2960], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "fma_fnmsub_v8df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1776 }, #else { 0, output_1776, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmsub_v8df_maskz_1 }, &operand_data[2965], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "fma_fnmsub_v8df_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1777 }, #else { 0, output_1777, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmsub_v8df_maskz_1_round }, &operand_data[2971], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "*fma_fnmsub_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1778 }, #else { 0, output_1778, 0 }, #endif { 0 }, &operand_data[2978], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "fma_fnmsub_v4df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1779 }, #else { 0, output_1779, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmsub_v4df_maskz_1 }, &operand_data[2978], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "*fma_fnmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1780 }, #else { 0, output_1780, 0 }, #endif { 0 }, &operand_data[2984], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3416 */ { "fma_fnmsub_v2df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1781 }, #else { 0, output_1781, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fnmsub_v2df_maskz_1 }, &operand_data[2984], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3432 */ { "avx512f_fnmsub_v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1782 }, #else { 0, output_1782, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmsub_v16sf_mask }, &operand_data[2990], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3432 */ { "avx512f_fnmsub_v16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1783 }, #else { 0, output_1783, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmsub_v16sf_mask_round }, &operand_data[2995], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3432 */ { "avx512vl_fnmsub_v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1784 }, #else { 0, output_1784, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v8sf_mask }, &operand_data[3001], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3432 */ { "avx512vl_fnmsub_v4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1785 }, #else { 0, output_1785, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v4sf_mask }, &operand_data[3006], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3432 */ { "avx512f_fnmsub_v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1786 }, #else { 0, output_1786, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmsub_v8df_mask }, &operand_data[3011], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3432 */ { "avx512f_fnmsub_v8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1787 }, #else { 0, output_1787, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmsub_v8df_mask_round }, &operand_data[3016], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3432 */ { "avx512vl_fnmsub_v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1788 }, #else { 0, output_1788, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v4df_mask }, &operand_data[3022], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3432 */ { "avx512vl_fnmsub_v2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1789 }, #else { 0, output_1789, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v2df_mask }, &operand_data[3027], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512f_fnmsub_v16sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmsub_v16sf_mask3 }, &operand_data[3122], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512f_fnmsub_v16sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmsub_v16sf_mask3_round }, &operand_data[3127], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512vl_fnmsub_v8sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v8sf_mask3 }, &operand_data[3133], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512vl_fnmsub_v8sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v8sf_mask3_round }, &operand_data[3222], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512vl_fnmsub_v4sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v4sf_mask3 }, &operand_data[3138], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512vl_fnmsub_v4sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v4sf_mask3_round }, &operand_data[3228], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512f_fnmsub_v8df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmsub_v8df_mask3 }, &operand_data[3143], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512f_fnmsub_v8df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fnmsub_v8df_mask3_round }, &operand_data[3148], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512vl_fnmsub_v4df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v4df_mask3 }, &operand_data[3154], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512vl_fnmsub_v4df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v4df_mask3_round }, &operand_data[3234], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512vl_fnmsub_v2df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v2df_mask3 }, &operand_data[3159], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3451 */ { "avx512vl_fnmsub_v2df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsub231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fnmsub_v2df_mask3_round }, &operand_data[3240], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3502 */ { "*fma_fmaddsub_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1802 }, #else { 0, output_1802, 0 }, #endif { 0 }, &operand_data[2906], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3502 */ { "*fma_fmaddsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1803 }, #else { 0, output_1803, 0 }, #endif { 0 }, &operand_data[2898], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3502 */ { "*fma_fmaddsub_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1804 }, #else { 0, output_1804, 0 }, #endif { 0 }, &operand_data[2910], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3502 */ { "*fma_fmaddsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1805 }, #else { 0, output_1805, 0 }, #endif { 0 }, &operand_data[2902], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "*fma_fmaddsub_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1806 }, #else { 0, output_1806, 0 }, #endif { 0 }, &operand_data[2914], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "*fma_fmaddsub_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1807 }, #else { 0, output_1807, 0 }, #endif { 0 }, &operand_data[2918], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "*fma_fmaddsub_v16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1808 }, #else { 0, output_1808, 0 }, #endif { 0 }, &operand_data[2922], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "fma_fmaddsub_v16sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1809 }, #else { 0, output_1809, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmaddsub_v16sf_maskz_1 }, &operand_data[2927], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "fma_fmaddsub_v16sf_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1810 }, #else { 0, output_1810, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmaddsub_v16sf_maskz_1_round }, &operand_data[2933], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "*fma_fmaddsub_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1811 }, #else { 0, output_1811, 0 }, #endif { 0 }, &operand_data[2940], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "fma_fmaddsub_v8sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1812 }, #else { 0, output_1812, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmaddsub_v8sf_maskz_1 }, &operand_data[2940], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "*fma_fmaddsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1813 }, #else { 0, output_1813, 0 }, #endif { 0 }, &operand_data[2946], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "fma_fmaddsub_v4sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1814 }, #else { 0, output_1814, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmaddsub_v4sf_maskz_1 }, &operand_data[2946], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "*fma_fmaddsub_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1815 }, #else { 0, output_1815, 0 }, #endif { 0 }, &operand_data[2952], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "*fma_fmaddsub_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1816 }, #else { 0, output_1816, 0 }, #endif { 0 }, &operand_data[2956], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "*fma_fmaddsub_v8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1817 }, #else { 0, output_1817, 0 }, #endif { 0 }, &operand_data[2960], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "fma_fmaddsub_v8df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1818 }, #else { 0, output_1818, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmaddsub_v8df_maskz_1 }, &operand_data[2965], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "fma_fmaddsub_v8df_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1819 }, #else { 0, output_1819, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmaddsub_v8df_maskz_1_round }, &operand_data[2971], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "*fma_fmaddsub_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1820 }, #else { 0, output_1820, 0 }, #endif { 0 }, &operand_data[2978], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "fma_fmaddsub_v4df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1821 }, #else { 0, output_1821, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmaddsub_v4df_maskz_1 }, &operand_data[2978], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "*fma_fmaddsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1822 }, #else { 0, output_1822, 0 }, #endif { 0 }, &operand_data[2984], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3520 */ { "fma_fmaddsub_v2df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1823 }, #else { 0, output_1823, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmaddsub_v2df_maskz_1 }, &operand_data[2984], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512f_fmaddsub_v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1824 }, #else { 0, output_1824, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v16sf_mask }, &operand_data[2990], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512f_fmaddsub_v16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1825 }, #else { 0, output_1825, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v16sf_mask_round }, &operand_data[2995], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512vl_fmaddsub_v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1826 }, #else { 0, output_1826, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v8sf_mask }, &operand_data[3001], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512vl_fmaddsub_v8sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1827 }, #else { 0, output_1827, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v8sf_mask_round }, &operand_data[3098], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512vl_fmaddsub_v4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1828 }, #else { 0, output_1828, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4sf_mask }, &operand_data[3006], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512vl_fmaddsub_v4sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1829 }, #else { 0, output_1829, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4sf_mask_round }, &operand_data[3104], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512f_fmaddsub_v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1830 }, #else { 0, output_1830, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v8df_mask }, &operand_data[3011], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512f_fmaddsub_v8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1831 }, #else { 0, output_1831, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v8df_mask_round }, &operand_data[3016], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512vl_fmaddsub_v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1832 }, #else { 0, output_1832, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4df_mask }, &operand_data[3022], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512vl_fmaddsub_v4df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1833 }, #else { 0, output_1833, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4df_mask_round }, &operand_data[3110], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512vl_fmaddsub_v2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1834 }, #else { 0, output_1834, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v2df_mask }, &operand_data[3027], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3535 */ { "avx512vl_fmaddsub_v2df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1835 }, #else { 0, output_1835, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v2df_mask_round }, &operand_data[3116], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512f_fmaddsub_v16sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v16sf_mask3 }, &operand_data[3122], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512f_fmaddsub_v16sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v16sf_mask3_round }, &operand_data[3127], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512vl_fmaddsub_v8sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v8sf_mask3 }, &operand_data[3133], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512vl_fmaddsub_v8sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v8sf_mask3_round }, &operand_data[3222], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512vl_fmaddsub_v4sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4sf_mask3 }, &operand_data[3138], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512vl_fmaddsub_v4sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4sf_mask3_round }, &operand_data[3228], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512f_fmaddsub_v8df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v8df_mask3 }, &operand_data[3143], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512f_fmaddsub_v8df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v8df_mask3_round }, &operand_data[3148], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512vl_fmaddsub_v4df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4df_mask3 }, &operand_data[3154], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512vl_fmaddsub_v4df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4df_mask3_round }, &operand_data[3234], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512vl_fmaddsub_v2df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v2df_mask3 }, &operand_data[3159], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3553 */ { "avx512vl_fmaddsub_v2df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsub231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v2df_mask3_round }, &operand_data[3240], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3569 */ { "*fma_fmsubadd_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1848 }, #else { 0, output_1848, 0 }, #endif { 0 }, &operand_data[2906], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3569 */ { "*fma_fmsubadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1849 }, #else { 0, output_1849, 0 }, #endif { 0 }, &operand_data[2898], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3569 */ { "*fma_fmsubadd_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1850 }, #else { 0, output_1850, 0 }, #endif { 0 }, &operand_data[2910], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3569 */ { "*fma_fmsubadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1851 }, #else { 0, output_1851, 0 }, #endif { 0 }, &operand_data[2902], 4, 4, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "*fma_fmsubadd_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1852 }, #else { 0, output_1852, 0 }, #endif { 0 }, &operand_data[2914], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "*fma_fmsubadd_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1853 }, #else { 0, output_1853, 0 }, #endif { 0 }, &operand_data[2918], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "*fma_fmsubadd_v16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1854 }, #else { 0, output_1854, 0 }, #endif { 0 }, &operand_data[2922], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "fma_fmsubadd_v16sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1855 }, #else { 0, output_1855, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsubadd_v16sf_maskz_1 }, &operand_data[2927], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "fma_fmsubadd_v16sf_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1856 }, #else { 0, output_1856, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsubadd_v16sf_maskz_1_round }, &operand_data[2933], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "*fma_fmsubadd_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1857 }, #else { 0, output_1857, 0 }, #endif { 0 }, &operand_data[2940], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "fma_fmsubadd_v8sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1858 }, #else { 0, output_1858, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsubadd_v8sf_maskz_1 }, &operand_data[2940], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "*fma_fmsubadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1859 }, #else { 0, output_1859, 0 }, #endif { 0 }, &operand_data[2946], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "fma_fmsubadd_v4sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1860 }, #else { 0, output_1860, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsubadd_v4sf_maskz_1 }, &operand_data[2946], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "*fma_fmsubadd_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1861 }, #else { 0, output_1861, 0 }, #endif { 0 }, &operand_data[2952], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "*fma_fmsubadd_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1862 }, #else { 0, output_1862, 0 }, #endif { 0 }, &operand_data[2956], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "*fma_fmsubadd_v8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1863 }, #else { 0, output_1863, 0 }, #endif { 0 }, &operand_data[2960], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "fma_fmsubadd_v8df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1864 }, #else { 0, output_1864, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsubadd_v8df_maskz_1 }, &operand_data[2965], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "fma_fmsubadd_v8df_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1865 }, #else { 0, output_1865, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsubadd_v8df_maskz_1_round }, &operand_data[2971], 7, 7, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "*fma_fmsubadd_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1866 }, #else { 0, output_1866, 0 }, #endif { 0 }, &operand_data[2978], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "fma_fmsubadd_v4df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1867 }, #else { 0, output_1867, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsubadd_v4df_maskz_1 }, &operand_data[2978], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "*fma_fmsubadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1868 }, #else { 0, output_1868, 0 }, #endif { 0 }, &operand_data[2984], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3588 */ { "fma_fmsubadd_v2df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1869 }, #else { 0, output_1869, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma_fmsubadd_v2df_maskz_1 }, &operand_data[2984], 6, 6, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512f_fmsubadd_v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1870 }, #else { 0, output_1870, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsubadd_v16sf_mask }, &operand_data[2990], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512f_fmsubadd_v16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1871 }, #else { 0, output_1871, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsubadd_v16sf_mask_round }, &operand_data[2995], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512vl_fmsubadd_v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1872 }, #else { 0, output_1872, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v8sf_mask }, &operand_data[3001], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512vl_fmsubadd_v8sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1873 }, #else { 0, output_1873, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v8sf_mask_round }, &operand_data[3098], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512vl_fmsubadd_v4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1874 }, #else { 0, output_1874, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v4sf_mask }, &operand_data[3006], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512vl_fmsubadd_v4sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1875 }, #else { 0, output_1875, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v4sf_mask_round }, &operand_data[3104], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512f_fmsubadd_v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1876 }, #else { 0, output_1876, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsubadd_v8df_mask }, &operand_data[3011], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512f_fmsubadd_v8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1877 }, #else { 0, output_1877, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsubadd_v8df_mask_round }, &operand_data[3016], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512vl_fmsubadd_v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1878 }, #else { 0, output_1878, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v4df_mask }, &operand_data[3022], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512vl_fmsubadd_v4df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1879 }, #else { 0, output_1879, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v4df_mask_round }, &operand_data[3110], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512vl_fmsubadd_v2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1880 }, #else { 0, output_1880, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v2df_mask }, &operand_data[3027], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3604 */ { "avx512vl_fmsubadd_v2df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1881 }, #else { 0, output_1881, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v2df_mask_round }, &operand_data[3116], 6, 6, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512f_fmsubadd_v16sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsubadd_v16sf_mask3 }, &operand_data[3122], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512f_fmsubadd_v16sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsubadd_v16sf_mask3_round }, &operand_data[3127], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512vl_fmsubadd_v8sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v8sf_mask3 }, &operand_data[3133], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512vl_fmsubadd_v8sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v8sf_mask3_round }, &operand_data[3222], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512vl_fmsubadd_v4sf_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231ps\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v4sf_mask3 }, &operand_data[3138], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512vl_fmsubadd_v4sf_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231ps\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v4sf_mask3_round }, &operand_data[3228], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512f_fmsubadd_v8df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsubadd_v8df_mask3 }, &operand_data[3143], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512f_fmsubadd_v8df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmsubadd_v8df_mask3_round }, &operand_data[3148], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512vl_fmsubadd_v4df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v4df_mask3 }, &operand_data[3154], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512vl_fmsubadd_v4df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v4df_mask3_round }, &operand_data[3234], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512vl_fmsubadd_v2df_mask3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231pd\t{%2, %1, %0%{%4%}|%0%{%4%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v2df_mask3 }, &operand_data[3159], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3623 */ { "avx512vl_fmsubadd_v2df_mask3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubadd231pd\t{%R5%2, %1, %0%{%4%}|%0%{%4%}, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmsubadd_v2df_mask3_round }, &operand_data[3240], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3654 */ { "*fmai_fmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1894 }, #else { 0, output_1894, 0 }, #endif { 0 }, &operand_data[3246], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3654 */ { "*fmai_fmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1895 }, #else { 0, output_1895, 0 }, #endif { 0 }, &operand_data[3250], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3654 */ { "*fmai_fmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1896 }, #else { 0, output_1896, 0 }, #endif { 0 }, &operand_data[3255], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3654 */ { "*fmai_fmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1897 }, #else { 0, output_1897, 0 }, #endif { 0 }, &operand_data[3259], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3670 */ { "*fmai_fmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1898 }, #else { 0, output_1898, 0 }, #endif { 0 }, &operand_data[3246], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3670 */ { "*fmai_fmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1899 }, #else { 0, output_1899, 0 }, #endif { 0 }, &operand_data[3250], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3670 */ { "*fmai_fmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1900 }, #else { 0, output_1900, 0 }, #endif { 0 }, &operand_data[3255], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3670 */ { "*fmai_fmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1901 }, #else { 0, output_1901, 0 }, #endif { 0 }, &operand_data[3259], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3687 */ { "*fmai_fnmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1902 }, #else { 0, output_1902, 0 }, #endif { 0 }, &operand_data[3246], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3687 */ { "*fmai_fnmadd_v4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1903 }, #else { 0, output_1903, 0 }, #endif { 0 }, &operand_data[3250], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3687 */ { "*fmai_fnmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1904 }, #else { 0, output_1904, 0 }, #endif { 0 }, &operand_data[3255], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3687 */ { "*fmai_fnmadd_v2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1905 }, #else { 0, output_1905, 0 }, #endif { 0 }, &operand_data[3259], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3704 */ { "*fmai_fnmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1906 }, #else { 0, output_1906, 0 }, #endif { 0 }, &operand_data[3246], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3704 */ { "*fmai_fnmsub_v4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1907 }, #else { 0, output_1907, 0 }, #endif { 0 }, &operand_data[3250], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3704 */ { "*fmai_fnmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1908 }, #else { 0, output_1908, 0 }, #endif { 0 }, &operand_data[3255], 4, 4, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3704 */ { "*fmai_fnmsub_v2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1909 }, #else { 0, output_1909, 0 }, #endif { 0 }, &operand_data[3259], 5, 5, 1, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3737 */ { "*fma4i_vmfmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddss\t{%3, %2, %1, %0|%0, %1, %k2, %k3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3264], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3737 */ { "*fma4i_vmfmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmaddsd\t{%3, %2, %1, %0|%0, %1, %q2, %q3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3269], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3751 */ { "*fma4i_vmfmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubss\t{%3, %2, %1, %0|%0, %1, %k2, %k3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3264], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3751 */ { "*fma4i_vmfmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfmsubsd\t{%3, %2, %1, %0|%0, %1, %q2, %q3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3269], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3766 */ { "*fma4i_vmfnmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmaddss\t{%3, %2, %1, %0|%0, %1, %k2, %k3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3264], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3766 */ { "*fma4i_vmfnmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmaddsd\t{%3, %2, %1, %0|%0, %1, %q2, %q3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3269], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3781 */ { "*fma4i_vmfnmsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsubss\t{%3, %2, %1, %0|%0, %1, %k2, %k3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3264], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3781 */ { "*fma4i_vmfnmsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfnmsubsd\t{%3, %2, %1, %0|%0, %1, %q2, %q3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3269], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3803 */ { "sse_cvtpi2ps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cvtpi2ps\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_cvtpi2ps }, &operand_data[3274], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3815 */ { "sse_cvtps2pi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cvtps2pi\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_cvtps2pi }, &operand_data[3277], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3827 */ { "sse_cvttps2pi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cvttps2pi\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_cvttps2pi }, &operand_data[3277], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3839 */ { "sse_cvtsi2ss", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1921 }, #else { 0, output_1921, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_cvtsi2ss }, &operand_data[3279], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3839 */ { "sse_cvtsi2ss_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_1922 }, #else { 0, output_1922, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_cvtsi2ss_round }, &operand_data[3282], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3883 */ { "sse_cvtss2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtss2si\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_cvtss2si }, &operand_data[3286], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3883 */ { "sse_cvtss2si_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtss2si\t{%R2%1, %0|%0, %k1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_cvtss2si_round }, &operand_data[3288], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3899 */ { "sse_cvtss2si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtss2si\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_cvtss2si_2 }, &operand_data[3291], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3943 */ { "sse_cvttss2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvttss2si\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_cvttss2si }, &operand_data[3286], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3943 */ { "sse_cvttss2si_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvttss2si\t{%r2%1, %0|%0, %k1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_cvttss2si_round }, &operand_data[3293], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3975 */ { "cvtusi2ss32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtusi2ss\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cvtusi2ss32 }, &operand_data[3296], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3975 */ { "cvtusi2ss32_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtusi2ss\t{%R3%2, %1, %0|%0, %1, %2%R3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cvtusi2ss32_round }, &operand_data[3299], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3975 */ { "cvtusi2sd32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtusi2sd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cvtusi2sd32 }, &operand_data[3303], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4003 */ { "floatv16siv16sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtdq2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv16siv16sf2 }, &operand_data[3306], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4003 */ { "floatv16siv16sf2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtdq2ps\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv16siv16sf2_round }, &operand_data[3308], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4003 */ { "floatv16siv16sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtdq2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv16siv16sf2_mask }, &operand_data[3311], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4003 */ { "floatv16siv16sf2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtdq2ps\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv16siv16sf2_mask_round }, &operand_data[3315], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4003 */ { "floatv8siv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtdq2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8siv8sf2 }, &operand_data[3320], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4003 */ { "floatv8siv8sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtdq2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8siv8sf2_mask }, &operand_data[3320], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4003 */ { "floatv4siv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtdq2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv4siv4sf2 }, &operand_data[3324], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4003 */ { "floatv4siv4sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtdq2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv4siv4sf2_mask }, &operand_data[3324], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv16siv16sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv16siv16sf2 }, &operand_data[3306], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv16siv16sf2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv16siv16sf2_round }, &operand_data[3328], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv16siv16sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv16siv16sf2_mask }, &operand_data[3311], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv16siv16sf2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv16siv16sf2_mask_round }, &operand_data[3331], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv8siv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8siv8sf2 }, &operand_data[3320], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv8siv8sf2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8siv8sf2_round }, &operand_data[3336], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv8siv8sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8siv8sf2_mask }, &operand_data[3320], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv8siv8sf2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8siv8sf2_mask_round }, &operand_data[3339], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv4siv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4siv4sf2 }, &operand_data[3324], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv4siv4sf2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4siv4sf2_round }, &operand_data[3344], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv4siv4sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4siv4sf2_mask }, &operand_data[3324], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4013 */ { "ufloatv4siv4sf2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2ps\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4siv4sf2_mask_round }, &operand_data[3347], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4049 */ { "avx_fix_notruncv8sfv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtps2dq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_fix_notruncv8sfv8si }, &operand_data[3352], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4049 */ { "avx_fix_notruncv8sfv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtps2dq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_fix_notruncv8sfv8si_mask }, &operand_data[3352], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4049 */ { "sse2_fix_notruncv4sfv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtps2dq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_fix_notruncv4sfv4si }, &operand_data[3356], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4049 */ { "sse2_fix_notruncv4sfv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtps2dq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_fix_notruncv4sfv4si_mask }, &operand_data[3356], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4065 */ { "*avx512f_fix_notruncv16sfv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2dq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3360], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4065 */ { "*avx512f_fix_notruncv16sfv16si_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2dq\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3362], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4065 */ { "avx512f_fix_notruncv16sfv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2dq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fix_notruncv16sfv16si_mask }, &operand_data[3365], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4065 */ { "avx512f_fix_notruncv16sfv16si_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2dq\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fix_notruncv16sfv16si_mask_round }, &operand_data[3369], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "*avx512f_ufix_notruncv16sfv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3360], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "*avx512f_ufix_notruncv16sfv16si_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3374], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "avx512f_ufix_notruncv16sfv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ufix_notruncv16sfv16si_mask }, &operand_data[3365], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "avx512f_ufix_notruncv16sfv16si_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ufix_notruncv16sfv16si_mask_round }, &operand_data[3377], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "*avx512vl_ufix_notruncv8sfv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3352], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "*avx512vl_ufix_notruncv8sfv8si_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3382], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "avx512vl_ufix_notruncv8sfv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ufix_notruncv8sfv8si_mask }, &operand_data[3352], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "avx512vl_ufix_notruncv8sfv8si_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ufix_notruncv8sfv8si_mask_round }, &operand_data[3385], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "*avx512vl_ufix_notruncv4sfv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3356], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "*avx512vl_ufix_notruncv4sfv4si_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3390], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "avx512vl_ufix_notruncv4sfv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ufix_notruncv4sfv4si_mask }, &operand_data[3356], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4076 */ { "avx512vl_ufix_notruncv4sfv4si_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2udq\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ufix_notruncv4sfv4si_mask_round }, &operand_data[3393], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4087 */ { "*avx512dq_cvtps2qqv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3398], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4087 */ { "*avx512dq_cvtps2qqv8di_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2qq\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3400], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4087 */ { "avx512dq_cvtps2qqv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_cvtps2qqv8di_mask }, &operand_data[3403], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4087 */ { "avx512dq_cvtps2qqv8di_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2qq\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_cvtps2qqv8di_mask_round }, &operand_data[3407], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4087 */ { "*avx512dq_cvtps2qqv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3412], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4087 */ { "avx512dq_cvtps2qqv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_cvtps2qqv4di_mask }, &operand_data[3412], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4097 */ { "*avx512dq_cvtps2qqv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3416], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4097 */ { "avx512dq_cvtps2qqv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_cvtps2qqv2di_mask }, &operand_data[3416], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4110 */ { "*avx512dq_cvtps2uqqv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3398], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4110 */ { "*avx512dq_cvtps2uqqv8di_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2uqq\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3400], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4110 */ { "avx512dq_cvtps2uqqv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_cvtps2uqqv8di_mask }, &operand_data[3403], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4110 */ { "avx512dq_cvtps2uqqv8di_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2uqq\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_cvtps2uqqv8di_mask_round }, &operand_data[3407], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4110 */ { "*avx512dq_cvtps2uqqv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3412], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4110 */ { "avx512dq_cvtps2uqqv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_cvtps2uqqv4di_mask }, &operand_data[3412], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4120 */ { "*avx512dq_cvtps2uqqv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3416], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4120 */ { "avx512dq_cvtps2uqqv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_cvtps2uqqv2di_mask }, &operand_data[3416], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4133 */ { "fix_truncv16sfv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2dq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv16sfv16si2 }, &operand_data[3360], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4133 */ { "fix_truncv16sfv16si2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2dq\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv16sfv16si2_round }, &operand_data[3420], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4133 */ { "fix_truncv16sfv16si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2dq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv16sfv16si2_mask }, &operand_data[3365], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4133 */ { "fix_truncv16sfv16si2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2dq\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv16sfv16si2_mask_round }, &operand_data[3423], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4133 */ { "ufix_truncv16sfv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2udq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv16sfv16si2 }, &operand_data[3360], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4133 */ { "ufix_truncv16sfv16si2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2udq\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv16sfv16si2_round }, &operand_data[3420], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4133 */ { "ufix_truncv16sfv16si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2udq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv16sfv16si2_mask }, &operand_data[3365], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4133 */ { "ufix_truncv16sfv16si2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2udq\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv16sfv16si2_mask_round }, &operand_data[3423], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4143 */ { "fix_truncv8sfv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2dq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8sfv8si2 }, &operand_data[3352], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4143 */ { "fix_truncv8sfv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2dq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8sfv8si2_mask }, &operand_data[3352], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4152 */ { "fix_truncv4sfv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvttps2dq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv4sfv4si2 }, &operand_data[3356], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4152 */ { "fix_truncv4sfv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvttps2dq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv4sfv4si2_mask }, &operand_data[3356], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4197 */ { "sse2_cvtpi2pd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cvtpi2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtpi2pd }, &operand_data[3428], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4207 */ { "sse2_cvtpd2pi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cvtpd2pi\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtpd2pi }, &operand_data[3430], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4220 */ { "sse2_cvttpd2pi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "cvttpd2pi\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvttpd2pi }, &operand_data[3430], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4231 */ { "sse2_cvtsi2sd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2002 }, #else { 0, output_2002, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtsi2sd }, &operand_data[3432], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4274 */ { "avx512f_vcvtss2usi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtss2usi\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvtss2usi }, &operand_data[3435], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4274 */ { "avx512f_vcvtss2usi_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtss2usi\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvtss2usi_round }, &operand_data[3437], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4300 */ { "avx512f_vcvttss2usi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttss2usi\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvttss2usi }, &operand_data[3435], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4300 */ { "avx512f_vcvttss2usi_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttss2usi\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvttss2usi_round }, &operand_data[3440], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4324 */ { "avx512f_vcvtsd2usi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtsd2usi\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvtsd2usi }, &operand_data[3443], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4324 */ { "avx512f_vcvtsd2usi_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtsd2usi\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvtsd2usi_round }, &operand_data[3445], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4350 */ { "avx512f_vcvttsd2usi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttsd2usi\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvttsd2usi }, &operand_data[3443], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4350 */ { "avx512f_vcvttsd2usi_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttsd2usi\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvttsd2usi_round }, &operand_data[3448], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4374 */ { "sse2_cvtsd2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtsd2si\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtsd2si }, &operand_data[3451], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4374 */ { "sse2_cvtsd2si_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtsd2si\t{%R2%1, %0|%0, %q1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtsd2si_round }, &operand_data[3453], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4391 */ { "sse2_cvtsd2si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtsd2si\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtsd2si_2 }, &operand_data[3456], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4435 */ { "sse2_cvttsd2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvttsd2si\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvttsd2si }, &operand_data[3451], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4435 */ { "sse2_cvttsd2si_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvttsd2si\t{%r2%1, %0|%0, %q1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvttsd2si_round }, &operand_data[3458], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4474 */ { "floatv8siv8df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtdq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8siv8df2 }, &operand_data[3461], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4474 */ { "floatv8siv8df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtdq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8siv8df2_mask }, &operand_data[3461], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4474 */ { "floatv4siv4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtdq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv4siv4df2 }, &operand_data[3465], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4474 */ { "floatv4siv4df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtdq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv4siv4df2_mask }, &operand_data[3465], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv8div8df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8div8df2 }, &operand_data[3469], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv8div8df2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8div8df2_round }, &operand_data[3469], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv8div8df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8div8df2_mask }, &operand_data[3472], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv8div8df2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8div8df2_mask_round }, &operand_data[3472], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv8div8df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8div8df2 }, &operand_data[3469], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv8div8df2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8div8df2_round }, &operand_data[3469], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv8div8df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8div8df2_mask }, &operand_data[3472], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv8div8df2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8div8df2_mask_round }, &operand_data[3472], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv4div4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv4div4df2 }, &operand_data[3477], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv4div4df2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv4div4df2_round }, &operand_data[3477], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv4div4df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv4div4df2_mask }, &operand_data[3480], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv4div4df2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv4div4df2_mask_round }, &operand_data[3480], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv4div4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4div4df2 }, &operand_data[3477], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv4div4df2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4div4df2_round }, &operand_data[3477], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv4div4df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4div4df2_mask }, &operand_data[3480], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv4div4df2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4div4df2_mask_round }, &operand_data[3480], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv2div2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv2div2df2 }, &operand_data[3485], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv2div2df2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv2div2df2_round }, &operand_data[3485], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv2div2df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv2div2df2_mask }, &operand_data[3488], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "floatv2div2df2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2pd\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv2div2df2_mask_round }, &operand_data[3488], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv2div2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv2div2df2 }, &operand_data[3485], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv2div2df2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv2div2df2_round }, &operand_data[3485], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv2div2df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv2div2df2_mask }, &operand_data[3488], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4483 */ { "ufloatv2div2df2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2pd\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv2div2df2_mask_round }, &operand_data[3488], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "floatv8div8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8div8sf2 }, &operand_data[3493], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "floatv8div8sf2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2ps\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8div8sf2_round }, &operand_data[3495], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "floatv8div8sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8div8sf2_mask }, &operand_data[3498], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "floatv8div8sf2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2ps\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv8div8sf2_mask_round }, &operand_data[3502], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "ufloatv8div8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8div8sf2 }, &operand_data[3493], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "ufloatv8div8sf2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2ps\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8div8sf2_round }, &operand_data[3495], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "ufloatv8div8sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8div8sf2_mask }, &operand_data[3498], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "ufloatv8div8sf2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2ps\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8div8sf2_mask_round }, &operand_data[3502], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "floatv4div4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2ps{y}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv4div4sf2 }, &operand_data[3507], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "floatv4div4sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2ps{y}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv4div4sf2_mask }, &operand_data[3507], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "ufloatv4div4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2ps{y}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4div4sf2 }, &operand_data[3507], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4507 */ { "ufloatv4div4sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2ps{y}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4div4sf2_mask }, &operand_data[3507], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4517 */ { "*floatv2div2sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2ps{x}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3511], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4517 */ { "*ufloatv2div2sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2ps{x}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3511], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4528 */ { "floatv2div2sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtqq2ps{x}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatv2div2sf2_mask }, &operand_data[3511], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4528 */ { "ufloatv2div2sf2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtuqq2ps{x}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv2div2sf2_mask }, &operand_data[3511], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4544 */ { "ufloatv8siv8df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8siv8df2 }, &operand_data[3461], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4544 */ { "ufloatv8siv8df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv8siv8df2_mask }, &operand_data[3461], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4544 */ { "ufloatv4siv4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4siv4df2 }, &operand_data[3465], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4544 */ { "ufloatv4siv4df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv4siv4df2_mask }, &operand_data[3465], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4554 */ { "ufloatv2siv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv2siv2df2 }, &operand_data[3515], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4554 */ { "ufloatv2siv2df2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtudq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufloatv2siv2df2_mask }, &operand_data[3515], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4566 */ { "avx512f_cvtdq2pd512_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtdq2pd\t{%t1, %0|%0, %t1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtdq2pd512_2 }, &operand_data[3519], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4581 */ { "avx_cvtdq2pd256_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtdq2pd\t{%x1, %0|%0, %x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cvtdq2pd256_2 }, &operand_data[3521], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4594 */ { "sse2_cvtdq2pd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtdq2pd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtdq2pd }, &operand_data[3515], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4594 */ { "sse2_cvtdq2pd_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtdq2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtdq2pd_mask }, &operand_data[3515], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4607 */ { "*avx512f_cvtpd2dq512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2dq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3523], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4607 */ { "*avx512f_cvtpd2dq512_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2dq\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3525], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4607 */ { "avx512f_cvtpd2dq512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2dq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtpd2dq512_mask }, &operand_data[3528], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4607 */ { "avx512f_cvtpd2dq512_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2dq\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtpd2dq512_mask_round }, &operand_data[3532], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4618 */ { "avx_cvtpd2dq256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2dq{y}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cvtpd2dq256 }, &operand_data[3537], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4618 */ { "avx_cvtpd2dq256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2dq{y}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cvtpd2dq256_mask }, &operand_data[3537], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4637 */ { "*avx_cvtpd2dq256_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2dq{y}\t{%1, %x0|%x0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3541], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4650 */ { "sse2_cvtpd2dq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2077 }, #else { 0, 0, output_2077 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtpd2dq }, &operand_data[3544], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4650 */ { "sse2_cvtpd2dq_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2078 }, #else { 0, 0, output_2078 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtpd2dq_mask }, &operand_data[3544], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4676 */ { "ufix_notruncv8dfv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2udq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv8dfv8si2 }, &operand_data[3523], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4676 */ { "ufix_notruncv8dfv8si2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2udq\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv8dfv8si2_round }, &operand_data[3548], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4676 */ { "ufix_notruncv8dfv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2udq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv8dfv8si2_mask }, &operand_data[3528], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4676 */ { "ufix_notruncv8dfv8si2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2udq\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv8dfv8si2_mask_round }, &operand_data[3551], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4676 */ { "ufix_notruncv4dfv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2udq{y}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv4dfv4si2 }, &operand_data[3537], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4676 */ { "ufix_notruncv4dfv4si2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2udq{y}\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv4dfv4si2_round }, &operand_data[3556], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4676 */ { "ufix_notruncv4dfv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2udq{y}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv4dfv4si2_mask }, &operand_data[3537], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4676 */ { "ufix_notruncv4dfv4si2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2udq{y}\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv4dfv4si2_mask_round }, &operand_data[3559], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4687 */ { "ufix_notruncv2dfv2si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2udq{x}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv2dfv2si2 }, &operand_data[3544], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4687 */ { "ufix_notruncv2dfv2si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2udq{x}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv2dfv2si2_mask }, &operand_data[3544], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4700 */ { "fix_truncv8dfv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2dq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8dfv8si2 }, &operand_data[3523], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4700 */ { "fix_truncv8dfv8si2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2dq\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8dfv8si2_round }, &operand_data[3564], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4700 */ { "fix_truncv8dfv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2dq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8dfv8si2_mask }, &operand_data[3528], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4700 */ { "fix_truncv8dfv8si2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2dq\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8dfv8si2_mask_round }, &operand_data[3567], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4700 */ { "ufix_truncv8dfv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2udq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8dfv8si2 }, &operand_data[3523], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4700 */ { "ufix_truncv8dfv8si2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2udq\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8dfv8si2_round }, &operand_data[3564], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4700 */ { "ufix_truncv8dfv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2udq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8dfv8si2_mask }, &operand_data[3528], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4700 */ { "ufix_truncv8dfv8si2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2udq\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8dfv8si2_mask_round }, &operand_data[3567], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4710 */ { "ufix_truncv2dfv2si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2udq{x}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv2dfv2si2 }, &operand_data[3544], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4710 */ { "ufix_truncv2dfv2si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2udq{x}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv2dfv2si2_mask }, &operand_data[3544], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4721 */ { "fix_truncv4dfv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2dq{y}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv4dfv4si2 }, &operand_data[3537], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4721 */ { "fix_truncv4dfv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2dq{y}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv4dfv4si2_mask }, &operand_data[3537], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4730 */ { "ufix_truncv4dfv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2udq{y}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv4dfv4si2 }, &operand_data[3537], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4730 */ { "ufix_truncv4dfv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2udq{y}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv4dfv4si2_mask }, &operand_data[3537], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "fix_truncv8dfv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8dfv8di2 }, &operand_data[3572], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "fix_truncv8dfv8di2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2qq\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8dfv8di2_round }, &operand_data[3574], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "fix_truncv8dfv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8dfv8di2_mask }, &operand_data[3577], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "fix_truncv8dfv8di2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2qq\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8dfv8di2_mask_round }, &operand_data[3581], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "ufix_truncv8dfv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8dfv8di2 }, &operand_data[3572], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "ufix_truncv8dfv8di2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2uqq\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8dfv8di2_round }, &operand_data[3574], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "ufix_truncv8dfv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8dfv8di2_mask }, &operand_data[3577], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "ufix_truncv8dfv8di2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2uqq\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8dfv8di2_mask_round }, &operand_data[3581], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "fix_truncv4dfv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv4dfv4di2 }, &operand_data[3586], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "fix_truncv4dfv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv4dfv4di2_mask }, &operand_data[3586], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "ufix_truncv4dfv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv4dfv4di2 }, &operand_data[3586], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "ufix_truncv4dfv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv4dfv4di2_mask }, &operand_data[3586], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "fix_truncv2dfv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv2dfv2di2 }, &operand_data[3590], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "fix_truncv2dfv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv2dfv2di2_mask }, &operand_data[3590], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "ufix_truncv2dfv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv2dfv2di2 }, &operand_data[3590], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4739 */ { "ufix_truncv2dfv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttpd2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv2dfv2di2_mask }, &operand_data[3590], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4749 */ { "fix_notruncv8dfv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_notruncv8dfv8di2 }, &operand_data[3572], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4749 */ { "fix_notruncv8dfv8di2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2qq\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_notruncv8dfv8di2_round }, &operand_data[3594], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4749 */ { "fix_notruncv8dfv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_notruncv8dfv8di2_mask }, &operand_data[3577], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4749 */ { "fix_notruncv8dfv8di2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2qq\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_notruncv8dfv8di2_mask_round }, &operand_data[3597], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4749 */ { "fix_notruncv4dfv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_notruncv4dfv4di2 }, &operand_data[3586], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4749 */ { "fix_notruncv4dfv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_notruncv4dfv4di2_mask }, &operand_data[3586], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4749 */ { "fix_notruncv2dfv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_notruncv2dfv2di2 }, &operand_data[3590], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4749 */ { "fix_notruncv2dfv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_notruncv2dfv2di2_mask }, &operand_data[3590], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4760 */ { "ufix_notruncv8dfv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv8dfv8di2 }, &operand_data[3572], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4760 */ { "ufix_notruncv8dfv8di2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2uqq\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv8dfv8di2_round }, &operand_data[3602], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4760 */ { "ufix_notruncv8dfv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv8dfv8di2_mask }, &operand_data[3577], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4760 */ { "ufix_notruncv8dfv8di2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2uqq\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv8dfv8di2_mask_round }, &operand_data[3605], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4760 */ { "ufix_notruncv4dfv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv4dfv4di2 }, &operand_data[3586], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4760 */ { "ufix_notruncv4dfv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv4dfv4di2_mask }, &operand_data[3586], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4760 */ { "ufix_notruncv2dfv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv2dfv2di2 }, &operand_data[3590], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4760 */ { "ufix_notruncv2dfv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_notruncv2dfv2di2_mask }, &operand_data[3590], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "fix_truncv8sfv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8sfv8di2 }, &operand_data[3398], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "fix_truncv8sfv8di2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2qq\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8sfv8di2_round }, &operand_data[3610], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "fix_truncv8sfv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8sfv8di2_mask }, &operand_data[3403], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "fix_truncv8sfv8di2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2qq\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv8sfv8di2_mask_round }, &operand_data[3613], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "ufix_truncv8sfv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8sfv8di2 }, &operand_data[3398], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "ufix_truncv8sfv8di2_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2uqq\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8sfv8di2_round }, &operand_data[3610], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "ufix_truncv8sfv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8sfv8di2_mask }, &operand_data[3403], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "ufix_truncv8sfv8di2_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2uqq\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8sfv8di2_mask_round }, &operand_data[3613], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "fix_truncv4sfv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv4sfv4di2 }, &operand_data[3412], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "fix_truncv4sfv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv4sfv4di2_mask }, &operand_data[3412], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "ufix_truncv4sfv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv4sfv4di2 }, &operand_data[3412], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4771 */ { "ufix_truncv4sfv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv4sfv4di2_mask }, &operand_data[3412], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4781 */ { "fix_truncv2sfv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2qq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv2sfv2di2 }, &operand_data[3416], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4781 */ { "fix_truncv2sfv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2qq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncv2sfv2di2_mask }, &operand_data[3416], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4781 */ { "ufix_truncv2sfv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2uqq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv2sfv2di2 }, &operand_data[3416], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4781 */ { "ufix_truncv2sfv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2uqq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv2sfv2di2_mask }, &operand_data[3416], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4793 */ { "ufix_truncv8sfv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2udq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8sfv8si2 }, &operand_data[3352], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4793 */ { "ufix_truncv8sfv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2udq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv8sfv8si2_mask }, &operand_data[3352], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4793 */ { "ufix_truncv4sfv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2udq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv4sfv4si2 }, &operand_data[3356], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4793 */ { "ufix_truncv4sfv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvttps2udq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ufix_truncv4sfv4si2_mask }, &operand_data[3356], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4811 */ { "sse2_cvttpd2dq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2155 }, #else { 0, 0, output_2155 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvttpd2dq }, &operand_data[3544], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4811 */ { "sse2_cvttpd2dq_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2156 }, #else { 0, 0, output_2156 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvttpd2dq_mask }, &operand_data[3544], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4830 */ { "sse2_cvtsd2ss", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2157 }, #else { 0, output_2157, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtsd2ss }, &operand_data[3618], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4830 */ { "sse2_cvtsd2ss_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2158 }, #else { 0, output_2158, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtsd2ss_round }, &operand_data[3621], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4852 */ { "sse2_cvtss2sd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2159 }, #else { 0, output_2159, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtss2sd }, &operand_data[3625], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4852 */ { "sse2_cvtss2sd_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2160 }, #else { 0, output_2160, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtss2sd_round }, &operand_data[3628], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4875 */ { "*avx512f_cvtpd2ps512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3632], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4875 */ { "*avx512f_cvtpd2ps512_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2ps\t{%R2%1, %0|%0, %1%R2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3634], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4875 */ { "avx512f_cvtpd2ps512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtpd2ps512_mask }, &operand_data[3637], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4875 */ { "avx512f_cvtpd2ps512_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2ps\t{%R4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%R4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtpd2ps512_mask_round }, &operand_data[3641], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4885 */ { "avx_cvtpd2ps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2ps{y}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cvtpd2ps256 }, &operand_data[3646], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4885 */ { "avx_cvtpd2ps256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtpd2ps{y}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cvtpd2ps256_mask }, &operand_data[3646], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4917 */ { "*sse2_cvtpd2ps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2167 }, #else { 0, 0, output_2167 }, #endif { 0 }, &operand_data[3650], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4917 */ { "*sse2_cvtpd2ps_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2168 }, #else { 0, 0, output_2168 }, #endif { 0 }, &operand_data[3650], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4942 */ { "avx512f_cvtps2pd512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtps2pd512 }, &operand_data[3655], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4942 */ { "avx512f_cvtps2pd512_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2pd\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtps2pd512_round }, &operand_data[3657], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4942 */ { "avx512f_cvtps2pd512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtps2pd512_mask }, &operand_data[3660], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4942 */ { "avx512f_cvtps2pd512_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2pd\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtps2pd512_mask_round }, &operand_data[3664], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4942 */ { "avx_cvtps2pd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cvtps2pd256 }, &operand_data[3669], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4942 */ { "avx_cvtps2pd256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cvtps2pd256_mask }, &operand_data[3669], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4952 */ { "*avx_cvtps2pd256_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2pd\t{%x1, %0|%0, %x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3673], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4965 */ { "vec_unpacks_lo_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2pd\t{%t1, %0|%0, %t1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v16sf }, &operand_data[3675], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4980 */ { "avx512bw_cvtb2maskv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovb2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_cvtb2maskv64qi }, &operand_data[2770], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4980 */ { "avx512vl_cvtb2maskv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovb2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtb2maskv16qi }, &operand_data[2775], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4980 */ { "avx512vl_cvtb2maskv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovb2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtb2maskv32qi }, &operand_data[2780], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4980 */ { "avx512bw_cvtw2maskv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovw2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_cvtw2maskv32hi }, &operand_data[2785], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4980 */ { "avx512vl_cvtw2maskv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovw2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtw2maskv16hi }, &operand_data[2790], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4980 */ { "avx512vl_cvtw2maskv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovw2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtw2maskv8hi }, &operand_data[2795], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4990 */ { "avx512f_cvtd2maskv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovd2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtd2maskv16si }, &operand_data[2666], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4990 */ { "avx512vl_cvtd2maskv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovd2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtd2maskv8si }, &operand_data[2682], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4990 */ { "avx512vl_cvtd2maskv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovd2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtd2maskv4si }, &operand_data[2687], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4990 */ { "avx512f_cvtq2maskv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovq2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtq2maskv8di }, &operand_data[2692], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4990 */ { "avx512vl_cvtq2maskv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovq2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtq2maskv4di }, &operand_data[2708], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4990 */ { "avx512vl_cvtq2maskv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovq2m\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtq2maskv2di }, &operand_data[2713], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5012 */ { "*avx512bw_cvtmask2bv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2b\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3677], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5012 */ { "*avx512vl_cvtmask2bv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2b\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3681], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5012 */ { "*avx512vl_cvtmask2bv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2b\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3685], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5012 */ { "*avx512bw_cvtmask2wv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2w\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3689], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5012 */ { "*avx512vl_cvtmask2wv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2w\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3693], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5012 */ { "*avx512vl_cvtmask2wv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2w\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3697], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5035 */ { "*avx512f_cvtmask2dv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2d\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3701], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5035 */ { "*avx512vl_cvtmask2dv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2d\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3705], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5035 */ { "*avx512vl_cvtmask2dv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2d\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3709], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5035 */ { "*avx512f_cvtmask2qv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2q\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3713], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5035 */ { "*avx512vl_cvtmask2qv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2q\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3717], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5035 */ { "*avx512vl_cvtmask2qv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovm2q\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3721], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5046 */ { "sse2_cvtps2pd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtps2pd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtps2pd }, &operand_data[3725], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5046 */ { "sse2_cvtps2pd_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vcvtps2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtps2pd_mask }, &operand_data[3725], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5649 */ { "sse_movhlps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2203 }, #else { 0, output_2203, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_movhlps }, &operand_data[3729], 3, 3, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5695 */ { "sse_movlhps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2204 }, #else { 0, output_2204, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_movlhps }, &operand_data[3732], 3, 3, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5718 */ { "*avx512f_unpckhps512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpckhps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1939], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5718 */ { "avx512f_unpckhps512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpckhps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_unpckhps512_mask }, &operand_data[2852], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5739 */ { "avx_unpckhps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpckhps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_unpckhps256 }, &operand_data[1943], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5739 */ { "avx_unpckhps256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpckhps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_unpckhps256_mask }, &operand_data[3735], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5789 */ { "vec_interleave_highv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2209 }, #else { 0, output_2209, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv4sf }, &operand_data[2364], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5789 */ { "vec_interleave_highv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2210 }, #else { 0, output_2210, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv4sf_mask }, &operand_data[2388], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5806 */ { "*avx512f_unpcklps512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpcklps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1939], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5806 */ { "avx512f_unpcklps512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpcklps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_unpcklps512_mask }, &operand_data[2852], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5827 */ { "avx_unpcklps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpcklps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_unpcklps256 }, &operand_data[1943], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5827 */ { "avx_unpcklps256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpcklps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_unpcklps256_mask }, &operand_data[3735], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5843 */ { "unpcklps128_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpcklps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_unpcklps128_mask }, &operand_data[3740], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5894 */ { "vec_interleave_lowv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2216 }, #else { 0, output_2216, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv4sf }, &operand_data[2566], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5913 */ { "avx_movshdup256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovshdup\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movshdup256 }, &operand_data[2050], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5913 */ { "avx_movshdup256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovshdup\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movshdup256_mask }, &operand_data[2050], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5929 */ { "sse3_movshdup", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovshdup\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_movshdup }, &operand_data[2054], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5929 */ { "sse3_movshdup_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovshdup\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_movshdup_mask }, &operand_data[2054], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5946 */ { "*avx512f_movshdup512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovshdup\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2046], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5946 */ { "avx512f_movshdup512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovshdup\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_movshdup512_mask }, &operand_data[2046], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5966 */ { "avx_movsldup256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovsldup\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movsldup256 }, &operand_data[2050], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5966 */ { "avx_movsldup256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovsldup\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movsldup256_mask }, &operand_data[2050], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5982 */ { "sse3_movsldup", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovsldup\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_movsldup }, &operand_data[2054], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5982 */ { "sse3_movsldup_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovsldup\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_movsldup_mask }, &operand_data[2054], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5999 */ { "*avx512f_movsldup512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovsldup\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2046], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5999 */ { "avx512f_movsldup512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmovsldup\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_movsldup512_mask }, &operand_data[2046], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6043 */ { "avx_shufps256_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2229 }, #else { 0, 0, output_2229 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_shufps256_1 }, &operand_data[3745], 11, 11, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6043 */ { "avx_shufps256_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2230 }, #else { 0, 0, output_2230 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_shufps256_1_mask }, &operand_data[3745], 13, 13, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6097 */ { "sse_shufps_v4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2231 }, #else { 0, 0, output_2231 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_shufps_v4sf_mask }, &operand_data[3758], 9, 9, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6126 */ { "sse_shufps_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2232 }, #else { 0, 0, output_2232 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_shufps_v4si }, &operand_data[3767], 7, 7, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6126 */ { "sse_shufps_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2233 }, #else { 0, 0, output_2233 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_shufps_v4sf }, &operand_data[3774], 7, 7, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6161 */ { "sse_storehps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2234 }, #else { 0, output_2234, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_storehps }, &operand_data[3781], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6196 */ { "sse_loadhps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2235 }, #else { 0, output_2235, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_loadhps }, &operand_data[3783], 3, 3, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6216 */ { "sse_storelps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2236 }, #else { 0, output_2236, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_storelps }, &operand_data[3786], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6250 */ { "sse_loadlps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2237 }, #else { 0, output_2237, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_loadlps }, &operand_data[3788], 3, 3, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6271 */ { "sse_movss", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2238 }, #else { 0, output_2238, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_movss }, &operand_data[3791], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6286 */ { "avx2_vec_dupv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_vec_dupv8sf }, &operand_data[3794], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6286 */ { "avx2_vec_dupv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_vec_dupv4sf }, &operand_data[2622], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6298 */ { "avx2_vec_dupv8sf_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%x1, %0|%0, %x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_vec_dupv8sf_1 }, &operand_data[2563], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6310 */ { "avx512f_vec_dupv16sf_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%x1, %0|%0, %x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv16sf_1 }, &operand_data[1939], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6310 */ { "avx512f_vec_dupv8df_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%x1, %0|%0, %x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv8df_1 }, &operand_data[1951], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6324 */ { "*vec_concatv2sf_sse4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2244 }, #else { 0, output_2244, 0 }, #endif { 0 }, &operand_data[3796], 3, 3, 0, 9, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6351 */ { "*vec_concatv2sf_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2245 }, #else { 0, output_2245, 0 }, #endif { 0 }, &operand_data[3799], 3, 3, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6365 */ { "*vec_concatv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2246 }, #else { 0, output_2246, 0 }, #endif { 0 }, &operand_data[3802], 3, 3, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6392 */ { "vec_setv4si_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2247 }, #else { 0, output_2247, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv4si_0 }, &operand_data[3805], 3, 3, 0, 13, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6392 */ { "vec_setv4sf_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2248 }, #else { 0, output_2248, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv4sf_0 }, &operand_data[3808], 3, 3, 0, 13, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6433 */ { "*vec_setv4sf_sse4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2249 }, #else { 0, 0, output_2249 }, #endif { 0 }, &operand_data[3811], 4, 4, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6464 */ { "sse4_1_insertps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2250 }, #else { 0, 0, output_2250 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_insertps }, &operand_data[3815], 4, 4, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6520 */ { "*vec_extractv4sf_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3819], 2, 2, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6536 */ { "*sse4_1_extractps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2252 }, #else { 0, output_2252, 0 }, #endif { 0 }, &operand_data[3821], 3, 3, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6577 */ { "*vec_extractv4sf_mem", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[3824], 3, 3, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6625 */ { "avx512dq_vextractf64x2_1_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2254 }, #else { 0, 0, output_2254 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vextractf64x2_1_maskm }, &operand_data[3827], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6625 */ { "avx512dq_vextracti64x2_1_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2255 }, #else { 0, 0, output_2255 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vextracti64x2_1_maskm }, &operand_data[3833], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6649 */ { "avx512f_vextractf32x4_1_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2256 }, #else { 0, 0, output_2256 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vextractf32x4_1_maskm }, &operand_data[3839], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6649 */ { "avx512f_vextracti32x4_1_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2257 }, #else { 0, 0, output_2257 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vextracti32x4_1_maskm }, &operand_data[3847], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6677 */ { "*avx512dq_vextractf64x2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2258 }, #else { 0, 0, output_2258 }, #endif { 0 }, &operand_data[3855], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6677 */ { "avx512dq_vextractf64x2_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2259 }, #else { 0, 0, output_2259 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vextractf64x2_1_mask }, &operand_data[3859], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6677 */ { "*avx512dq_vextracti64x2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2260 }, #else { 0, 0, output_2260 }, #endif { 0 }, &operand_data[3865], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6677 */ { "avx512dq_vextracti64x2_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2261 }, #else { 0, 0, output_2261 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vextracti64x2_1_mask }, &operand_data[3869], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6694 */ { "*avx512f_vextractf32x4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2262 }, #else { 0, 0, output_2262 }, #endif { 0 }, &operand_data[3875], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6694 */ { "avx512f_vextractf32x4_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2263 }, #else { 0, 0, output_2263 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vextractf32x4_1_mask }, &operand_data[3881], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6694 */ { "*avx512f_vextracti32x4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2264 }, #else { 0, 0, output_2264 }, #endif { 0 }, &operand_data[3889], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6694 */ { "avx512f_vextracti32x4_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2265 }, #else { 0, 0, output_2265 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vextracti32x4_1_mask }, &operand_data[3895], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6773 */ { "vec_extract_lo_v8df_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextractf64x4\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8df_maskm }, &operand_data[3903], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6773 */ { "vec_extract_lo_v8di_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextracti64x4\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8di_maskm }, &operand_data[3907], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6791 */ { "vec_extract_lo_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2268 }, #else { 0, 0, output_2268 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8df }, &operand_data[3911], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6791 */ { "vec_extract_lo_v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2269 }, #else { 0, 0, output_2269 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8df_mask }, &operand_data[3913], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6791 */ { "vec_extract_lo_v8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2270 }, #else { 0, 0, output_2270 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8di }, &operand_data[3917], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6791 */ { "vec_extract_lo_v8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2271 }, #else { 0, 0, output_2271 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8di_mask }, &operand_data[3919], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6810 */ { "vec_extract_hi_v8df_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextractf64x4\t{$0x1, %1, %0%{%3%}|%0%{%3%}, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8df_maskm }, &operand_data[3903], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6810 */ { "vec_extract_hi_v8di_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextracti64x4\t{$0x1, %1, %0%{%3%}|%0%{%3%}, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8di_maskm }, &operand_data[3907], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6829 */ { "vec_extract_hi_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextractf64x4\t{$0x1, %1, %0|%0, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8df }, &operand_data[3923], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6829 */ { "vec_extract_hi_v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextractf64x4\t{$0x1, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8df_mask }, &operand_data[3925], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6829 */ { "vec_extract_hi_v8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextracti64x4\t{$0x1, %1, %0|%0, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8di }, &operand_data[3929], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6829 */ { "vec_extract_hi_v8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextracti64x4\t{$0x1, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8di_mask }, &operand_data[3931], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6843 */ { "vec_extract_hi_v16sf_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextractf32x8\t{$0x1, %1, %0%{%3%}|%0%{%3%}, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v16sf_maskm }, &operand_data[3935], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6843 */ { "vec_extract_hi_v16si_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextracti32x8\t{$0x1, %1, %0%{%3%}|%0%{%3%}, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v16si_maskm }, &operand_data[3939], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6863 */ { "vec_extract_hi_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2280 }, #else { 0, output_2280, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v16sf }, &operand_data[3943], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6863 */ { "vec_extract_hi_v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2281 }, #else { 0, output_2281, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v16sf_mask }, &operand_data[3945], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6863 */ { "vec_extract_hi_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2282 }, #else { 0, output_2282, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v16si }, &operand_data[3949], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6863 */ { "vec_extract_hi_v16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2283 }, #else { 0, output_2283, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v16si_mask }, &operand_data[3951], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6935 */ { "vec_extract_lo_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2284 }, #else { 0, 0, output_2284 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v16sf }, &operand_data[3955], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6935 */ { "vec_extract_lo_v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2285 }, #else { 0, 0, output_2285 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v16sf_mask }, &operand_data[3955], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6935 */ { "vec_extract_lo_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2286 }, #else { 0, 0, output_2286 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v16si }, &operand_data[3959], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6935 */ { "vec_extract_lo_v16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2287 }, #else { 0, 0, output_2287 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v16si_mask }, &operand_data[3959], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6974 */ { "vec_extract_lo_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2288 }, #else { 0, 0, output_2288 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v4di }, &operand_data[3963], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6974 */ { "vec_extract_lo_v4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2289 }, #else { 0, 0, output_2289 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v4di_mask }, &operand_data[3965], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6974 */ { "vec_extract_lo_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2290 }, #else { 0, 0, output_2290 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v4df }, &operand_data[3969], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6974 */ { "vec_extract_lo_v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2291 }, #else { 0, 0, output_2291 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v4df_mask }, &operand_data[3971], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7013 */ { "vec_extract_hi_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2292 }, #else { 0, 0, output_2292 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v4di }, &operand_data[3975], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7013 */ { "vec_extract_hi_v4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2293 }, #else { 0, 0, output_2293 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v4di_mask }, &operand_data[3977], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7013 */ { "vec_extract_hi_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2294 }, #else { 0, 0, output_2294 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v4df }, &operand_data[3981], 2, 2, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7013 */ { "vec_extract_hi_v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2295 }, #else { 0, 0, output_2295 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v4df_mask }, &operand_data[3983], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7056 */ { "vec_extract_lo_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2296 }, #else { 0, 0, output_2296 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8si }, &operand_data[3987], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7056 */ { "vec_extract_lo_v8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2297 }, #else { 0, 0, output_2297 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8si_mask }, &operand_data[3989], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7056 */ { "vec_extract_lo_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2298 }, #else { 0, 0, output_2298 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8sf }, &operand_data[3993], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7056 */ { "vec_extract_lo_v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2299 }, #else { 0, 0, output_2299 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8sf_mask }, &operand_data[3995], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7075 */ { "vec_extract_lo_v8si_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextracti32x4\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8si_maskm }, &operand_data[3999], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7075 */ { "vec_extract_lo_v8sf_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextractf32x4\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v8sf_maskm }, &operand_data[4003], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7093 */ { "vec_extract_hi_v8si_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextracti32x4\t{$0x1, %1, %0%{%3%}|%0%{%3%}, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8si_maskm }, &operand_data[4007], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7093 */ { "vec_extract_hi_v8sf_maskm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextractf32x4\t{$0x1, %1, %0%{%3%}|%0%{%3%}, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8sf_maskm }, &operand_data[4011], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7111 */ { "vec_extract_hi_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2304 }, #else { 0, 0, output_2304 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8si }, &operand_data[4015], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7111 */ { "vec_extract_hi_v8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2305 }, #else { 0, 0, output_2305 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8si_mask }, &operand_data[4017], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7111 */ { "vec_extract_hi_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2306 }, #else { 0, 0, output_2306 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8sf }, &operand_data[4021], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7111 */ { "vec_extract_hi_v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2307 }, #else { 0, 0, output_2307 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v8sf_mask }, &operand_data[4023], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7134 */ { "vec_extract_lo_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v32hi }, &operand_data[4027], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7157 */ { "vec_extract_hi_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextracti64x4\t{$0x1, %1, %0|%0, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v32hi }, &operand_data[4029], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7178 */ { "vec_extract_lo_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v16hi }, &operand_data[4031], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7197 */ { "vec_extract_hi_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextract%~128\t{$0x1, %1, %0|%0, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v16hi }, &operand_data[4033], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7214 */ { "vec_extract_lo_v64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v64qi }, &operand_data[4035], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7245 */ { "vec_extract_hi_v64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextracti64x4\t{$0x1, %1, %0|%0, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v64qi }, &operand_data[4037], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7274 */ { "vec_extract_lo_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_lo_v32qi }, &operand_data[4039], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7297 */ { "vec_extract_hi_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vextract%~128\t{$0x1, %1, %0|%0, %1, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extract_hi_v32qi }, &operand_data[4041], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7344 */ { "*avx512f_unpckhpd512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpckhpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4043], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7344 */ { "avx512f_unpckhpd512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpckhpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_unpckhpd512_mask }, &operand_data[4043], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7361 */ { "avx_unpckhpd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpckhpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_unpckhpd256 }, &operand_data[1955], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7361 */ { "avx_unpckhpd256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpckhpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_unpckhpd256_mask }, &operand_data[4048], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7404 */ { "avx512vl_unpckhpd128_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpckhpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_unpckhpd128_mask }, &operand_data[4053], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7434 */ { "*vec_interleave_highv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2321 }, #else { 0, output_2321, 0 }, #endif { 0 }, &operand_data[4058], 3, 3, 0, 6, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7481 */ { "*avx512f_unpcklpd512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2322 }, #else { 0, output_2322, 0 }, #endif { 0 }, &operand_data[4061], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7481 */ { "*avx512f_unpcklpd512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2323 }, #else { 0, output_2323, 0 }, #endif { 0 }, &operand_data[4061], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7520 */ { "*avx_unpcklpd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2324 }, #else { 0, output_2324, 0 }, #endif { 0 }, &operand_data[4066], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7520 */ { "*avx_unpcklpd256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2325 }, #else { 0, output_2325, 0 }, #endif { 0 }, &operand_data[4066], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7564 */ { "avx512vl_unpcklpd128_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vunpcklpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_unpcklpd128_mask }, &operand_data[4053], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7594 */ { "*vec_interleave_lowv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2327 }, #else { 0, output_2327, 0 }, #endif { 0 }, &operand_data[4071], 3, 3, 0, 6, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7648 */ { "avx512f_vmscalefv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefss\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmscalefv4sf }, &operand_data[1947], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7648 */ { "avx512f_vmscalefv4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefss\t{%R3%2, %1, %0|%0, %1, %2%R3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmscalefv4sf_round }, &operand_data[4074], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7648 */ { "avx512f_vmscalefv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefsd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmscalefv2df }, &operand_data[1959], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7648 */ { "avx512f_vmscalefv2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefsd\t{%R3%2, %1, %0|%0, %1, %2%R3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vmscalefv2df_round }, &operand_data[4078], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512f_scalefv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scalefv16sf }, &operand_data[1939], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512f_scalefv16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%R3%2, %1, %0|%0, %1, %2%R3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scalefv16sf_round }, &operand_data[4082], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512f_scalefv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scalefv16sf_mask }, &operand_data[2852], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512f_scalefv16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scalefv16sf_mask_round }, &operand_data[4086], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv8sf }, &operand_data[1943], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv8sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%R3%2, %1, %0|%0, %1, %2%R3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv8sf_round }, &operand_data[4092], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv8sf_mask }, &operand_data[3735], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv8sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv8sf_mask_round }, &operand_data[4096], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv4sf }, &operand_data[1947], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%R3%2, %1, %0|%0, %1, %2%R3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv4sf_round }, &operand_data[4102], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv4sf_mask }, &operand_data[3740], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv4sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefps\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv4sf_mask_round }, &operand_data[4106], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512f_scalefv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scalefv8df }, &operand_data[1951], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512f_scalefv8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scalefv8df_round }, &operand_data[4112], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512f_scalefv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scalefv8df_mask }, &operand_data[2857], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512f_scalefv8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scalefv8df_mask_round }, &operand_data[4116], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv4df }, &operand_data[1955], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv4df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv4df_round }, &operand_data[4122], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv4df_mask }, &operand_data[4048], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv4df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv4df_mask_round }, &operand_data[4126], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv2df }, &operand_data[1959], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%R3%2, %1, %0|%0, %1, %2%R3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv2df_round }, &operand_data[4132], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv2df_mask }, &operand_data[4053], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7662 */ { "avx512vl_scalefv2df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscalefpd\t{%R5%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2%R5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scalefv2df_mask_round }, &operand_data[4136], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512f_vternlogv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogd\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vternlogv16si }, &operand_data[4142], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512f_vternlogv16si_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogd\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vternlogv16si_maskz_1 }, &operand_data[4142], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512vl_vternlogv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogd\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv8si }, &operand_data[4149], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512vl_vternlogv8si_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogd\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv8si_maskz_1 }, &operand_data[4149], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512vl_vternlogv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogd\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv4si }, &operand_data[4156], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512vl_vternlogv4si_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogd\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv4si_maskz_1 }, &operand_data[4156], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512f_vternlogv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogq\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vternlogv8di }, &operand_data[4163], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512f_vternlogv8di_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogq\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vternlogv8di_maskz_1 }, &operand_data[4163], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512vl_vternlogv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogq\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv4di }, &operand_data[4170], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512vl_vternlogv4di_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogq\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv4di_maskz_1 }, &operand_data[4170], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512vl_vternlogv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogq\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv2di }, &operand_data[4177], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7688 */ { "avx512vl_vternlogv2di_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogq\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv2di_maskz_1 }, &operand_data[4177], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7702 */ { "avx512f_vternlogv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogd\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vternlogv16si_mask }, &operand_data[4184], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7702 */ { "avx512vl_vternlogv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogd\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv8si_mask }, &operand_data[4190], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7702 */ { "avx512vl_vternlogv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogd\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv4si_mask }, &operand_data[4196], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7702 */ { "avx512f_vternlogv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogq\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vternlogv8di_mask }, &operand_data[4202], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7702 */ { "avx512vl_vternlogv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogq\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv4di_mask }, &operand_data[4208], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7702 */ { "avx512vl_vternlogv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpternlogq\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv2di_mask }, &operand_data[4214], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512f_getexpv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getexpv16sf }, &operand_data[2046], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512f_getexpv16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getexpv16sf_round }, &operand_data[4220], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512f_getexpv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getexpv16sf_mask }, &operand_data[2046], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512f_getexpv16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getexpv16sf_mask_round }, &operand_data[4223], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv8sf }, &operand_data[2050], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv8sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv8sf_round }, &operand_data[4228], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv8sf_mask }, &operand_data[2050], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv8sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv8sf_mask_round }, &operand_data[4231], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv4sf }, &operand_data[2054], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv4sf_round }, &operand_data[4236], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv4sf_mask }, &operand_data[2054], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv4sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpps\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv4sf_mask_round }, &operand_data[4239], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512f_getexpv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getexpv8df }, &operand_data[2058], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512f_getexpv8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getexpv8df_round }, &operand_data[4244], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512f_getexpv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getexpv8df_mask }, &operand_data[2058], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512f_getexpv8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getexpv8df_mask_round }, &operand_data[4247], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv4df }, &operand_data[2062], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv4df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv4df_round }, &operand_data[4252], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv4df_mask }, &operand_data[2062], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv4df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv4df_mask_round }, &operand_data[4255], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv2df }, &operand_data[2066], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv2df_round }, &operand_data[4260], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv2df_mask }, &operand_data[2066], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7719 */ { "avx512vl_getexpv2df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexppd\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getexpv2df_mask_round }, &operand_data[4263], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7728 */ { "avx512f_sgetexpv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpss\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sgetexpv4sf }, &operand_data[1947], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7728 */ { "avx512f_sgetexpv4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpss\t{%r3%2, %1, %0|%0, %1, %2%r3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sgetexpv4sf_round }, &operand_data[4268], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7728 */ { "avx512f_sgetexpv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpsd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sgetexpv2df }, &operand_data[1959], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7728 */ { "avx512f_sgetexpv2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetexpsd\t{%r3%2, %1, %0|%0, %1, %2%r3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sgetexpv2df_round }, &operand_data[4272], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "*avx512f_alignv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4276], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "avx512f_alignv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignd\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_alignv16si_mask }, &operand_data[4276], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "*avx512vl_alignv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4282], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "avx512vl_alignv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignd\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_alignv8si_mask }, &operand_data[4282], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "*avx512vl_alignv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4288], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "avx512vl_alignv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignd\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_alignv4si_mask }, &operand_data[4288], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "*avx512f_alignv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignq\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4294], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "avx512f_alignv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignq\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_alignv8di_mask }, &operand_data[4294], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "*avx512vl_alignv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignq\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4300], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "avx512vl_alignv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignq\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_alignv4di_mask }, &operand_data[4300], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "*avx512vl_alignv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignq\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4306], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7742 */ { "avx512vl_alignv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "valignq\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_alignv2di_mask }, &operand_data[4306], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512f_fixupimmv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv16sf }, &operand_data[4312], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512f_fixupimmv16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %r5%3, %2, %0|%0, %2, %3%r5, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv16sf_round }, &operand_data[4317], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512f_fixupimmv16sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv16sf_maskz_1 }, &operand_data[4323], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512f_fixupimmv16sf_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %r7%3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3%r7, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv16sf_maskz_1_round }, &operand_data[4330], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv8sf }, &operand_data[4338], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv8sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %r5%3, %2, %0|%0, %2, %3%r5, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv8sf_round }, &operand_data[4343], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv8sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv8sf_maskz_1 }, &operand_data[4349], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv8sf_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %r7%3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3%r7, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv8sf_maskz_1_round }, &operand_data[4356], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4sf }, &operand_data[4364], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %r5%3, %2, %0|%0, %2, %3%r5, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4sf_round }, &operand_data[4369], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv4sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4sf_maskz_1 }, &operand_data[4375], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv4sf_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %r7%3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3%r7, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4sf_maskz_1_round }, &operand_data[4382], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512f_fixupimmv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv8df }, &operand_data[4390], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512f_fixupimmv8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %r5%3, %2, %0|%0, %2, %3%r5, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv8df_round }, &operand_data[4395], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512f_fixupimmv8df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv8df_maskz_1 }, &operand_data[4401], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512f_fixupimmv8df_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %r7%3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3%r7, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv8df_maskz_1_round }, &operand_data[4408], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4df }, &operand_data[4416], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv4df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %r5%3, %2, %0|%0, %2, %3%r5, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4df_round }, &operand_data[4421], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv4df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4df_maskz_1 }, &operand_data[4427], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv4df_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %r7%3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3%r7, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4df_maskz_1_round }, &operand_data[4434], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv2df }, &operand_data[4442], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %r5%3, %2, %0|%0, %2, %3%r5, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv2df_round }, &operand_data[4447], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv2df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv2df_maskz_1 }, &operand_data[4453], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7801 */ { "avx512vl_fixupimmv2df_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %r7%3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3%r7, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv2df_maskz_1_round }, &operand_data[4460], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512f_fixupimmv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv16sf_mask }, &operand_data[4468], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512f_fixupimmv16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %r6%3, %2, %0%{%5%}|%0%{%5%}, %2, %3%r6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv16sf_mask_round }, &operand_data[4474], 7, 7, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512vl_fixupimmv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv8sf_mask }, &operand_data[4481], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512vl_fixupimmv8sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %r6%3, %2, %0%{%5%}|%0%{%5%}, %2, %3%r6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv8sf_mask_round }, &operand_data[4487], 7, 7, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512vl_fixupimmv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4sf_mask }, &operand_data[4494], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512vl_fixupimmv4sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmps\t{%4, %r6%3, %2, %0%{%5%}|%0%{%5%}, %2, %3%r6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4sf_mask_round }, &operand_data[4500], 7, 7, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512f_fixupimmv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv8df_mask }, &operand_data[4507], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512f_fixupimmv8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %r6%3, %2, %0%{%5%}|%0%{%5%}, %2, %3%r6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv8df_mask_round }, &operand_data[4513], 7, 7, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512vl_fixupimmv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4df_mask }, &operand_data[4520], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512vl_fixupimmv4df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %r6%3, %2, %0%{%5%}|%0%{%5%}, %2, %3%r6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4df_mask_round }, &operand_data[4526], 7, 7, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512vl_fixupimmv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv2df_mask }, &operand_data[4533], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7814 */ { "avx512vl_fixupimmv2df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmpd\t{%4, %r6%3, %2, %0%{%5%}|%0%{%5%}, %2, %3%r6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv2df_mask_round }, &operand_data[4539], 7, 7, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7846 */ { "avx512f_sfixupimmv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmss\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv4sf }, &operand_data[4364], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7846 */ { "avx512f_sfixupimmv4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmss\t{%4, %r5%3, %2, %0|%0, %2, %3%r5, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv4sf_round }, &operand_data[4546], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7846 */ { "avx512f_sfixupimmv4sf_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmss\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv4sf_maskz_1 }, &operand_data[4375], 7, 7, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7846 */ { "avx512f_sfixupimmv4sf_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmss\t{%4, %r7%3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3%r7, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv4sf_maskz_1_round }, &operand_data[4552], 8, 8, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7846 */ { "avx512f_sfixupimmv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmsd\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv2df }, &operand_data[4442], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7846 */ { "avx512f_sfixupimmv2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmsd\t{%4, %r5%3, %2, %0|%0, %2, %3%r5, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv2df_round }, &operand_data[4560], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7846 */ { "avx512f_sfixupimmv2df_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmsd\t{%4, %3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv2df_maskz_1 }, &operand_data[4453], 7, 7, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7846 */ { "avx512f_sfixupimmv2df_maskz_1_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmsd\t{%4, %r7%3, %2, %0%{%6%}%N5|%0%{%6%}%N5, %2, %3%r7, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv2df_maskz_1_round }, &operand_data[4566], 8, 8, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7862 */ { "avx512f_sfixupimmv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmss\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv4sf_mask }, &operand_data[4494], 6, 6, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7862 */ { "avx512f_sfixupimmv4sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmss\t{%4, %r6%3, %2, %0%{%5%}|%0%{%5%}, %2, %3%r6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv4sf_mask_round }, &operand_data[4574], 7, 7, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7862 */ { "avx512f_sfixupimmv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmsd\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv2df_mask }, &operand_data[4533], 6, 6, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7862 */ { "avx512f_sfixupimmv2df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfixupimmsd\t{%4, %r6%3, %2, %0%{%5%}|%0%{%5%}, %2, %3%r6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv2df_mask_round }, &operand_data[4581], 7, 7, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512f_rndscalev16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev16sf }, &operand_data[2580], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512f_rndscalev16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev16sf_round }, &operand_data[4588], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512f_rndscalev16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev16sf_mask }, &operand_data[2580], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512f_rndscalev16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev16sf_mask_round }, &operand_data[4592], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev8sf }, &operand_data[2585], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev8sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev8sf_round }, &operand_data[4598], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev8sf_mask }, &operand_data[2585], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev8sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev8sf_mask_round }, &operand_data[4602], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev4sf }, &operand_data[2590], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev4sf_round }, &operand_data[4608], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev4sf_mask }, &operand_data[2590], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev4sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaleps\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev4sf_mask_round }, &operand_data[4612], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512f_rndscalev8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev8df }, &operand_data[2595], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512f_rndscalev8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev8df_round }, &operand_data[4618], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512f_rndscalev8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev8df_mask }, &operand_data[2595], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512f_rndscalev8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev8df_mask_round }, &operand_data[4622], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev4df }, &operand_data[2600], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev4df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev4df_round }, &operand_data[4628], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev4df_mask }, &operand_data[2600], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev4df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev4df_mask_round }, &operand_data[4632], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev2df }, &operand_data[2605], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev2df_round }, &operand_data[4638], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev2df_mask }, &operand_data[2605], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7881 */ { "avx512vl_rndscalev2df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalepd\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rndscalev2df_mask_round }, &operand_data[4642], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7893 */ { "avx512f_rndscalev4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaless\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev4sf }, &operand_data[2610], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7893 */ { "avx512f_rndscalev4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscaless\t{%3, %r4%2, %1, %0|%0, %1, %2%r4, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev4sf_round }, &operand_data[4648], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7893 */ { "avx512f_rndscalev2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalesd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev2df }, &operand_data[2614], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7893 */ { "avx512f_rndscalev2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrndscalesd\t{%3, %r4%2, %1, %0|%0, %1, %2%r4, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rndscalev2df_round }, &operand_data[4653], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7910 */ { "avx512f_shufps512_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2490 }, #else { 0, 0, output_2490 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shufps512_1 }, &operand_data[4658], 19, 19, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7910 */ { "avx512f_shufps512_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2491 }, #else { 0, 0, output_2491 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shufps512_1_mask }, &operand_data[4658], 21, 21, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7983 */ { "avx512f_shufpd512_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2492 }, #else { 0, 0, output_2492 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shufpd512_1 }, &operand_data[4679], 11, 11, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7983 */ { "avx512f_shufpd512_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2493 }, #else { 0, 0, output_2493 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shufpd512_1_mask }, &operand_data[4679], 13, 13, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8036 */ { "avx_shufpd256_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2494 }, #else { 0, 0, output_2494 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_shufpd256_1 }, &operand_data[4692], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8036 */ { "avx_shufpd256_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2495 }, #else { 0, 0, output_2495 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_shufpd256_1_mask }, &operand_data[4692], 9, 9, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8077 */ { "sse2_shufpd_v2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2496 }, #else { 0, 0, output_2496 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_shufpd_v2df_mask }, &operand_data[4701], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8103 */ { "avx2_interleave_highv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhqdq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_highv4di }, &operand_data[1931], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8103 */ { "avx2_interleave_highv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhqdq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_highv4di_mask }, &operand_data[4708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8119 */ { "*avx512f_interleave_highv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhqdq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1927], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8119 */ { "avx512f_interleave_highv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhqdq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_interleave_highv8di_mask }, &operand_data[4713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8135 */ { "vec_interleave_highv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2501 }, #else { 0, output_2501, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv2di }, &operand_data[4718], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8135 */ { "vec_interleave_highv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2502 }, #else { 0, output_2502, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv2di_mask }, &operand_data[4718], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8153 */ { "avx2_interleave_lowv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_lowv4di }, &operand_data[1931], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8153 */ { "avx2_interleave_lowv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklqdq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_lowv4di_mask }, &operand_data[4708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8169 */ { "*avx512f_interleave_lowv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1927], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8169 */ { "avx512f_interleave_lowv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklqdq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_interleave_lowv8di_mask }, &operand_data[4713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8185 */ { "vec_interleave_lowv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2507 }, #else { 0, output_2507, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv2di }, &operand_data[4718], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8185 */ { "vec_interleave_lowv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2508 }, #else { 0, output_2508, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv2di_mask }, &operand_data[4718], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8203 */ { "sse2_shufpd_v2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2509 }, #else { 0, 0, output_2509 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_shufpd_v2di }, &operand_data[4723], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8203 */ { "sse2_shufpd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2510 }, #else { 0, 0, output_2510 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_shufpd_v2df }, &operand_data[4728], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8236 */ { "sse2_storehpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2511 }, #else { 0, output_2511, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_storehpd }, &operand_data[4733], 2, 2, 0, 6, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8269 */ { "*vec_extractv2df_1_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2512 }, #else { 0, output_2512, 0 }, #endif { 0 }, &operand_data[4735], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8286 */ { "sse2_storelpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2513 }, #else { 0, output_2513, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_storelpd }, &operand_data[4737], 2, 2, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8317 */ { "*vec_extractv2df_0_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2514 }, #else { 0, output_2514, 0 }, #endif { 0 }, &operand_data[4739], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8353 */ { "sse2_loadhpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2515 }, #else { 0, output_2515, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loadhpd }, &operand_data[4741], 3, 3, 0, 7, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8410 */ { "sse2_loadlpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2516 }, #else { 0, output_2516, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loadlpd }, &operand_data[4744], 3, 3, 0, 11, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8458 */ { "sse2_movsd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2517 }, #else { 0, output_2517, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_movsd }, &operand_data[4747], 3, 3, 0, 9, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8492 */ { "vec_dupv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2518 }, #else { 0, output_2518, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_dupv2df }, &operand_data[4750], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8492 */ { "vec_dupv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2519 }, #else { 0, output_2519, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_dupv2df_mask }, &operand_data[4750], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8505 */ { "*vec_concatv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2520 }, #else { 0, output_2520, 0 }, #endif { 0 }, &operand_data[4754], 3, 3, 0, 8, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_ss_truncatev16siv16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4757], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_truncatev16siv16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4757], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_us_truncatev16siv16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4757], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_ss_truncatev16siv16hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4759], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_truncatev16siv16hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4759], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_us_truncatev16siv16hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4759], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_ss_truncatev8div8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4761], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_truncatev8div8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4761], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_us_truncatev8div8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4761], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_ss_truncatev8div8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4763], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_truncatev8div8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4763], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8544 */ { "*avx512f_us_truncatev8div8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4763], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_ss_truncatev16siv16qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ss_truncatev16siv16qi2_mask }, &operand_data[4765], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_truncatev16siv16qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_truncatev16siv16qi2_mask }, &operand_data[4765], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_us_truncatev16siv16qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_us_truncatev16siv16qi2_mask }, &operand_data[4765], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_ss_truncatev16siv16hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ss_truncatev16siv16hi2_mask }, &operand_data[4769], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_truncatev16siv16hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_truncatev16siv16hi2_mask }, &operand_data[4769], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_us_truncatev16siv16hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_us_truncatev16siv16hi2_mask }, &operand_data[4769], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_ss_truncatev8div8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ss_truncatev8div8si2_mask }, &operand_data[4773], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_truncatev8div8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_truncatev8div8si2_mask }, &operand_data[4773], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_us_truncatev8div8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_us_truncatev8div8si2_mask }, &operand_data[4773], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_ss_truncatev8div8hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ss_truncatev8div8hi2_mask }, &operand_data[4777], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_truncatev8div8hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_truncatev8div8hi2_mask }, &operand_data[4777], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8555 */ { "avx512f_us_truncatev8div8hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_us_truncatev8div8hi2_mask }, &operand_data[4777], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8578 */ { "*avx512bw_ss_truncatev32hiv32qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovswb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4781], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8578 */ { "*avx512bw_truncatev32hiv32qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovwb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4781], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8578 */ { "*avx512bw_us_truncatev32hiv32qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovuswb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4781], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8589 */ { "avx512bw_ss_truncatev32hiv32qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovswb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ss_truncatev32hiv32qi2_mask }, &operand_data[4781], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8589 */ { "avx512bw_truncatev32hiv32qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovwb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_truncatev32hiv32qi2_mask }, &operand_data[4781], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8589 */ { "avx512bw_us_truncatev32hiv32qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovuswb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_us_truncatev32hiv32qi2_mask }, &operand_data[4781], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8617 */ { "*avx512vl_ss_truncatev4div4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4785], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8617 */ { "*avx512vl_truncatev4div4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4785], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8617 */ { "*avx512vl_us_truncatev4div4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4785], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8617 */ { "*avx512vl_ss_truncatev8siv8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4787], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8617 */ { "*avx512vl_truncatev8siv8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4787], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8617 */ { "*avx512vl_us_truncatev8siv8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4787], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8617 */ { "*avx512vl_ss_truncatev16hiv16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovswb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4789], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8617 */ { "*avx512vl_truncatev16hiv16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovwb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4789], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8617 */ { "*avx512vl_us_truncatev16hiv16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovuswb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4789], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8628 */ { "avx512vl_ss_truncatev4div4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev4div4si2_mask }, &operand_data[4791], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8628 */ { "avx512vl_truncatev4div4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev4div4si2_mask }, &operand_data[4791], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8628 */ { "avx512vl_us_truncatev4div4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev4div4si2_mask }, &operand_data[4791], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8628 */ { "avx512vl_ss_truncatev8siv8hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev8siv8hi2_mask }, &operand_data[4795], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8628 */ { "avx512vl_truncatev8siv8hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev8siv8hi2_mask }, &operand_data[4795], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8628 */ { "avx512vl_us_truncatev8siv8hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev8siv8hi2_mask }, &operand_data[4795], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8628 */ { "avx512vl_ss_truncatev16hiv16qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovswb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev16hiv16qi2_mask }, &operand_data[4799], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8628 */ { "avx512vl_truncatev16hiv16qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovwb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev16hiv16qi2_mask }, &operand_data[4799], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8628 */ { "avx512vl_us_truncatev16hiv16qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovuswb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev16hiv16qi2_mask }, &operand_data[4799], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_ss_truncatev4div4qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4803], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_truncatev4div4qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4803], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_us_truncatev4div4qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4803], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_ss_truncatev2div2qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4806], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_truncatev2div2qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4806], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_us_truncatev2div2qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4806], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_ss_truncatev8siv8qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4809], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_truncatev8siv8qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4809], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_us_truncatev8siv8qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4809], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_ss_truncatev4siv4qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4812], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_truncatev4siv4qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4812], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_us_truncatev4siv4qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4812], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_ss_truncatev8hiv8qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovswb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4815], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_truncatev8hiv8qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovwb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4815], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8659 */ { "*avx512vl_us_truncatev8hiv8qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovuswb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4815], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8671 */ { "*avx512vl_ss_truncatev2div2qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4818], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8671 */ { "*avx512vl_truncatev2div2qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4818], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8671 */ { "*avx512vl_us_truncatev2div2qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4818], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8692 */ { "avx512vl_ss_truncatev2div2qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev2div2qi2_mask }, &operand_data[4820], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8692 */ { "avx512vl_truncatev2div2qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev2div2qi2_mask }, &operand_data[4820], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8692 */ { "avx512vl_us_truncatev2div2qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev2div2qi2_mask }, &operand_data[4820], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8715 */ { "avx512vl_ss_truncatev2div2qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev2div2qi2_mask_store }, &operand_data[4824], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8715 */ { "avx512vl_truncatev2div2qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev2div2qi2_mask_store }, &operand_data[4824], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8715 */ { "avx512vl_us_truncatev2div2qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev2div2qi2_mask_store }, &operand_data[4824], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8741 */ { "*avx512vl_ss_truncatev4siv4qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4827], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8741 */ { "*avx512vl_truncatev4siv4qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4827], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8741 */ { "*avx512vl_us_truncatev4siv4qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4827], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8741 */ { "*avx512vl_ss_truncatev4div4qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4829], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8741 */ { "*avx512vl_truncatev4div4qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4829], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8741 */ { "*avx512vl_us_truncatev4div4qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4829], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8761 */ { "avx512vl_ss_truncatev4siv4qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev4siv4qi2_mask }, &operand_data[4831], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8761 */ { "avx512vl_truncatev4siv4qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev4siv4qi2_mask }, &operand_data[4831], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8761 */ { "avx512vl_us_truncatev4siv4qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev4siv4qi2_mask }, &operand_data[4831], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8761 */ { "avx512vl_ss_truncatev4div4qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev4div4qi2_mask }, &operand_data[4835], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8761 */ { "avx512vl_truncatev4div4qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev4div4qi2_mask }, &operand_data[4835], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8761 */ { "avx512vl_us_truncatev4div4qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev4div4qi2_mask }, &operand_data[4835], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8784 */ { "avx512vl_ss_truncatev4siv4qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev4siv4qi2_mask_store }, &operand_data[4839], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8784 */ { "avx512vl_truncatev4siv4qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev4siv4qi2_mask_store }, &operand_data[4839], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8784 */ { "avx512vl_us_truncatev4siv4qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev4siv4qi2_mask_store }, &operand_data[4839], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8784 */ { "avx512vl_ss_truncatev4div4qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev4div4qi2_mask_store }, &operand_data[4842], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8784 */ { "avx512vl_truncatev4div4qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev4div4qi2_mask_store }, &operand_data[4842], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8784 */ { "avx512vl_us_truncatev4div4qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev4div4qi2_mask_store }, &operand_data[4842], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8813 */ { "*avx512vl_ss_truncatev8hiv8qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovswb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4845], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8813 */ { "*avx512vl_truncatev8hiv8qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovwb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4845], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8813 */ { "*avx512vl_us_truncatev8hiv8qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovuswb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4845], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8813 */ { "*avx512vl_ss_truncatev8siv8qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4847], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8813 */ { "*avx512vl_truncatev8siv8qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4847], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8813 */ { "*avx512vl_us_truncatev8siv8qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4847], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8831 */ { "avx512vl_ss_truncatev8hiv8qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovswb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev8hiv8qi2_mask }, &operand_data[4849], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8831 */ { "avx512vl_truncatev8hiv8qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovwb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev8hiv8qi2_mask }, &operand_data[4849], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8831 */ { "avx512vl_us_truncatev8hiv8qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovuswb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev8hiv8qi2_mask }, &operand_data[4849], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8831 */ { "avx512vl_ss_truncatev8siv8qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev8siv8qi2_mask }, &operand_data[4853], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8831 */ { "avx512vl_truncatev8siv8qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev8siv8qi2_mask }, &operand_data[4853], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8831 */ { "avx512vl_us_truncatev8siv8qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev8siv8qi2_mask }, &operand_data[4853], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8854 */ { "avx512vl_ss_truncatev8hiv8qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovswb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev8hiv8qi2_mask_store }, &operand_data[4857], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8854 */ { "avx512vl_truncatev8hiv8qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovwb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev8hiv8qi2_mask_store }, &operand_data[4857], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8854 */ { "avx512vl_us_truncatev8hiv8qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovuswb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev8hiv8qi2_mask_store }, &operand_data[4857], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8854 */ { "avx512vl_ss_truncatev8siv8qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev8siv8qi2_mask_store }, &operand_data[4860], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8854 */ { "avx512vl_truncatev8siv8qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev8siv8qi2_mask_store }, &operand_data[4860], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8854 */ { "avx512vl_us_truncatev8siv8qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev8siv8qi2_mask_store }, &operand_data[4860], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8888 */ { "*avx512vl_ss_truncatev4div4hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4863], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8888 */ { "*avx512vl_truncatev4div4hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4863], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8888 */ { "*avx512vl_us_truncatev4div4hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4863], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8888 */ { "*avx512vl_ss_truncatev2div2hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4866], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8888 */ { "*avx512vl_truncatev2div2hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4866], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8888 */ { "*avx512vl_us_truncatev2div2hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4866], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8888 */ { "*avx512vl_ss_truncatev4siv4hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4869], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8888 */ { "*avx512vl_truncatev4siv4hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4869], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8888 */ { "*avx512vl_us_truncatev4siv4hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4869], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8900 */ { "*avx512vl_ss_truncatev4siv4hi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4872], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8900 */ { "*avx512vl_truncatev4siv4hi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4872], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8900 */ { "*avx512vl_us_truncatev4siv4hi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4872], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8900 */ { "*avx512vl_ss_truncatev4div4hi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4874], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8900 */ { "*avx512vl_truncatev4div4hi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4874], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8900 */ { "*avx512vl_us_truncatev4div4hi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4874], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8916 */ { "avx512vl_ss_truncatev4siv4hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev4siv4hi2_mask }, &operand_data[4876], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8916 */ { "avx512vl_truncatev4siv4hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev4siv4hi2_mask }, &operand_data[4876], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8916 */ { "avx512vl_us_truncatev4siv4hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev4siv4hi2_mask }, &operand_data[4876], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8916 */ { "avx512vl_ss_truncatev4div4hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev4div4hi2_mask }, &operand_data[4880], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8916 */ { "avx512vl_truncatev4div4hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev4div4hi2_mask }, &operand_data[4880], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8916 */ { "avx512vl_us_truncatev4div4hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev4div4hi2_mask }, &operand_data[4880], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8935 */ { "avx512vl_ss_truncatev4siv4hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsdw\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev4siv4hi2_mask_store }, &operand_data[4884], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8935 */ { "avx512vl_truncatev4siv4hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovdw\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev4siv4hi2_mask_store }, &operand_data[4884], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8935 */ { "avx512vl_us_truncatev4siv4hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusdw\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev4siv4hi2_mask_store }, &operand_data[4884], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8935 */ { "avx512vl_ss_truncatev4div4hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqw\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev4div4hi2_mask_store }, &operand_data[4887], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8935 */ { "avx512vl_truncatev4div4hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqw\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev4div4hi2_mask_store }, &operand_data[4887], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8935 */ { "avx512vl_us_truncatev4div4hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqw\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev4div4hi2_mask_store }, &operand_data[4887], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8957 */ { "*avx512vl_ss_truncatev2div2hi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4890], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8957 */ { "*avx512vl_truncatev2div2hi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4890], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8957 */ { "*avx512vl_us_truncatev2div2hi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4890], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8974 */ { "avx512vl_ss_truncatev2div2hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev2div2hi2_mask }, &operand_data[4892], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8974 */ { "avx512vl_truncatev2div2hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev2div2hi2_mask }, &operand_data[4892], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8974 */ { "avx512vl_us_truncatev2div2hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev2div2hi2_mask }, &operand_data[4892], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8993 */ { "avx512vl_ss_truncatev2div2hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqw\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev2div2hi2_mask_store }, &operand_data[4896], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8993 */ { "avx512vl_truncatev2div2hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqw\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev2div2hi2_mask_store }, &operand_data[4896], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8993 */ { "avx512vl_us_truncatev2div2hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqw\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev2div2hi2_mask_store }, &operand_data[4896], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9015 */ { "*avx512vl_ss_truncatev2div2si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4899], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9015 */ { "*avx512vl_truncatev2div2si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4899], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9015 */ { "*avx512vl_us_truncatev2div2si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4899], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9027 */ { "*avx512vl_ss_truncatev2div2si2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4902], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9027 */ { "*avx512vl_truncatev2div2si2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4902], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9027 */ { "*avx512vl_us_truncatev2div2si2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4902], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9042 */ { "avx512vl_ss_truncatev2div2si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev2div2si2_mask }, &operand_data[4904], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9042 */ { "avx512vl_truncatev2div2si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev2div2si2_mask }, &operand_data[4904], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9042 */ { "avx512vl_us_truncatev2div2si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev2div2si2_mask }, &operand_data[4904], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9059 */ { "avx512vl_ss_truncatev2div2si2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqd\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev2div2si2_mask_store }, &operand_data[4908], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9059 */ { "avx512vl_truncatev2div2si2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqd\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev2div2si2_mask_store }, &operand_data[4908], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9059 */ { "avx512vl_us_truncatev2div2si2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqd\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev2div2si2_mask_store }, &operand_data[4908], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9079 */ { "*avx512f_ss_truncatev8div16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4911], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9079 */ { "*avx512f_truncatev8div16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4911], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9079 */ { "*avx512f_us_truncatev8div16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4911], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9094 */ { "*avx512f_ss_truncatev8div16qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4913], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9094 */ { "*avx512f_truncatev8div16qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4913], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9094 */ { "*avx512f_us_truncatev8div16qi2_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4913], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9112 */ { "avx512f_ss_truncatev8div16qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ss_truncatev8div16qi2_mask }, &operand_data[4915], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9112 */ { "avx512f_truncatev8div16qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_truncatev8div16qi2_mask }, &operand_data[4915], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9112 */ { "avx512f_us_truncatev8div16qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_us_truncatev8div16qi2_mask }, &operand_data[4915], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9135 */ { "avx512f_ss_truncatev8div16qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsqb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ss_truncatev8div16qi2_mask_store }, &operand_data[4919], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9135 */ { "avx512f_truncatev8div16qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovqb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_truncatev8div16qi2_mask_store }, &operand_data[4919], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9135 */ { "avx512f_us_truncatev8div16qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovusqb\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_us_truncatev8div16qi2_mask_store }, &operand_data[4919], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2689 }, #else { 0, output_2689, 0 }, #endif { 0 }, &operand_data[4922], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2690 }, #else { 0, output_2690, 0 }, #endif { 0 }, &operand_data[4922], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2691 }, #else { 0, output_2691, 0 }, #endif { 0 }, &operand_data[4927], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2692 }, #else { 0, output_2692, 0 }, #endif { 0 }, &operand_data[4927], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2693 }, #else { 0, output_2693, 0 }, #endif { 0 }, &operand_data[4932], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2694 }, #else { 0, output_2694, 0 }, #endif { 0 }, &operand_data[4932], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2695 }, #else { 0, output_2695, 0 }, #endif { 0 }, &operand_data[4937], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2696 }, #else { 0, output_2696, 0 }, #endif { 0 }, &operand_data[4937], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2697 }, #else { 0, output_2697, 0 }, #endif { 0 }, &operand_data[4942], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2698 }, #else { 0, output_2698, 0 }, #endif { 0 }, &operand_data[4942], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2699 }, #else { 0, output_2699, 0 }, #endif { 0 }, &operand_data[4947], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2700 }, #else { 0, output_2700, 0 }, #endif { 0 }, &operand_data[4947], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2701 }, #else { 0, output_2701, 0 }, #endif { 0 }, &operand_data[4952], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2702 }, #else { 0, output_2702, 0 }, #endif { 0 }, &operand_data[4952], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2703 }, #else { 0, output_2703, 0 }, #endif { 0 }, &operand_data[4957], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2704 }, #else { 0, output_2704, 0 }, #endif { 0 }, &operand_data[4957], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2705 }, #else { 0, output_2705, 0 }, #endif { 0 }, &operand_data[4962], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2706 }, #else { 0, output_2706, 0 }, #endif { 0 }, &operand_data[4962], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2707 }, #else { 0, output_2707, 0 }, #endif { 0 }, &operand_data[4967], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2708 }, #else { 0, output_2708, 0 }, #endif { 0 }, &operand_data[4967], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2709 }, #else { 0, output_2709, 0 }, #endif { 0 }, &operand_data[4972], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2710 }, #else { 0, output_2710, 0 }, #endif { 0 }, &operand_data[4972], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2711 }, #else { 0, output_2711, 0 }, #endif { 0 }, &operand_data[4977], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2712 }, #else { 0, output_2712, 0 }, #endif { 0 }, &operand_data[4977], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2713 }, #else { 0, output_2713, 0 }, #endif { 0 }, &operand_data[4982], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2714 }, #else { 0, output_2714, 0 }, #endif { 0 }, &operand_data[4982], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2715 }, #else { 0, output_2715, 0 }, #endif { 0 }, &operand_data[4987], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2716 }, #else { 0, output_2716, 0 }, #endif { 0 }, &operand_data[4987], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2717 }, #else { 0, output_2717, 0 }, #endif { 0 }, &operand_data[4992], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2718 }, #else { 0, output_2718, 0 }, #endif { 0 }, &operand_data[4992], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2719 }, #else { 0, output_2719, 0 }, #endif { 0 }, &operand_data[4997], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2720 }, #else { 0, output_2720, 0 }, #endif { 0 }, &operand_data[4997], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2721 }, #else { 0, output_2721, 0 }, #endif { 0 }, &operand_data[5002], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2722 }, #else { 0, output_2722, 0 }, #endif { 0 }, &operand_data[5002], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2723 }, #else { 0, output_2723, 0 }, #endif { 0 }, &operand_data[5007], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2724 }, #else { 0, output_2724, 0 }, #endif { 0 }, &operand_data[5007], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2725 }, #else { 0, output_2725, 0 }, #endif { 0 }, &operand_data[5012], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2726 }, #else { 0, output_2726, 0 }, #endif { 0 }, &operand_data[5012], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2727 }, #else { 0, output_2727, 0 }, #endif { 0 }, &operand_data[5017], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2728 }, #else { 0, output_2728, 0 }, #endif { 0 }, &operand_data[5017], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2729 }, #else { 0, output_2729, 0 }, #endif { 0 }, &operand_data[5022], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2730 }, #else { 0, output_2730, 0 }, #endif { 0 }, &operand_data[5022], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2731 }, #else { 0, output_2731, 0 }, #endif { 0 }, &operand_data[5027], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2732 }, #else { 0, output_2732, 0 }, #endif { 0 }, &operand_data[5027], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2733 }, #else { 0, output_2733, 0 }, #endif { 0 }, &operand_data[5032], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*addv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2734 }, #else { 0, output_2734, 0 }, #endif { 0 }, &operand_data[5032], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2735 }, #else { 0, output_2735, 0 }, #endif { 0 }, &operand_data[5037], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9205 */ { "*subv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2736 }, #else { 0, output_2736, 0 }, #endif { 0 }, &operand_data[5037], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*addv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5042], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*subv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5047], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*addv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*subv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5057], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*addv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5062], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*subv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5067], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*addv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5072], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*subv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5077], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*addv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5082], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*subv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5087], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*addv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5092], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9221 */ { "*subv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5097], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*addv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5102], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*subv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5107], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*addv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5112], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*subv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5117], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*addv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5122], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*subv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5127], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*addv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5132], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*subv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5137], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*addv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5142], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*subv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5147], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*addv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpaddw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5152], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9236 */ { "*subv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsubw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5157], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_ssaddv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2761 }, #else { 0, output_2761, 0 }, #endif { 0 }, &operand_data[4922], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_ssaddv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2762 }, #else { 0, output_2762, 0 }, #endif { 0 }, &operand_data[4922], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_usaddv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2763 }, #else { 0, output_2763, 0 }, #endif { 0 }, &operand_data[4922], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_usaddv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2764 }, #else { 0, output_2764, 0 }, #endif { 0 }, &operand_data[4922], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_sssubv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2765 }, #else { 0, output_2765, 0 }, #endif { 0 }, &operand_data[4927], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_sssubv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2766 }, #else { 0, output_2766, 0 }, #endif { 0 }, &operand_data[4927], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_ussubv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2767 }, #else { 0, output_2767, 0 }, #endif { 0 }, &operand_data[4927], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_ussubv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2768 }, #else { 0, output_2768, 0 }, #endif { 0 }, &operand_data[4927], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_ssaddv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2769 }, #else { 0, output_2769, 0 }, #endif { 0 }, &operand_data[4932], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_ssaddv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2770 }, #else { 0, output_2770, 0 }, #endif { 0 }, &operand_data[4932], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_usaddv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2771 }, #else { 0, output_2771, 0 }, #endif { 0 }, &operand_data[4932], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_usaddv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2772 }, #else { 0, output_2772, 0 }, #endif { 0 }, &operand_data[4932], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_sssubv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2773 }, #else { 0, output_2773, 0 }, #endif { 0 }, &operand_data[4937], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_sssubv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2774 }, #else { 0, output_2774, 0 }, #endif { 0 }, &operand_data[4937], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_ussubv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2775 }, #else { 0, output_2775, 0 }, #endif { 0 }, &operand_data[4937], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_ussubv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2776 }, #else { 0, output_2776, 0 }, #endif { 0 }, &operand_data[4937], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_ssaddv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2777 }, #else { 0, output_2777, 0 }, #endif { 0 }, &operand_data[4942], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_ssaddv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2778 }, #else { 0, output_2778, 0 }, #endif { 0 }, &operand_data[4942], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_usaddv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2779 }, #else { 0, output_2779, 0 }, #endif { 0 }, &operand_data[4942], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_usaddv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2780 }, #else { 0, output_2780, 0 }, #endif { 0 }, &operand_data[4942], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_sssubv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2781 }, #else { 0, output_2781, 0 }, #endif { 0 }, &operand_data[4947], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_sssubv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2782 }, #else { 0, output_2782, 0 }, #endif { 0 }, &operand_data[4947], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_ussubv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2783 }, #else { 0, output_2783, 0 }, #endif { 0 }, &operand_data[4947], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_ussubv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2784 }, #else { 0, output_2784, 0 }, #endif { 0 }, &operand_data[4947], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_ssaddv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2785 }, #else { 0, output_2785, 0 }, #endif { 0 }, &operand_data[4952], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_ssaddv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2786 }, #else { 0, output_2786, 0 }, #endif { 0 }, &operand_data[4952], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_usaddv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2787 }, #else { 0, output_2787, 0 }, #endif { 0 }, &operand_data[4952], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_usaddv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2788 }, #else { 0, output_2788, 0 }, #endif { 0 }, &operand_data[4952], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_sssubv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2789 }, #else { 0, output_2789, 0 }, #endif { 0 }, &operand_data[4957], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_sssubv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2790 }, #else { 0, output_2790, 0 }, #endif { 0 }, &operand_data[4957], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_ussubv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2791 }, #else { 0, output_2791, 0 }, #endif { 0 }, &operand_data[4957], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx512bw_ussubv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2792 }, #else { 0, output_2792, 0 }, #endif { 0 }, &operand_data[4957], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_ssaddv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2793 }, #else { 0, output_2793, 0 }, #endif { 0 }, &operand_data[4962], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_ssaddv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2794 }, #else { 0, output_2794, 0 }, #endif { 0 }, &operand_data[4962], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_usaddv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2795 }, #else { 0, output_2795, 0 }, #endif { 0 }, &operand_data[4962], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_usaddv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2796 }, #else { 0, output_2796, 0 }, #endif { 0 }, &operand_data[4962], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_sssubv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2797 }, #else { 0, output_2797, 0 }, #endif { 0 }, &operand_data[4967], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_sssubv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2798 }, #else { 0, output_2798, 0 }, #endif { 0 }, &operand_data[4967], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_ussubv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2799 }, #else { 0, output_2799, 0 }, #endif { 0 }, &operand_data[4967], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*avx2_ussubv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2800 }, #else { 0, output_2800, 0 }, #endif { 0 }, &operand_data[4967], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_ssaddv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2801 }, #else { 0, output_2801, 0 }, #endif { 0 }, &operand_data[4972], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_ssaddv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2802 }, #else { 0, output_2802, 0 }, #endif { 0 }, &operand_data[4972], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_usaddv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2803 }, #else { 0, output_2803, 0 }, #endif { 0 }, &operand_data[4972], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_usaddv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2804 }, #else { 0, output_2804, 0 }, #endif { 0 }, &operand_data[4972], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_sssubv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2805 }, #else { 0, output_2805, 0 }, #endif { 0 }, &operand_data[4977], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_sssubv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2806 }, #else { 0, output_2806, 0 }, #endif { 0 }, &operand_data[4977], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_ussubv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2807 }, #else { 0, output_2807, 0 }, #endif { 0 }, &operand_data[4977], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9258 */ { "*sse2_ussubv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2808 }, #else { 0, output_2808, 0 }, #endif { 0 }, &operand_data[4977], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9291 */ { "*mulv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2809 }, #else { 0, output_2809, 0 }, #endif { 0 }, &operand_data[4952], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9291 */ { "*mulv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2810 }, #else { 0, output_2810, 0 }, #endif { 0 }, &operand_data[4952], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9291 */ { "*mulv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2811 }, #else { 0, output_2811, 0 }, #endif { 0 }, &operand_data[4962], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9291 */ { "*mulv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2812 }, #else { 0, output_2812, 0 }, #endif { 0 }, &operand_data[4962], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9291 */ { "*mulv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2813 }, #else { 0, output_2813, 0 }, #endif { 0 }, &operand_data[4972], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9291 */ { "*mulv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2814 }, #else { 0, output_2814, 0 }, #endif { 0 }, &operand_data[4972], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*smulv32hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2815 }, #else { 0, output_2815, 0 }, #endif { 0 }, &operand_data[4952], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*smulv32hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2816 }, #else { 0, output_2816, 0 }, #endif { 0 }, &operand_data[4952], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*umulv32hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2817 }, #else { 0, output_2817, 0 }, #endif { 0 }, &operand_data[4952], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*umulv32hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2818 }, #else { 0, output_2818, 0 }, #endif { 0 }, &operand_data[4952], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*smulv16hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2819 }, #else { 0, output_2819, 0 }, #endif { 0 }, &operand_data[4962], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*smulv16hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2820 }, #else { 0, output_2820, 0 }, #endif { 0 }, &operand_data[4962], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*umulv16hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2821 }, #else { 0, output_2821, 0 }, #endif { 0 }, &operand_data[4962], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*umulv16hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2822 }, #else { 0, output_2822, 0 }, #endif { 0 }, &operand_data[4962], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*smulv8hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2823 }, #else { 0, output_2823, 0 }, #endif { 0 }, &operand_data[4972], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*smulv8hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2824 }, #else { 0, output_2824, 0 }, #endif { 0 }, &operand_data[4972], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*umulv8hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2825 }, #else { 0, output_2825, 0 }, #endif { 0 }, &operand_data[4972], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9321 */ { "*umulv8hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2826 }, #else { 0, output_2826, 0 }, #endif { 0 }, &operand_data[4972], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9363 */ { "*vec_widen_umult_even_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmuludq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5162], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9363 */ { "*vec_widen_umult_even_v16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmuludq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5162], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9404 */ { "*vec_widen_umult_even_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmuludq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5167], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9404 */ { "*vec_widen_umult_even_v8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmuludq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5167], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9438 */ { "*vec_widen_umult_even_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2831 }, #else { 0, output_2831, 0 }, #endif { 0 }, &operand_data[5172], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9438 */ { "*vec_widen_umult_even_v4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2832 }, #else { 0, output_2832, 0 }, #endif { 0 }, &operand_data[5172], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9480 */ { "*vec_widen_smult_even_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmuldq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5162], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9480 */ { "*vec_widen_smult_even_v16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmuldq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5162], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9521 */ { "*vec_widen_smult_even_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmuldq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5177], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9521 */ { "*vec_widen_smult_even_v8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmuldq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5177], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9556 */ { "*sse4_1_mulv2siv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2837 }, #else { 0, output_2837, 0 }, #endif { 0 }, &operand_data[5182], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9556 */ { "*sse4_1_mulv2siv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2838 }, #else { 0, output_2838, 0 }, #endif { 0 }, &operand_data[5182], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9580 */ { "avx512bw_pmaddwd512v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddwd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddwd512v32hi }, &operand_data[5187], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9580 */ { "avx512bw_pmaddwd512v32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddwd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddwd512v32hi_mask }, &operand_data[5187], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9580 */ { "avx512bw_pmaddwd512v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddwd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddwd512v16hi }, &operand_data[5192], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9580 */ { "avx512bw_pmaddwd512v16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddwd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddwd512v16hi_mask }, &operand_data[5192], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9580 */ { "avx512bw_pmaddwd512v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddwd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddwd512v8hi }, &operand_data[5197], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9580 */ { "avx512bw_pmaddwd512v8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddwd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddwd512v8hi_mask }, &operand_data[5197], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9626 */ { "*avx2_pmaddwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddwd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5202], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9689 */ { "*sse2_pmaddwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2846 }, #else { 0, output_2846, 0 }, #endif { 0 }, &operand_data[5205], 3, 3, 2, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9723 */ { "avx512dq_mulv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmullq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_mulv8di3 }, &operand_data[1927], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9723 */ { "avx512dq_mulv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmullq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_mulv8di3_mask }, &operand_data[4713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9723 */ { "avx512dq_mulv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmullq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_mulv4di3 }, &operand_data[1931], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9723 */ { "avx512dq_mulv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmullq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_mulv4di3_mask }, &operand_data[4708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9723 */ { "avx512dq_mulv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmullq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_mulv2di3 }, &operand_data[1935], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9723 */ { "avx512dq_mulv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmullq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_mulv2di3_mask }, &operand_data[5208], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9756 */ { "*avx512f_mulv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2853 }, #else { 0, output_2853, 0 }, #endif { 0 }, &operand_data[5213], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9756 */ { "*avx512f_mulv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2854 }, #else { 0, output_2854, 0 }, #endif { 0 }, &operand_data[5213], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9756 */ { "*avx2_mulv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2855 }, #else { 0, output_2855, 0 }, #endif { 0 }, &operand_data[5218], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9756 */ { "*avx2_mulv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2856 }, #else { 0, output_2856, 0 }, #endif { 0 }, &operand_data[5218], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9756 */ { "*sse4_1_mulv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2857 }, #else { 0, output_2857, 0 }, #endif { 0 }, &operand_data[5223], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9756 */ { "*sse4_1_mulv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2858 }, #else { 0, output_2858, 0 }, #endif { 0 }, &operand_data[5223], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9896 */ { "ashrv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2859 }, #else { 0, output_2859, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv16hi3 }, &operand_data[5228], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9896 */ { "ashrv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2860 }, #else { 0, output_2860, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv8hi3 }, &operand_data[5231], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9896 */ { "ashrv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2861 }, #else { 0, output_2861, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv8si3 }, &operand_data[5234], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9896 */ { "ashrv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2862 }, #else { 0, output_2862, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv4si3 }, &operand_data[5237], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9915 */ { "*ashrv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5240], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9915 */ { "ashrv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv16hi3_mask }, &operand_data[5240], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9915 */ { "*ashrv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5245], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9915 */ { "ashrv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv8hi3_mask }, &operand_data[5245], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9915 */ { "*ashrv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrad\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5250], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9915 */ { "ashrv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrad\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv8si3_mask }, &operand_data[5250], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9915 */ { "*ashrv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrad\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5255], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9915 */ { "ashrv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrad\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv4si3_mask }, &operand_data[5255], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9929 */ { "*ashrv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5260], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9929 */ { "ashrv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv2di3_mask }, &operand_data[5260], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9943 */ { "ashrv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv32hi3 }, &operand_data[5265], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9943 */ { "ashrv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv32hi3_mask }, &operand_data[5265], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9943 */ { "ashrv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv4di3 }, &operand_data[5270], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9943 */ { "ashrv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv4di3_mask }, &operand_data[5270], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9943 */ { "ashrv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrad\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv16si3 }, &operand_data[5275], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9943 */ { "ashrv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrad\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv16si3_mask }, &operand_data[5275], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9943 */ { "ashrv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv8di3 }, &operand_data[5280], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9943 */ { "ashrv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsraq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv8di3_mask }, &operand_data[5280], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "ashlv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2881 }, #else { 0, output_2881, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv32hi3 }, &operand_data[5285], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "ashlv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2882 }, #else { 0, output_2882, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv32hi3_mask }, &operand_data[5285], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "lshrv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2883 }, #else { 0, output_2883, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv32hi3 }, &operand_data[5285], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "lshrv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2884 }, #else { 0, output_2884, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv32hi3_mask }, &operand_data[5285], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "ashlv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2885 }, #else { 0, output_2885, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv16hi3 }, &operand_data[5290], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "ashlv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2886 }, #else { 0, output_2886, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv16hi3_mask }, &operand_data[5290], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "lshrv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2887 }, #else { 0, output_2887, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv16hi3 }, &operand_data[5290], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "lshrv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2888 }, #else { 0, output_2888, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv16hi3_mask }, &operand_data[5290], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "ashlv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2889 }, #else { 0, output_2889, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv8hi3 }, &operand_data[5295], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "ashlv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2890 }, #else { 0, output_2890, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv8hi3_mask }, &operand_data[5295], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "lshrv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2891 }, #else { 0, output_2891, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv8hi3 }, &operand_data[5295], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9957 */ { "lshrv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2892 }, #else { 0, output_2892, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv8hi3_mask }, &operand_data[5295], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "ashlv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2893 }, #else { 0, output_2893, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv8si3 }, &operand_data[5300], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "ashlv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2894 }, #else { 0, output_2894, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv8si3_mask }, &operand_data[5300], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "lshrv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2895 }, #else { 0, output_2895, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv8si3 }, &operand_data[5300], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "lshrv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2896 }, #else { 0, output_2896, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv8si3_mask }, &operand_data[5300], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "ashlv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2897 }, #else { 0, output_2897, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv4si3 }, &operand_data[5305], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "ashlv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2898 }, #else { 0, output_2898, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv4si3_mask }, &operand_data[5305], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "lshrv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2899 }, #else { 0, output_2899, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv4si3 }, &operand_data[5305], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "lshrv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2900 }, #else { 0, output_2900, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv4si3_mask }, &operand_data[5305], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "ashlv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2901 }, #else { 0, output_2901, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv4di3 }, &operand_data[5310], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "ashlv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2902 }, #else { 0, output_2902, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv4di3_mask }, &operand_data[5310], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "lshrv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2903 }, #else { 0, output_2903, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv4di3 }, &operand_data[5310], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "lshrv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2904 }, #else { 0, output_2904, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv4di3_mask }, &operand_data[5310], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "ashlv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2905 }, #else { 0, output_2905, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv2di3 }, &operand_data[5315], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "ashlv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2906 }, #else { 0, output_2906, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv2di3_mask }, &operand_data[5315], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "lshrv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2907 }, #else { 0, output_2907, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv2di3 }, &operand_data[5315], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9976 */ { "lshrv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_2908 }, #else { 0, output_2908, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv2di3_mask }, &operand_data[5315], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9995 */ { "ashlv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpslld\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv16si3 }, &operand_data[5320], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9995 */ { "ashlv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpslld\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv16si3_mask }, &operand_data[5320], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9995 */ { "lshrv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrld\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv16si3 }, &operand_data[5320], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9995 */ { "lshrv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrld\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv16si3_mask }, &operand_data[5320], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9995 */ { "ashlv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv8di3 }, &operand_data[5325], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9995 */ { "ashlv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv8di3_mask }, &operand_data[5325], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9995 */ { "lshrv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv8di3 }, &operand_data[5325], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9995 */ { "lshrv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv8di3_mask }, &operand_data[5325], 5, 5, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10025 */ { "avx512bw_ashlv4ti3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2917 }, #else { 0, 0, output_2917 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ashlv4ti3 }, &operand_data[5330], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10025 */ { "avx2_ashlv2ti3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2918 }, #else { 0, 0, output_2918 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashlv2ti3 }, &operand_data[5333], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10025 */ { "sse2_ashlv1ti3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2919 }, #else { 0, 0, output_2919 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ashlv1ti3 }, &operand_data[5336], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10064 */ { "avx512bw_lshrv4ti3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2920 }, #else { 0, 0, output_2920 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_lshrv4ti3 }, &operand_data[5330], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10064 */ { "avx2_lshrv2ti3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2921 }, #else { 0, 0, output_2921 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_lshrv2ti3 }, &operand_data[5333], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10064 */ { "sse2_lshrv1ti3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_2922 }, #else { 0, 0, output_2922 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_lshrv1ti3 }, &operand_data[5336], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512f_rolvv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rolvv16si }, &operand_data[1915], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512f_rolvv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rolvv16si_mask }, &operand_data[5339], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512f_rorvv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rorvv16si }, &operand_data[1915], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512f_rorvv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rorvv16si_mask }, &operand_data[5339], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rolvv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolvv8si }, &operand_data[1919], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rolvv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolvv8si_mask }, &operand_data[5344], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rorvv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorvv8si }, &operand_data[1919], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rorvv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorvv8si_mask }, &operand_data[5344], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rolvv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolvv4si }, &operand_data[1923], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rolvv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolvv4si_mask }, &operand_data[5349], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rorvv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorvv4si }, &operand_data[1923], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rorvv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorvv4si_mask }, &operand_data[5349], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512f_rolvv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rolvv8di }, &operand_data[1927], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512f_rolvv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rolvv8di_mask }, &operand_data[4713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512f_rorvv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rorvv8di }, &operand_data[1927], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512f_rorvv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rorvv8di_mask }, &operand_data[4713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rolvv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolvv4di }, &operand_data[1931], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rolvv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolvv4di_mask }, &operand_data[4708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rorvv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorvv4di }, &operand_data[1931], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rorvv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorvv4di_mask }, &operand_data[4708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rolvv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolvv2di }, &operand_data[1935], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rolvv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolvv2di_mask }, &operand_data[5208], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rorvv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorvv2di }, &operand_data[1935], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10091 */ { "avx512vl_rorvv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorvv2di_mask }, &operand_data[5208], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512f_rolv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprold\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rolv16si }, &operand_data[5354], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512f_rolv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprold\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rolv16si_mask }, &operand_data[5354], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512f_rorv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprord\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rorv16si }, &operand_data[5354], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512f_rorv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprord\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rorv16si_mask }, &operand_data[5354], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rolv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprold\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolv8si }, &operand_data[5359], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rolv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprold\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolv8si_mask }, &operand_data[5359], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rorv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprord\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorv8si }, &operand_data[5359], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rorv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprord\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorv8si_mask }, &operand_data[5359], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rolv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprold\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolv4si }, &operand_data[5364], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rolv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprold\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolv4si_mask }, &operand_data[5364], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rorv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprord\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorv4si }, &operand_data[5364], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rorv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprord\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorv4si_mask }, &operand_data[5364], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512f_rolv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rolv8di }, &operand_data[5369], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512f_rolv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rolv8di_mask }, &operand_data[5369], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512f_rorv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rorv8di }, &operand_data[5369], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512f_rorv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_rorv8di_mask }, &operand_data[5369], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rolv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolv4di }, &operand_data[5374], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rolv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolv4di_mask }, &operand_data[5374], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rorv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorv4di }, &operand_data[5374], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rorv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorv4di_mask }, &operand_data[5374], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rolv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolv2di }, &operand_data[5379], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rolv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprolq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rolv2di_mask }, &operand_data[5379], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rorv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorv2di }, &operand_data[5379], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10101 */ { "avx512vl_rorv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprorq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_rorv2di_mask }, &operand_data[5379], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_smaxv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5122], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_sminv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5122], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_umaxv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxub\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5122], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_uminv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminub\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5122], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_smaxv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5142], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_sminv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5142], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_umaxv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5142], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_uminv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5142], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_smaxv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_sminv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_umaxv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxud\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10119 */ { "*avx2_uminv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminud\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5042], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5042], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5042], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5042], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxud\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5042], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxud\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5042], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminud\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5042], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminud\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5042], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxud\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxud\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminud\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminud\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5052], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5062], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5062], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5062], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5062], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxud\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5062], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxud\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5062], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminud\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5062], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminud\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5062], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5072], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5072], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5072], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5072], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5072], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5072], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5072], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5072], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5082], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5082], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5082], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5082], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5082], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5082], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5082], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5082], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5092], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_smaxv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5092], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5092], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_sminv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5092], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5092], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_umaxv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5092], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5092], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10142 */ { "*avx512bw_uminv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5092], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*smaxv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1963], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "smaxv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv64qi3_mask }, &operand_data[5384], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*sminv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1963], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "sminv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv64qi3_mask }, &operand_data[5384], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*umaxv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxub\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1963], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "umaxv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxub\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv64qi3_mask }, &operand_data[5384], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*uminv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminub\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1963], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "uminv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminub\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv64qi3_mask }, &operand_data[5384], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*smaxv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1967], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "smaxv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv16qi3_mask }, &operand_data[5389], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*sminv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1967], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "sminv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv16qi3_mask }, &operand_data[5389], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*umaxv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxub\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1967], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "umaxv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxub\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv16qi3_mask }, &operand_data[5389], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*uminv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminub\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1967], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "uminv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminub\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv16qi3_mask }, &operand_data[5389], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*smaxv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1971], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "smaxv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv32qi3_mask }, &operand_data[5394], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*sminv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1971], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "sminv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv32qi3_mask }, &operand_data[5394], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*umaxv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxub\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1971], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "umaxv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxub\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv32qi3_mask }, &operand_data[5394], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*uminv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminub\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1971], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "uminv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminub\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv32qi3_mask }, &operand_data[5394], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*smaxv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1975], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "smaxv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv32hi3_mask }, &operand_data[5399], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*sminv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1975], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "sminv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv32hi3_mask }, &operand_data[5399], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*umaxv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1975], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "umaxv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv32hi3_mask }, &operand_data[5399], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*uminv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1975], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "uminv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv32hi3_mask }, &operand_data[5399], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*smaxv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1979], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "smaxv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv16hi3_mask }, &operand_data[5404], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*sminv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1979], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "sminv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv16hi3_mask }, &operand_data[5404], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*umaxv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1979], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "umaxv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv16hi3_mask }, &operand_data[5404], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*uminv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1979], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "uminv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv16hi3_mask }, &operand_data[5404], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*smaxv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1983], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "smaxv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8hi3_mask }, &operand_data[5409], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*sminv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1983], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "sminv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8hi3_mask }, &operand_data[5409], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*umaxv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1983], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "umaxv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaxuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv8hi3_mask }, &operand_data[5409], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "*uminv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1983], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10154 */ { "uminv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpminuw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv8hi3_mask }, &operand_data[5409], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10246 */ { "*sse4_1_smaxv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3079 }, #else { 0, output_3079, 0 }, #endif { 0 }, &operand_data[5414], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10246 */ { "*sse4_1_smaxv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3080 }, #else { 0, output_3080, 0 }, #endif { 0 }, &operand_data[5414], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10246 */ { "*sse4_1_sminv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3081 }, #else { 0, output_3081, 0 }, #endif { 0 }, &operand_data[5414], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10246 */ { "*sse4_1_sminv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3082 }, #else { 0, output_3082, 0 }, #endif { 0 }, &operand_data[5414], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10246 */ { "*sse4_1_smaxv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3083 }, #else { 0, output_3083, 0 }, #endif { 0 }, &operand_data[5223], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10246 */ { "*sse4_1_smaxv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3084 }, #else { 0, output_3084, 0 }, #endif { 0 }, &operand_data[5223], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10246 */ { "*sse4_1_sminv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3085 }, #else { 0, output_3085, 0 }, #endif { 0 }, &operand_data[5223], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10246 */ { "*sse4_1_sminv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3086 }, #else { 0, output_3086, 0 }, #endif { 0 }, &operand_data[5223], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10264 */ { "*smaxv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3087 }, #else { 0, output_3087, 0 }, #endif { 0 }, &operand_data[5419], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10264 */ { "*sminv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3088 }, #else { 0, output_3088, 0 }, #endif { 0 }, &operand_data[5419], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10330 */ { "*sse4_1_umaxv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3089 }, #else { 0, output_3089, 0 }, #endif { 0 }, &operand_data[5422], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10330 */ { "*sse4_1_umaxv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3090 }, #else { 0, output_3090, 0 }, #endif { 0 }, &operand_data[5422], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10330 */ { "*sse4_1_uminv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3091 }, #else { 0, output_3091, 0 }, #endif { 0 }, &operand_data[5422], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10330 */ { "*sse4_1_uminv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3092 }, #else { 0, output_3092, 0 }, #endif { 0 }, &operand_data[5422], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10330 */ { "*sse4_1_umaxv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3093 }, #else { 0, output_3093, 0 }, #endif { 0 }, &operand_data[5223], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10330 */ { "*sse4_1_umaxv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3094 }, #else { 0, output_3094, 0 }, #endif { 0 }, &operand_data[5223], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10330 */ { "*sse4_1_uminv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3095 }, #else { 0, output_3095, 0 }, #endif { 0 }, &operand_data[5223], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10330 */ { "*sse4_1_uminv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3096 }, #else { 0, output_3096, 0 }, #endif { 0 }, &operand_data[5223], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10348 */ { "*umaxv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3097 }, #else { 0, output_3097, 0 }, #endif { 0 }, &operand_data[5427], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10348 */ { "*uminv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3098 }, #else { 0, output_3098, 0 }, #endif { 0 }, &operand_data[5427], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10378 */ { "*avx2_eqv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5430], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10378 */ { "*avx2_eqv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5433], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10378 */ { "*avx2_eqv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5436], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10378 */ { "*avx2_eqv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5439], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512bw_eqv64qi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_eqv64qi3_1 }, &operand_data[5442], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512bw_eqv64qi3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_eqv64qi3_mask_1 }, &operand_data[5442], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512vl_eqv16qi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv16qi3_1 }, &operand_data[5446], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512vl_eqv16qi3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv16qi3_mask_1 }, &operand_data[5446], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512vl_eqv32qi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv32qi3_1 }, &operand_data[5450], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512vl_eqv32qi3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv32qi3_mask_1 }, &operand_data[5450], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512bw_eqv32hi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_eqv32hi3_1 }, &operand_data[5454], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512bw_eqv32hi3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_eqv32hi3_mask_1 }, &operand_data[5454], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512vl_eqv16hi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv16hi3_1 }, &operand_data[5458], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512vl_eqv16hi3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv16hi3_mask_1 }, &operand_data[5458], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512vl_eqv8hi3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv8hi3_1 }, &operand_data[5462], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10408 */ { "avx512vl_eqv8hi3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv8hi3_mask_1 }, &operand_data[5462], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512f_eqv16si3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_eqv16si3_1 }, &operand_data[5466], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512f_eqv16si3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_eqv16si3_mask_1 }, &operand_data[5466], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512vl_eqv8si3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv8si3_1 }, &operand_data[5470], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512vl_eqv8si3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv8si3_mask_1 }, &operand_data[5470], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512vl_eqv4si3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv4si3_1 }, &operand_data[5474], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512vl_eqv4si3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv4si3_mask_1 }, &operand_data[5474], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512f_eqv8di3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_eqv8di3_1 }, &operand_data[5478], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512f_eqv8di3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_eqv8di3_mask_1 }, &operand_data[5478], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512vl_eqv4di3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv4di3_1 }, &operand_data[5482], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512vl_eqv4di3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv4di3_mask_1 }, &operand_data[5482], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512vl_eqv2di3_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv2di3_1 }, &operand_data[5486], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10421 */ { "avx512vl_eqv2di3_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpeqq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv2di3_mask_1 }, &operand_data[5486], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10434 */ { "*sse4_1_eqv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3127 }, #else { 0, output_3127, 0 }, #endif { 0 }, &operand_data[5490], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10450 */ { "*sse2_eqv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3128 }, #else { 0, output_3128, 0 }, #endif { 0 }, &operand_data[5427], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10450 */ { "*sse2_eqv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3129 }, #else { 0, output_3129, 0 }, #endif { 0 }, &operand_data[5419], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10450 */ { "*sse2_eqv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3130 }, #else { 0, output_3130, 0 }, #endif { 0 }, &operand_data[5493], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10482 */ { "sse4_2_gtv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3131 }, #else { 0, output_3131, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_gtv2di3 }, &operand_data[5496], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10498 */ { "avx2_gtv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gtv32qi3 }, &operand_data[5499], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10498 */ { "avx2_gtv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gtv16hi3 }, &operand_data[5502], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10498 */ { "avx2_gtv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gtv8si3 }, &operand_data[5505], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10498 */ { "avx2_gtv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gtv4di3 }, &operand_data[5508], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512f_gtv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gtv16si3 }, &operand_data[2666], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512f_gtv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gtv16si3_mask }, &operand_data[5511], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512vl_gtv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv8si3 }, &operand_data[2682], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512vl_gtv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv8si3_mask }, &operand_data[5515], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512vl_gtv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv4si3 }, &operand_data[2687], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512vl_gtv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv4si3_mask }, &operand_data[5519], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512f_gtv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gtv8di3 }, &operand_data[2692], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512f_gtv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gtv8di3_mask }, &operand_data[5523], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512vl_gtv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv4di3 }, &operand_data[2708], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512vl_gtv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv4di3_mask }, &operand_data[5527], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512vl_gtv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv2di3 }, &operand_data[2713], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10510 */ { "avx512vl_gtv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv2di3_mask }, &operand_data[5531], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512bw_gtv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_gtv64qi3 }, &operand_data[2770], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512bw_gtv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_gtv64qi3_mask }, &operand_data[5535], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512vl_gtv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv16qi3 }, &operand_data[2775], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512vl_gtv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv16qi3_mask }, &operand_data[5539], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512vl_gtv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv32qi3 }, &operand_data[2780], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512vl_gtv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv32qi3_mask }, &operand_data[5543], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512bw_gtv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_gtv32hi3 }, &operand_data[2785], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512bw_gtv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_gtv32hi3_mask }, &operand_data[5547], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512vl_gtv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv16hi3 }, &operand_data[2790], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512vl_gtv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv16hi3_mask }, &operand_data[5551], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512vl_gtv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv8hi3 }, &operand_data[2795], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10522 */ { "avx512vl_gtv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmpgtw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gtv8hi3_mask }, &operand_data[5555], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10534 */ { "sse2_gtv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3160 }, #else { 0, output_3160, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_gtv16qi3 }, &operand_data[5559], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10534 */ { "sse2_gtv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3161 }, #else { 0, output_3161, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_gtv8hi3 }, &operand_data[5562], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10534 */ { "sse2_gtv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3162 }, #else { 0, output_3162, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_gtv4si3 }, &operand_data[3767], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3163 }, #else { 0, 0, output_3163 }, #endif { 0 }, &operand_data[5565], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3164 }, #else { 0, 0, output_3164 }, #endif { 0 }, &operand_data[5565], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3165 }, #else { 0, 0, output_3165 }, #endif { 0 }, &operand_data[5570], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3166 }, #else { 0, 0, output_3166 }, #endif { 0 }, &operand_data[5570], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3167 }, #else { 0, 0, output_3167 }, #endif { 0 }, &operand_data[5575], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3168 }, #else { 0, 0, output_3168 }, #endif { 0 }, &operand_data[5575], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3169 }, #else { 0, 0, output_3169 }, #endif { 0 }, &operand_data[5580], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3170 }, #else { 0, 0, output_3170 }, #endif { 0 }, &operand_data[5580], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3171 }, #else { 0, 0, output_3171 }, #endif { 0 }, &operand_data[5585], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3172 }, #else { 0, 0, output_3172 }, #endif { 0 }, &operand_data[5585], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3173 }, #else { 0, 0, output_3173 }, #endif { 0 }, &operand_data[5590], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3174 }, #else { 0, 0, output_3174 }, #endif { 0 }, &operand_data[5590], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3175 }, #else { 0, 0, output_3175 }, #endif { 0 }, &operand_data[5595], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3176 }, #else { 0, 0, output_3176 }, #endif { 0 }, &operand_data[5595], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3177 }, #else { 0, 0, output_3177 }, #endif { 0 }, &operand_data[5600], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3178 }, #else { 0, 0, output_3178 }, #endif { 0 }, &operand_data[5600], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3179 }, #else { 0, 0, output_3179 }, #endif { 0 }, &operand_data[5605], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3180 }, #else { 0, 0, output_3180 }, #endif { 0 }, &operand_data[5605], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3181 }, #else { 0, 0, output_3181 }, #endif { 0 }, &operand_data[5610], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3182 }, #else { 0, 0, output_3182 }, #endif { 0 }, &operand_data[5610], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3183 }, #else { 0, 0, output_3183 }, #endif { 0 }, &operand_data[5615], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3184 }, #else { 0, 0, output_3184 }, #endif { 0 }, &operand_data[5615], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3185 }, #else { 0, 0, output_3185 }, #endif { 0 }, &operand_data[4718], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10775 */ { "*andnotv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3186 }, #else { 0, 0, output_3186 }, #endif { 0 }, &operand_data[4718], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10872 */ { "*andnotv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5339], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10872 */ { "*andnotv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5344], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10872 */ { "*andnotv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5349], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10872 */ { "*andnotv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10872 */ { "*andnotv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10872 */ { "*andnotv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5208], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10887 */ { "*andnotv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5384], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10887 */ { "*andnotv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5389], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10887 */ { "*andnotv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5394], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10887 */ { "*andnotv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5399], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10887 */ { "*andnotv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5404], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10887 */ { "*andnotv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpandnw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5409], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3199 }, #else { 0, 0, output_3199 }, #endif { 0 }, &operand_data[4982], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3200 }, #else { 0, 0, output_3200 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv16si3_mask }, &operand_data[4982], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3201 }, #else { 0, 0, output_3201 }, #endif { 0 }, &operand_data[4982], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3202 }, #else { 0, 0, output_3202 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv16si3_mask }, &operand_data[4982], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3203 }, #else { 0, 0, output_3203 }, #endif { 0 }, &operand_data[4982], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3204 }, #else { 0, 0, output_3204 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv16si3_mask }, &operand_data[4982], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3205 }, #else { 0, 0, output_3205 }, #endif { 0 }, &operand_data[5012], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3206 }, #else { 0, 0, output_3206 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv8di3_mask }, &operand_data[5012], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3207 }, #else { 0, 0, output_3207 }, #endif { 0 }, &operand_data[5012], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3208 }, #else { 0, 0, output_3208 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv8di3_mask }, &operand_data[5012], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3209 }, #else { 0, 0, output_3209 }, #endif { 0 }, &operand_data[5012], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3210 }, #else { 0, 0, output_3210 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv8di3_mask }, &operand_data[5012], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3211 }, #else { 0, 0, output_3211 }, #endif { 0 }, &operand_data[4922], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3212 }, #else { 0, 0, output_3212 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv64qi3_mask }, &operand_data[4922], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3213 }, #else { 0, 0, output_3213 }, #endif { 0 }, &operand_data[4922], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3214 }, #else { 0, 0, output_3214 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv64qi3_mask }, &operand_data[4922], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3215 }, #else { 0, 0, output_3215 }, #endif { 0 }, &operand_data[4922], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3216 }, #else { 0, 0, output_3216 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv64qi3_mask }, &operand_data[4922], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3217 }, #else { 0, 0, output_3217 }, #endif { 0 }, &operand_data[4932], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3218 }, #else { 0, 0, output_3218 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv32qi3_mask }, &operand_data[4932], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3219 }, #else { 0, 0, output_3219 }, #endif { 0 }, &operand_data[4932], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3220 }, #else { 0, 0, output_3220 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv32qi3_mask }, &operand_data[4932], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3221 }, #else { 0, 0, output_3221 }, #endif { 0 }, &operand_data[4932], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3222 }, #else { 0, 0, output_3222 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv32qi3_mask }, &operand_data[4932], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3223 }, #else { 0, 0, output_3223 }, #endif { 0 }, &operand_data[4942], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3224 }, #else { 0, 0, output_3224 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv16qi3_mask }, &operand_data[4942], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3225 }, #else { 0, 0, output_3225 }, #endif { 0 }, &operand_data[4942], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3226 }, #else { 0, 0, output_3226 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv16qi3_mask }, &operand_data[4942], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3227 }, #else { 0, 0, output_3227 }, #endif { 0 }, &operand_data[4942], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3228 }, #else { 0, 0, output_3228 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv16qi3_mask }, &operand_data[4942], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3229 }, #else { 0, 0, output_3229 }, #endif { 0 }, &operand_data[4952], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3230 }, #else { 0, 0, output_3230 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv32hi3_mask }, &operand_data[4952], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3231 }, #else { 0, 0, output_3231 }, #endif { 0 }, &operand_data[4952], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3232 }, #else { 0, 0, output_3232 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv32hi3_mask }, &operand_data[4952], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3233 }, #else { 0, 0, output_3233 }, #endif { 0 }, &operand_data[4952], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3234 }, #else { 0, 0, output_3234 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv32hi3_mask }, &operand_data[4952], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3235 }, #else { 0, 0, output_3235 }, #endif { 0 }, &operand_data[4962], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3236 }, #else { 0, 0, output_3236 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv16hi3_mask }, &operand_data[4962], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3237 }, #else { 0, 0, output_3237 }, #endif { 0 }, &operand_data[4962], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3238 }, #else { 0, 0, output_3238 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv16hi3_mask }, &operand_data[4962], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3239 }, #else { 0, 0, output_3239 }, #endif { 0 }, &operand_data[4962], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3240 }, #else { 0, 0, output_3240 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv16hi3_mask }, &operand_data[4962], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3241 }, #else { 0, 0, output_3241 }, #endif { 0 }, &operand_data[4972], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3242 }, #else { 0, 0, output_3242 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv8hi3_mask }, &operand_data[4972], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3243 }, #else { 0, 0, output_3243 }, #endif { 0 }, &operand_data[4972], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3244 }, #else { 0, 0, output_3244 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv8hi3_mask }, &operand_data[4972], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3245 }, #else { 0, 0, output_3245 }, #endif { 0 }, &operand_data[4972], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3246 }, #else { 0, 0, output_3246 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv8hi3_mask }, &operand_data[4972], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3247 }, #else { 0, 0, output_3247 }, #endif { 0 }, &operand_data[4992], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3248 }, #else { 0, 0, output_3248 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv8si3_mask }, &operand_data[4992], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3249 }, #else { 0, 0, output_3249 }, #endif { 0 }, &operand_data[4992], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3250 }, #else { 0, 0, output_3250 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv8si3_mask }, &operand_data[4992], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3251 }, #else { 0, 0, output_3251 }, #endif { 0 }, &operand_data[4992], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3252 }, #else { 0, 0, output_3252 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv8si3_mask }, &operand_data[4992], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3253 }, #else { 0, 0, output_3253 }, #endif { 0 }, &operand_data[5002], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3254 }, #else { 0, 0, output_3254 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv4si3_mask }, &operand_data[5002], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3255 }, #else { 0, 0, output_3255 }, #endif { 0 }, &operand_data[5002], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3256 }, #else { 0, 0, output_3256 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv4si3_mask }, &operand_data[5002], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3257 }, #else { 0, 0, output_3257 }, #endif { 0 }, &operand_data[5002], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3258 }, #else { 0, 0, output_3258 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv4si3_mask }, &operand_data[5002], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3259 }, #else { 0, 0, output_3259 }, #endif { 0 }, &operand_data[5022], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3260 }, #else { 0, 0, output_3260 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv4di3_mask }, &operand_data[5022], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3261 }, #else { 0, 0, output_3261 }, #endif { 0 }, &operand_data[5022], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3262 }, #else { 0, 0, output_3262 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv4di3_mask }, &operand_data[5022], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3263 }, #else { 0, 0, output_3263 }, #endif { 0 }, &operand_data[5022], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3264 }, #else { 0, 0, output_3264 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv4di3_mask }, &operand_data[5022], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*andv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3265 }, #else { 0, 0, output_3265 }, #endif { 0 }, &operand_data[5032], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "andv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3266 }, #else { 0, 0, output_3266 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv2di3_mask }, &operand_data[5032], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*iorv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3267 }, #else { 0, 0, output_3267 }, #endif { 0 }, &operand_data[5032], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "iorv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3268 }, #else { 0, 0, output_3268 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv2di3_mask }, &operand_data[5032], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "*xorv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3269 }, #else { 0, 0, output_3269 }, #endif { 0 }, &operand_data[5032], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10913 */ { "xorv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3270 }, #else { 0, 0, output_3270 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv2di3_mask }, &operand_data[5032], 5, 5, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512bw_testmv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_testmv64qi3 }, &operand_data[2770], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512bw_testmv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_testmv64qi3_mask }, &operand_data[5535], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512vl_testmv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv16qi3 }, &operand_data[2775], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512vl_testmv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv16qi3_mask }, &operand_data[5539], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512vl_testmv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv32qi3 }, &operand_data[2780], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512vl_testmv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv32qi3_mask }, &operand_data[5543], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512bw_testmv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_testmv32hi3 }, &operand_data[2785], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512bw_testmv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_testmv32hi3_mask }, &operand_data[5547], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512vl_testmv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv16hi3 }, &operand_data[2790], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512vl_testmv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv16hi3_mask }, &operand_data[5551], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512vl_testmv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv8hi3 }, &operand_data[2795], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11011 */ { "avx512vl_testmv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv8hi3_mask }, &operand_data[5555], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512f_testmv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_testmv16si3 }, &operand_data[2666], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512f_testmv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_testmv16si3_mask }, &operand_data[5511], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512vl_testmv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv8si3 }, &operand_data[2682], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512vl_testmv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv8si3_mask }, &operand_data[5515], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512vl_testmv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv4si3 }, &operand_data[2687], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512vl_testmv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv4si3_mask }, &operand_data[5519], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512f_testmv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_testmv8di3 }, &operand_data[2692], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512f_testmv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_testmv8di3_mask }, &operand_data[5523], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512vl_testmv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv4di3 }, &operand_data[2708], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512vl_testmv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv4di3_mask }, &operand_data[5527], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512vl_testmv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv2di3 }, &operand_data[2713], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11022 */ { "avx512vl_testmv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestmq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testmv2di3_mask }, &operand_data[5531], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512bw_testnmv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_testnmv64qi3 }, &operand_data[2770], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512bw_testnmv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_testnmv64qi3_mask }, &operand_data[5535], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512vl_testnmv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv16qi3 }, &operand_data[2775], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512vl_testnmv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv16qi3_mask }, &operand_data[5539], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512vl_testnmv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv32qi3 }, &operand_data[2780], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512vl_testnmv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmb\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv32qi3_mask }, &operand_data[5543], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512bw_testnmv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_testnmv32hi3 }, &operand_data[2785], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512bw_testnmv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_testnmv32hi3_mask }, &operand_data[5547], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512vl_testnmv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv16hi3 }, &operand_data[2790], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512vl_testnmv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv16hi3_mask }, &operand_data[5551], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512vl_testnmv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv8hi3 }, &operand_data[2795], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11033 */ { "avx512vl_testnmv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmw\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv8hi3_mask }, &operand_data[5555], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512f_testnmv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_testnmv16si3 }, &operand_data[2666], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512f_testnmv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_testnmv16si3_mask }, &operand_data[5511], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512vl_testnmv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv8si3 }, &operand_data[2682], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512vl_testnmv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv8si3_mask }, &operand_data[5515], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512vl_testnmv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv4si3 }, &operand_data[2687], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512vl_testnmv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv4si3_mask }, &operand_data[5519], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512f_testnmv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_testnmv8di3 }, &operand_data[2692], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512f_testnmv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_testnmv8di3_mask }, &operand_data[5523], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512vl_testnmv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv4di3 }, &operand_data[2708], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512vl_testnmv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv4di3_mask }, &operand_data[5527], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512vl_testnmv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv2di3 }, &operand_data[2713], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11044 */ { "avx512vl_testnmv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptestnmq\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_testnmv2di3_mask }, &operand_data[5531], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11073 */ { "avx512bw_packsswb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3319 }, #else { 0, output_3319, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_packsswb }, &operand_data[5620], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11073 */ { "avx512bw_packsswb_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3320 }, #else { 0, output_3320, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_packsswb_mask }, &operand_data[5620], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11073 */ { "avx2_packsswb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3321 }, #else { 0, output_3321, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_packsswb }, &operand_data[5625], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11073 */ { "avx2_packsswb_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3322 }, #else { 0, output_3322, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_packsswb_mask }, &operand_data[5625], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11073 */ { "sse2_packsswb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3323 }, #else { 0, output_3323, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_packsswb }, &operand_data[5630], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11073 */ { "sse2_packsswb_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3324 }, #else { 0, output_3324, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_packsswb_mask }, &operand_data[5630], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11090 */ { "avx512bw_packssdw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3325 }, #else { 0, output_3325, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_packssdw }, &operand_data[5635], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11090 */ { "avx512bw_packssdw_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3326 }, #else { 0, output_3326, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_packssdw_mask }, &operand_data[5635], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11090 */ { "avx2_packssdw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3327 }, #else { 0, output_3327, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_packssdw }, &operand_data[5640], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11090 */ { "avx2_packssdw_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3328 }, #else { 0, output_3328, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_packssdw_mask }, &operand_data[5640], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11090 */ { "sse2_packssdw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3329 }, #else { 0, output_3329, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_packssdw }, &operand_data[5645], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11090 */ { "sse2_packssdw_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3330 }, #else { 0, output_3330, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_packssdw_mask }, &operand_data[5645], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11107 */ { "avx512bw_packuswb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3331 }, #else { 0, output_3331, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_packuswb }, &operand_data[5620], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11107 */ { "avx512bw_packuswb_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3332 }, #else { 0, output_3332, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_packuswb_mask }, &operand_data[5620], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11107 */ { "avx2_packuswb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3333 }, #else { 0, output_3333, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_packuswb }, &operand_data[5625], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11107 */ { "avx2_packuswb_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3334 }, #else { 0, output_3334, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_packuswb_mask }, &operand_data[5625], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11107 */ { "sse2_packuswb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3335 }, #else { 0, output_3335, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_packuswb }, &operand_data[5630], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11107 */ { "sse2_packuswb_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3336 }, #else { 0, output_3336, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_packuswb_mask }, &operand_data[5630], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11124 */ { "avx512bw_interleave_highv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhbw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_interleave_highv64qi }, &operand_data[1963], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11124 */ { "avx512bw_interleave_highv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhbw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_interleave_highv64qi_mask }, &operand_data[5384], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11168 */ { "avx2_interleave_highv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhbw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_highv32qi }, &operand_data[1971], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11168 */ { "avx2_interleave_highv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhbw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_highv32qi_mask }, &operand_data[5394], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11196 */ { "vec_interleave_highv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3341 }, #else { 0, output_3341, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv16qi }, &operand_data[5585], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11196 */ { "vec_interleave_highv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3342 }, #else { 0, output_3342, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv16qi_mask }, &operand_data[5585], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11220 */ { "avx512bw_interleave_lowv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklbw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_interleave_lowv64qi }, &operand_data[1963], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11220 */ { "avx512bw_interleave_lowv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklbw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_interleave_lowv64qi_mask }, &operand_data[5384], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11264 */ { "avx2_interleave_lowv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklbw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_lowv32qi }, &operand_data[1971], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11264 */ { "avx2_interleave_lowv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklbw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_lowv32qi_mask }, &operand_data[5394], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11292 */ { "vec_interleave_lowv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3347 }, #else { 0, output_3347, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv16qi }, &operand_data[5585], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11292 */ { "vec_interleave_lowv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3348 }, #else { 0, output_3348, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv16qi_mask }, &operand_data[5585], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11316 */ { "avx512bw_interleave_highv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhwd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_interleave_highv32hi }, &operand_data[1975], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11316 */ { "avx512bw_interleave_highv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhwd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_interleave_highv32hi_mask }, &operand_data[5399], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11344 */ { "avx2_interleave_highv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhwd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_highv16hi }, &operand_data[1979], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11344 */ { "avx2_interleave_highv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhwd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_highv16hi_mask }, &operand_data[5404], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11364 */ { "vec_interleave_highv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3353 }, #else { 0, output_3353, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv8hi }, &operand_data[5600], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11364 */ { "vec_interleave_highv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3354 }, #else { 0, output_3354, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv8hi_mask }, &operand_data[5600], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11384 */ { "*avx512bw_interleave_lowv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklwd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1975], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11384 */ { "avx512bw_interleave_lowv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklwd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_interleave_lowv32hi_mask }, &operand_data[5399], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11412 */ { "avx2_interleave_lowv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklwd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_lowv16hi }, &operand_data[1979], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11412 */ { "avx2_interleave_lowv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpcklwd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_lowv16hi_mask }, &operand_data[5404], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11432 */ { "vec_interleave_lowv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3359 }, #else { 0, output_3359, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv8hi }, &operand_data[5600], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11432 */ { "vec_interleave_lowv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3360 }, #else { 0, output_3360, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv8hi_mask }, &operand_data[5600], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11452 */ { "avx2_interleave_highv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhdq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_highv8si }, &operand_data[1919], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11452 */ { "avx2_interleave_highv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhdq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_highv8si_mask }, &operand_data[5344], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11468 */ { "*avx512f_interleave_highv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhdq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1915], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11468 */ { "avx512f_interleave_highv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckhdq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_interleave_highv16si_mask }, &operand_data[5339], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11489 */ { "vec_interleave_highv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3365 }, #else { 0, output_3365, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv4si }, &operand_data[5610], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11489 */ { "vec_interleave_highv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3366 }, #else { 0, output_3366, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv4si_mask }, &operand_data[5610], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11507 */ { "avx2_interleave_lowv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckldq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_lowv8si }, &operand_data[1919], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11507 */ { "avx2_interleave_lowv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckldq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_interleave_lowv8si_mask }, &operand_data[5344], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11523 */ { "*avx512f_interleave_lowv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckldq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1915], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11523 */ { "avx512f_interleave_lowv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpunpckldq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_interleave_lowv16si_mask }, &operand_data[5339], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11543 */ { "vec_interleave_lowv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3371 }, #else { 0, output_3371, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv4si }, &operand_data[5610], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11543 */ { "vec_interleave_lowv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3372 }, #else { 0, output_3372, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv4si_mask }, &operand_data[5610], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11608 */ { "sse4_1_pinsrb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3373 }, #else { 0, 0, output_3373 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_pinsrb }, &operand_data[5650], 4, 4, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11608 */ { "sse2_pinsrw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3374 }, #else { 0, 0, output_3374 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pinsrw }, &operand_data[5654], 4, 4, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11608 */ { "sse4_1_pinsrd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3375 }, #else { 0, 0, output_3375 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_pinsrd }, &operand_data[5658], 4, 4, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11608 */ { "sse4_1_pinsrq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3376 }, #else { 0, 0, output_3376 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_pinsrq }, &operand_data[5662], 4, 4, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11683 */ { "*avx512dq_vinsertf64x2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3377 }, #else { 0, 0, output_3377 }, #endif { 0 }, &operand_data[5666], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11683 */ { "avx512dq_vinsertf64x2_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3378 }, #else { 0, 0, output_3378 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vinsertf64x2_1_mask }, &operand_data[5666], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11683 */ { "*avx512dq_vinserti64x2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3379 }, #else { 0, 0, output_3379 }, #endif { 0 }, &operand_data[5672], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11683 */ { "avx512dq_vinserti64x2_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3380 }, #else { 0, 0, output_3380 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vinserti64x2_1_mask }, &operand_data[5672], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11683 */ { "*avx512f_vinsertf32x4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3381 }, #else { 0, 0, output_3381 }, #endif { 0 }, &operand_data[5678], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11683 */ { "avx512f_vinsertf32x4_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3382 }, #else { 0, 0, output_3382 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vinsertf32x4_1_mask }, &operand_data[5678], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11683 */ { "*avx512f_vinserti32x4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3383 }, #else { 0, 0, output_3383 }, #endif { 0 }, &operand_data[5684], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11683 */ { "avx512f_vinserti32x4_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3384 }, #else { 0, 0, output_3384 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vinserti32x4_1_mask }, &operand_data[5684], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11736 */ { "vec_set_lo_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsertf32x8\t{$0x0, %2, %1, %0|%0, %1, %2, $0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v16sf }, &operand_data[5690], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11736 */ { "vec_set_lo_v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsertf32x8\t{$0x0, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, $0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v16sf_mask }, &operand_data[5690], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11736 */ { "vec_set_lo_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinserti32x8\t{$0x0, %2, %1, %0|%0, %1, %2, $0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v16si }, &operand_data[5695], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11736 */ { "vec_set_lo_v16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinserti32x8\t{$0x0, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, $0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v16si_mask }, &operand_data[5695], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11753 */ { "vec_set_hi_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsertf32x8\t{$0x1, %2, %1, %0|%0, %1, %2, $0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v16sf }, &operand_data[5690], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11753 */ { "vec_set_hi_v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsertf32x8\t{$0x1, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, $0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v16sf_mask }, &operand_data[5690], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11753 */ { "vec_set_hi_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinserti32x8\t{$0x1, %2, %1, %0|%0, %1, %2, $0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v16si }, &operand_data[5695], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11753 */ { "vec_set_hi_v16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinserti32x8\t{$0x1, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, $0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v16si_mask }, &operand_data[5695], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11770 */ { "vec_set_lo_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsertf64x4\t{$0x0, %2, %1, %0|%0, %1, %2, $0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v8df }, &operand_data[5700], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11770 */ { "vec_set_lo_v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsertf64x4\t{$0x0, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, $0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v8df_mask }, &operand_data[5700], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11770 */ { "vec_set_lo_v8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinserti64x4\t{$0x0, %2, %1, %0|%0, %1, %2, $0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v8di }, &operand_data[5705], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11770 */ { "vec_set_lo_v8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinserti64x4\t{$0x0, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, $0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v8di_mask }, &operand_data[5705], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11785 */ { "vec_set_hi_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsertf64x4\t{$0x1, %2, %1, %0|%0, %1, %2, $0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v8df }, &operand_data[5700], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11785 */ { "vec_set_hi_v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsertf64x4\t{$0x1, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, $0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v8df_mask }, &operand_data[5700], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11785 */ { "vec_set_hi_v8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinserti64x4\t{$0x1, %2, %1, %0|%0, %1, %2, $0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v8di }, &operand_data[5705], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11785 */ { "vec_set_hi_v8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinserti64x4\t{$0x1, %2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2, $0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v8di_mask }, &operand_data[5705], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11820 */ { "*avx512dq_shuf_i64x2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3401 }, #else { 0, 0, output_3401 }, #endif { 0 }, &operand_data[5710], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11820 */ { "avx512dq_shuf_i64x2_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3402 }, #else { 0, 0, output_3402 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_shuf_i64x2_1_mask }, &operand_data[5710], 9, 9, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11820 */ { "*avx512dq_shuf_f64x2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3403 }, #else { 0, 0, output_3403 }, #endif { 0 }, &operand_data[5719], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11820 */ { "avx512dq_shuf_f64x2_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3404 }, #else { 0, 0, output_3404 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_shuf_f64x2_1_mask }, &operand_data[5719], 9, 9, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11869 */ { "avx512f_shuf_f64x2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3405 }, #else { 0, 0, output_3405 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_f64x2_1 }, &operand_data[5728], 11, 11, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11869 */ { "avx512f_shuf_f64x2_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3406 }, #else { 0, 0, output_3406 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_f64x2_1_mask }, &operand_data[5728], 13, 13, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11869 */ { "avx512f_shuf_i64x2_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3407 }, #else { 0, 0, output_3407 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_i64x2_1 }, &operand_data[5741], 11, 11, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11869 */ { "avx512f_shuf_i64x2_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3408 }, #else { 0, 0, output_3408 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_i64x2_1_mask }, &operand_data[5741], 13, 13, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11927 */ { "*avx512vl_shuf_i32x4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3409 }, #else { 0, 0, output_3409 }, #endif { 0 }, &operand_data[5754], 11, 11, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11927 */ { "avx512vl_shuf_i32x4_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3410 }, #else { 0, 0, output_3410 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_shuf_i32x4_1_mask }, &operand_data[5754], 13, 13, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11927 */ { "*avx512vl_shuf_f32x4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3411 }, #else { 0, 0, output_3411 }, #endif { 0 }, &operand_data[5767], 11, 11, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11927 */ { "avx512vl_shuf_f32x4_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3412 }, #else { 0, 0, output_3412 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_shuf_f32x4_1_mask }, &operand_data[5767], 13, 13, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11993 */ { "avx512f_shuf_f32x4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3413 }, #else { 0, 0, output_3413 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_f32x4_1 }, &operand_data[5780], 19, 19, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11993 */ { "avx512f_shuf_f32x4_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3414 }, #else { 0, 0, output_3414 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_f32x4_1_mask }, &operand_data[5780], 21, 21, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11993 */ { "avx512f_shuf_i32x4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3415 }, #else { 0, 0, output_3415 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_i32x4_1 }, &operand_data[5801], 19, 19, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11993 */ { "avx512f_shuf_i32x4_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3416 }, #else { 0, 0, output_3416 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_i32x4_1_mask }, &operand_data[5801], 21, 21, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12073 */ { "avx512f_pshufd_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3417 }, #else { 0, 0, output_3417 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_pshufd_1 }, &operand_data[5822], 18, 18, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12073 */ { "avx512f_pshufd_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3418 }, #else { 0, 0, output_3418 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_pshufd_1_mask }, &operand_data[5822], 20, 20, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12162 */ { "avx2_pshufd_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3419 }, #else { 0, 0, output_3419 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshufd_1 }, &operand_data[5842], 10, 10, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12162 */ { "avx2_pshufd_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3420 }, #else { 0, 0, output_3420 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshufd_1_mask }, &operand_data[5842], 12, 12, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12228 */ { "sse2_pshufd_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3421 }, #else { 0, 0, output_3421 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pshufd_1 }, &operand_data[5854], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12228 */ { "sse2_pshufd_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3422 }, #else { 0, 0, output_3422 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pshufd_1_mask }, &operand_data[5854], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12253 */ { "*avx512bw_pshuflwv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshuflw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5862], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12253 */ { "avx512bw_pshuflwv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshuflw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pshuflwv32hi_mask }, &operand_data[5862], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12306 */ { "avx2_pshuflw_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3425 }, #else { 0, 0, output_3425 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshuflw_1 }, &operand_data[5867], 10, 10, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12306 */ { "avx2_pshuflw_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3426 }, #else { 0, 0, output_3426 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshuflw_1_mask }, &operand_data[5867], 12, 12, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12380 */ { "sse2_pshuflw_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3427 }, #else { 0, 0, output_3427 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pshuflw_1 }, &operand_data[5879], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12380 */ { "sse2_pshuflw_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3428 }, #else { 0, 0, output_3428 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pshuflw_1_mask }, &operand_data[5879], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12429 */ { "*avx512bw_pshufhwv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshufhw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5862], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12429 */ { "avx512bw_pshufhwv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshufhw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pshufhwv32hi_mask }, &operand_data[5862], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12463 */ { "avx2_pshufhw_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3431 }, #else { 0, 0, output_3431 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshufhw_1 }, &operand_data[5887], 10, 10, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12463 */ { "avx2_pshufhw_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3432 }, #else { 0, 0, output_3432 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshufhw_1_mask }, &operand_data[5887], 12, 12, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12537 */ { "sse2_pshufhw_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3433 }, #else { 0, 0, output_3433 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pshufhw_1 }, &operand_data[5899], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12537 */ { "sse2_pshufhw_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3434 }, #else { 0, 0, output_3434 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pshufhw_1_mask }, &operand_data[5899], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12577 */ { "sse2_loadld", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3435 }, #else { 0, output_3435, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loadld }, &operand_data[5907], 3, 3, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12596 */ { "*vec_extractv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3436 }, #else { 0, output_3436, 0 }, #endif { 0 }, &operand_data[5910], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12596 */ { "*vec_extractv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3437 }, #else { 0, output_3437, 0 }, #endif { 0 }, &operand_data[5913], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12623 */ { "*vec_extractv8hi_sse2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pextrw\t{%2, %1, %k0|%k0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5916], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12636 */ { "*vec_extractv16qi_zext", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpextrb\t{%2, %1, %k0|%k0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5919], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12651 */ { "*vec_extractv8hi_zext", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpextrw\t{%2, %1, %k0|%k0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5922], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12666 */ { "*vec_extractv16qi_mem", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5925], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12666 */ { "*vec_extractv8hi_mem", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5928], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12675 */ { "*vec_extractv4si_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5931], 2, 2, 0, 4, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12696 */ { "*vec_extractv2di_0_sse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5933], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12714 */ { "*vec_extractv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3445 }, #else { 0, 0, output_3445 }, #endif { 0 }, &operand_data[5935], 3, 3, 0, 4, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12760 */ { "*vec_extractv4si_mem", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[5938], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12782 */ { "*vec_extractv2di_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3447 }, #else { 0, output_3447, 0 }, #endif { 0 }, &operand_data[5941], 2, 2, 0, 7, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12877 */ { "*vec_concatv2si_sse4_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3448 }, #else { 0, output_3448, 0 }, #endif { 0 }, &operand_data[5943], 3, 3, 0, 9, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12903 */ { "*vec_concatv2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3449 }, #else { 0, output_3449, 0 }, #endif { 0 }, &operand_data[5946], 3, 3, 0, 7, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12921 */ { "*vec_concatv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3450 }, #else { 0, output_3450, 0 }, #endif { 0 }, &operand_data[5949], 3, 3, 0, 5, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12939 */ { "vec_concatv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3451 }, #else { 0, 0, output_3451 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_concatv2di }, &operand_data[5952], 3, 3, 0, 11, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*avx512bw_uavgv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3452 }, #else { 0, output_3452, 0 }, #endif { 0 }, &operand_data[5955], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*avx512bw_uavgv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3453 }, #else { 0, output_3453, 0 }, #endif { 0 }, &operand_data[5959], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*avx2_uavgv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3454 }, #else { 0, output_3454, 0 }, #endif { 0 }, &operand_data[5965], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*avx2_uavgv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3455 }, #else { 0, output_3455, 0 }, #endif { 0 }, &operand_data[5969], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*sse2_uavgv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3456 }, #else { 0, output_3456, 0 }, #endif { 0 }, &operand_data[5975], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*sse2_uavgv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3457 }, #else { 0, output_3457, 0 }, #endif { 0 }, &operand_data[5979], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*avx512bw_uavgv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3458 }, #else { 0, output_3458, 0 }, #endif { 0 }, &operand_data[5985], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*avx512bw_uavgv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3459 }, #else { 0, output_3459, 0 }, #endif { 0 }, &operand_data[5989], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*avx2_uavgv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3460 }, #else { 0, output_3460, 0 }, #endif { 0 }, &operand_data[5995], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*avx2_uavgv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3461 }, #else { 0, output_3461, 0 }, #endif { 0 }, &operand_data[5999], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*sse2_uavgv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3462 }, #else { 0, output_3462, 0 }, #endif { 0 }, &operand_data[6005], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13029 */ { "*sse2_uavgv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3463 }, #else { 0, output_3463, 0 }, #endif { 0 }, &operand_data[6009], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13054 */ { "avx512f_psadbw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3464 }, #else { 0, output_3464, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_psadbw }, &operand_data[6015], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13054 */ { "avx2_psadbw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3465 }, #else { 0, output_3465, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_psadbw }, &operand_data[6018], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13054 */ { "sse2_psadbw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3466 }, #else { 0, output_3466, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_psadbw }, &operand_data[6021], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13071 */ { "avx_movmskps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovmskps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movmskps256 }, &operand_data[6024], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13071 */ { "sse_movmskps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovmskps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_movmskps }, &operand_data[6026], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13071 */ { "avx_movmskpd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovmskpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movmskpd256 }, &operand_data[6028], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13071 */ { "sse2_movmskpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovmskpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_movmskpd }, &operand_data[6030], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13082 */ { "avx2_pmovmskb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovmskb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pmovmskb }, &operand_data[6032], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13092 */ { "sse2_pmovmskb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovmskb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pmovmskb }, &operand_data[5919], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13111 */ { "*sse2_maskmovdqu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3473 }, #else { 0, 0, output_3473 }, #endif { 0 }, &operand_data[6034], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13111 */ { "*sse2_maskmovdqu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3474 }, #else { 0, 0, output_3474 }, #endif { 0 }, &operand_data[6037], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13135 */ { "sse_ldmxcsr", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vldmxcsr\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_ldmxcsr }, &operand_data[63], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13145 */ { "sse_stmxcsr", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vstmxcsr\t%0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_stmxcsr }, &operand_data[272], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13155 */ { "sse2_clflush", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "clflush\t%a0", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_clflush }, &operand_data[1572], 1, 1, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13165 */ { "sse3_mwait", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mwait", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_mwait }, &operand_data[6040], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13176 */ { "sse3_monitor_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^monitor", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_monitor_si }, &operand_data[6040], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13176 */ { "sse3_monitor_di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%^monitor", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_monitor_di }, &operand_data[6043], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13197 */ { "avx2_phaddwv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_phaddwv16hi3 }, &operand_data[5502], 3, 3, 30, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13197 */ { "avx2_phaddswv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_phaddswv16hi3 }, &operand_data[5502], 3, 3, 30, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13197 */ { "avx2_phsubwv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphsubw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_phsubwv16hi3 }, &operand_data[5502], 3, 3, 30, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13197 */ { "avx2_phsubswv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphsubsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_phsubswv16hi3 }, &operand_data[5502], 3, 3, 30, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13273 */ { "ssse3_phaddwv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3485 }, #else { 0, output_3485, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phaddwv8hi3 }, &operand_data[5562], 3, 3, 14, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13273 */ { "ssse3_phaddswv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3486 }, #else { 0, output_3486, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phaddswv8hi3 }, &operand_data[5562], 3, 3, 14, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13273 */ { "ssse3_phsubwv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3487 }, #else { 0, output_3487, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phsubwv8hi3 }, &operand_data[5562], 3, 3, 14, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13273 */ { "ssse3_phsubswv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3488 }, #else { 0, output_3488, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phsubswv8hi3 }, &operand_data[5562], 3, 3, 14, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13322 */ { "ssse3_phaddwv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "phaddw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phaddwv4hi3 }, &operand_data[1751], 3, 3, 6, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13322 */ { "ssse3_phaddswv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "phaddsw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phaddswv4hi3 }, &operand_data[1751], 3, 3, 6, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13322 */ { "ssse3_phsubwv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "phsubw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phsubwv4hi3 }, &operand_data[1751], 3, 3, 6, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13322 */ { "ssse3_phsubswv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "phsubsw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phsubswv4hi3 }, &operand_data[1751], 3, 3, 6, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13351 */ { "avx2_phadddv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_phadddv8si3 }, &operand_data[5505], 3, 3, 14, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13351 */ { "avx2_phsubdv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphsubd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_phsubdv8si3 }, &operand_data[5505], 3, 3, 14, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13395 */ { "ssse3_phadddv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3495 }, #else { 0, output_3495, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phadddv4si3 }, &operand_data[3767], 3, 3, 6, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13395 */ { "ssse3_phsubdv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3496 }, #else { 0, output_3496, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phsubdv4si3 }, &operand_data[3767], 3, 3, 6, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13428 */ { "ssse3_phadddv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "phaddd\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phadddv2si3 }, &operand_data[1754], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13428 */ { "ssse3_phsubdv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "phsubd\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_phsubdv2si3 }, &operand_data[1754], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13449 */ { "avx2_pmaddubsw256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddubsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pmaddubsw256 }, &operand_data[6046], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13505 */ { "avx512bw_pmaddubsw512v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddubsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddubsw512v8hi }, &operand_data[6049], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13505 */ { "avx512bw_pmaddubsw512v8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddubsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddubsw512v8hi_mask }, &operand_data[6049], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13505 */ { "avx512bw_pmaddubsw512v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddubsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddubsw512v16hi }, &operand_data[6054], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13505 */ { "avx512bw_pmaddubsw512v16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddubsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddubsw512v16hi_mask }, &operand_data[6054], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13505 */ { "avx512bw_pmaddubsw512v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddubsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddubsw512v32hi }, &operand_data[6059], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13505 */ { "avx512bw_pmaddubsw512v32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaddubsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pmaddubsw512v32hi_mask }, &operand_data[6059], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13517 */ { "avx512bw_umulhrswv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmulhrsw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_umulhrswv32hi3 }, &operand_data[5132], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13517 */ { "avx512bw_umulhrswv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmulhrsw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_umulhrswv32hi3_mask }, &operand_data[5132], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13552 */ { "ssse3_pmaddubsw128", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3508 }, #else { 0, output_3508, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_pmaddubsw128 }, &operand_data[6064], 3, 3, 2, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13595 */ { "ssse3_pmaddubsw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmaddubsw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_pmaddubsw }, &operand_data[6067], 3, 3, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13672 */ { "*avx512bw_pmulhrswv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3510 }, #else { 0, output_3510, 0 }, #endif { 0 }, &operand_data[5985], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13672 */ { "*avx512bw_pmulhrswv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3511 }, #else { 0, output_3511, 0 }, #endif { 0 }, &operand_data[6070], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13672 */ { "*avx2_pmulhrswv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3512 }, #else { 0, output_3512, 0 }, #endif { 0 }, &operand_data[5995], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13672 */ { "*avx2_pmulhrswv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3513 }, #else { 0, output_3513, 0 }, #endif { 0 }, &operand_data[6076], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13672 */ { "*ssse3_pmulhrswv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3514 }, #else { 0, output_3514, 0 }, #endif { 0 }, &operand_data[6005], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13672 */ { "*ssse3_pmulhrswv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3515 }, #else { 0, output_3515, 0 }, #endif { 0 }, &operand_data[6082], 6, 6, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13698 */ { "*ssse3_pmulhrswv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pmulhrsw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6088], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13719 */ { "avx512bw_pshufbv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3517 }, #else { 0, output_3517, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pshufbv64qi3 }, &operand_data[5575], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13719 */ { "avx512bw_pshufbv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3518 }, #else { 0, output_3518, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_pshufbv64qi3_mask }, &operand_data[5575], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13719 */ { "avx2_pshufbv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3519 }, #else { 0, output_3519, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshufbv32qi3 }, &operand_data[5580], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13719 */ { "avx2_pshufbv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3520 }, #else { 0, output_3520, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshufbv32qi3_mask }, &operand_data[5580], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13719 */ { "ssse3_pshufbv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3521 }, #else { 0, output_3521, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_pshufbv16qi3 }, &operand_data[5585], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13719 */ { "ssse3_pshufbv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3522 }, #else { 0, output_3522, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_pshufbv16qi3_mask }, &operand_data[5585], 5, 5, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13737 */ { "ssse3_pshufbv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pshufb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_pshufbv8qi3 }, &operand_data[1748], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13749 */ { "avx2_psignv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3524 }, #else { 0, output_3524, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_psignv32qi3 }, &operand_data[6092], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13749 */ { "ssse3_psignv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3525 }, #else { 0, output_3525, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_psignv16qi3 }, &operand_data[5559], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13749 */ { "avx2_psignv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3526 }, #else { 0, output_3526, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_psignv16hi3 }, &operand_data[6095], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13749 */ { "ssse3_psignv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3527 }, #else { 0, output_3527, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_psignv8hi3 }, &operand_data[5562], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13749 */ { "avx2_psignv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3528 }, #else { 0, output_3528, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_psignv8si3 }, &operand_data[6098], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13749 */ { "ssse3_psignv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3529 }, #else { 0, output_3529, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_psignv4si3 }, &operand_data[3767], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13766 */ { "ssse3_psignv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psignb\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_psignv8qi3 }, &operand_data[1748], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13766 */ { "ssse3_psignv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psignw\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_psignv4hi3 }, &operand_data[1751], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13766 */ { "ssse3_psignv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "psignd\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_psignv2si3 }, &operand_data[1754], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13779 */ { "avx512bw_palignrv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3533 }, #else { 0, 0, output_3533 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_palignrv64qi_mask }, &operand_data[6101], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13779 */ { "avx2_palignrv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3534 }, #else { 0, 0, output_3534 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_palignrv32qi_mask }, &operand_data[6107], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13779 */ { "ssse3_palignrv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3535 }, #else { 0, 0, output_3535 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_palignrv16qi_mask }, &operand_data[6113], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13801 */ { "avx512bw_palignrv4ti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3536 }, #else { 0, 0, output_3536 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_palignrv4ti }, &operand_data[6119], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13801 */ { "avx2_palignrv2ti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3537 }, #else { 0, 0, output_3537 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_palignrv2ti }, &operand_data[6123], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13801 */ { "ssse3_palignrti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3538 }, #else { 0, 0, output_3538 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_palignrti }, &operand_data[6127], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13831 */ { "ssse3_palignrdi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3539 }, #else { 0, 0, output_3539 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_palignrdi }, &operand_data[6131], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv64qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2078], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv32qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2070], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2074], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv32hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2082], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv16hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2090], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2086], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2094], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2098], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2102], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2106], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2110], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13857 */ { "*absv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpabsq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2114], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13869 */ { "absv16si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv16si2_mask }, &operand_data[2094], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13869 */ { "absv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv8si2_mask }, &operand_data[2098], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13869 */ { "absv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv4si2_mask }, &operand_data[2102], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13869 */ { "absv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv8di2_mask }, &operand_data[2106], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13869 */ { "absv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv4di2_mask }, &operand_data[2110], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13869 */ { "absv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv2di2_mask }, &operand_data[2114], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13882 */ { "absv64qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv64qi2_mask }, &operand_data[2078], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13882 */ { "absv16qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv16qi2_mask }, &operand_data[2074], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13882 */ { "absv32qi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv32qi2_mask }, &operand_data[2070], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13882 */ { "absv32hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv32hi2_mask }, &operand_data[2082], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13882 */ { "absv16hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv16hi2_mask }, &operand_data[2090], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13882 */ { "absv8hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpabsw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv8hi2_mask }, &operand_data[2086], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13908 */ { "absv8qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pabsb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv8qi2 }, &operand_data[6135], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13908 */ { "absv4hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pabsw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv4hi2 }, &operand_data[1770], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13908 */ { "absv2si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "pabsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv2si2 }, &operand_data[1776], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13926 */ { "sse4a_movntsf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movntss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4a_movntsf }, &operand_data[6137], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13926 */ { "sse4a_movntdf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movntsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4a_movntdf }, &operand_data[6139], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13936 */ { "sse4a_vmmovntv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movntss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4a_vmmovntv4sf }, &operand_data[6141], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13936 */ { "sse4a_vmmovntv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "movntsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4a_vmmovntv2df }, &operand_data[6143], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13948 */ { "sse4a_extrqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "extrq\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4a_extrqi }, &operand_data[6145], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13961 */ { "sse4a_extrq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "extrq\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4a_extrq }, &operand_data[6149], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13972 */ { "sse4a_insertqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "insertq\t{%4, %3, %2, %0|%0, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4a_insertqi }, &operand_data[6152], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13987 */ { "sse4a_insertq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "insertq\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4a_insertq }, &operand_data[6152], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14009 */ { "avx_blendps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3575 }, #else { 0, output_3575, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_blendps256 }, &operand_data[6157], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14009 */ { "sse4_1_blendps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3576 }, #else { 0, output_3576, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_blendps }, &operand_data[6161], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14009 */ { "avx_blendpd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3577 }, #else { 0, output_3577, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_blendpd256 }, &operand_data[6165], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14009 */ { "sse4_1_blendpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3578 }, #else { 0, output_3578, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_blendpd }, &operand_data[6169], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14028 */ { "avx_blendvps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3579 }, #else { 0, output_3579, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_blendvps256 }, &operand_data[6173], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14028 */ { "sse4_1_blendvps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3580 }, #else { 0, output_3580, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_blendvps }, &operand_data[6177], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14028 */ { "avx_blendvpd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3581 }, #else { 0, output_3581, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_blendvpd256 }, &operand_data[6181], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14028 */ { "sse4_1_blendvpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3582 }, #else { 0, output_3582, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_blendvpd }, &operand_data[6185], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14049 */ { "avx_dpps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3583 }, #else { 0, output_3583, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_dpps256 }, &operand_data[6189], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14049 */ { "sse4_1_dpps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3584 }, #else { 0, output_3584, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_dpps }, &operand_data[6193], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14049 */ { "avx_dppd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3585 }, #else { 0, output_3585, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_dppd256 }, &operand_data[6197], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14049 */ { "sse4_1_dppd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3586 }, #else { 0, output_3586, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_dppd }, &operand_data[6201], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14074 */ { "avx512f_movntdqa", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntdqa\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_movntdqa }, &operand_data[6205], 2, 2, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14074 */ { "avx2_movntdqa", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntdqa\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_movntdqa }, &operand_data[6207], 2, 2, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14074 */ { "sse4_1_movntdqa", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vmovntdqa\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_movntdqa }, &operand_data[6209], 2, 2, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14085 */ { "avx2_mpsadbw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3590 }, #else { 0, output_3590, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_mpsadbw }, &operand_data[6211], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14085 */ { "sse4_1_mpsadbw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3591 }, #else { 0, output_3591, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_mpsadbw }, &operand_data[6215], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14105 */ { "avx512bw_packusdw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3592 }, #else { 0, output_3592, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_packusdw }, &operand_data[6219], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14105 */ { "avx512bw_packusdw_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3593 }, #else { 0, output_3593, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_packusdw_mask }, &operand_data[6219], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14105 */ { "avx2_packusdw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3594 }, #else { 0, output_3594, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_packusdw }, &operand_data[6224], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14105 */ { "avx2_packusdw_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3595 }, #else { 0, output_3595, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_packusdw_mask }, &operand_data[6224], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14105 */ { "sse4_1_packusdw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3596 }, #else { 0, output_3596, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_packusdw }, &operand_data[6229], 3, 3, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14105 */ { "sse4_1_packusdw_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3597 }, #else { 0, output_3597, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_packusdw_mask }, &operand_data[6229], 5, 5, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14123 */ { "avx2_pblendvb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3598 }, #else { 0, output_3598, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pblendvb }, &operand_data[6234], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14123 */ { "sse4_1_pblendvb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3599 }, #else { 0, output_3599, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_pblendvb }, &operand_data[6238], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14143 */ { "sse4_1_pblendw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3600 }, #else { 0, output_3600, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_pblendw }, &operand_data[6242], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14174 */ { "*avx2_pblendw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3601 }, #else { 0, 0, output_3601 }, #endif { 0 }, &operand_data[6246], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14191 */ { "avx2_pblenddv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpblendd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pblenddv8si }, &operand_data[6250], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14191 */ { "avx2_pblenddv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpblendd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pblenddv4si }, &operand_data[6254], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14205 */ { "sse4_1_phminposuw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vphminposuw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_phminposuw }, &operand_data[6258], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14216 */ { "avx2_sign_extendv16qiv16hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv16qiv16hi2 }, &operand_data[6260], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14216 */ { "avx2_sign_extendv16qiv16hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv16qiv16hi2_mask }, &operand_data[6260], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14216 */ { "avx2_zero_extendv16qiv16hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv16qiv16hi2 }, &operand_data[6260], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14216 */ { "avx2_zero_extendv16qiv16hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv16qiv16hi2_mask }, &operand_data[6260], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14227 */ { "avx512bw_sign_extendv32qiv32hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_sign_extendv32qiv32hi2 }, &operand_data[6264], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14227 */ { "avx512bw_sign_extendv32qiv32hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_sign_extendv32qiv32hi2_mask }, &operand_data[6264], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14227 */ { "avx512bw_zero_extendv32qiv32hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_zero_extendv32qiv32hi2 }, &operand_data[6264], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14227 */ { "avx512bw_zero_extendv32qiv32hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_zero_extendv32qiv32hi2_mask }, &operand_data[6264], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14238 */ { "sse4_1_sign_extendv8qiv8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxbw\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv8qiv8hi2 }, &operand_data[6268], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14238 */ { "sse4_1_sign_extendv8qiv8hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxbw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv8qiv8hi2_mask }, &operand_data[6268], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14238 */ { "sse4_1_zero_extendv8qiv8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxbw\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv8qiv8hi2 }, &operand_data[6268], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14238 */ { "sse4_1_zero_extendv8qiv8hi2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxbw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv8qiv8hi2_mask }, &operand_data[6268], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14255 */ { "*avx512f_sign_extendv16qiv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6272], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14255 */ { "avx512f_sign_extendv16qiv16si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sign_extendv16qiv16si2_mask }, &operand_data[6272], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14255 */ { "*avx512f_zero_extendv16qiv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6272], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14255 */ { "avx512f_zero_extendv16qiv16si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_zero_extendv16qiv16si2_mask }, &operand_data[6272], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14265 */ { "avx2_sign_extendv8qiv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv8qiv8si2 }, &operand_data[6276], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14265 */ { "avx2_sign_extendv8qiv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv8qiv8si2_mask }, &operand_data[6276], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14265 */ { "avx2_zero_extendv8qiv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv8qiv8si2 }, &operand_data[6276], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14265 */ { "avx2_zero_extendv8qiv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv8qiv8si2_mask }, &operand_data[6276], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14281 */ { "sse4_1_sign_extendv4qiv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxbd\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv4qiv4si2 }, &operand_data[6280], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14281 */ { "sse4_1_sign_extendv4qiv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxbd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv4qiv4si2_mask }, &operand_data[6280], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14281 */ { "sse4_1_zero_extendv4qiv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxbd\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv4qiv4si2 }, &operand_data[6280], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14281 */ { "sse4_1_zero_extendv4qiv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxbd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv4qiv4si2_mask }, &operand_data[6280], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14296 */ { "avx512f_sign_extendv16hiv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxwd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sign_extendv16hiv16si2 }, &operand_data[6284], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14296 */ { "avx512f_sign_extendv16hiv16si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxwd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sign_extendv16hiv16si2_mask }, &operand_data[6284], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14296 */ { "avx512f_zero_extendv16hiv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxwd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_zero_extendv16hiv16si2 }, &operand_data[6284], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14296 */ { "avx512f_zero_extendv16hiv16si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxwd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_zero_extendv16hiv16si2_mask }, &operand_data[6284], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14306 */ { "avx2_sign_extendv8hiv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxwd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv8hiv8si2 }, &operand_data[6288], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14306 */ { "avx2_sign_extendv8hiv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxwd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv8hiv8si2_mask }, &operand_data[6288], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14306 */ { "avx2_zero_extendv8hiv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxwd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv8hiv8si2 }, &operand_data[6288], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14306 */ { "avx2_zero_extendv8hiv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxwd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv8hiv8si2_mask }, &operand_data[6288], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14317 */ { "sse4_1_sign_extendv4hiv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxwd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv4hiv4si2 }, &operand_data[6292], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14317 */ { "sse4_1_sign_extendv4hiv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxwd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv4hiv4si2_mask }, &operand_data[6292], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14317 */ { "sse4_1_zero_extendv4hiv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxwd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv4hiv4si2 }, &operand_data[6292], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14317 */ { "sse4_1_zero_extendv4hiv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxwd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv4hiv4si2_mask }, &operand_data[6292], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14332 */ { "avx512f_sign_extendv8qiv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbq\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sign_extendv8qiv8di2 }, &operand_data[6296], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14332 */ { "avx512f_sign_extendv8qiv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sign_extendv8qiv8di2_mask }, &operand_data[6296], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14332 */ { "avx512f_zero_extendv8qiv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbq\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_zero_extendv8qiv8di2 }, &operand_data[6296], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14332 */ { "avx512f_zero_extendv8qiv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_zero_extendv8qiv8di2_mask }, &operand_data[6296], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14347 */ { "avx2_sign_extendv4qiv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbq\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv4qiv4di2 }, &operand_data[6300], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14347 */ { "avx2_sign_extendv4qiv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxbq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv4qiv4di2_mask }, &operand_data[6300], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14347 */ { "avx2_zero_extendv4qiv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbq\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv4qiv4di2 }, &operand_data[6300], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14347 */ { "avx2_zero_extendv4qiv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxbq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv4qiv4di2_mask }, &operand_data[6300], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14361 */ { "sse4_1_sign_extendv2qiv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxbq\t{%1, %0|%0, %w1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv2qiv2di2 }, &operand_data[6304], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14361 */ { "sse4_1_sign_extendv2qiv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxbq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %w1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv2qiv2di2_mask }, &operand_data[6304], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14361 */ { "sse4_1_zero_extendv2qiv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxbq\t{%1, %0|%0, %w1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv2qiv2di2 }, &operand_data[6304], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14361 */ { "sse4_1_zero_extendv2qiv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxbq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %w1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv2qiv2di2_mask }, &operand_data[6304], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14375 */ { "avx512f_sign_extendv8hiv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxwq\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sign_extendv8hiv8di2 }, &operand_data[6308], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14375 */ { "avx512f_sign_extendv8hiv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxwq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sign_extendv8hiv8di2_mask }, &operand_data[6308], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14375 */ { "avx512f_zero_extendv8hiv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxwq\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_zero_extendv8hiv8di2 }, &operand_data[6308], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14375 */ { "avx512f_zero_extendv8hiv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxwq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_zero_extendv8hiv8di2_mask }, &operand_data[6308], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14385 */ { "avx2_sign_extendv4hiv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxwq\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv4hiv4di2 }, &operand_data[6312], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14385 */ { "avx2_sign_extendv4hiv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxwq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv4hiv4di2_mask }, &operand_data[6312], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14385 */ { "avx2_zero_extendv4hiv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxwq\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv4hiv4di2 }, &operand_data[6312], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14385 */ { "avx2_zero_extendv4hiv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxwq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv4hiv4di2_mask }, &operand_data[6312], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14399 */ { "sse4_1_sign_extendv2hiv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxwq\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv2hiv2di2 }, &operand_data[6316], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14399 */ { "sse4_1_sign_extendv2hiv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxwq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv2hiv2di2_mask }, &operand_data[6316], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14399 */ { "sse4_1_zero_extendv2hiv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxwq\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv2hiv2di2 }, &operand_data[6316], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14399 */ { "sse4_1_zero_extendv2hiv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxwq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv2hiv2di2_mask }, &operand_data[6316], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14413 */ { "avx512f_sign_extendv8siv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxdq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sign_extendv8siv8di2 }, &operand_data[6320], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14413 */ { "avx512f_sign_extendv8siv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxdq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sign_extendv8siv8di2_mask }, &operand_data[6320], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14413 */ { "avx512f_zero_extendv8siv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxdq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_zero_extendv8siv8di2 }, &operand_data[6320], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14413 */ { "avx512f_zero_extendv8siv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxdq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_zero_extendv8siv8di2_mask }, &operand_data[6320], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14423 */ { "avx2_sign_extendv4siv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxdq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv4siv4di2 }, &operand_data[6324], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14423 */ { "avx2_sign_extendv4siv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovsxdq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sign_extendv4siv4di2_mask }, &operand_data[6324], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14423 */ { "avx2_zero_extendv4siv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxdq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv4siv4di2 }, &operand_data[6324], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14423 */ { "avx2_zero_extendv4siv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmovzxdq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_zero_extendv4siv4di2_mask }, &operand_data[6324], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14434 */ { "sse4_1_sign_extendv2siv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxdq\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv2siv2di2 }, &operand_data[6328], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14434 */ { "sse4_1_sign_extendv2siv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovsxdq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_sign_extendv2siv2di2_mask }, &operand_data[6328], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14434 */ { "sse4_1_zero_extendv2siv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxdq\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv2siv2di2 }, &operand_data[6328], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14434 */ { "sse4_1_zero_extendv2siv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpmovzxdq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_zero_extendv2siv2di2_mask }, &operand_data[6328], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14450 */ { "avx_vtestps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vtestps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vtestps256 }, &operand_data[2564], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14450 */ { "avx_vtestps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vtestps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vtestps }, &operand_data[2623], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14450 */ { "avx_vtestpd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vtestpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vtestpd256 }, &operand_data[2558], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14450 */ { "avx_vtestpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vtestpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vtestpd }, &operand_data[2631], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14464 */ { "avx_ptest256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vptest\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_ptest256 }, &operand_data[5509], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14477 */ { "sse4_1_ptest", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vptest\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_ptest }, &operand_data[6332], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14489 */ { "avx_roundps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vroundps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_roundps256 }, &operand_data[6334], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14489 */ { "sse4_1_roundps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vroundps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_roundps }, &operand_data[6337], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14489 */ { "avx_roundpd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vroundpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_roundpd256 }, &operand_data[6340], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14489 */ { "sse4_1_roundpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vroundpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_roundpd }, &operand_data[6343], 3, 3, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14572 */ { "sse4_1_roundss", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3687 }, #else { 0, output_3687, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_roundss }, &operand_data[6346], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14572 */ { "sse4_1_roundsd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3688 }, #else { 0, output_3688, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_roundsd }, &operand_data[6350], 4, 4, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14682 */ { "sse4_2_pcmpestr", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_pcmpestr }, &operand_data[6354], 7, 7, 10, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14743 */ { "*sse4_2_pcmpestr_unaligned", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6361], 7, 7, 10, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14806 */ { "sse4_2_pcmpestri", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpcmpestri\t{%5, %3, %1|%1, %3, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_pcmpestri }, &operand_data[6368], 6, 6, 5, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14835 */ { "sse4_2_pcmpestrm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpcmpestrm\t{%5, %3, %1|%1, %3, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_pcmpestrm }, &operand_data[6355], 6, 6, 5, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14864 */ { "sse4_2_pcmpestr_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3693 }, #else { 0, output_3693, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_pcmpestr_cconly }, &operand_data[6374], 7, 7, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14891 */ { "sse4_2_pcmpistr", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_pcmpistr }, &operand_data[6381], 5, 5, 6, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14943 */ { "*sse4_2_pcmpistr_unaligned", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6386], 5, 5, 6, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14997 */ { "sse4_2_pcmpistri", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpcmpistri\t{%3, %2, %1|%1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_pcmpistri }, &operand_data[6391], 4, 4, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15022 */ { "sse4_2_pcmpistrm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vpcmpistrm\t{%3, %2, %1|%1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_pcmpistrm }, &operand_data[6382], 4, 4, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15047 */ { "sse4_2_pcmpistr_cconly", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3698 }, #else { 0, output_3698, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_2_pcmpistr_cconly }, &operand_data[6395], 5, 5, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15093 */ { "*avx512pf_gatherpfv16sisf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3699 }, #else { 0, 0, output_3699 }, #endif { 0 }, &operand_data[6400], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15093 */ { "*avx512pf_gatherpfv16sisf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3700 }, #else { 0, 0, output_3700 }, #endif { 0 }, &operand_data[6406], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15093 */ { "*avx512pf_gatherpfv8disf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3701 }, #else { 0, 0, output_3701 }, #endif { 0 }, &operand_data[6412], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15093 */ { "*avx512pf_gatherpfv8disf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3702 }, #else { 0, 0, output_3702 }, #endif { 0 }, &operand_data[6418], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15120 */ { "*avx512pf_gatherpfv16sisf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3703 }, #else { 0, 0, output_3703 }, #endif { 0 }, &operand_data[6401], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15120 */ { "*avx512pf_gatherpfv16sisf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3704 }, #else { 0, 0, output_3704 }, #endif { 0 }, &operand_data[6407], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15120 */ { "*avx512pf_gatherpfv8disf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3705 }, #else { 0, 0, output_3705 }, #endif { 0 }, &operand_data[6413], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15120 */ { "*avx512pf_gatherpfv8disf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3706 }, #else { 0, 0, output_3706 }, #endif { 0 }, &operand_data[6419], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15165 */ { "*avx512pf_gatherpfv8sidf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3707 }, #else { 0, 0, output_3707 }, #endif { 0 }, &operand_data[6424], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15165 */ { "*avx512pf_gatherpfv8sidf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3708 }, #else { 0, 0, output_3708 }, #endif { 0 }, &operand_data[6430], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15165 */ { "*avx512pf_gatherpfv8didf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3709 }, #else { 0, 0, output_3709 }, #endif { 0 }, &operand_data[6436], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15165 */ { "*avx512pf_gatherpfv8didf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3710 }, #else { 0, 0, output_3710 }, #endif { 0 }, &operand_data[6442], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15192 */ { "*avx512pf_gatherpfv8sidf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3711 }, #else { 0, 0, output_3711 }, #endif { 0 }, &operand_data[6425], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15192 */ { "*avx512pf_gatherpfv8sidf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3712 }, #else { 0, 0, output_3712 }, #endif { 0 }, &operand_data[6431], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15192 */ { "*avx512pf_gatherpfv8didf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3713 }, #else { 0, 0, output_3713 }, #endif { 0 }, &operand_data[6437], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15192 */ { "*avx512pf_gatherpfv8didf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3714 }, #else { 0, 0, output_3714 }, #endif { 0 }, &operand_data[6443], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15237 */ { "*avx512pf_scatterpfv16sisf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3715 }, #else { 0, 0, output_3715 }, #endif { 0 }, &operand_data[6448], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15237 */ { "*avx512pf_scatterpfv16sisf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3716 }, #else { 0, 0, output_3716 }, #endif { 0 }, &operand_data[6454], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15237 */ { "*avx512pf_scatterpfv8disf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3717 }, #else { 0, 0, output_3717 }, #endif { 0 }, &operand_data[6460], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15237 */ { "*avx512pf_scatterpfv8disf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3718 }, #else { 0, 0, output_3718 }, #endif { 0 }, &operand_data[6466], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15266 */ { "*avx512pf_scatterpfv16sisf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3719 }, #else { 0, 0, output_3719 }, #endif { 0 }, &operand_data[6449], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15266 */ { "*avx512pf_scatterpfv16sisf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3720 }, #else { 0, 0, output_3720 }, #endif { 0 }, &operand_data[6455], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15266 */ { "*avx512pf_scatterpfv8disf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3721 }, #else { 0, 0, output_3721 }, #endif { 0 }, &operand_data[6461], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15266 */ { "*avx512pf_scatterpfv8disf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3722 }, #else { 0, 0, output_3722 }, #endif { 0 }, &operand_data[6467], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15313 */ { "*avx512pf_scatterpfv8sidf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3723 }, #else { 0, 0, output_3723 }, #endif { 0 }, &operand_data[6472], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15313 */ { "*avx512pf_scatterpfv8sidf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3724 }, #else { 0, 0, output_3724 }, #endif { 0 }, &operand_data[6478], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15313 */ { "*avx512pf_scatterpfv8didf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3725 }, #else { 0, 0, output_3725 }, #endif { 0 }, &operand_data[6484], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15313 */ { "*avx512pf_scatterpfv8didf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3726 }, #else { 0, 0, output_3726 }, #endif { 0 }, &operand_data[6490], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15342 */ { "*avx512pf_scatterpfv8sidf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3727 }, #else { 0, 0, output_3727 }, #endif { 0 }, &operand_data[6473], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15342 */ { "*avx512pf_scatterpfv8sidf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3728 }, #else { 0, 0, output_3728 }, #endif { 0 }, &operand_data[6479], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15342 */ { "*avx512pf_scatterpfv8didf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3729 }, #else { 0, 0, output_3729 }, #endif { 0 }, &operand_data[6485], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15342 */ { "*avx512pf_scatterpfv8didf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3730 }, #else { 0, 0, output_3730 }, #endif { 0 }, &operand_data[6491], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15371 */ { "avx512er_exp2v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexp2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_exp2v16sf }, &operand_data[2046], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15371 */ { "avx512er_exp2v16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexp2ps\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_exp2v16sf_round }, &operand_data[4220], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15371 */ { "avx512er_exp2v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexp2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_exp2v16sf_mask }, &operand_data[2046], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15371 */ { "avx512er_exp2v16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexp2ps\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_exp2v16sf_mask_round }, &operand_data[4223], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15371 */ { "avx512er_exp2v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexp2pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_exp2v8df }, &operand_data[2058], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15371 */ { "avx512er_exp2v8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexp2pd\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_exp2v8df_round }, &operand_data[4244], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15371 */ { "avx512er_exp2v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexp2pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_exp2v8df_mask }, &operand_data[2058], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15371 */ { "avx512er_exp2v8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexp2pd\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_exp2v8df_mask_round }, &operand_data[4247], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15382 */ { "*avx512er_rcp28v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2046], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15382 */ { "*avx512er_rcp28v16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28ps\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4220], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15382 */ { "avx512er_rcp28v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_rcp28v16sf_mask }, &operand_data[2046], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15382 */ { "avx512er_rcp28v16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28ps\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_rcp28v16sf_mask_round }, &operand_data[4223], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15382 */ { "*avx512er_rcp28v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2058], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15382 */ { "*avx512er_rcp28v8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28pd\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4244], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15382 */ { "avx512er_rcp28v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_rcp28v8df_mask }, &operand_data[2058], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15382 */ { "avx512er_rcp28v8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28pd\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_rcp28v8df_mask_round }, &operand_data[4247], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15393 */ { "avx512er_vmrcp28v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28ss\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_vmrcp28v4sf }, &operand_data[2415], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15393 */ { "avx512er_vmrcp28v4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28ss\t{%r3%1, %2, %0|%0, %2, %1%r3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_vmrcp28v4sf_round }, &operand_data[4268], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15393 */ { "avx512er_vmrcp28v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28sd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_vmrcp28v2df }, &operand_data[2418], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15393 */ { "avx512er_vmrcp28v2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrcp28sd\t{%r3%1, %2, %0|%0, %2, %1%r3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_vmrcp28v2df_round }, &operand_data[4272], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15408 */ { "*avx512er_rsqrt28v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2046], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15408 */ { "*avx512er_rsqrt28v16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28ps\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4220], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15408 */ { "avx512er_rsqrt28v16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_rsqrt28v16sf_mask }, &operand_data[2046], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15408 */ { "avx512er_rsqrt28v16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28ps\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_rsqrt28v16sf_mask_round }, &operand_data[4223], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15408 */ { "*avx512er_rsqrt28v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28pd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2058], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15408 */ { "*avx512er_rsqrt28v8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28pd\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[4244], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15408 */ { "avx512er_rsqrt28v8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28pd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_rsqrt28v8df_mask }, &operand_data[2058], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15408 */ { "avx512er_rsqrt28v8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28pd\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_rsqrt28v8df_mask_round }, &operand_data[4247], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15419 */ { "avx512er_vmrsqrt28v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28ss\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_vmrsqrt28v4sf }, &operand_data[2415], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15419 */ { "avx512er_vmrsqrt28v4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28ss\t{%r3%1, %2, %0|%0, %2, %1%r3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_vmrsqrt28v4sf_round }, &operand_data[4268], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15419 */ { "avx512er_vmrsqrt28v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28sd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_vmrsqrt28v2df }, &operand_data[2418], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15419 */ { "avx512er_vmrsqrt28v2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrsqrt28sd\t{%r3%1, %2, %0|%0, %2, %1%r3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512er_vmrsqrt28v2df_round }, &operand_data[4272], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15447 */ { "xop_pmacsww", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmacsww\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmacsww }, &operand_data[6496], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15447 */ { "xop_pmacssww", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmacssww\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmacssww }, &operand_data[6496], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15447 */ { "xop_pmacsdd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmacsdd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmacsdd }, &operand_data[6500], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15447 */ { "xop_pmacssdd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmacssdd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmacssdd }, &operand_data[6500], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15459 */ { "xop_pmacsdql", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmacsdql\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmacsdql }, &operand_data[6504], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15459 */ { "xop_pmacssdql", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmacssdql\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmacssdql }, &operand_data[6504], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15477 */ { "xop_pmacsdqh", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmacsdqh\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmacsdqh }, &operand_data[6504], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15477 */ { "xop_pmacssdqh", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmacssdqh\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmacssdqh }, &operand_data[6504], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15496 */ { "xop_pmacswd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmacswd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmacswd }, &operand_data[6508], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15496 */ { "xop_pmacsswd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmacsswd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmacsswd }, &operand_data[6508], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15516 */ { "xop_pmadcswd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadcswd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmadcswd }, &operand_data[6508], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15516 */ { "xop_pmadcsswd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadcsswd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pmadcsswd }, &operand_data[6508], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v32qi256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v32qi256 }, &operand_data[6512], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v16qi }, &operand_data[6516], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v16hi256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v16hi256 }, &operand_data[6520], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v8hi }, &operand_data[6524], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v16si512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v16si512 }, &operand_data[6528], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v8si256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v8si256 }, &operand_data[6532], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v4si }, &operand_data[6536], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v8di512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v8di512 }, &operand_data[6540], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v4di256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v4di256 }, &operand_data[6544], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v2di }, &operand_data[6548], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v16sf512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v16sf512 }, &operand_data[6552], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v8sf256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v8sf256 }, &operand_data[6556], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v4sf }, &operand_data[6560], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v8df512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v8df512 }, &operand_data[6564], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v4df256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v4df256 }, &operand_data[6568], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15549 */ { "xop_pcmov_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcmov_v2df }, &operand_data[6572], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15560 */ { "xop_phaddbw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddbw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phaddbw }, &operand_data[6576], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15560 */ { "xop_phaddubw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddubw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phaddubw }, &operand_data[6576], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15581 */ { "xop_phaddbd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddbd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phaddbd }, &operand_data[6578], 2, 2, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15581 */ { "xop_phaddubd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddubd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phaddubd }, &operand_data[6578], 2, 2, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15610 */ { "xop_phaddbq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddbq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phaddbq }, &operand_data[6580], 2, 2, 7, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15610 */ { "xop_phaddubq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddubq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phaddubq }, &operand_data[6580], 2, 2, 7, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15655 */ { "xop_phaddwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddwd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phaddwd }, &operand_data[6582], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15655 */ { "xop_phadduwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphadduwd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phadduwd }, &operand_data[6582], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15672 */ { "xop_phaddwq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddwq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phaddwq }, &operand_data[6584], 2, 2, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15672 */ { "xop_phadduwq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphadduwq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phadduwq }, &operand_data[6584], 2, 2, 3, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15697 */ { "xop_phadddq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphadddq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phadddq }, &operand_data[6586], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15697 */ { "xop_phaddudq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphaddudq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phaddudq }, &operand_data[6586], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15712 */ { "xop_phsubbw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphsubbw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phsubbw }, &operand_data[6576], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15733 */ { "xop_phsubwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphsubwd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phsubwd }, &operand_data[6582], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15750 */ { "xop_phsubdq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vphsubdq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_phsubdq }, &operand_data[6586], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15766 */ { "xop_pperm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpperm\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pperm }, &operand_data[6588], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15779 */ { "xop_pperm_pack_v2di_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpperm\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pperm_pack_v2di_v4si }, &operand_data[6592], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15792 */ { "xop_pperm_pack_v4si_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpperm\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pperm_pack_v4si_v8hi }, &operand_data[6596], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15805 */ { "xop_pperm_pack_v8hi_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpperm\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pperm_pack_v8hi_v16qi }, &operand_data[6600], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15883 */ { "xop_rotlv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprotb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_rotlv16qi3 }, &operand_data[6604], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15883 */ { "xop_rotlv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprotw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_rotlv8hi3 }, &operand_data[6607], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15883 */ { "xop_rotlv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprotd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_rotlv4si3 }, &operand_data[6610], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15883 */ { "xop_rotlv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprotq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_rotlv2di3 }, &operand_data[6613], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15894 */ { "xop_rotrv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3814 }, #else { 0, 0, output_3814 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_rotrv16qi3 }, &operand_data[6604], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15894 */ { "xop_rotrv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3815 }, #else { 0, 0, output_3815 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_rotrv8hi3 }, &operand_data[6607], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15894 */ { "xop_rotrv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3816 }, #else { 0, 0, output_3816 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_rotrv4si3 }, &operand_data[6610], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15894 */ { "xop_rotrv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3817 }, #else { 0, 0, output_3817 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_rotrv2di3 }, &operand_data[6613], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15931 */ { "xop_vrotlv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprotb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_vrotlv16qi3 }, &operand_data[6616], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15931 */ { "xop_vrotlv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprotw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_vrotlv8hi3 }, &operand_data[6619], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15931 */ { "xop_vrotlv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprotd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_vrotlv4si3 }, &operand_data[6622], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15931 */ { "xop_vrotlv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vprotq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_vrotlv2di3 }, &operand_data[6625], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16106 */ { "xop_shav16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshab\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_shav16qi3 }, &operand_data[6616], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16106 */ { "xop_shav8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshaw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_shav8hi3 }, &operand_data[6619], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16106 */ { "xop_shav4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshad\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_shav4si3 }, &operand_data[6622], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16106 */ { "xop_shav2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshaq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_shav2di3 }, &operand_data[6625], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16125 */ { "xop_shlv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshlb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_shlv16qi3 }, &operand_data[6616], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16125 */ { "xop_shlv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshlw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_shlv8hi3 }, &operand_data[6619], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16125 */ { "xop_shlv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshld\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_shlv4si3 }, &operand_data[6622], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16125 */ { "xop_shlv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpshlq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_shlv2di3 }, &operand_data[6625], 3, 3, 3, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16217 */ { "xop_frczsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfrczss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_frczsf2 }, &operand_data[1207], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16217 */ { "xop_frczdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfrczsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_frczdf2 }, &operand_data[1317], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16217 */ { "xop_frczv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfrczps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_frczv4sf2 }, &operand_data[2410], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16217 */ { "xop_frczv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfrczpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_frczv2df2 }, &operand_data[6628], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16217 */ { "xop_frczv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfrczps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_frczv8sf2 }, &operand_data[2408], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16217 */ { "xop_frczv4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfrczpd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_frczv4df2 }, &operand_data[6630], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16238 */ { "*xop_vmfrczv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfrczss\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6632], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16238 */ { "*xop_vmfrczv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfrczsd\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6635], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16251 */ { "xop_maskcmpv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1b\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmpv16qi3 }, &operand_data[6638], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16251 */ { "xop_maskcmpv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1w\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmpv8hi3 }, &operand_data[6642], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16251 */ { "xop_maskcmpv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1d\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmpv4si3 }, &operand_data[6646], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16251 */ { "xop_maskcmpv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1q\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmpv2di3 }, &operand_data[6650], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16265 */ { "xop_maskcmp_unsv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1ub\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmp_unsv16qi3 }, &operand_data[6654], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16265 */ { "xop_maskcmp_unsv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1uw\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmp_unsv8hi3 }, &operand_data[6658], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16265 */ { "xop_maskcmp_unsv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1ud\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmp_unsv4si3 }, &operand_data[6662], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16265 */ { "xop_maskcmp_unsv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1uq\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmp_unsv2di3 }, &operand_data[6666], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16282 */ { "xop_maskcmp_uns2v16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1ub\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmp_uns2v16qi3 }, &operand_data[6654], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16282 */ { "xop_maskcmp_uns2v8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1uw\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmp_uns2v8hi3 }, &operand_data[6658], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16282 */ { "xop_maskcmp_uns2v4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1ud\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmp_uns2v4si3 }, &operand_data[6662], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16282 */ { "xop_maskcmp_uns2v2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcom%Y1uq\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_maskcmp_uns2v2di3 }, &operand_data[6666], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16299 */ { "xop_pcom_tfv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3850 }, #else { 0, 0, output_3850 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcom_tfv16qi3 }, &operand_data[6670], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16299 */ { "xop_pcom_tfv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3851 }, #else { 0, 0, output_3851 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcom_tfv8hi3 }, &operand_data[6674], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16299 */ { "xop_pcom_tfv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3852 }, #else { 0, 0, output_3852 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcom_tfv4si3 }, &operand_data[6678], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16299 */ { "xop_pcom_tfv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3853 }, #else { 0, 0, output_3853 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_pcom_tfv2di3 }, &operand_data[6682], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16318 */ { "xop_vpermil2v8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermil2ps\t{%4, %3, %2, %1, %0|%0, %1, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_vpermil2v8sf3 }, &operand_data[6686], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16318 */ { "xop_vpermil2v4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermil2ps\t{%4, %3, %2, %1, %0|%0, %1, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_vpermil2v4sf3 }, &operand_data[6691], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16318 */ { "xop_vpermil2v4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermil2pd\t{%4, %3, %2, %1, %0|%0, %1, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_vpermil2v4df3 }, &operand_data[6696], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16318 */ { "xop_vpermil2v2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermil2pd\t{%4, %3, %2, %1, %0|%0, %1, %2, %3, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_vpermil2v2df3 }, &operand_data[6701], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16334 */ { "aesenc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3858 }, #else { 0, output_3858, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_aesenc }, &operand_data[4723], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16350 */ { "aesenclast", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3859 }, #else { 0, output_3859, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_aesenclast }, &operand_data[4723], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16366 */ { "aesdec", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3860 }, #else { 0, output_3860, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_aesdec }, &operand_data[4723], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16382 */ { "aesdeclast", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3861 }, #else { 0, output_3861, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_aesdeclast }, &operand_data[4723], 3, 3, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16398 */ { "aesimc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vaesimc\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_aesimc }, &operand_data[2041], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16409 */ { "aeskeygenassist", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%vaeskeygenassist\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_aeskeygenassist }, &operand_data[6706], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16422 */ { "pclmulqdq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3864 }, #else { 0, output_3864, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_pclmulqdq }, &operand_data[6709], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16459 */ { "*avx_vzeroall", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vzeroall", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6713], 1, 1, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16473 */ { "avx_vzeroupper", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vzeroupper", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vzeroupper }, &operand_data[0], 0, 0, 0, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv16si }, &operand_data[6714], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv8di }, &operand_data[6716], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv64qi }, &operand_data[6718], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastb\t{%1, %0|%0, %b1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv32qi }, &operand_data[6720], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastb\t{%1, %0|%0, %b1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv16qi }, &operand_data[6604], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv32hi }, &operand_data[6722], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastw\t{%1, %0|%0, %w1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv16hi }, &operand_data[6724], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastw\t{%1, %0|%0, %w1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv8hi }, &operand_data[6607], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv8si }, &operand_data[6726], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0|%0, %k1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv4si }, &operand_data[6610], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv4di }, &operand_data[6728], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16484 */ { "avx2_pbroadcastv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0|%0, %q1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv2di }, &operand_data[2041], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16497 */ { "avx2_pbroadcastv32qi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3879 }, #else { 0, output_3879, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv32qi_1 }, &operand_data[6730], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16497 */ { "avx2_pbroadcastv16hi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3880 }, #else { 0, output_3880, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv16hi_1 }, &operand_data[6732], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16497 */ { "avx2_pbroadcastv8si_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3881 }, #else { 0, output_3881, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv8si_1 }, &operand_data[6734], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16497 */ { "avx2_pbroadcastv4di_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3882 }, #else { 0, output_3882, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pbroadcastv4di_1 }, &operand_data[6736], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx2_permvarv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permvarv8si }, &operand_data[6738], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx2_permvarv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermd\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permvarv8si_mask }, &operand_data[6738], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx2_permvarv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermps\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permvarv8sf }, &operand_data[6743], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx2_permvarv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermps\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permvarv8sf_mask }, &operand_data[6743], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx512f_permvarv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permvarv16si }, &operand_data[6748], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx512f_permvarv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermd\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permvarv16si_mask }, &operand_data[6748], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx512f_permvarv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermps\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permvarv16sf }, &operand_data[6753], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx512f_permvarv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermps\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permvarv16sf_mask }, &operand_data[6753], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx512f_permvarv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermq\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permvarv8di }, &operand_data[6758], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx512f_permvarv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermq\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permvarv8di_mask }, &operand_data[6758], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx512f_permvarv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermpd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permvarv8df }, &operand_data[6763], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx512f_permvarv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermpd\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permvarv8df_mask }, &operand_data[6763], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx2_permvarv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermq\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permvarv4di }, &operand_data[6768], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx2_permvarv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermq\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permvarv4di_mask }, &operand_data[6768], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx2_permvarv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermpd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permvarv4df }, &operand_data[6773], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16512 */ { "avx2_permvarv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermpd\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permvarv4df_mask }, &operand_data[6773], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16524 */ { "avx512bw_permvarv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermb\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_permvarv64qi }, &operand_data[6778], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16524 */ { "avx512bw_permvarv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermb\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_permvarv64qi_mask }, &operand_data[6778], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16524 */ { "avx512vl_permvarv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermb\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_permvarv16qi }, &operand_data[6783], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16524 */ { "avx512vl_permvarv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermb\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_permvarv16qi_mask }, &operand_data[6783], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16524 */ { "avx512vl_permvarv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermb\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_permvarv32qi }, &operand_data[6788], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16524 */ { "avx512vl_permvarv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermb\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_permvarv32qi_mask }, &operand_data[6788], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16536 */ { "avx512vl_permvarv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermw\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_permvarv8hi }, &operand_data[6793], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16536 */ { "avx512vl_permvarv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermw\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_permvarv8hi_mask }, &operand_data[6793], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16536 */ { "avx512vl_permvarv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermw\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_permvarv16hi }, &operand_data[6798], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16536 */ { "avx512vl_permvarv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermw\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_permvarv16hi_mask }, &operand_data[6798], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16536 */ { "avx512bw_permvarv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermw\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_permvarv32hi }, &operand_data[6803], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16536 */ { "avx512bw_permvarv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermw\t{%1, %2, %0%{%4%}%N3|%0%{%4%}%N3, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_permvarv32hi_mask }, &operand_data[6803], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16581 */ { "avx2_permv4di_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3911 }, #else { 0, 0, output_3911 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permv4di_1 }, &operand_data[6808], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16581 */ { "avx2_permv4di_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3912 }, #else { 0, 0, output_3912 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permv4di_1_mask }, &operand_data[6808], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16581 */ { "avx2_permv4df_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3913 }, #else { 0, 0, output_3913 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permv4df_1 }, &operand_data[6816], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16581 */ { "avx2_permv4df_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3914 }, #else { 0, 0, output_3914 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permv4df_1_mask }, &operand_data[6816], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16581 */ { "avx512f_permv8di_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3915 }, #else { 0, 0, output_3915 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permv8di_1 }, &operand_data[6824], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16581 */ { "avx512f_permv8di_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3916 }, #else { 0, 0, output_3916 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permv8di_1_mask }, &operand_data[6824], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16581 */ { "avx512f_permv8df_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3917 }, #else { 0, 0, output_3917 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permv8df_1 }, &operand_data[6832], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16581 */ { "avx512f_permv8df_1_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_3918 }, #else { 0, 0, output_3918 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permv8df_1_mask }, &operand_data[6832], 8, 8, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16603 */ { "avx2_permv2ti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vperm2i128\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permv2ti }, &operand_data[6840], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16616 */ { "avx2_vec_dupv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_vec_dupv4df }, &operand_data[6844], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16628 */ { "avx512f_vec_dupv16si_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0|%0, %1}\n\ vpbroadcastd\t{%x1, %0|%0, %x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv16si_1 }, &operand_data[1843], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16628 */ { "avx512f_vec_dupv8di_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0|%0, %1}\n\ vpbroadcastq\t{%x1, %0|%0, %x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv8di_1 }, &operand_data[1855], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16628 */ { "avx512bw_vec_dupv32hi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastw\t{%1, %0|%0, %1}\n\ vpbroadcastw\t{%x1, %0|%0, %x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vec_dupv32hi_1 }, &operand_data[1903], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16628 */ { "avx512bw_vec_dupv64qi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastb\t{%1, %0|%0, %1}\n\ vpbroadcastb\t{%x1, %0|%0, %x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vec_dupv64qi_1 }, &operand_data[1891], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512f_vec_dupv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv16si }, &operand_data[6846], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512f_vec_dupv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv16si_mask }, &operand_data[6846], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv8si }, &operand_data[6850], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv8si_mask }, &operand_data[6850], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv4si }, &operand_data[2102], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv4si_mask }, &operand_data[2102], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512f_vec_dupv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv8di }, &operand_data[6854], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512f_vec_dupv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv8di_mask }, &operand_data[6854], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv4di }, &operand_data[6858], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv4di_mask }, &operand_data[6858], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv2di }, &operand_data[2114], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv2di_mask }, &operand_data[2114], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512f_vec_dupv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv16sf }, &operand_data[6862], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512f_vec_dupv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv16sf_mask }, &operand_data[6862], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv8sf }, &operand_data[6866], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv8sf_mask }, &operand_data[6866], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv4sf }, &operand_data[2054], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv4sf_mask }, &operand_data[2054], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512f_vec_dupv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv8df }, &operand_data[6870], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512f_vec_dupv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dupv8df_mask }, &operand_data[6870], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv4df }, &operand_data[6874], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv4df_mask }, &operand_data[6874], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv2df }, &operand_data[2066], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16641 */ { "avx512vl_vec_dupv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv2df_mask }, &operand_data[2066], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512bw_vec_dupv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vec_dupv64qi }, &operand_data[6878], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512bw_vec_dupv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vec_dupv64qi_mask }, &operand_data[6878], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512vl_vec_dupv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv16qi }, &operand_data[2074], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512vl_vec_dupv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv16qi_mask }, &operand_data[2074], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512vl_vec_dupv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastb\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv32qi }, &operand_data[6882], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512vl_vec_dupv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv32qi_mask }, &operand_data[6882], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512bw_vec_dupv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vec_dupv32hi }, &operand_data[6886], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512bw_vec_dupv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vec_dupv32hi_mask }, &operand_data[6886], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512vl_vec_dupv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv16hi }, &operand_data[6890], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512vl_vec_dupv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv16hi_mask }, &operand_data[6890], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512vl_vec_dupv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastw\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv8hi }, &operand_data[2086], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16653 */ { "avx512vl_vec_dupv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastw\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dupv8hi_mask }, &operand_data[2086], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16665 */ { "*avx512f_broadcastv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3961 }, #else { 0, output_3961, 0 }, #endif { 0 }, &operand_data[6894], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16665 */ { "avx512f_broadcastv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3962 }, #else { 0, output_3962, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_broadcastv16sf_mask }, &operand_data[6894], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16665 */ { "*avx512f_broadcastv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3963 }, #else { 0, output_3963, 0 }, #endif { 0 }, &operand_data[6898], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16665 */ { "avx512f_broadcastv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3964 }, #else { 0, output_3964, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_broadcastv16si_mask }, &operand_data[6898], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16677 */ { "*avx512f_broadcastv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3965 }, #else { 0, output_3965, 0 }, #endif { 0 }, &operand_data[6902], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16677 */ { "avx512f_broadcastv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3966 }, #else { 0, output_3966, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_broadcastv8df_mask }, &operand_data[6902], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16677 */ { "*avx512f_broadcastv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3967 }, #else { 0, output_3967, 0 }, #endif { 0 }, &operand_data[6906], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16677 */ { "avx512f_broadcastv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3968 }, #else { 0, output_3968, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_broadcastv8di_mask }, &operand_data[6906], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "*avx512bw_vec_dup_gprv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3969 }, #else { 0, output_3969, 0 }, #endif { 0 }, &operand_data[6910], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "avx512bw_vec_dup_gprv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3970 }, #else { 0, output_3970, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vec_dup_gprv64qi_mask }, &operand_data[6910], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "*avx512vl_vec_dup_gprv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3971 }, #else { 0, output_3971, 0 }, #endif { 0 }, &operand_data[6914], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "avx512vl_vec_dup_gprv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3972 }, #else { 0, output_3972, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv16qi_mask }, &operand_data[6914], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "*avx512vl_vec_dup_gprv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3973 }, #else { 0, output_3973, 0 }, #endif { 0 }, &operand_data[6918], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "avx512vl_vec_dup_gprv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3974 }, #else { 0, output_3974, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv32qi_mask }, &operand_data[6918], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "*avx512bw_vec_dup_gprv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3975 }, #else { 0, output_3975, 0 }, #endif { 0 }, &operand_data[6922], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "avx512bw_vec_dup_gprv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3976 }, #else { 0, output_3976, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vec_dup_gprv32hi_mask }, &operand_data[6922], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "*avx512vl_vec_dup_gprv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3977 }, #else { 0, output_3977, 0 }, #endif { 0 }, &operand_data[6926], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "avx512vl_vec_dup_gprv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3978 }, #else { 0, output_3978, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv16hi_mask }, &operand_data[6926], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "*avx512vl_vec_dup_gprv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3979 }, #else { 0, output_3979, 0 }, #endif { 0 }, &operand_data[6930], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16689 */ { "avx512vl_vec_dup_gprv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_3980 }, #else { 0, output_3980, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv8hi_mask }, &operand_data[6930], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512f_vec_dup_gprv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6934], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512f_vec_dup_gprv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dup_gprv16si_mask }, &operand_data[6934], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512vl_vec_dup_gprv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6938], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512vl_vec_dup_gprv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv8si_mask }, &operand_data[6938], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512vl_vec_dup_gprv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6942], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512vl_vec_dup_gprv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv4si_mask }, &operand_data[6942], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512f_vec_dup_gprv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6946], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512f_vec_dup_gprv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dup_gprv8di_mask }, &operand_data[6946], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512vl_vec_dup_gprv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6950], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512vl_vec_dup_gprv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv4di_mask }, &operand_data[6950], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512vl_vec_dup_gprv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6954], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512vl_vec_dup_gprv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv2di_mask }, &operand_data[6954], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512f_vec_dup_gprv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6958], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512f_vec_dup_gprv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dup_gprv16sf_mask }, &operand_data[6958], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512vl_vec_dup_gprv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6962], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512vl_vec_dup_gprv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv8sf_mask }, &operand_data[6962], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512vl_vec_dup_gprv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6966], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512vl_vec_dup_gprv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastss\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv4sf_mask }, &operand_data[6966], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512f_vec_dup_gprv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6970], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512f_vec_dup_gprv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vec_dup_gprv8df_mask }, &operand_data[6970], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512vl_vec_dup_gprv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6974], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512vl_vec_dup_gprv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv4df_mask }, &operand_data[6974], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "*avx512vl_vec_dup_gprv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6978], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16701 */ { "avx512vl_vec_dup_gprv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastsd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vec_dup_gprv2df_mask }, &operand_data[6978], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16716 */ { "vec_dupv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4005 }, #else { 0, output_4005, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_dupv4sf }, &operand_data[6982], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16732 */ { "*vec_dupv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4006 }, #else { 0, output_4006, 0 }, #endif { 0 }, &operand_data[6984], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16748 */ { "*vec_dupv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4007 }, #else { 0, output_4007, 0 }, #endif { 0 }, &operand_data[6986], 2, 2, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16763 */ { "avx2_vbroadcasti128_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcasti128\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_vbroadcasti128_v32qi }, &operand_data[6988], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16763 */ { "avx2_vbroadcasti128_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcasti128\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_vbroadcasti128_v16hi }, &operand_data[6990], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16763 */ { "avx2_vbroadcasti128_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcasti128\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_vbroadcasti128_v8si }, &operand_data[6992], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16763 */ { "avx2_vbroadcasti128_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcasti128\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_vbroadcasti128_v4di }, &operand_data[6994], 2, 2, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16782 */ { "*vec_dupv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4012 }, #else { 0, output_4012, 0 }, #endif { 0 }, &operand_data[6996], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16782 */ { "*vec_dupv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4013 }, #else { 0, output_4013, 0 }, #endif { 0 }, &operand_data[6998], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16782 */ { "*vec_dupv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4014 }, #else { 0, output_4014, 0 }, #endif { 0 }, &operand_data[7000], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16782 */ { "*vec_dupv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4015 }, #else { 0, output_4015, 0 }, #endif { 0 }, &operand_data[7002], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16782 */ { "*vec_dupv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4016 }, #else { 0, output_4016, 0 }, #endif { 0 }, &operand_data[7004], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16782 */ { "*vec_dupv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4017 }, #else { 0, output_4017, 0 }, #endif { 0 }, &operand_data[7006], 2, 2, 0, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16796 */ { "vec_dupv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4018 }, #else { 0, output_4018, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_dupv8si }, &operand_data[7008], 2, 2, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16796 */ { "vec_dupv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4019 }, #else { 0, output_4019, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_dupv8sf }, &operand_data[7010], 2, 2, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16796 */ { "vec_dupv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4020 }, #else { 0, output_4020, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_dupv4di }, &operand_data[7012], 2, 2, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16796 */ { "vec_dupv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4021 }, #else { 0, output_4021, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_dupv4df }, &operand_data[7014], 2, 2, 0, 4, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16846 */ { "avx_vbroadcastf128_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4022 }, #else { 0, output_4022, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vbroadcastf128_v32qi }, &operand_data[7016], 2, 2, 1, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16846 */ { "avx_vbroadcastf128_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4023 }, #else { 0, output_4023, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vbroadcastf128_v16hi }, &operand_data[7018], 2, 2, 1, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16846 */ { "avx_vbroadcastf128_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4024 }, #else { 0, output_4024, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vbroadcastf128_v8si }, &operand_data[7020], 2, 2, 1, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16846 */ { "avx_vbroadcastf128_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4025 }, #else { 0, output_4025, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vbroadcastf128_v4di }, &operand_data[7022], 2, 2, 1, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16846 */ { "avx_vbroadcastf128_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4026 }, #else { 0, output_4026, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vbroadcastf128_v8sf }, &operand_data[7024], 2, 2, 1, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16846 */ { "avx_vbroadcastf128_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4027 }, #else { 0, output_4027, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vbroadcastf128_v4df }, &operand_data[7026], 2, 2, 1, 3, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16874 */ { "*avx512dq_broadcastv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcasti32x2\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6846], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16874 */ { "avx512dq_broadcastv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcasti32x2\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv16si_mask }, &operand_data[6846], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16874 */ { "*avx512dq_broadcastv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcasti32x2\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6850], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16874 */ { "avx512dq_broadcastv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcasti32x2\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv8si_mask }, &operand_data[6850], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16874 */ { "*avx512dq_broadcastv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcasti32x2\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2102], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16874 */ { "avx512dq_broadcastv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcasti32x2\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv4si_mask }, &operand_data[2102], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16874 */ { "*avx512dq_broadcastv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastf32x2\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6862], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16874 */ { "avx512dq_broadcastv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastf32x2\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv16sf_mask }, &operand_data[6862], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16874 */ { "*avx512dq_broadcastv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastf32x2\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6866], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16874 */ { "avx512dq_broadcastv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vbroadcastf32x2\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv8sf_mask }, &operand_data[6866], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16887 */ { "*avx512vl_broadcastv8si_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4038 }, #else { 0, output_4038, 0 }, #endif { 0 }, &operand_data[7028], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16887 */ { "avx512vl_broadcastv8si_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4039 }, #else { 0, output_4039, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_broadcastv8si_mask_1 }, &operand_data[7028], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16887 */ { "*avx512vl_broadcastv8sf_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4040 }, #else { 0, output_4040, 0 }, #endif { 0 }, &operand_data[7032], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16887 */ { "avx512vl_broadcastv8sf_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4041 }, #else { 0, output_4041, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_broadcastv8sf_mask_1 }, &operand_data[7032], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16900 */ { "*avx512dq_broadcastv16sf_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4042 }, #else { 0, output_4042, 0 }, #endif { 0 }, &operand_data[7036], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16900 */ { "avx512dq_broadcastv16sf_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4043 }, #else { 0, output_4043, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv16sf_mask_1 }, &operand_data[7036], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16900 */ { "*avx512dq_broadcastv16si_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4044 }, #else { 0, output_4044, 0 }, #endif { 0 }, &operand_data[7040], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16900 */ { "avx512dq_broadcastv16si_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4045 }, #else { 0, output_4045, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv16si_mask_1 }, &operand_data[7040], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16917 */ { "*avx512dq_broadcastv8di_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4046 }, #else { 0, output_4046, 0 }, #endif { 0 }, &operand_data[7044], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16917 */ { "avx512dq_broadcastv8di_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4047 }, #else { 0, output_4047, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv8di_mask_1 }, &operand_data[7044], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16917 */ { "*avx512dq_broadcastv8df_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4048 }, #else { 0, output_4048, 0 }, #endif { 0 }, &operand_data[7048], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16917 */ { "avx512dq_broadcastv8df_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4049 }, #else { 0, output_4049, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv8df_mask_1 }, &operand_data[7048], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16917 */ { "*avx512dq_broadcastv4di_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4050 }, #else { 0, output_4050, 0 }, #endif { 0 }, &operand_data[7052], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16917 */ { "avx512dq_broadcastv4di_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4051 }, #else { 0, output_4051, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv4di_mask_1 }, &operand_data[7052], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16917 */ { "*avx512dq_broadcastv4df_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4052 }, #else { 0, output_4052, 0 }, #endif { 0 }, &operand_data[7056], 2, 2, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16917 */ { "avx512dq_broadcastv4df_mask_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .multi = output_4053 }, #else { 0, output_4053, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_broadcastv4df_mask_1 }, &operand_data[7056], 4, 4, 0, 2, 2 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16930 */ { "avx512cd_maskb_vec_dupv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastmb2q\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512cd_maskb_vec_dupv8di }, &operand_data[3713], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16930 */ { "avx512cd_maskb_vec_dupv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastmb2q\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512cd_maskb_vec_dupv4di }, &operand_data[3717], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16930 */ { "avx512cd_maskb_vec_dupv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastmb2q\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512cd_maskb_vec_dupv2di }, &operand_data[3721], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16941 */ { "avx512cd_maskw_vec_dupv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastmw2d\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512cd_maskw_vec_dupv16si }, &operand_data[3701], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16941 */ { "avx512cd_maskw_vec_dupv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastmw2d\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512cd_maskw_vec_dupv8si }, &operand_data[7060], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16941 */ { "avx512cd_maskw_vec_dupv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpbroadcastmw2d\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512cd_maskw_vec_dupv4si }, &operand_data[7062], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16955 */ { "*avx_vperm_broadcast_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4060 }, #else { 0, 0, output_4060 }, #endif { 0 }, &operand_data[7064], 4, 4, 0, 3, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16983 */ { "*avx_vperm_broadcast_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7068], 4, 4, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16983 */ { "*avx_vperm_broadcast_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7072], 4, 4, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx512f_vpermilpv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4063 }, #else { 0, 0, output_4063 }, #endif { 0 }, &operand_data[7076], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx512f_vpermilpv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4064 }, #else { 0, 0, output_4064 }, #endif { 0 }, &operand_data[7076], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx_vpermilpv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4065 }, #else { 0, 0, output_4065 }, #endif { 0 }, &operand_data[7082], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx_vpermilpv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4066 }, #else { 0, 0, output_4066 }, #endif { 0 }, &operand_data[7082], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx_vpermilpv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4067 }, #else { 0, 0, output_4067 }, #endif { 0 }, &operand_data[7088], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx_vpermilpv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4068 }, #else { 0, 0, output_4068 }, #endif { 0 }, &operand_data[7088], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx512f_vpermilpv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4069 }, #else { 0, 0, output_4069 }, #endif { 0 }, &operand_data[7094], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx512f_vpermilpv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4070 }, #else { 0, 0, output_4070 }, #endif { 0 }, &operand_data[7094], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx_vpermilpv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4071 }, #else { 0, 0, output_4071 }, #endif { 0 }, &operand_data[7100], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx_vpermilpv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4072 }, #else { 0, 0, output_4072 }, #endif { 0 }, &operand_data[7100], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx_vpermilpv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4073 }, #else { 0, 0, output_4073 }, #endif { 0 }, &operand_data[7106], 4, 4, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17070 */ { "*avx_vpermilpv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4074 }, #else { 0, 0, output_4074 }, #endif { 0 }, &operand_data[7106], 6, 6, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx512f_vpermilvarv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermilvarv16sf3 }, &operand_data[7112], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx512f_vpermilvarv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermilvarv16sf3_mask }, &operand_data[7112], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx_vpermilvarv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilvarv8sf3 }, &operand_data[7117], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx_vpermilvarv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilvarv8sf3_mask }, &operand_data[7117], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx_vpermilvarv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilvarv4sf3 }, &operand_data[7122], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx_vpermilvarv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilvarv4sf3_mask }, &operand_data[7122], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx512f_vpermilvarv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermilvarv8df3 }, &operand_data[7127], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx512f_vpermilvarv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermilvarv8df3_mask }, &operand_data[7127], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx_vpermilvarv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilvarv4df3 }, &operand_data[7132], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx_vpermilvarv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilvarv4df3_mask }, &operand_data[7132], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx_vpermilvarv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilvarv2df3 }, &operand_data[7137], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17089 */ { "avx_vpermilvarv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermilpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilvarv2df3_mask }, &operand_data[7137], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512f_vpermi2varv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2d\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv16si3 }, &operand_data[7142], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512f_vpermi2varv16si3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2d\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv16si3_maskz_1 }, &operand_data[7142], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512f_vpermi2varv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2ps\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv16sf3 }, &operand_data[7148], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512f_vpermi2varv16sf3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2ps\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv16sf3_maskz_1 }, &operand_data[7148], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512f_vpermi2varv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2q\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv8di3 }, &operand_data[7154], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512f_vpermi2varv8di3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2q\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv8di3_maskz_1 }, &operand_data[7154], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512f_vpermi2varv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2pd\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv8df3 }, &operand_data[7160], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512f_vpermi2varv8df3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2pd\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv8df3_maskz_1 }, &operand_data[7160], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2d\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8si3 }, &operand_data[7166], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv8si3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2d\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8si3_maskz_1 }, &operand_data[7166], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2ps\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8sf3 }, &operand_data[7172], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv8sf3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2ps\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8sf3_maskz_1 }, &operand_data[7172], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2q\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4di3 }, &operand_data[7178], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv4di3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2q\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4di3_maskz_1 }, &operand_data[7178], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2pd\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4df3 }, &operand_data[7184], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv4df3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2pd\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4df3_maskz_1 }, &operand_data[7184], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2d\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4si3 }, &operand_data[7190], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv4si3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2d\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4si3_maskz_1 }, &operand_data[7190], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2ps\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4sf3 }, &operand_data[7196], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv4sf3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2ps\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4sf3_maskz_1 }, &operand_data[7196], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2q\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv2di3 }, &operand_data[7202], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv2di3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2q\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv2di3_maskz_1 }, &operand_data[7202], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2pd\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv2df3 }, &operand_data[7208], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17145 */ { "avx512vl_vpermi2varv2df3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2pd\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv2df3_maskz_1 }, &operand_data[7208], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17158 */ { "avx512bw_vpermi2varv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2b\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermi2varv64qi3 }, &operand_data[7214], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17158 */ { "avx512bw_vpermi2varv64qi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2b\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermi2varv64qi3_maskz_1 }, &operand_data[7214], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17158 */ { "avx512vl_vpermi2varv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2b\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv16qi3 }, &operand_data[7220], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17158 */ { "avx512vl_vpermi2varv16qi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2b\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv16qi3_maskz_1 }, &operand_data[7220], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17158 */ { "avx512vl_vpermi2varv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2b\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv32qi3 }, &operand_data[7226], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17158 */ { "avx512vl_vpermi2varv32qi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2b\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv32qi3_maskz_1 }, &operand_data[7226], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17171 */ { "avx512vl_vpermi2varv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2w\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8hi3 }, &operand_data[7232], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17171 */ { "avx512vl_vpermi2varv8hi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2w\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8hi3_maskz_1 }, &operand_data[7232], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17171 */ { "avx512vl_vpermi2varv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2w\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv16hi3 }, &operand_data[7238], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17171 */ { "avx512vl_vpermi2varv16hi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2w\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv16hi3_maskz_1 }, &operand_data[7238], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17171 */ { "avx512bw_vpermi2varv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2w\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermi2varv32hi3 }, &operand_data[7244], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17171 */ { "avx512bw_vpermi2varv32hi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2w\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermi2varv32hi3_maskz_1 }, &operand_data[7244], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512f_vpermi2varv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2d\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv16si3_mask }, &operand_data[7250], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512f_vpermi2varv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2ps\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv16sf3_mask }, &operand_data[7255], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512f_vpermi2varv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2q\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv8di3_mask }, &operand_data[7260], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512f_vpermi2varv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2pd\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv8df3_mask }, &operand_data[7265], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512vl_vpermi2varv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2d\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8si3_mask }, &operand_data[7270], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512vl_vpermi2varv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2ps\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8sf3_mask }, &operand_data[7275], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512vl_vpermi2varv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2q\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4di3_mask }, &operand_data[7280], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512vl_vpermi2varv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2pd\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4df3_mask }, &operand_data[7285], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512vl_vpermi2varv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2d\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4si3_mask }, &operand_data[7290], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512vl_vpermi2varv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2ps\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4sf3_mask }, &operand_data[7295], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512vl_vpermi2varv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2q\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv2di3_mask }, &operand_data[7300], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17184 */ { "avx512vl_vpermi2varv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2pd\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv2df3_mask }, &operand_data[7305], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17200 */ { "avx512bw_vpermi2varv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2b\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermi2varv64qi3_mask }, &operand_data[7310], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17200 */ { "avx512vl_vpermi2varv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2b\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv16qi3_mask }, &operand_data[7315], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17200 */ { "avx512vl_vpermi2varv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2b\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv32qi3_mask }, &operand_data[7320], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17216 */ { "avx512vl_vpermi2varv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2w\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8hi3_mask }, &operand_data[7325], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17216 */ { "avx512vl_vpermi2varv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2w\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv16hi3_mask }, &operand_data[7330], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17216 */ { "avx512bw_vpermi2varv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermi2w\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermi2varv32hi3_mask }, &operand_data[7335], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512f_vpermt2varv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2d\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv16si3 }, &operand_data[7142], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512f_vpermt2varv16si3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2d\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv16si3_maskz_1 }, &operand_data[7142], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512f_vpermt2varv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2ps\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv16sf3 }, &operand_data[7340], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512f_vpermt2varv16sf3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2ps\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv16sf3_maskz_1 }, &operand_data[7340], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512f_vpermt2varv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2q\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv8di3 }, &operand_data[7154], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512f_vpermt2varv8di3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2q\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv8di3_maskz_1 }, &operand_data[7154], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512f_vpermt2varv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2pd\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv8df3 }, &operand_data[7346], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512f_vpermt2varv8df3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2pd\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv8df3_maskz_1 }, &operand_data[7346], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2d\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8si3 }, &operand_data[7166], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv8si3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2d\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8si3_maskz_1 }, &operand_data[7166], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2ps\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8sf3 }, &operand_data[7352], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv8sf3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2ps\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8sf3_maskz_1 }, &operand_data[7352], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2q\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4di3 }, &operand_data[7178], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv4di3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2q\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4di3_maskz_1 }, &operand_data[7178], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2pd\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4df3 }, &operand_data[7358], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv4df3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2pd\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4df3_maskz_1 }, &operand_data[7358], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2d\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4si3 }, &operand_data[7190], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv4si3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2d\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4si3_maskz_1 }, &operand_data[7190], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2ps\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4sf3 }, &operand_data[7364], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv4sf3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2ps\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4sf3_maskz_1 }, &operand_data[7364], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2q\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv2di3 }, &operand_data[7202], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv2di3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2q\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv2di3_maskz_1 }, &operand_data[7202], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2pd\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv2df3 }, &operand_data[7370], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17274 */ { "avx512vl_vpermt2varv2df3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2pd\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv2df3_maskz_1 }, &operand_data[7370], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17287 */ { "avx512bw_vpermt2varv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2b\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermt2varv64qi3 }, &operand_data[7214], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17287 */ { "avx512bw_vpermt2varv64qi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2b\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermt2varv64qi3_maskz_1 }, &operand_data[7214], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17287 */ { "avx512vl_vpermt2varv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2b\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv16qi3 }, &operand_data[7220], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17287 */ { "avx512vl_vpermt2varv16qi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2b\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv16qi3_maskz_1 }, &operand_data[7220], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17287 */ { "avx512vl_vpermt2varv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2b\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv32qi3 }, &operand_data[7226], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17287 */ { "avx512vl_vpermt2varv32qi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2b\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv32qi3_maskz_1 }, &operand_data[7226], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17300 */ { "avx512vl_vpermt2varv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2w\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8hi3 }, &operand_data[7232], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17300 */ { "avx512vl_vpermt2varv8hi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2w\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8hi3_maskz_1 }, &operand_data[7232], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17300 */ { "avx512vl_vpermt2varv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2w\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv16hi3 }, &operand_data[7238], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17300 */ { "avx512vl_vpermt2varv16hi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2w\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv16hi3_maskz_1 }, &operand_data[7238], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17300 */ { "avx512bw_vpermt2varv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2w\t{%3, %1, %0|%0, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermt2varv32hi3 }, &operand_data[7244], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17300 */ { "avx512bw_vpermt2varv32hi3_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2w\t{%3, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermt2varv32hi3_maskz_1 }, &operand_data[7244], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512f_vpermt2varv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2d\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv16si3_mask }, &operand_data[7250], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512f_vpermt2varv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2ps\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv16sf3_mask }, &operand_data[7376], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512f_vpermt2varv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2q\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv8di3_mask }, &operand_data[7260], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512f_vpermt2varv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2pd\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv8df3_mask }, &operand_data[7381], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512vl_vpermt2varv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2d\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8si3_mask }, &operand_data[7270], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512vl_vpermt2varv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2ps\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8sf3_mask }, &operand_data[7386], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512vl_vpermt2varv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2q\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4di3_mask }, &operand_data[7280], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512vl_vpermt2varv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2pd\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4df3_mask }, &operand_data[7391], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512vl_vpermt2varv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2d\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4si3_mask }, &operand_data[7290], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512vl_vpermt2varv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2ps\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4sf3_mask }, &operand_data[7396], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512vl_vpermt2varv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2q\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv2di3_mask }, &operand_data[7300], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17313 */ { "avx512vl_vpermt2varv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2pd\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv2df3_mask }, &operand_data[7401], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17329 */ { "avx512bw_vpermt2varv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2b\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermt2varv64qi3_mask }, &operand_data[7310], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17329 */ { "avx512vl_vpermt2varv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2b\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv16qi3_mask }, &operand_data[7315], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17329 */ { "avx512vl_vpermt2varv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2b\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv32qi3_mask }, &operand_data[7320], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17345 */ { "avx512vl_vpermt2varv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2w\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8hi3_mask }, &operand_data[7325], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17345 */ { "avx512vl_vpermt2varv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2w\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv16hi3_mask }, &operand_data[7330], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17345 */ { "avx512bw_vpermt2varv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpermt2w\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermt2varv32hi3_mask }, &operand_data[7335], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17398 */ { "*avx_vperm2f128v8si_full", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vperm2%~128\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[6250], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17398 */ { "*avx_vperm2f128v8sf_full", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vperm2f128\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7406], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17398 */ { "*avx_vperm2f128v4df_full", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vperm2f128\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7410], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17413 */ { "*avx_vperm2f128v8si_nozero", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4198 }, #else { 0, 0, output_4198 }, #endif { 0 }, &operand_data[7414], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17413 */ { "*avx_vperm2f128v8sf_nozero", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4199 }, #else { 0, 0, output_4199 }, #endif { 0 }, &operand_data[7419], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17413 */ { "*avx_vperm2f128v4df_nozero", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4200 }, #else { 0, 0, output_4200 }, #endif { 0 }, &operand_data[7424], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17438 */ { "*ssse3_palignrv16qi_perm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4201 }, #else { 0, 0, output_4201 }, #endif { 0 }, &operand_data[7429], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17438 */ { "*ssse3_palignrv8hi_perm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4202 }, #else { 0, 0, output_4202 }, #endif { 0 }, &operand_data[7433], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17438 */ { "*ssse3_palignrv4si_perm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4203 }, #else { 0, 0, output_4203 }, #endif { 0 }, &operand_data[7437], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17438 */ { "*ssse3_palignrv2di_perm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4204 }, #else { 0, 0, output_4204 }, #endif { 0 }, &operand_data[7441], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17438 */ { "*ssse3_palignrv4sf_perm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4205 }, #else { 0, 0, output_4205 }, #endif { 0 }, &operand_data[7445], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17438 */ { "*ssse3_palignrv2df_perm", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4206 }, #else { 0, 0, output_4206 }, #endif { 0 }, &operand_data[7449], 4, 4, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17520 */ { "vec_set_lo_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4207 }, #else { 0, 0, output_4207 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v4di }, &operand_data[7453], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17520 */ { "vec_set_lo_v4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4208 }, #else { 0, 0, output_4208 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v4di_mask }, &operand_data[7453], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17520 */ { "vec_set_lo_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4209 }, #else { 0, 0, output_4209 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v4df }, &operand_data[7458], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17520 */ { "vec_set_lo_v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4210 }, #else { 0, 0, output_4210 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v4df_mask }, &operand_data[7458], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17540 */ { "vec_set_hi_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4211 }, #else { 0, 0, output_4211 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v4di }, &operand_data[7453], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17540 */ { "vec_set_hi_v4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4212 }, #else { 0, 0, output_4212 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v4di_mask }, &operand_data[7453], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17540 */ { "vec_set_hi_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4213 }, #else { 0, 0, output_4213 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v4df }, &operand_data[7458], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17540 */ { "vec_set_hi_v4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4214 }, #else { 0, 0, output_4214 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v4df_mask }, &operand_data[7458], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17560 */ { "vec_set_lo_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4215 }, #else { 0, 0, output_4215 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v8si }, &operand_data[7463], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17560 */ { "vec_set_lo_v8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4216 }, #else { 0, 0, output_4216 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v8si_mask }, &operand_data[7463], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17560 */ { "vec_set_lo_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4217 }, #else { 0, 0, output_4217 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v8sf }, &operand_data[7468], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17560 */ { "vec_set_lo_v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4218 }, #else { 0, 0, output_4218 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v8sf_mask }, &operand_data[7468], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17581 */ { "vec_set_hi_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4219 }, #else { 0, 0, output_4219 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v8si }, &operand_data[7463], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17581 */ { "vec_set_hi_v8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4220 }, #else { 0, 0, output_4220 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v8si_mask }, &operand_data[7463], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17581 */ { "vec_set_hi_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4221 }, #else { 0, 0, output_4221 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v8sf }, &operand_data[7468], 3, 3, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17581 */ { "vec_set_hi_v8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4222 }, #else { 0, 0, output_4222 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v8sf_mask }, &operand_data[7468], 5, 5, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17602 */ { "vec_set_lo_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsert%~128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v16hi }, &operand_data[7473], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17620 */ { "vec_set_hi_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsert%~128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v16hi }, &operand_data[7473], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17638 */ { "vec_set_lo_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsert%~128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_lo_v32qi }, &operand_data[7476], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17660 */ { "vec_set_hi_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vinsert%~128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_set_hi_v32qi }, &operand_data[7476], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17682 */ { "avx_maskloadps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmaskmovps\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_maskloadps }, &operand_data[7479], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17682 */ { "avx_maskloadpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmaskmovpd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_maskloadpd }, &operand_data[7482], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17682 */ { "avx_maskloadps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmaskmovps\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_maskloadps256 }, &operand_data[7485], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17682 */ { "avx_maskloadpd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmaskmovpd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_maskloadpd256 }, &operand_data[7488], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17682 */ { "avx2_maskloadd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaskmovd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_maskloadd }, &operand_data[7491], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17682 */ { "avx2_maskloadq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaskmovq\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_maskloadq }, &operand_data[7494], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17682 */ { "avx2_maskloadd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaskmovd\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_maskloadd256 }, &operand_data[7497], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17682 */ { "avx2_maskloadq256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaskmovq\t{%1, %2, %0|%0, %2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_maskloadq256 }, &operand_data[7500], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17696 */ { "avx_maskstoreps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmaskmovps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_maskstoreps }, &operand_data[7503], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17696 */ { "avx_maskstorepd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmaskmovpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_maskstorepd }, &operand_data[7506], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17696 */ { "avx_maskstoreps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmaskmovps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_maskstoreps256 }, &operand_data[7509], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17696 */ { "avx_maskstorepd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vmaskmovpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_maskstorepd256 }, &operand_data[7512], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17696 */ { "avx2_maskstored", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaskmovd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_maskstored }, &operand_data[7515], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17696 */ { "avx2_maskstoreq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaskmovq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_maskstoreq }, &operand_data[7518], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17696 */ { "avx2_maskstored256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaskmovd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_maskstored256 }, &operand_data[7521], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17696 */ { "avx2_maskstoreq256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmaskmovq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_maskstoreq256 }, &operand_data[7524], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17728 */ { "avx_si256_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_si256_si }, &operand_data[7527], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17728 */ { "avx_ps256_ps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_ps256_ps }, &operand_data[7529], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17728 */ { "avx_pd256_pd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_pd256_pd }, &operand_data[7531], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx2_ashrvv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashrvv4si }, &operand_data[1923], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx2_ashrvv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashrvv4si_mask }, &operand_data[5349], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx2_ashrvv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashrvv8si }, &operand_data[1919], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx2_ashrvv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashrvv8si_mask }, &operand_data[5344], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx512f_ashrvv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ashrvv16si }, &operand_data[1915], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx512f_ashrvv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ashrvv16si_mask }, &operand_data[5339], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx2_ashrvv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashrvv2di }, &operand_data[1935], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx2_ashrvv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashrvv2di_mask }, &operand_data[5208], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx2_ashrvv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashrvv4di }, &operand_data[1931], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx2_ashrvv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashrvv4di_mask }, &operand_data[4708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx512f_ashrvv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ashrvv8di }, &operand_data[1927], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17766 */ { "avx512f_ashrvv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ashrvv8di_mask }, &operand_data[4713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17777 */ { "avx512vl_ashrvv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ashrvv8hi }, &operand_data[1983], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17777 */ { "avx512vl_ashrvv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ashrvv8hi_mask }, &operand_data[5409], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17777 */ { "avx512vl_ashrvv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ashrvv16hi }, &operand_data[1979], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17777 */ { "avx512vl_ashrvv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ashrvv16hi_mask }, &operand_data[5404], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17777 */ { "avx512bw_ashrvv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ashrvv32hi }, &operand_data[1975], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17777 */ { "avx512bw_ashrvv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsravw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ashrvv32hi_mask }, &operand_data[5399], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx512f_ashlvv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ashlvv16si }, &operand_data[1915], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx512f_ashlvv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ashlvv16si_mask }, &operand_data[5339], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx512f_lshrvv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_lshrvv16si }, &operand_data[1915], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx512f_lshrvv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_lshrvv16si_mask }, &operand_data[5339], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_ashlvv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashlvv8si }, &operand_data[1919], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_ashlvv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashlvv8si_mask }, &operand_data[5344], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_lshrvv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_lshrvv8si }, &operand_data[1919], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_lshrvv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_lshrvv8si_mask }, &operand_data[5344], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_ashlvv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashlvv4si }, &operand_data[1923], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_ashlvv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashlvv4si_mask }, &operand_data[5349], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_lshrvv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_lshrvv4si }, &operand_data[1923], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_lshrvv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_lshrvv4si_mask }, &operand_data[5349], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx512f_ashlvv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ashlvv8di }, &operand_data[1927], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx512f_ashlvv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ashlvv8di_mask }, &operand_data[4713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx512f_lshrvv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_lshrvv8di }, &operand_data[1927], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx512f_lshrvv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_lshrvv8di_mask }, &operand_data[4713], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_ashlvv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashlvv4di }, &operand_data[1931], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_ashlvv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashlvv4di_mask }, &operand_data[4708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_lshrvv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_lshrvv4di }, &operand_data[1931], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_lshrvv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_lshrvv4di_mask }, &operand_data[4708], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_ashlvv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashlvv2di }, &operand_data[1935], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_ashlvv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ashlvv2di_mask }, &operand_data[5208], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_lshrvv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvq\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_lshrvv2di }, &operand_data[1935], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17788 */ { "avx2_lshrvv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvq\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_lshrvv2di_mask }, &operand_data[5208], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512vl_ashlvv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ashlvv8hi }, &operand_data[1983], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512vl_ashlvv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ashlvv8hi_mask }, &operand_data[5409], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512vl_lshrvv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_lshrvv8hi }, &operand_data[1983], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512vl_lshrvv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_lshrvv8hi_mask }, &operand_data[5409], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512vl_ashlvv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ashlvv16hi }, &operand_data[1979], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512vl_ashlvv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ashlvv16hi_mask }, &operand_data[5404], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512vl_lshrvv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_lshrvv16hi }, &operand_data[1979], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512vl_lshrvv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_lshrvv16hi_mask }, &operand_data[5404], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512bw_ashlvv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ashlvv32hi }, &operand_data[1975], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512bw_ashlvv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsllvw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ashlvv32hi_mask }, &operand_data[5399], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512bw_lshrvv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvw\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_lshrvv32hi }, &operand_data[1975], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17799 */ { "avx512bw_lshrvv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpsrlvw\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_lshrvv32hi_mask }, &operand_data[5399], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4300 }, #else { 0, 0, output_4300 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv32qi }, &operand_data[7533], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4301 }, #else { 0, 0, output_4301 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv16hi }, &operand_data[7536], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4302 }, #else { 0, 0, output_4302 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv8si }, &operand_data[7539], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4303 }, #else { 0, 0, output_4303 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv4di }, &operand_data[7542], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4304 }, #else { 0, 0, output_4304 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv8sf }, &operand_data[7545], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4305 }, #else { 0, 0, output_4305 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv4df }, &operand_data[7548], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4306 }, #else { 0, 0, output_4306 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv64qi }, &operand_data[7551], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4307 }, #else { 0, 0, output_4307 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv32hi }, &operand_data[7554], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4308 }, #else { 0, 0, output_4308 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv16si }, &operand_data[7557], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4309 }, #else { 0, 0, output_4309 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv8di }, &operand_data[7560], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4310 }, #else { 0, 0, output_4310 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv16sf }, &operand_data[7563], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17810 */ { "avx_vec_concatv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4311 }, #else { 0, 0, output_4311 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vec_concatv8df }, &operand_data[7566], 3, 3, 0, 2, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17849 */ { "vcvtph2ps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtph2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcvtph2ps }, &operand_data[7569], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17849 */ { "vcvtph2ps_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtph2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcvtph2ps_mask }, &operand_data[7569], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17862 */ { "*vcvtph2ps_load", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtph2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7573], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17862 */ { "*vcvtph2ps_load_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtph2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7573], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17872 */ { "vcvtph2ps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtph2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcvtph2ps256 }, &operand_data[7577], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17872 */ { "vcvtph2ps256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtph2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcvtph2ps256_mask }, &operand_data[7577], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17883 */ { "*avx512f_vcvtph2ps512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtph2ps\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7581], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17883 */ { "*avx512f_vcvtph2ps512_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtph2ps\t{%r2%1, %0|%0, %1%r2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7583], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17883 */ { "avx512f_vcvtph2ps512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtph2ps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvtph2ps512_mask }, &operand_data[7586], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17883 */ { "avx512f_vcvtph2ps512_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtph2ps\t{%r4%1, %0%{%3%}%N2|%0%{%3%}%N2, %1%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvtph2ps512_mask_round }, &operand_data[7590], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17917 */ { "*vcvtps2ph", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2ph\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7595], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17917 */ { "*vcvtps2ph_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2ph\t{%2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7595], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17930 */ { "*vcvtps2ph_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2ph\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7601], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17941 */ { "vcvtps2ph256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2ph\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcvtps2ph256 }, &operand_data[7604], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17941 */ { "vcvtps2ph256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2ph\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcvtps2ph256_mask }, &operand_data[7604], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17953 */ { "*avx512f_vcvtps2ph512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2ph\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7609], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17953 */ { "avx512f_vcvtps2ph512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcvtps2ph\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vcvtps2ph512_mask }, &operand_data[7609], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7614], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7622], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7630], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7638], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7646], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7654], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7662], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7670], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7678], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7686], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7694], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7702], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7710], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7718], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7726], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18007 */ { "*avx2_gathersiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%1, %7, %0|%0, %7, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7734], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv2di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7742], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv2di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7749], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv2df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7756], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv2df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7763], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv4di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7770], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv4di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7777], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv4df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7784], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv4df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7791], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv4si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7798], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv4si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7805], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv4sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7812], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv4sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7819], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv8si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7826], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv8si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7833], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv8sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7840], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18027 */ { "*avx2_gathersiv8sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%1, %6, %0|%0, %6, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7847], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqq\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7854], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqq\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7862], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqpd\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7870], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqpd\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7878], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqq\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7886], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqq\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7894], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqpd\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7902], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqpd\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7910], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7918], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7926], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7934], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7942], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7950], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7958], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7966], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18069 */ { "*avx2_gatherdiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%5, %7, %2|%2, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[7974], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv2di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4377 }, #else { 0, 0, output_4377 }, #endif { 0 }, &operand_data[7982], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv2di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4378 }, #else { 0, 0, output_4378 }, #endif { 0 }, &operand_data[7989], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv2df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4379 }, #else { 0, 0, output_4379 }, #endif { 0 }, &operand_data[7996], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv2df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4380 }, #else { 0, 0, output_4380 }, #endif { 0 }, &operand_data[8003], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv4di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4381 }, #else { 0, 0, output_4381 }, #endif { 0 }, &operand_data[8010], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv4di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4382 }, #else { 0, 0, output_4382 }, #endif { 0 }, &operand_data[8017], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv4df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4383 }, #else { 0, 0, output_4383 }, #endif { 0 }, &operand_data[8024], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv4df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4384 }, #else { 0, 0, output_4384 }, #endif { 0 }, &operand_data[8031], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv4si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4385 }, #else { 0, 0, output_4385 }, #endif { 0 }, &operand_data[8038], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv4si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4386 }, #else { 0, 0, output_4386 }, #endif { 0 }, &operand_data[8045], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv4sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4387 }, #else { 0, 0, output_4387 }, #endif { 0 }, &operand_data[8052], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv4sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4388 }, #else { 0, 0, output_4388 }, #endif { 0 }, &operand_data[8059], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv8si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4389 }, #else { 0, 0, output_4389 }, #endif { 0 }, &operand_data[8066], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv8si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4390 }, #else { 0, 0, output_4390 }, #endif { 0 }, &operand_data[8073], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv8sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4391 }, #else { 0, 0, output_4391 }, #endif { 0 }, &operand_data[8080], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18089 */ { "*avx2_gatherdiv8sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4392 }, #else { 0, 0, output_4392 }, #endif { 0 }, &operand_data[8087], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18113 */ { "*avx2_gatherdiv8si_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%5, %7, %0|%0, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8094], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18113 */ { "*avx2_gatherdiv8si_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%5, %7, %0|%0, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8102], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18113 */ { "*avx2_gatherdiv8sf_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%5, %7, %0|%0, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8110], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18113 */ { "*avx2_gatherdiv8sf_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%5, %7, %0|%0, %7, %5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8118], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18136 */ { "*avx2_gatherdiv8si_4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%4, %6, %0|%0, %6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8126], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18136 */ { "*avx2_gatherdiv8si_4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%4, %6, %0|%0, %6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8133], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18136 */ { "*avx2_gatherdiv8sf_4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%4, %6, %0|%0, %6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8140], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18136 */ { "*avx2_gatherdiv8sf_4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%4, %6, %0|%0, %6, %4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8147], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8154], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8162], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8170], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8178], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8186], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8194], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8202], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8210], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8218], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8226], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8234], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8242], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8250], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8258], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8266], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8274], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8282], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8290], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8298], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8306], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8314], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8322], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8330], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18178 */ { "*avx512f_gathersiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%6, %0%{%2%}|%0%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8338], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv16si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8346], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv16si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8353], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv16sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8360], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv16sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8367], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv8di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8374], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv8di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8381], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv8df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8388], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv8df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8395], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv8si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8402], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv8si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8409], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv8sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8416], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv8sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8423], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv4di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8430], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv4di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8437], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv4df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8444], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv4df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8451], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv4si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8458], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv4si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8465], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv4sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8472], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv4sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdps\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8479], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv2di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8486], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv2di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherdq\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8493], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv2df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8500], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18197 */ { "*avx512f_gathersiv2df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherdpd\t{%5, %0%{%1%}|%0%{%1%}, %g5}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8507], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8514], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8522], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8530], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8538], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqq\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8546], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqq\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8554], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqpd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8562], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqpd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8570], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8578], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8586], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8594], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8602], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqq\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8610], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqq\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8618], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqpd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8626], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqpd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8634], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8642], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8650], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8658], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqps\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8666], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqq\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8674], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpgatherqq\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8682], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqpd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8690], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18236 */ { "*avx512f_gatherdiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgatherqpd\t{%6, %1%{%2%}|%1%{%2%}, %g6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8698], 8, 8, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv16si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4473 }, #else { 0, 0, output_4473 }, #endif { 0 }, &operand_data[8706], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv16si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4474 }, #else { 0, 0, output_4474 }, #endif { 0 }, &operand_data[8713], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv16sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4475 }, #else { 0, 0, output_4475 }, #endif { 0 }, &operand_data[8720], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv16sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4476 }, #else { 0, 0, output_4476 }, #endif { 0 }, &operand_data[8727], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv8di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4477 }, #else { 0, 0, output_4477 }, #endif { 0 }, &operand_data[8734], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv8di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4478 }, #else { 0, 0, output_4478 }, #endif { 0 }, &operand_data[8741], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv8df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4479 }, #else { 0, 0, output_4479 }, #endif { 0 }, &operand_data[8748], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv8df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4480 }, #else { 0, 0, output_4480 }, #endif { 0 }, &operand_data[8755], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv8si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4481 }, #else { 0, 0, output_4481 }, #endif { 0 }, &operand_data[8762], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv8si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4482 }, #else { 0, 0, output_4482 }, #endif { 0 }, &operand_data[8769], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv8sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4483 }, #else { 0, 0, output_4483 }, #endif { 0 }, &operand_data[8776], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv8sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4484 }, #else { 0, 0, output_4484 }, #endif { 0 }, &operand_data[8783], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv4di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4485 }, #else { 0, 0, output_4485 }, #endif { 0 }, &operand_data[8790], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv4di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4486 }, #else { 0, 0, output_4486 }, #endif { 0 }, &operand_data[8797], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv4df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4487 }, #else { 0, 0, output_4487 }, #endif { 0 }, &operand_data[8804], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv4df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4488 }, #else { 0, 0, output_4488 }, #endif { 0 }, &operand_data[8811], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv4si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4489 }, #else { 0, 0, output_4489 }, #endif { 0 }, &operand_data[8818], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv4si_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4490 }, #else { 0, 0, output_4490 }, #endif { 0 }, &operand_data[8825], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv4sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4491 }, #else { 0, 0, output_4491 }, #endif { 0 }, &operand_data[8832], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv4sf_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4492 }, #else { 0, 0, output_4492 }, #endif { 0 }, &operand_data[8839], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv2di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4493 }, #else { 0, 0, output_4493 }, #endif { 0 }, &operand_data[8846], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv2di_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4494 }, #else { 0, 0, output_4494 }, #endif { 0 }, &operand_data[8853], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv2df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4495 }, #else { 0, 0, output_4495 }, #endif { 0 }, &operand_data[8860], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18255 */ { "*avx512f_gatherdiv2df_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4496 }, #else { 0, 0, output_4496 }, #endif { 0 }, &operand_data[8867], 7, 7, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8874], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8881], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8888], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8895], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8902], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8909], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8916], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8923], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8930], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8937], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8944], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8951], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8958], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8965], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8972], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8979], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8986], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[8993], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9000], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9007], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9014], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterdq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9021], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9028], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18301 */ { "*avx512f_scattersiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterdpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9035], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9042], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9049], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9056], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9063], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9070], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9077], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9084], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9091], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9098], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9105], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9112], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9119], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9126], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9133], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9140], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9147], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9154], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9161], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9168], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqps\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9175], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9182], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpscatterqq\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9189], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9196], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18337 */ { "*avx512f_scatterdiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vscatterqpd\t{%3, %5%{%1%}|%5%{%1%}, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9203], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512f_compressv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_compressv16si_mask }, &operand_data[9210], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512f_compressv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompressps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_compressv16sf_mask }, &operand_data[2424], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512f_compressv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_compressv8di_mask }, &operand_data[9214], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512f_compressv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompresspd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_compressv8df_mask }, &operand_data[2432], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512vl_compressv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressv8si_mask }, &operand_data[9218], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512vl_compressv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompressps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressv8sf_mask }, &operand_data[4231], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512vl_compressv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressv4di_mask }, &operand_data[9222], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512vl_compressv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompresspd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressv4df_mask }, &operand_data[4255], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512vl_compressv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressv4si_mask }, &operand_data[9226], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512vl_compressv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompressps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressv4sf_mask }, &operand_data[4239], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512vl_compressv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressv2di_mask }, &operand_data[9230], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18355 */ { "avx512vl_compressv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompresspd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressv2df_mask }, &operand_data[4263], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512f_compressstorev16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressd\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_compressstorev16si_mask }, &operand_data[9234], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512f_compressstorev16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompressps\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_compressstorev16sf_mask }, &operand_data[9237], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512f_compressstorev8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressq\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_compressstorev8di_mask }, &operand_data[9240], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512f_compressstorev8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompresspd\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_compressstorev8df_mask }, &operand_data[9243], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512vl_compressstorev8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressd\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressstorev8si_mask }, &operand_data[9246], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512vl_compressstorev8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompressps\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressstorev8sf_mask }, &operand_data[9249], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512vl_compressstorev4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressq\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressstorev4di_mask }, &operand_data[9252], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512vl_compressstorev4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompresspd\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressstorev4df_mask }, &operand_data[9255], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512vl_compressstorev4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressd\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressstorev4si_mask }, &operand_data[9258], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512vl_compressstorev4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompressps\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressstorev4sf_mask }, &operand_data[9261], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512vl_compressstorev2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpcompressq\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressstorev2di_mask }, &operand_data[9264], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18368 */ { "avx512vl_compressstorev2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vcompresspd\t{%1, %0%{%2%}|%0%{%2%}, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_compressstorev2df_mask }, &operand_data[9267], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512f_expandv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpexpandd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_expandv16si_mask }, &operand_data[1843], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512f_expandv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexpandps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_expandv16sf_mask }, &operand_data[1867], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512f_expandv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpexpandq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_expandv8di_mask }, &operand_data[1855], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512f_expandv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexpandpd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_expandv8df_mask }, &operand_data[1879], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512vl_expandv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpexpandd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv8si_mask }, &operand_data[1847], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512vl_expandv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexpandps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv8sf_mask }, &operand_data[1871], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512vl_expandv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpexpandq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv4di_mask }, &operand_data[1859], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512vl_expandv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexpandpd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv4df_mask }, &operand_data[1883], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512vl_expandv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpexpandd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv4si_mask }, &operand_data[1851], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512vl_expandv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexpandps\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv4sf_mask }, &operand_data[1875], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512vl_expandv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpexpandq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv2di_mask }, &operand_data[1863], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18392 */ { "avx512vl_expandv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vexpandpd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv2df_mask }, &operand_data[1887], 4, 4, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangeps\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv16sf }, &operand_data[9270], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangeps\t{%r4%3, %2, %1, %0|%0, %1, %2, %3%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv16sf_round }, &operand_data[9274], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangeps\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv16sf_mask }, &operand_data[9279], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangeps\t{%r6%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3%r6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv16sf_mask_round }, &operand_data[9285], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangeps\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv8sf }, &operand_data[9292], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangeps\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv8sf_mask }, &operand_data[9292], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangeps\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv4sf }, &operand_data[9298], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangeps\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv4sf_mask }, &operand_data[9298], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangepd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv8df }, &operand_data[9304], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangepd\t{%r4%3, %2, %1, %0|%0, %1, %2, %3%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv8df_round }, &operand_data[9308], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangepd\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv8df_mask }, &operand_data[9313], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangepd\t{%r6%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3%r6}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv8df_mask_round }, &operand_data[9319], 7, 7, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangepd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv4df }, &operand_data[9326], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangepd\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv4df_mask }, &operand_data[9326], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangepd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv2df }, &operand_data[9332], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18406 */ { "avx512dq_rangepv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangepd\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangepv2df_mask }, &operand_data[9332], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18419 */ { "avx512dq_rangesv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangess\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangesv4sf }, &operand_data[9298], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18419 */ { "avx512dq_rangesv4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangess\t{%r4%3, %2, %1, %0|%0, %1, %2, %3%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangesv4sf_round }, &operand_data[9338], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18419 */ { "avx512dq_rangesv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangesd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangesv2df }, &operand_data[9332], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18419 */ { "avx512dq_rangesv2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vrangesd\t{%r4%3, %2, %1, %0|%0, %1, %2, %3%r4}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_rangesv2df_round }, &operand_data[9343], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclassps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv16sf }, &operand_data[9348], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclassps\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv16sf_mask }, &operand_data[9348], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclassps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv8sf }, &operand_data[9352], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclassps\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv8sf_mask }, &operand_data[9352], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclassps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv4sf }, &operand_data[9356], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclassps\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv4sf_mask }, &operand_data[9356], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclasspd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv8df }, &operand_data[9360], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclasspd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv8df_mask }, &operand_data[9360], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclasspd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv4df }, &operand_data[9364], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclasspd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv4df_mask }, &operand_data[9364], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclasspd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv2df }, &operand_data[9368], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18435 */ { "avx512dq_fpclassv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclasspd\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_fpclassv2df_mask }, &operand_data[9368], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18448 */ { "avx512dq_vmfpclassv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclassss\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vmfpclassv4sf }, &operand_data[9356], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18448 */ { "avx512dq_vmfpclassv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vfpclasssd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vmfpclassv2df }, &operand_data[9368], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512f_getmantv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getmantv16sf }, &operand_data[9372], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512f_getmantv16sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getmantv16sf_round }, &operand_data[9375], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512f_getmantv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getmantv16sf_mask }, &operand_data[9379], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512f_getmantv16sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getmantv16sf_mask_round }, &operand_data[9384], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv8sf }, &operand_data[9390], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv8sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv8sf_round }, &operand_data[9393], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv8sf_mask }, &operand_data[9397], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv8sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv8sf_mask_round }, &operand_data[9402], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv4sf }, &operand_data[9408], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv4sf_round }, &operand_data[9411], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv4sf_mask }, &operand_data[9415], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv4sf_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantps\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv4sf_mask_round }, &operand_data[9420], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512f_getmantv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getmantv8df }, &operand_data[9426], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512f_getmantv8df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getmantv8df_round }, &operand_data[9429], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512f_getmantv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getmantv8df_mask }, &operand_data[9433], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512f_getmantv8df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_getmantv8df_mask_round }, &operand_data[9438], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv4df }, &operand_data[9444], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv4df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv4df_round }, &operand_data[9447], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv4df_mask }, &operand_data[9451], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv4df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv4df_mask_round }, &operand_data[9456], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv2df }, &operand_data[9462], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %r3%1, %0|%0, %1%r3, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv2df_round }, &operand_data[9465], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv2df_mask }, &operand_data[9469], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18463 */ { "avx512vl_getmantv2df_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantpd\t{%2, %r5%1, %0%{%4%}%N3|%0%{%4%}%N3, %1%r5, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_getmantv2df_mask_round }, &operand_data[9474], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18474 */ { "avx512f_vgetmantv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantss\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vgetmantv4sf }, &operand_data[9298], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18474 */ { "avx512f_vgetmantv4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantss\t{%3, %r4%2, %1, %0|%0, %1, %2%r4, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vgetmantv4sf_round }, &operand_data[9338], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18474 */ { "avx512f_vgetmantv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantsd\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vgetmantv2df }, &operand_data[9332], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18474 */ { "avx512f_vgetmantv2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vgetmantsd\t{%3, %r4%2, %1, %0|%0, %1, %2%r4, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vgetmantv2df_round }, &operand_data[9343], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18491 */ { "*avx512bw_dbpsadbwv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vdbpsadbw\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9480], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18491 */ { "avx512bw_dbpsadbwv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vdbpsadbw\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_dbpsadbwv8hi_mask }, &operand_data[9480], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18491 */ { "*avx512bw_dbpsadbwv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vdbpsadbw\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9486], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18491 */ { "avx512bw_dbpsadbwv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vdbpsadbw\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_dbpsadbwv16hi_mask }, &operand_data[9486], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18491 */ { "*avx512bw_dbpsadbwv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vdbpsadbw\t{%3, %2, %1, %0|%0, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[9492], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18491 */ { "avx512bw_dbpsadbwv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vdbpsadbw\t{%3, %2, %1, %0%{%5%}%N4|%0%{%5%}%N4, %1, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_dbpsadbwv32hi_mask }, &operand_data[9492], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv16si2 }, &operand_data[2094], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv16si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv16si2_mask }, &operand_data[2094], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv8si2 }, &operand_data[2098], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv8si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv8si2_mask }, &operand_data[2098], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv4si2 }, &operand_data[2102], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv4si2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv4si2_mask }, &operand_data[2102], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv8di2 }, &operand_data[2106], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv8di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv8di2_mask }, &operand_data[2106], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv4di2 }, &operand_data[2110], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv4di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv4di2_mask }, &operand_data[2110], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv2di2 }, &operand_data[2114], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18506 */ { "clzv2di2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vplzcntq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzv2di2_mask }, &operand_data[2114], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "*conflictv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2094], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "conflictv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_conflictv16si_mask }, &operand_data[2094], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "*conflictv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2098], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "conflictv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_conflictv8si_mask }, &operand_data[2098], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "*conflictv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictd\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2102], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "conflictv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictd\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_conflictv4si_mask }, &operand_data[2102], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "*conflictv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2106], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "conflictv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_conflictv8di_mask }, &operand_data[2106], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "*conflictv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2110], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "conflictv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_conflictv4di_mask }, &operand_data[2110], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "*conflictv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictq\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[2114], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18516 */ { "conflictv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpconflictq\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_conflictv2di_mask }, &operand_data[2114], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18527 */ { "sha1msg1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sha1msg1\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sha1msg1 }, &operand_data[9498], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18538 */ { "sha1msg2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sha1msg2\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sha1msg2 }, &operand_data[9498], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18549 */ { "sha1nexte", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sha1nexte\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sha1nexte }, &operand_data[9498], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18560 */ { "sha1rnds4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sha1rnds4\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sha1rnds4 }, &operand_data[9498], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18573 */ { "sha256msg1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sha256msg1\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sha256msg1 }, &operand_data[9498], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18584 */ { "sha256msg2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sha256msg2\t{%2, %0|%0, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sha256msg2 }, &operand_data[9498], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18595 */ { "sha256rnds2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sha256rnds2\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sha256rnds2 }, &operand_data[9502], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18608 */ { "avx512f_si512_si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_si512_si }, &operand_data[9506], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18608 */ { "avx512f_ps512_ps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ps512_ps }, &operand_data[9508], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18608 */ { "avx512f_pd512_pd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_pd512_pd }, &operand_data[9510], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18628 */ { "avx512f_si512_256si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_si512_256si }, &operand_data[9512], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18628 */ { "avx512f_ps512_256ps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ps512_256ps }, &operand_data[9514], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18628 */ { "avx512f_pd512_256pd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_pd512_256pd }, &operand_data[9516], 2, 2, 0, 2, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52luqv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52luq\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv8di }, &operand_data[4163], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52luqv8di_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52luq\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv8di_maskz_1 }, &operand_data[9518], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52huqv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52huq\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv8di }, &operand_data[4163], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52huqv8di_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52huq\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv8di_maskz_1 }, &operand_data[9518], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52luqv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52luq\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv4di }, &operand_data[4170], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52luqv4di_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52luq\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv4di_maskz_1 }, &operand_data[9524], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52huqv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52huq\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv4di }, &operand_data[4170], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52huqv4di_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52huq\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv4di_maskz_1 }, &operand_data[9524], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52luqv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52luq\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv2di }, &operand_data[4177], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52luqv2di_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52luq\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv2di_maskz_1 }, &operand_data[9530], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52huqv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52huq\t{%3, %2, %0|%0, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv2di }, &operand_data[4177], 4, 4, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18683 */ { "vpamdd52huqv2di_maskz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52huq\t{%3, %2, %0%{%5%}%N4|%0%{%5%}%N4, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv2di_maskz_1 }, &operand_data[9530], 6, 6, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18696 */ { "vpamdd52luqv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52luq\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv8di_mask }, &operand_data[9536], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18696 */ { "vpamdd52huqv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52huq\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv8di_mask }, &operand_data[9536], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18696 */ { "vpamdd52luqv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52luq\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv4di_mask }, &operand_data[9541], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18696 */ { "vpamdd52huqv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52huq\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv4di_mask }, &operand_data[9541], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18696 */ { "vpamdd52luqv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52luq\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv2di_mask }, &operand_data[9546], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18696 */ { "vpamdd52huqv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmadd52huq\t{%3, %2, %0%{%4%}|%0%{%4%}, %2, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv2di_mask }, &operand_data[9546], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18712 */ { "vpmultishiftqbv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmultishiftqb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpmultishiftqbv64qi }, &operand_data[1963], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18712 */ { "vpmultishiftqbv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmultishiftqb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpmultishiftqbv64qi_mask }, &operand_data[5384], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18712 */ { "vpmultishiftqbv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmultishiftqb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpmultishiftqbv16qi }, &operand_data[1967], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18712 */ { "vpmultishiftqbv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmultishiftqb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpmultishiftqbv16qi_mask }, &operand_data[5389], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18712 */ { "vpmultishiftqbv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmultishiftqb\t{%2, %1, %0|%0, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpmultishiftqbv32qi }, &operand_data[1971], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18712 */ { "vpmultishiftqbv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "vpmultishiftqb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpmultishiftqbv32qi_mask }, &operand_data[5394], 5, 5, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:48 */ { "*sse2_lfence", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lfence", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1095], 1, 1, 1, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:67 */ { "*sse_sfence", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "sfence", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { 0 }, &operand_data[1095], 1, 1, 1, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:86 */ { "mfence_sse2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "mfence", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mfence_sse2 }, &operand_data[1095], 1, 1, 1, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:96 */ { "mfence_nosse", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} or{l}\t{$0, (%%esp)|DWORD PTR [esp], 0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mfence_nosse }, &operand_data[1095], 1, 1, 1, 0, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:174 */ { "atomic_loaddi_fpu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_loaddi_fpu }, &operand_data[9551], 3, 4, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:254 */ { "atomic_storeqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%K2mov{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_storeqi_1 }, &operand_data[9555], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:254 */ { "atomic_storehi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%K2mov{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_storehi_1 }, &operand_data[9558], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:254 */ { "atomic_storesi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%K2mov{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_storesi_1 }, &operand_data[9561], 3, 3, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:262 */ { "atomic_storedi_fpu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "#", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_storedi_fpu }, &operand_data[9564], 3, 4, 0, 3, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:306 */ { "loaddi_via_fpu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "fild%Z1\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_loaddi_via_fpu }, &operand_data[9568], 2, 2, 0, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:316 */ { "storedi_via_fpu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4720 }, #else { 0, 0, output_4720 }, #endif { (insn_gen_fn::stored_funcptr) gen_storedi_via_fpu }, &operand_data[9570], 2, 2, 0, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:392 */ { "atomic_compare_and_swapdi_doubleword", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K5cmpxchg8b\t%1", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapdi_doubleword }, &operand_data[9572], 6, 6, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:408 */ { "atomic_compare_and_swapqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K4cmpxchg{b}\t{%3, %1|%1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapqi_1 }, &operand_data[9578], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:408 */ { "atomic_compare_and_swaphi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K4cmpxchg{w}\t{%3, %1|%1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swaphi_1 }, &operand_data[9583], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:408 */ { "atomic_compare_and_swapsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K4cmpxchg{l}\t{%3, %1|%1, %3}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapsi_1 }, &operand_data[9588], 5, 5, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:426 */ { "atomic_fetch_addqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K3xadd{b}\t{%0, %1|%1, %0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_addqi }, &operand_data[9593], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:426 */ { "atomic_fetch_addhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K3xadd{w}\t{%0, %1|%1, %0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_addhi }, &operand_data[9597], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:426 */ { "atomic_fetch_addsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K3xadd{l}\t{%0, %1|%1, %0}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_addsi }, &operand_data[9601], 4, 4, 2, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:470 */ { "*atomic_fetch_add_cmpqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4728 }, #else { 0, 0, output_4728 }, #endif { 0 }, &operand_data[9605], 4, 4, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:470 */ { "*atomic_fetch_add_cmphi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4729 }, #else { 0, 0, output_4729 }, #endif { 0 }, &operand_data[9609], 4, 4, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:470 */ { "*atomic_fetch_add_cmpsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4730 }, #else { 0, 0, output_4730 }, #endif { 0 }, &operand_data[9613], 4, 4, 2, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:503 */ { "atomic_exchangeqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%K3xchg{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_exchangeqi }, &operand_data[9617], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:503 */ { "atomic_exchangehi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%K3xchg{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_exchangehi }, &operand_data[9621], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:503 */ { "atomic_exchangesi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "%K3xchg{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_exchangesi }, &operand_data[9625], 4, 4, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:514 */ { "atomic_addqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4734 }, #else { 0, 0, output_4734 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_addqi }, &operand_data[9629], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:514 */ { "atomic_addhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4735 }, #else { 0, 0, output_4735 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_addhi }, &operand_data[9632], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:514 */ { "atomic_addsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4736 }, #else { 0, 0, output_4736 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_addsi }, &operand_data[9635], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:541 */ { "atomic_subqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4737 }, #else { 0, 0, output_4737 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_subqi }, &operand_data[9629], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:541 */ { "atomic_subhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4738 }, #else { 0, 0, output_4738 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_subhi }, &operand_data[9632], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:541 */ { "atomic_subsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .function = output_4739 }, #else { 0, 0, output_4739 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_subsi }, &operand_data[9635], 3, 3, 1, 1, 3 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:568 */ { "atomic_andqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K2and{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_andqi }, &operand_data[9629], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:568 */ { "atomic_orqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K2or{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_orqi }, &operand_data[9629], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:568 */ { "atomic_xorqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K2xor{b}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_xorqi }, &operand_data[9629], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:568 */ { "atomic_andhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K2and{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_andhi }, &operand_data[9632], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:568 */ { "atomic_orhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K2or{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_orhi }, &operand_data[9632], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:568 */ { "atomic_xorhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K2xor{w}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_xorhi }, &operand_data[9632], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:568 */ { "atomic_andsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K2and{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_andsi }, &operand_data[9635], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:568 */ { "atomic_orsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K2or{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_orsi }, &operand_data[9635], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:568 */ { "atomic_xorsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { .single = #else { #endif "lock{%;} %K2xor{l}\t{%1, %0|%0, %1}", #if HAVE_DESIGNATED_UNION_INITIALIZERS }, #else 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_xorsi }, &operand_data[9635], 3, 3, 1, 1, 1 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1173 */ { "cbranchqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cbranchqi4 }, &operand_data[9638], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1173 */ { "cbranchhi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cbranchhi4 }, &operand_data[9642], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1173 */ { "cbranchsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cbranchsi4 }, &operand_data[9646], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1173 */ { "cbranchdi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cbranchdi4 }, &operand_data[9650], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1191 */ { "cstoreqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cstoreqi4 }, &operand_data[9654], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1191 */ { "cstorehi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cstorehi4 }, &operand_data[9658], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1191 */ { "cstoresi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cstoresi4 }, &operand_data[9662], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1207 */ { "cmpsi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cmpsi_1 }, &operand_data[9647], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1274 */ { "cmpqi_ext_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cmpqi_ext_3 }, &operand_data[9666], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1323 */ { "cbranchxf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cbranchxf4 }, &operand_data[9668], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1340 */ { "cstorexf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cstorexf4 }, &operand_data[9672], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1355 */ { "cbranchsf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cbranchsf4 }, &operand_data[9676], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1355 */ { "cbranchdf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cbranchdf4 }, &operand_data[9680], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1372 */ { "cstoresf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cstoresf4 }, &operand_data[9684], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1372 */ { "cstoredf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cstoredf4 }, &operand_data[9688], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1387 */ { "cbranchcc4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cbranchcc4 }, &operand_data[9692], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1401 */ { "cstorecc4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cstorecc4 }, &operand_data[9696], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1436 */ { "cstorecc4+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9700], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1436 */ { "cstorecc4+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9703], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1436 */ { "cstorecc4+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9706], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1469 */ { "cstorecc4+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9709], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1502 */ { "cstorecc4+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9712], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1502 */ { "cstorecc4+6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9715], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1535 */ { "cstorecc4+7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9718], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1535 */ { "cstorecc4+8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9721], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1535 */ { "movxi-8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9709], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "movxi-7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9724], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "movxi-6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9728], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "movxi-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9732], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "movxi-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9736], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "movxi-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9740], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1572 */ { "movxi-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9744], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1778 */ { "movxi-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9748], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1860 */ { "movxi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movxi }, &operand_data[9750], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1900 */ { "movoi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movoi }, &operand_data[9752], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1906 */ { "movti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movti }, &operand_data[9754], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1922 */ { "movcdi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movcdi }, &operand_data[9756], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1934 */ { "movqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movqi }, &operand_data[9639], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1934 */ { "movhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movhi }, &operand_data[9643], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1934 */ { "movsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movsi }, &operand_data[9758], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:1934 */ { "movdi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movdi }, &operand_data[9760], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2100 */ { "movdi+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9762], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2269 */ { "movstrictqi-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9760], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2653 */ { "movstrictqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movstrictqi }, &operand_data[9764], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2653 */ { "movstricthi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movstricthi }, &operand_data[9766], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2805 */ { "movstricthi+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9768], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2805 */ { "movstricthi+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9768], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2839 */ { "movstricthi+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9770], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2839 */ { "movstricthi+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9770], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2873 */ { "movstricthi+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9772], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2873 */ { "movtf-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9772], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2911 */ { "movtf-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9774], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2911 */ { "movtf-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9774], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2934 */ { "movtf-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9776], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2941 */ { "movtf-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9778], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2954 */ { "movtf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movtf }, &operand_data[9780], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2960 */ { "movsf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movsf }, &operand_data[9782], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2960 */ { "movdf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movdf }, &operand_data[9784], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:2960 */ { "movxf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movxf }, &operand_data[9786], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3397 */ { "movxf+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9788], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3416 */ { "movxf+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9788], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3435 */ { "movxf+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9790], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3435 */ { "zero_extendsidi2-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9792], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3435 */ { "zero_extendsidi2-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9794], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3454 */ { "zero_extendsidi2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9796], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3497 */ { "zero_extendsidi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_zero_extendsidi2 }, &operand_data[9798], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3582 */ { "zero_extendsidi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9800], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3589 */ { "zero_extendsidi2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9802], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3598 */ { "zero_extendqisi2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9798], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3617 */ { "zero_extendqisi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_zero_extendqisi2 }, &operand_data[9803], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3617 */ { "zero_extendhisi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_zero_extendhisi2 }, &operand_data[9805], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3630 */ { "zero_extendhisi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9803], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3630 */ { "zero_extendqihi2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9805], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3665 */ { "zero_extendqihi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_zero_extendqihi2 }, &operand_data[9807], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3678 */ { "zero_extendqihi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9807], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3714 */ { "extendsidi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_extendsidi2 }, &operand_data[9802], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3748 */ { "extendsidi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9809], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3778 */ { "extendsidi2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9812], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3795 */ { "extendsidi2+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9812], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3816 */ { "extendsidi2+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9816], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3957 */ { "extendsidi2+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9819], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3957 */ { "extendsfdf2-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9819], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3964 */ { "extendsfdf2-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9821], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3964 */ { "extendsfdf2-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9821], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3964 */ { "extendsfdf2-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9823], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3964 */ { "extendsfdf2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9823], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:3972 */ { "extendsfdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_extendsfdf2 }, &operand_data[9825], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4000 */ { "extendsfdf2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9827], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4039 */ { "extendsfxf2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9829], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4090 */ { "extendsfxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_extendsfxf2 }, &operand_data[9831], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4090 */ { "extenddfxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_extenddfxf2 }, &operand_data[9833], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4127 */ { "truncdfsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_truncdfsf2 }, &operand_data[9835], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4152 */ { "truncdfsf2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9837], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4192 */ { "truncdfsf2_with_temp-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9839], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4203 */ { "truncdfsf2_with_temp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_truncdfsf2_with_temp }, &operand_data[9841], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4304 */ { "truncdfsf2_with_temp+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9844], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4316 */ { "truncxfsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_truncxfsf2 }, &operand_data[9847], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4316 */ { "truncxfdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_truncxfdf2 }, &operand_data[9849], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4382 */ { "truncxfdf2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9851], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4382 */ { "truncxfdf2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9854], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4391 */ { "fix_truncxfdi2-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9857], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4391 */ { "fix_truncxfdi2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9860], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4401 */ { "fix_truncxfdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncxfdi2 }, &operand_data[1367], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4414 */ { "fix_truncsfdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncsfdi2 }, &operand_data[9863], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4414 */ { "fix_truncdfdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncdfdi2 }, &operand_data[9865], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4438 */ { "fix_truncxfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncxfsi2 }, &operand_data[1398], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4451 */ { "fix_truncsfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncsfsi2 }, &operand_data[9867], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4451 */ { "fix_truncdfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncdfsi2 }, &operand_data[9869], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4475 */ { "fix_truncsfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncsfhi2 }, &operand_data[9871], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4475 */ { "fix_truncdfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncdfhi2 }, &operand_data[9873], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4475 */ { "fix_truncxfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fix_truncxfhi2 }, &operand_data[1396], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4491 */ { "fixuns_truncsfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fixuns_truncsfsi2 }, &operand_data[9875], 2, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4491 */ { "fixuns_truncdfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fixuns_truncdfsi2 }, &operand_data[9880], 2, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4515 */ { "fixuns_truncdfsi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9885], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4515 */ { "fixuns_truncsfhi2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9890], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4536 */ { "fixuns_truncsfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fixuns_truncsfhi2 }, &operand_data[9895], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4536 */ { "fixuns_truncdfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fixuns_truncdfhi2 }, &operand_data[9897], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4564 */ { "fixuns_truncdfhi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9899], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4564 */ { "fixuns_truncdfhi2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9902], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4564 */ { "fixuns_truncdfhi2+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9905], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4564 */ { "fixuns_truncdfhi2+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9908], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4574 */ { "fixuns_truncdfhi2+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[263], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4574 */ { "fixuns_truncdfhi2+6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[265], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4574 */ { "fixuns_truncdfhi2+7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[267], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4628 */ { "fixuns_truncdfhi2+8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9911], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4628 */ { "fixuns_truncdfhi2+9", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9915], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4628 */ { "fixuns_truncdfhi2+10", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9919], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4638 */ { "fixuns_truncdfhi2+11", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9923], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4638 */ { "floatsisf2-11", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9927], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4638 */ { "floatsisf2-10", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9931], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4652 */ { "floatsisf2-9", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[263], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4652 */ { "floatsisf2-8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[265], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4652 */ { "floatsisf2-7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[267], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4714 */ { "floatsisf2-6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9935], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4728 */ { "floatsisf2-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9941], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4768 */ { "floatsisf2-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9947], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4768 */ { "floatsisf2-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9952], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4780 */ { "floatsisf2-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9957], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4780 */ { "floatsisf2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9962], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4841 */ { "floatsisf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatsisf2 }, &operand_data[9868], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4841 */ { "floatsidf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatsidf2 }, &operand_data[9866], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4913 */ { "floatsidf2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9868], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4913 */ { "floatsidf2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9866], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4937 */ { "floatsidf2+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9868], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4937 */ { "floatsidf2+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9864], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4937 */ { "floatsidf2+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9866], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4937 */ { "floatsidf2+6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9967], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4961 */ { "floatsidf2+7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9837], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:4988 */ { "floatunsqisf2-7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9827], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5033 */ { "floatunsqisf2-6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9969], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5033 */ { "floatunsqisf2-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9974], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5033 */ { "floatunsqisf2-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9979], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5058 */ { "floatunsqisf2-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9984], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5058 */ { "floatunsqisf2-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9989], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5058 */ { "floatunsqisf2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9994], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5070 */ { "floatunsqisf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatunsqisf2 }, &operand_data[9999], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5070 */ { "floatunshisf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatunshisf2 }, &operand_data[9872], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5070 */ { "floatunsqidf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatunsqidf2 }, &operand_data[10001], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5070 */ { "floatunshidf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatunshidf2 }, &operand_data[9870], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5086 */ { "floatunshidf2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10003], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5086 */ { "floatunshidf2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10007], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5086 */ { "floatunssisf2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10011], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5105 */ { "floatunssisf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatunssisf2 }, &operand_data[10015], 2, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5105 */ { "floatunssidf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatunssidf2 }, &operand_data[10019], 2, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5105 */ { "floatunssixf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatunssixf2 }, &operand_data[10023], 2, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5147 */ { "floatunssixf2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10027], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5147 */ { "addqi3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10029], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5195 */ { "addqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addqi3 }, &operand_data[10031], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5195 */ { "addhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addhi3 }, &operand_data[10034], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5195 */ { "addsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addsi3 }, &operand_data[10037], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5195 */ { "adddi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_adddi3 }, &operand_data[10040], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5202 */ { "adddi3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10040], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5500 */ { "adddi3+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10043], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5500 */ { "adddi3+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10046], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5511 */ { "adddi3+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10049], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5511 */ { "addvqi4-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10052], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5511 */ { "addvqi4-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10043], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5511 */ { "addvqi4-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10046], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5925 */ { "addvqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addvqi4 }, &operand_data[10055], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5925 */ { "addvhi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addvhi4 }, &operand_data[10059], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5925 */ { "addvsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addvsi4 }, &operand_data[10063], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:5995 */ { "addvsi4+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10067], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6027 */ { "addvsi4+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10071], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6057 */ { "addvsi4+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10075], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6092 */ { "subqi3-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10080], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6092 */ { "subqi3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10080], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6136 */ { "subqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subqi3 }, &operand_data[10031], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6136 */ { "subhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subhi3 }, &operand_data[10034], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6136 */ { "subsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subsi3 }, &operand_data[10037], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6136 */ { "subdi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subdi3 }, &operand_data[10040], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6143 */ { "subdi3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10040], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6230 */ { "subvqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subvqi4 }, &operand_data[10055], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6230 */ { "subvhi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subvhi4 }, &operand_data[10059], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6230 */ { "subvsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subvsi4 }, &operand_data[10063], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6325 */ { "addqi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addqi3_carry }, &operand_data[10084], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6325 */ { "subqi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subqi3_carry }, &operand_data[10084], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6325 */ { "addhi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addhi3_carry }, &operand_data[10089], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6325 */ { "subhi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subhi3_carry }, &operand_data[10089], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6325 */ { "addsi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addsi3_carry }, &operand_data[10094], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6325 */ { "subsi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subsi3_carry }, &operand_data[10094], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6325 */ { "adddi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_adddi3_carry }, &operand_data[10099], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6325 */ { "subdi3_carry", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subdi3_carry }, &operand_data[10099], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6450 */ { "addxf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addxf3 }, &operand_data[10104], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6450 */ { "subxf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subxf3 }, &operand_data[10104], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6457 */ { "addsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addsf3 }, &operand_data[10107], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6457 */ { "subsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subsf3 }, &operand_data[10107], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6457 */ { "adddf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_adddf3 }, &operand_data[10110], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6457 */ { "subdf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subdf3 }, &operand_data[10110], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6467 */ { "mulhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulhi3 }, &operand_data[10113], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6467 */ { "mulsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulsi3 }, &operand_data[10116], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6474 */ { "mulqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulqi3 }, &operand_data[10119], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6612 */ { "mulvsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulvsi4 }, &operand_data[10122], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6709 */ { "umulvsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulvsi4 }, &operand_data[10126], 4, 5, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6757 */ { "mulvqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulvqi4 }, &operand_data[10131], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6757 */ { "umulvqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulvqi4 }, &operand_data[10131], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6802 */ { "mulsidi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulsidi3 }, &operand_data[10135], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6802 */ { "umulsidi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulsidi3 }, &operand_data[10135], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6811 */ { "mulqihi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulqihi3 }, &operand_data[10138], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6811 */ { "umulqihi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulqihi3 }, &operand_data[10138], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6884 */ { "umulqihi3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10141], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6884 */ { "smulsi3_highpart-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10144], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6949 */ { "smulsi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smulsi3_highpart }, &operand_data[10147], 3, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:6949 */ { "umulsi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulsi3_highpart }, &operand_data[10147], 3, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7039 */ { "mulxf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulxf3 }, &operand_data[10104], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7045 */ { "mulsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulsf3 }, &operand_data[10107], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7045 */ { "muldf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_muldf3 }, &operand_data[10110], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7056 */ { "divxf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divxf3 }, &operand_data[10104], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7062 */ { "divdf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divdf3 }, &operand_data[10110], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7069 */ { "divsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divsf3 }, &operand_data[10107], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7090 */ { "divmodhi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divmodhi4 }, &operand_data[10151], 4, 4, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7090 */ { "divmodsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divmodsi4 }, &operand_data[10155], 4, 4, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7104 */ { "divmodsi4+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10158], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7104 */ { "divmodsi4+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10162], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7118 */ { "divmodsi4+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10158], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7153 */ { "divmodqi4-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10166], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7153 */ { "divmodqi4-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10158], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7201 */ { "divmodqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divmodqi4 }, &operand_data[10170], 4, 4, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7263 */ { "udivmodhi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_udivmodhi4 }, &operand_data[10151], 4, 4, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7263 */ { "udivmodsi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_udivmodsi4 }, &operand_data[10155], 4, 4, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7277 */ { "udivmodsi4+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10158], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7277 */ { "udivmodsi4+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10162], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7291 */ { "udivmodsi4+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10158], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7313 */ { "udivmodqi4-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10166], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7313 */ { "udivmodqi4-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10158], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7336 */ { "udivmodqi4-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10174], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7373 */ { "udivmodqi4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_udivmodqi4 }, &operand_data[10170], 4, 4, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7454 */ { "testsi_ccno_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_testsi_ccno_1 }, &operand_data[10178], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7461 */ { "testqi_ccz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_testqi_ccz_1 }, &operand_data[10180], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7534 */ { "testqi_ext_ccno_0", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_testqi_ext_ccno_0 }, &operand_data[10182], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7620 */ { "testqi_ext_ccno_0+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10184], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7679 */ { "testqi_ext_ccno_0+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10189], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7702 */ { "testqi_ext_ccno_0+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10184], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "testqi_ext_ccno_0+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10193], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "testqi_ext_ccno_0+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10193], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "testqi_ext_ccno_0+6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10193], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "testqi_ext_ccno_0+7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10196], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "testqi_ext_ccno_0+8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10196], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "andqi3-7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10196], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "andqi3-6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10199], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "andqi3-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10199], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "andqi3-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10199], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "andqi3-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10202], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "andqi3-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10202], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7723 */ { "andqi3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10202], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7752 */ { "andqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andqi3 }, &operand_data[10031], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7752 */ { "andhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andhi3 }, &operand_data[10034], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7752 */ { "andsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andsi3 }, &operand_data[10205], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7972 */ { "andsi3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10208], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7972 */ { "andsi3+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10210], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7999 */ { "andsi3+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10212], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7999 */ { "andsi3+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10215], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:7999 */ { "andsi3+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10218], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8042 */ { "iorqi3-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[264], 0, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8052 */ { "iorqi3-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9666], 0, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8062 */ { "iorqi3-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9666], 0, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8272 */ { "iorqi3-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10221], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8295 */ { "iorqi3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10224], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8321 */ { "iorqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorqi3 }, &operand_data[10031], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8321 */ { "xorqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorqi3 }, &operand_data[10031], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8321 */ { "iorhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorhi3 }, &operand_data[10034], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8321 */ { "xorhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorhi3 }, &operand_data[10034], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8321 */ { "iorsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorsi3 }, &operand_data[10037], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8321 */ { "xorsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorsi3 }, &operand_data[10037], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8451 */ { "xorsi3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10208], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8451 */ { "xorsi3+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10210], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8451 */ { "xorsi3+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10227], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8451 */ { "xorsi3+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10229], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8640 */ { "xorqi_cc_ext_1-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10221], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8640 */ { "xorqi_cc_ext_1-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10221], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8663 */ { "xorqi_cc_ext_1-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10224], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8663 */ { "xorqi_cc_ext_1-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10224], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8684 */ { "xorqi_cc_ext_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorqi_cc_ext_1 }, &operand_data[10231], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8733 */ { "negqi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negqi2 }, &operand_data[10031], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8733 */ { "neghi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_neghi2 }, &operand_data[10034], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8733 */ { "negsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negsi2 }, &operand_data[10037], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8733 */ { "negdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negdi2 }, &operand_data[10040], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8739 */ { "negdi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10040], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8819 */ { "negvqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negvqi3 }, &operand_data[10234], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8819 */ { "negvhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negvhi3 }, &operand_data[10237], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8819 */ { "negvsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negvsi3 }, &operand_data[10240], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8850 */ { "abssf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_abssf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8850 */ { "negsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negsf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8850 */ { "absdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absdf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8850 */ { "negdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negdf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8850 */ { "absxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absxf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8850 */ { "negxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negxf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8883 */ { "abstf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_abstf2 }, &operand_data[10243], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8883 */ { "negtf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negtf2 }, &operand_data[10243], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8900 */ { "negtf2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10245], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8908 */ { "negtf2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10248], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8932 */ { "negtf2+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10252], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8956 */ { "copysignsf3-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10255], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:8994 */ { "copysignsf3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10258], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9065 */ { "copysignsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysignsf3 }, &operand_data[10261], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9065 */ { "copysigndf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysigndf3 }, &operand_data[10264], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9065 */ { "copysigntf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysigntf3 }, &operand_data[10267], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9073 */ { "copysigntf3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10270], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9073 */ { "copysigntf3+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10274], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9073 */ { "copysigntf3+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10278], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9100 */ { "one_cmplqi2-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10282], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9100 */ { "one_cmplqi2-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10288], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9100 */ { "one_cmplqi2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10294], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9117 */ { "one_cmplqi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplqi2 }, &operand_data[10031], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9117 */ { "one_cmplhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplhi2 }, &operand_data[10034], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9117 */ { "one_cmplsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplsi2 }, &operand_data[10037], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9194 */ { "one_cmplsi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10300], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9194 */ { "one_cmplsi2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10304], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9194 */ { "one_cmplsi2+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10308], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9194 */ { "ashlqi3-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10312], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9221 */ { "ashlqi3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10316], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9259 */ { "ashlqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlqi3 }, &operand_data[10320], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9259 */ { "ashlhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlhi3 }, &operand_data[10323], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9259 */ { "ashlsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlsi3 }, &operand_data[10326], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9259 */ { "ashldi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashldi3 }, &operand_data[10329], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9275 */ { "ashldi3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10332], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9288 */ { "x86_shiftsi_adj_1-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10332], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9333 */ { "x86_shiftsi_adj_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_x86_shiftsi_adj_1 }, &operand_data[10336], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9349 */ { "x86_shiftsi_adj_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_x86_shiftsi_adj_2 }, &operand_data[10336], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9456 */ { "x86_shiftsi_adj_2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10339], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9682 */ { "lshrqi3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10342], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9873 */ { "lshrqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrqi3 }, &operand_data[10320], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9873 */ { "ashrqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrqi3 }, &operand_data[10320], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9873 */ { "lshrhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrhi3 }, &operand_data[10323], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9873 */ { "ashrhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrhi3 }, &operand_data[10323], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9873 */ { "lshrsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrsi3 }, &operand_data[10326], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9873 */ { "ashrsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrsi3 }, &operand_data[10326], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9873 */ { "lshrdi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrdi3 }, &operand_data[10345], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9873 */ { "ashrdi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrdi3 }, &operand_data[10345], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9899 */ { "ashrdi3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10348], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9899 */ { "ashrdi3+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10348], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9915 */ { "x86_shiftsi_adj_3-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10348], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:9915 */ { "x86_shiftsi_adj_3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10348], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10012 */ { "x86_shiftsi_adj_3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_x86_shiftsi_adj_3 }, &operand_data[10336], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10083 */ { "x86_shiftsi_adj_3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10339], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10083 */ { "rotldi3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10339], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10311 */ { "rotldi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotldi3 }, &operand_data[10345], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10311 */ { "rotrdi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotrdi3 }, &operand_data[10345], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10328 */ { "rotlqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotlqi3 }, &operand_data[10320], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10328 */ { "rotrqi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotrqi3 }, &operand_data[10320], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10328 */ { "rotlhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotlhi3 }, &operand_data[10323], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10328 */ { "rotrhi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotrhi3 }, &operand_data[10323], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10328 */ { "rotlsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotlsi3 }, &operand_data[10326], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10328 */ { "rotrsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotrsi3 }, &operand_data[10326], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10357 */ { "rotrsi3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10352], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10385 */ { "rotrsi3+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10352], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10456 */ { "rotrsi3+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10356], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10469 */ { "extv-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10356], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10595 */ { "extv-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1376], 0, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10595 */ { "extv-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1376], 0, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10607 */ { "extv", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_extv }, &operand_data[10359], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10624 */ { "extzv", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_extzv }, &operand_data[10363], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10641 */ { "insv", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_insv }, &operand_data[10367], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10850 */ { "insv+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10371], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10867 */ { "insv+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10371], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10908 */ { "insv+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10373], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10917 */ { "insv+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10375], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10926 */ { "insv+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10373], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:10946 */ { "insv+6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10375], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11069 */ { "insv+7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10376], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11083 */ { "insv+8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10376], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11113 */ { "insv+9", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10378], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11113 */ { "insv+10", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10382], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11147 */ { "insv+11", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10386], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11147 */ { "insv+12", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10390], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11180 */ { "insv+13", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10394], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11180 */ { "insv+14", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10399], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11214 */ { "indirect_jump-14", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10378], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11247 */ { "indirect_jump-13", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10394], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11387 */ { "indirect_jump-12", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10404], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11387 */ { "indirect_jump-11", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10409], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11387 */ { "indirect_jump-10", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10414], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11405 */ { "indirect_jump-9", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10419], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11405 */ { "indirect_jump-8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10425], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11405 */ { "indirect_jump-7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10431], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11463 */ { "indirect_jump-6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10437], 0, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11463 */ { "indirect_jump-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10444], 0, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11463 */ { "indirect_jump-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10451], 0, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11463 */ { "indirect_jump-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10458], 0, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11463 */ { "indirect_jump-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10465], 0, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11463 */ { "indirect_jump-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10472], 0, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11517 */ { "indirect_jump", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_indirect_jump }, &operand_data[10479], 1, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11532 */ { "tablejump", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_tablejump }, &operand_data[10479], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11583 */ { "tablejump+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10480], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11602 */ { "tablejump+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10480], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11625 */ { "call-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10484], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11644 */ { "call-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10480], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11681 */ { "call", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_call }, &operand_data[10488], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11692 */ { "sibcall", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sibcall }, &operand_data[10488], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11725 */ { "sibcall+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10491], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11725 */ { "sibcall+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10495], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11736 */ { "call_pop-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10491], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11736 */ { "call_pop-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10495], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11749 */ { "call_pop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_call_pop }, &operand_data[10499], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11793 */ { "call_pop+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10503], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11810 */ { "call_pop+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10503], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11831 */ { "call_value-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9811], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11831 */ { "call_value-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9970], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11840 */ { "call_value", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_call_value }, &operand_data[10508], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11852 */ { "sibcall_value", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sibcall_value }, &operand_data[10508], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11889 */ { "sibcall_value+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10512], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11889 */ { "sibcall_value+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10516], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11902 */ { "call_value_pop-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10512], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11902 */ { "call_value_pop-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10516], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11917 */ { "call_value_pop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_call_value_pop }, &operand_data[10498], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11965 */ { "call_value_pop+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10520], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:11984 */ { "untyped_call-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10520], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12007 */ { "untyped_call", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_untyped_call }, &operand_data[10525], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12063 */ { "memory_blockage", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_memory_blockage }, &operand_data[0], 0, 0, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12091 */ { "return", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_return }, &operand_data[0], 0, 0, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12107 */ { "simple_return", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_simple_return }, &operand_data[0], 0, 0, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12212 */ { "prologue", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_prologue }, &operand_data[0], 0, 0, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12266 */ { "epilogue", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_epilogue }, &operand_data[0], 0, 0, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12271 */ { "sibcall_epilogue", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sibcall_epilogue }, &operand_data[0], 0, 0, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12276 */ { "eh_return", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_eh_return }, &operand_data[264], 1, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12295 */ { "eh_return+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[0], 0, 0, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12321 */ { "split_stack_prologue", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_split_stack_prologue }, &operand_data[0], 0, 0, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12355 */ { "split_stack_space_check", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_split_stack_space_check }, &operand_data[10528], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12379 */ { "ffssi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ffssi2 }, &operand_data[10063], 2, 2, 9, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12409 */ { "ffssi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10530], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12465 */ { "ctzhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ctzhi2 }, &operand_data[10059], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12465 */ { "ctzsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ctzsi2 }, &operand_data[10063], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12475 */ { "ctzsi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10063], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12475 */ { "clzhi2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10145], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12543 */ { "clzhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzhi2 }, &operand_data[10059], 2, 2, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12543 */ { "clzsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzsi2 }, &operand_data[10063], 2, 2, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12563 */ { "clzhi2_lzcnt", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzhi2_lzcnt }, &operand_data[10059], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12563 */ { "clzsi2_lzcnt", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_clzsi2_lzcnt }, &operand_data[10063], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12571 */ { "clzsi2_lzcnt+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10063], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12571 */ { "bmi2_bzhi_si3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10145], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12681 */ { "bmi2_bzhi_si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bmi2_bzhi_si3 }, &operand_data[10147], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12920 */ { "popcounthi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_popcounthi2 }, &operand_data[10059], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12920 */ { "popcountsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_popcountsi2 }, &operand_data[10063], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12928 */ { "popcountsi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10063], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12928 */ { "bswapsi2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10145], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:12992 */ { "bswapsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bswapsi2 }, &operand_data[10063], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13057 */ { "paritydi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_paritydi2 }, &operand_data[10046], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13085 */ { "paritysi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_paritysi2 }, &operand_data[9810], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13104 */ { "paritysi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10533], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13135 */ { "tls_global_dynamic_32-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10537], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13201 */ { "tls_global_dynamic_32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_tls_global_dynamic_32 }, &operand_data[10539], 4, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13297 */ { "tls_local_dynamic_base_32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_tls_local_dynamic_base_32 }, &operand_data[10545], 3, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13362 */ { "tls_local_dynamic_base_32+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10550], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13482 */ { "tls_dynamic_gnu2_32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_tls_dynamic_gnu2_32 }, &operand_data[10539], 3, 3, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13528 */ { "tls_dynamic_gnu2_32+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10556], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:13588 */ { "rsqrtsf2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10561], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14021 */ { "rsqrtsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrtsf2 }, &operand_data[9713], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14046 */ { "sqrtsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrtsf2 }, &operand_data[9713], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14046 */ { "sqrtdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrtdf2 }, &operand_data[9716], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14092 */ { "fmodxf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmodxf3 }, &operand_data[10565], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14116 */ { "fmodsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmodsf3 }, &operand_data[10568], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14116 */ { "fmoddf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmoddf3 }, &operand_data[10571], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14166 */ { "remainderxf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_remainderxf3 }, &operand_data[10565], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14190 */ { "remaindersf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_remaindersf3 }, &operand_data[10568], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14190 */ { "remainderdf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_remainderdf3 }, &operand_data[10571], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14273 */ { "remainderdf3+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10104], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14283 */ { "remainderdf3+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10104], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14308 */ { "remainderdf3+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10105], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14308 */ { "sincossf3-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10574], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14320 */ { "sincossf3-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10105], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14320 */ { "sincossf3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10574], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14332 */ { "sincossf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sincossf3 }, &operand_data[10577], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14332 */ { "sincosdf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sincosdf3 }, &operand_data[10580], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14379 */ { "tanxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_tanxf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14392 */ { "tansf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_tansf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14392 */ { "tandf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_tandf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14439 */ { "atan2xf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atan2xf3 }, &operand_data[10583], 3, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14448 */ { "atan2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atan2sf3 }, &operand_data[10577], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14448 */ { "atan2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atan2df3 }, &operand_data[10580], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14464 */ { "atanxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atanxf2 }, &operand_data[10587], 2, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14477 */ { "atansf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atansf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14477 */ { "atandf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atandf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14495 */ { "asinxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_asinxf2 }, &operand_data[10591], 2, 7, 9, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14519 */ { "asinsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_asinsf2 }, &operand_data[10420], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14519 */ { "asindf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_asindf2 }, &operand_data[10426], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14539 */ { "acosxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_acosxf2 }, &operand_data[10591], 2, 7, 9, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14563 */ { "acossf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_acossf2 }, &operand_data[10420], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14563 */ { "acosdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_acosdf2 }, &operand_data[10426], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14610 */ { "logxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_logxf2 }, &operand_data[10587], 2, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14622 */ { "logsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_logsf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14622 */ { "logdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_logdf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14640 */ { "log10xf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_log10xf2 }, &operand_data[10587], 2, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14652 */ { "log10sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_log10sf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14652 */ { "log10df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_log10df2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14670 */ { "log2xf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_log2xf2 }, &operand_data[10587], 2, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14682 */ { "log2sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_log2sf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14682 */ { "log2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_log2df2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14727 */ { "log1pxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_log1pxf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14740 */ { "log1psf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_log1psf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14740 */ { "log1pdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_log1pdf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14789 */ { "logbxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_logbxf2 }, &operand_data[1390], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14799 */ { "logbsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_logbsf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14799 */ { "logbdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_logbdf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14815 */ { "ilogbxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ilogbxf2 }, &operand_data[1378], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14834 */ { "ilogbsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ilogbsf2 }, &operand_data[10598], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14834 */ { "ilogbdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ilogbdf2 }, &operand_data[10600], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14879 */ { "expNcorexf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_expNcorexf3 }, &operand_data[10104], 3, 3, 16, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14906 */ { "expxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_expxf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14924 */ { "expsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_expsf2 }, &operand_data[10420], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14924 */ { "expdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_expdf2 }, &operand_data[10426], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14946 */ { "exp10xf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_exp10xf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14964 */ { "exp10sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_exp10sf2 }, &operand_data[10420], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14964 */ { "exp10df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_exp10df2 }, &operand_data[10426], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:14986 */ { "exp2xf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_exp2xf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15004 */ { "exp2sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_exp2sf2 }, &operand_data[10420], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15004 */ { "exp2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_exp2df2 }, &operand_data[10426], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15026 */ { "expm1xf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_expm1xf2 }, &operand_data[1390], 2, 2, 28, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15066 */ { "expm1sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_expm1sf2 }, &operand_data[10420], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15066 */ { "expm1df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_expm1df2 }, &operand_data[10426], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15088 */ { "ldexpxf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ldexpxf3 }, &operand_data[10602], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15108 */ { "ldexpsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ldexpsf3 }, &operand_data[10605], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15108 */ { "ldexpdf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ldexpdf3 }, &operand_data[10608], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15131 */ { "scalbxf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_scalbxf3 }, &operand_data[10611], 3, 3, 3, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15148 */ { "scalbsf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_scalbsf3 }, &operand_data[10568], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15148 */ { "scalbdf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_scalbdf3 }, &operand_data[10571], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15173 */ { "significandxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_significandxf2 }, &operand_data[1390], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15183 */ { "significandsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_significandsf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15183 */ { "significanddf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_significanddf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15222 */ { "rintsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rintsf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15222 */ { "rintdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rintdf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15256 */ { "roundsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundsf2 }, &operand_data[9713], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15256 */ { "rounddf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rounddf2 }, &operand_data[9716], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15256 */ { "roundxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundxf2 }, &operand_data[10415], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15290 */ { "roundxf2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1367], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15334 */ { "roundxf2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10614], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15345 */ { "roundxf2+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10618], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15355 */ { "roundxf2+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1376], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15355 */ { "roundxf2+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1378], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15392 */ { "lrintxfhi2-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9732], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15392 */ { "lrintxfhi2-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10622], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15401 */ { "lrintxfhi2-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10625], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15401 */ { "lrintxfhi2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10628], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15409 */ { "lrintxfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lrintxfhi2 }, &operand_data[1396], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15409 */ { "lrintxfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lrintxfsi2 }, &operand_data[1398], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15409 */ { "lrintxfdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lrintxfdi2 }, &operand_data[1367], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15415 */ { "lrintsfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lrintsfsi2 }, &operand_data[9867], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15415 */ { "lrintdfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lrintdfsi2 }, &operand_data[9869], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15421 */ { "lroundsfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lroundsfhi2 }, &operand_data[9871], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15421 */ { "lrounddfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lrounddfhi2 }, &operand_data[9873], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15421 */ { "lroundxfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lroundxfhi2 }, &operand_data[1396], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15421 */ { "lroundsfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lroundsfsi2 }, &operand_data[9867], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15421 */ { "lrounddfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lrounddfsi2 }, &operand_data[9869], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15421 */ { "lroundxfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lroundxfsi2 }, &operand_data[1398], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15421 */ { "lroundsfdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lroundsfdi2 }, &operand_data[9863], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15421 */ { "lrounddfdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lrounddfdi2 }, &operand_data[9865], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15421 */ { "lroundxfdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lroundxfdi2 }, &operand_data[1367], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15478 */ { "lroundxfdi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1390], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15478 */ { "lroundxfdi2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1390], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15478 */ { "floorxf2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1390], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15516 */ { "floorxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floorxf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15516 */ { "ceilxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ceilxf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15516 */ { "btruncxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_btruncxf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15525 */ { "floorsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floorsf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15525 */ { "ceilsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ceilsf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15525 */ { "btruncsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_btruncsf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15525 */ { "floordf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floordf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15525 */ { "ceildf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ceildf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15525 */ { "btruncdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_btruncdf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15586 */ { "btruncdf2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1390], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15624 */ { "nearbyintxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_nearbyintxf2 }, &operand_data[1390], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15632 */ { "nearbyintsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_nearbyintsf2 }, &operand_data[9719], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15632 */ { "nearbyintdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_nearbyintdf2 }, &operand_data[9722], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "nearbyintdf2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1396], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "nearbyintdf2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1396], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "nearbyintdf2+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1398], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "nearbyintdf2+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1398], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "nearbyintdf2+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1367], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15651 */ { "nearbyintdf2+6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1367], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15712 */ { "nearbyintdf2+7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10631], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15712 */ { "nearbyintdf2+8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10631], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15728 */ { "nearbyintdf2+9", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10637], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15728 */ { "lfloorxfhi2-9", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10637], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15770 */ { "lfloorxfhi2-8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10643], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15770 */ { "lfloorxfhi2-7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10643], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15770 */ { "lfloorxfhi2-6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10648], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15770 */ { "lfloorxfhi2-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10648], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15784 */ { "lfloorxfhi2-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10653], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15784 */ { "lfloorxfhi2-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10653], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15784 */ { "lfloorxfhi2-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10658], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15784 */ { "lfloorxfhi2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10658], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15797 */ { "lfloorxfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lfloorxfhi2 }, &operand_data[1396], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15797 */ { "lceilxfhi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lceilxfhi2 }, &operand_data[1396], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15797 */ { "lfloorxfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lfloorxfsi2 }, &operand_data[1398], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15797 */ { "lceilxfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lceilxfsi2 }, &operand_data[1398], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15797 */ { "lfloorxfdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lfloorxfdi2 }, &operand_data[1367], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15797 */ { "lceilxfdi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lceilxfdi2 }, &operand_data[1367], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15806 */ { "lfloorsfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lfloorsfsi2 }, &operand_data[9867], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15806 */ { "lceilsfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lceilsfsi2 }, &operand_data[9867], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15806 */ { "lfloordfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lfloordfsi2 }, &operand_data[9869], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15806 */ { "lceildfsi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lceildfsi2 }, &operand_data[9869], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15839 */ { "lceildfsi2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1429], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15839 */ { "isinfxf2-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1431], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15860 */ { "isinfxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_isinfxf2 }, &operand_data[1378], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15886 */ { "isinfsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_isinfsf2 }, &operand_data[9875], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15886 */ { "isinfdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_isinfdf2 }, &operand_data[9880], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15922 */ { "signbitxf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_signbitxf2 }, &operand_data[1378], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15948 */ { "signbitdf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_signbitdf2 }, &operand_data[10600], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15970 */ { "signbitsf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_signbitsf2 }, &operand_data[10598], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:15994 */ { "movmemsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmemsi }, &operand_data[10663], 9, 9, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16019 */ { "strmov", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_strmov }, &operand_data[10672], 4, 4, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16048 */ { "strmov_singleop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_strmov_singleop }, &operand_data[10672], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16124 */ { "rep_mov", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rep_mov }, &operand_data[10678], 7, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16192 */ { "setmemsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_setmemsi }, &operand_data[10685], 9, 9, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16217 */ { "strset", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_strset }, &operand_data[10672], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16243 */ { "strset_singleop", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_strset_singleop }, &operand_data[10680], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16310 */ { "rep_stos", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rep_stos }, &operand_data[10694], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16376 */ { "cmpstrnsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cmpstrnsi }, &operand_data[10699], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16446 */ { "cmpintqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cmpintqi }, &operand_data[9654], 1, 1, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16464 */ { "cmpstrnqi_nz_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cmpstrnqi_nz_1 }, &operand_data[10704], 6, 6, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16498 */ { "cmpstrnqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_cmpstrnqi_1 }, &operand_data[10704], 6, 6, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16536 */ { "strlensi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_strlensi }, &operand_data[10710], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16536 */ { "strlendi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_strlendi }, &operand_data[10714], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16550 */ { "strlenqi_1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_strlenqi_1 }, &operand_data[10718], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16591 */ { "strlenqi_1+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10721], 0, 9, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16620 */ { "movqicc-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10721], 0, 9, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16656 */ { "movqicc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movqicc }, &operand_data[10729], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16656 */ { "movhicc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movhicc }, &operand_data[10733], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16656 */ { "movsicc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movsicc }, &operand_data[10737], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16668 */ { "x86_movsicc_0_m1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_x86_movsicc_0_m1 }, &operand_data[10741], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16745 */ { "x86_movsicc_0_m1+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10744], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16745 */ { "x86_movsicc_0_m1+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10748], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16745 */ { "x86_movsicc_0_m1+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10752], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16776 */ { "x86_movsicc_0_m1+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10756], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16776 */ { "x86_movsicc_0_m1+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10760], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16793 */ { "x86_movsicc_0_m1+6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10763], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16793 */ { "movsfcc-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10767], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16793 */ { "movsfcc-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10771], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16806 */ { "movsfcc-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10763], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16806 */ { "movsfcc-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10767], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16806 */ { "movsfcc-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10771], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16819 */ { "movsfcc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movsfcc }, &operand_data[10775], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16819 */ { "movdfcc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movdfcc }, &operand_data[10779], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16819 */ { "movxfcc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movxfcc }, &operand_data[10783], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16863 */ { "movxfcc+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10787], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16897 */ { "movxfcc+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10791], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16897 */ { "movxfcc+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10795], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16918 */ { "addqicc-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10799], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:16933 */ { "addqicc-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10799], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17016 */ { "addqicc-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10803], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17043 */ { "addqicc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addqicc }, &operand_data[10807], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17043 */ { "addhicc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addhicc }, &operand_data[10811], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17043 */ { "addsicc", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addsicc }, &operand_data[10815], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17127 */ { "allocate_stack", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_allocate_stack }, &operand_data[10224], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17165 */ { "probe_stack", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_probe_stack }, &operand_data[9789], 1, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17200 */ { "builtin_setjmp_receiver", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_builtin_setjmp_receiver }, &operand_data[783], 1, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17222 */ { "builtin_setjmp_receiver+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10819], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17251 */ { "builtin_setjmp_receiver+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10823], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17282 */ { "builtin_setjmp_receiver+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10828], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17303 */ { "builtin_setjmp_receiver+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10221], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17321 */ { "builtin_setjmp_receiver+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10819], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17340 */ { "builtin_setjmp_receiver+6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10832], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17340 */ { "builtin_setjmp_receiver+7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10835], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17340 */ { "builtin_setjmp_receiver+8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10838], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17340 */ { "builtin_setjmp_receiver+9", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10841], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17351 */ { "builtin_setjmp_receiver+10", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10844], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17362 */ { "builtin_setjmp_receiver+11", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10833], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17362 */ { "builtin_setjmp_receiver+12", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10836], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17362 */ { "builtin_setjmp_receiver+13", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10839], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17378 */ { "builtin_setjmp_receiver+14", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10847], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17378 */ { "builtin_setjmp_receiver+15", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10850], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17378 */ { "builtin_setjmp_receiver+16", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10853], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17391 */ { "builtin_setjmp_receiver+17", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10856], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17412 */ { "builtin_setjmp_receiver+18", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10031], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17412 */ { "builtin_setjmp_receiver+19", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10034], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17412 */ { "builtin_setjmp_receiver+20", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10037], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17433 */ { "builtin_setjmp_receiver+21", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10860], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17453 */ { "builtin_setjmp_receiver+22", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10864], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17470 */ { "builtin_setjmp_receiver+23", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10868], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17504 */ { "builtin_setjmp_receiver+24", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10872], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17517 */ { "builtin_setjmp_receiver+25", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10872], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17533 */ { "builtin_setjmp_receiver+26", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10876], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17550 */ { "builtin_setjmp_receiver+27", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10880], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17570 */ { "builtin_setjmp_receiver+28", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10884], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17586 */ { "builtin_setjmp_receiver+29", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10884], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17604 */ { "builtin_setjmp_receiver+30", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10888], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17604 */ { "builtin_setjmp_receiver+31", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10892], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17604 */ { "builtin_setjmp_receiver+32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10896], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17604 */ { "builtin_setjmp_receiver+33", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10900], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17637 */ { "builtin_setjmp_receiver+34", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10904], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17637 */ { "builtin_setjmp_receiver+35", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10907], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17637 */ { "builtin_setjmp_receiver+36", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10910], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17637 */ { "builtin_setjmp_receiver+37", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10913], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17664 */ { "builtin_setjmp_receiver+38", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10916], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17664 */ { "builtin_setjmp_receiver+39", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10921], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17702 */ { "builtin_setjmp_receiver+40", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10926], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17713 */ { "builtin_setjmp_receiver+41", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10928], 0, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17724 */ { "builtin_setjmp_receiver+42", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1376], 0, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17724 */ { "builtin_setjmp_receiver+43", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[1378], 0, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17724 */ { "builtin_setjmp_receiver+44", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9802], 0, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17741 */ { "builtin_setjmp_receiver+45", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10044], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17741 */ { "builtin_setjmp_receiver+46", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10047], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17750 */ { "builtin_setjmp_receiver+47", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10044], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17750 */ { "builtin_setjmp_receiver+48", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10047], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17783 */ { "builtin_setjmp_receiver+49", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10176], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17783 */ { "builtin_setjmp_receiver+50", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10929], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17827 */ { "builtin_setjmp_receiver+51", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10931], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17827 */ { "prefetch-51", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10933], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17827 */ { "prefetch-50", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10935], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17827 */ { "prefetch-49", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10937], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17840 */ { "prefetch-48", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10931], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17840 */ { "prefetch-47", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10933], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17840 */ { "prefetch-46", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10935], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17840 */ { "prefetch-45", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10937], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17855 */ { "prefetch-44", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10931], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17855 */ { "prefetch-43", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10933], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17855 */ { "prefetch-42", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10935], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17855 */ { "prefetch-41", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10937], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17866 */ { "prefetch-40", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10931], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17866 */ { "prefetch-39", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10933], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17866 */ { "prefetch-38", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10935], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17866 */ { "prefetch-37", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10937], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17879 */ { "prefetch-36", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10931], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17879 */ { "prefetch-35", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10933], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17879 */ { "prefetch-34", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10935], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17879 */ { "prefetch-33", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10937], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17893 */ { "prefetch-32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10939], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17893 */ { "prefetch-31", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10942], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17893 */ { "prefetch-30", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10945], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17893 */ { "prefetch-29", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10948], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17907 */ { "prefetch-28", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10931], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17907 */ { "prefetch-27", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10933], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17907 */ { "prefetch-26", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10935], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17907 */ { "prefetch-25", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10937], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17921 */ { "prefetch-24", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10931], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17921 */ { "prefetch-23", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10933], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17921 */ { "prefetch-22", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10935], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17921 */ { "prefetch-21", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10937], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17932 */ { "prefetch-20", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10939], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17932 */ { "prefetch-19", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10942], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17932 */ { "prefetch-18", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10945], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17932 */ { "prefetch-17", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10948], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17943 */ { "prefetch-16", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10931], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17943 */ { "prefetch-15", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10933], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17943 */ { "prefetch-14", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10935], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17943 */ { "prefetch-13", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10937], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17956 */ { "prefetch-12", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10189], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17972 */ { "prefetch-11", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10951], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17972 */ { "prefetch-10", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10954], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17986 */ { "prefetch-9", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10957], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:17986 */ { "prefetch-8", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10960], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18002 */ { "prefetch-7", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10963], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18002 */ { "prefetch-6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10967], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18033 */ { "prefetch-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10971], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18033 */ { "prefetch-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10975], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18033 */ { "prefetch-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10979], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18062 */ { "prefetch-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10983], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18062 */ { "prefetch-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10989], 0, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18120 */ { "prefetch", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_prefetch }, &operand_data[10995], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18191 */ { "stack_protect_set", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_stack_protect_set }, &operand_data[10708], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18233 */ { "stack_protect_test", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_stack_protect_test }, &operand_data[10998], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18604 */ { "lwp_llwpcb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lwp_llwpcb }, &operand_data[468], 1, 1, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18618 */ { "lwp_slwpcb", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lwp_slwpcb }, &operand_data[466], 1, 1, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18642 */ { "lwp_lwpvalsi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lwp_lwpvalsi3 }, &operand_data[11001], 4, 4, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18663 */ { "lwp_lwpinssi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lwp_lwpinssi3 }, &operand_data[11005], 4, 4, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18736 */ { "pause", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_pause }, &operand_data[0], 0, 0, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18755 */ { "xbegin", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xbegin }, &operand_data[1378], 1, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18805 */ { "xtest", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xtest }, &operand_data[9654], 1, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18852 */ { "bnd32_mk", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd32_mk }, &operand_data[11009], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18852 */ { "bnd64_mk", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd64_mk }, &operand_data[11012], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18880 */ { "movbnd32", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movbnd32 }, &operand_data[11015], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18880 */ { "movbnd64", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movbnd64 }, &operand_data[11017], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18895 */ { "bnd32_cl", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd32_cl }, &operand_data[11019], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18895 */ { "bnd32_cu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd32_cu }, &operand_data[11019], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18895 */ { "bnd32_cn", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd32_cn }, &operand_data[11019], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18895 */ { "bnd64_cl", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd64_cl }, &operand_data[11021], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18895 */ { "bnd64_cu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd64_cu }, &operand_data[11021], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18895 */ { "bnd64_cn", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd64_cn }, &operand_data[11021], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18915 */ { "bnd32_ldx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd32_ldx }, &operand_data[11023], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18915 */ { "bnd64_ldx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd64_ldx }, &operand_data[11026], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18959 */ { "bnd32_stx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd32_stx }, &operand_data[11029], 3, 3, 3, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/i386.md:18959 */ { "bnd64_stx", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_bnd64_stx }, &operand_data[11032], 3, 3, 3, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:70 */ { "movv8qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv8qi }, &operand_data[11035], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:70 */ { "movv4hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv4hi }, &operand_data[11037], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:70 */ { "movv2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv2si }, &operand_data[11039], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:70 */ { "movv1di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv1di }, &operand_data[11041], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:70 */ { "movv2sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv2sf }, &operand_data[11043], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:207 */ { "movv2sf+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11045], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:207 */ { "movv2sf+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11047], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:207 */ { "movv2sf+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11049], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:207 */ { "movmisalignv8qi-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11051], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:207 */ { "movmisalignv8qi-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11053], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:216 */ { "movmisalignv8qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv8qi }, &operand_data[11035], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:216 */ { "movmisalignv4hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv4hi }, &operand_data[11037], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:216 */ { "movmisalignv2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv2si }, &operand_data[11039], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:216 */ { "movmisalignv1di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv1di }, &operand_data[11041], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:216 */ { "movmisalignv2sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv2sf }, &operand_data[11043], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:240 */ { "mmx_addv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_addv2sf3 }, &operand_data[11055], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:258 */ { "mmx_subv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_subv2sf3 }, &operand_data[11058], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:264 */ { "mmx_subrv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_subrv2sf3 }, &operand_data[11059], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:282 */ { "mmx_mulv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_mulv2sf3 }, &operand_data[11055], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:303 */ { "mmx_smaxv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_smaxv2sf3 }, &operand_data[11055], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:303 */ { "mmx_sminv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_sminv2sf3 }, &operand_data[11055], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:449 */ { "mmx_eqv2sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_eqv2sf3 }, &operand_data[11062], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:571 */ { "vec_setv2sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv2sf }, &operand_data[11065], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:584 */ { "vec_setv2sf+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11068], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:623 */ { "vec_extractv2sf-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11070], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:632 */ { "vec_extractv2sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv2sf }, &operand_data[11072], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:643 */ { "vec_initv2sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv2sf }, &operand_data[11075], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:658 */ { "mmx_addv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_addv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:658 */ { "mmx_subv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_subv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:658 */ { "mmx_addv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_addv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:658 */ { "mmx_subv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_subv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:658 */ { "mmx_addv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_addv2si3 }, &operand_data[11083], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:658 */ { "mmx_subv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_subv2si3 }, &operand_data[11083], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:658 */ { "mmx_addv1di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_addv1di3 }, &operand_data[11086], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:658 */ { "mmx_subv1di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_subv1di3 }, &operand_data[11086], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:677 */ { "mmx_ssaddv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_ssaddv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:677 */ { "mmx_usaddv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_usaddv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:677 */ { "mmx_sssubv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_sssubv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:677 */ { "mmx_ussubv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_ussubv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:677 */ { "mmx_ssaddv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_ssaddv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:677 */ { "mmx_usaddv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_usaddv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:677 */ { "mmx_sssubv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_sssubv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:677 */ { "mmx_ussubv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_ussubv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:695 */ { "mmx_mulv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_mulv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:711 */ { "mmx_smulv4hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_smulv4hi3_highpart }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:739 */ { "mmx_umulv4hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_umulv4hi3_highpart }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:768 */ { "mmx_pmaddwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pmaddwd }, &operand_data[11089], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:814 */ { "mmx_pmulhrwv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pmulhrwv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:849 */ { "sse2_umulv1siv1di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_umulv1siv1di3 }, &operand_data[11092], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:879 */ { "mmx_smaxv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_smaxv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:879 */ { "mmx_sminv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_sminv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:898 */ { "mmx_umaxv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_umaxv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:898 */ { "mmx_uminv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_uminv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:951 */ { "mmx_eqv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_eqv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:951 */ { "mmx_eqv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_eqv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:951 */ { "mmx_eqv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_eqv2si3 }, &operand_data[11083], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:995 */ { "mmx_andv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_andv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:995 */ { "mmx_iorv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_iorv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:995 */ { "mmx_xorv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_xorv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:995 */ { "mmx_andv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_andv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:995 */ { "mmx_iorv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_iorv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:995 */ { "mmx_xorv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_xorv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:995 */ { "mmx_andv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_andv2si3 }, &operand_data[11083], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:995 */ { "mmx_iorv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_iorv2si3 }, &operand_data[11083], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:995 */ { "mmx_xorv2si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_xorv2si3 }, &operand_data[11083], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1137 */ { "mmx_pinsrw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pinsrw }, &operand_data[11095], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1183 */ { "mmx_pshufw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_pshufw }, &operand_data[11099], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1264 */ { "vec_setv2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv2si }, &operand_data[11102], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1277 */ { "vec_setv2si+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11105], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1314 */ { "vec_extractv2si-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11107], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1337 */ { "vec_extractv2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv2si }, &operand_data[11109], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1348 */ { "vec_initv2si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv2si }, &operand_data[11112], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1357 */ { "vec_setv4hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv4hi }, &operand_data[11114], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1368 */ { "vec_extractv4hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv4hi }, &operand_data[11117], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1379 */ { "vec_initv4hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv4hi }, &operand_data[11120], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1388 */ { "vec_setv8qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv8qi }, &operand_data[11122], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1399 */ { "vec_extractv8qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv8qi }, &operand_data[11125], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1410 */ { "vec_initv8qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv8qi }, &operand_data[11128], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1425 */ { "mmx_uavgv8qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_uavgv8qi3 }, &operand_data[11077], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1477 */ { "mmx_uavgv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_uavgv4hi3 }, &operand_data[11080], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1531 */ { "mmx_maskmovq", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_maskmovq }, &operand_data[11130], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1551 */ { "mmx_emms", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_emms }, &operand_data[0], 0, 0, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/mmx.md:1584 */ { "mmx_femms", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mmx_femms }, &operand_data[0], 0, 0, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv64qi }, &operand_data[11133], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv32qi }, &operand_data[11135], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv16qi }, &operand_data[11137], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv32hi }, &operand_data[11139], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv16hi }, &operand_data[11141], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv8hi }, &operand_data[11143], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv16si }, &operand_data[11145], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv8si }, &operand_data[11147], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv4si }, &operand_data[11149], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv8di }, &operand_data[11151], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv4di }, &operand_data[11153], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv2di }, &operand_data[11155], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv4ti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv4ti }, &operand_data[11157], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv2ti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv2ti }, &operand_data[11159], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv1ti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv1ti }, &operand_data[11161], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv16sf }, &operand_data[11163], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv8sf }, &operand_data[11165], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv4sf }, &operand_data[11167], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv8df }, &operand_data[11169], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv4df }, &operand_data[11171], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:788 */ { "movv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movv2df }, &operand_data[11173], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1066 */ { "movv2df+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11175], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1097 */ { "movv2df+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11178], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1111 */ { "movmisalignv64qi-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11180], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv64qi }, &operand_data[11133], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv32qi }, &operand_data[11135], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv16qi }, &operand_data[11137], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv32hi }, &operand_data[11139], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv16hi }, &operand_data[11141], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv8hi }, &operand_data[11143], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv16si }, &operand_data[11145], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv8si }, &operand_data[11147], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv4si }, &operand_data[11149], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv8di }, &operand_data[11151], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv4di }, &operand_data[11153], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv2di }, &operand_data[11155], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv4ti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv4ti }, &operand_data[11157], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv2ti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv2ti }, &operand_data[11159], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv1ti", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv1ti }, &operand_data[11161], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv16sf }, &operand_data[11163], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv8sf }, &operand_data[11165], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv4sf }, &operand_data[11167], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv8df }, &operand_data[11169], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv4df }, &operand_data[11171], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1121 */ { "movmisalignv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_movmisalignv2df }, &operand_data[11173], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "avx512f_loadups512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loadups512 }, &operand_data[11182], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "avx512f_loadups512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loadups512_mask }, &operand_data[11182], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "avx_loadups256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_loadups256 }, &operand_data[11186], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "avx_loadups256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_loadups256_mask }, &operand_data[11186], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "sse_loadups", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_loadups }, &operand_data[11190], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "sse_loadups_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_loadups_mask }, &operand_data[11190], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "avx512f_loadupd512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loadupd512 }, &operand_data[11194], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "avx512f_loadupd512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loadupd512_mask }, &operand_data[11194], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "avx_loadupd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_loadupd256 }, &operand_data[11198], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "avx_loadupd256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_loadupd256_mask }, &operand_data[11198], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "sse2_loadupd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loadupd }, &operand_data[11202], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1130 */ { "sse2_loadupd_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loadupd_mask }, &operand_data[11202], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1250 */ { "avx_loaddquv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_loaddquv32qi }, &operand_data[11206], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1250 */ { "avx_loaddquv32qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_loaddquv32qi_mask }, &operand_data[11206], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1250 */ { "sse2_loaddquv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loaddquv16qi }, &operand_data[11210], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1250 */ { "sse2_loaddquv16qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loaddquv16qi_mask }, &operand_data[11210], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1270 */ { "avx512f_loaddquv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loaddquv64qi }, &operand_data[11214], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1270 */ { "avx512f_loaddquv64qi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loaddquv64qi_mask }, &operand_data[11214], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1270 */ { "avx512bw_loaddquv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_loaddquv32hi }, &operand_data[11218], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1270 */ { "avx512bw_loaddquv32hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_loaddquv32hi_mask }, &operand_data[11218], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1270 */ { "avx512vl_loaddquv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loaddquv8hi }, &operand_data[11222], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1270 */ { "avx512vl_loaddquv8hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loaddquv8hi_mask }, &operand_data[11222], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1270 */ { "avx512vl_loaddquv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loaddquv16hi }, &operand_data[11226], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1270 */ { "avx512vl_loaddquv16hi_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loaddquv16hi_mask }, &operand_data[11226], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "avx512f_loaddquv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loaddquv16si }, &operand_data[11230], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "avx512f_loaddquv16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loaddquv16si_mask }, &operand_data[11230], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "avx_loaddquv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_loaddquv8si }, &operand_data[11234], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "avx_loaddquv8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_loaddquv8si_mask }, &operand_data[11234], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "sse2_loaddquv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loaddquv4si }, &operand_data[11238], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "sse2_loaddquv4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loaddquv4si_mask }, &operand_data[11238], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "avx512f_loaddquv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loaddquv8di }, &operand_data[11242], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "avx512f_loaddquv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_loaddquv8di_mask }, &operand_data[11242], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "avx512vl_loaddquv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loaddquv4di }, &operand_data[11246], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "avx512vl_loaddquv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loaddquv4di_mask }, &operand_data[11246], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "avx512vl_loaddquv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loaddquv2di }, &operand_data[11250], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1289 */ { "avx512vl_loaddquv2di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_loaddquv2di_mask }, &operand_data[11250], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentsi }, &operand_data[9812], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentsf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentsf }, &operand_data[11254], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentdf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentdf }, &operand_data[11256], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentv8di }, &operand_data[11258], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentv4di }, &operand_data[11260], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentv2di }, &operand_data[11262], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentv16sf }, &operand_data[11264], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentv8sf }, &operand_data[11266], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentv4sf }, &operand_data[11268], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentv8df }, &operand_data[11270], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentv4df }, &operand_data[11272], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1543 */ { "storentv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_storentv2df }, &operand_data[11274], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "absv16sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv16sf2 }, &operand_data[11276], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "negv16sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv16sf2 }, &operand_data[11276], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "absv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv8sf2 }, &operand_data[11278], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "negv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv8sf2 }, &operand_data[11278], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "absv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv4sf2 }, &operand_data[11280], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "negv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv4sf2 }, &operand_data[11280], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "absv8df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv8df2 }, &operand_data[11282], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "negv8df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv8df2 }, &operand_data[11282], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "absv4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv4df2 }, &operand_data[11284], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "negv4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv4df2 }, &operand_data[11284], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "absv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv2df2 }, &operand_data[11286], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1556 */ { "negv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv2df2 }, &operand_data[11286], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "negv2df2+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11288], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "negv2df2+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11292], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "negv2df2+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11296], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "addv16sf3-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11300], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "addv16sf3-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11304], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1563 */ { "addv16sf3-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11308], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv16sf3 }, &operand_data[11288], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv16sf3_round }, &operand_data[11312], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv16sf3_mask }, &operand_data[11316], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv16sf3_mask_round }, &operand_data[11321], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv16sf3 }, &operand_data[11288], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv16sf3_round }, &operand_data[11312], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv16sf3_mask }, &operand_data[11316], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv16sf3_mask_round }, &operand_data[11321], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8sf3 }, &operand_data[11292], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8sf3_mask }, &operand_data[11327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8sf3 }, &operand_data[11292], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8sf3_mask }, &operand_data[11327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv4sf3 }, &operand_data[11296], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv4sf3_mask }, &operand_data[11332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv4sf3 }, &operand_data[11296], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv4sf3_mask }, &operand_data[11332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8df3 }, &operand_data[11300], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8df3_round }, &operand_data[11337], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8df3_mask }, &operand_data[11341], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8df3_mask_round }, &operand_data[11346], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8df3 }, &operand_data[11300], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8df3_round }, &operand_data[11337], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8df3_mask }, &operand_data[11341], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8df3_mask_round }, &operand_data[11346], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv4df3 }, &operand_data[11304], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv4df3_mask }, &operand_data[11352], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv4df3 }, &operand_data[11304], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv4df3_mask }, &operand_data[11352], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv2df3 }, &operand_data[11308], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "addv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv2df3_mask }, &operand_data[11357], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv2df3 }, &operand_data[11308], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1601 */ { "subv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv2df3_mask }, &operand_data[11357], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv16sf3 }, &operand_data[11288], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv16sf3_round }, &operand_data[11312], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv16sf3_mask }, &operand_data[11316], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv16sf3_mask_round }, &operand_data[11321], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8sf3 }, &operand_data[11292], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8sf3_mask }, &operand_data[11327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv4sf3 }, &operand_data[11296], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv4sf3_mask }, &operand_data[11332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8df3 }, &operand_data[11300], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8df3_round }, &operand_data[11337], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8df3_mask }, &operand_data[11341], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8df3_mask_round }, &operand_data[11346], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv4df3 }, &operand_data[11304], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv4df3_mask }, &operand_data[11352], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv2df3 }, &operand_data[11308], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1640 */ { "mulv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv2df3_mask }, &operand_data[11357], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1681 */ { "divv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divv8df3 }, &operand_data[11362], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1681 */ { "divv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divv4df3 }, &operand_data[11365], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1681 */ { "divv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divv2df3 }, &operand_data[11368], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1688 */ { "divv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divv16sf3 }, &operand_data[11371], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1688 */ { "divv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divv8sf3 }, &operand_data[11374], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1688 */ { "divv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_divv4sf3 }, &operand_data[11377], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1777 */ { "sqrtv8df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrtv8df2 }, &operand_data[11194], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1777 */ { "sqrtv4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrtv4df2 }, &operand_data[11198], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1777 */ { "sqrtv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrtv2df2 }, &operand_data[11202], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1782 */ { "sqrtv16sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrtv16sf2 }, &operand_data[11182], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1782 */ { "sqrtv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrtv8sf2 }, &operand_data[11186], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1782 */ { "sqrtv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sqrtv4sf2 }, &operand_data[11190], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1827 */ { "rsqrtv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrtv8sf2 }, &operand_data[11186], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1827 */ { "rsqrtv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rsqrtv4sf2 }, &operand_data[11190], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv16sf3 }, &operand_data[11288], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv16sf3_round }, &operand_data[11380], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv16sf3_mask }, &operand_data[11316], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv16sf3_mask_round }, &operand_data[11384], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv16sf3 }, &operand_data[11288], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv16sf3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv16sf3_round }, &operand_data[11380], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv16sf3_mask }, &operand_data[11316], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv16sf3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv16sf3_mask_round }, &operand_data[11384], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8sf3 }, &operand_data[11292], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8sf3_mask }, &operand_data[11327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8sf3 }, &operand_data[11292], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8sf3_mask }, &operand_data[11327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv4sf3 }, &operand_data[11296], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv4sf3_mask }, &operand_data[11332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv4sf3 }, &operand_data[11296], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv4sf3_mask }, &operand_data[11332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8df3 }, &operand_data[11300], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8df3_round }, &operand_data[11390], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8df3_mask }, &operand_data[11341], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8df3_mask_round }, &operand_data[11394], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8df3 }, &operand_data[11300], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv8df3_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8df3_round }, &operand_data[11390], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8df3_mask }, &operand_data[11341], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv8df3_mask_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8df3_mask_round }, &operand_data[11394], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv4df3 }, &operand_data[11304], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv4df3_mask }, &operand_data[11352], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv4df3 }, &operand_data[11304], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv4df3_mask }, &operand_data[11352], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv2df3 }, &operand_data[11308], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "smaxv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv2df3_mask }, &operand_data[11357], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv2df3 }, &operand_data[11308], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:1893 */ { "sminv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv2df3_mask }, &operand_data[11357], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2083 */ { "sse3_haddv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse3_haddv2df3 }, &operand_data[11368], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2260 */ { "reduc_splus_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_splus_v8df }, &operand_data[11282], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2269 */ { "reduc_splus_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_splus_v4df }, &operand_data[11284], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2282 */ { "reduc_splus_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_splus_v2df }, &operand_data[11286], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2291 */ { "reduc_splus_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_splus_v16sf }, &operand_data[11276], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2300 */ { "reduc_splus_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_splus_v8sf }, &operand_data[11278], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2314 */ { "reduc_splus_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_splus_v4sf }, &operand_data[11280], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v32qi }, &operand_data[11400], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v32qi }, &operand_data[11400], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v16hi }, &operand_data[11402], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v16hi }, &operand_data[11402], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v8si }, &operand_data[11404], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v8si }, &operand_data[11404], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v4di }, &operand_data[11406], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v4di }, &operand_data[11406], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v8sf }, &operand_data[11278], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v8sf }, &operand_data[11278], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v4df }, &operand_data[11284], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v4df }, &operand_data[11284], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v4sf }, &operand_data[11280], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v4sf }, &operand_data[11280], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v64qi }, &operand_data[11408], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v64qi }, &operand_data[11408], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v32hi }, &operand_data[11410], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v32hi }, &operand_data[11410], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v16si }, &operand_data[11412], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v16si }, &operand_data[11412], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v8di }, &operand_data[11414], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v8di }, &operand_data[11414], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v16sf }, &operand_data[11276], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v16sf }, &operand_data[11276], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smax_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smax_v8df }, &operand_data[11282], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2340 */ { "reduc_smin_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_smin_v8df }, &operand_data[11282], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2350 */ { "reduc_umax_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umax_v16si }, &operand_data[11412], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2350 */ { "reduc_umin_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umin_v16si }, &operand_data[11412], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2350 */ { "reduc_umax_v8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umax_v8di }, &operand_data[11414], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2350 */ { "reduc_umin_v8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umin_v8di }, &operand_data[11414], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2350 */ { "reduc_umax_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umax_v32hi }, &operand_data[11410], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2350 */ { "reduc_umin_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umin_v32hi }, &operand_data[11410], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2350 */ { "reduc_umax_v64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umax_v64qi }, &operand_data[11408], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2350 */ { "reduc_umin_v64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umin_v64qi }, &operand_data[11408], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2360 */ { "reduc_umax_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umax_v32qi }, &operand_data[11400], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2360 */ { "reduc_umin_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umin_v32qi }, &operand_data[11400], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2360 */ { "reduc_umax_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umax_v16hi }, &operand_data[11402], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2360 */ { "reduc_umin_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umin_v16hi }, &operand_data[11402], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2360 */ { "reduc_umax_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umax_v8si }, &operand_data[11404], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2360 */ { "reduc_umin_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umin_v8si }, &operand_data[11404], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2360 */ { "reduc_umax_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umax_v4di }, &operand_data[11406], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2360 */ { "reduc_umin_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umin_v4di }, &operand_data[11406], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2370 */ { "reduc_umin_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_reduc_umin_v8hi }, &operand_data[11416], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv64qiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv64qiv16sf }, &operand_data[11418], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv32hiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32hiv16sf }, &operand_data[11424], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv16siv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16siv16sf }, &operand_data[11430], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv8div16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8div16sf }, &operand_data[11436], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv16sfv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16sfv16sf }, &operand_data[11442], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv8dfv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8dfv16sf }, &operand_data[11448], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv64qiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv64qiv8df }, &operand_data[11454], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv32hiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32hiv8df }, &operand_data[11460], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv16siv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16siv8df }, &operand_data[11466], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv8div8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8div8df }, &operand_data[11472], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv16sfv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16sfv8df }, &operand_data[11478], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2647 */ { "vcondv8dfv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8dfv8df }, &operand_data[11484], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv32qiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32qiv8sf }, &operand_data[11490], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv32qiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32qiv4df }, &operand_data[11496], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv16hiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16hiv8sf }, &operand_data[11502], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv16hiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16hiv4df }, &operand_data[11508], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv8siv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8siv8sf }, &operand_data[11514], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv8siv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8siv4df }, &operand_data[11520], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv4div8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4div8sf }, &operand_data[11526], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv4div4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4div4df }, &operand_data[11532], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv8sfv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8sfv8sf }, &operand_data[11538], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv8sfv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8sfv4df }, &operand_data[11544], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv4dfv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4dfv8sf }, &operand_data[11550], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2664 */ { "vcondv4dfv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4dfv4df }, &operand_data[11556], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv16qiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16qiv4sf }, &operand_data[11562], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv16qiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16qiv2df }, &operand_data[11568], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv8hiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8hiv4sf }, &operand_data[11574], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv8hiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8hiv2df }, &operand_data[11580], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv4siv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4siv4sf }, &operand_data[11586], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv4siv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4siv2df }, &operand_data[11592], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv2div4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2div4sf }, &operand_data[11598], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv2div2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2div2df }, &operand_data[11604], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv4sfv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4sfv4sf }, &operand_data[11610], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv4sfv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4sfv2df }, &operand_data[11616], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv2dfv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2dfv4sf }, &operand_data[11622], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2681 */ { "vcondv2dfv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2dfv2df }, &operand_data[11628], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "andv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv8sf3 }, &operand_data[11292], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "andv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv8sf3_mask }, &operand_data[11327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "iorv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv8sf3 }, &operand_data[11292], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "iorv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv8sf3_mask }, &operand_data[11327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "xorv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv8sf3 }, &operand_data[11292], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "xorv8sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv8sf3_mask }, &operand_data[11327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "andv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv4sf3 }, &operand_data[11296], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "andv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv4sf3_mask }, &operand_data[11332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "iorv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv4sf3 }, &operand_data[11296], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "iorv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv4sf3_mask }, &operand_data[11332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "xorv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv4sf3 }, &operand_data[11296], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "xorv4sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv4sf3_mask }, &operand_data[11332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "andv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv4df3 }, &operand_data[11304], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "andv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv4df3_mask }, &operand_data[11352], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "iorv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv4df3 }, &operand_data[11304], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "iorv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv4df3_mask }, &operand_data[11352], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "xorv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv4df3 }, &operand_data[11304], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "xorv4df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv4df3_mask }, &operand_data[11352], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "andv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv2df3 }, &operand_data[11308], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "andv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv2df3_mask }, &operand_data[11357], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "iorv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv2df3 }, &operand_data[11308], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "iorv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv2df3_mask }, &operand_data[11357], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "xorv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv2df3 }, &operand_data[11308], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2794 */ { "xorv2df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv2df3_mask }, &operand_data[11357], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "andv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv16sf3 }, &operand_data[11288], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "andv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv16sf3_mask }, &operand_data[11316], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "iorv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv16sf3 }, &operand_data[11288], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "iorv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv16sf3_mask }, &operand_data[11316], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "xorv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv16sf3 }, &operand_data[11288], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "xorv16sf3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv16sf3_mask }, &operand_data[11316], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "andv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv8df3 }, &operand_data[11300], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "andv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv8df3_mask }, &operand_data[11341], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "iorv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv8df3 }, &operand_data[11300], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "iorv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv8df3_mask }, &operand_data[11341], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "xorv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv8df3 }, &operand_data[11300], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2802 */ { "xorv8df3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv8df3_mask }, &operand_data[11341], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2898 */ { "copysignv16sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysignv16sf3 }, &operand_data[11288], 3, 3, 6, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2898 */ { "copysignv8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysignv8sf3 }, &operand_data[11292], 3, 3, 6, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2898 */ { "copysignv4sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysignv4sf3 }, &operand_data[11296], 3, 3, 6, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2898 */ { "copysignv8df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysignv8df3 }, &operand_data[11300], 3, 3, 6, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2898 */ { "copysignv4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysignv4df3 }, &operand_data[11304], 3, 3, 6, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:2898 */ { "copysignv2df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_copysignv2df3 }, &operand_data[11308], 3, 3, 6, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3051 */ { "andtf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andtf3 }, &operand_data[11634], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3051 */ { "iortf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iortf3 }, &operand_data[11634], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3051 */ { "xortf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xortf3 }, &operand_data[11634], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3132 */ { "fmasf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmasf4 }, &operand_data[11637], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3132 */ { "fmadf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmadf4 }, &operand_data[11641], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3132 */ { "fmav4sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmav4sf4 }, &operand_data[11645], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3132 */ { "fmav2df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmav2df4 }, &operand_data[11649], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3132 */ { "fmav8sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmav8sf4 }, &operand_data[11653], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3132 */ { "fmav4df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmav4df4 }, &operand_data[11657], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3132 */ { "fmav16sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmav16sf4 }, &operand_data[11661], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3132 */ { "fmav8df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmav8df4 }, &operand_data[11665], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3139 */ { "fmssf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmssf4 }, &operand_data[11637], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3139 */ { "fmsdf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmsdf4 }, &operand_data[11641], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3139 */ { "fmsv4sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmsv4sf4 }, &operand_data[11645], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3139 */ { "fmsv2df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmsv2df4 }, &operand_data[11649], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3139 */ { "fmsv8sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmsv8sf4 }, &operand_data[11653], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3139 */ { "fmsv4df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmsv4df4 }, &operand_data[11657], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3139 */ { "fmsv16sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmsv16sf4 }, &operand_data[11661], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3139 */ { "fmsv8df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmsv8df4 }, &operand_data[11665], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3146 */ { "fnmasf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmasf4 }, &operand_data[11637], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3146 */ { "fnmadf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmadf4 }, &operand_data[11641], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3146 */ { "fnmav4sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmav4sf4 }, &operand_data[11645], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3146 */ { "fnmav2df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmav2df4 }, &operand_data[11649], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3146 */ { "fnmav8sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmav8sf4 }, &operand_data[11653], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3146 */ { "fnmav4df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmav4df4 }, &operand_data[11657], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3146 */ { "fnmav16sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmav16sf4 }, &operand_data[11661], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3146 */ { "fnmav8df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmav8df4 }, &operand_data[11665], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3153 */ { "fnmssf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmssf4 }, &operand_data[11637], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3153 */ { "fnmsdf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmsdf4 }, &operand_data[11641], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3153 */ { "fnmsv4sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmsv4sf4 }, &operand_data[11645], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3153 */ { "fnmsv2df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmsv2df4 }, &operand_data[11649], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3153 */ { "fnmsv8sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmsv8sf4 }, &operand_data[11653], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3153 */ { "fnmsv4df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmsv4df4 }, &operand_data[11657], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3153 */ { "fnmsv16sf4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmsv16sf4 }, &operand_data[11661], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3153 */ { "fnmsv8df4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fnmsv8df4 }, &operand_data[11665], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3174 */ { "fma4i_fmadd_sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma4i_fmadd_sf }, &operand_data[11637], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3174 */ { "fma4i_fmadd_df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma4i_fmadd_df }, &operand_data[11641], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3174 */ { "fma4i_fmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma4i_fmadd_v4sf }, &operand_data[11645], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3174 */ { "fma4i_fmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma4i_fmadd_v2df }, &operand_data[11649], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3174 */ { "fma4i_fmadd_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma4i_fmadd_v8sf }, &operand_data[11653], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3174 */ { "fma4i_fmadd_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma4i_fmadd_v4df }, &operand_data[11657], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3174 */ { "fma4i_fmadd_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma4i_fmadd_v16sf }, &operand_data[11661], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3174 */ { "fma4i_fmadd_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma4i_fmadd_v8df }, &operand_data[11665], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512f_fmadd_v16sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v16sf_maskz }, &operand_data[11669], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512f_fmadd_v16sf_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v16sf_maskz_round }, &operand_data[11674], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512vl_fmadd_v8sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v8sf_maskz }, &operand_data[11680], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512vl_fmadd_v8sf_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v8sf_maskz_round }, &operand_data[11685], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512vl_fmadd_v4sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v4sf_maskz }, &operand_data[11691], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512vl_fmadd_v4sf_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v4sf_maskz_round }, &operand_data[11696], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512f_fmadd_v8df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v8df_maskz }, &operand_data[11702], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512f_fmadd_v8df_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmadd_v8df_maskz_round }, &operand_data[11707], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512vl_fmadd_v4df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v4df_maskz }, &operand_data[11713], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512vl_fmadd_v4df_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v4df_maskz_round }, &operand_data[11718], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512vl_fmadd_v2df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v2df_maskz }, &operand_data[11724], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3181 */ { "avx512vl_fmadd_v2df_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmadd_v2df_maskz_round }, &operand_data[11729], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3479 */ { "fmaddsub_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmaddsub_v16sf }, &operand_data[11661], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3479 */ { "fmaddsub_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmaddsub_v8sf }, &operand_data[11653], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3479 */ { "fmaddsub_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmaddsub_v4sf }, &operand_data[11645], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3479 */ { "fmaddsub_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmaddsub_v8df }, &operand_data[11665], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3479 */ { "fmaddsub_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmaddsub_v4df }, &operand_data[11657], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3479 */ { "fmaddsub_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmaddsub_v2df }, &operand_data[11649], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512f_fmaddsub_v16sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v16sf_maskz }, &operand_data[11669], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512f_fmaddsub_v16sf_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v16sf_maskz_round }, &operand_data[11674], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512vl_fmaddsub_v8sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v8sf_maskz }, &operand_data[11680], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512vl_fmaddsub_v8sf_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v8sf_maskz_round }, &operand_data[11685], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512vl_fmaddsub_v4sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4sf_maskz }, &operand_data[11691], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512vl_fmaddsub_v4sf_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4sf_maskz_round }, &operand_data[11696], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512f_fmaddsub_v8df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v8df_maskz }, &operand_data[11702], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512f_fmaddsub_v8df_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fmaddsub_v8df_maskz_round }, &operand_data[11707], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512vl_fmaddsub_v4df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4df_maskz }, &operand_data[11713], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512vl_fmaddsub_v4df_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v4df_maskz_round }, &operand_data[11718], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512vl_fmaddsub_v2df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v2df_maskz }, &operand_data[11724], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3488 */ { "avx512vl_fmaddsub_v2df_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fmaddsub_v2df_maskz_round }, &operand_data[11729], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3643 */ { "fmai_vmfmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmai_vmfmadd_v4sf }, &operand_data[11645], 4, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3643 */ { "fmai_vmfmadd_v4sf_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmai_vmfmadd_v4sf_round }, &operand_data[11735], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3643 */ { "fmai_vmfmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmai_vmfmadd_v2df }, &operand_data[11649], 4, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3643 */ { "fmai_vmfmadd_v2df_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fmai_vmfmadd_v2df_round }, &operand_data[11740], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3725 */ { "fma4i_vmfmadd_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma4i_vmfmadd_v4sf }, &operand_data[11645], 4, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:3725 */ { "fma4i_vmfmadd_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fma4i_vmfmadd_v2df }, &operand_data[11649], 4, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4023 */ { "floatunsv16siv16sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatunsv16siv16sf2 }, &operand_data[11745], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4023 */ { "floatunsv8siv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatunsv8siv8sf2 }, &operand_data[11747], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4023 */ { "floatunsv4siv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_floatunsv4siv4sf2 }, &operand_data[11749], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4172 */ { "fixuns_truncv16sfv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fixuns_truncv16sfv16si2 }, &operand_data[11751], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4172 */ { "fixuns_truncv8sfv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fixuns_truncv8sfv8si2 }, &operand_data[11753], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4172 */ { "fixuns_truncv4sfv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_fixuns_truncv4sfv4si2 }, &operand_data[11755], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4628 */ { "avx_cvtpd2dq256_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cvtpd2dq256_2 }, &operand_data[11757], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4803 */ { "avx_cvttpd2dq256_2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_cvttpd2dq256_2 }, &operand_data[11757], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4896 */ { "sse2_cvtpd2ps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtpd2ps }, &operand_data[11759], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:4905 */ { "sse2_cvtpd2ps_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_cvtpd2ps_mask }, &operand_data[11759], 4, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5000 */ { "avx512bw_cvtmask2bv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_cvtmask2bv64qi }, &operand_data[11763], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5000 */ { "avx512vl_cvtmask2bv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtmask2bv16qi }, &operand_data[11765], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5000 */ { "avx512vl_cvtmask2bv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtmask2bv32qi }, &operand_data[11767], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5000 */ { "avx512bw_cvtmask2wv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_cvtmask2wv32hi }, &operand_data[11769], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5000 */ { "avx512vl_cvtmask2wv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtmask2wv16hi }, &operand_data[11771], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5000 */ { "avx512vl_cvtmask2wv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtmask2wv8hi }, &operand_data[11773], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5023 */ { "avx512f_cvtmask2dv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtmask2dv16si }, &operand_data[11775], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5023 */ { "avx512vl_cvtmask2dv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtmask2dv8si }, &operand_data[11777], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5023 */ { "avx512vl_cvtmask2dv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtmask2dv4si }, &operand_data[11779], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5023 */ { "avx512f_cvtmask2qv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_cvtmask2qv8di }, &operand_data[11781], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5023 */ { "avx512vl_cvtmask2qv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtmask2qv4di }, &operand_data[11783], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5023 */ { "avx512vl_cvtmask2qv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_cvtmask2qv2di }, &operand_data[11785], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5062 */ { "vec_unpacks_hi_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v4sf }, &operand_data[11787], 2, 2, 3, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5078 */ { "vec_unpacks_hi_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v8sf }, &operand_data[11789], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5090 */ { "vec_unpacks_hi_v16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v16sf }, &operand_data[11791], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5104 */ { "vec_unpacks_lo_v4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v4sf }, &operand_data[11787], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5112 */ { "vec_unpacks_lo_v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v8sf }, &operand_data[11793], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5125 */ { "vec_unpacks_float_hi_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_hi_v32hi }, &operand_data[11795], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5125 */ { "vec_unpacks_float_hi_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_hi_v16hi }, &operand_data[11797], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5125 */ { "vec_unpacks_float_hi_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_hi_v8hi }, &operand_data[11799], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5138 */ { "vec_unpacks_float_lo_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_lo_v32hi }, &operand_data[11795], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5138 */ { "vec_unpacks_float_lo_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_lo_v16hi }, &operand_data[11797], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5138 */ { "vec_unpacks_float_lo_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_lo_v8hi }, &operand_data[11799], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5151 */ { "vec_unpacku_float_hi_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_hi_v32hi }, &operand_data[11795], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5151 */ { "vec_unpacku_float_hi_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_hi_v16hi }, &operand_data[11797], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5151 */ { "vec_unpacku_float_hi_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_hi_v8hi }, &operand_data[11799], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5164 */ { "vec_unpacku_float_lo_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_lo_v32hi }, &operand_data[11795], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5164 */ { "vec_unpacku_float_lo_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_lo_v16hi }, &operand_data[11797], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5164 */ { "vec_unpacku_float_lo_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_lo_v8hi }, &operand_data[11799], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5177 */ { "vec_unpacks_float_hi_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_hi_v4si }, &operand_data[11801], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5191 */ { "vec_unpacks_float_lo_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_lo_v4si }, &operand_data[11801], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5199 */ { "vec_unpacks_float_hi_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_hi_v8si }, &operand_data[11803], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5211 */ { "vec_unpacks_float_lo_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_lo_v8si }, &operand_data[11803], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5220 */ { "vec_unpacks_float_hi_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_hi_v16si }, &operand_data[11805], 2, 2, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5234 */ { "vec_unpacks_float_lo_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_float_lo_v16si }, &operand_data[11805], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5245 */ { "vec_unpacku_float_hi_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_hi_v4si }, &operand_data[11801], 2, 2, 11, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5281 */ { "vec_unpacku_float_lo_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_lo_v4si }, &operand_data[11801], 2, 2, 9, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5310 */ { "vec_unpacku_float_hi_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_hi_v8si }, &operand_data[11807], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5337 */ { "vec_unpacku_float_hi_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_hi_v16si }, &operand_data[11809], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5363 */ { "vec_unpacku_float_lo_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_lo_v8si }, &operand_data[11803], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5388 */ { "vec_unpacku_float_lo_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_float_lo_v16si }, &operand_data[11805], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5412 */ { "vec_pack_trunc_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v8df }, &operand_data[11811], 3, 3, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5412 */ { "vec_pack_trunc_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v4df }, &operand_data[11814], 3, 3, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5429 */ { "vec_pack_trunc_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v2df }, &operand_data[11817], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5457 */ { "vec_pack_sfix_trunc_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_sfix_trunc_v8df }, &operand_data[11820], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5474 */ { "vec_pack_sfix_trunc_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_sfix_trunc_v4df }, &operand_data[11823], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5491 */ { "vec_pack_sfix_trunc_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_sfix_trunc_v2df }, &operand_data[11826], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5526 */ { "vec_pack_ufix_trunc_v8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_ufix_trunc_v8df }, &operand_data[11829], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5526 */ { "vec_pack_ufix_trunc_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_ufix_trunc_v4df }, &operand_data[11832], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5526 */ { "vec_pack_ufix_trunc_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_ufix_trunc_v2df }, &operand_data[11835], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5571 */ { "vec_pack_sfix_v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_sfix_v4df }, &operand_data[11823], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5588 */ { "vec_pack_sfix_v2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_sfix_v2df }, &operand_data[11826], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5626 */ { "sse_movhlps_exp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_movhlps_exp }, &operand_data[11646], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5672 */ { "sse_movlhps_exp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_movlhps_exp }, &operand_data[11646], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5755 */ { "vec_interleave_highv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv8sf }, &operand_data[11838], 3, 3, 6, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:5860 */ { "vec_interleave_lowv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv8sf }, &operand_data[11838], 3, 3, 6, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6019 */ { "avx_shufps256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_shufps256 }, &operand_data[11841], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6019 */ { "avx_shufps256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_shufps256_mask }, &operand_data[11841], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6078 */ { "sse_shufps", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_shufps }, &operand_data[11847], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6078 */ { "sse_shufps_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_shufps_mask }, &operand_data[11847], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6176 */ { "sse_loadhps_exp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_loadhps_exp }, &operand_data[11853], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6230 */ { "sse_loadlps_exp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_loadlps_exp }, &operand_data[11853], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6381 */ { "vec_initv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv16qi }, &operand_data[11856], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6381 */ { "vec_initv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv8hi }, &operand_data[11858], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6381 */ { "vec_initv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv4si }, &operand_data[11860], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6381 */ { "vec_initv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv2di }, &operand_data[11862], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6381 */ { "vec_initv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv4sf }, &operand_data[11864], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6381 */ { "vec_initv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv2df }, &operand_data[11866], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6498 */ { "vec_initv2df+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11868], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6498 */ { "vec_setv32qi-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11870], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv32qi }, &operand_data[11872], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv16qi }, &operand_data[11875], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv16hi }, &operand_data[11878], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv8hi }, &operand_data[11881], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv16si }, &operand_data[11884], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv8si }, &operand_data[11887], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv4si }, &operand_data[11890], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv8di }, &operand_data[11893], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv4di }, &operand_data[11896], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv2di }, &operand_data[11899], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv16sf }, &operand_data[11902], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv8sf }, &operand_data[11905], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv4sf }, &operand_data[11908], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv8df }, &operand_data[11911], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv4df }, &operand_data[11914], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6509 */ { "vec_setv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_setv2df }, &operand_data[11917], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6520 */ { "vec_setv2df+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[9888], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6536 */ { "vec_setv2df+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11920], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6577 */ { "avx512dq_vextractf64x2_mask-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11923], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6599 */ { "avx512dq_vextractf64x2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vextractf64x2_mask }, &operand_data[11926], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6599 */ { "avx512dq_vextracti64x2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vextracti64x2_mask }, &operand_data[11931], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6599 */ { "avx512f_vextractf32x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vextractf32x4_mask }, &operand_data[11936], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6599 */ { "avx512f_vextracti32x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vextracti32x4_mask }, &operand_data[11941], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6725 */ { "avx512dq_vextractf32x8_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vextractf32x8_mask }, &operand_data[11946], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6725 */ { "avx512dq_vextracti32x8_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vextracti32x8_mask }, &operand_data[11951], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6725 */ { "avx512f_vextractf64x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vextractf64x4_mask }, &operand_data[11956], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6725 */ { "avx512f_vextracti64x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vextracti64x4_mask }, &operand_data[11961], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6754 */ { "avx512f_vextracti64x4_mask+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11966], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6754 */ { "avx512vl_vextractf128v8si-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11968], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6882 */ { "avx512vl_vextractf128v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vextractf128v8si }, &operand_data[11970], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6882 */ { "avx512vl_vextractf128v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vextractf128v8sf }, &operand_data[11975], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6882 */ { "avx512vl_vextractf128v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vextractf128v4di }, &operand_data[11980], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6882 */ { "avx512vl_vextractf128v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vextractf128v4df }, &operand_data[11985], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6911 */ { "avx_vextractf128v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vextractf128v32qi }, &operand_data[11990], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6911 */ { "avx_vextractf128v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vextractf128v16hi }, &operand_data[11993], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6911 */ { "avx_vextractf128v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vextractf128v8si }, &operand_data[11970], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6911 */ { "avx_vextractf128v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vextractf128v4di }, &operand_data[11980], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6911 */ { "avx_vextractf128v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vextractf128v8sf }, &operand_data[11975], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6911 */ { "avx_vextractf128v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vextractf128v4df }, &operand_data[11985], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6953 */ { "avx_vextractf128v4df+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11996], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6953 */ { "avx_vextractf128v4df+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11998], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6995 */ { "avx_vextractf128v4df+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12000], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:6995 */ { "avx_vextractf128v4df+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12002], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7037 */ { "avx_vextractf128v4df+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12004], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7037 */ { "vec_extractv64qi-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12006], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7134 */ { "vec_extractv64qi-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12008], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7178 */ { "vec_extractv64qi-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12010], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7214 */ { "vec_extractv64qi-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12012], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7274 */ { "vec_extractv64qi-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12014], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv64qi }, &operand_data[12016], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv32qi }, &operand_data[12019], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv16qi }, &operand_data[12022], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv32hi }, &operand_data[12025], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv16hi }, &operand_data[12028], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv8hi }, &operand_data[12031], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv16si }, &operand_data[12034], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv8si }, &operand_data[12037], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv4si }, &operand_data[12040], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv8di }, &operand_data[12043], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv4di }, &operand_data[12046], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv2di }, &operand_data[12049], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv16sf }, &operand_data[12052], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv8sf }, &operand_data[12055], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv4sf }, &operand_data[12058], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv8df }, &operand_data[12061], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv4df }, &operand_data[12064], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7327 */ { "vec_extractv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_extractv2df }, &operand_data[12067], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7375 */ { "vec_interleave_highv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv4df }, &operand_data[12070], 3, 3, 6, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7420 */ { "vec_interleave_highv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv2df }, &operand_data[11308], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7457 */ { "avx512f_movddup512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_movddup512 }, &operand_data[11194], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7457 */ { "avx512f_movddup512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_movddup512_mask }, &operand_data[11194], 4, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7469 */ { "avx512f_unpcklpd512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_unpcklpd512 }, &operand_data[11362], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7469 */ { "avx512f_unpcklpd512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_unpcklpd512_mask }, &operand_data[12073], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7500 */ { "avx_movddup256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movddup256 }, &operand_data[11198], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7500 */ { "avx_movddup256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_movddup256_mask }, &operand_data[11198], 4, 4, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7510 */ { "avx_unpcklpd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_unpcklpd256 }, &operand_data[11365], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7510 */ { "avx_unpcklpd256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_unpcklpd256_mask }, &operand_data[12078], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7536 */ { "vec_interleave_lowv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv4df }, &operand_data[12070], 3, 3, 6, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7580 */ { "vec_interleave_lowv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv2df }, &operand_data[11308], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7617 */ { "vec_interleave_lowv2df+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11274], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7634 */ { "avx512f_vternlogv16si_maskz-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12083], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7673 */ { "avx512f_vternlogv16si_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vternlogv16si_maskz }, &operand_data[12087], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7673 */ { "avx512vl_vternlogv8si_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv8si_maskz }, &operand_data[12093], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7673 */ { "avx512vl_vternlogv4si_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv4si_maskz }, &operand_data[12099], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7673 */ { "avx512f_vternlogv8di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vternlogv8di_maskz }, &operand_data[12105], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7673 */ { "avx512vl_vternlogv4di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv4di_maskz }, &operand_data[12111], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7673 */ { "avx512vl_vternlogv2di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vternlogv2di_maskz }, &operand_data[12117], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7753 */ { "avx512f_shufps512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shufps512_mask }, &operand_data[12123], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512f_fixupimmv16sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv16sf_maskz }, &operand_data[12129], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512f_fixupimmv16sf_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv16sf_maskz_round }, &operand_data[12135], 7, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512vl_fixupimmv8sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv8sf_maskz }, &operand_data[12142], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512vl_fixupimmv8sf_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv8sf_maskz_round }, &operand_data[12148], 7, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512vl_fixupimmv4sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4sf_maskz }, &operand_data[12155], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512vl_fixupimmv4sf_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4sf_maskz_round }, &operand_data[12161], 7, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512f_fixupimmv8df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv8df_maskz }, &operand_data[12168], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512f_fixupimmv8df_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_fixupimmv8df_maskz_round }, &operand_data[12174], 7, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512vl_fixupimmv4df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4df_maskz }, &operand_data[12181], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512vl_fixupimmv4df_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv4df_maskz_round }, &operand_data[12187], 7, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512vl_fixupimmv2df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv2df_maskz }, &operand_data[12194], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7785 */ { "avx512vl_fixupimmv2df_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_fixupimmv2df_maskz_round }, &operand_data[12200], 7, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7830 */ { "avx512f_sfixupimmv4sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv4sf_maskz }, &operand_data[12155], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7830 */ { "avx512f_sfixupimmv4sf_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv4sf_maskz_round }, &operand_data[12161], 7, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7830 */ { "avx512f_sfixupimmv2df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv2df_maskz }, &operand_data[12194], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7830 */ { "avx512f_sfixupimmv2df_maskz_round", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_sfixupimmv2df_maskz_round }, &operand_data[12200], 7, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:7960 */ { "avx512f_shufpd512_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shufpd512_mask }, &operand_data[12207], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8017 */ { "avx_shufpd256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_shufpd256 }, &operand_data[12213], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8017 */ { "avx_shufpd256_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_shufpd256_mask }, &operand_data[12213], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8062 */ { "sse2_shufpd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_shufpd }, &operand_data[12219], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8062 */ { "sse2_shufpd_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_shufpd_mask }, &operand_data[12219], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8260 */ { "sse2_shufpd_mask+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12225], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8303 */ { "sse2_loadhpd_exp-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10276], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8331 */ { "sse2_loadhpd_exp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loadhpd_exp }, &operand_data[12227], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8379 */ { "sse2_loadhpd_exp+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12230], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8388 */ { "sse2_loadlpd_exp", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loadlpd_exp }, &operand_data[12227], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8449 */ { "sse2_loadlpd_exp+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[12230], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_ss_truncatev16siv16qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ss_truncatev16siv16qi2_mask_store }, &operand_data[12232], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_truncatev16siv16qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_truncatev16siv16qi2_mask_store }, &operand_data[12232], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_us_truncatev16siv16qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_us_truncatev16siv16qi2_mask_store }, &operand_data[12232], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_ss_truncatev16siv16hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ss_truncatev16siv16hi2_mask_store }, &operand_data[12235], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_truncatev16siv16hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_truncatev16siv16hi2_mask_store }, &operand_data[12235], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_us_truncatev16siv16hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_us_truncatev16siv16hi2_mask_store }, &operand_data[12235], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_ss_truncatev8div8si2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ss_truncatev8div8si2_mask_store }, &operand_data[12238], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_truncatev8div8si2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_truncatev8div8si2_mask_store }, &operand_data[12238], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_us_truncatev8div8si2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_us_truncatev8div8si2_mask_store }, &operand_data[12238], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_ss_truncatev8div8hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_ss_truncatev8div8hi2_mask_store }, &operand_data[12241], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_truncatev8div8hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_truncatev8div8hi2_mask_store }, &operand_data[12241], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8569 */ { "avx512f_us_truncatev8div8hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_us_truncatev8div8hi2_mask_store }, &operand_data[12241], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8603 */ { "avx512bw_ss_truncatev32hiv32qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ss_truncatev32hiv32qi2_mask_store }, &operand_data[12244], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8603 */ { "avx512bw_truncatev32hiv32qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_truncatev32hiv32qi2_mask_store }, &operand_data[12244], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8603 */ { "avx512bw_us_truncatev32hiv32qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_us_truncatev32hiv32qi2_mask_store }, &operand_data[12244], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8642 */ { "avx512vl_ss_truncatev4div4si2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev4div4si2_mask_store }, &operand_data[12247], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8642 */ { "avx512vl_truncatev4div4si2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev4div4si2_mask_store }, &operand_data[12247], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8642 */ { "avx512vl_us_truncatev4div4si2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev4div4si2_mask_store }, &operand_data[12247], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8642 */ { "avx512vl_ss_truncatev8siv8hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev8siv8hi2_mask_store }, &operand_data[12250], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8642 */ { "avx512vl_truncatev8siv8hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev8siv8hi2_mask_store }, &operand_data[12250], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8642 */ { "avx512vl_us_truncatev8siv8hi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev8siv8hi2_mask_store }, &operand_data[12250], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8642 */ { "avx512vl_ss_truncatev16hiv16qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_ss_truncatev16hiv16qi2_mask_store }, &operand_data[12253], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8642 */ { "avx512vl_truncatev16hiv16qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_truncatev16hiv16qi2_mask_store }, &operand_data[12253], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:8642 */ { "avx512vl_us_truncatev16hiv16qi2_mask_store", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_us_truncatev16hiv16qi2_mask_store }, &operand_data[12253], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv64qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv64qi2 }, &operand_data[11214], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv32qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv32qi2 }, &operand_data[11206], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv16qi2 }, &operand_data[11210], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv32hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv32hi2 }, &operand_data[11218], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv16hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv16hi2 }, &operand_data[11226], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv8hi2 }, &operand_data[11222], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv16si2 }, &operand_data[11230], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv8si2 }, &operand_data[11234], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv4si2 }, &operand_data[11238], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv8di2 }, &operand_data[11242], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv4di2 }, &operand_data[11246], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9167 */ { "negv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_negv2di2 }, &operand_data[11250], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv64qi3 }, &operand_data[12256], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv64qi3 }, &operand_data[12256], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv16si3 }, &operand_data[12274], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv16si3 }, &operand_data[12274], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8si3 }, &operand_data[12277], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8si3 }, &operand_data[12277], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv4si3 }, &operand_data[12280], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv4si3 }, &operand_data[12280], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8di3 }, &operand_data[12283], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8di3 }, &operand_data[12283], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv4di3 }, &operand_data[12286], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv4di3 }, &operand_data[12286], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "addv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv2di3 }, &operand_data[12289], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9175 */ { "subv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv2di3 }, &operand_data[12289], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "addv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv16si3_mask }, &operand_data[12292], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "subv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv16si3_mask }, &operand_data[12292], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "addv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8si3_mask }, &operand_data[12297], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "subv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8si3_mask }, &operand_data[12297], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "addv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv4si3_mask }, &operand_data[12302], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "subv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv4si3_mask }, &operand_data[12302], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "addv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8di3_mask }, &operand_data[12307], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "subv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8di3_mask }, &operand_data[12307], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "addv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv4di3_mask }, &operand_data[12312], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "subv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv4di3_mask }, &operand_data[12312], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "addv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv2di3_mask }, &operand_data[12317], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9183 */ { "subv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv2di3_mask }, &operand_data[12317], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "addv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv64qi3_mask }, &operand_data[12322], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "subv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv64qi3_mask }, &operand_data[12322], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "addv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv16qi3_mask }, &operand_data[12327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "subv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv16qi3_mask }, &operand_data[12327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "addv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv32qi3_mask }, &operand_data[12332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "subv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv32qi3_mask }, &operand_data[12332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "addv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv32hi3_mask }, &operand_data[12337], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "subv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv32hi3_mask }, &operand_data[12337], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "addv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv16hi3_mask }, &operand_data[12342], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "subv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv16hi3_mask }, &operand_data[12342], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "addv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_addv8hi3_mask }, &operand_data[12347], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9194 */ { "subv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_subv8hi3_mask }, &operand_data[12347], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_ssaddv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ssaddv64qi3 }, &operand_data[12256], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_ssaddv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ssaddv64qi3_mask }, &operand_data[12322], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_usaddv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_usaddv64qi3 }, &operand_data[12256], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_usaddv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_usaddv64qi3_mask }, &operand_data[12322], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_sssubv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_sssubv64qi3 }, &operand_data[12256], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_sssubv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_sssubv64qi3_mask }, &operand_data[12322], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_ussubv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ussubv64qi3 }, &operand_data[12256], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_ussubv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ussubv64qi3_mask }, &operand_data[12322], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_ssaddv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ssaddv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_ssaddv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ssaddv32qi3_mask }, &operand_data[12332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_usaddv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_usaddv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_usaddv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_usaddv32qi3_mask }, &operand_data[12332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_sssubv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sssubv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_sssubv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sssubv32qi3_mask }, &operand_data[12332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_ussubv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ussubv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_ussubv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ussubv32qi3_mask }, &operand_data[12332], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_ssaddv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ssaddv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_ssaddv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ssaddv16qi3_mask }, &operand_data[12327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_usaddv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_usaddv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_usaddv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_usaddv16qi3_mask }, &operand_data[12327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_sssubv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_sssubv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_sssubv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_sssubv16qi3_mask }, &operand_data[12327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_ussubv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ussubv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_ussubv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ussubv16qi3_mask }, &operand_data[12327], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_ssaddv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ssaddv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_ssaddv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ssaddv32hi3_mask }, &operand_data[12337], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_usaddv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_usaddv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_usaddv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_usaddv32hi3_mask }, &operand_data[12337], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_sssubv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_sssubv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_sssubv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_sssubv32hi3_mask }, &operand_data[12337], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_ussubv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ussubv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx512bw_ussubv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_ussubv32hi3_mask }, &operand_data[12337], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_ssaddv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ssaddv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_ssaddv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ssaddv16hi3_mask }, &operand_data[12342], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_usaddv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_usaddv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_usaddv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_usaddv16hi3_mask }, &operand_data[12342], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_sssubv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sssubv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_sssubv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_sssubv16hi3_mask }, &operand_data[12342], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_ussubv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ussubv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "avx2_ussubv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_ussubv16hi3_mask }, &operand_data[12342], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_ssaddv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ssaddv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_ssaddv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ssaddv8hi3_mask }, &operand_data[12347], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_usaddv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_usaddv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_usaddv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_usaddv8hi3_mask }, &operand_data[12347], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_sssubv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_sssubv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_sssubv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_sssubv8hi3_mask }, &operand_data[12347], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_ussubv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ussubv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9250 */ { "sse2_ussubv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_ussubv8hi3_mask }, &operand_data[12347], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9274 */ { "mulv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv64qi3 }, &operand_data[12352], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9274 */ { "mulv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv64qi3_mask }, &operand_data[12352], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9274 */ { "mulv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv32qi3 }, &operand_data[12357], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9274 */ { "mulv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv32qi3_mask }, &operand_data[12357], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9274 */ { "mulv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv16qi3 }, &operand_data[12362], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9274 */ { "mulv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv16qi3_mask }, &operand_data[12362], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9284 */ { "mulv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9284 */ { "mulv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv32hi3_mask }, &operand_data[12337], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9284 */ { "mulv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9284 */ { "mulv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv16hi3_mask }, &operand_data[12342], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9284 */ { "mulv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9284 */ { "mulv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8hi3_mask }, &operand_data[12347], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "smulv32hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smulv32hi3_highpart }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "smulv32hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smulv32hi3_highpart_mask }, &operand_data[12337], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "umulv32hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulv32hi3_highpart }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "umulv32hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulv32hi3_highpart_mask }, &operand_data[12337], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "smulv16hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smulv16hi3_highpart }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "smulv16hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smulv16hi3_highpart_mask }, &operand_data[12342], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "umulv16hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulv16hi3_highpart }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "umulv16hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulv16hi3_highpart_mask }, &operand_data[12342], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "smulv8hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smulv8hi3_highpart }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "smulv8hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smulv8hi3_highpart_mask }, &operand_data[12347], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "umulv8hi3_highpart", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulv8hi3_highpart }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9307 */ { "umulv8hi3_highpart_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umulv8hi3_highpart_mask }, &operand_data[12347], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9343 */ { "vec_widen_umult_even_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_even_v16si }, &operand_data[12367], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9343 */ { "vec_widen_umult_even_v16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_even_v16si_mask }, &operand_data[12367], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9388 */ { "vec_widen_umult_even_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_even_v8si }, &operand_data[12372], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9388 */ { "vec_widen_umult_even_v8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_even_v8si_mask }, &operand_data[12372], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9424 */ { "vec_widen_umult_even_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_even_v4si }, &operand_data[12377], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9424 */ { "vec_widen_umult_even_v4si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_even_v4si_mask }, &operand_data[12377], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9460 */ { "vec_widen_smult_even_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_even_v16si }, &operand_data[12367], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9460 */ { "vec_widen_smult_even_v16si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_even_v16si_mask }, &operand_data[12367], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9505 */ { "vec_widen_smult_even_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_even_v8si }, &operand_data[12372], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9505 */ { "vec_widen_smult_even_v8si_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_even_v8si_mask }, &operand_data[12372], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9542 */ { "sse4_1_mulv2siv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_mulv2siv2di3 }, &operand_data[12377], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9542 */ { "sse4_1_mulv2siv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_mulv2siv2di3_mask }, &operand_data[12377], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9592 */ { "avx2_pmaddwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pmaddwd }, &operand_data[12382], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9663 */ { "sse2_pmaddwd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pmaddwd }, &operand_data[12385], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9734 */ { "mulv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv16si3 }, &operand_data[12388], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9734 */ { "mulv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv16si3_mask }, &operand_data[12388], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9734 */ { "mulv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8si3 }, &operand_data[12393], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9734 */ { "mulv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8si3_mask }, &operand_data[12393], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9734 */ { "mulv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv4si3 }, &operand_data[12398], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9734 */ { "mulv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv4si3_mask }, &operand_data[12398], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9773 */ { "mulv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv8di3 }, &operand_data[12105], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9773 */ { "mulv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv4di3 }, &operand_data[12111], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9773 */ { "mulv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mulv2di3 }, &operand_data[12117], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_smult_hi_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v32qi }, &operand_data[12403], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_umult_hi_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v32qi }, &operand_data[12403], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_smult_hi_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v16qi }, &operand_data[12406], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_umult_hi_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v16qi }, &operand_data[12406], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_smult_hi_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v16hi }, &operand_data[12409], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_umult_hi_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v16hi }, &operand_data[12409], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_smult_hi_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v8hi }, &operand_data[12412], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_umult_hi_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v8hi }, &operand_data[12412], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_smult_hi_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v8si }, &operand_data[12415], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_umult_hi_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v8si }, &operand_data[12415], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_smult_hi_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v4si }, &operand_data[12418], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9784 */ { "vec_widen_umult_hi_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v4si }, &operand_data[12418], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_smult_lo_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v32qi }, &operand_data[12403], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_umult_lo_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v32qi }, &operand_data[12403], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_smult_lo_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v16qi }, &operand_data[12406], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_umult_lo_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v16qi }, &operand_data[12406], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_smult_lo_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v16hi }, &operand_data[12409], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_umult_lo_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v16hi }, &operand_data[12409], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_smult_lo_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v8hi }, &operand_data[12412], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_umult_lo_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v8hi }, &operand_data[12412], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_smult_lo_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v8si }, &operand_data[12415], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_umult_lo_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v8si }, &operand_data[12415], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_smult_lo_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v4si }, &operand_data[12418], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9796 */ { "vec_widen_umult_lo_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v4si }, &operand_data[12418], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9810 */ { "vec_widen_smult_even_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_even_v4si }, &operand_data[12377], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9821 */ { "vec_widen_smult_odd_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_odd_v16si }, &operand_data[12421], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9821 */ { "vec_widen_umult_odd_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_odd_v16si }, &operand_data[12421], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9821 */ { "vec_widen_smult_odd_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_odd_v8si }, &operand_data[12424], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9821 */ { "vec_widen_umult_odd_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_odd_v8si }, &operand_data[12424], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9821 */ { "vec_widen_smult_odd_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_odd_v4si }, &operand_data[12427], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9821 */ { "vec_widen_umult_odd_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_odd_v4si }, &operand_data[12427], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9836 */ { "sdot_prodv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sdot_prodv32hi }, &operand_data[12430], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9836 */ { "sdot_prodv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sdot_prodv16hi }, &operand_data[12434], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9836 */ { "sdot_prodv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sdot_prodv8hi }, &operand_data[12438], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9853 */ { "sdot_prodv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sdot_prodv4si }, &operand_data[12442], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9866 */ { "usadv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_usadv16qi }, &operand_data[12446], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:9881 */ { "usadv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_usadv32qi }, &operand_data[12450], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10012 */ { "vec_shl_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_shl_v16qi }, &operand_data[12454], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10012 */ { "vec_shl_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_shl_v8hi }, &operand_data[12457], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10012 */ { "vec_shl_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_shl_v4si }, &operand_data[12460], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10012 */ { "vec_shl_v2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_shl_v2di }, &operand_data[12463], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10051 */ { "vec_shr_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_shr_v16qi }, &operand_data[12454], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10051 */ { "vec_shr_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_shr_v8hi }, &operand_data[12457], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10051 */ { "vec_shr_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_shr_v4si }, &operand_data[12460], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10051 */ { "vec_shr_v2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_shr_v2di }, &operand_data[12463], 3, 3, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "smaxv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "sminv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "umaxv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "uminv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "smaxv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "sminv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "umaxv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "uminv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "smaxv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8si3 }, &operand_data[12277], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "sminv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8si3 }, &operand_data[12277], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "umaxv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv8si3 }, &operand_data[12277], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "uminv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv8si3 }, &operand_data[12277], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "smaxv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv64qi3 }, &operand_data[12256], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "sminv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv64qi3 }, &operand_data[12256], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "umaxv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv64qi3 }, &operand_data[12256], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "uminv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv64qi3 }, &operand_data[12256], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "smaxv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "sminv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "umaxv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "uminv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv32hi3 }, &operand_data[12265], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "smaxv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv16si3 }, &operand_data[12274], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "sminv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv16si3 }, &operand_data[12274], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "umaxv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv16si3 }, &operand_data[12274], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10111 */ { "uminv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv16si3 }, &operand_data[12274], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "smaxv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv16si3_mask }, &operand_data[12292], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "sminv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv16si3_mask }, &operand_data[12292], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "umaxv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv16si3_mask }, &operand_data[12292], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "uminv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv16si3_mask }, &operand_data[12292], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "smaxv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8si3_mask }, &operand_data[12297], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "sminv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8si3_mask }, &operand_data[12297], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "umaxv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv8si3_mask }, &operand_data[12297], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "uminv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv8si3_mask }, &operand_data[12297], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "smaxv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv4si3_mask }, &operand_data[12302], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "sminv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv4si3_mask }, &operand_data[12302], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "umaxv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv4si3_mask }, &operand_data[12302], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "uminv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv4si3_mask }, &operand_data[12302], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "smaxv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8di3_mask }, &operand_data[12307], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "sminv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8di3_mask }, &operand_data[12307], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "umaxv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv8di3_mask }, &operand_data[12307], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "uminv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv8di3_mask }, &operand_data[12307], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "smaxv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv4di3_mask }, &operand_data[12312], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "sminv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv4di3_mask }, &operand_data[12312], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "umaxv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv4di3_mask }, &operand_data[12312], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "uminv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv4di3_mask }, &operand_data[12312], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "smaxv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv2di3_mask }, &operand_data[12317], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "sminv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv2di3_mask }, &operand_data[12317], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "umaxv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv2di3_mask }, &operand_data[12317], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10131 */ { "uminv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv2di3_mask }, &operand_data[12317], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "smaxv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8di3 }, &operand_data[12105], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "sminv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8di3 }, &operand_data[12105], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "umaxv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv8di3 }, &operand_data[12105], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "uminv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv8di3 }, &operand_data[12105], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "smaxv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv4di3 }, &operand_data[12111], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "sminv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv4di3 }, &operand_data[12111], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "umaxv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv4di3 }, &operand_data[12111], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "uminv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv4di3 }, &operand_data[12111], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "smaxv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv2di3 }, &operand_data[12117], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "sminv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv2di3 }, &operand_data[12117], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "umaxv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv2di3 }, &operand_data[12117], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10165 */ { "uminv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv2di3 }, &operand_data[12117], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10207 */ { "smaxv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10207 */ { "sminv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10207 */ { "smaxv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10207 */ { "sminv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10207 */ { "smaxv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_smaxv4si3 }, &operand_data[12280], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10207 */ { "sminv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sminv4si3 }, &operand_data[12280], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10280 */ { "umaxv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10280 */ { "uminv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10280 */ { "umaxv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10280 */ { "uminv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10280 */ { "umaxv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_umaxv4si3 }, &operand_data[12280], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10280 */ { "uminv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_uminv4si3 }, &operand_data[12280], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10370 */ { "avx2_eqv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_eqv32qi3 }, &operand_data[12259], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10370 */ { "avx2_eqv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_eqv16hi3 }, &operand_data[12268], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10370 */ { "avx2_eqv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_eqv8si3 }, &operand_data[12277], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10370 */ { "avx2_eqv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_eqv4di3 }, &operand_data[12286], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512bw_eqv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_eqv64qi3 }, &operand_data[12466], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512bw_eqv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_eqv64qi3_mask }, &operand_data[12466], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512vl_eqv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv16qi3 }, &operand_data[12470], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512vl_eqv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv16qi3_mask }, &operand_data[12470], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512vl_eqv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv32qi3 }, &operand_data[12474], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512vl_eqv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv32qi3_mask }, &operand_data[12474], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512bw_eqv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_eqv32hi3 }, &operand_data[12336], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512bw_eqv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_eqv32hi3_mask }, &operand_data[12477], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512vl_eqv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv16hi3 }, &operand_data[12481], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512vl_eqv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv16hi3_mask }, &operand_data[12481], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512vl_eqv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv8hi3 }, &operand_data[12485], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10390 */ { "avx512vl_eqv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv8hi3_mask }, &operand_data[12485], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512f_eqv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_eqv16si3 }, &operand_data[11229], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512f_eqv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_eqv16si3_mask }, &operand_data[12489], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512vl_eqv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv8si3 }, &operand_data[12493], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512vl_eqv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv8si3_mask }, &operand_data[12493], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512vl_eqv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv4si3 }, &operand_data[11237], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512vl_eqv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv4si3_mask }, &operand_data[12496], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512f_eqv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_eqv8di3 }, &operand_data[11241], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512f_eqv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_eqv8di3_mask }, &operand_data[12499], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512vl_eqv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv4di3 }, &operand_data[11245], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512vl_eqv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv4di3_mask }, &operand_data[12502], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512vl_eqv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv2di3 }, &operand_data[11249], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10399 */ { "avx512vl_eqv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_eqv2di3_mask }, &operand_data[12505], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10466 */ { "sse2_eqv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_eqv16qi3 }, &operand_data[12262], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10466 */ { "sse2_eqv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_eqv8hi3 }, &operand_data[12271], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10466 */ { "sse2_eqv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_eqv4si3 }, &operand_data[12280], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10474 */ { "sse4_1_eqv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_eqv2di3 }, &operand_data[12289], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv64qiv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv64qiv64qi }, &operand_data[12509], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv32hiv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32hiv64qi }, &operand_data[12515], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv16siv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16siv64qi }, &operand_data[12521], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv8div64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8div64qi }, &operand_data[12527], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv16sfv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16sfv64qi }, &operand_data[12533], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv8dfv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8dfv64qi }, &operand_data[12539], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv64qiv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv64qiv32hi }, &operand_data[12545], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv32hiv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32hiv32hi }, &operand_data[12551], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv16siv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16siv32hi }, &operand_data[12557], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv8div32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8div32hi }, &operand_data[12563], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv16sfv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16sfv32hi }, &operand_data[12569], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv8dfv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8dfv32hi }, &operand_data[12575], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv64qiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv64qiv16si }, &operand_data[12581], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv32hiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32hiv16si }, &operand_data[12587], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv16siv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16siv16si }, &operand_data[12593], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv8div16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8div16si }, &operand_data[12599], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv16sfv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16sfv16si }, &operand_data[12605], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv8dfv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8dfv16si }, &operand_data[12611], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv64qiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv64qiv8di }, &operand_data[12617], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv32hiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32hiv8di }, &operand_data[12623], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv16siv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16siv8di }, &operand_data[12629], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv8div8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8div8di }, &operand_data[12635], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv16sfv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16sfv8di }, &operand_data[12641], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10549 */ { "vcondv8dfv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8dfv8di }, &operand_data[12647], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv32qiv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32qiv32qi }, &operand_data[12653], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv32qiv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32qiv16hi }, &operand_data[12659], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv32qiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32qiv8si }, &operand_data[12665], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv32qiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv32qiv4di }, &operand_data[12671], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv16hiv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16hiv32qi }, &operand_data[12677], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv16hiv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16hiv16hi }, &operand_data[12683], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv16hiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16hiv8si }, &operand_data[12689], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv16hiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16hiv4di }, &operand_data[12695], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv8siv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8siv32qi }, &operand_data[12701], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv8siv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8siv16hi }, &operand_data[12707], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv8siv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8siv8si }, &operand_data[12713], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv8siv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8siv4di }, &operand_data[12719], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv4div32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4div32qi }, &operand_data[12725], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv4div16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4div16hi }, &operand_data[12731], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv4div8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4div8si }, &operand_data[12737], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv4div4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4div4di }, &operand_data[12743], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv8sfv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8sfv32qi }, &operand_data[12749], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv8sfv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8sfv16hi }, &operand_data[12755], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv8sfv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8sfv8si }, &operand_data[12761], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv8sfv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8sfv4di }, &operand_data[12767], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv4dfv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4dfv32qi }, &operand_data[12773], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv4dfv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4dfv16hi }, &operand_data[12779], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv4dfv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4dfv8si }, &operand_data[12785], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10566 */ { "vcondv4dfv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4dfv4di }, &operand_data[12791], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv16qiv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16qiv16qi }, &operand_data[12797], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv8hiv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8hiv16qi }, &operand_data[12803], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv4siv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4siv16qi }, &operand_data[12809], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv2div16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2div16qi }, &operand_data[12815], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv4sfv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4sfv16qi }, &operand_data[12821], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv2dfv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2dfv16qi }, &operand_data[12827], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv16qiv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16qiv8hi }, &operand_data[12833], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv8hiv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8hiv8hi }, &operand_data[12839], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv4siv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4siv8hi }, &operand_data[12845], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv2div8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2div8hi }, &operand_data[12851], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv4sfv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4sfv8hi }, &operand_data[12857], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv2dfv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2dfv8hi }, &operand_data[12863], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv16qiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv16qiv4si }, &operand_data[12869], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv8hiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv8hiv4si }, &operand_data[12875], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv4siv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4siv4si }, &operand_data[12881], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv2div4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2div4si }, &operand_data[12887], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv4sfv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv4sfv4si }, &operand_data[12893], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10583 */ { "vcondv2dfv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2dfv4si }, &operand_data[12899], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10600 */ { "vcondv2div2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2div2di }, &operand_data[12905], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10600 */ { "vcondv2dfv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcondv2dfv2di }, &operand_data[12911], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv64qiv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv64qiv64qi }, &operand_data[12917], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv32hiv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv32hiv64qi }, &operand_data[12923], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv16siv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16siv64qi }, &operand_data[12929], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv8div64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8div64qi }, &operand_data[12935], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv16sfv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16sfv64qi }, &operand_data[12941], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv8dfv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8dfv64qi }, &operand_data[12947], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv64qiv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv64qiv32hi }, &operand_data[12953], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv32hiv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv32hiv32hi }, &operand_data[12959], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv16siv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16siv32hi }, &operand_data[12965], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv8div32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8div32hi }, &operand_data[12971], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv16sfv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16sfv32hi }, &operand_data[12977], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv8dfv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8dfv32hi }, &operand_data[12983], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv64qiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv64qiv16si }, &operand_data[12989], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv32hiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv32hiv16si }, &operand_data[12995], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv16siv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16siv16si }, &operand_data[13001], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv8div16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8div16si }, &operand_data[13007], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv16sfv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16sfv16si }, &operand_data[13013], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv8dfv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8dfv16si }, &operand_data[13019], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv64qiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv64qiv8di }, &operand_data[13025], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv32hiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv32hiv8di }, &operand_data[13031], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv16siv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16siv8di }, &operand_data[13037], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv8div8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8div8di }, &operand_data[13043], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv16sfv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16sfv8di }, &operand_data[13049], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10615 */ { "vconduv8dfv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8dfv8di }, &operand_data[13055], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv32qiv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv32qiv32qi }, &operand_data[13061], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv32qiv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv32qiv16hi }, &operand_data[13067], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv32qiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv32qiv8si }, &operand_data[13073], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv32qiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv32qiv4di }, &operand_data[13079], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv16hiv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16hiv32qi }, &operand_data[13085], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv16hiv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16hiv16hi }, &operand_data[13091], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv16hiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16hiv8si }, &operand_data[13097], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv16hiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16hiv4di }, &operand_data[13103], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv8siv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8siv32qi }, &operand_data[13109], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv8siv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8siv16hi }, &operand_data[13115], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv8siv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8siv8si }, &operand_data[13121], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv8siv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8siv4di }, &operand_data[13127], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv4div32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4div32qi }, &operand_data[13133], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv4div16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4div16hi }, &operand_data[13139], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv4div8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4div8si }, &operand_data[13145], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv4div4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4div4di }, &operand_data[13151], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv8sfv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8sfv32qi }, &operand_data[13157], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv8sfv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8sfv16hi }, &operand_data[13163], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv8sfv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8sfv8si }, &operand_data[13169], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv8sfv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8sfv4di }, &operand_data[13175], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv4dfv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4dfv32qi }, &operand_data[13181], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv4dfv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4dfv16hi }, &operand_data[13187], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv4dfv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4dfv8si }, &operand_data[13193], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10632 */ { "vconduv4dfv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4dfv4di }, &operand_data[13199], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv16qiv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16qiv16qi }, &operand_data[13205], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv8hiv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8hiv16qi }, &operand_data[13211], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv4siv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4siv16qi }, &operand_data[13217], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv2div16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv2div16qi }, &operand_data[13223], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv4sfv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4sfv16qi }, &operand_data[13229], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv2dfv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv2dfv16qi }, &operand_data[13235], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv16qiv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16qiv8hi }, &operand_data[13241], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv8hiv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8hiv8hi }, &operand_data[13247], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv4siv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4siv8hi }, &operand_data[13253], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv2div8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv2div8hi }, &operand_data[13259], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv4sfv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4sfv8hi }, &operand_data[13265], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv2dfv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv2dfv8hi }, &operand_data[13271], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv16qiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv16qiv4si }, &operand_data[13277], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv8hiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv8hiv4si }, &operand_data[13283], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv4siv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4siv4si }, &operand_data[13289], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv2div4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv2div4si }, &operand_data[13295], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv4sfv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv4sfv4si }, &operand_data[13301], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10649 */ { "vconduv2dfv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv2dfv4si }, &operand_data[13307], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10666 */ { "vconduv2div2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv2div2di }, &operand_data[13313], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10666 */ { "vconduv2dfv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vconduv2dfv2di }, &operand_data[13319], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv16qi }, &operand_data[13325], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv8hi }, &operand_data[13329], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv4si }, &operand_data[13333], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv2di }, &operand_data[13337], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv4sf }, &operand_data[12161], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv2df }, &operand_data[12200], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv32qi }, &operand_data[13341], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv16hi }, &operand_data[13345], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv8si }, &operand_data[13349], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv4di }, &operand_data[13353], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv8sf }, &operand_data[12148], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv4df }, &operand_data[12187], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv16sf }, &operand_data[12135], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv8df }, &operand_data[12174], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv16si }, &operand_data[13357], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv8di }, &operand_data[13361], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv32hi }, &operand_data[13365], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10690 */ { "vec_permv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_permv64qi }, &operand_data[13369], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv4sf }, &operand_data[13373], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv4si }, &operand_data[13377], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv2df }, &operand_data[13381], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv2di }, &operand_data[13385], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv16qi }, &operand_data[13389], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv8hi }, &operand_data[13393], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv8sf }, &operand_data[13397], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv4df }, &operand_data[13401], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv8si }, &operand_data[13405], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv4di }, &operand_data[13409], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv32qi }, &operand_data[13413], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv16hi }, &operand_data[13417], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv16si }, &operand_data[13421], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv8di }, &operand_data[13425], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv16sf }, &operand_data[13429], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv8df }, &operand_data[13433], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv32hi }, &operand_data[13437], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10712 */ { "vec_perm_constv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_perm_constv64qi }, &operand_data[13441], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv16si2 }, &operand_data[11230], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv8di2 }, &operand_data[11242], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv64qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv64qi2 }, &operand_data[11214], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv32qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv32qi2 }, &operand_data[11206], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv16qi2 }, &operand_data[11210], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv32hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv32hi2 }, &operand_data[11218], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv16hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv16hi2 }, &operand_data[11226], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv8hi2 }, &operand_data[11222], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv8si2 }, &operand_data[11234], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv4si2 }, &operand_data[11238], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv4di2 }, &operand_data[11246], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10731 */ { "one_cmplv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_one_cmplv2di2 }, &operand_data[11250], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "avx512bw_andnotv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_andnotv64qi3 }, &operand_data[13445], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "avx2_andnotv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_andnotv32qi3 }, &operand_data[13448], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "sse2_andnotv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_andnotv16qi3 }, &operand_data[13451], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "avx512bw_andnotv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_andnotv32hi3 }, &operand_data[13454], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "avx2_andnotv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_andnotv16hi3 }, &operand_data[13457], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "sse2_andnotv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_andnotv8hi3 }, &operand_data[13460], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "avx512f_andnotv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_andnotv16si3 }, &operand_data[12088], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "avx2_andnotv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_andnotv8si3 }, &operand_data[12094], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "sse2_andnotv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_andnotv4si3 }, &operand_data[12100], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "avx512f_andnotv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_andnotv8di3 }, &operand_data[12106], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "avx2_andnotv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_andnotv4di3 }, &operand_data[12112], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10746 */ { "sse2_andnotv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_andnotv2di3 }, &operand_data[12118], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10753 */ { "avx512f_andnotv16si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_andnotv16si3_mask }, &operand_data[13463], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10753 */ { "avx2_andnotv8si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_andnotv8si3_mask }, &operand_data[13468], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10753 */ { "sse2_andnotv4si3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_andnotv4si3_mask }, &operand_data[13473], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10753 */ { "avx512f_andnotv8di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_andnotv8di3_mask }, &operand_data[13478], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10753 */ { "avx2_andnotv4di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_andnotv4di3_mask }, &operand_data[13483], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10753 */ { "sse2_andnotv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_andnotv2di3_mask }, &operand_data[13488], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10764 */ { "avx512bw_andnotv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_andnotv64qi3_mask }, &operand_data[13493], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10764 */ { "sse2_andnotv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_andnotv16qi3_mask }, &operand_data[13498], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10764 */ { "avx2_andnotv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_andnotv32qi3_mask }, &operand_data[13503], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10764 */ { "avx512bw_andnotv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_andnotv32hi3_mask }, &operand_data[13508], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10764 */ { "avx2_andnotv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_andnotv16hi3_mask }, &operand_data[13513], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10764 */ { "sse2_andnotv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_andnotv8hi3_mask }, &operand_data[13518], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv16si3 }, &operand_data[13523], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv16si3 }, &operand_data[13523], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv16si3 }, &operand_data[13523], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv8di3 }, &operand_data[13526], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv8di3 }, &operand_data[13526], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv8di3 }, &operand_data[13526], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv64qi3 }, &operand_data[13529], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv64qi3 }, &operand_data[13529], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv64qi3 }, &operand_data[13529], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv32qi3 }, &operand_data[13532], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv32qi3 }, &operand_data[13532], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv32qi3 }, &operand_data[13532], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv16qi3 }, &operand_data[13535], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv16qi3 }, &operand_data[13535], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv16qi3 }, &operand_data[13535], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv32hi3 }, &operand_data[13538], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv32hi3 }, &operand_data[13538], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv32hi3 }, &operand_data[13538], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv16hi3 }, &operand_data[13541], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv16hi3 }, &operand_data[13541], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv16hi3 }, &operand_data[13541], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv8hi3 }, &operand_data[13544], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv8hi3 }, &operand_data[13544], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv8hi3 }, &operand_data[13544], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv8si3 }, &operand_data[13547], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv8si3 }, &operand_data[13547], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv8si3 }, &operand_data[13547], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv4si3 }, &operand_data[13550], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv4si3 }, &operand_data[13550], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv4si3 }, &operand_data[13550], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv4di3 }, &operand_data[13553], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv4di3 }, &operand_data[13553], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv4di3 }, &operand_data[13553], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "andv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_andv2di3 }, &operand_data[13556], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "iorv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_iorv2di3 }, &operand_data[13556], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:10902 */ { "xorv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xorv2di3 }, &operand_data[13556], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11061 */ { "vec_pack_trunc_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v16hi }, &operand_data[11401], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11061 */ { "vec_pack_trunc_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v8hi }, &operand_data[13328], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11061 */ { "vec_pack_trunc_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v8si }, &operand_data[11403], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11061 */ { "vec_pack_trunc_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v4si }, &operand_data[13332], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11061 */ { "vec_pack_trunc_v8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v8di }, &operand_data[11413], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11061 */ { "vec_pack_trunc_v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v4di }, &operand_data[11405], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11061 */ { "vec_pack_trunc_v2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v2di }, &operand_data[13336], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11561 */ { "vec_interleave_highv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv32qi }, &operand_data[5499], 3, 3, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11561 */ { "vec_interleave_highv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv16hi }, &operand_data[5502], 3, 3, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11561 */ { "vec_interleave_highv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv8si }, &operand_data[5505], 3, 3, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11561 */ { "vec_interleave_highv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_highv4di }, &operand_data[5508], 3, 3, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11579 */ { "vec_interleave_lowv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv32qi }, &operand_data[5499], 3, 3, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11579 */ { "vec_interleave_lowv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv16hi }, &operand_data[5502], 3, 3, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11579 */ { "vec_interleave_lowv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv8si }, &operand_data[5505], 3, 3, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11579 */ { "vec_interleave_lowv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_interleave_lowv4di }, &operand_data[5508], 3, 3, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11663 */ { "avx512dq_vinsertf64x2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vinsertf64x2_mask }, &operand_data[13559], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11663 */ { "avx512dq_vinserti64x2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vinserti64x2_mask }, &operand_data[13565], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11663 */ { "avx512f_vinsertf32x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vinsertf32x4_mask }, &operand_data[13571], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11663 */ { "avx512f_vinserti32x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vinserti32x4_mask }, &operand_data[13577], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11715 */ { "avx512dq_vinsertf32x8_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vinsertf32x8_mask }, &operand_data[13583], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11715 */ { "avx512dq_vinserti32x8_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_vinserti32x8_mask }, &operand_data[13589], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11715 */ { "avx512f_vinsertf64x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vinsertf64x4_mask }, &operand_data[13595], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11715 */ { "avx512f_vinserti64x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vinserti64x4_mask }, &operand_data[13601], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11800 */ { "avx512dq_shuf_i64x2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_shuf_i64x2_mask }, &operand_data[13607], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11800 */ { "avx512dq_shuf_f64x2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512dq_shuf_f64x2_mask }, &operand_data[13613], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11845 */ { "avx512f_shuf_f64x2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_f64x2_mask }, &operand_data[12207], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11845 */ { "avx512f_shuf_i64x2_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_i64x2_mask }, &operand_data[13619], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11903 */ { "avx512vl_shuf_i32x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_shuf_i32x4_mask }, &operand_data[13625], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11903 */ { "avx512vl_shuf_f32x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_shuf_f32x4_mask }, &operand_data[13631], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11961 */ { "avx512f_shuf_f32x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_f32x4_mask }, &operand_data[12123], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:11961 */ { "avx512f_shuf_i32x4_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_shuf_i32x4_mask }, &operand_data[13637], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12043 */ { "avx512f_pshufdv3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_pshufdv3_mask }, &operand_data[13638], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12121 */ { "avx512vl_pshufdv3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_pshufdv3_mask }, &operand_data[13643], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12143 */ { "avx2_pshufdv3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshufdv3 }, &operand_data[12095], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12195 */ { "avx512vl_pshufd_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_pshufd_mask }, &operand_data[13648], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12213 */ { "sse2_pshufd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pshufd }, &operand_data[13653], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12265 */ { "avx512vl_pshuflwv3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_pshuflwv3_mask }, &operand_data[13656], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12287 */ { "avx2_pshuflwv3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshuflwv3 }, &operand_data[13656], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12347 */ { "avx512vl_pshuflw_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_pshuflw_mask }, &operand_data[13661], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12365 */ { "sse2_pshuflw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pshuflw }, &operand_data[13666], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12410 */ { "avx2_pshufhwv3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pshufhwv3 }, &operand_data[13656], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12441 */ { "avx512vl_pshufhwv3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_pshufhwv3_mask }, &operand_data[13656], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12504 */ { "avx512vl_pshufhw_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_pshufhw_mask }, &operand_data[13661], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12522 */ { "sse2_pshufhw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_pshufhw }, &operand_data[13666], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12567 */ { "sse2_loadd", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_loadd }, &operand_data[13669], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12705 */ { "sse2_loadd+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13670], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12705 */ { "sse2_loadd+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13672], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12804 */ { "sse2_loadd+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13674], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12804 */ { "sse2_loadd+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13677], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12804 */ { "vec_unpacks_lo_v32qi-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13680], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12804 */ { "vec_unpacks_lo_v32qi-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13683], 0, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12820 */ { "vec_unpacks_lo_v32qi-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[10136], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12820 */ { "vec_unpacks_lo_v32qi-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13686], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12972 */ { "vec_unpacks_lo_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v32qi }, &operand_data[12403], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12972 */ { "vec_unpacks_lo_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v16qi }, &operand_data[12406], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12972 */ { "vec_unpacks_lo_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v32hi }, &operand_data[12430], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12972 */ { "vec_unpacks_lo_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v16hi }, &operand_data[12409], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12972 */ { "vec_unpacks_lo_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v8hi }, &operand_data[12412], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12972 */ { "vec_unpacks_lo_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v16si }, &operand_data[13688], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12972 */ { "vec_unpacks_lo_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v8si }, &operand_data[12415], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12972 */ { "vec_unpacks_lo_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v4si }, &operand_data[12418], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12978 */ { "vec_unpacks_hi_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v32qi }, &operand_data[12403], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12978 */ { "vec_unpacks_hi_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v16qi }, &operand_data[12406], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12978 */ { "vec_unpacks_hi_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v32hi }, &operand_data[12430], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12978 */ { "vec_unpacks_hi_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v16hi }, &operand_data[12409], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12978 */ { "vec_unpacks_hi_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v8hi }, &operand_data[12412], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12978 */ { "vec_unpacks_hi_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v16si }, &operand_data[13688], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12978 */ { "vec_unpacks_hi_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v8si }, &operand_data[12415], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12978 */ { "vec_unpacks_hi_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v4si }, &operand_data[12418], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12984 */ { "vec_unpacku_lo_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v32qi }, &operand_data[12403], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12984 */ { "vec_unpacku_lo_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v16qi }, &operand_data[12406], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12984 */ { "vec_unpacku_lo_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v32hi }, &operand_data[12430], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12984 */ { "vec_unpacku_lo_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v16hi }, &operand_data[12409], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12984 */ { "vec_unpacku_lo_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v8hi }, &operand_data[12412], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12984 */ { "vec_unpacku_lo_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v16si }, &operand_data[13688], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12984 */ { "vec_unpacku_lo_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v8si }, &operand_data[12415], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12984 */ { "vec_unpacku_lo_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v4si }, &operand_data[12418], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12990 */ { "vec_unpacku_hi_v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v32qi }, &operand_data[12403], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12990 */ { "vec_unpacku_hi_v16qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v16qi }, &operand_data[12406], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12990 */ { "vec_unpacku_hi_v32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v32hi }, &operand_data[12430], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12990 */ { "vec_unpacku_hi_v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v16hi }, &operand_data[12409], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12990 */ { "vec_unpacku_hi_v8hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v8hi }, &operand_data[12412], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12990 */ { "vec_unpacku_hi_v16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v16si }, &operand_data[13688], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12990 */ { "vec_unpacku_hi_v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v8si }, &operand_data[12415], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:12990 */ { "vec_unpacku_hi_v4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v4si }, &operand_data[12418], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "avx512bw_uavgv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_uavgv64qi3 }, &operand_data[12256], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "avx512bw_uavgv64qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_uavgv64qi3_mask }, &operand_data[12322], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "avx2_uavgv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_uavgv32qi3 }, &operand_data[12259], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "avx2_uavgv32qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_uavgv32qi3_mask }, &operand_data[12332], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "sse2_uavgv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_uavgv16qi3 }, &operand_data[12262], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "sse2_uavgv16qi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_uavgv16qi3_mask }, &operand_data[12327], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "avx512bw_uavgv32hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_uavgv32hi3 }, &operand_data[12265], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "avx512bw_uavgv32hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_uavgv32hi3_mask }, &operand_data[12337], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "avx2_uavgv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_uavgv16hi3 }, &operand_data[12268], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "avx2_uavgv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_uavgv16hi3_mask }, &operand_data[12342], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "sse2_uavgv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_uavgv8hi3 }, &operand_data[12271], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13002 */ { "sse2_uavgv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_uavgv8hi3_mask }, &operand_data[12347], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13103 */ { "sse2_maskmovdqu", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_maskmovdqu }, &operand_data[13690], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13629 */ { "ssse3_pmulhrswv4hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_pmulhrswv4hi3_mask }, &operand_data[13693], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13629 */ { "ssse3_pmulhrswv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_pmulhrswv8hi3_mask }, &operand_data[13698], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13629 */ { "avx2_pmulhrswv16hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pmulhrswv16hi3_mask }, &operand_data[13703], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13652 */ { "ssse3_pmulhrswv4hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_pmulhrswv4hi3 }, &operand_data[11080], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13652 */ { "ssse3_pmulhrswv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ssse3_pmulhrswv8hi3 }, &operand_data[12271], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13652 */ { "avx2_pmulhrswv16hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pmulhrswv16hi3 }, &operand_data[12268], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv64qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv64qi2 }, &operand_data[11214], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv32qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv32qi2 }, &operand_data[11206], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv16qi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv16qi2 }, &operand_data[11210], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv32hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv32hi2 }, &operand_data[11218], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv16hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv16hi2 }, &operand_data[11226], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv8hi2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv8hi2 }, &operand_data[11222], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv16si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv16si2 }, &operand_data[11230], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv8si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv8si2 }, &operand_data[11234], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv4si2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv4si2 }, &operand_data[11238], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv8di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv8di2 }, &operand_data[11242], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv4di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv4di2 }, &operand_data[11246], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:13895 */ { "absv2di2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_absv2di2 }, &operand_data[11250], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14162 */ { "avx2_pblendw", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_pblendw }, &operand_data[13708], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14508 */ { "avx_roundps_sfix256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_roundps_sfix256 }, &operand_data[13712], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14508 */ { "sse4_1_roundps_sfix", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_roundps_sfix }, &operand_data[13715], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14524 */ { "avx512f_roundpd512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_roundpd512 }, &operand_data[13718], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14534 */ { "avx512f_roundpd_vec_pack_sfix512", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_roundpd_vec_pack_sfix512 }, &operand_data[13721], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14534 */ { "avx_roundpd_vec_pack_sfix256", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_roundpd_vec_pack_sfix256 }, &operand_data[13725], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14534 */ { "sse4_1_roundpd_vec_pack_sfix", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse4_1_roundpd_vec_pack_sfix }, &operand_data[13729], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14594 */ { "roundv16sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv16sf2 }, &operand_data[11276], 2, 2, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14594 */ { "roundv8sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv8sf2 }, &operand_data[11278], 2, 2, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14594 */ { "roundv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv4sf2 }, &operand_data[11280], 2, 2, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14594 */ { "roundv8df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv8df2 }, &operand_data[11282], 2, 2, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14594 */ { "roundv4df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv4df2 }, &operand_data[11284], 2, 2, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14594 */ { "roundv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv2df2 }, &operand_data[11286], 2, 2, 4, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14628 */ { "roundv8sf2_sfix", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv8sf2_sfix }, &operand_data[11753], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14628 */ { "roundv4sf2_sfix", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv4sf2_sfix }, &operand_data[11755], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14642 */ { "roundv8df2_vec_pack_sfix", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv8df2_vec_pack_sfix }, &operand_data[11829], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14642 */ { "roundv4df2_vec_pack_sfix", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv4df2_vec_pack_sfix }, &operand_data[11832], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14642 */ { "roundv2df2_vec_pack_sfix", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_roundv2df2_vec_pack_sfix }, &operand_data[11835], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14682 */ { "roundv2df2_vec_pack_sfix+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13733], 0, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14743 */ { "roundv2df2_vec_pack_sfix+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13740], 0, 7, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14891 */ { "avx512pf_gatherpfv16sisf-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13747], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:14943 */ { "avx512pf_gatherpfv16sisf-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13752], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15076 */ { "avx512pf_gatherpfv16sisf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512pf_gatherpfv16sisf }, &operand_data[13757], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15076 */ { "avx512pf_gatherpfv8disf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512pf_gatherpfv8disf }, &operand_data[13762], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15148 */ { "avx512pf_gatherpfv8sidf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512pf_gatherpfv8sidf }, &operand_data[13767], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15148 */ { "avx512pf_gatherpfv8didf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512pf_gatherpfv8didf }, &operand_data[13762], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15220 */ { "avx512pf_scatterpfv16sisf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512pf_scatterpfv16sisf }, &operand_data[13772], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15220 */ { "avx512pf_scatterpfv8disf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512pf_scatterpfv8disf }, &operand_data[13777], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15296 */ { "avx512pf_scatterpfv8sidf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512pf_scatterpfv8sidf }, &operand_data[13782], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15296 */ { "avx512pf_scatterpfv8didf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512pf_scatterpfv8didf }, &operand_data[13777], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15819 */ { "rotlv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotlv16qi3 }, &operand_data[13787], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15819 */ { "rotlv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotlv8hi3 }, &operand_data[13790], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15819 */ { "rotlv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotlv4si3 }, &operand_data[13793], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15819 */ { "rotlv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotlv2di3 }, &operand_data[13796], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15850 */ { "rotrv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotrv16qi3 }, &operand_data[13787], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15850 */ { "rotrv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotrv8hi3 }, &operand_data[13790], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15850 */ { "rotrv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotrv4si3 }, &operand_data[13793], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15850 */ { "rotrv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_rotrv2di3 }, &operand_data[13796], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15909 */ { "vrotrv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vrotrv16qi3 }, &operand_data[12362], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15909 */ { "vrotrv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vrotrv8hi3 }, &operand_data[13329], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15909 */ { "vrotrv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vrotrv4si3 }, &operand_data[12099], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15909 */ { "vrotrv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vrotrv2di3 }, &operand_data[12117], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15921 */ { "vrotlv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vrotlv16qi3 }, &operand_data[12362], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15921 */ { "vrotlv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vrotlv8hi3 }, &operand_data[13329], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15921 */ { "vrotlv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vrotlv4si3 }, &operand_data[12099], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15921 */ { "vrotlv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vrotlv2di3 }, &operand_data[12117], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15951 */ { "vlshrv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vlshrv16qi3 }, &operand_data[13451], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15951 */ { "vlshrv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vlshrv8hi3 }, &operand_data[13460], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15964 */ { "vlshrv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vlshrv4si3 }, &operand_data[12100], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15964 */ { "vlshrv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vlshrv2di3 }, &operand_data[12118], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15980 */ { "vlshrv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vlshrv16si3 }, &operand_data[12088], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15980 */ { "vlshrv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vlshrv8di3 }, &operand_data[12106], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15987 */ { "vlshrv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vlshrv8si3 }, &operand_data[12094], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15987 */ { "vlshrv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vlshrv4di3 }, &operand_data[12112], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15994 */ { "vashrv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashrv8hi3 }, &operand_data[13460], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:15994 */ { "vashrv8hi3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashrv8hi3_mask }, &operand_data[13518], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16010 */ { "vashrv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashrv16qi3 }, &operand_data[13451], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16023 */ { "vashrv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashrv2di3 }, &operand_data[12118], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16023 */ { "vashrv2di3_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashrv2di3_mask }, &operand_data[13488], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16039 */ { "vashrv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashrv4si3 }, &operand_data[12100], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16054 */ { "vashrv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashrv16si3 }, &operand_data[12088], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16060 */ { "vashrv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashrv8si3 }, &operand_data[12094], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16066 */ { "vashlv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashlv16qi3 }, &operand_data[13451], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16066 */ { "vashlv8hi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashlv8hi3 }, &operand_data[13460], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16077 */ { "vashlv4si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashlv4si3 }, &operand_data[12100], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16077 */ { "vashlv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashlv2di3 }, &operand_data[12118], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16092 */ { "vashlv16si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashlv16si3 }, &operand_data[12088], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16092 */ { "vashlv8di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashlv8di3 }, &operand_data[12106], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16099 */ { "vashlv8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashlv8si3 }, &operand_data[12094], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16099 */ { "vashlv4di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vashlv4di3 }, &operand_data[12112], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16144 */ { "ashlv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv64qi3 }, &operand_data[13799], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16144 */ { "lshrv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv64qi3 }, &operand_data[13799], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16144 */ { "ashrv64qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv64qi3 }, &operand_data[13799], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16144 */ { "ashlv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv32qi3 }, &operand_data[13802], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16144 */ { "lshrv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv32qi3 }, &operand_data[13802], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16144 */ { "ashrv32qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv32qi3 }, &operand_data[13802], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16144 */ { "ashlv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashlv16qi3 }, &operand_data[13805], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16144 */ { "lshrv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_lshrv16qi3 }, &operand_data[13805], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16144 */ { "ashrv16qi3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv16qi3 }, &operand_data[13805], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16183 */ { "ashrv2di3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_ashrv2di3 }, &operand_data[13808], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16227 */ { "xop_vmfrczv4sf2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_vmfrczv4sf2 }, &operand_data[11190], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16227 */ { "xop_vmfrczv2df2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_xop_vmfrczv2df2 }, &operand_data[11202], 2, 2, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16439 */ { "avx_vzeroall", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vzeroall }, &operand_data[0], 0, 0, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16548 */ { "avx2_permv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permv4di }, &operand_data[12113], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16548 */ { "avx2_permv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_permv4df }, &operand_data[13811], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16548 */ { "avx512f_permv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permv8di }, &operand_data[12107], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16548 */ { "avx512f_permv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permv8df }, &operand_data[12208], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16563 */ { "avx512vl_permv4di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_permv4di_mask }, &operand_data[13814], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16563 */ { "avx512vl_permv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_permv4df_mask }, &operand_data[13819], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16563 */ { "avx512f_permv8di_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permv8di_mask }, &operand_data[13824], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16563 */ { "avx512f_permv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_permv8df_mask }, &operand_data[13829], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16812 */ { "avx512f_permv8df_mask+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11872], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16812 */ { "avx512f_permv8df_mask+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11875], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16812 */ { "avx512f_permv8df_mask+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11771], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16812 */ { "avx512f_permv8df_mask+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11881], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16812 */ { "avx512f_permv8df_mask+5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11887], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16812 */ { "avx512f_permv8df_mask+6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11890], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16835 */ { "avx512f_vpermilv8df-6", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11887], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16835 */ { "avx512f_vpermilv8df-5", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11905], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16835 */ { "avx512f_vpermilv8df-4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11896], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16835 */ { "avx512f_vpermilv8df-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11914], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16983 */ { "avx512f_vpermilv8df-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13834], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:16983 */ { "avx512f_vpermilv8df-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[13838], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17026 */ { "avx512f_vpermilv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermilv8df }, &operand_data[12208], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17026 */ { "avx512f_vpermilv8df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermilv8df_mask }, &operand_data[13829], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17026 */ { "avx_vpermilv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilv4df }, &operand_data[13811], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17026 */ { "avx_vpermilv4df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilv4df_mask }, &operand_data[13819], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17026 */ { "avx_vpermilv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilv2df }, &operand_data[13842], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17026 */ { "avx_vpermilv2df_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilv2df_mask }, &operand_data[13842], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17047 */ { "avx512f_vpermilv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermilv16sf }, &operand_data[12124], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17047 */ { "avx512f_vpermilv16sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermilv16sf_mask }, &operand_data[13847], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17047 */ { "avx_vpermilv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilv8sf }, &operand_data[13852], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17047 */ { "avx_vpermilv8sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilv8sf_mask }, &operand_data[13852], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17047 */ { "avx_vpermilv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilv4sf }, &operand_data[13857], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17047 */ { "avx_vpermilv4sf_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vpermilv4sf_mask }, &operand_data[13857], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512f_vpermi2varv16si3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv16si3_maskz }, &operand_data[7250], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512f_vpermi2varv16sf3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv16sf3_maskz }, &operand_data[7255], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512f_vpermi2varv8di3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv8di3_maskz }, &operand_data[7260], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512f_vpermi2varv8df3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermi2varv8df3_maskz }, &operand_data[7265], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512vl_vpermi2varv8si3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8si3_maskz }, &operand_data[7270], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512vl_vpermi2varv8sf3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8sf3_maskz }, &operand_data[7275], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512vl_vpermi2varv4di3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4di3_maskz }, &operand_data[7280], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512vl_vpermi2varv4df3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4df3_maskz }, &operand_data[7285], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512vl_vpermi2varv4si3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4si3_maskz }, &operand_data[7290], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512vl_vpermi2varv4sf3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv4sf3_maskz }, &operand_data[7295], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512vl_vpermi2varv2di3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv2di3_maskz }, &operand_data[7300], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17103 */ { "avx512vl_vpermi2varv2df3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv2df3_maskz }, &operand_data[7305], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17117 */ { "avx512bw_vpermi2varv64qi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermi2varv64qi3_maskz }, &operand_data[13862], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17117 */ { "avx512vl_vpermi2varv16qi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv16qi3_maskz }, &operand_data[13867], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17117 */ { "avx512vl_vpermi2varv32qi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv32qi3_maskz }, &operand_data[13872], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17131 */ { "avx512vl_vpermi2varv8hi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv8hi3_maskz }, &operand_data[7325], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17131 */ { "avx512vl_vpermi2varv16hi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermi2varv16hi3_maskz }, &operand_data[7330], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17131 */ { "avx512bw_vpermi2varv32hi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermi2varv32hi3_maskz }, &operand_data[7335], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512f_vpermt2varv16si3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv16si3_maskz }, &operand_data[7250], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512f_vpermt2varv16sf3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv16sf3_maskz }, &operand_data[7376], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512f_vpermt2varv8di3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv8di3_maskz }, &operand_data[7260], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512f_vpermt2varv8df3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_vpermt2varv8df3_maskz }, &operand_data[7381], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512vl_vpermt2varv8si3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8si3_maskz }, &operand_data[7270], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512vl_vpermt2varv8sf3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8sf3_maskz }, &operand_data[7386], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512vl_vpermt2varv4di3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4di3_maskz }, &operand_data[7280], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512vl_vpermt2varv4df3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4df3_maskz }, &operand_data[7391], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512vl_vpermt2varv4si3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4si3_maskz }, &operand_data[7290], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512vl_vpermt2varv4sf3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv4sf3_maskz }, &operand_data[7396], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512vl_vpermt2varv2di3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv2di3_maskz }, &operand_data[7300], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17232 */ { "avx512vl_vpermt2varv2df3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv2df3_maskz }, &operand_data[7401], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17246 */ { "avx512bw_vpermt2varv64qi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermt2varv64qi3_maskz }, &operand_data[7310], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17246 */ { "avx512vl_vpermt2varv16qi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv16qi3_maskz }, &operand_data[7315], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17246 */ { "avx512vl_vpermt2varv32qi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv32qi3_maskz }, &operand_data[7320], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17260 */ { "avx512vl_vpermt2varv8hi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv8hi3_maskz }, &operand_data[7325], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17260 */ { "avx512vl_vpermt2varv16hi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vpermt2varv16hi3_maskz }, &operand_data[7330], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17260 */ { "avx512bw_vpermt2varv32hi3_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512bw_vpermt2varv32hi3_maskz }, &operand_data[7335], 5, 5, 0, 1, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17361 */ { "avx_vperm2f128v8si3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vperm2f128v8si3 }, &operand_data[12094], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17361 */ { "avx_vperm2f128v8sf3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vperm2f128v8sf3 }, &operand_data[13877], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17361 */ { "avx_vperm2f128v4df3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vperm2f128v4df3 }, &operand_data[13881], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17467 */ { "avx512vl_vinsertv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vinsertv8si }, &operand_data[13885], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17467 */ { "avx512vl_vinsertv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vinsertv8sf }, &operand_data[13891], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17467 */ { "avx512vl_vinsertv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vinsertv4di }, &operand_data[13897], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17467 */ { "avx512vl_vinsertv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_vinsertv4df }, &operand_data[13903], 6, 6, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17495 */ { "avx_vinsertf128v32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vinsertf128v32qi }, &operand_data[13909], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17495 */ { "avx_vinsertf128v16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vinsertf128v16hi }, &operand_data[13913], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17495 */ { "avx_vinsertf128v8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vinsertf128v8si }, &operand_data[13885], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17495 */ { "avx_vinsertf128v4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vinsertf128v4di }, &operand_data[13897], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17495 */ { "avx_vinsertf128v8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vinsertf128v8sf }, &operand_data[13891], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17495 */ { "avx_vinsertf128v4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx_vinsertf128v4df }, &operand_data[13903], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17711 */ { "maskloadv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskloadv4sf }, &operand_data[13917], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17711 */ { "maskloadv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskloadv2df }, &operand_data[13920], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17711 */ { "maskloadv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskloadv8sf }, &operand_data[13923], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17711 */ { "maskloadv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskloadv4df }, &operand_data[13926], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17711 */ { "maskloadv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskloadv4si }, &operand_data[13929], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17711 */ { "maskloadv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskloadv2di }, &operand_data[13932], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17711 */ { "maskloadv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskloadv8si }, &operand_data[13935], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17711 */ { "maskloadv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskloadv4di }, &operand_data[13938], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17719 */ { "maskstorev4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskstorev4sf }, &operand_data[13941], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17719 */ { "maskstorev2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskstorev2df }, &operand_data[13944], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17719 */ { "maskstorev8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskstorev8sf }, &operand_data[13947], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17719 */ { "maskstorev4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskstorev4df }, &operand_data[13950], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17719 */ { "maskstorev4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskstorev4si }, &operand_data[13953], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17719 */ { "maskstorev2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskstorev2di }, &operand_data[13956], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17719 */ { "maskstorev8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskstorev8si }, &operand_data[13959], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17719 */ { "maskstorev4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_maskstorev4di }, &operand_data[13962], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17728 */ { "maskstorev4di+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11148], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17728 */ { "maskstorev4di+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11166], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17728 */ { "vec_initv32qi-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11172], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17748 */ { "vec_initv32qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv32qi }, &operand_data[13965], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17748 */ { "vec_initv16hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv16hi }, &operand_data[13967], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17748 */ { "vec_initv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv8si }, &operand_data[13969], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17748 */ { "vec_initv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv4di }, &operand_data[13971], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17748 */ { "vec_initv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv8sf }, &operand_data[13973], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17748 */ { "vec_initv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv4df }, &operand_data[13975], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17757 */ { "vec_initv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv16si }, &operand_data[13977], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17757 */ { "vec_initv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv16sf }, &operand_data[13979], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17757 */ { "vec_initv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv8di }, &operand_data[13981], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17757 */ { "vec_initv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv8df }, &operand_data[13983], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17757 */ { "vec_initv32hi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv32hi }, &operand_data[13985], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17757 */ { "vec_initv64qi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vec_initv64qi }, &operand_data[13987], 2, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17894 */ { "vcvtps2ph_mask", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcvtps2ph_mask }, &operand_data[13989], 5, 5, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17907 */ { "vcvtps2ph", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vcvtps2ph }, &operand_data[13989], 3, 3, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17986 */ { "avx2_gathersiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gathersiv2di }, &operand_data[13994], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17986 */ { "avx2_gathersiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gathersiv2df }, &operand_data[14001], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17986 */ { "avx2_gathersiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gathersiv4di }, &operand_data[14008], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17986 */ { "avx2_gathersiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gathersiv4df }, &operand_data[14015], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17986 */ { "avx2_gathersiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gathersiv4si }, &operand_data[14022], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17986 */ { "avx2_gathersiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gathersiv4sf }, &operand_data[14029], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17986 */ { "avx2_gathersiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gathersiv8si }, &operand_data[14036], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:17986 */ { "avx2_gathersiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gathersiv8sf }, &operand_data[14043], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18047 */ { "avx2_gatherdiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gatherdiv2di }, &operand_data[14050], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18047 */ { "avx2_gatherdiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gatherdiv2df }, &operand_data[14057], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18047 */ { "avx2_gatherdiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gatherdiv4di }, &operand_data[14064], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18047 */ { "avx2_gatherdiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gatherdiv4df }, &operand_data[14071], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18047 */ { "avx2_gatherdiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gatherdiv4si }, &operand_data[14078], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18047 */ { "avx2_gatherdiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gatherdiv4sf }, &operand_data[14085], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18047 */ { "avx2_gatherdiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gatherdiv8si }, &operand_data[14092], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18047 */ { "avx2_gatherdiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx2_gatherdiv8sf }, &operand_data[14099], 6, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512f_gathersiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gathersiv16si }, &operand_data[14106], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512f_gathersiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gathersiv16sf }, &operand_data[14114], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512f_gathersiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gathersiv8di }, &operand_data[14122], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512f_gathersiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gathersiv8df }, &operand_data[14130], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512vl_gathersiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gathersiv8si }, &operand_data[14138], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512vl_gathersiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gathersiv8sf }, &operand_data[14146], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512vl_gathersiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gathersiv4di }, &operand_data[14154], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512vl_gathersiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gathersiv4df }, &operand_data[14162], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512vl_gathersiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gathersiv4si }, &operand_data[14170], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512vl_gathersiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gathersiv4sf }, &operand_data[14178], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512vl_gathersiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gathersiv2di }, &operand_data[14186], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18159 */ { "avx512vl_gathersiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gathersiv2df }, &operand_data[14194], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512f_gatherdiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gatherdiv16si }, &operand_data[14202], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512f_gatherdiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gatherdiv16sf }, &operand_data[14210], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512f_gatherdiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gatherdiv8di }, &operand_data[14218], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512f_gatherdiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_gatherdiv8df }, &operand_data[14226], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512vl_gatherdiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gatherdiv8si }, &operand_data[14234], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512vl_gatherdiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gatherdiv8sf }, &operand_data[14242], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512vl_gatherdiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gatherdiv4di }, &operand_data[14250], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512vl_gatherdiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gatherdiv4df }, &operand_data[14258], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512vl_gatherdiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gatherdiv4si }, &operand_data[14266], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512vl_gatherdiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gatherdiv4sf }, &operand_data[14274], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512vl_gatherdiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gatherdiv2di }, &operand_data[14282], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18217 */ { "avx512vl_gatherdiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_gatherdiv2df }, &operand_data[14290], 6, 8, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512f_scattersiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scattersiv16si }, &operand_data[14298], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512f_scattersiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scattersiv16sf }, &operand_data[14305], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512f_scattersiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scattersiv8di }, &operand_data[14312], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512f_scattersiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scattersiv8df }, &operand_data[14319], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512vl_scattersiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scattersiv8si }, &operand_data[14326], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512vl_scattersiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scattersiv8sf }, &operand_data[14333], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512vl_scattersiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scattersiv4di }, &operand_data[14340], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512vl_scattersiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scattersiv4df }, &operand_data[14347], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512vl_scattersiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scattersiv4si }, &operand_data[14354], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512vl_scattersiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scattersiv4sf }, &operand_data[14361], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512vl_scattersiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scattersiv2di }, &operand_data[14368], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18283 */ { "avx512vl_scattersiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scattersiv2df }, &operand_data[14375], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512f_scatterdiv16si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scatterdiv16si }, &operand_data[14382], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512f_scatterdiv16sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scatterdiv16sf }, &operand_data[14389], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512f_scatterdiv8di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scatterdiv8di }, &operand_data[14396], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512f_scatterdiv8df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_scatterdiv8df }, &operand_data[14403], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512vl_scatterdiv8si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scatterdiv8si }, &operand_data[14410], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512vl_scatterdiv8sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scatterdiv8sf }, &operand_data[14417], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512vl_scatterdiv4di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scatterdiv4di }, &operand_data[14424], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512vl_scatterdiv4df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scatterdiv4df }, &operand_data[14431], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512vl_scatterdiv4si", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scatterdiv4si }, &operand_data[14438], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512vl_scatterdiv4sf", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scatterdiv4sf }, &operand_data[14445], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512vl_scatterdiv2di", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scatterdiv2di }, &operand_data[14452], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18319 */ { "avx512vl_scatterdiv2df", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_scatterdiv2df }, &operand_data[14459], 5, 7, 1, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512f_expandv16si_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_expandv16si_maskz }, &operand_data[11230], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512f_expandv16sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_expandv16sf_maskz }, &operand_data[11182], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512f_expandv8di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_expandv8di_maskz }, &operand_data[11242], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512f_expandv8df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512f_expandv8df_maskz }, &operand_data[11194], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512vl_expandv8si_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv8si_maskz }, &operand_data[11234], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512vl_expandv8sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv8sf_maskz }, &operand_data[11186], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512vl_expandv4di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv4di_maskz }, &operand_data[11246], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512vl_expandv4df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv4df_maskz }, &operand_data[11198], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512vl_expandv4si_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv4si_maskz }, &operand_data[11238], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512vl_expandv4sf_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv4sf_maskz }, &operand_data[11190], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512vl_expandv2di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv2di_maskz }, &operand_data[11250], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18382 */ { "avx512vl_expandv2df_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_avx512vl_expandv2df_maskz }, &operand_data[11202], 4, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18608 */ { "avx512vl_expandv2df_maskz+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[14466], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18608 */ { "avx512vl_expandv2df_maskz+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[14468], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18608 */ { "avx512vl_expandv2df_maskz+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[14470], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18628 */ { "vpamdd52huqv8di_maskz-3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11146], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18628 */ { "vpamdd52huqv8di_maskz-2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11164], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18628 */ { "vpamdd52huqv8di_maskz-1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[11170], 0, 2, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18655 */ { "vpamdd52huqv8di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv8di_maskz }, &operand_data[14472], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18655 */ { "vpamdd52huqv4di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv4di_maskz }, &operand_data[14477], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18655 */ { "vpamdd52huqv2di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52huqv2di_maskz }, &operand_data[14482], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18669 */ { "vpamdd52luqv8di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv8di_maskz }, &operand_data[14472], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18669 */ { "vpamdd52luqv4di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv4di_maskz }, &operand_data[14477], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sse.md:18669 */ { "vpamdd52luqv2di_maskz", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_vpamdd52luqv2di_maskz }, &operand_data[14482], 5, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:39 */ { "sse2_lfence", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_lfence }, &operand_data[0], 0, 0, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:58 */ { "sse_sfence", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse_sfence }, &operand_data[0], 0, 0, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:77 */ { "sse2_mfence", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_sse2_mfence }, &operand_data[0], 0, 0, 2, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:104 */ { "mem_thread_fence", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_mem_thread_fence }, &operand_data[109], 1, 1, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:146 */ { "atomic_loadqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_loadqi }, &operand_data[14487], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:146 */ { "atomic_loadhi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_loadhi }, &operand_data[14490], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:146 */ { "atomic_loadsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_loadsi }, &operand_data[14493], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:146 */ { "atomic_loaddi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_loaddi }, &operand_data[14496], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:174 */ { "atomic_loaddi+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[14499], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:213 */ { "atomic_storeqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_storeqi }, &operand_data[14503], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:213 */ { "atomic_storehi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_storehi }, &operand_data[14506], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:213 */ { "atomic_storesi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_storesi }, &operand_data[14509], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:213 */ { "atomic_storedi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_storedi }, &operand_data[14512], 3, 3, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:262 */ { "atomic_storedi+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[14515], 0, 4, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:329 */ { "atomic_compare_and_swapqi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapqi }, &operand_data[14519], 8, 8, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:329 */ { "atomic_compare_and_swaphi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swaphi }, &operand_data[14527], 8, 8, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:329 */ { "atomic_compare_and_swapsi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapsi }, &operand_data[14535], 8, 8, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:353 */ { "atomic_compare_and_swapdi", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapdi }, &operand_data[14543], 8, 8, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:442 */ { "atomic_compare_and_swapdi+1", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[14551], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:442 */ { "atomic_compare_and_swapdi+2", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[14556], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:442 */ { "atomic_compare_and_swapdi+3", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[14561], 0, 5, 0, 0, 0 }, /* ../../gcc-5.1.0/gcc/config/i386/sync.md:442 */ { "atomic_compare_and_swapdi+4", #if HAVE_DESIGNATED_UNION_INITIALIZERS { 0 }, #else { 0, 0, 0 }, #endif { 0 }, &operand_data[14566], 0, 5, 0, 0, 0 }, }; const char * get_insn_name (int code) { if (code == NOOP_MOVE_INSN_CODE) return "NOOP_MOVE"; else return insn_data[code].name; }