commit 906a0ec9224146098bb4581486129d2934d36495
Author: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Date:   Wed Jun 25 16:10:21 2014 +0200

    bump version for release

commit cc615d06db0332fc6e673b55632bcc7bf957b44b
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Wed Jun 4 16:58:53 2014 +0900

    Rename Option "NoAccel" to "Accel"
    
    Removes the need for a double negation when forcing acceleration on.
    
    Note that this change is backwards compatible, as the option parser
    automagically handles the 'No' prefix.
    
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit 851b2cf8714618843725f6d067915375485ade9d
Author: Adam Jackson <ajax@redhat.com>
Date:   Wed May 21 09:34:32 2014 -0400

    kms: Use own thunk function instead of shadowUpdatePackedWeak
    
    I plan to delete the Weak functions from a future server.
    
    Signed-off-by: Adam Jackson <ajax@redhat.com>

commit b2dba2906f0b2284f17f53fd5251ba0f03d52a8b
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Thu May 15 16:07:53 2014 +0900

    Don't disable acceleration on >= SI on attempts to force EXA
    
    Also make this case clear in the log file:
    
     (WW) RADEON(0): EXA not supported, using glamor
    
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit be1469cc23aba46daf3293b3d09c5f2e792e7f42
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Fri May 2 17:48:07 2014 -0400

    radeon: enable tiling for mullins
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 2ae8e4b8d12f5c9bab6655eb8cd3c5c1d5cfb10e
Author: Samuel Li <samuel.li@amd.com>
Date:   Tue Nov 12 15:30:42 2013 -0500

    radeon: add Mullins pci ids.
    
    Signed-off-by: Samuel Li <samuel.li@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

commit 5c86a3461597647224c33d5190b4531aeeb2655f
Author: Samuel Li <samuel.li@amd.com>
Date:   Thu Apr 17 15:17:28 2014 -0400

    radeon: add support for Mullins.
    
    Signed-off-by: Samuel Li <samuel.li@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

commit fdb90ffc50acbb7d5ba0598470f9feeac6ce55fc
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Fri May 2 17:45:45 2014 -0400

    radeon: require libdrm_radeon 2.4.54 for mullins support
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 06e3c8c53ef4bd159f5864eabf726438d008b49a
Author: Dave Airlie <airlied@redhat.com>
Date:   Wed Apr 23 13:39:42 2014 +1000

    radeon: fix use-after-free in modesetting cleanup
    
    noticed while looking at something else.
    
    Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
    Signed-off-by: Dave Airlie <airlied@redhat.com>

commit dbac18c361f9e514ecb40d0617f9d68b65a542e0
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Mon Apr 28 17:51:56 2014 +0900

    Revert "Adapt to load_cursor_argb signature change in xserver 1.15.99.902"
    
    This reverts commit 48d3dbc8a0d3bfde88f46e402e530438f9317715.
    
    xserver Git has been updated to be backwards compatible with the
    previous API.

commit c84230d686c078aac1dc98d82153f8b02521b2e1
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Fri Apr 25 09:17:51 2014 +0900

    dri2: Handle PRIME for source buffer as well in radeon_dri2_copy_region2
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77810
    
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit 48d3dbc8a0d3bfde88f46e402e530438f9317715
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Tue Apr 15 17:45:35 2014 +0900

    Adapt to load_cursor_argb signature change in xserver 1.15.99.902
    
    Apart from the compiler warning below, not doing this may result in
    accidentally using software cursors.
    
    ../../src/drmmode_display.c:808:5: warning: initialization from incompatible pointer type [enabled by default]
         .load_cursor_argb = drmmode_load_cursor_argb,
         ^
    ../../src/drmmode_display.c:808:5: warning: (near initialization for 'drmmode_crtc_funcs.load_cursor_argb') [enabled by default]
    
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit 409786a8f780d78a83bf0bddea5d37117ff6fa39
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Thu Apr 10 11:43:04 2014 +0900

    glamor: Fix test for creating shared pixmaps
    
    The pixmap usage hint is not a bitmask in general. The test for
    CREATE_PIXMAP_USAGE_SHARED was incorrectly triggering for a glamor internal
    usage hint being added in the xserver tree.
    
    Tested-by: Ed Tomlinson <edtoml@gmail.com>

commit aecf1c4e5f4718adcfb85836830d065d3f4f97a5
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Thu Apr 10 15:10:56 2014 +0900

    dri2: Fix conflicting CreatePixmap usage flag definitions
    
    RADEON_CREATE_PIXMAP_TILING_MICRO_SQUARE was the same as
    RADEON_CREATE_PIXMAP_DRI2.
    
    Disambiguate the definitions and rearrange them to try and prevent this
    from happening again.
    
    Tested-by: Ed Tomlinson <edtoml@gmail.com>

commit b50da3b96c212086cb58501dbe988d64f1f35b6d
Author: Hans de Goede <hdegoede@redhat.com>
Date:   Fri Apr 11 09:44:37 2014 +0200

    Fix building on older servers without xf86platformBus.h
    
    Signed-off-by: Hans de Goede <hdegoede@redhat.com>

commit ed0cfbb4fe77146b0b38f777bc28f3a4ea6da07f
Author: Hans de Goede <hdegoede@redhat.com>
Date:   Fri Mar 7 13:27:30 2014 +0100

    Add support for server managed fds
    
    Signed-off-by: Hans de Goede <hdegoede@redhat.com>

commit 3d7861fe112f25874319d4cdc12b745fbcd359cf
Author: Hans de Goede <hdegoede@redhat.com>
Date:   Mon Mar 17 10:38:13 2014 +0100

    Add radeon_get_drm_master_fd helper function
    
    This is a preparation patch for adding server-managed-fd support without it
    turning into a goto fest.
    
    Signed-off-by: Hans de Goede <hdegoede@redhat.com>

commit a63342ad15408071437c80b411d14196f3288aed
Author: Hans de Goede <hdegoede@redhat.com>
Date:   Mon Mar 17 10:36:55 2014 +0100

    radeon_open_drm_master get rid of unnecessary goto
    
    Signed-off-by: Hans de Goede <hdegoede@redhat.com>

commit bdc412044f6ced056cd57320d1b2ee0d967c2191
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Thu Mar 13 16:40:19 2014 +0900

    Build against glamor in the xserver tree if available

commit 921a153f9964ca452e1241f76c7f7d653f42ceaf
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Tue Mar 11 12:24:13 2014 -0400

    update man page to reflect tiling changes for CI parts
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 5eee8a4d5c86bb1cc34d8caf2f2b64b53c241fa5
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Mon Mar 10 16:20:09 2014 -0400

    radeon: enable tiling by default on CIK
    
    Now that mesa 10.1 is released, we can enable this by
    default for CIK parts.  Tiling improves memory bandwidth
    utilization.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

commit 691ec3d99c30111a4789830dfccb6eb5d3c40187
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Mon Mar 10 16:17:34 2014 -0400

    radeon: require libdrm 2.4.51
    
    Required for proper tiling support on CIK parts.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

commit 515bcf14d514f9dcaaf30fd0bf1ef6dd6ba9a0cd
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Tue Mar 4 12:34:26 2014 +0900

    Allow enabling glamor on R500 (and R300) class 3D engines as well.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75709
    
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit ea6d0affe52d82becadab6fb1c87f9261b0605a2
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Mon Feb 24 13:12:21 2014 +0900

    Only log debugging output about initializing colormaps when we're doing so
    
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit 8da17f30c70f4494ce22ad781a1cee17041812f3
Author: Jérôme Glisse <jglisse@redhat.com>
Date:   Mon Feb 24 14:50:25 2014 -0500

    evergreen: fix shader constant upload on ppc
    
    The number of dword we have to swap is (16*4) ie 16 vectors of
    4 floats each not 16 floats. Never hit this issue before because
    we never had more than 4 constant vector.
    
    Signed-off-by: Jérôme Glisse <jglisse@redhat.com>

commit cadb6b493942a84bfeb298751dce0dee39257a06
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Fri Feb 21 08:33:21 2014 -0500

    radeon: don't install colormap handling if there are no crtcs
    
    Fixes a crash on cards with 0 crtcs.
    
    Discussion:
    http://lists.freedesktop.org/archives/dri-devel/2014-February/054186.html
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 7cd972a85705341dd8306eefc558ed9e5def05d7
Author: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Date:   Thu Feb 20 11:14:03 2014 +0100

    return immediately in preinit when called with PROBE_DETECT
    
    This fixes a crash with Xorg -configure.
    
    Bug:
    https://bugs.launchpad.net/ubuntu/+source/xorg/+bug/1278046
    
    Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit 8de6f7b2f476d3baa9c7e2bb3544e4bafaad46b7
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Fri Jan 24 11:04:30 2014 -0500

    bump version post release
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 0333f5bda27dc0ec2edc180c7a4dc9a432f13f97
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Fri Jan 24 10:19:49 2014 -0500

    radeon: bump version for release
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit fc4167f2a85d9cba65078d8fc6f08c7a619ad66e
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Fri Jan 24 10:17:08 2014 -0500

    Require glamor 0.6.0
    
    This is required for Xv support and a number of important
    performance improvements.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit f2a0a5cf6c5a21e2a02280e110a4eb8e6609dace
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Wed Jan 22 11:04:42 2014 +0900

    Don't require the glamoregl module to be pre-loaded with xserver >= 1.15
    
    The issues with loading it on demand have been fixed in xserver 1.15.
    
    Inspired by Jérôme Glisse on IRC.

commit 3213df16d61302148be0088c8f93c6a5a88558f1
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Wed Jan 8 11:30:59 2014 +0900

    dri2: Make last_vblank_seq local unsigned to match dpms_last_seq
    
    Without this, I was occasionally running into gnome-shell hangs due to
    wildly off vblank sequence values. Doesn't seem to happen anymore with
    this change.
    
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit bcc454ea2fb239e13942270faec7801270615b9c
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Mon Jan 6 09:52:50 2014 -0500

    radeon/exa: Always use a scratch surface for UTS to vram
    
    If we don't, we may hit a buffer that crosses the
    visible vram boundary resulting in a sigbus when the
    CPU accesses the buffer beyond the PCI aperture.
    This will introduce an extra copy in certain cases.
    
    This is based on Michel's patch from bug 44099 updated
    for all asic families.
    
    Bug:
    https://bugs.freedesktop.org/show_bug.cgi?id=44099
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

commit 04ef035c9315b4a6fbf1b14720be87cee4099a9f
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Tue Dec 24 15:14:35 2013 -0500

    drm/radeon: fix SUMO2 pci id
    
    0x9649 is sumo2, not sumo.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit bfbff3b246db509c820df17b8fcf5899882ffcfa
Author: Robert Millan <rmh@freebsd.org>
Date:   Fri Dec 20 11:03:14 2013 +0000

    radeon: Restore kernel module load on FreeBSD.
    
    Since the introduction of a call to drmCheckModesettingSupported()
    in radeon_kernel_mode_enabled(), with abort condition if such call
    fails, the drmOpen() call in radeon_open_drm_master() no longer
    takes the responsibility of loading the radeon kernel module.
    
    However at least on FreeBSD (and GNU/kFreeBSD), X is still relied
    on to load the modules it needs. This commit restores the old
    behaviour of loading kernel modules on these systems.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72852
    Signed-off-by: Robert Millan <rmh@freebsd.org>

commit 796c9a0cb587f528326bede11fa3f3eb7d3edaf1
Author: Robert Millan <rmh@freebsd.org>
Date:   Fri Dec 20 10:55:09 2013 +0000

    radeon: Set first parameter of drmOpen() to NULL
    
    Since the introduction of a call to drmCheckModesettingSupported()
    in radeon_kernel_mode_enabled(), with abort condition if such call
    fails, the first argument to drmOpen() call in radeon_open_drm_master()
    has become a no-op red herring.
    
    Such argument (a kernel module name) is supposed to result in load
    of specified kernel module. However, this will never happen. The
    problem is that if the code containing drmOpen() call is reached, it
    means that drmCheckModesettingSupported() check has previously
    succeeded, which implies the module is already loaded.
    
    So, drmOpen() will never load a kernel module. But it gives the
    impression that it will.
    
    In order to avoid this confusion, this commit replaces it with NULL,
    like xf86-video-intel driver does.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72849
    Signed-off-by: Robert Millan <rmh@freebsd.org>

commit d571d6af70ef27efd1ed6420eb892bdde963ed7a
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Tue Sep 24 11:39:10 2013 -0400

    radeon/kms: add Hawaii pci ids
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit e38a92e00d015a6b80a1f3a16d58c61f084b066f
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Tue Sep 24 11:35:00 2013 -0400

    radeon: add support for Hawaii
    
    Disabled by default until the acceleration code stablizes.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit e4cd0f4392ea11c93088ad429f36eaaf9bcbf505
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Wed Oct 30 15:21:26 2013 -0400

    radeon: enable tiling on SI by default (v2)
    
    Now that mesa 9.2 is out with support for tiling
    on SI asics, we can enable it here. Tiling improves
    memory bandwidth utilization.
    
    V2: update man page
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 3b38701a72fa1cad1e4610a2f4330b3da4cc6391
Author: Vadim Girlin <vadimgirlin@gmail.com>
Date:   Fri Nov 1 10:36:39 2013 -0400

    radeon: disable 2D tiling on buffers < 128 pixels
    
    Seems to run into alignment problems with certain
    card configurations.
    
    bug:
    https://bugs.freedesktop.org/show_bug.cgi?id=70675
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 0c921edf0162fed616cea9d02e168b719243bcd2
Author: Jerome Glisse <jglisse@redhat.com>
Date:   Wed Oct 30 13:01:02 2013 -0400

    radeon/glamor: with new pixmap for dri2 drawable no need to create new texture
    
    When creating a new pixmap/bo for dri2 drawable there is no need to create a
    new texture, instead the texture associated with the new pixmap should be use
    otherwise there is a missmatch between the bo backing the texture for the
    drawable and the bo used by dri2 client.
    
    Signed-off-by: Jerome Glisse <jglisse@redhat.com>
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit f1dc677e79cd7a88d7379a934ebc7d87a3b18805
Author: Christopher James Halse Rogers <raof@ubuntu.com>
Date:   Mon Sep 23 12:25:29 2013 -0700

    EXA/evergreen: Paranoia around linear tiling. (v2)
    
    The last two bytes of tiling_mode contain the actual tiling mode; the rest are
    extra tiling configuration bits. These configuration bits are not necessarily
    zero for a linear buffer, so mask them out before checking for linearity
    
    v2: Also fix up evergreen_textured_videofuncs.c
    
    agd5f: remove trailing whitespace
    
    Signed-off-by: Christopher James Halse Rogers <raof@ubuntu.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 67fb82a3f0759b171fea21b475a70fa825693570
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Tue Oct 1 09:35:30 2013 -0400

    radeon: fix the non-glamor build harder...
    
    I need to stop pushing patches first thing in the morning.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit afc0374fdec3e24ece25805724459463e9a19f5e
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Tue Oct 1 09:32:02 2013 -0400

    drm/radeon: fix non-glamor build
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 2d791370dfc5570eb74d7a1fb3baf4d4c8ecf243
Author: Dave Airlie <airlied@redhat.com>
Date:   Mon Sep 23 07:57:15 2013 +0100

    radeon: use glamor Xv support if present.
    
    This creates adaptors using glamor if possible.
    
    Signed-off-by: Dave Airlie <airlied@redhat.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit cbb99f659ee7b18ded0008a606e41ded38c1a194
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Mon Sep 30 08:55:16 2013 -0400

    Revert "radeon: add glamor Xv support (v2)"
    
    This causes problems if glamor doesn't have Xv support
    enabled.  I just noticed that Dave has a better version,
    so use that instead.
    
    This reverts commit 4fc1fa920584ace2c84d75af82d06962d0c84ec8.

commit 4fc1fa920584ace2c84d75af82d06962d0c84ec8
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Thu Sep 26 11:02:55 2013 -0400

    radeon: add glamor Xv support (v2)
    
    v2: guard new glamor Xv bits with USE_GLAMOR
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

commit 41dfe327ac8740ac2cd84def96b5947224e422e7
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Thu Sep 26 11:00:49 2013 -0400

    radeon: fix limit handling for cards with >4G of ram
    
    We can overflow the 32-bit limit.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

commit c45e728107269c6f51599dad4f6a02ccfef703f1
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Wed Sep 18 10:57:52 2013 +0200

    DRI2: Install client callback only once
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60182
    Acked-by: Alex Deucher <alexander.deucher@amd.com>

commit b955ddd0d41801e4ca0c30a70a5d0b27c3f366c8
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Mon Sep 16 10:58:22 2013 -0400

    glamor: require 0.5.1 or newer
    
    0.5.1 fixes a number of issues.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 282587cd0709850e7bacb1d8307065d95dc2c97d
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Mon Sep 16 09:41:13 2013 -0400

    radeon: enable glamor by default (v4)
    
    It's required for newer asics, so enable it by
    default.
    
    v2: update the autoconf help.  Require --disable-glamor
    to build without glamor support.
    v3: default to yes rather than auto
    v4: fix help text
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

commit fdb7563a5cbc736b09c2864b67a93b475c98b2bd
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Thu Jan 24 21:17:11 2013 -0500

    radeon/kms: add berlin pci ids
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 8927d33f76ee12bc618fecfc59fc7ff1fcedcd5e
Author: Mark Kettenis <kettenis@openbsd.org>
Date:   Thu Aug 22 10:32:46 2013 -0400

    Fix shadowfb on big-endian machines
    
    For shadowfb, the framebuffer needs to have the RADEON_TILING_SURFACE
    flag set, otherwise the appropriate byte swapping won't happen.
    
    See https://bugs.freedesktop.org/show_bug.cgi?id=66663
    
    Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit fa83d3d1636c315bc43dd622d407eb058e3ef976
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Tue Aug 20 09:29:23 2013 -0400

    radeon: disallow glamor on pre-R600 asics
    
    I'm not sure they can handle the shaders properly, especially
    only older parts like r300.
    
    This will avoid display corruption problems reported by people
    using glamor on older asics by falling back to EXA if they try
    and enable glamor.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

commit d0323622ee9b97a5f246baffbb2c65930a78ed14
Author: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Date:   Wed Aug 7 11:27:07 2013 +0200

    bump version post release
    
    Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>

commit 9c97cca5c24409ca8447c99f051a12fd2d494e79
Author: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Date:   Wed Aug 7 10:48:17 2013 +0200

    radeon: bump version for release
    
    Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>

commit 16270cfb202ab67dd152644ef019b2f1ee4d0341
Author: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Date:   Wed Aug 7 10:29:33 2013 +0200

    add bicubic_table.py to EXTRA_DIST
    
    Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>

commit 2cb9197ca7a337c911f38b5de562a2364b922b86
Author: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Date:   Wed Aug 7 10:28:52 2013 +0200

    kill unused radeon_driver.c
    
    Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>

commit c5cbfcf575b0b4aea6f797558ae974c1453c8e07
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Tue Jul 30 10:08:25 2013 -0400

    drmmode: add support for multi-screen reverse optimus
    
    Initial reverse optimus didn't consider multiple screens, so
    this overhauls the code to use the new X server interface,
    and allows for multiple outputs on the dGPU to be used with
    the iGPU doing the rendering.  Ported from Dave's nouveau
    patch.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 429d5b797769895eb4f5fef816ce4e2f3a342031
Author: Dave Airlie <airlied@redhat.com>
Date:   Tue Jan 8 15:56:37 2013 +1000

    radeon: add support for reverse prime (v2)
    
    This adds support for reverse prime configurations
    
    v2: fix compilation with older xservers
    
    Signed-off-by: Alex Deucher <alexdeucher@gmail.com>

commit 4de9356a2900ae0fb380a2350791ef045629cd05
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Mon Aug 5 17:57:16 2013 -0400

    radeon: fix naming clashes with multiple GPUs (v3)
    
    The compat naming code for UMS causes problems
    with multiple GPU as you may end up with the same
    output name on multiple GPUs.  Adjust the naming on
    secondary GPUs to avoid conflicts.
    
    v2: integrate Dave's fixes for nouveau
    v3: keep compat with existing naming on primary GPU
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 2ae6bb18fefddb309920fa69c9b56c3a7f3db7b4
Author: Grigori Goronzy <greg@chown.ath.cx>
Date:   Wed Jul 31 12:01:20 2013 +0200

    EXA/evergreen/ni: replace magic number
    
    Signed-off-by: Alex Deucher <alexdeucher@gmail.com>

commit 6a278369c05a298a4367306d986467a9ceacae8c
Author: Raul Fernandes <rgfernandes@gmail.com>
Date:   Tue Jul 30 09:26:05 2013 -0400

    EXA/6xx/7xx: optimize non-overlapping Copy
    
    In case dst and src rectangles of a Copy operation in the same surface
    don't overlap, it is safe to skip the scratch surface. This is a
    common case.
    
    Based on evergreen/ni patch from Grigori Goronzy.
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 4375a6e75e5d41139be7031a0dee58c057ecbd07
Author: Grigori Goronzy <greg@chown.ath.cx>
Date:   Mon Jul 22 02:30:28 2013 +0200

    EXA/evergreen/ni: accelerate PictOpOver with component alpha
    
    Subpixel text rendering is typically done with a solid src and a
    pixmap mask. Traditionally, this cannot be accelerated in a single
    pass and requires two passes [1]. However, we can cheat a little
    with a constant blend color.
    
    We can use:
    
    const.A = src.A / src.A
    const.R = src.R / src.A
    const.G = src.G / src.A
    const.B = src.B / src.A
    
    dst.A = const.A * (src.A * mask.A) + (1 - (src.A * mask.A)) * dst.A
    dst.R = const.R * (src.A * mask.R) + (1 - (src.A * mask.R)) * dst.R
    dst.G = const.G * (src.A * mask.G) + (1 - (src.A * mask.G)) * dst.G
    dst.B = const.B * (src.A * mask.B) + (1 - (src.A * mask.B)) * dst.B
    
    This only needs a single source value. src.A is cancelled down in
    the right places.
    
    [1] http://anholt.livejournal.com/32058.html

commit 94d0d14914a025525a0766669b556eaa6681def7
Author: Grigori Goronzy <greg@chown.ath.cx>
Date:   Thu Jul 18 16:06:23 2013 +0200

    EXA/evergreen/ni: fast solid pixmap support
    
    Solid pixmaps are currently implemented with scratch pixmaps, which
    is slow. This replaces the hack with a proper implementation. The
    Composite shader can now either sample a src/mask or use a constant
    value.

commit 5bb04351c43a91a1d60348b7293544da05d75e72
Author: Grigori Goronzy <greg@chown.ath.cx>
Date:   Fri Jul 27 17:31:53 2012 +0200

    EXA/evergreen/ni: optimize non-overlapping Copy
    
    In case dst and src rectangles of a Copy operation in the same surface
    don't overlap, it is safe to skip the scratch surface. This is a
    common case.

commit c08e09b7bec441c4bf93b4cae4de1260754bf940
Author: Grigori Goronzy <greg@chown.ath.cx>
Date:   Sat May 18 13:46:03 2013 +0200

    Fix RADEON_FALLBACK logging

commit c16c59f8f9b6aa7a4a6a6465582ad98f02a3606a
Author: Mark Kettenis <kettenis@openbsd.org>
Date:   Sun Jul 7 13:44:13 2013 +0200

    Always go through DFS/UTS when byte swapping is needed.
    
    Before commit ef9bfb262db7004bef3704e5d914687e50d3fca4 and
    e5bd99faa3b6629a55168386d5dfa936ee4e97ae, byte swapping for the front buffer
    used to be done in hardware.  Now that this no longer happens we need to let
    DFS/UTS ihandle the byte swapping.
    
    See https://bugs.freedesktop.org/show_bug.cgi?id=66663 .
    
    Signed-off-by: Mark Kettenis <kettenis@openbsd.org>

commit 1239dbbd8c8d9b55756c1de52cad353171a06522
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Sun Jul 7 20:22:10 2013 -0400

    radeon: bump libdrm requirement to 2.4.46 for CIK support
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 869e0b187b2d07e637c4482fe50d9f1b0c09f4e4
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Thu Jan 24 21:12:28 2013 -0500

    radeon/kms: add kabini pci ids
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 0edcefc4c97e4572431c38fe170032470e22e0b7
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Fri Jun 7 14:56:26 2013 -0400

    radeon/kms: add bonaire pci ids
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit ebc32b27af25b23604e725eb50d844a8d26116bb
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Fri Aug 31 18:17:24 2012 -0400

    radeon: update cursor handling for CIK
    
    CIK asics have 128x128 hw cursors
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 4adaea996454b1ad5185f9c0f37667dbfc266495
Author: Alex Deucher <alexander.deucher@amd.com>
Date:   Fri Jun 7 14:47:36 2013 -0400

    radeon: add family ids for CIK
    
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

commit 3626ab147b6749a355e7d21710447f13b9796c77
Author: Leo Liu <leo.liu@amd.com>
Date:   Fri Jun 14 10:27:20 2013 -0400

    radeon: fix a memory leak in get_modes() callback.
    
    leak happens when looping xrandr prop.
    
    Signed-off-by: Leo Liu <leo.liu@amd.com>
    Signed-off-by: Alex Deucher <alexdeucher@gmail.com>

commit c0f7d03cb29166c6c00dd6fb698ba3f70c59dbdf
Author: Alex Deucher <alexdeucher@gmail.com>
Date:   Mon Jun 17 11:38:27 2013 -0400

    man: fix up previous commit
    
    Signed-off-by: Alex Deucher <alexdeucher@gmail.com>

commit 03b5edc9dd3859eed2504155970613aaf88df852
Author: Eric S. Raymond <esr@thyrsus.com>
Date:   Fri Jun 7 13:23:14 2013 -0400

    Fix some incomplete list entries.
    
    This necessarily involved adding some content, which I was able to
    Google for.  Please review, correct, and make more specific.
    
    Bodiless .TP entries screw up doclifter's page parsing.  Please
    don't do that anymore.

commit 7ce43639a8e53eefb94e5255a39c1232b6bdbf66
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Thu Jun 6 09:58:27 2013 +0200

    autogen.sh: Restore passing --enable-maintainer-mode to configure
    
    Looks like this was accidentally dropped when the GNOME Build API was
    implemented.

commit 365e571d9de0b5979425c34210789afca4ea5f68
Author: Samuel Li <samuel.li@amd.com>
Date:   Wed Mar 20 11:59:58 2013 -0400

    radeon: use direct mapping for fast fb access.
    
    Signed-off-by: Samuel Li <samuel.li@amd.com>

commit bd2557ea5ef84b975060e929d5ece53ec464336f
Author: Ilija Hadzic <ilijahadzic@gmail.com>
Date:   Wed May 8 22:39:48 2013 -0400

    DRI2: add interpolated blanks to frame number in event handlers
    
    The 'frame' argument passed to event handlers is the plain
    CRTC vblank counter that stops progressing when the
    associated display is in DPMS-off mode. If we have a
    DPMS-off period the frame counter and MSC will
    diverge, which can cause some higher-level functions
    to return incorrect values.
    
    This patch fixes the problem by adding interpolated
    vblanks to the frame counter before using it in handler
    functions.
    
    Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit 385a92b4fbe8f53b359ef6c463704414d00476fa
Author: Ilija Hadzic <ilijahadzic@gmail.com>
Date:   Wed May 8 22:39:47 2013 -0400

    DRI2: support scheduling emulated events with zero delay
    
    Now that we fully emulating a running CRTC through DPMS-off state
    it is possible to come up with a zero delay when scheduling
    a swap or MSC-wait (e.g., if a call into respective wait function
    was entered very late). This patch wraps the TimerSet function
    into our own radeon_dri2_schedule_event such that the latter
    calls the event right away if zero delay is specified.
    
    Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit e87b52e6ad41ad7a87e43b818d80e7d522d9c68d
Author: Ilija Hadzic <ilijahadzic@gmail.com>
Date:   Wed May 8 22:39:46 2013 -0400

    DRI2: make wait_msc and get_msc work on disabled CRTCs
    
    Now that the running CRTC is emulated through DPMS-off
    states, wait_msc and get_msc must also work on disabled
    CRTCs. When CRTC is disabled, we must extrapolate the
    MSC count from present time and last MSC when CRTC was
    running and also use timers facility in wait_msc.
    
    v2: CRTC-private now stores frame rate instead of nominal
        vblank period.
    
    Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit f1584152bbeda98cc1907359f1c7954a84c8837d
Author: Ilija Hadzic <ilijahadzic@gmail.com>
Date:   Wed May 8 22:39:45 2013 -0400

    DRI2: move rename and rework radeon_dri2_deferred_swap
    
    radeon_dri2_deferred_swap will be used to generate
    real events (not just fallbacks) so now it needs to
    generate real timestamp and frame counter. Also
    this function will be used both by schedule_swap
    and wait_msc, so give it a more generic name:
    radeon_dri2_deferred_event
    
    v2: - Extrapolate the frame number from the time
          of actual execution of the function instead
          of using the MSC calculated (extrapolated)
          at event scheduling time.
        - CRTC-private now stores frame rate instead of
          nominal vblank period.
    
    Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit 84bce7943b735aee19e26be4d47fdf140564f3f5
Author: Ilija Hadzic <ilijahadzic@gmail.com>
Date:   Wed May 8 22:39:44 2013 -0400

    DRI2: track CRTC in event record
    
    Tracking the CRTC associated with an event will save us
    some lookups later in event handlers.
    
    Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit e40d5390b3efdea3e02267413350410d8e6a2970
Author: Ilija Hadzic <ilijahadzic@gmail.com>
Date:   Wed May 8 22:39:43 2013 -0400

    DRI2: hook up vblank extrapolation to schedule_swap
    
    This patch hooks up swap-scheduling function with
    vblank-extrapolation function. Rather than waiting for
    fixed time, we calculate exactly how much we should wait
    and what we should update target_msc to using
    radeon_dri2_extrapolate_msc_delay helper function
    and schedule the swap completion using DIX's timer facility.
    
    Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

commit ffaa5abf207415159cdb28e90da49b95f497ef61
Author: Ilija Hadzic <ilijahadzic@gmail.com>
Date:   Wed May 8 22:39:42 2013 -0400

    DRI2: add vblank extrapolation function
    
    Implement a helper function that will be called when emulating
    the running CRTC. The function should be called only when CRTC
    is in DPMS-off state. It will look at the vblank count and the
    time that was recorded last time the CRTC was running and
    calculate how long one must wait (from present time) until
    the target_msc is reached if the CRTC were running.
    
    v2: - CRTC-private now stores frame rate instead of nominal
          vblank period.
        - DIX's timer facility can sometimes wake up the scheduled
          functions more than a millisecond earlier. To avoid
          generating an old MSC, we have to add more margin when
          converting the delay in microseconds to milliseconds.
    
    Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
