3549 mmMM_INDEX 0 0x0 2 0 4294967295 MM_OFFSET 0 30 MM_APER 31 31 mmMM_INDEX_HI 0 0x6 1 0 4294967295 MM_OFFSET_HI 0 31 mmMM_DATA 0 0x1 1 0 4294967295 MM_DATA 0 31 mmBIF_MM_INDACCESS_CNTL 0 0x1500 1 0 4294967295 MM_INDACCESS_DIS 1 1 mmBUS_CNTL 0 0x1508 14 0 4294967295 BIOS_ROM_WRT_EN 0 0 BIOS_ROM_DIS 1 1 PMI_IO_DIS 2 2 PMI_MEM_DIS 3 3 PMI_BM_DIS 4 4 PMI_INT_DIS 5 5 VGA_REG_COHERENCY_DIS 6 6 VGA_MEM_COHERENCY_DIS 7 7 BIF_ERR_RTR_BKPRESSURE_EN 8 8 SET_AZ_TC 10 12 SET_MC_TC 13 15 ZERO_BE_WR_EN 16 16 ZERO_BE_RD_EN 17 17 RD_STALL_IO_WR 18 18 mmCONFIG_CNTL 0 0x1509 4 0 4294967295 CFG_VGA_RAM_EN 0 0 VGA_DIS 1 1 GENMO_MONO_ADDRESS_B 2 2 GRPH_ADRSEL 3 4 mmCONFIG_MEMSIZE 0 0x150a 1 0 4294967295 CONFIG_MEMSIZE 0 31 mmCONFIG_F0_BASE 0 0x150b 1 0 4294967295 F0_BASE 0 31 mmCONFIG_APER_SIZE 0 0x150c 1 0 4294967295 APER_SIZE 0 31 mmCONFIG_REG_APER_SIZE 0 0x150d 1 0 4294967295 REG_APER_SIZE 0 19 mmBIF_SCRATCH0 0 0x150e 1 0 4294967295 BIF_SCRATCH0 0 31 mmBIF_SCRATCH1 0 0x150f 1 0 4294967295 BIF_SCRATCH1 0 31 mmBX_RESET_EN 0 0x1514 3 0 4294967295 COR_RESET_EN 0 0 REG_RESET_EN 1 1 STY_RESET_EN 2 2 mmMM_CFGREGS_CNTL 0 0x1513 2 0 4294967295 MM_CFG_FUNC_SEL 0 2 MM_WR_TO_CFG_EN 3 3 mmHW_DEBUG 0 0x1515 32 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 HW_16_DEBUG 16 16 HW_17_DEBUG 17 17 HW_18_DEBUG 18 18 HW_19_DEBUG 19 19 HW_20_DEBUG 20 20 HW_21_DEBUG 21 21 HW_22_DEBUG 22 22 HW_23_DEBUG 23 23 HW_24_DEBUG 24 24 HW_25_DEBUG 25 25 HW_26_DEBUG 26 26 HW_27_DEBUG 27 27 HW_28_DEBUG 28 28 HW_29_DEBUG 29 29 HW_30_DEBUG 30 30 HW_31_DEBUG 31 31 mmMASTER_CREDIT_CNTL 0 0x1516 2 0 4294967295 BIF_MC_RDRET_CREDIT 0 6 BIF_AZ_RDRET_CREDIT 16 21 mmSLAVE_REQ_CREDIT_CNTL 0 0x1517 6 0 4294967295 BIF_SRBM_REQ_CREDIT 0 4 BIF_VGA_REQ_CREDIT 5 8 BIF_HDP_REQ_CREDIT 10 14 BIF_ROM_REQ_CREDIT 15 15 BIF_AZ_REQ_CREDIT 20 20 BIF_XDMA_REQ_CREDIT 25 30 mmBX_RESET_CNTL 0 0x1518 1 0 4294967295 LINK_TRAIN_EN 0 0 mmINTERRUPT_CNTL 0 0x151a 8 0 4294967295 IH_DUMMY_RD_OVERRIDE 0 0 IH_DUMMY_RD_EN 1 1 IH_REQ_NONSNOOP_EN 3 3 IH_INTR_DLY_CNTR 4 7 GEN_IH_INT_EN 8 8 GEN_GPIO_INT_EN 9 12 SELECT_INT_GPIO_OUTPUT 13 14 BIF_RB_REQ_NONSNOOP_EN 15 15 mmINTERRUPT_CNTL2 0 0x151b 1 0 4294967295 IH_DUMMY_RD_ADDR 0 31 mmBIF_DEBUG_CNTL 0 0x151c 12 0 4294967295 DEBUG_EN 0 0 DEBUG_MULTIBLOCKEN 1 1 DEBUG_OUT_EN 2 2 DEBUG_PAD_SEL 3 3 DEBUG_BYTESEL_BLK1 4 4 DEBUG_BYTESEL_BLK2 5 5 DEBUG_SYNC_EN 6 6 DEBUG_SWAP 7 7 DEBUG_IDSEL_BLK1 8 12 DEBUG_IDSEL_BLK2 16 20 DEBUG_IDSEL_XSP 24 24 DEBUG_SYNC_CLKSEL 30 31 mmBIF_DEBUG_MUX 0 0x151d 2 0 4294967295 DEBUG_MUX_BLK1 0 5 DEBUG_MUX_BLK2 8 13 mmBIF_DEBUG_OUT 0 0x151e 1 0 4294967295 DEBUG_OUTPUT 0 16 mmHDP_REG_COHERENCY_FLUSH_CNTL 0 0x1528 1 0 4294967295 HDP_REG_FLUSH_ADDR 0 0 mmHDP_MEM_COHERENCY_FLUSH_CNTL 0 0x1520 1 0 4294967295 HDP_MEM_FLUSH_ADDR 0 0 mmCLKREQB_PAD_CNTL 0 0x1521 12 0 4294967295 CLKREQB_PAD_A 0 0 CLKREQB_PAD_SEL 1 1 CLKREQB_PAD_MODE 2 2 CLKREQB_PAD_SPARE 3 4 CLKREQB_PAD_SN0 5 5 CLKREQB_PAD_SN1 6 6 CLKREQB_PAD_SN2 7 7 CLKREQB_PAD_SN3 8 8 CLKREQB_PAD_SLEWN 9 9 CLKREQB_PAD_WAKE 10 10 CLKREQB_PAD_SCHMEN 11 11 CLKREQB_PAD_CNTL_EN 12 12 mmSMBDAT_PAD_CNTL 0 0x1522 12 0 4294967295 SMBDAT_PAD_A 0 0 SMBDAT_PAD_SEL 1 1 SMBDAT_PAD_MODE 2 2 SMBDAT_PAD_SPARE 3 4 SMBDAT_PAD_SN0 5 5 SMBDAT_PAD_SN1 6 6 SMBDAT_PAD_SN2 7 7 SMBDAT_PAD_SN3 8 8 SMBDAT_PAD_SLEWN 9 9 SMBDAT_PAD_WAKE 10 10 SMBDAT_PAD_SCHMEN 11 11 SMBDAT_PAD_CNTL_EN 12 12 mmSMBCLK_PAD_CNTL 0 0x1523 12 0 4294967295 SMBCLK_PAD_A 0 0 SMBCLK_PAD_SEL 1 1 SMBCLK_PAD_MODE 2 2 SMBCLK_PAD_SPARE 3 4 SMBCLK_PAD_SN0 5 5 SMBCLK_PAD_SN1 6 6 SMBCLK_PAD_SN2 7 7 SMBCLK_PAD_SN3 8 8 SMBCLK_PAD_SLEWN 9 9 SMBCLK_PAD_WAKE 10 10 SMBCLK_PAD_SCHMEN 11 11 SMBCLK_PAD_CNTL_EN 12 12 mmBIF_XDMA_LO 0 0x14c0 2 0 4294967295 BIF_XDMA_LOWER_BOUND 0 28 BIF_XDMA_APER_EN 31 31 mmBIF_XDMA_HI 0 0x14c1 1 0 4294967295 BIF_XDMA_UPPER_BOUND 0 28 mmBIF_FEATURES_CONTROL_MISC 0 0x14c2 13 0 4294967295 MST_BIF_REQ_EP_DIS 0 0 SLV_BIF_CPL_EP_DIS 1 1 BIF_SLV_REQ_EP_DIS 2 2 BIF_MST_CPL_EP_DIS 3 3 UR_PSN_PKT_REPORT_POISON_DIS 4 4 POST_PSN_ONLY_PKT_REPORT_UR_ALL_DIS 5 5 POST_PSN_ONLY_PKT_REPORT_UR_PART_DIS 6 6 PLL_SWITCH_IMPCTL_CAL_DONE_DIS 7 7 IGNORE_BE_CHECK_GASKET_COMB_DIS 8 8 MC_BIF_REQ_ID_ROUTING_DIS 9 9 AZ_BIF_REQ_ID_ROUTING_DIS 10 10 ATC_PRG_RESP_PASID_UR_EN 11 11 BIF_RB_SET_OVERFLOW_EN 12 12 mmBIF_DOORBELL_CNTL 0 0x14c3 7 0 4294967295 SELF_RING_DIS 0 0 TRANS_CHECK_DIS 1 1 UNTRANS_LBACK_EN 2 2 NON_CONSECUTIVE_BE_ZERO_DIS 3 3 DOORBELL_MONITOR_EN 4 4 DOORBELL_INTERRUPT_STATUS 5 5 DOORBELL_INTERRUPT_CLEAR 16 16 mmBIF_SLVARB_MODE 0 0x14c4 1 0 4294967295 SLVARB_MODE 0 1 mmBIF_FB_EN 0 0x1524 2 0 4294967295 FB_READ_EN 0 0 FB_WRITE_EN 1 1 mmBIF_BUSNUM_CNTL1 0 0x1525 1 0 4294967295 ID_MASK 0 7 mmBIF_BUSNUM_LIST0 0 0x1526 4 0 4294967295 ID0 0 7 ID1 8 15 ID2 16 23 ID3 24 31 mmBIF_BUSNUM_LIST1 0 0x1527 4 0 4294967295 ID4 0 7 ID5 8 15 ID6 16 23 ID7 24 31 mmBIF_BUSNUM_CNTL2 0 0x152b 4 0 4294967295 AUTOUPDATE_SEL 0 7 AUTOUPDATE_EN 8 8 HDPREG_CNTL 16 16 ERROR_MULTIPLE_ID_MATCH 17 17 mmBIF_BUSY_DELAY_CNTR 0 0x1529 1 0 4294967295 DELAY_CNT 0 5 mmBIF_PERFMON_CNTL 0 0x152c 5 0 4294967295 PERFCOUNTER_EN 0 0 PERFCOUNTER_RESET0 1 1 PERFCOUNTER_RESET1 2 2 PERF_SEL0 8 12 PERF_SEL1 13 17 mmBIF_PERFCOUNTER0_RESULT 0 0x152d 1 0 4294967295 PERFCOUNTER_RESULT 0 31 mmBIF_PERFCOUNTER1_RESULT 0 0x152e 1 0 4294967295 PERFCOUNTER_RESULT 0 31 mmSLAVE_HANG_PROTECTION_CNTL 0 0x1536 1 0 4294967295 HANG_PROTECTION_TIMER_SEL 1 3 mmGPU_HDP_FLUSH_REQ 0 0x1537 12 0 4294967295 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmGPU_HDP_FLUSH_DONE 0 0x1538 12 0 4294967295 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmSLAVE_HANG_ERROR 0 0x153b 9 0 4294967295 SRBM_HANG_ERROR 0 0 HDP_HANG_ERROR 1 1 VGA_HANG_ERROR 2 2 ROM_HANG_ERROR 3 3 AUDIO_HANG_ERROR 4 4 CEC_HANG_ERROR 5 5 XDMA_HANG_ERROR 7 7 DOORBELL_HANG_ERROR 8 8 GARLIC_HANG_ERROR 9 9 mmCAPTURE_HOST_BUSNUM 0 0x153c 1 0 4294967295 CHECK_EN 0 0 mmHOST_BUSNUM 0 0x153d 1 0 4294967295 HOST_ID 0 15 mmPEER_REG_RANGE0 0 0x153e 2 0 4294967295 START_ADDR 0 15 END_ADDR 16 31 mmPEER_REG_RANGE1 0 0x153f 2 0 4294967295 START_ADDR 0 15 END_ADDR 16 31 mmPEER0_FB_OFFSET_HI 0 0x14f3 1 0 4294967295 PEER0_FB_OFFSET_HI 0 19 mmPEER0_FB_OFFSET_LO 0 0x14f2 2 0 4294967295 PEER0_FB_OFFSET_LO 0 19 PEER0_FB_EN 31 31 mmPEER1_FB_OFFSET_HI 0 0x14f1 1 0 4294967295 PEER1_FB_OFFSET_HI 0 19 mmPEER1_FB_OFFSET_LO 0 0x14f0 2 0 4294967295 PEER1_FB_OFFSET_LO 0 19 PEER1_FB_EN 31 31 mmPEER2_FB_OFFSET_HI 0 0x14ef 1 0 4294967295 PEER2_FB_OFFSET_HI 0 19 mmPEER2_FB_OFFSET_LO 0 0x14ee 2 0 4294967295 PEER2_FB_OFFSET_LO 0 19 PEER2_FB_EN 31 31 mmPEER3_FB_OFFSET_HI 0 0x14ed 1 0 4294967295 PEER3_FB_OFFSET_HI 0 19 mmPEER3_FB_OFFSET_LO 0 0x14ec 2 0 4294967295 PEER3_FB_OFFSET_LO 0 19 PEER3_FB_EN 31 31 mmDBG_BYPASS_SRBM_ACCESS 0 0x14eb 2 0 4294967295 DBG_BYPASS_SRBM_ACCESS_EN 0 0 DBG_APER_AD 1 4 mmSMBUS_BACO_DUMMY 0 0x14c6 1 0 4294967295 SMBUS_BACO_DUMMY_DATA 0 31 mmBIF_DEVFUNCNUM_LIST0 0 0x14e8 4 0 4294967295 DEVFUNC_ID0 0 7 DEVFUNC_ID1 8 15 DEVFUNC_ID2 16 23 DEVFUNC_ID3 24 31 mmBIF_DEVFUNCNUM_LIST1 0 0x14e7 4 0 4294967295 DEVFUNC_ID4 0 7 DEVFUNC_ID5 8 15 DEVFUNC_ID6 16 23 DEVFUNC_ID7 24 31 mmBACO_CNTL 0 0x14e5 16 0 4294967295 BACO_EN 0 0 BACO_BCLK_OFF 1 1 BACO_ISO_DIS 2 2 BACO_POWER_OFF 3 3 BACO_RESET_EN 4 4 BACO_HANG_PROTECTION_EN 5 5 BACO_MODE 6 6 BACO_ANA_ISO_DIS 7 7 RCU_BIF_CONFIG_DONE 8 8 PWRGOOD_BF 9 9 PWRGOOD_GPIO 10 10 PWRGOOD_MEM 11 11 PWRGOOD_DVO 12 12 PWRGOOD_IDSC 13 13 BACO_POWER_OFF_DRAM 16 16 BACO_BF_MEM_PHY_ISO_CNTRL 17 17 mmBF_ANA_ISO_CNTL 0 0x14c7 2 0 4294967295 BF_ANA_ISO_DIS_MASK 0 0 BF_VDDC_ISO_DIS_MASK 1 1 mmMEM_TYPE_CNTL 0 0x14e4 1 0 4294967295 BF_MEM_PHY_G5_G3 0 0 mmBIF_BACO_DEBUG 0 0x14df 1 0 4294967295 BIF_BACO_SCANDUMP_FLG 0 0 mmBIF_BACO_DEBUG_LATCH 0 0x14dc 1 0 4294967295 BIF_BACO_LATCH_FLG 0 0 mmBACO_CNTL_MISC 0 0x14db 3 0 4294967295 BIF_ROM_REQ_DIS 0 0 BIF_AZ_REQ_DIS 1 1 BACO_LINK_RST_WIDTH_SEL 2 3 mmSMU_BIF_VDDGFX_PWR_STATUS 0 0x14f8 1 0 4294967295 VDDGFX_GFX_PWR_OFF 0 0 mmBIF_VDDGFX_GFX0_LOWER 0 0x1428 3 0 4294967295 VDDGFX_GFX0_REG_LOWER 2 17 VDDGFX_GFX0_REG_CMP_EN 30 30 VDDGFX_GFX0_REG_STALL_EN 31 31 mmBIF_VDDGFX_GFX0_UPPER 0 0x1429 1 0 4294967295 VDDGFX_GFX0_REG_UPPER 2 17 mmBIF_VDDGFX_GFX1_LOWER 0 0x142a 3 0 4294967295 VDDGFX_GFX1_REG_LOWER 2 17 VDDGFX_GFX1_REG_CMP_EN 30 30 VDDGFX_GFX1_REG_STALL_EN 31 31 mmBIF_VDDGFX_GFX1_UPPER 0 0x142b 1 0 4294967295 VDDGFX_GFX1_REG_UPPER 2 17 mmBIF_VDDGFX_GFX2_LOWER 0 0x142c 3 0 4294967295 VDDGFX_GFX2_REG_LOWER 2 17 VDDGFX_GFX2_REG_CMP_EN 30 30 VDDGFX_GFX2_REG_STALL_EN 31 31 mmBIF_VDDGFX_GFX2_UPPER 0 0x142d 1 0 4294967295 VDDGFX_GFX2_REG_UPPER 2 17 mmBIF_VDDGFX_GFX3_LOWER 0 0x142e 3 0 4294967295 VDDGFX_GFX3_REG_LOWER 2 17 VDDGFX_GFX3_REG_CMP_EN 30 30 VDDGFX_GFX3_REG_STALL_EN 31 31 mmBIF_VDDGFX_GFX3_UPPER 0 0x142f 1 0 4294967295 VDDGFX_GFX3_REG_UPPER 2 17 mmBIF_VDDGFX_GFX4_LOWER 0 0x1430 3 0 4294967295 VDDGFX_GFX4_REG_LOWER 2 17 VDDGFX_GFX4_REG_CMP_EN 30 30 VDDGFX_GFX4_REG_STALL_EN 31 31 mmBIF_VDDGFX_GFX4_UPPER 0 0x1431 1 0 4294967295 VDDGFX_GFX4_REG_UPPER 2 17 mmBIF_VDDGFX_GFX5_LOWER 0 0x1432 3 0 4294967295 VDDGFX_GFX5_REG_LOWER 2 17 VDDGFX_GFX5_REG_CMP_EN 30 30 VDDGFX_GFX5_REG_STALL_EN 31 31 mmBIF_VDDGFX_GFX5_UPPER 0 0x1433 1 0 4294967295 VDDGFX_GFX5_REG_UPPER 2 17 mmBIF_VDDGFX_RSV1_LOWER 0 0x1434 3 0 4294967295 VDDGFX_RSV1_REG_LOWER 2 17 VDDGFX_RSV1_REG_CMP_EN 30 30 VDDGFX_RSV1_REG_STALL_EN 31 31 mmBIF_VDDGFX_RSV1_UPPER 0 0x1435 1 0 4294967295 VDDGFX_RSV1_REG_UPPER 2 17 mmBIF_VDDGFX_RSV2_LOWER 0 0x1436 3 0 4294967295 VDDGFX_RSV2_REG_LOWER 2 17 VDDGFX_RSV2_REG_CMP_EN 30 30 VDDGFX_RSV2_REG_STALL_EN 31 31 mmBIF_VDDGFX_RSV2_UPPER 0 0x1437 1 0 4294967295 VDDGFX_RSV2_REG_UPPER 2 17 mmBIF_VDDGFX_RSV3_LOWER 0 0x1438 3 0 4294967295 VDDGFX_RSV3_REG_LOWER 2 17 VDDGFX_RSV3_REG_CMP_EN 30 30 VDDGFX_RSV3_REG_STALL_EN 31 31 mmBIF_VDDGFX_RSV3_UPPER 0 0x1439 1 0 4294967295 VDDGFX_RSV3_REG_UPPER 2 17 mmBIF_VDDGFX_RSV4_LOWER 0 0x143a 3 0 4294967295 VDDGFX_RSV4_REG_LOWER 2 17 VDDGFX_RSV4_REG_CMP_EN 30 30 VDDGFX_RSV4_REG_STALL_EN 31 31 mmBIF_VDDGFX_RSV4_UPPER 0 0x143b 1 0 4294967295 VDDGFX_RSV4_REG_UPPER 2 17 mmBIF_VDDGFX_FB_CMP 0 0x143c 6 0 4294967295 VDDGFX_FB_HDP_CMP_EN 0 0 VDDGFX_FB_HDP_STALL_EN 1 1 VDDGFX_FB_XDMA_CMP_EN 2 2 VDDGFX_FB_XDMA_STALL_EN 3 3 VDDGFX_FB_VGA_CMP_EN 4 4 VDDGFX_FB_VGA_STALL_EN 5 5 mmBIF_DOORBELL_GBLAPER1_LOWER 0 0x14fc 2 0 4294967295 DOORBELL_GBLAPER1_LOWER 2 11 DOORBELL_GBLAPER1_EN 31 31 mmBIF_DOORBELL_GBLAPER1_UPPER 0 0x14fd 1 0 4294967295 DOORBELL_GBLAPER1_UPPER 2 11 mmBIF_DOORBELL_GBLAPER2_LOWER 0 0x14fe 2 0 4294967295 DOORBELL_GBLAPER2_LOWER 2 11 DOORBELL_GBLAPER2_EN 31 31 mmBIF_DOORBELL_GBLAPER2_UPPER 0 0x14ff 1 0 4294967295 DOORBELL_GBLAPER2_UPPER 2 11 mmBIF_SMU_INDEX 0 0x143d 1 0 4294967295 BIF_SMU_INDEX 2 18 mmBIF_SMU_DATA 0 0x143e 1 0 4294967295 BIF_SMU_DATA 2 18 mmIMPCTL_RESET 0 0x14f5 1 0 4294967295 IMP_SW_RESET 0 0 mmGARLIC_FLUSH_CNTL 0 0x1401 21 0 4294967295 CP_RB0_WPTR 0 0 CP_RB1_WPTR 1 1 CP_RB2_WPTR 2 2 UVD_RBC_RB_WPTR 3 3 SDMA0_GFX_RB_WPTR 4 4 SDMA1_GFX_RB_WPTR 5 5 CP_DMA_ME_COMMAND 6 6 CP_DMA_PFP_COMMAND 7 7 SAM_SAB_RBI_WPTR 8 8 SAM_SAB_RBO_WPTR 9 9 VCE_OUT_RB_WPTR 10 10 VCE_RB_WPTR2 11 11 VCE_RB_WPTR 12 12 HOST_DOORBELL 13 13 SELFRING_DOORBELL 14 14 CP_DMA_PIO_COMMAND 15 15 DISPLAY 16 16 SDMA2_GFX_RB_WPTR 17 17 SDMA3_GFX_RB_WPTR 18 18 IGNORE_MC_DISABLE 30 30 DISABLE_ALL 31 31 mmGARLIC_FLUSH_ADDR_START_0 0 0x1402 3 0 4294967295 ENABLE 0 0 MODE 1 1 ADDR_START 2 31 mmGARLIC_FLUSH_ADDR_START_1 0 0x1404 3 0 4294967295 ENABLE 0 0 MODE 1 1 ADDR_START 2 31 mmGARLIC_FLUSH_ADDR_START_2 0 0x1406 3 0 4294967295 ENABLE 0 0 MODE 1 1 ADDR_START 2 31 mmGARLIC_FLUSH_ADDR_START_3 0 0x1408 3 0 4294967295 ENABLE 0 0 MODE 1 1 ADDR_START 2 31 mmGARLIC_FLUSH_ADDR_START_4 0 0x140a 3 0 4294967295 ENABLE 0 0 MODE 1 1 ADDR_START 2 31 mmGARLIC_FLUSH_ADDR_START_5 0 0x140c 3 0 4294967295 ENABLE 0 0 MODE 1 1 ADDR_START 2 31 mmGARLIC_FLUSH_ADDR_START_6 0 0x140e 3 0 4294967295 ENABLE 0 0 MODE 1 1 ADDR_START 2 31 mmGARLIC_FLUSH_ADDR_START_7 0 0x1410 3 0 4294967295 ENABLE 0 0 MODE 1 1 ADDR_START 2 31 mmGARLIC_FLUSH_ADDR_END_0 0 0x1403 1 0 4294967295 ADDR_END 2 31 mmGARLIC_FLUSH_ADDR_END_1 0 0x1405 1 0 4294967295 ADDR_END 2 31 mmGARLIC_FLUSH_ADDR_END_2 0 0x1407 1 0 4294967295 ADDR_END 2 31 mmGARLIC_FLUSH_ADDR_END_3 0 0x1409 1 0 4294967295 ADDR_END 2 31 mmGARLIC_FLUSH_ADDR_END_4 0 0x140b 1 0 4294967295 ADDR_END 2 31 mmGARLIC_FLUSH_ADDR_END_5 0 0x140d 1 0 4294967295 ADDR_END 2 31 mmGARLIC_FLUSH_ADDR_END_6 0 0x140f 1 0 4294967295 ADDR_END 2 31 mmGARLIC_FLUSH_ADDR_END_7 0 0x1411 1 0 4294967295 ADDR_END 2 31 mmGARLIC_FLUSH_REQ 0 0x1412 1 0 4294967295 FLUSH_REQ 0 0 mmGPU_GARLIC_FLUSH_REQ 0 0x1413 14 0 4294967295 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 SDMA2 12 12 SDMA3 13 13 mmGPU_GARLIC_FLUSH_DONE 0 0x1414 14 0 4294967295 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 SDMA2 12 12 SDMA3 13 13 mmGARLIC_COHE_CP_RB0_WPTR 0 0x1415 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_CP_RB1_WPTR 0 0x1416 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_CP_RB2_WPTR 0 0x1417 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_UVD_RBC_RB_WPTR 0 0x1418 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_SDMA0_GFX_RB_WPTR 0 0x1419 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_SDMA1_GFX_RB_WPTR 0 0x141a 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_CP_DMA_ME_COMMAND 0 0x141b 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_CP_DMA_PFP_COMMAND 0 0x141c 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_SAM_SAB_RBI_WPTR 0 0x141d 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_SAM_SAB_RBO_WPTR 0 0x141e 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_VCE_OUT_RB_WPTR 0 0x141f 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_VCE_RB_WPTR2 0 0x1420 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_VCE_RB_WPTR 0 0x1421 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_SDMA2_GFX_RB_WPTR 0 0x1422 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_SDMA3_GFX_RB_WPTR 0 0x1423 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_CP_DMA_PIO_COMMAND 0 0x1424 1 0 4294967295 ADDRESS 2 18 mmGARLIC_COHE_GARLIC_FLUSH_REQ 0 0x1425 1 0 4294967295 ADDRESS 2 18 mmREMAP_HDP_MEM_FLUSH_CNTL 0 0x1426 1 0 4294967295 ADDRESS 2 18 mmREMAP_HDP_REG_FLUSH_CNTL 0 0x1427 1 0 4294967295 ADDRESS 2 18 mmBIOS_SCRATCH_0 0 0x5c9 1 0 4294967295 BIOS_SCRATCH_0 0 31 mmBIOS_SCRATCH_1 0 0x5ca 1 0 4294967295 BIOS_SCRATCH_1 0 31 mmBIOS_SCRATCH_2 0 0x5cb 1 0 4294967295 BIOS_SCRATCH_2 0 31 mmBIOS_SCRATCH_3 0 0x5cc 1 0 4294967295 BIOS_SCRATCH_3 0 31 mmBIOS_SCRATCH_4 0 0x5cd 1 0 4294967295 BIOS_SCRATCH_4 0 31 mmBIOS_SCRATCH_5 0 0x5ce 1 0 4294967295 BIOS_SCRATCH_5 0 31 mmBIOS_SCRATCH_6 0 0x5cf 1 0 4294967295 BIOS_SCRATCH_6 0 31 mmBIOS_SCRATCH_7 0 0x5d0 1 0 4294967295 BIOS_SCRATCH_7 0 31 mmBIOS_SCRATCH_8 0 0x5d1 1 0 4294967295 BIOS_SCRATCH_8 0 31 mmBIOS_SCRATCH_9 0 0x5d2 1 0 4294967295 BIOS_SCRATCH_9 0 31 mmBIOS_SCRATCH_10 0 0x5d3 1 0 4294967295 BIOS_SCRATCH_10 0 31 mmBIOS_SCRATCH_11 0 0x5d4 1 0 4294967295 BIOS_SCRATCH_11 0 31 mmBIOS_SCRATCH_12 0 0x5d5 1 0 4294967295 BIOS_SCRATCH_12 0 31 mmBIOS_SCRATCH_13 0 0x5d6 1 0 4294967295 BIOS_SCRATCH_13 0 31 mmBIOS_SCRATCH_14 0 0x5d7 1 0 4294967295 BIOS_SCRATCH_14 0 31 mmBIOS_SCRATCH_15 0 0x5d8 1 0 4294967295 BIOS_SCRATCH_15 0 31 mmBIF_RB_CNTL 0 0x1530 6 0 4294967295 RB_ENABLE 0 0 RB_SIZE 1 5 WPTR_WRITEBACK_ENABLE 8 8 WPTR_WRITEBACK_TIMER 9 13 BIF_RB_TRAN 17 17 WPTR_OVERFLOW_CLEAR 31 31 mmBIF_RB_BASE 0 0x1531 1 0 4294967295 ADDR 0 31 mmBIF_RB_RPTR 0 0x1532 1 0 4294967295 OFFSET 2 17 mmBIF_RB_WPTR 0 0x1533 2 0 4294967295 BIF_RB_OVERFLOW 0 0 OFFSET 2 17 mmBIF_RB_WPTR_ADDR_HI 0 0x1534 1 0 4294967295 ADDR 0 7 mmBIF_RB_WPTR_ADDR_LO 0 0x1535 1 0 4294967295 ADDR 2 31 mmVENDOR_ID 0 0x0 1 0 4294967295 VENDOR_ID 0 15 mmDEVICE_ID 0 0x0 1 0 4294967295 DEVICE_ID 0 15 mmCOMMAND 0 0x1 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 mmSTATUS 0 0x1 11 0 4294967295 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_EN 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 mmREVISION_ID 0 0x2 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 mmPROG_INTERFACE 0 0x2 1 0 4294967295 PROG_INTERFACE 0 7 mmSUB_CLASS 0 0x2 1 0 4294967295 SUB_CLASS 0 7 mmBASE_CLASS 0 0x2 1 0 4294967295 BASE_CLASS 0 7 mmCACHE_LINE 0 0x3 1 0 4294967295 CACHE_LINE_SIZE 0 7 mmLATENCY 0 0x3 1 0 4294967295 LATENCY_TIMER 0 7 mmHEADER 0 0x3 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 mmBIST 0 0x3 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 mmBASE_ADDR_1 0 0x4 1 0 4294967295 BASE_ADDR 0 31 mmBASE_ADDR_2 0 0x5 1 0 4294967295 BASE_ADDR 0 31 mmBASE_ADDR_3 0 0x6 1 0 4294967295 BASE_ADDR 0 31 mmBASE_ADDR_4 0 0x7 1 0 4294967295 BASE_ADDR 0 31 mmBASE_ADDR_5 0 0x8 1 0 4294967295 BASE_ADDR 0 31 mmBASE_ADDR_6 0 0x9 1 0 4294967295 BASE_ADDR 0 31 mmROM_BASE_ADDR 0 0xc 1 0 4294967295 BASE_ADDR 0 31 mmCAP_PTR 0 0xd 1 0 4294967295 CAP_PTR 0 7 mmINTERRUPT_LINE 0 0xf 1 0 4294967295 INTERRUPT_LINE 0 7 mmINTERRUPT_PIN 0 0xf 1 0 4294967295 INTERRUPT_PIN 0 7 mmADAPTER_ID 0 0xb 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 mmMIN_GRANT 0 0xf 1 0 4294967295 MIN_GNT 0 7 mmMAX_LATENCY 0 0xf 1 0 4294967295 MAX_LAT 0 7 mmVENDOR_CAP_LIST 0 0x12 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 mmADAPTER_ID_W 0 0x13 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 mmPMI_CAP_LIST 0 0x14 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 mmPMI_CAP 0 0x14 7 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 mmPMI_STATUS_CNTL 0 0x15 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 mmPCIE_CAP_LIST 0 0x16 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 mmPCIE_CAP 0 0x16 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 mmDEVICE_CAP 0 0x17 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 mmDEVICE_CNTL 0 0x18 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 mmDEVICE_STATUS 0 0x18 6 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 mmLINK_CAP 0 0x19 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 mmLINK_CNTL 0 0x1a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 mmLINK_STATUS 0 0x1a 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 mmDEVICE_CAP2 0 0x1f 10 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 mmDEVICE_CNTL2 0 0x20 8 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 mmDEVICE_STATUS2 0 0x20 1 0 4294967295 RESERVED 0 15 mmLINK_CAP2 0 0x21 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 mmLINK_CNTL2 0 0x22 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 mmLINK_STATUS2 0 0x22 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE 1 1 EQUALIZATION_PHASE1_SUCCESS 2 2 EQUALIZATION_PHASE2_SUCCESS 3 3 EQUALIZATION_PHASE3_SUCCESS 4 4 LINK_EQUALIZATION_REQUEST 5 5 mmMSI_CAP_LIST 0 0x28 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 mmMSI_MSG_CNTL 0 0x28 4 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 mmMSI_MSG_ADDR_LO 0 0x29 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 mmMSI_MSG_ADDR_HI 0 0x2a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 mmMSI_MSG_DATA_64 0 0x2b 1 0 4294967295 MSI_DATA_64 0 15 mmMSI_MSG_DATA 0 0x2a 1 0 4294967295 MSI_DATA 0 15 mmPCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 0 0x40 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_VENDOR_SPECIFIC_HDR 0 0x41 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 mmPCIE_VENDOR_SPECIFIC1 0 0x42 1 0 4294967295 SCRATCH 0 31 mmPCIE_VENDOR_SPECIFIC2 0 0x43 1 0 4294967295 SCRATCH 0 31 mmPCIE_VC_ENH_CAP_LIST 0 0x44 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_PORT_VC_CAP_REG1 0 0x45 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 mmPCIE_PORT_VC_CAP_REG2 0 0x46 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 mmPCIE_PORT_VC_CNTL 0 0x47 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 mmPCIE_PORT_VC_STATUS 0 0x47 1 0 4294967295 VC_ARB_TABLE_STATUS 0 0 mmPCIE_VC0_RESOURCE_CAP 0 0x48 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 mmPCIE_VC0_RESOURCE_CNTL 0 0x49 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 mmPCIE_VC0_RESOURCE_STATUS 0 0x4a 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 mmPCIE_VC1_RESOURCE_CAP 0 0x4b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 mmPCIE_VC1_RESOURCE_CNTL 0 0x4c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 mmPCIE_VC1_RESOURCE_STATUS 0 0x4d 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 mmPCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 0 0x50 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_DEV_SERIAL_NUM_DW1 0 0x51 1 0 4294967295 SERIAL_NUMBER_LO 0 31 mmPCIE_DEV_SERIAL_NUM_DW2 0 0x52 1 0 4294967295 SERIAL_NUMBER_HI 0 31 mmPCIE_ADV_ERR_RPT_ENH_CAP_LIST 0 0x54 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_UNCORR_ERR_STATUS 0 0x55 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 mmPCIE_UNCORR_ERR_MASK 0 0x56 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 mmPCIE_UNCORR_ERR_SEVERITY 0 0x57 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 mmPCIE_CORR_ERR_STATUS 0 0x58 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 mmPCIE_CORR_ERR_MASK 0 0x59 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 mmPCIE_ADV_ERR_CAP_CNTL 0 0x5a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 mmPCIE_HDR_LOG0 0 0x5b 1 0 4294967295 TLP_HDR 0 31 mmPCIE_HDR_LOG1 0 0x5c 1 0 4294967295 TLP_HDR 0 31 mmPCIE_HDR_LOG2 0 0x5d 1 0 4294967295 TLP_HDR 0 31 mmPCIE_HDR_LOG3 0 0x5e 1 0 4294967295 TLP_HDR 0 31 mmPCIE_TLP_PREFIX_LOG0 0 0x62 1 0 4294967295 TLP_PREFIX 0 31 mmPCIE_TLP_PREFIX_LOG1 0 0x63 1 0 4294967295 TLP_PREFIX 0 31 mmPCIE_TLP_PREFIX_LOG2 0 0x64 1 0 4294967295 TLP_PREFIX 0 31 mmPCIE_TLP_PREFIX_LOG3 0 0x65 1 0 4294967295 TLP_PREFIX 0 31 mmPCIE_BAR_ENH_CAP_LIST 0 0x80 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_BAR1_CAP 0 0x81 1 0 4294967295 BAR_SIZE_SUPPORTED 4 23 mmPCIE_BAR1_CNTL 0 0x82 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 12 mmPCIE_BAR2_CAP 0 0x83 1 0 4294967295 BAR_SIZE_SUPPORTED 4 23 mmPCIE_BAR2_CNTL 0 0x84 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 12 mmPCIE_BAR3_CAP 0 0x85 1 0 4294967295 BAR_SIZE_SUPPORTED 4 23 mmPCIE_BAR3_CNTL 0 0x86 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 12 mmPCIE_BAR4_CAP 0 0x87 1 0 4294967295 BAR_SIZE_SUPPORTED 4 23 mmPCIE_BAR4_CNTL 0 0x88 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 12 mmPCIE_BAR5_CAP 0 0x89 1 0 4294967295 BAR_SIZE_SUPPORTED 4 23 mmPCIE_BAR5_CNTL 0 0x8a 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 12 mmPCIE_BAR6_CAP 0 0x8b 1 0 4294967295 BAR_SIZE_SUPPORTED 4 23 mmPCIE_BAR6_CNTL 0 0x8c 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 12 mmPCIE_PWR_BUDGET_ENH_CAP_LIST 0 0x90 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_PWR_BUDGET_DATA_SELECT 0 0x91 1 0 4294967295 DATA_SELECT 0 7 mmPCIE_PWR_BUDGET_DATA 0 0x92 6 0 4294967295 BASE_POWER 0 7 DATA_SCALE 8 9 PM_SUB_STATE 10 12 PM_STATE 13 14 TYPE 15 17 POWER_RAIL 18 20 mmPCIE_PWR_BUDGET_CAP 0 0x93 1 0 4294967295 SYSTEM_ALLOCATED 0 0 mmPCIE_DPA_ENH_CAP_LIST 0 0x94 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_DPA_CAP 0 0x95 5 0 4294967295 SUBSTATE_MAX 0 4 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 mmPCIE_DPA_LATENCY_INDICATOR 0 0x96 1 0 4294967295 TRANS_LAT_INDICATOR_BITS 0 7 mmPCIE_DPA_STATUS 0 0x97 2 0 4294967295 SUBSTATE_STATUS 0 4 SUBSTATE_CNTL_ENABLED 8 8 mmPCIE_DPA_CNTL 0 0x97 1 0 4294967295 SUBSTATE_CNTL 0 4 mmPCIE_DPA_SUBSTATE_PWR_ALLOC_0 0 0x98 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_DPA_SUBSTATE_PWR_ALLOC_1 0 0x98 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_DPA_SUBSTATE_PWR_ALLOC_2 0 0x98 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_DPA_SUBSTATE_PWR_ALLOC_3 0 0x98 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_DPA_SUBSTATE_PWR_ALLOC_4 0 0x99 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_DPA_SUBSTATE_PWR_ALLOC_5 0 0x99 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_DPA_SUBSTATE_PWR_ALLOC_6 0 0x99 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_DPA_SUBSTATE_PWR_ALLOC_7 0 0x99 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_SECONDARY_ENH_CAP_LIST 0 0x9c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_LINK_CNTL3 0 0x9d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 mmPCIE_LANE_ERROR_STATUS 0 0x9e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 mmPCIE_LANE_0_EQUALIZATION_CNTL 0 0x9f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_1_EQUALIZATION_CNTL 0 0x9f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_2_EQUALIZATION_CNTL 0 0xa0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_3_EQUALIZATION_CNTL 0 0xa0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_4_EQUALIZATION_CNTL 0 0xa1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_5_EQUALIZATION_CNTL 0 0xa1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_6_EQUALIZATION_CNTL 0 0xa2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_7_EQUALIZATION_CNTL 0 0xa2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_8_EQUALIZATION_CNTL 0 0xa3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_9_EQUALIZATION_CNTL 0 0xa3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_10_EQUALIZATION_CNTL 0 0xa4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_11_EQUALIZATION_CNTL 0 0xa4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_12_EQUALIZATION_CNTL 0 0xa5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_13_EQUALIZATION_CNTL 0 0xa5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_14_EQUALIZATION_CNTL 0 0xa6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_LANE_15_EQUALIZATION_CNTL 0 0xa6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 mmPCIE_ACS_ENH_CAP_LIST 0 0xa8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_ACS_CAP 0 0xa9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 mmPCIE_ACS_CNTL 0 0xa9 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 mmPCIE_ATS_ENH_CAP_LIST 0 0xac 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_ATS_CAP 0 0xad 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 mmPCIE_ATS_CNTL 0 0xad 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 mmPCIE_PAGE_REQ_ENH_CAP_LIST 0 0xb0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_PAGE_REQ_CNTL 0 0xb1 2 0 4294967295 PRI_ENABLE 0 0 PRI_RESET 1 1 mmPCIE_PAGE_REQ_STATUS 0 0xb1 4 0 4294967295 RESPONSE_FAILURE 0 0 UNEXPECTED_PAGE_REQ_GRP_INDEX 1 1 STOPPED 8 8 PRG_RESPONSE_PASID_REQUIRED 15 15 mmPCIE_OUTSTAND_PAGE_REQ_CAPACITY 0 0xb2 1 0 4294967295 OUTSTAND_PAGE_REQ_CAPACITY 0 31 mmPCIE_OUTSTAND_PAGE_REQ_ALLOC 0 0xb3 1 0 4294967295 OUTSTAND_PAGE_REQ_ALLOC 0 31 mmPCIE_PASID_ENH_CAP_LIST 0 0xb4 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_PASID_CAP 0 0xb5 3 0 4294967295 PASID_EXE_PERMISSION_SUPPORTED 1 1 PASID_PRIV_MODE_SUPPORTED 2 2 MAX_PASID_WIDTH 8 12 mmPCIE_PASID_CNTL 0 0xb5 3 0 4294967295 PASID_ENABLE 0 0 PASID_EXE_PERMISSION_ENABLE 1 1 PASID_PRIV_MODE_SUPPORTED_ENABLE 2 2 mmPCIE_TPH_REQR_ENH_CAP_LIST 0 0xb8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_TPH_REQR_CAP 0 0xb9 6 0 4294967295 TPH_REQR_NO_ST_MODE_SUPPORTED 0 0 TPH_REQR_INT_VEC_MODE_SUPPORTED 1 1 TPH_REQR_DEV_SPC_MODE_SUPPORTED 2 2 TPH_REQR_EXTND_TPH_REQR_SUPPORED 8 8 TPH_REQR_ST_TABLE_LOCATION 9 10 TPH_REQR_ST_TABLE_SIZE 16 26 mmPCIE_TPH_REQR_CNTL 0 0xba 2 0 4294967295 TPH_REQR_ST_MODE_SEL 0 2 TPH_REQR_EN 8 9 mmPCIE_MC_ENH_CAP_LIST 0 0xbc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_MC_CAP 0 0xbd 3 0 4294967295 MC_MAX_GROUP 0 5 MC_WIN_SIZE_REQ 8 13 MC_ECRC_REGEN_SUPP 15 15 mmPCIE_MC_CNTL 0 0xbd 2 0 4294967295 MC_NUM_GROUP 0 5 MC_ENABLE 15 15 mmPCIE_MC_ADDR0 0 0xbe 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 mmPCIE_MC_ADDR1 0 0xbf 1 0 4294967295 MC_BASE_ADDR_1 0 31 mmPCIE_MC_RCV0 0 0xc0 1 0 4294967295 MC_RECEIVE_0 0 31 mmPCIE_MC_RCV1 0 0xc1 1 0 4294967295 MC_RECEIVE_1 0 31 mmPCIE_MC_BLOCK_ALL0 0 0xc2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 mmPCIE_MC_BLOCK_ALL1 0 0xc3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 mmPCIE_MC_BLOCK_UNTRANSLATED_0 0 0xc4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 mmPCIE_MC_BLOCK_UNTRANSLATED_1 0 0xc5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 mmPCIE_LTR_ENH_CAP_LIST 0 0xc8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 mmPCIE_LTR_CAP 0 0xc9 4 0 4294967295 LTR_MAX_S_LATENCY_VALUE 0 9 LTR_MAX_S_LATENCY_SCALE 10 12 LTR_MAX_NS_LATENCY_VALUE 16 25 LTR_MAX_NS_LATENCY_SCALE 26 28 ixMM_INDEX_IND 2 0x1090000 2 0 4294967295 MM_OFFSET 0 30 MM_APER 31 31 ixMM_INDEX_HI_IND 2 0x1090006 1 0 4294967295 MM_OFFSET_HI 0 31 ixMM_DATA_IND 2 0x1090001 1 0 4294967295 MM_DATA 0 31 ixBIF_MM_INDACCESS_CNTL_IND 2 0x1091500 1 0 4294967295 MM_INDACCESS_DIS 1 1 ixBUS_CNTL_IND 2 0x1091508 14 0 4294967295 BIOS_ROM_WRT_EN 0 0 BIOS_ROM_DIS 1 1 PMI_IO_DIS 2 2 PMI_MEM_DIS 3 3 PMI_BM_DIS 4 4 PMI_INT_DIS 5 5 VGA_REG_COHERENCY_DIS 6 6 VGA_MEM_COHERENCY_DIS 7 7 BIF_ERR_RTR_BKPRESSURE_EN 8 8 SET_AZ_TC 10 12 SET_MC_TC 13 15 ZERO_BE_WR_EN 16 16 ZERO_BE_RD_EN 17 17 RD_STALL_IO_WR 18 18 ixCONFIG_CNTL_IND 2 0x1091509 4 0 4294967295 CFG_VGA_RAM_EN 0 0 VGA_DIS 1 1 GENMO_MONO_ADDRESS_B 2 2 GRPH_ADRSEL 3 4 ixCONFIG_MEMSIZE_IND 2 0x109150a 1 0 4294967295 CONFIG_MEMSIZE 0 31 ixCONFIG_F0_BASE_IND 2 0x109150b 1 0 4294967295 F0_BASE 0 31 ixCONFIG_APER_SIZE_IND 2 0x109150c 1 0 4294967295 APER_SIZE 0 31 ixCONFIG_REG_APER_SIZE_IND 2 0x109150d 1 0 4294967295 REG_APER_SIZE 0 19 ixBIF_SCRATCH0_IND 2 0x109150e 1 0 4294967295 BIF_SCRATCH0 0 31 ixBIF_SCRATCH1_IND 2 0x109150f 1 0 4294967295 BIF_SCRATCH1 0 31 ixBX_RESET_EN_IND 2 0x1091514 3 0 4294967295 COR_RESET_EN 0 0 REG_RESET_EN 1 1 STY_RESET_EN 2 2 ixMM_CFGREGS_CNTL_IND 2 0x1091513 2 0 4294967295 MM_CFG_FUNC_SEL 0 2 MM_WR_TO_CFG_EN 3 3 ixHW_DEBUG_IND 2 0x1091515 32 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 HW_16_DEBUG 16 16 HW_17_DEBUG 17 17 HW_18_DEBUG 18 18 HW_19_DEBUG 19 19 HW_20_DEBUG 20 20 HW_21_DEBUG 21 21 HW_22_DEBUG 22 22 HW_23_DEBUG 23 23 HW_24_DEBUG 24 24 HW_25_DEBUG 25 25 HW_26_DEBUG 26 26 HW_27_DEBUG 27 27 HW_28_DEBUG 28 28 HW_29_DEBUG 29 29 HW_30_DEBUG 30 30 HW_31_DEBUG 31 31 ixMASTER_CREDIT_CNTL_IND 2 0x1091516 2 0 4294967295 BIF_MC_RDRET_CREDIT 0 6 BIF_AZ_RDRET_CREDIT 16 21 ixSLAVE_REQ_CREDIT_CNTL_IND 2 0x1091517 6 0 4294967295 BIF_SRBM_REQ_CREDIT 0 4 BIF_VGA_REQ_CREDIT 5 8 BIF_HDP_REQ_CREDIT 10 14 BIF_ROM_REQ_CREDIT 15 15 BIF_AZ_REQ_CREDIT 20 20 BIF_XDMA_REQ_CREDIT 25 30 ixBX_RESET_CNTL_IND 2 0x1091518 1 0 4294967295 LINK_TRAIN_EN 0 0 ixINTERRUPT_CNTL_IND 2 0x109151a 8 0 4294967295 IH_DUMMY_RD_OVERRIDE 0 0 IH_DUMMY_RD_EN 1 1 IH_REQ_NONSNOOP_EN 3 3 IH_INTR_DLY_CNTR 4 7 GEN_IH_INT_EN 8 8 GEN_GPIO_INT_EN 9 12 SELECT_INT_GPIO_OUTPUT 13 14 BIF_RB_REQ_NONSNOOP_EN 15 15 ixINTERRUPT_CNTL2_IND 2 0x109151b 1 0 4294967295 IH_DUMMY_RD_ADDR 0 31 ixBIF_DEBUG_CNTL_IND 2 0x109151c 12 0 4294967295 DEBUG_EN 0 0 DEBUG_MULTIBLOCKEN 1 1 DEBUG_OUT_EN 2 2 DEBUG_PAD_SEL 3 3 DEBUG_BYTESEL_BLK1 4 4 DEBUG_BYTESEL_BLK2 5 5 DEBUG_SYNC_EN 6 6 DEBUG_SWAP 7 7 DEBUG_IDSEL_BLK1 8 12 DEBUG_IDSEL_BLK2 16 20 DEBUG_IDSEL_XSP 24 24 DEBUG_SYNC_CLKSEL 30 31 ixBIF_DEBUG_MUX_IND 2 0x109151d 2 0 4294967295 DEBUG_MUX_BLK1 0 5 DEBUG_MUX_BLK2 8 13 ixBIF_DEBUG_OUT_IND 2 0x109151e 1 0 4294967295 DEBUG_OUTPUT 0 16 ixHDP_REG_COHERENCY_FLUSH_CNTL_IND 2 0x1091528 1 0 4294967295 HDP_REG_FLUSH_ADDR 0 0 ixHDP_MEM_COHERENCY_FLUSH_CNTL_IND 2 0x1091520 1 0 4294967295 HDP_MEM_FLUSH_ADDR 0 0 ixCLKREQB_PAD_CNTL_IND 2 0x1091521 12 0 4294967295 CLKREQB_PAD_A 0 0 CLKREQB_PAD_SEL 1 1 CLKREQB_PAD_MODE 2 2 CLKREQB_PAD_SPARE 3 4 CLKREQB_PAD_SN0 5 5 CLKREQB_PAD_SN1 6 6 CLKREQB_PAD_SN2 7 7 CLKREQB_PAD_SN3 8 8 CLKREQB_PAD_SLEWN 9 9 CLKREQB_PAD_WAKE 10 10 CLKREQB_PAD_SCHMEN 11 11 CLKREQB_PAD_CNTL_EN 12 12 ixSMBDAT_PAD_CNTL_IND 2 0x1091522 12 0 4294967295 SMBDAT_PAD_A 0 0 SMBDAT_PAD_SEL 1 1 SMBDAT_PAD_MODE 2 2 SMBDAT_PAD_SPARE 3 4 SMBDAT_PAD_SN0 5 5 SMBDAT_PAD_SN1 6 6 SMBDAT_PAD_SN2 7 7 SMBDAT_PAD_SN3 8 8 SMBDAT_PAD_SLEWN 9 9 SMBDAT_PAD_WAKE 10 10 SMBDAT_PAD_SCHMEN 11 11 SMBDAT_PAD_CNTL_EN 12 12 ixSMBCLK_PAD_CNTL_IND 2 0x1091523 12 0 4294967295 SMBCLK_PAD_A 0 0 SMBCLK_PAD_SEL 1 1 SMBCLK_PAD_MODE 2 2 SMBCLK_PAD_SPARE 3 4 SMBCLK_PAD_SN0 5 5 SMBCLK_PAD_SN1 6 6 SMBCLK_PAD_SN2 7 7 SMBCLK_PAD_SN3 8 8 SMBCLK_PAD_SLEWN 9 9 SMBCLK_PAD_WAKE 10 10 SMBCLK_PAD_SCHMEN 11 11 SMBCLK_PAD_CNTL_EN 12 12 ixBIF_XDMA_LO_IND 2 0x10914c0 2 0 4294967295 BIF_XDMA_LOWER_BOUND 0 28 BIF_XDMA_APER_EN 31 31 ixBIF_XDMA_HI_IND 2 0x10914c1 1 0 4294967295 BIF_XDMA_UPPER_BOUND 0 28 ixBIF_FEATURES_CONTROL_MISC_IND 2 0x10914c2 13 0 4294967295 MST_BIF_REQ_EP_DIS 0 0 SLV_BIF_CPL_EP_DIS 1 1 BIF_SLV_REQ_EP_DIS 2 2 BIF_MST_CPL_EP_DIS 3 3 UR_PSN_PKT_REPORT_POISON_DIS 4 4 POST_PSN_ONLY_PKT_REPORT_UR_ALL_DIS 5 5 POST_PSN_ONLY_PKT_REPORT_UR_PART_DIS 6 6 PLL_SWITCH_IMPCTL_CAL_DONE_DIS 7 7 IGNORE_BE_CHECK_GASKET_COMB_DIS 8 8 MC_BIF_REQ_ID_ROUTING_DIS 9 9 AZ_BIF_REQ_ID_ROUTING_DIS 10 10 ATC_PRG_RESP_PASID_UR_EN 11 11 BIF_RB_SET_OVERFLOW_EN 12 12 ixBIF_DOORBELL_CNTL_IND 2 0x10914c3 7 0 4294967295 SELF_RING_DIS 0 0 TRANS_CHECK_DIS 1 1 UNTRANS_LBACK_EN 2 2 NON_CONSECUTIVE_BE_ZERO_DIS 3 3 DOORBELL_MONITOR_EN 4 4 DOORBELL_INTERRUPT_STATUS 5 5 DOORBELL_INTERRUPT_CLEAR 16 16 ixBIF_SLVARB_MODE_IND 2 0x10914c4 1 0 4294967295 SLVARB_MODE 0 1 ixBIF_FB_EN_IND 2 0x1091524 2 0 4294967295 FB_READ_EN 0 0 FB_WRITE_EN 1 1 ixBIF_BUSNUM_CNTL1_IND 2 0x1091525 1 0 4294967295 ID_MASK 0 7 ixBIF_BUSNUM_LIST0_IND 2 0x1091526 4 0 4294967295 ID0 0 7 ID1 8 15 ID2 16 23 ID3 24 31 ixBIF_BUSNUM_LIST1_IND 2 0x1091527 4 0 4294967295 ID4 0 7 ID5 8 15 ID6 16 23 ID7 24 31 ixBIF_BUSNUM_CNTL2_IND 2 0x109152b 4 0 4294967295 AUTOUPDATE_SEL 0 7 AUTOUPDATE_EN 8 8 HDPREG_CNTL 16 16 ERROR_MULTIPLE_ID_MATCH 17 17 ixBIF_BUSY_DELAY_CNTR_IND 2 0x1091529 1 0 4294967295 DELAY_CNT 0 5 ixBIF_PERFMON_CNTL_IND 2 0x109152c 5 0 4294967295 PERFCOUNTER_EN 0 0 PERFCOUNTER_RESET0 1 1 PERFCOUNTER_RESET1 2 2 PERF_SEL0 8 12 PERF_SEL1 13 17 ixBIF_PERFCOUNTER0_RESULT_IND 2 0x109152d 1 0 4294967295 PERFCOUNTER_RESULT 0 31 ixBIF_PERFCOUNTER1_RESULT_IND 2 0x109152e 1 0 4294967295 PERFCOUNTER_RESULT 0 31 ixSLAVE_HANG_PROTECTION_CNTL_IND 2 0x1091536 1 0 4294967295 HANG_PROTECTION_TIMER_SEL 1 3 ixGPU_HDP_FLUSH_REQ_IND 2 0x1091537 12 0 4294967295 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 ixGPU_HDP_FLUSH_DONE_IND 2 0x1091538 12 0 4294967295 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 ixSLAVE_HANG_ERROR_IND 2 0x109153b 9 0 4294967295 SRBM_HANG_ERROR 0 0 HDP_HANG_ERROR 1 1 VGA_HANG_ERROR 2 2 ROM_HANG_ERROR 3 3 AUDIO_HANG_ERROR 4 4 CEC_HANG_ERROR 5 5 XDMA_HANG_ERROR 7 7 DOORBELL_HANG_ERROR 8 8 GARLIC_HANG_ERROR 9 9 ixCAPTURE_HOST_BUSNUM_IND 2 0x109153c 1 0 4294967295 CHECK_EN 0 0 ixHOST_BUSNUM_IND 2 0x109153d 1 0 4294967295 HOST_ID 0 15 ixPEER_REG_RANGE0_IND 2 0x109153e 2 0 4294967295 START_ADDR 0 15 END_ADDR 16 31 ixPEER_REG_RANGE1_IND 2 0x109153f 2 0 4294967295 START_ADDR 0 15 END_ADDR 16 31 ixPEER0_FB_OFFSET_HI_IND 2 0x10914f3 1 0 4294967295 PEER0_FB_OFFSET_HI 0 19 ixPEER0_FB_OFFSET_LO_IND 2 0x10914f2 2 0 4294967295 PEER0_FB_OFFSET_LO 0 19 PEER0_FB_EN 31 31 ixPEER1_FB_OFFSET_HI_IND 2 0x10914f1 1 0 4294967295 PEER1_FB_OFFSET_HI 0 19 ixPEER1_FB_OFFSET_LO_IND 2 0x10914f0 2 0 4294967295 PEER1_FB_OFFSET_LO 0 19 PEER1_FB_EN 31 31 ixPEER2_FB_OFFSET_HI_IND 2 0x10914ef 1 0 4294967295 PEER2_FB_OFFSET_HI 0 19 ixPEER2_FB_OFFSET_LO_IND 2 0x10914ee 2 0 4294967295 PEER2_FB_OFFSET_LO 0 19 PEER2_FB_EN 31 31 ixPEER3_FB_OFFSET_HI_IND 2 0x10914ed 1 0 4294967295 PEER3_FB_OFFSET_HI 0 19 ixPEER3_FB_OFFSET_LO_IND 2 0x10914ec 2 0 4294967295 PEER3_FB_OFFSET_LO 0 19 PEER3_FB_EN 31 31 ixDBG_BYPASS_SRBM_ACCESS_IND 2 0x10914eb 2 0 4294967295 DBG_BYPASS_SRBM_ACCESS_EN 0 0 DBG_APER_AD 1 4 ixSMBUS_BACO_DUMMY_IND 2 0x10914c6 1 0 4294967295 SMBUS_BACO_DUMMY_DATA 0 31 ixBIF_DEVFUNCNUM_LIST0_IND 2 0x10914e8 4 0 4294967295 DEVFUNC_ID0 0 7 DEVFUNC_ID1 8 15 DEVFUNC_ID2 16 23 DEVFUNC_ID3 24 31 ixBIF_DEVFUNCNUM_LIST1_IND 2 0x10914e7 4 0 4294967295 DEVFUNC_ID4 0 7 DEVFUNC_ID5 8 15 DEVFUNC_ID6 16 23 DEVFUNC_ID7 24 31 ixBACO_CNTL_IND 2 0x10914e5 16 0 4294967295 BACO_EN 0 0 BACO_BCLK_OFF 1 1 BACO_ISO_DIS 2 2 BACO_POWER_OFF 3 3 BACO_RESET_EN 4 4 BACO_HANG_PROTECTION_EN 5 5 BACO_MODE 6 6 BACO_ANA_ISO_DIS 7 7 RCU_BIF_CONFIG_DONE 8 8 PWRGOOD_BF 9 9 PWRGOOD_GPIO 10 10 PWRGOOD_MEM 11 11 PWRGOOD_DVO 12 12 PWRGOOD_IDSC 13 13 BACO_POWER_OFF_DRAM 16 16 BACO_BF_MEM_PHY_ISO_CNTRL 17 17 ixBF_ANA_ISO_CNTL_IND 2 0x10914c7 2 0 4294967295 BF_ANA_ISO_DIS_MASK 0 0 BF_VDDC_ISO_DIS_MASK 1 1 ixMEM_TYPE_CNTL_IND 2 0x10914e4 1 0 4294967295 BF_MEM_PHY_G5_G3 0 0 ixBIF_BACO_DEBUG_IND 2 0x10914df 1 0 4294967295 BIF_BACO_SCANDUMP_FLG 0 0 ixBIF_BACO_DEBUG_LATCH_IND 2 0x10914dc 1 0 4294967295 BIF_BACO_LATCH_FLG 0 0 ixBACO_CNTL_MISC_IND 2 0x10914db 3 0 4294967295 BIF_ROM_REQ_DIS 0 0 BIF_AZ_REQ_DIS 1 1 BACO_LINK_RST_WIDTH_SEL 2 3 ixSMU_BIF_VDDGFX_PWR_STATUS_IND 2 0x10914f8 1 0 4294967295 VDDGFX_GFX_PWR_OFF 0 0 ixBIF_VDDGFX_GFX0_LOWER_IND 2 0x1091428 3 0 4294967295 VDDGFX_GFX0_REG_LOWER 2 17 VDDGFX_GFX0_REG_CMP_EN 30 30 VDDGFX_GFX0_REG_STALL_EN 31 31 ixBIF_VDDGFX_GFX0_UPPER_IND 2 0x1091429 1 0 4294967295 VDDGFX_GFX0_REG_UPPER 2 17 ixBIF_VDDGFX_GFX1_LOWER_IND 2 0x109142a 3 0 4294967295 VDDGFX_GFX1_REG_LOWER 2 17 VDDGFX_GFX1_REG_CMP_EN 30 30 VDDGFX_GFX1_REG_STALL_EN 31 31 ixBIF_VDDGFX_GFX1_UPPER_IND 2 0x109142b 1 0 4294967295 VDDGFX_GFX1_REG_UPPER 2 17 ixBIF_VDDGFX_GFX2_LOWER_IND 2 0x109142c 3 0 4294967295 VDDGFX_GFX2_REG_LOWER 2 17 VDDGFX_GFX2_REG_CMP_EN 30 30 VDDGFX_GFX2_REG_STALL_EN 31 31 ixBIF_VDDGFX_GFX2_UPPER_IND 2 0x109142d 1 0 4294967295 VDDGFX_GFX2_REG_UPPER 2 17 ixBIF_VDDGFX_GFX3_LOWER_IND 2 0x109142e 3 0 4294967295 VDDGFX_GFX3_REG_LOWER 2 17 VDDGFX_GFX3_REG_CMP_EN 30 30 VDDGFX_GFX3_REG_STALL_EN 31 31 ixBIF_VDDGFX_GFX3_UPPER_IND 2 0x109142f 1 0 4294967295 VDDGFX_GFX3_REG_UPPER 2 17 ixBIF_VDDGFX_GFX4_LOWER_IND 2 0x1091430 3 0 4294967295 VDDGFX_GFX4_REG_LOWER 2 17 VDDGFX_GFX4_REG_CMP_EN 30 30 VDDGFX_GFX4_REG_STALL_EN 31 31 ixBIF_VDDGFX_GFX4_UPPER_IND 2 0x1091431 1 0 4294967295 VDDGFX_GFX4_REG_UPPER 2 17 ixBIF_VDDGFX_GFX5_LOWER_IND 2 0x1091432 3 0 4294967295 VDDGFX_GFX5_REG_LOWER 2 17 VDDGFX_GFX5_REG_CMP_EN 30 30 VDDGFX_GFX5_REG_STALL_EN 31 31 ixBIF_VDDGFX_GFX5_UPPER_IND 2 0x1091433 1 0 4294967295 VDDGFX_GFX5_REG_UPPER 2 17 ixBIF_VDDGFX_RSV1_LOWER_IND 2 0x1091434 3 0 4294967295 VDDGFX_RSV1_REG_LOWER 2 17 VDDGFX_RSV1_REG_CMP_EN 30 30 VDDGFX_RSV1_REG_STALL_EN 31 31 ixBIF_VDDGFX_RSV1_UPPER_IND 2 0x1091435 1 0 4294967295 VDDGFX_RSV1_REG_UPPER 2 17 ixBIF_VDDGFX_RSV2_LOWER_IND 2 0x1091436 3 0 4294967295 VDDGFX_RSV2_REG_LOWER 2 17 VDDGFX_RSV2_REG_CMP_EN 30 30 VDDGFX_RSV2_REG_STALL_EN 31 31 ixBIF_VDDGFX_RSV2_UPPER_IND 2 0x1091437 1 0 4294967295 VDDGFX_RSV2_REG_UPPER 2 17 ixBIF_VDDGFX_RSV3_LOWER_IND 2 0x1091438 3 0 4294967295 VDDGFX_RSV3_REG_LOWER 2 17 VDDGFX_RSV3_REG_CMP_EN 30 30 VDDGFX_RSV3_REG_STALL_EN 31 31 ixBIF_VDDGFX_RSV3_UPPER_IND 2 0x1091439 1 0 4294967295 VDDGFX_RSV3_REG_UPPER 2 17 ixBIF_VDDGFX_RSV4_LOWER_IND 2 0x109143a 3 0 4294967295 VDDGFX_RSV4_REG_LOWER 2 17 VDDGFX_RSV4_REG_CMP_EN 30 30 VDDGFX_RSV4_REG_STALL_EN 31 31 ixBIF_VDDGFX_RSV4_UPPER_IND 2 0x109143b 1 0 4294967295 VDDGFX_RSV4_REG_UPPER 2 17 ixBIF_VDDGFX_FB_CMP_IND 2 0x109143c 6 0 4294967295 VDDGFX_FB_HDP_CMP_EN 0 0 VDDGFX_FB_HDP_STALL_EN 1 1 VDDGFX_FB_XDMA_CMP_EN 2 2 VDDGFX_FB_XDMA_STALL_EN 3 3 VDDGFX_FB_VGA_CMP_EN 4 4 VDDGFX_FB_VGA_STALL_EN 5 5 ixBIF_DOORBELL_GBLAPER1_LOWER_IND 2 0x10914fc 2 0 4294967295 DOORBELL_GBLAPER1_LOWER 2 11 DOORBELL_GBLAPER1_EN 31 31 ixBIF_DOORBELL_GBLAPER1_UPPER_IND 2 0x10914fd 1 0 4294967295 DOORBELL_GBLAPER1_UPPER 2 11 ixBIF_DOORBELL_GBLAPER2_LOWER_IND 2 0x10914fe 2 0 4294967295 DOORBELL_GBLAPER2_LOWER 2 11 DOORBELL_GBLAPER2_EN 31 31 ixBIF_DOORBELL_GBLAPER2_UPPER_IND 2 0x10914ff 1 0 4294967295 DOORBELL_GBLAPER2_UPPER 2 11 ixBIF_SMU_INDEX_IND 2 0x109143d 1 0 4294967295 BIF_SMU_INDEX 2 18 ixBIF_SMU_DATA_IND 2 0x109143e 1 0 4294967295 BIF_SMU_DATA 2 18 ixIMPCTL_RESET_IND 2 0x10914f5 1 0 4294967295 IMP_SW_RESET 0 0 ixGARLIC_FLUSH_CNTL_IND 2 0x1091401 21 0 4294967295 CP_RB0_WPTR 0 0 CP_RB1_WPTR 1 1 CP_RB2_WPTR 2 2 UVD_RBC_RB_WPTR 3 3 SDMA0_GFX_RB_WPTR 4 4 SDMA1_GFX_RB_WPTR 5 5 CP_DMA_ME_COMMAND 6 6 CP_DMA_PFP_COMMAND 7 7 SAM_SAB_RBI_WPTR 8 8 SAM_SAB_RBO_WPTR 9 9 VCE_OUT_RB_WPTR 10 10 VCE_RB_WPTR2 11 11 VCE_RB_WPTR 12 12 HOST_DOORBELL 13 13 SELFRING_DOORBELL 14 14 CP_DMA_PIO_COMMAND 15 15 DISPLAY 16 16 SDMA2_GFX_RB_WPTR 17 17 SDMA3_GFX_RB_WPTR 18 18 IGNORE_MC_DISABLE 30 30 DISABLE_ALL 31 31 ixGARLIC_FLUSH_REQ_IND 2 0x1091412 1 0 4294967295 FLUSH_REQ 0 0 ixGPU_GARLIC_FLUSH_REQ_IND 2 0x1091413 14 0 4294967295 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 SDMA2 12 12 SDMA3 13 13 ixGPU_GARLIC_FLUSH_DONE_IND 2 0x1091414 14 0 4294967295 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 SDMA2 12 12 SDMA3 13 13 ixGARLIC_COHE_CP_RB0_WPTR_IND 2 0x1091415 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_CP_RB1_WPTR_IND 2 0x1091416 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_CP_RB2_WPTR_IND 2 0x1091417 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_UVD_RBC_RB_WPTR_IND 2 0x1091418 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_SDMA0_GFX_RB_WPTR_IND 2 0x1091419 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_SDMA1_GFX_RB_WPTR_IND 2 0x109141a 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_CP_DMA_ME_COMMAND_IND 2 0x109141b 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_CP_DMA_PFP_COMMAND_IND 2 0x109141c 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_SAM_SAB_RBI_WPTR_IND 2 0x109141d 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_SAM_SAB_RBO_WPTR_IND 2 0x109141e 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_VCE_OUT_RB_WPTR_IND 2 0x109141f 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_VCE_RB_WPTR2_IND 2 0x1091420 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_VCE_RB_WPTR_IND 2 0x1091421 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_SDMA2_GFX_RB_WPTR_IND 2 0x1091422 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_SDMA3_GFX_RB_WPTR_IND 2 0x1091423 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_CP_DMA_PIO_COMMAND_IND 2 0x1091424 1 0 4294967295 ADDRESS 2 18 ixGARLIC_COHE_GARLIC_FLUSH_REQ_IND 2 0x1091425 1 0 4294967295 ADDRESS 2 18 ixREMAP_HDP_MEM_FLUSH_CNTL_IND 2 0x1091426 1 0 4294967295 ADDRESS 2 18 ixREMAP_HDP_REG_FLUSH_CNTL_IND 2 0x1091427 1 0 4294967295 ADDRESS 2 18 ixBIOS_SCRATCH_0_IND 2 0x10905c9 1 0 4294967295 BIOS_SCRATCH_0 0 31 ixBIOS_SCRATCH_1_IND 2 0x10905ca 1 0 4294967295 BIOS_SCRATCH_1 0 31 ixBIOS_SCRATCH_2_IND 2 0x10905cb 1 0 4294967295 BIOS_SCRATCH_2 0 31 ixBIOS_SCRATCH_3_IND 2 0x10905cc 1 0 4294967295 BIOS_SCRATCH_3 0 31 ixBIOS_SCRATCH_4_IND 2 0x10905cd 1 0 4294967295 BIOS_SCRATCH_4 0 31 ixBIOS_SCRATCH_5_IND 2 0x10905ce 1 0 4294967295 BIOS_SCRATCH_5 0 31 ixBIOS_SCRATCH_6_IND 2 0x10905cf 1 0 4294967295 BIOS_SCRATCH_6 0 31 ixBIOS_SCRATCH_7_IND 2 0x10905d0 1 0 4294967295 BIOS_SCRATCH_7 0 31 ixBIOS_SCRATCH_8_IND 2 0x10905d1 1 0 4294967295 BIOS_SCRATCH_8 0 31 ixBIOS_SCRATCH_9_IND 2 0x10905d2 1 0 4294967295 BIOS_SCRATCH_9 0 31 ixBIOS_SCRATCH_10_IND 2 0x10905d3 1 0 4294967295 BIOS_SCRATCH_10 0 31 ixBIOS_SCRATCH_11_IND 2 0x10905d4 1 0 4294967295 BIOS_SCRATCH_11 0 31 ixBIOS_SCRATCH_12_IND 2 0x10905d5 1 0 4294967295 BIOS_SCRATCH_12 0 31 ixBIOS_SCRATCH_13_IND 2 0x10905d6 1 0 4294967295 BIOS_SCRATCH_13 0 31 ixBIOS_SCRATCH_14_IND 2 0x10905d7 1 0 4294967295 BIOS_SCRATCH_14 0 31 ixBIOS_SCRATCH_15_IND 2 0x10905d8 1 0 4294967295 BIOS_SCRATCH_15 0 31 ixBIF_RB_CNTL_IND 2 0x1091530 6 0 4294967295 RB_ENABLE 0 0 RB_SIZE 1 5 WPTR_WRITEBACK_ENABLE 8 8 WPTR_WRITEBACK_TIMER 9 13 BIF_RB_TRAN 17 17 WPTR_OVERFLOW_CLEAR 31 31 ixBIF_RB_BASE_IND 2 0x1091531 1 0 4294967295 ADDR 0 31 ixBIF_RB_RPTR_IND 2 0x1091532 1 0 4294967295 OFFSET 2 17 ixBIF_RB_WPTR_IND 2 0x1091533 2 0 4294967295 BIF_RB_OVERFLOW 0 0 OFFSET 2 17 ixBIF_RB_WPTR_ADDR_HI_IND 2 0x1091534 1 0 4294967295 ADDR 0 7 ixBIF_RB_WPTR_ADDR_LO_IND 2 0x1091535 1 0 4294967295 ADDR 2 31 mmNB_GBIF_INDEX 0 0x34 1 0 4294967295 NB_GBIF_IND_ADDR 0 31 mmNB_GBIF_DATA 0 0x35 1 0 4294967295 NB_GBIF_DATA 0 31 mmPCIE_INDEX 0 0xe 1 0 4294967295 PCIE_INDEX 0 31 mmPCIE_DATA 0 0xf 1 0 4294967295 PCIE_DATA 0 31 mmPCIE_INDEX_2 0 0xc 1 0 4294967295 PCIE_INDEX 0 31 mmPCIE_DATA_2 0 0xd 1 0 4294967295 PCIE_DATA 0 31 ixPCIE_RESERVED 2 0x1400000 1 0 4294967295 PCIE_RESERVED 0 31 ixPCIE_SCRATCH 2 0x1400001 1 0 4294967295 PCIE_SCRATCH 0 31 ixPCIE_HW_DEBUG 2 0x1400002 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixPCIE_RX_NUM_NAK 2 0x140000e 1 0 4294967295 RX_NUM_NAK 0 31 ixPCIE_RX_NUM_NAK_GENERATED 2 0x140000f 1 0 4294967295 RX_NUM_NAK_GENERATED 0 31 ixPCIE_CNTL 2 0x1400010 18 0 4294967295 HWINIT_WR_LOCK 0 0 LC_HOT_PLUG_DELAY_SEL 1 3 UR_ERR_REPORT_DIS 7 7 PCIE_MALFORM_ATOMIC_OPS 8 8 PCIE_HT_NP_MEM_WRITE 9 9 RX_SB_ADJ_PAYLOAD_SIZE 10 12 RX_RCB_ATS_UC_DIS 15 15 RX_RCB_REORDER_EN 16 16 RX_RCB_INVALID_SIZE_DIS 17 17 RX_RCB_UNEXP_CPL_DIS 18 18 RX_RCB_CPL_TIMEOUT_TEST_MODE 19 19 RX_RCB_CHANNEL_ORDERING 20 20 RX_RCB_WRONG_ATTR_DIS 21 21 RX_RCB_WRONG_FUNCNUM_DIS 22 22 RX_ATS_TRAN_CPL_SPLIT_DIS 23 23 TX_CPL_DEBUG 24 29 RX_IGNORE_LTR_MSG_UR 30 30 RX_CPL_POSTED_REQ_ORD_EN 31 31 ixPCIE_CONFIG_CNTL 2 0x1400011 7 0 4294967295 DYN_CLK_LATENCY 0 3 CI_MAX_PAYLOAD_SIZE_MODE 16 16 CI_PRIV_MAX_PAYLOAD_SIZE 17 19 CI_MAX_READ_REQUEST_SIZE_MODE 20 20 CI_PRIV_MAX_READ_REQUEST_SIZE 21 23 CI_MAX_READ_SAFE_MODE 24 24 CI_EXTENDED_TAG_EN_OVERRIDE 25 26 ixPCIE_DEBUG_CNTL 2 0x1400012 3 0 4294967295 DEBUG_PORT_EN 0 7 DEBUG_SELECT 8 8 DEBUG_LANE_EN 16 31 ixPCIE_INT_CNTL 2 0x140001a 8 0 4294967295 CORR_ERR_INT_EN 0 0 NON_FATAL_ERR_INT_EN 1 1 FATAL_ERR_INT_EN 2 2 USR_DETECTED_INT_EN 3 3 MISC_ERR_INT_EN 4 4 POWER_STATE_CHG_INT_EN 6 6 LINK_BW_INT_EN 7 7 QUIESCE_RCVD_INT_EN 8 8 ixPCIE_INT_STATUS 2 0x140001b 8 0 4294967295 CORR_ERR_INT_STATUS 0 0 NON_FATAL_ERR_INT_STATUS 1 1 FATAL_ERR_INT_STATUS 2 2 USR_DETECTED_INT_STATUS 3 3 MISC_ERR_INT_STATUS 4 4 POWER_STATE_CHG_INT_STATUS 6 6 LINK_BW_INT_STATUS 7 7 QUIESCE_RCVD_INT_STATUS 8 8 ixPCIE_CNTL2 2 0x140001c 13 0 4294967295 TX_ARB_ROUND_ROBIN_EN 0 0 TX_ARB_SLV_LIMIT 1 5 TX_ARB_MST_LIMIT 6 10 TX_BLOCK_TLP_ON_PM_DIS 11 11 SLV_MEM_LS_EN 16 16 SLV_MEM_AGGRESSIVE_LS_EN 17 17 MST_MEM_LS_EN 18 18 REPLAY_MEM_LS_EN 19 19 SLV_MEM_SD_EN 20 20 SLV_MEM_AGGRESSIVE_SD_EN 21 21 MST_MEM_SD_EN 22 22 REPLAY_MEM_SD_EN 23 23 RX_NP_MEM_WRITE_ENCODING 24 28 ixPCIE_RX_CNTL2 2 0x140001d 9 0 4294967295 RX_IGNORE_EP_INVALIDPASID_UR 0 0 RX_IGNORE_EP_TRANSMRD_UR 1 1 RX_IGNORE_EP_TRANSMWR_UR 2 2 RX_IGNORE_EP_ATSTRANSREQ_UR 3 3 RX_IGNORE_EP_PAGEREQMSG_UR 4 4 RX_IGNORE_EP_INVCPL_UR 5 5 RX_RCB_LATENCY_EN 8 8 RX_RCB_LATENCY_SCALE 9 11 RX_RCB_LATENCY_MAX_COUNT 16 25 ixPCIE_TX_F0_ATTR_CNTL 2 0x140001e 7 0 4294967295 TX_F0_IDO_OVERRIDE_P 0 1 TX_F0_IDO_OVERRIDE_NP 2 3 TX_F0_IDO_OVERRIDE_CPL 4 5 TX_F0_RO_OVERRIDE_P 6 7 TX_F0_RO_OVERRIDE_NP 8 9 TX_F0_SNR_OVERRIDE_P 10 11 TX_F0_SNR_OVERRIDE_NP 12 13 ixPCIE_TX_F1_F2_ATTR_CNTL 2 0x140001f 14 0 4294967295 TX_F1_IDO_OVERRIDE_P 0 1 TX_F1_IDO_OVERRIDE_NP 2 3 TX_F1_IDO_OVERRIDE_CPL 4 5 TX_F1_RO_OVERRIDE_P 6 7 TX_F1_RO_OVERRIDE_NP 8 9 TX_F1_SNR_OVERRIDE_P 10 11 TX_F1_SNR_OVERRIDE_NP 12 13 TX_F2_IDO_OVERRIDE_P 16 17 TX_F2_IDO_OVERRIDE_NP 18 19 TX_F2_IDO_OVERRIDE_CPL 20 21 TX_F2_RO_OVERRIDE_P 22 23 TX_F2_RO_OVERRIDE_NP 24 25 TX_F2_SNR_OVERRIDE_P 26 27 TX_F2_SNR_OVERRIDE_NP 28 29 ixPCIE_CI_CNTL 2 0x1400020 10 0 4294967295 CI_SLAVE_SPLIT_MODE 2 2 CI_SLAVE_GEN_USR_DIS 3 3 CI_MST_CMPL_DUMMY_DATA 4 4 CI_SLV_RC_RD_REQ_SIZE 6 7 CI_SLV_ORDERING_DIS 8 8 CI_RC_ORDERING_DIS 9 9 CI_SLV_CPL_ALLOC_DIS 10 10 CI_SLV_CPL_ALLOC_MODE 11 11 CI_SLV_CPL_ALLOC_SOR 12 12 CI_MST_IGNORE_PAGE_ALIGNED_REQUEST 13 13 ixPCIE_BUS_CNTL 2 0x1400021 3 0 4294967295 PMI_INT_DIS 6 6 IMMEDIATE_PMI_DIS 7 7 TRUE_PM_STATUS_EN 12 12 ixPCIE_LC_STATE6 2 0x1400022 4 0 4294967295 LC_PREV_STATE24 0 5 LC_PREV_STATE25 8 13 LC_PREV_STATE26 16 21 LC_PREV_STATE27 24 29 ixPCIE_LC_STATE7 2 0x1400023 4 0 4294967295 LC_PREV_STATE28 0 5 LC_PREV_STATE29 8 13 LC_PREV_STATE30 16 21 LC_PREV_STATE31 24 29 ixPCIE_LC_STATE8 2 0x1400024 4 0 4294967295 LC_PREV_STATE32 0 5 LC_PREV_STATE33 8 13 LC_PREV_STATE34 16 21 LC_PREV_STATE35 24 29 ixPCIE_LC_STATE9 2 0x1400025 4 0 4294967295 LC_PREV_STATE36 0 5 LC_PREV_STATE37 8 13 LC_PREV_STATE38 16 21 LC_PREV_STATE39 24 29 ixPCIE_LC_STATE10 2 0x1400026 4 0 4294967295 LC_PREV_STATE40 0 5 LC_PREV_STATE41 8 13 LC_PREV_STATE42 16 21 LC_PREV_STATE43 24 29 ixPCIE_LC_STATE11 2 0x1400027 4 0 4294967295 LC_PREV_STATE44 0 5 LC_PREV_STATE45 8 13 LC_PREV_STATE46 16 21 LC_PREV_STATE47 24 29 ixPCIE_LC_STATUS1 2 0x1400028 4 0 4294967295 LC_REVERSE_RCVR 0 0 LC_REVERSE_XMIT 1 1 LC_OPERATING_LINK_WIDTH 2 4 LC_DETECTED_LINK_WIDTH 5 7 ixPCIE_LC_STATUS2 2 0x1400029 2 0 4294967295 LC_TOTAL_INACTIVE_LANES 0 15 LC_TURN_ON_LANE 16 31 ixPCIE_WPR_CNTL 2 0x1400030 7 0 4294967295 WPR_RESET_HOT_RST_EN 0 0 WPR_RESET_LNK_DWN_EN 1 1 WPR_RESET_LNK_DIS_EN 2 2 WPR_RESET_COR_EN 3 3 WPR_RESET_REG_EN 4 4 WPR_RESET_STY_EN 5 5 WPR_RESET_PHY_EN 6 6 ixPCIE_RX_LAST_TLP0 2 0x1400031 1 0 4294967295 RX_LAST_TLP0 0 31 ixPCIE_RX_LAST_TLP1 2 0x1400032 1 0 4294967295 RX_LAST_TLP1 0 31 ixPCIE_RX_LAST_TLP2 2 0x1400033 1 0 4294967295 RX_LAST_TLP2 0 31 ixPCIE_RX_LAST_TLP3 2 0x1400034 1 0 4294967295 RX_LAST_TLP3 0 31 ixPCIE_TX_LAST_TLP0 2 0x1400035 1 0 4294967295 TX_LAST_TLP0 0 31 ixPCIE_TX_LAST_TLP1 2 0x1400036 1 0 4294967295 TX_LAST_TLP1 0 31 ixPCIE_TX_LAST_TLP2 2 0x1400037 1 0 4294967295 TX_LAST_TLP2 0 31 ixPCIE_TX_LAST_TLP3 2 0x1400038 1 0 4294967295 TX_LAST_TLP3 0 31 ixPCIE_I2C_REG_ADDR_EXPAND 2 0x140003a 1 0 4294967295 I2C_REG_ADDR 0 16 ixPCIE_I2C_REG_DATA 2 0x140003b 1 0 4294967295 I2C_REG_DATA 0 31 ixPCIE_CFG_CNTL 2 0x140003c 3 0 4294967295 CFG_EN_DEC_TO_HIDDEN_REG 0 0 CFG_EN_DEC_TO_GEN2_HIDDEN_REG 1 1 CFG_EN_DEC_TO_GEN3_HIDDEN_REG 2 2 ixPCIE_P_CNTL 2 0x1400040 13 0 4294967295 P_PWRDN_EN 0 0 P_SYMALIGN_MODE 1 1 P_SYMALIGN_HW_DEBUG 2 2 P_ELASTDESKEW_HW_DEBUG 3 3 P_IGNORE_CRC_ERR 4 4 P_IGNORE_LEN_ERR 5 5 P_IGNORE_EDB_ERR 6 6 P_IGNORE_IDL_ERR 7 7 P_IGNORE_TOK_ERR 8 8 P_BLK_LOCK_MODE 12 12 P_ALWAYS_USE_FAST_TXCLK 13 13 P_ELEC_IDLE_MODE 14 15 DLP_IGNORE_IN_L1_EN 16 16 ixPCIE_P_BUF_STATUS 2 0x1400041 2 0 4294967295 P_OVERFLOW_ERR 0 15 P_UNDERFLOW_ERR 16 31 ixPCIE_P_DECODER_STATUS 2 0x1400042 1 0 4294967295 P_DECODE_ERR 0 15 ixPCIE_P_MISC_STATUS 2 0x1400043 2 0 4294967295 P_DESKEW_ERR 0 7 P_SYMUNLOCK_ERR 16 31 ixPCIE_P_RCV_L0S_FTS_DET 2 0x1400050 2 0 4294967295 P_RCV_L0S_FTS_DET_MIN 0 7 P_RCV_L0S_FTS_DET_MAX 8 15 ixPCIE_OBFF_CNTL 2 0x1400061 11 0 4294967295 TX_OBFF_PRIV_DISABLE 0 0 TX_OBFF_WAKE_SIMPLE_MODE_EN 1 1 TX_OBFF_HOSTMEM_TO_ACTIVE 2 2 TX_OBFF_SLVCPL_TO_ACTIVE 3 3 TX_OBFF_WAKE_MAX_PULSE_WIDTH 4 7 TX_OBFF_WAKE_MAX_TWO_FALLING_WIDTH 8 11 TX_OBFF_WAKE_SAMPLING_PERIOD 12 15 TX_OBFF_INTR_TO_ACTIVE 16 16 TX_OBFF_ERR_TO_ACTIVE 17 17 TX_OBFF_ANY_MSG_TO_ACTIVE 18 18 TX_OBFF_PENDING_REQ_TO_ACTIVE 20 23 ixPCIE_TX_LTR_CNTL 2 0x1400060 8 0 4294967295 LTR_PRIV_S_SHORT_VALUE 0 2 LTR_PRIV_S_LONG_VALUE 3 5 LTR_PRIV_S_REQUIREMENT 6 6 LTR_PRIV_NS_SHORT_VALUE 7 9 LTR_PRIV_NS_LONG_VALUE 10 12 LTR_PRIV_NS_REQUIREMENT 13 13 LTR_PRIV_MSG_DIS_IN_PM_NON_D0 14 14 LTR_PRIV_RST_LTR_IN_DL_DOWN 15 15 ixPCIE_PERF_COUNT_CNTL 2 0x1400080 3 0 4294967295 GLOBAL_COUNT_EN 0 0 GLOBAL_SHADOW_WR 1 1 GLOBAL_COUNT_RESET 2 2 ixPCIE_PERF_CNTL_TXCLK 2 0x1400081 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPCIE_PERF_COUNT0_TXCLK 2 0x1400082 1 0 4294967295 COUNTER0 0 31 ixPCIE_PERF_COUNT1_TXCLK 2 0x1400083 1 0 4294967295 COUNTER1 0 31 ixPCIE_PERF_CNTL_MST_R_CLK 2 0x1400084 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPCIE_PERF_COUNT0_MST_R_CLK 2 0x1400085 1 0 4294967295 COUNTER0 0 31 ixPCIE_PERF_COUNT1_MST_R_CLK 2 0x1400086 1 0 4294967295 COUNTER1 0 31 ixPCIE_PERF_CNTL_MST_C_CLK 2 0x1400087 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPCIE_PERF_COUNT0_MST_C_CLK 2 0x1400088 1 0 4294967295 COUNTER0 0 31 ixPCIE_PERF_COUNT1_MST_C_CLK 2 0x1400089 1 0 4294967295 COUNTER1 0 31 ixPCIE_PERF_CNTL_SLV_R_CLK 2 0x140008a 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPCIE_PERF_COUNT0_SLV_R_CLK 2 0x140008b 1 0 4294967295 COUNTER0 0 31 ixPCIE_PERF_COUNT1_SLV_R_CLK 2 0x140008c 1 0 4294967295 COUNTER1 0 31 ixPCIE_PERF_CNTL_SLV_S_C_CLK 2 0x140008d 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPCIE_PERF_COUNT0_SLV_S_C_CLK 2 0x140008e 1 0 4294967295 COUNTER0 0 31 ixPCIE_PERF_COUNT1_SLV_S_C_CLK 2 0x140008f 1 0 4294967295 COUNTER1 0 31 ixPCIE_PERF_CNTL_SLV_NS_C_CLK 2 0x1400090 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPCIE_PERF_COUNT0_SLV_NS_C_CLK 2 0x1400091 1 0 4294967295 COUNTER0 0 31 ixPCIE_PERF_COUNT1_SLV_NS_C_CLK 2 0x1400092 1 0 4294967295 COUNTER1 0 31 ixPCIE_PERF_CNTL_EVENT0_PORT_SEL 2 0x1400093 7 0 4294967295 PERF0_PORT_SEL_TXCLK 0 3 PERF0_PORT_SEL_MST_R_CLK 4 7 PERF0_PORT_SEL_MST_C_CLK 8 11 PERF0_PORT_SEL_SLV_R_CLK 12 15 PERF0_PORT_SEL_SLV_S_C_CLK 16 19 PERF0_PORT_SEL_SLV_NS_C_CLK 20 23 PERF0_PORT_SEL_TXCLK2 24 27 ixPCIE_PERF_CNTL_EVENT1_PORT_SEL 2 0x1400094 7 0 4294967295 PERF1_PORT_SEL_TXCLK 0 3 PERF1_PORT_SEL_MST_R_CLK 4 7 PERF1_PORT_SEL_MST_C_CLK 8 11 PERF1_PORT_SEL_SLV_R_CLK 12 15 PERF1_PORT_SEL_SLV_S_C_CLK 16 19 PERF1_PORT_SEL_SLV_NS_C_CLK 20 23 PERF1_PORT_SEL_TXCLK2 24 27 ixPCIE_PERF_CNTL_TXCLK2 2 0x1400095 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPCIE_PERF_COUNT0_TXCLK2 2 0x1400096 1 0 4294967295 COUNTER0 0 31 ixPCIE_PERF_COUNT1_TXCLK2 2 0x1400097 1 0 4294967295 COUNTER1 0 31 ixPCIE_STRAP_F0 2 0x14000b0 18 0 4294967295 STRAP_F0_EN 0 0 STRAP_F0_LEGACY_DEVICE_TYPE_EN 1 1 STRAP_F0_MSI_EN 2 2 STRAP_F0_VC_EN 3 3 STRAP_F0_DSN_EN 4 4 STRAP_F0_AER_EN 5 5 STRAP_F0_ACS_EN 6 6 STRAP_F0_BAR_EN 7 7 STRAP_F0_PWR_EN 8 8 STRAP_F0_DPA_EN 9 9 STRAP_F0_ATS_EN 10 10 STRAP_F0_PAGE_REQ_EN 11 11 STRAP_F0_PASID_EN 12 12 STRAP_F0_ECRC_CHECK_EN 13 13 STRAP_F0_ECRC_GEN_EN 14 14 STRAP_F0_CPL_ABORT_ERR_EN 15 15 STRAP_F0_POISONED_ADVISORY_NONFATAL 16 16 STRAP_F0_MC_EN 17 17 ixPCIE_STRAP_F1 2 0x14000b1 17 0 4294967295 STRAP_F1_EN 0 0 STRAP_F1_LEGACY_DEVICE_TYPE_EN 1 1 STRAP_F1_MSI_EN 2 2 STRAP_F1_VC_EN 3 3 STRAP_F1_DSN_EN 4 4 STRAP_F1_AER_EN 5 5 STRAP_F1_ACS_EN 6 6 STRAP_F1_BAR_EN 7 7 STRAP_F1_PWR_EN 8 8 STRAP_F1_DPA_EN 9 9 STRAP_F1_ATS_EN 10 10 STRAP_F1_PAGE_REQ_EN 11 11 STRAP_F1_PASID_EN 12 12 STRAP_F1_ECRC_CHECK_EN 13 13 STRAP_F1_ECRC_GEN_EN 14 14 STRAP_F1_CPL_ABORT_ERR_EN 15 15 STRAP_F1_POISONED_ADVISORY_NONFATAL 16 16 ixPCIE_STRAP_F2 2 0x14000b2 17 0 4294967295 STRAP_F2_EN 0 0 STRAP_F2_LEGACY_DEVICE_TYPE_EN 1 1 STRAP_F2_MSI_EN 2 2 STRAP_F2_VC_EN 3 3 STRAP_F2_DSN_EN 4 4 STRAP_F2_AER_EN 5 5 STRAP_F2_ACS_EN 6 6 STRAP_F2_BAR_EN 7 7 STRAP_F2_PWR_EN 8 8 STRAP_F2_DPA_EN 9 9 STRAP_F2_ATS_EN 10 10 STRAP_F2_PAGE_REQ_EN 11 11 STRAP_F2_PASID_EN 12 12 STRAP_F2_ECRC_CHECK_EN 13 13 STRAP_F2_ECRC_GEN_EN 14 14 STRAP_F2_CPL_ABORT_ERR_EN 15 15 STRAP_F2_POISONED_ADVISORY_NONFATAL 16 16 ixPCIE_STRAP_F3 2 0x14000b3 1 0 4294967295 RESERVED 0 31 ixPCIE_STRAP_F4 2 0x14000b4 1 0 4294967295 RESERVED 0 31 ixPCIE_STRAP_F5 2 0x14000b5 1 0 4294967295 RESERVED 0 31 ixPCIE_STRAP_F6 2 0x14000b6 1 0 4294967295 RESERVED 0 31 ixPCIE_STRAP_F7 2 0x14000b7 1 0 4294967295 RESERVED 0 31 ixPCIE_STRAP_MISC 2 0x14000c0 13 0 4294967295 STRAP_LINK_CONFIG 0 3 STRAP_TL_ALT_BUF_EN 4 4 STRAP_MAX_PASID_WIDTH 8 12 STRAP_PASID_EXE_PERMISSION_SUPPORTED 13 13 STRAP_PASID_PRIV_MODE_SUPPORTED 14 14 STRAP_PASID_GLOBAL_INVALIDATE_SUPPORTED 15 15 STRAP_CLK_PM_EN 24 24 STRAP_ECN1P1_EN 25 25 STRAP_EXT_VC_COUNT 26 26 STRAP_REVERSE_ALL 28 28 STRAP_MST_ADR64_EN 29 29 STRAP_FLR_EN 30 30 STRAP_INTERNAL_ERR_EN 31 31 ixPCIE_STRAP_MISC2 2 0x14000c1 4 0 4294967295 STRAP_GEN2_COMPLIANCE 1 1 STRAP_MSTCPL_TIMEOUT_EN 2 2 STRAP_GEN3_COMPLIANCE 3 3 STRAP_TPH_SUPPORTED 4 4 ixPCIE_STRAP_PI 2 0x14000c2 3 0 4294967295 STRAP_QUICKSIM_START 0 0 STRAP_TEST_TOGGLE_PATTERN 28 28 STRAP_TEST_TOGGLE_MODE 29 29 ixPCIE_STRAP_I2C_BD 2 0x14000c4 2 0 4294967295 STRAP_BIF_I2C_SLV_ADR 0 6 STRAP_BIF_DBG_I2C_EN 7 7 ixPCIE_PRBS_CLR 2 0x14000c8 2 0 4294967295 PRBS_CLR 0 15 PRBS_CHECKER_DEBUG_BUS_SELECT 16 19 ixPCIE_PRBS_STATUS1 2 0x14000c9 2 0 4294967295 PRBS_ERRSTAT 0 15 PRBS_LOCKED 16 31 ixPCIE_PRBS_STATUS2 2 0x14000ca 1 0 4294967295 PRBS_BITCNT_DONE 0 15 ixPCIE_PRBS_FREERUN 2 0x14000cb 1 0 4294967295 PRBS_FREERUN 0 15 ixPCIE_PRBS_MISC 2 0x14000cc 8 0 4294967295 PRBS_EN 0 0 PRBS_TEST_MODE 1 2 PRBS_USER_PATTERN_TOGGLE 3 3 PRBS_8BIT_SEL 4 4 PRBS_COMMA_NUM 5 6 PRBS_LOCK_CNT 7 11 PRBS_DATA_RATE 14 15 PRBS_CHK_ERR_MASK 16 31 ixPCIE_PRBS_USER_PATTERN 2 0x14000cd 1 0 4294967295 PRBS_USER_PATTERN 0 29 ixPCIE_PRBS_LO_BITCNT 2 0x14000ce 1 0 4294967295 PRBS_LO_BITCNT 0 31 ixPCIE_PRBS_HI_BITCNT 2 0x14000cf 1 0 4294967295 PRBS_HI_BITCNT 0 7 ixPCIE_PRBS_ERRCNT_0 2 0x14000d0 1 0 4294967295 PRBS_ERRCNT_0 0 31 ixPCIE_PRBS_ERRCNT_1 2 0x14000d1 1 0 4294967295 PRBS_ERRCNT_1 0 31 ixPCIE_PRBS_ERRCNT_2 2 0x14000d2 1 0 4294967295 PRBS_ERRCNT_2 0 31 ixPCIE_PRBS_ERRCNT_3 2 0x14000d3 1 0 4294967295 PRBS_ERRCNT_3 0 31 ixPCIE_PRBS_ERRCNT_4 2 0x14000d4 1 0 4294967295 PRBS_ERRCNT_4 0 31 ixPCIE_PRBS_ERRCNT_5 2 0x14000d5 1 0 4294967295 PRBS_ERRCNT_5 0 31 ixPCIE_PRBS_ERRCNT_6 2 0x14000d6 1 0 4294967295 PRBS_ERRCNT_6 0 31 ixPCIE_PRBS_ERRCNT_7 2 0x14000d7 1 0 4294967295 PRBS_ERRCNT_7 0 31 ixPCIE_PRBS_ERRCNT_8 2 0x14000d8 1 0 4294967295 PRBS_ERRCNT_8 0 31 ixPCIE_PRBS_ERRCNT_9 2 0x14000d9 1 0 4294967295 PRBS_ERRCNT_9 0 31 ixPCIE_PRBS_ERRCNT_10 2 0x14000da 1 0 4294967295 PRBS_ERRCNT_10 0 31 ixPCIE_PRBS_ERRCNT_11 2 0x14000db 1 0 4294967295 PRBS_ERRCNT_11 0 31 ixPCIE_PRBS_ERRCNT_12 2 0x14000dc 1 0 4294967295 PRBS_ERRCNT_12 0 31 ixPCIE_PRBS_ERRCNT_13 2 0x14000dd 1 0 4294967295 PRBS_ERRCNT_13 0 31 ixPCIE_PRBS_ERRCNT_14 2 0x14000de 1 0 4294967295 PRBS_ERRCNT_14 0 31 ixPCIE_PRBS_ERRCNT_15 2 0x14000df 1 0 4294967295 PRBS_ERRCNT_15 0 31 ixPCIE_F0_DPA_CAP 2 0x14000e0 4 0 4294967295 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 ixPCIE_F0_DPA_LATENCY_INDICATOR 2 0x14000e4 1 0 4294967295 TRANS_LAT_INDICATOR_BITS 0 7 ixPCIE_F0_DPA_CNTL 2 0x14000e5 1 0 4294967295 SUBSTATE_STATUS 0 4 ixPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_0 2 0x14000e7 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 ixPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_1 2 0x14000e8 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 ixPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_2 2 0x14000e9 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 ixPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_3 2 0x14000ea 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 ixPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_4 2 0x14000eb 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 ixPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5 2 0x14000ec 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 ixPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_6 2 0x14000ed 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 ixPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_7 2 0x14000ee 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 ixPCIEP_RESERVED 2 0x10010000 1 0 4294967295 PCIEP_RESERVED 0 31 ixPCIEP_SCRATCH 2 0x10010001 1 0 4294967295 PCIEP_SCRATCH 0 31 ixPCIEP_HW_DEBUG 2 0x10010002 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixPCIEP_PORT_CNTL 2 0x10010010 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixPCIE_TX_CNTL 2 0x10010020 11 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 TX_F0_TPH_DIS 24 24 TX_F1_TPH_DIS 25 25 TX_F2_TPH_DIS 26 26 ixPCIE_TX_REQUESTER_ID 2 0x10010021 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixPCIE_TX_VENDOR_SPECIFIC 2 0x10010022 1 0 4294967295 TX_VENDOR_DATA 0 23 ixPCIE_TX_REQUEST_NUM_CNTL 2 0x10010023 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixPCIE_TX_SEQ 2 0x10010024 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixPCIE_TX_REPLAY 2 0x10010025 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixPCIE_TX_ACK_LATENCY_LIMIT 2 0x10010026 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixPCIE_TX_CREDITS_ADVT_P 2 0x10010030 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixPCIE_TX_CREDITS_ADVT_NP 2 0x10010031 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixPCIE_TX_CREDITS_ADVT_CPL 2 0x10010032 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixPCIE_TX_CREDITS_INIT_P 2 0x10010033 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixPCIE_TX_CREDITS_INIT_NP 2 0x10010034 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixPCIE_TX_CREDITS_INIT_CPL 2 0x10010035 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixPCIE_TX_CREDITS_STATUS 2 0x10010036 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixPCIE_TX_CREDITS_FCU_THRESHOLD 2 0x10010037 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixPCIE_P_PORT_LANE_STATUS 2 0x10010050 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixPCIE_FC_P 2 0x10010060 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixPCIE_FC_NP 2 0x10010061 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixPCIE_FC_CPL 2 0x10010062 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixPCIE_ERR_CNTL 2 0x1001006a 16 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 AER_HDR_LOG_F1_TIMER_EXPIRED 12 12 AER_HDR_LOG_F2_TIMER_EXPIRED 13 13 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixPCIE_RX_CNTL 2 0x10010070 24 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 ixPCIE_RX_EXPECTED_SEQNUM 2 0x10010071 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixPCIE_RX_VENDOR_SPECIFIC 2 0x10010072 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixPCIE_RX_CNTL3 2 0x10010074 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixPCIE_RX_CREDITS_ALLOCATED_P 2 0x10010080 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixPCIE_RX_CREDITS_ALLOCATED_NP 2 0x10010081 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixPCIE_RX_CREDITS_ALLOCATED_CPL 2 0x10010082 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixPCIE_LC_CNTL 2 0x100100a0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixPCIE_LC_CNTL2 2 0x100100b1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixPCIE_LC_CNTL3 2 0x100100b5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixPCIE_LC_CNTL4 2 0x100100b6 20 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixPCIE_LC_CNTL5 2 0x100100b7 4 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 ixPCIE_LC_BW_CHANGE_CNTL 2 0x100100b2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixPCIE_LC_TRAINING_CNTL 2 0x100100a1 23 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixPCIE_LC_LINK_WIDTH_CNTL 2 0x100100a2 18 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 ixPCIE_LC_N_FTS_CNTL 2 0x100100a3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixPCIE_LC_SPEED_CNTL 2 0x100100a4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixPCIE_LC_CDR_CNTL 2 0x100100b3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixPCIE_LC_LANE_CNTL 2 0x100100b4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixPCIE_LC_FORCE_COEFF 2 0x100100b8 5 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 ixPCIE_LC_BEST_EQ_SETTINGS 2 0x100100b9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixPCIE_LC_FORCE_EQ_REQ_COEFF 2 0x100100ba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixPCIE_LC_STATE0 2 0x100100a5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixPCIE_LC_STATE1 2 0x100100a6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixPCIE_LC_STATE2 2 0x100100a7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixPCIE_LC_STATE3 2 0x100100a8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixPCIE_LC_STATE4 2 0x100100a9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixPCIE_LC_STATE5 2 0x100100aa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixPCIEP_STRAP_LC 2 0x100100c0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixPCIEP_STRAP_MISC 2 0x100100c1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixPCIEP_BCH_ECC_CNTL 2 0x100100d0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 mmBIF_RFE_SNOOP_REG 0 0x27 2 0 4294967295 REG_SNOOP_ARBITER 0 0 REG_SNOOP_ALLMASTER 1 1 mmBIF_RFE_WARMRST_CNTL 0 0x1459 1 0 4294967295 REG_RST_warmRstRfeEn 0 0 mmBIF_RFE_SOFTRST_CNTL 0 0x1441 3 0 4294967295 REG_RST_rstTimer 0 15 REG_RST_softRstPropEn 30 30 SoftRstReg 31 31 mmBIF_RFE_CLIENT_SOFTRST_TRIGGER 0 0x1442 3 0 4294967295 CLIENT0_RFE_RFEWGBIF_rst 0 0 CLIENT1_RFE_RFEWGBIF_rst 1 1 CLIENT2_RFE_RFEWGBIF_rst 2 2 mmBIF_RFE_MASTER_SOFTRST_TRIGGER 0 0x1443 3 0 4294967295 FBU_rst 0 0 RWREG_RFEWGBIF_rst 1 1 BX_rst 2 2 mmBIF_PWDN_COMMAND 0 0x1444 3 0 4294967295 REG_FBU_pw_cmd 0 0 REG_RWREG_RFEWGBIF_pw_cmd 1 1 REG_BX_pw_cmd 2 2 mmBIF_PWDN_STATUS 0 0x1445 3 0 4294967295 FBU_REG_pw_status 0 0 RWREG_RFEWGBIF_REG_pw_status 1 1 BX_REG_pw_status 2 2 mmBIF_RFE_MST_FBU_CMDSTATUS 0 0x1446 4 0 4294967295 REG_FBU_clkGate_timer 0 7 REG_FBU_clkSetup_timer 8 11 REG_FBU_timeout_timer 16 23 FBU_RFE_mstTimeout 24 24 mmBIF_RFE_MST_RWREG_RFEWGBIF_CMDSTATUS 0 0x1447 4 0 4294967295 REG_RWREG_RFEWGBIF_clkGate_timer 0 7 REG_RWREG_RFEWGBIF_clkSetup_timer 8 11 REG_RWREG_RFEWGBIF_timeout_timer 16 23 RWREG_RFEWGBIF_RFE_mstTimeout 24 24 mmBIF_RFE_MST_BX_CMDSTATUS 0 0x1448 4 0 4294967295 REG_BX_clkGate_timer 0 7 REG_BX_clkSetup_timer 8 11 REG_BX_timeout_timer 16 23 BX_RFE_mstTimeout 24 24 mmBIF_RFE_MST_TMOUT_STATUS 0 0x144b 1 0 4294967295 MstTmoutStatus 0 0 mmBIF_RFE_MMCFG_CNTL 0 0x144c 4 0 4294967295 CLIENT1_RFE_RFEWGBIF_MM_WR_TO_CFG_EN 0 0 CLIENT1_RFE_RFEWGBIF_MM_CFG_FUNC_SEL 1 3 CLIENT2_RFE_RFEWGBIF_MM_WR_TO_CFG_EN 4 4 CLIENT2_RFE_RFEWGBIF_MM_CFG_FUNC_SEL 5 7 ixBIF_CLOCKS_BITS_IND 2 0x1301489 1 0 4294967295 OBFF_XSL_FORCE_REFCLK 0 0 ixBIF_LNCNT_RESET_IND 2 0x1301488 1 0 4294967295 RESET_LNCNT_EN 0 0 ixLNCNT_CONTROL_IND 2 0x1301487 2 0 4294967295 LNCNT_ACC_MODE 0 0 LNCNT_REF_TIMEBASE 1 2 ixNEW_REFCLKB_TIMER_IND 2 0x1301485 3 0 4294967295 REG_STOP_REFCLK_EN 0 0 STOP_REFCLK_TIMER 1 20 REFCLK_ON 21 21 ixNEW_REFCLKB_TIMER_1_IND 2 0x1301484 2 0 4294967295 PHY_PLL_PDWN_TIMER 0 9 PLL0_PDNB_EN 10 10 ixBIF_CLK_PDWN_DELAY_TIMER_IND 2 0x1301483 1 0 4294967295 TIMER 0 9 ixBIF_RESET_EN_IND 2 0x1301482 22 0 4294967295 SOFT_RST_MODE 1 1 PHY_RESET_EN 2 2 COR_RESET_EN 3 3 REG_RESET_EN 4 4 STY_RESET_EN 5 5 CFG_RESET_EN 6 6 DRV_RESET_EN 7 7 RESET_CFGREG_ONLY_EN 8 8 HOT_RESET_EN 9 9 LINK_DISABLE_RESET_EN 10 10 LINK_DOWN_RESET_EN 11 11 CFG_RESET_PULSE_WIDTH 12 17 DRV_RESET_DELAY_SEL 18 19 PIF_RSTB_EN 20 20 PIF_STRAP_ALLVALID_EN 21 21 BIF_COR_RESET_EN 22 22 FUNC0_FLR_EN 23 23 FUNC1_FLR_EN 24 24 FUNC2_FLR_EN 25 25 FUNC0_RESET_DELAY_SEL 26 27 FUNC1_RESET_DELAY_SEL 28 29 FUNC2_RESET_DELAY_SEL 30 31 ixBIF_PIF_TXCLK_SWITCH_TIMER_IND 2 0x1301481 3 0 4294967295 PLL0_ACK_TIMER 0 2 PLL1_ACK_TIMER 3 5 PLL_SWITCH_TIMER 6 9 ixBIF_BACO_MSIC_IND 2 0x1301480 3 0 4294967295 BIF_XTALIN_SEL 0 0 BACO_LINK_RST_SEL 1 2 ACPI_BACO_MUX_DIS 4 4 ixBIF_RESET_CNTL_IND 2 0x1301486 6 0 4294967295 STRAP_EN 0 0 RST_DONE 1 1 LINK_TRAIN_EN 2 2 STRAP_ALL_VALID 3 3 RECAP_STRAP_WARMRST 8 8 HOLD_LKTRN_WARMRST_DIS 9 9 ixBIF_RFE_CNTL_MISC_IND 2 0x130148c 4 0 4294967295 ADAPT_pif0_bu_reg_accessMode 0 0 ADAPT_pif1_bu_reg_accessMode 1 1 ADAPT_pwreg_bu_reg_accessMode 2 2 ADAPT_pciecore0_bu_reg_accessMode 3 3 ixBIF_MEM_PG_CNTL_IND 2 0x130148a 2 0 4294967295 BIF_MEM_SD_EN 0 0 BIF_MEM_SD_TIMER 16 31 mmNB_GBIF_INDEX 0 0x34 1 0 4294967295 NB_GBIF_IND_ADDR 0 31 mmNB_GBIF_DATA 0 0x35 1 0 4294967295 NB_GBIF_DATA 0 31 mmBIF_CLOCKS_BITS 0 0x1489 1 0 4294967295 OBFF_XSL_FORCE_REFCLK 0 0 mmBIF_LNCNT_RESET 0 0x1488 1 0 4294967295 RESET_LNCNT_EN 0 0 mmLNCNT_CONTROL 0 0x1487 2 0 4294967295 LNCNT_ACC_MODE 0 0 LNCNT_REF_TIMEBASE 1 2 mmNEW_REFCLKB_TIMER 0 0x1485 3 0 4294967295 REG_STOP_REFCLK_EN 0 0 STOP_REFCLK_TIMER 1 20 REFCLK_ON 21 21 mmNEW_REFCLKB_TIMER_1 0 0x1484 2 0 4294967295 PHY_PLL_PDWN_TIMER 0 9 PLL0_PDNB_EN 10 10 mmBIF_CLK_PDWN_DELAY_TIMER 0 0x1483 1 0 4294967295 TIMER 0 9 mmBIF_RESET_EN 0 0x1482 22 0 4294967295 SOFT_RST_MODE 1 1 PHY_RESET_EN 2 2 COR_RESET_EN 3 3 REG_RESET_EN 4 4 STY_RESET_EN 5 5 CFG_RESET_EN 6 6 DRV_RESET_EN 7 7 RESET_CFGREG_ONLY_EN 8 8 HOT_RESET_EN 9 9 LINK_DISABLE_RESET_EN 10 10 LINK_DOWN_RESET_EN 11 11 CFG_RESET_PULSE_WIDTH 12 17 DRV_RESET_DELAY_SEL 18 19 PIF_RSTB_EN 20 20 PIF_STRAP_ALLVALID_EN 21 21 BIF_COR_RESET_EN 22 22 FUNC0_FLR_EN 23 23 FUNC1_FLR_EN 24 24 FUNC2_FLR_EN 25 25 FUNC0_RESET_DELAY_SEL 26 27 FUNC1_RESET_DELAY_SEL 28 29 FUNC2_RESET_DELAY_SEL 30 31 mmBIF_PIF_TXCLK_SWITCH_TIMER 0 0x1481 3 0 4294967295 PLL0_ACK_TIMER 0 2 PLL1_ACK_TIMER 3 5 PLL_SWITCH_TIMER 6 9 mmBIF_BACO_MSIC 0 0x1480 3 0 4294967295 BIF_XTALIN_SEL 0 0 BACO_LINK_RST_SEL 1 2 ACPI_BACO_MUX_DIS 4 4 mmBIF_RESET_CNTL 0 0x1486 6 0 4294967295 STRAP_EN 0 0 RST_DONE 1 1 LINK_TRAIN_EN 2 2 STRAP_ALL_VALID 3 3 RECAP_STRAP_WARMRST 8 8 HOLD_LKTRN_WARMRST_DIS 9 9 mmBIF_RFE_CNTL_MISC 0 0x148c 4 0 4294967295 ADAPT_pif0_bu_reg_accessMode 0 0 ADAPT_pif1_bu_reg_accessMode 1 1 ADAPT_pwreg_bu_reg_accessMode 2 2 ADAPT_pciecore0_bu_reg_accessMode 3 3 mmBIF_MEM_PG_CNTL 0 0x148a 2 0 4294967295 BIF_MEM_SD_EN 0 0 BIF_MEM_SD_TIMER 16 31 mmC_PCIE_P_INDEX 0 0x38 1 0 4294967295 PCIE_INDEX 0 31 mmC_PCIE_P_DATA 0 0x39 1 0 4294967295 PCIE_DATA 0 31 ixD2F1_PCIE_PORT_INDEX 2 0x2000038 1 0 4294967295 PCIE_INDEX 0 7 ixD2F1_PCIE_PORT_DATA 2 0x2000039 1 0 4294967295 PCIE_DATA 0 31 ixD2F1_PCIEP_RESERVED 2 0x0 1 0 4294967295 PCIEP_RESERVED 0 31 ixD2F1_PCIEP_SCRATCH 2 0x1 1 0 4294967295 PCIEP_SCRATCH 0 31 ixD2F1_PCIEP_HW_DEBUG 2 0x2 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixD2F1_PCIEP_PORT_CNTL 2 0x10 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixD2F1_PCIE_TX_CNTL 2 0x20 8 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 ixD2F1_PCIE_TX_REQUESTER_ID 2 0x21 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixD2F1_PCIE_TX_VENDOR_SPECIFIC 2 0x22 1 0 4294967295 TX_VENDOR_DATA 0 23 ixD2F1_PCIE_TX_REQUEST_NUM_CNTL 2 0x23 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixD2F1_PCIE_TX_SEQ 2 0x24 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixD2F1_PCIE_TX_REPLAY 2 0x25 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixD2F1_PCIE_TX_ACK_LATENCY_LIMIT 2 0x26 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixD2F1_PCIE_TX_CREDITS_ADVT_P 2 0x30 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixD2F1_PCIE_TX_CREDITS_ADVT_NP 2 0x31 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixD2F1_PCIE_TX_CREDITS_ADVT_CPL 2 0x32 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixD2F1_PCIE_TX_CREDITS_INIT_P 2 0x33 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixD2F1_PCIE_TX_CREDITS_INIT_NP 2 0x34 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixD2F1_PCIE_TX_CREDITS_INIT_CPL 2 0x35 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixD2F1_PCIE_TX_CREDITS_STATUS 2 0x36 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixD2F1_PCIE_TX_CREDITS_FCU_THRESHOLD 2 0x37 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixD2F1_PCIE_P_PORT_LANE_STATUS 2 0x50 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixD2F1_PCIE_FC_P 2 0x60 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixD2F1_PCIE_FC_NP 2 0x61 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixD2F1_PCIE_FC_CPL 2 0x62 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixD2F1_PCIE_ERR_CNTL 2 0x6a 14 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixD2F1_PCIE_RX_CNTL 2 0x70 26 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 RX_RCB_FLR_TIMEOUT_DIS 27 27 ixD2F1_PCIE_RX_EXPECTED_SEQNUM 2 0x71 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixD2F1_PCIE_RX_VENDOR_SPECIFIC 2 0x72 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixD2F1_PCIE_RX_CNTL3 2 0x74 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixD2F1_PCIE_RX_CREDITS_ALLOCATED_P 2 0x80 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixD2F1_PCIE_RX_CREDITS_ALLOCATED_NP 2 0x81 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixD2F1_PCIE_RX_CREDITS_ALLOCATED_CPL 2 0x82 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixD2F1_PCIEP_ERROR_INJECT_PHYSICAL 2 0x83 12 0 4294967295 ERROR_INJECT_PL_LANE_ERR 0 1 ERROR_INJECT_PL_FRAMING_ERR 2 3 ERROR_INJECT_PL_BAD_PARITY_IN_SKP 4 5 ERROR_INJECT_PL_BAD_LFSR_IN_SKP 6 7 ERROR_INJECT_PL_LOOPBACK_UFLOW 8 9 ERROR_INJECT_PL_LOOPBACK_OFLOW 10 11 ERROR_INJECT_PL_DESKEW_ERR 12 13 ERROR_INJECT_PL_8B10B_DISPARITY_ERR 14 15 ERROR_INJECT_PL_8B10B_DECODE_ERR 16 17 ERROR_INJECT_PL_SKP_OS_ERROR 18 19 ERROR_INJECT_PL_INV_OS_IDENTIFIER 20 21 ERROR_INJECT_PL_BAD_SYNC_HEADER 22 23 ixD2F1_PCIEP_ERROR_INJECT_TRANSACTION 2 0x84 10 0 4294967295 ERROR_INJECT_TL_FLOW_CTL_ERR 0 1 ERROR_INJECT_TL_REPLAY_NUM_ROLLOVER 2 3 ERROR_INJECT_TL_BAD_DLLP 4 5 ERROR_INJECT_TL_BAD_TLP 6 7 ERROR_INJECT_TL_UNSUPPORTED_REQ 8 9 ERROR_INJECT_TL_ECRC_ERROR 10 11 ERROR_INJECT_TL_MALFORMED_TLP 12 13 ERROR_INJECT_TL_UNEXPECTED_CMPLT 14 15 ERROR_INJECT_TL_COMPLETER_ABORT 16 17 ERROR_INJECT_TL_COMPLETION_TIMEOUT 18 19 ixD2F1_PCIE_LC_CNTL 2 0xa0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixD2F1_PCIE_LC_CNTL2 2 0xb1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixD2F1_PCIE_LC_CNTL3 2 0xb5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixD2F1_PCIE_LC_CNTL4 2 0xb6 22 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_DIS_CONTIG_END_SET_CHECK 2 2 LC_DIS_ASPM_L1_IN_SPEED_CHANGE 3 3 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixD2F1_PCIE_LC_CNTL5 2 0xb7 5 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 LC_DSC_EQ_FS_LF_INVALID_TO_PRESETS 24 24 ixD2F1_PCIE_LC_CNTL6 2 0xbb 3 0 4294967295 LC_SPC_MODE_2P5GT 0 0 LC_SPC_MODE_5GT 2 2 LC_SPC_MODE_8GT 4 4 ixD2F1_PCIE_LC_BW_CHANGE_CNTL 2 0xb2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixD2F1_PCIE_LC_TRAINING_CNTL 2 0xa1 25 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_WAIT_FOR_SETS_IN_RCFG 14 14 LC_HOT_RESET_QUICK_EXIT_EN 15 15 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixD2F1_PCIE_LC_LINK_WIDTH_CNTL 2 0xa2 24 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 LC_MULT_REVERSE_ATTEMP_EN 24 24 LC_RESET_TSX_CNT_IN_RCONFIG_EN 25 25 LC_WAIT_FOR_L_IDLE_IN_R_IDLE 26 26 LC_WAIT_FOR_NON_EI_ON_RXL0S_EXIT 27 27 LC_HOLD_EI_FOR_RSPEED_CMD_CHANGE 28 28 LC_BYPASS_RXL0S_ON_SHORT_EI 29 29 ixD2F1_PCIE_LC_N_FTS_CNTL 2 0xa3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixD2F1_PCIE_LC_SPEED_CNTL 2 0xa4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixD2F1_PCIE_LC_CDR_CNTL 2 0xb3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixD2F1_PCIE_LC_LANE_CNTL 2 0xb4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixD2F1_PCIE_LC_FORCE_COEFF 2 0xb8 6 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 LC_PRESET_10_EN 20 20 ixD2F1_PCIE_LC_BEST_EQ_SETTINGS 2 0xb9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixD2F1_PCIE_LC_FORCE_EQ_REQ_COEFF 2 0xba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixD2F1_PCIE_LC_STATE0 2 0xa5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixD2F1_PCIE_LC_STATE1 2 0xa6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixD2F1_PCIE_LC_STATE2 2 0xa7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixD2F1_PCIE_LC_STATE3 2 0xa8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixD2F1_PCIE_LC_STATE4 2 0xa9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixD2F1_PCIE_LC_STATE5 2 0xaa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixD2F1_PCIEP_STRAP_LC 2 0xc0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixD2F1_PCIEP_STRAP_MISC 2 0xc1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixD2F1_PCIEP_BCH_ECC_CNTL 2 0xd0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 ixD2F1_PCIEP_HPGI_PRIVATE 2 0xd2 2 0 4294967295 PRESENCE_DETECT_CHANGED_PRIVATE 3 3 PRESENCE_DETECT_STATE_PRIVATE 6 6 ixD2F1_PCIEP_HPGI 2 0xda 11 0 4294967295 REG_HPGI_ASSERT_TO_SMI_EN 0 0 REG_HPGI_ASSERT_TO_SCI_EN 1 1 REG_HPGI_DEASSERT_TO_SMI_EN 2 2 REG_HPGI_DEASSERT_TO_SCI_EN 3 3 REG_HPGI_HOOK 7 7 HPGI_REG_ASSERT_TO_SMI_STATUS 8 8 HPGI_REG_ASSERT_TO_SCI_STATUS 9 9 HPGI_REG_DEASSERT_TO_SMI_STATUS 10 10 HPGI_REG_DEASSERT_TO_SCI_STATUS 11 11 HPGI_REG_PRESENCE_DETECT_STATE_CHANGE_STATUS 15 15 REG_HPGI_PRESENCE_DETECT_STATE_CHANGE_EN 16 16 ixD2F1_VENDOR_ID 2 0x2000000 1 0 4294967295 VENDOR_ID 0 15 ixD2F1_DEVICE_ID 2 0x2000000 1 0 4294967295 DEVICE_ID 16 31 ixD2F1_COMMAND 2 0x2000001 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 ixD2F1_STATUS 2 0x2000001 11 0 4294967295 INT_STATUS 19 19 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 SIGNALED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD2F1_REVISION_ID 2 0x2000002 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 ixD2F1_PROG_INTERFACE 2 0x2000002 1 0 4294967295 PROG_INTERFACE 8 15 ixD2F1_SUB_CLASS 2 0x2000002 1 0 4294967295 SUB_CLASS 16 23 ixD2F1_BASE_CLASS 2 0x2000002 1 0 4294967295 BASE_CLASS 24 31 ixD2F1_CACHE_LINE 2 0x2000003 1 0 4294967295 CACHE_LINE_SIZE 0 7 ixD2F1_LATENCY 2 0x2000003 1 0 4294967295 LATENCY_TIMER 8 15 ixD2F1_HEADER 2 0x2000003 2 0 4294967295 HEADER_TYPE 16 22 DEVICE_TYPE 23 23 ixD2F1_BIST 2 0x2000003 3 0 4294967295 BIST_COMP 24 27 BIST_STRT 30 30 BIST_CAP 31 31 ixD2F1_SUB_BUS_NUMBER_LATENCY 2 0x2000006 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 ixD2F1_IO_BASE_LIMIT 2 0x2000007 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 ixD2F1_SECONDARY_STATUS 2 0x2000007 10 0 4294967295 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 RECEIVED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD2F1_MEM_BASE_LIMIT 2 0x2000008 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 ixD2F1_PREF_BASE_LIMIT 2 0x2000009 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 ixD2F1_PREF_BASE_UPPER 2 0x200000a 1 0 4294967295 PREF_BASE_UPPER 0 31 ixD2F1_PREF_LIMIT_UPPER 2 0x200000b 1 0 4294967295 PREF_LIMIT_UPPER 0 31 ixD2F1_IO_BASE_LIMIT_HI 2 0x200000c 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 ixD2F1_IRQ_BRIDGE_CNTL 2 0x200000f 8 0 4294967295 PARITY_RESPONSE_EN 16 16 SERR_EN 17 17 ISA_EN 18 18 VGA_EN 19 19 VGA_DEC 20 20 MASTER_ABORT_MODE 21 21 SECONDARY_BUS_RESET 22 22 FAST_B2B_EN 23 23 ixD2F1_CAP_PTR 2 0x200000d 1 0 4294967295 CAP_PTR 0 7 ixD2F1_INTERRUPT_LINE 2 0x200000f 1 0 4294967295 INTERRUPT_LINE 0 7 ixD2F1_INTERRUPT_PIN 2 0x200000f 1 0 4294967295 INTERRUPT_PIN 8 15 ixD2F1_EXT_BRIDGE_CNTL 2 0x2000010 1 0 4294967295 IO_PORT_80_EN 0 0 ixD2F1_PMI_CAP_LIST 2 0x2000014 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F1_PMI_CAP 2 0x2000014 7 0 4294967295 VERSION 16 18 PME_CLOCK 19 19 DEV_SPECIFIC_INIT 21 21 AUX_CURRENT 22 24 D1_SUPPORT 25 25 D2_SUPPORT 26 26 PME_SUPPORT 27 31 ixD2F1_PMI_STATUS_CNTL 2 0x2000015 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 ixD2F1_PCIE_CAP_LIST 2 0x2000016 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F1_PCIE_CAP 2 0x2000016 4 0 4294967295 VERSION 16 19 DEVICE_TYPE 20 23 SLOT_IMPLEMENTED 24 24 INT_MESSAGE_NUM 25 29 ixD2F1_DEVICE_CAP 2 0x2000017 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 ixD2F1_DEVICE_CNTL 2 0x2000018 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 ixD2F1_DEVICE_STATUS 2 0x2000018 6 0 4294967295 CORR_ERR 16 16 NON_FATAL_ERR 17 17 FATAL_ERR 18 18 USR_DETECTED 19 19 AUX_PWR 20 20 TRANSACTIONS_PEND 21 21 ixD2F1_LINK_CAP 2 0x2000019 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 ixD2F1_LINK_CNTL 2 0x200001a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 ixD2F1_LINK_STATUS 2 0x200001a 7 0 4294967295 CURRENT_LINK_SPEED 16 19 NEGOTIATED_LINK_WIDTH 20 25 LINK_TRAINING 27 27 SLOT_CLOCK_CFG 28 28 DL_ACTIVE 29 29 LINK_BW_MANAGEMENT_STATUS 30 30 LINK_AUTONOMOUS_BW_STATUS 31 31 ixD2F1_SLOT_CAP 2 0x200001b 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 ixD2F1_SLOT_CNTL 2 0x200001c 11 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 ixD2F1_SLOT_STATUS 2 0x200001c 9 0 4294967295 ATTN_BUTTON_PRESSED 16 16 PWR_FAULT_DETECTED 17 17 MRL_SENSOR_CHANGED 18 18 PRESENCE_DETECT_CHANGED 19 19 COMMAND_COMPLETED 20 20 MRL_SENSOR_STATE 21 21 PRESENCE_DETECT_STATE 22 22 ELECTROMECH_INTERLOCK_STATUS 23 23 DL_STATE_CHANGED 24 24 ixD2F1_ROOT_CNTL 2 0x200001d 5 0 4294967295 SERR_ON_CORR_ERR_EN 0 0 SERR_ON_NONFATAL_ERR_EN 1 1 SERR_ON_FATAL_ERR_EN 2 2 PM_INTERRUPT_EN 3 3 CRS_SOFTWARE_VISIBILITY_EN 4 4 ixD2F1_ROOT_CAP 2 0x200001d 1 0 4294967295 CRS_SOFTWARE_VISIBILITY 16 16 ixD2F1_ROOT_STATUS 2 0x200001e 3 0 4294967295 PME_REQUESTOR_ID 0 15 PME_STATUS 16 16 PME_PENDING 17 17 ixD2F1_DEVICE_CAP2 2 0x200001f 14 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 ixD2F1_DEVICE_CNTL2 2 0x2000020 10 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 ixD2F1_DEVICE_STATUS2 2 0x2000020 1 0 4294967295 RESERVED 16 31 ixD2F1_LINK_CAP2 2 0x2000021 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 ixD2F1_LINK_CNTL2 2 0x2000022 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 ixD2F1_LINK_STATUS2 2 0x2000022 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 16 16 EQUALIZATION_COMPLETE 17 17 EQUALIZATION_PHASE1_SUCCESS 18 18 EQUALIZATION_PHASE2_SUCCESS 19 19 EQUALIZATION_PHASE3_SUCCESS 20 20 LINK_EQUALIZATION_REQUEST 21 21 ixD2F1_SLOT_CAP2 2 0x2000023 1 0 4294967295 RESERVED 0 31 ixD2F1_SLOT_CNTL2 2 0x2000024 1 0 4294967295 RESERVED 0 15 ixD2F1_SLOT_STATUS2 2 0x2000024 1 0 4294967295 RESERVED 16 31 ixD2F1_MSI_CAP_LIST 2 0x2000028 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F1_MSI_MSG_CNTL 2 0x2000028 5 0 4294967295 MSI_EN 16 16 MSI_MULTI_CAP 17 19 MSI_MULTI_EN 20 22 MSI_64BIT 23 23 MSI_PERVECTOR_MASKING_CAP 24 24 ixD2F1_MSI_MSG_ADDR_LO 2 0x2000029 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 ixD2F1_MSI_MSG_ADDR_HI 2 0x200002a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 ixD2F1_MSI_MSG_DATA_64 2 0x200002b 1 0 4294967295 MSI_DATA_64 0 15 ixD2F1_MSI_MSG_DATA 2 0x200002a 1 0 4294967295 MSI_DATA 0 15 ixD2F1_SSID_CAP_LIST 2 0x2000030 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F1_SSID_CAP 2 0x2000031 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 ixD2F1_MSI_MAP_CAP_LIST 2 0x2000032 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F1_MSI_MAP_CAP 2 0x2000032 3 0 4294967295 EN 16 16 FIXD 17 17 CAP_TYPE 27 31 ixD2F1_MSI_MAP_ADDR_LO 2 0x2000033 1 0 4294967295 MSI_MAP_ADDR_LO 20 31 ixD2F1_MSI_MAP_ADDR_HI 2 0x2000034 1 0 4294967295 MSI_MAP_ADDR_HI 0 31 ixD2F1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 2 0x2000040 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F1_PCIE_VENDOR_SPECIFIC_HDR 2 0x2000041 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 ixD2F1_PCIE_VENDOR_SPECIFIC1 2 0x2000042 1 0 4294967295 SCRATCH 0 31 ixD2F1_PCIE_VENDOR_SPECIFIC2 2 0x2000043 1 0 4294967295 SCRATCH 0 31 ixD2F1_PCIE_VC_ENH_CAP_LIST 2 0x2000044 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F1_PCIE_PORT_VC_CAP_REG1 2 0x2000045 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 ixD2F1_PCIE_PORT_VC_CAP_REG2 2 0x2000046 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 ixD2F1_PCIE_PORT_VC_CNTL 2 0x2000047 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 ixD2F1_PCIE_PORT_VC_STATUS 2 0x2000047 1 0 4294967295 VC_ARB_TABLE_STATUS 16 16 ixD2F1_PCIE_VC0_RESOURCE_CAP 2 0x2000048 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD2F1_PCIE_VC0_RESOURCE_CNTL 2 0x2000049 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD2F1_PCIE_VC0_RESOURCE_STATUS 2 0x200004a 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD2F1_PCIE_VC1_RESOURCE_CAP 2 0x200004b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD2F1_PCIE_VC1_RESOURCE_CNTL 2 0x200004c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD2F1_PCIE_VC1_RESOURCE_STATUS 2 0x200004d 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD2F1_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 2 0x2000050 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F1_PCIE_DEV_SERIAL_NUM_DW1 2 0x2000051 1 0 4294967295 SERIAL_NUMBER_LO 0 31 ixD2F1_PCIE_DEV_SERIAL_NUM_DW2 2 0x2000052 1 0 4294967295 SERIAL_NUMBER_HI 0 31 ixD2F1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 2 0x2000054 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F1_PCIE_UNCORR_ERR_STATUS 2 0x2000055 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 ixD2F1_PCIE_UNCORR_ERR_MASK 2 0x2000056 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 ixD2F1_PCIE_UNCORR_ERR_SEVERITY 2 0x2000057 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 ixD2F1_PCIE_CORR_ERR_STATUS 2 0x2000058 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 ixD2F1_PCIE_CORR_ERR_MASK 2 0x2000059 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 ixD2F1_PCIE_ADV_ERR_CAP_CNTL 2 0x200005a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 ixD2F1_PCIE_HDR_LOG0 2 0x200005b 1 0 4294967295 TLP_HDR 0 31 ixD2F1_PCIE_HDR_LOG1 2 0x200005c 1 0 4294967295 TLP_HDR 0 31 ixD2F1_PCIE_HDR_LOG2 2 0x200005d 1 0 4294967295 TLP_HDR 0 31 ixD2F1_PCIE_HDR_LOG3 2 0x200005e 1 0 4294967295 TLP_HDR 0 31 ixD2F1_PCIE_ROOT_ERR_CMD 2 0x200005f 3 0 4294967295 CORR_ERR_REP_EN 0 0 NONFATAL_ERR_REP_EN 1 1 FATAL_ERR_REP_EN 2 2 ixD2F1_PCIE_ROOT_ERR_STATUS 2 0x2000060 8 0 4294967295 ERR_CORR_RCVD 0 0 MULT_ERR_CORR_RCVD 1 1 ERR_FATAL_NONFATAL_RCVD 2 2 MULT_ERR_FATAL_NONFATAL_RCVD 3 3 FIRST_UNCORRECTABLE_FATAL 4 4 NONFATAL_ERROR_MSG_RCVD 5 5 FATAL_ERROR_MSG_RCVD 6 6 ADV_ERR_INT_MSG_NUM 27 31 ixD2F1_PCIE_ERR_SRC_ID 2 0x2000061 2 0 4294967295 ERR_CORR_SRC_ID 0 15 ERR_FATAL_NONFATAL_SRC_ID 16 31 ixD2F1_PCIE_TLP_PREFIX_LOG0 2 0x2000062 1 0 4294967295 TLP_PREFIX 0 31 ixD2F1_PCIE_TLP_PREFIX_LOG1 2 0x2000063 1 0 4294967295 TLP_PREFIX 0 31 ixD2F1_PCIE_TLP_PREFIX_LOG2 2 0x2000064 1 0 4294967295 TLP_PREFIX 0 31 ixD2F1_PCIE_TLP_PREFIX_LOG3 2 0x2000065 1 0 4294967295 TLP_PREFIX 0 31 ixD2F1_PCIE_SECONDARY_ENH_CAP_LIST 2 0x200009c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F1_PCIE_LINK_CNTL3 2 0x200009d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 ixD2F1_PCIE_LANE_ERROR_STATUS 2 0x200009e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 ixD2F1_PCIE_LANE_0_EQUALIZATION_CNTL 2 0x200009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F1_PCIE_LANE_1_EQUALIZATION_CNTL 2 0x200009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F1_PCIE_LANE_2_EQUALIZATION_CNTL 2 0x20000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F1_PCIE_LANE_3_EQUALIZATION_CNTL 2 0x20000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F1_PCIE_LANE_4_EQUALIZATION_CNTL 2 0x20000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F1_PCIE_LANE_5_EQUALIZATION_CNTL 2 0x20000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F1_PCIE_LANE_6_EQUALIZATION_CNTL 2 0x20000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F1_PCIE_LANE_7_EQUALIZATION_CNTL 2 0x20000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F1_PCIE_LANE_8_EQUALIZATION_CNTL 2 0x20000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F1_PCIE_LANE_9_EQUALIZATION_CNTL 2 0x20000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F1_PCIE_LANE_10_EQUALIZATION_CNTL 2 0x20000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F1_PCIE_LANE_11_EQUALIZATION_CNTL 2 0x20000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F1_PCIE_LANE_12_EQUALIZATION_CNTL 2 0x20000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F1_PCIE_LANE_13_EQUALIZATION_CNTL 2 0x20000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F1_PCIE_LANE_14_EQUALIZATION_CNTL 2 0x20000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F1_PCIE_LANE_15_EQUALIZATION_CNTL 2 0x20000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F1_PCIE_ACS_ENH_CAP_LIST 2 0x20000a8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F1_PCIE_ACS_CAP 2 0x20000a9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 ixD2F1_PCIE_ACS_CNTL 2 0x20000a9 7 0 4294967295 SOURCE_VALIDATION_EN 16 16 TRANSLATION_BLOCKING_EN 17 17 P2P_REQUEST_REDIRECT_EN 18 18 P2P_COMPLETION_REDIRECT_EN 19 19 UPSTREAM_FORWARDING_EN 20 20 P2P_EGRESS_CONTROL_EN 21 21 DIRECT_TRANSLATED_P2P_EN 22 22 ixD2F1_PCIE_MC_ENH_CAP_LIST 2 0x20000bc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F1_PCIE_MC_CAP 2 0x20000bd 2 0 4294967295 MC_MAX_GROUP 0 5 MC_ECRC_REGEN_SUPP 15 15 ixD2F1_PCIE_MC_CNTL 2 0x20000bd 2 0 4294967295 MC_NUM_GROUP 16 21 MC_ENABLE 31 31 ixD2F1_PCIE_MC_ADDR0 2 0x20000be 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 ixD2F1_PCIE_MC_ADDR1 2 0x20000bf 1 0 4294967295 MC_BASE_ADDR_1 0 31 ixD2F1_PCIE_MC_RCV0 2 0x20000c0 1 0 4294967295 MC_RECEIVE_0 0 31 ixD2F1_PCIE_MC_RCV1 2 0x20000c1 1 0 4294967295 MC_RECEIVE_1 0 31 ixD2F1_PCIE_MC_BLOCK_ALL0 2 0x20000c2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 ixD2F1_PCIE_MC_BLOCK_ALL1 2 0x20000c3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 ixD2F1_PCIE_MC_BLOCK_UNTRANSLATED_0 2 0x20000c4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 ixD2F1_PCIE_MC_BLOCK_UNTRANSLATED_1 2 0x20000c5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 ixD2F1_PCIE_MC_OVERLAY_BAR0 2 0x20000c6 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 ixD2F1_PCIE_MC_OVERLAY_BAR1 2 0x20000c7 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 ixD2F2_PCIE_PORT_INDEX 2 0x3000038 1 0 4294967295 PCIE_INDEX 0 7 ixD2F2_PCIE_PORT_DATA 2 0x3000039 1 0 4294967295 PCIE_DATA 0 31 ixD2F2_PCIEP_RESERVED 2 0x0 1 0 4294967295 PCIEP_RESERVED 0 31 ixD2F2_PCIEP_SCRATCH 2 0x1 1 0 4294967295 PCIEP_SCRATCH 0 31 ixD2F2_PCIEP_HW_DEBUG 2 0x2 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixD2F2_PCIEP_PORT_CNTL 2 0x10 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixD2F2_PCIE_TX_CNTL 2 0x20 8 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 ixD2F2_PCIE_TX_REQUESTER_ID 2 0x21 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixD2F2_PCIE_TX_VENDOR_SPECIFIC 2 0x22 1 0 4294967295 TX_VENDOR_DATA 0 23 ixD2F2_PCIE_TX_REQUEST_NUM_CNTL 2 0x23 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixD2F2_PCIE_TX_SEQ 2 0x24 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixD2F2_PCIE_TX_REPLAY 2 0x25 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixD2F2_PCIE_TX_ACK_LATENCY_LIMIT 2 0x26 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixD2F2_PCIE_TX_CREDITS_ADVT_P 2 0x30 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixD2F2_PCIE_TX_CREDITS_ADVT_NP 2 0x31 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixD2F2_PCIE_TX_CREDITS_ADVT_CPL 2 0x32 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixD2F2_PCIE_TX_CREDITS_INIT_P 2 0x33 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixD2F2_PCIE_TX_CREDITS_INIT_NP 2 0x34 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixD2F2_PCIE_TX_CREDITS_INIT_CPL 2 0x35 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixD2F2_PCIE_TX_CREDITS_STATUS 2 0x36 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixD2F2_PCIE_TX_CREDITS_FCU_THRESHOLD 2 0x37 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixD2F2_PCIE_P_PORT_LANE_STATUS 2 0x50 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixD2F2_PCIE_FC_P 2 0x60 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixD2F2_PCIE_FC_NP 2 0x61 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixD2F2_PCIE_FC_CPL 2 0x62 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixD2F2_PCIE_ERR_CNTL 2 0x6a 14 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixD2F2_PCIE_RX_CNTL 2 0x70 26 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 RX_RCB_FLR_TIMEOUT_DIS 27 27 ixD2F2_PCIE_RX_EXPECTED_SEQNUM 2 0x71 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixD2F2_PCIE_RX_VENDOR_SPECIFIC 2 0x72 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixD2F2_PCIE_RX_CNTL3 2 0x74 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixD2F2_PCIE_RX_CREDITS_ALLOCATED_P 2 0x80 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixD2F2_PCIE_RX_CREDITS_ALLOCATED_NP 2 0x81 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixD2F2_PCIE_RX_CREDITS_ALLOCATED_CPL 2 0x82 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixD2F2_PCIEP_ERROR_INJECT_PHYSICAL 2 0x83 12 0 4294967295 ERROR_INJECT_PL_LANE_ERR 0 1 ERROR_INJECT_PL_FRAMING_ERR 2 3 ERROR_INJECT_PL_BAD_PARITY_IN_SKP 4 5 ERROR_INJECT_PL_BAD_LFSR_IN_SKP 6 7 ERROR_INJECT_PL_LOOPBACK_UFLOW 8 9 ERROR_INJECT_PL_LOOPBACK_OFLOW 10 11 ERROR_INJECT_PL_DESKEW_ERR 12 13 ERROR_INJECT_PL_8B10B_DISPARITY_ERR 14 15 ERROR_INJECT_PL_8B10B_DECODE_ERR 16 17 ERROR_INJECT_PL_SKP_OS_ERROR 18 19 ERROR_INJECT_PL_INV_OS_IDENTIFIER 20 21 ERROR_INJECT_PL_BAD_SYNC_HEADER 22 23 ixD2F2_PCIEP_ERROR_INJECT_TRANSACTION 2 0x84 10 0 4294967295 ERROR_INJECT_TL_FLOW_CTL_ERR 0 1 ERROR_INJECT_TL_REPLAY_NUM_ROLLOVER 2 3 ERROR_INJECT_TL_BAD_DLLP 4 5 ERROR_INJECT_TL_BAD_TLP 6 7 ERROR_INJECT_TL_UNSUPPORTED_REQ 8 9 ERROR_INJECT_TL_ECRC_ERROR 10 11 ERROR_INJECT_TL_MALFORMED_TLP 12 13 ERROR_INJECT_TL_UNEXPECTED_CMPLT 14 15 ERROR_INJECT_TL_COMPLETER_ABORT 16 17 ERROR_INJECT_TL_COMPLETION_TIMEOUT 18 19 ixD2F2_PCIE_LC_CNTL 2 0xa0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixD2F2_PCIE_LC_CNTL2 2 0xb1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixD2F2_PCIE_LC_CNTL3 2 0xb5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixD2F2_PCIE_LC_CNTL4 2 0xb6 22 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_DIS_CONTIG_END_SET_CHECK 2 2 LC_DIS_ASPM_L1_IN_SPEED_CHANGE 3 3 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixD2F2_PCIE_LC_CNTL5 2 0xb7 5 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 LC_DSC_EQ_FS_LF_INVALID_TO_PRESETS 24 24 ixD2F2_PCIE_LC_CNTL6 2 0xbb 3 0 4294967295 LC_SPC_MODE_2P5GT 0 0 LC_SPC_MODE_5GT 2 2 LC_SPC_MODE_8GT 4 4 ixD2F2_PCIE_LC_BW_CHANGE_CNTL 2 0xb2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixD2F2_PCIE_LC_TRAINING_CNTL 2 0xa1 25 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_WAIT_FOR_SETS_IN_RCFG 14 14 LC_HOT_RESET_QUICK_EXIT_EN 15 15 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixD2F2_PCIE_LC_LINK_WIDTH_CNTL 2 0xa2 24 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 LC_MULT_REVERSE_ATTEMP_EN 24 24 LC_RESET_TSX_CNT_IN_RCONFIG_EN 25 25 LC_WAIT_FOR_L_IDLE_IN_R_IDLE 26 26 LC_WAIT_FOR_NON_EI_ON_RXL0S_EXIT 27 27 LC_HOLD_EI_FOR_RSPEED_CMD_CHANGE 28 28 LC_BYPASS_RXL0S_ON_SHORT_EI 29 29 ixD2F2_PCIE_LC_N_FTS_CNTL 2 0xa3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixD2F2_PCIE_LC_SPEED_CNTL 2 0xa4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixD2F2_PCIE_LC_CDR_CNTL 2 0xb3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixD2F2_PCIE_LC_LANE_CNTL 2 0xb4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixD2F2_PCIE_LC_FORCE_COEFF 2 0xb8 6 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 LC_PRESET_10_EN 20 20 ixD2F2_PCIE_LC_BEST_EQ_SETTINGS 2 0xb9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixD2F2_PCIE_LC_FORCE_EQ_REQ_COEFF 2 0xba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixD2F2_PCIE_LC_STATE0 2 0xa5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixD2F2_PCIE_LC_STATE1 2 0xa6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixD2F2_PCIE_LC_STATE2 2 0xa7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixD2F2_PCIE_LC_STATE3 2 0xa8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixD2F2_PCIE_LC_STATE4 2 0xa9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixD2F2_PCIE_LC_STATE5 2 0xaa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixD2F2_PCIEP_STRAP_LC 2 0xc0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixD2F2_PCIEP_STRAP_MISC 2 0xc1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixD2F2_PCIEP_BCH_ECC_CNTL 2 0xd0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 ixD2F2_PCIEP_HPGI_PRIVATE 2 0xd2 2 0 4294967295 PRESENCE_DETECT_CHANGED_PRIVATE 3 3 PRESENCE_DETECT_STATE_PRIVATE 6 6 ixD2F2_PCIEP_HPGI 2 0xda 11 0 4294967295 REG_HPGI_ASSERT_TO_SMI_EN 0 0 REG_HPGI_ASSERT_TO_SCI_EN 1 1 REG_HPGI_DEASSERT_TO_SMI_EN 2 2 REG_HPGI_DEASSERT_TO_SCI_EN 3 3 REG_HPGI_HOOK 7 7 HPGI_REG_ASSERT_TO_SMI_STATUS 8 8 HPGI_REG_ASSERT_TO_SCI_STATUS 9 9 HPGI_REG_DEASSERT_TO_SMI_STATUS 10 10 HPGI_REG_DEASSERT_TO_SCI_STATUS 11 11 HPGI_REG_PRESENCE_DETECT_STATE_CHANGE_STATUS 15 15 REG_HPGI_PRESENCE_DETECT_STATE_CHANGE_EN 16 16 ixD2F2_VENDOR_ID 2 0x3000000 1 0 4294967295 VENDOR_ID 0 15 ixD2F2_DEVICE_ID 2 0x3000000 1 0 4294967295 DEVICE_ID 16 31 ixD2F2_COMMAND 2 0x3000001 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 ixD2F2_STATUS 2 0x3000001 11 0 4294967295 INT_STATUS 19 19 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 SIGNALED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD2F2_REVISION_ID 2 0x3000002 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 ixD2F2_PROG_INTERFACE 2 0x3000002 1 0 4294967295 PROG_INTERFACE 8 15 ixD2F2_SUB_CLASS 2 0x3000002 1 0 4294967295 SUB_CLASS 16 23 ixD2F2_BASE_CLASS 2 0x3000002 1 0 4294967295 BASE_CLASS 24 31 ixD2F2_CACHE_LINE 2 0x3000003 1 0 4294967295 CACHE_LINE_SIZE 0 7 ixD2F2_LATENCY 2 0x3000003 1 0 4294967295 LATENCY_TIMER 8 15 ixD2F2_HEADER 2 0x3000003 2 0 4294967295 HEADER_TYPE 16 22 DEVICE_TYPE 23 23 ixD2F2_BIST 2 0x3000003 3 0 4294967295 BIST_COMP 24 27 BIST_STRT 30 30 BIST_CAP 31 31 ixD2F2_SUB_BUS_NUMBER_LATENCY 2 0x3000006 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 ixD2F2_IO_BASE_LIMIT 2 0x3000007 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 ixD2F2_SECONDARY_STATUS 2 0x3000007 10 0 4294967295 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 RECEIVED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD2F2_MEM_BASE_LIMIT 2 0x3000008 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 ixD2F2_PREF_BASE_LIMIT 2 0x3000009 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 ixD2F2_PREF_BASE_UPPER 2 0x300000a 1 0 4294967295 PREF_BASE_UPPER 0 31 ixD2F2_PREF_LIMIT_UPPER 2 0x300000b 1 0 4294967295 PREF_LIMIT_UPPER 0 31 ixD2F2_IO_BASE_LIMIT_HI 2 0x300000c 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 ixD2F2_IRQ_BRIDGE_CNTL 2 0x300000f 8 0 4294967295 PARITY_RESPONSE_EN 16 16 SERR_EN 17 17 ISA_EN 18 18 VGA_EN 19 19 VGA_DEC 20 20 MASTER_ABORT_MODE 21 21 SECONDARY_BUS_RESET 22 22 FAST_B2B_EN 23 23 ixD2F2_CAP_PTR 2 0x300000d 1 0 4294967295 CAP_PTR 0 7 ixD2F2_INTERRUPT_LINE 2 0x300000f 1 0 4294967295 INTERRUPT_LINE 0 7 ixD2F2_INTERRUPT_PIN 2 0x300000f 1 0 4294967295 INTERRUPT_PIN 8 15 ixD2F2_EXT_BRIDGE_CNTL 2 0x3000010 1 0 4294967295 IO_PORT_80_EN 0 0 ixD2F2_PMI_CAP_LIST 2 0x3000014 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F2_PMI_CAP 2 0x3000014 7 0 4294967295 VERSION 16 18 PME_CLOCK 19 19 DEV_SPECIFIC_INIT 21 21 AUX_CURRENT 22 24 D1_SUPPORT 25 25 D2_SUPPORT 26 26 PME_SUPPORT 27 31 ixD2F2_PMI_STATUS_CNTL 2 0x3000015 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 ixD2F2_PCIE_CAP_LIST 2 0x3000016 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F2_PCIE_CAP 2 0x3000016 4 0 4294967295 VERSION 16 19 DEVICE_TYPE 20 23 SLOT_IMPLEMENTED 24 24 INT_MESSAGE_NUM 25 29 ixD2F2_DEVICE_CAP 2 0x3000017 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 ixD2F2_DEVICE_CNTL 2 0x3000018 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 ixD2F2_DEVICE_STATUS 2 0x3000018 6 0 4294967295 CORR_ERR 16 16 NON_FATAL_ERR 17 17 FATAL_ERR 18 18 USR_DETECTED 19 19 AUX_PWR 20 20 TRANSACTIONS_PEND 21 21 ixD2F2_LINK_CAP 2 0x3000019 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 ixD2F2_LINK_CNTL 2 0x300001a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 ixD2F2_LINK_STATUS 2 0x300001a 7 0 4294967295 CURRENT_LINK_SPEED 16 19 NEGOTIATED_LINK_WIDTH 20 25 LINK_TRAINING 27 27 SLOT_CLOCK_CFG 28 28 DL_ACTIVE 29 29 LINK_BW_MANAGEMENT_STATUS 30 30 LINK_AUTONOMOUS_BW_STATUS 31 31 ixD2F2_SLOT_CAP 2 0x300001b 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 ixD2F2_SLOT_CNTL 2 0x300001c 11 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 ixD2F2_SLOT_STATUS 2 0x300001c 9 0 4294967295 ATTN_BUTTON_PRESSED 16 16 PWR_FAULT_DETECTED 17 17 MRL_SENSOR_CHANGED 18 18 PRESENCE_DETECT_CHANGED 19 19 COMMAND_COMPLETED 20 20 MRL_SENSOR_STATE 21 21 PRESENCE_DETECT_STATE 22 22 ELECTROMECH_INTERLOCK_STATUS 23 23 DL_STATE_CHANGED 24 24 ixD2F2_ROOT_CNTL 2 0x300001d 5 0 4294967295 SERR_ON_CORR_ERR_EN 0 0 SERR_ON_NONFATAL_ERR_EN 1 1 SERR_ON_FATAL_ERR_EN 2 2 PM_INTERRUPT_EN 3 3 CRS_SOFTWARE_VISIBILITY_EN 4 4 ixD2F2_ROOT_CAP 2 0x300001d 1 0 4294967295 CRS_SOFTWARE_VISIBILITY 16 16 ixD2F2_ROOT_STATUS 2 0x300001e 3 0 4294967295 PME_REQUESTOR_ID 0 15 PME_STATUS 16 16 PME_PENDING 17 17 ixD2F2_DEVICE_CAP2 2 0x300001f 14 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 ixD2F2_DEVICE_CNTL2 2 0x3000020 10 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 ixD2F2_DEVICE_STATUS2 2 0x3000020 1 0 4294967295 RESERVED 16 31 ixD2F2_LINK_CAP2 2 0x3000021 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 ixD2F2_LINK_CNTL2 2 0x3000022 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 ixD2F2_LINK_STATUS2 2 0x3000022 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 16 16 EQUALIZATION_COMPLETE 17 17 EQUALIZATION_PHASE1_SUCCESS 18 18 EQUALIZATION_PHASE2_SUCCESS 19 19 EQUALIZATION_PHASE3_SUCCESS 20 20 LINK_EQUALIZATION_REQUEST 21 21 ixD2F2_SLOT_CAP2 2 0x3000023 1 0 4294967295 RESERVED 0 31 ixD2F2_SLOT_CNTL2 2 0x3000024 1 0 4294967295 RESERVED 0 15 ixD2F2_SLOT_STATUS2 2 0x3000024 1 0 4294967295 RESERVED 16 31 ixD2F2_MSI_CAP_LIST 2 0x3000028 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F2_MSI_MSG_CNTL 2 0x3000028 5 0 4294967295 MSI_EN 16 16 MSI_MULTI_CAP 17 19 MSI_MULTI_EN 20 22 MSI_64BIT 23 23 MSI_PERVECTOR_MASKING_CAP 24 24 ixD2F2_MSI_MSG_ADDR_LO 2 0x3000029 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 ixD2F2_MSI_MSG_ADDR_HI 2 0x300002a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 ixD2F2_MSI_MSG_DATA_64 2 0x300002b 1 0 4294967295 MSI_DATA_64 0 15 ixD2F2_MSI_MSG_DATA 2 0x300002a 1 0 4294967295 MSI_DATA 0 15 ixD2F2_SSID_CAP_LIST 2 0x3000030 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F2_SSID_CAP 2 0x3000031 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 ixD2F2_MSI_MAP_CAP_LIST 2 0x3000032 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F2_MSI_MAP_CAP 2 0x3000032 3 0 4294967295 EN 16 16 FIXD 17 17 CAP_TYPE 27 31 ixD2F2_MSI_MAP_ADDR_LO 2 0x3000033 1 0 4294967295 MSI_MAP_ADDR_LO 20 31 ixD2F2_MSI_MAP_ADDR_HI 2 0x3000034 1 0 4294967295 MSI_MAP_ADDR_HI 0 31 ixD2F2_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 2 0x3000040 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F2_PCIE_VENDOR_SPECIFIC_HDR 2 0x3000041 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 ixD2F2_PCIE_VENDOR_SPECIFIC1 2 0x3000042 1 0 4294967295 SCRATCH 0 31 ixD2F2_PCIE_VENDOR_SPECIFIC2 2 0x3000043 1 0 4294967295 SCRATCH 0 31 ixD2F2_PCIE_VC_ENH_CAP_LIST 2 0x3000044 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F2_PCIE_PORT_VC_CAP_REG1 2 0x3000045 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 ixD2F2_PCIE_PORT_VC_CAP_REG2 2 0x3000046 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 ixD2F2_PCIE_PORT_VC_CNTL 2 0x3000047 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 ixD2F2_PCIE_PORT_VC_STATUS 2 0x3000047 1 0 4294967295 VC_ARB_TABLE_STATUS 16 16 ixD2F2_PCIE_VC0_RESOURCE_CAP 2 0x3000048 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD2F2_PCIE_VC0_RESOURCE_CNTL 2 0x3000049 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD2F2_PCIE_VC0_RESOURCE_STATUS 2 0x300004a 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD2F2_PCIE_VC1_RESOURCE_CAP 2 0x300004b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD2F2_PCIE_VC1_RESOURCE_CNTL 2 0x300004c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD2F2_PCIE_VC1_RESOURCE_STATUS 2 0x300004d 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD2F2_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 2 0x3000050 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F2_PCIE_DEV_SERIAL_NUM_DW1 2 0x3000051 1 0 4294967295 SERIAL_NUMBER_LO 0 31 ixD2F2_PCIE_DEV_SERIAL_NUM_DW2 2 0x3000052 1 0 4294967295 SERIAL_NUMBER_HI 0 31 ixD2F2_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 2 0x3000054 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F2_PCIE_UNCORR_ERR_STATUS 2 0x3000055 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 ixD2F2_PCIE_UNCORR_ERR_MASK 2 0x3000056 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 ixD2F2_PCIE_UNCORR_ERR_SEVERITY 2 0x3000057 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 ixD2F2_PCIE_CORR_ERR_STATUS 2 0x3000058 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 ixD2F2_PCIE_CORR_ERR_MASK 2 0x3000059 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 ixD2F2_PCIE_ADV_ERR_CAP_CNTL 2 0x300005a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 ixD2F2_PCIE_HDR_LOG0 2 0x300005b 1 0 4294967295 TLP_HDR 0 31 ixD2F2_PCIE_HDR_LOG1 2 0x300005c 1 0 4294967295 TLP_HDR 0 31 ixD2F2_PCIE_HDR_LOG2 2 0x300005d 1 0 4294967295 TLP_HDR 0 31 ixD2F2_PCIE_HDR_LOG3 2 0x300005e 1 0 4294967295 TLP_HDR 0 31 ixD2F2_PCIE_ROOT_ERR_CMD 2 0x300005f 3 0 4294967295 CORR_ERR_REP_EN 0 0 NONFATAL_ERR_REP_EN 1 1 FATAL_ERR_REP_EN 2 2 ixD2F2_PCIE_ROOT_ERR_STATUS 2 0x3000060 8 0 4294967295 ERR_CORR_RCVD 0 0 MULT_ERR_CORR_RCVD 1 1 ERR_FATAL_NONFATAL_RCVD 2 2 MULT_ERR_FATAL_NONFATAL_RCVD 3 3 FIRST_UNCORRECTABLE_FATAL 4 4 NONFATAL_ERROR_MSG_RCVD 5 5 FATAL_ERROR_MSG_RCVD 6 6 ADV_ERR_INT_MSG_NUM 27 31 ixD2F2_PCIE_ERR_SRC_ID 2 0x3000061 2 0 4294967295 ERR_CORR_SRC_ID 0 15 ERR_FATAL_NONFATAL_SRC_ID 16 31 ixD2F2_PCIE_TLP_PREFIX_LOG0 2 0x3000062 1 0 4294967295 TLP_PREFIX 0 31 ixD2F2_PCIE_TLP_PREFIX_LOG1 2 0x3000063 1 0 4294967295 TLP_PREFIX 0 31 ixD2F2_PCIE_TLP_PREFIX_LOG2 2 0x3000064 1 0 4294967295 TLP_PREFIX 0 31 ixD2F2_PCIE_TLP_PREFIX_LOG3 2 0x3000065 1 0 4294967295 TLP_PREFIX 0 31 ixD2F2_PCIE_SECONDARY_ENH_CAP_LIST 2 0x300009c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F2_PCIE_LINK_CNTL3 2 0x300009d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 ixD2F2_PCIE_LANE_ERROR_STATUS 2 0x300009e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 ixD2F2_PCIE_LANE_0_EQUALIZATION_CNTL 2 0x300009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F2_PCIE_LANE_1_EQUALIZATION_CNTL 2 0x300009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F2_PCIE_LANE_2_EQUALIZATION_CNTL 2 0x30000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F2_PCIE_LANE_3_EQUALIZATION_CNTL 2 0x30000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F2_PCIE_LANE_4_EQUALIZATION_CNTL 2 0x30000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F2_PCIE_LANE_5_EQUALIZATION_CNTL 2 0x30000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F2_PCIE_LANE_6_EQUALIZATION_CNTL 2 0x30000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F2_PCIE_LANE_7_EQUALIZATION_CNTL 2 0x30000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F2_PCIE_LANE_8_EQUALIZATION_CNTL 2 0x30000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F2_PCIE_LANE_9_EQUALIZATION_CNTL 2 0x30000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F2_PCIE_LANE_10_EQUALIZATION_CNTL 2 0x30000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F2_PCIE_LANE_11_EQUALIZATION_CNTL 2 0x30000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F2_PCIE_LANE_12_EQUALIZATION_CNTL 2 0x30000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F2_PCIE_LANE_13_EQUALIZATION_CNTL 2 0x30000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F2_PCIE_LANE_14_EQUALIZATION_CNTL 2 0x30000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F2_PCIE_LANE_15_EQUALIZATION_CNTL 2 0x30000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F2_PCIE_ACS_ENH_CAP_LIST 2 0x30000a8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F2_PCIE_ACS_CAP 2 0x30000a9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 ixD2F2_PCIE_ACS_CNTL 2 0x30000a9 7 0 4294967295 SOURCE_VALIDATION_EN 16 16 TRANSLATION_BLOCKING_EN 17 17 P2P_REQUEST_REDIRECT_EN 18 18 P2P_COMPLETION_REDIRECT_EN 19 19 UPSTREAM_FORWARDING_EN 20 20 P2P_EGRESS_CONTROL_EN 21 21 DIRECT_TRANSLATED_P2P_EN 22 22 ixD2F2_PCIE_MC_ENH_CAP_LIST 2 0x30000bc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F2_PCIE_MC_CAP 2 0x30000bd 2 0 4294967295 MC_MAX_GROUP 0 5 MC_ECRC_REGEN_SUPP 15 15 ixD2F2_PCIE_MC_CNTL 2 0x30000bd 2 0 4294967295 MC_NUM_GROUP 16 21 MC_ENABLE 31 31 ixD2F2_PCIE_MC_ADDR0 2 0x30000be 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 ixD2F2_PCIE_MC_ADDR1 2 0x30000bf 1 0 4294967295 MC_BASE_ADDR_1 0 31 ixD2F2_PCIE_MC_RCV0 2 0x30000c0 1 0 4294967295 MC_RECEIVE_0 0 31 ixD2F2_PCIE_MC_RCV1 2 0x30000c1 1 0 4294967295 MC_RECEIVE_1 0 31 ixD2F2_PCIE_MC_BLOCK_ALL0 2 0x30000c2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 ixD2F2_PCIE_MC_BLOCK_ALL1 2 0x30000c3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 ixD2F2_PCIE_MC_BLOCK_UNTRANSLATED_0 2 0x30000c4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 ixD2F2_PCIE_MC_BLOCK_UNTRANSLATED_1 2 0x30000c5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 ixD2F2_PCIE_MC_OVERLAY_BAR0 2 0x30000c6 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 ixD2F2_PCIE_MC_OVERLAY_BAR1 2 0x30000c7 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 ixD2F3_PCIE_PORT_INDEX 2 0x4000038 1 0 4294967295 PCIE_INDEX 0 7 ixD2F3_PCIE_PORT_DATA 2 0x4000039 1 0 4294967295 PCIE_DATA 0 31 ixD2F3_PCIEP_RESERVED 2 0x0 1 0 4294967295 PCIEP_RESERVED 0 31 ixD2F3_PCIEP_SCRATCH 2 0x1 1 0 4294967295 PCIEP_SCRATCH 0 31 ixD2F3_PCIEP_HW_DEBUG 2 0x2 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixD2F3_PCIEP_PORT_CNTL 2 0x10 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixD2F3_PCIE_TX_CNTL 2 0x20 8 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 ixD2F3_PCIE_TX_REQUESTER_ID 2 0x21 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixD2F3_PCIE_TX_VENDOR_SPECIFIC 2 0x22 1 0 4294967295 TX_VENDOR_DATA 0 23 ixD2F3_PCIE_TX_REQUEST_NUM_CNTL 2 0x23 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixD2F3_PCIE_TX_SEQ 2 0x24 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixD2F3_PCIE_TX_REPLAY 2 0x25 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixD2F3_PCIE_TX_ACK_LATENCY_LIMIT 2 0x26 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixD2F3_PCIE_TX_CREDITS_ADVT_P 2 0x30 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixD2F3_PCIE_TX_CREDITS_ADVT_NP 2 0x31 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixD2F3_PCIE_TX_CREDITS_ADVT_CPL 2 0x32 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixD2F3_PCIE_TX_CREDITS_INIT_P 2 0x33 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixD2F3_PCIE_TX_CREDITS_INIT_NP 2 0x34 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixD2F3_PCIE_TX_CREDITS_INIT_CPL 2 0x35 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixD2F3_PCIE_TX_CREDITS_STATUS 2 0x36 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixD2F3_PCIE_TX_CREDITS_FCU_THRESHOLD 2 0x37 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixD2F3_PCIE_P_PORT_LANE_STATUS 2 0x50 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixD2F3_PCIE_FC_P 2 0x60 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixD2F3_PCIE_FC_NP 2 0x61 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixD2F3_PCIE_FC_CPL 2 0x62 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixD2F3_PCIE_ERR_CNTL 2 0x6a 14 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixD2F3_PCIE_RX_CNTL 2 0x70 26 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 RX_RCB_FLR_TIMEOUT_DIS 27 27 ixD2F3_PCIE_RX_EXPECTED_SEQNUM 2 0x71 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixD2F3_PCIE_RX_VENDOR_SPECIFIC 2 0x72 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixD2F3_PCIE_RX_CNTL3 2 0x74 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixD2F3_PCIE_RX_CREDITS_ALLOCATED_P 2 0x80 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixD2F3_PCIE_RX_CREDITS_ALLOCATED_NP 2 0x81 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixD2F3_PCIE_RX_CREDITS_ALLOCATED_CPL 2 0x82 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixD2F3_PCIEP_ERROR_INJECT_PHYSICAL 2 0x83 12 0 4294967295 ERROR_INJECT_PL_LANE_ERR 0 1 ERROR_INJECT_PL_FRAMING_ERR 2 3 ERROR_INJECT_PL_BAD_PARITY_IN_SKP 4 5 ERROR_INJECT_PL_BAD_LFSR_IN_SKP 6 7 ERROR_INJECT_PL_LOOPBACK_UFLOW 8 9 ERROR_INJECT_PL_LOOPBACK_OFLOW 10 11 ERROR_INJECT_PL_DESKEW_ERR 12 13 ERROR_INJECT_PL_8B10B_DISPARITY_ERR 14 15 ERROR_INJECT_PL_8B10B_DECODE_ERR 16 17 ERROR_INJECT_PL_SKP_OS_ERROR 18 19 ERROR_INJECT_PL_INV_OS_IDENTIFIER 20 21 ERROR_INJECT_PL_BAD_SYNC_HEADER 22 23 ixD2F3_PCIEP_ERROR_INJECT_TRANSACTION 2 0x84 10 0 4294967295 ERROR_INJECT_TL_FLOW_CTL_ERR 0 1 ERROR_INJECT_TL_REPLAY_NUM_ROLLOVER 2 3 ERROR_INJECT_TL_BAD_DLLP 4 5 ERROR_INJECT_TL_BAD_TLP 6 7 ERROR_INJECT_TL_UNSUPPORTED_REQ 8 9 ERROR_INJECT_TL_ECRC_ERROR 10 11 ERROR_INJECT_TL_MALFORMED_TLP 12 13 ERROR_INJECT_TL_UNEXPECTED_CMPLT 14 15 ERROR_INJECT_TL_COMPLETER_ABORT 16 17 ERROR_INJECT_TL_COMPLETION_TIMEOUT 18 19 ixD2F3_PCIE_LC_CNTL 2 0xa0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixD2F3_PCIE_LC_CNTL2 2 0xb1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixD2F3_PCIE_LC_CNTL3 2 0xb5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixD2F3_PCIE_LC_CNTL4 2 0xb6 22 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_DIS_CONTIG_END_SET_CHECK 2 2 LC_DIS_ASPM_L1_IN_SPEED_CHANGE 3 3 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixD2F3_PCIE_LC_CNTL5 2 0xb7 5 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 LC_DSC_EQ_FS_LF_INVALID_TO_PRESETS 24 24 ixD2F3_PCIE_LC_CNTL6 2 0xbb 3 0 4294967295 LC_SPC_MODE_2P5GT 0 0 LC_SPC_MODE_5GT 2 2 LC_SPC_MODE_8GT 4 4 ixD2F3_PCIE_LC_BW_CHANGE_CNTL 2 0xb2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixD2F3_PCIE_LC_TRAINING_CNTL 2 0xa1 25 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_WAIT_FOR_SETS_IN_RCFG 14 14 LC_HOT_RESET_QUICK_EXIT_EN 15 15 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixD2F3_PCIE_LC_LINK_WIDTH_CNTL 2 0xa2 24 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 LC_MULT_REVERSE_ATTEMP_EN 24 24 LC_RESET_TSX_CNT_IN_RCONFIG_EN 25 25 LC_WAIT_FOR_L_IDLE_IN_R_IDLE 26 26 LC_WAIT_FOR_NON_EI_ON_RXL0S_EXIT 27 27 LC_HOLD_EI_FOR_RSPEED_CMD_CHANGE 28 28 LC_BYPASS_RXL0S_ON_SHORT_EI 29 29 ixD2F3_PCIE_LC_N_FTS_CNTL 2 0xa3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixD2F3_PCIE_LC_SPEED_CNTL 2 0xa4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixD2F3_PCIE_LC_CDR_CNTL 2 0xb3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixD2F3_PCIE_LC_LANE_CNTL 2 0xb4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixD2F3_PCIE_LC_FORCE_COEFF 2 0xb8 6 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 LC_PRESET_10_EN 20 20 ixD2F3_PCIE_LC_BEST_EQ_SETTINGS 2 0xb9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixD2F3_PCIE_LC_FORCE_EQ_REQ_COEFF 2 0xba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixD2F3_PCIE_LC_STATE0 2 0xa5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixD2F3_PCIE_LC_STATE1 2 0xa6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixD2F3_PCIE_LC_STATE2 2 0xa7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixD2F3_PCIE_LC_STATE3 2 0xa8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixD2F3_PCIE_LC_STATE4 2 0xa9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixD2F3_PCIE_LC_STATE5 2 0xaa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixD2F3_PCIEP_STRAP_LC 2 0xc0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixD2F3_PCIEP_STRAP_MISC 2 0xc1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixD2F3_PCIEP_BCH_ECC_CNTL 2 0xd0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 ixD2F3_PCIEP_HPGI_PRIVATE 2 0xd2 2 0 4294967295 PRESENCE_DETECT_CHANGED_PRIVATE 3 3 PRESENCE_DETECT_STATE_PRIVATE 6 6 ixD2F3_PCIEP_HPGI 2 0xda 11 0 4294967295 REG_HPGI_ASSERT_TO_SMI_EN 0 0 REG_HPGI_ASSERT_TO_SCI_EN 1 1 REG_HPGI_DEASSERT_TO_SMI_EN 2 2 REG_HPGI_DEASSERT_TO_SCI_EN 3 3 REG_HPGI_HOOK 7 7 HPGI_REG_ASSERT_TO_SMI_STATUS 8 8 HPGI_REG_ASSERT_TO_SCI_STATUS 9 9 HPGI_REG_DEASSERT_TO_SMI_STATUS 10 10 HPGI_REG_DEASSERT_TO_SCI_STATUS 11 11 HPGI_REG_PRESENCE_DETECT_STATE_CHANGE_STATUS 15 15 REG_HPGI_PRESENCE_DETECT_STATE_CHANGE_EN 16 16 ixD2F3_VENDOR_ID 2 0x4000000 1 0 4294967295 VENDOR_ID 0 15 ixD2F3_DEVICE_ID 2 0x4000000 1 0 4294967295 DEVICE_ID 16 31 ixD2F3_COMMAND 2 0x4000001 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 ixD2F3_STATUS 2 0x4000001 11 0 4294967295 INT_STATUS 19 19 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 SIGNALED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD2F3_REVISION_ID 2 0x4000002 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 ixD2F3_PROG_INTERFACE 2 0x4000002 1 0 4294967295 PROG_INTERFACE 8 15 ixD2F3_SUB_CLASS 2 0x4000002 1 0 4294967295 SUB_CLASS 16 23 ixD2F3_BASE_CLASS 2 0x4000002 1 0 4294967295 BASE_CLASS 24 31 ixD2F3_CACHE_LINE 2 0x4000003 1 0 4294967295 CACHE_LINE_SIZE 0 7 ixD2F3_LATENCY 2 0x4000003 1 0 4294967295 LATENCY_TIMER 8 15 ixD2F3_HEADER 2 0x4000003 2 0 4294967295 HEADER_TYPE 16 22 DEVICE_TYPE 23 23 ixD2F3_BIST 2 0x4000003 3 0 4294967295 BIST_COMP 24 27 BIST_STRT 30 30 BIST_CAP 31 31 ixD2F3_SUB_BUS_NUMBER_LATENCY 2 0x4000006 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 ixD2F3_IO_BASE_LIMIT 2 0x4000007 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 ixD2F3_SECONDARY_STATUS 2 0x4000007 10 0 4294967295 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 RECEIVED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD2F3_MEM_BASE_LIMIT 2 0x4000008 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 ixD2F3_PREF_BASE_LIMIT 2 0x4000009 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 ixD2F3_PREF_BASE_UPPER 2 0x400000a 1 0 4294967295 PREF_BASE_UPPER 0 31 ixD2F3_PREF_LIMIT_UPPER 2 0x400000b 1 0 4294967295 PREF_LIMIT_UPPER 0 31 ixD2F3_IO_BASE_LIMIT_HI 2 0x400000c 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 ixD2F3_IRQ_BRIDGE_CNTL 2 0x400000f 8 0 4294967295 PARITY_RESPONSE_EN 16 16 SERR_EN 17 17 ISA_EN 18 18 VGA_EN 19 19 VGA_DEC 20 20 MASTER_ABORT_MODE 21 21 SECONDARY_BUS_RESET 22 22 FAST_B2B_EN 23 23 ixD2F3_CAP_PTR 2 0x400000d 1 0 4294967295 CAP_PTR 0 7 ixD2F3_INTERRUPT_LINE 2 0x400000f 1 0 4294967295 INTERRUPT_LINE 0 7 ixD2F3_INTERRUPT_PIN 2 0x400000f 1 0 4294967295 INTERRUPT_PIN 8 15 ixD2F3_EXT_BRIDGE_CNTL 2 0x4000010 1 0 4294967295 IO_PORT_80_EN 0 0 ixD2F3_PMI_CAP_LIST 2 0x4000014 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F3_PMI_CAP 2 0x4000014 7 0 4294967295 VERSION 16 18 PME_CLOCK 19 19 DEV_SPECIFIC_INIT 21 21 AUX_CURRENT 22 24 D1_SUPPORT 25 25 D2_SUPPORT 26 26 PME_SUPPORT 27 31 ixD2F3_PMI_STATUS_CNTL 2 0x4000015 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 ixD2F3_PCIE_CAP_LIST 2 0x4000016 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F3_PCIE_CAP 2 0x4000016 4 0 4294967295 VERSION 16 19 DEVICE_TYPE 20 23 SLOT_IMPLEMENTED 24 24 INT_MESSAGE_NUM 25 29 ixD2F3_DEVICE_CAP 2 0x4000017 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 ixD2F3_DEVICE_CNTL 2 0x4000018 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 ixD2F3_DEVICE_STATUS 2 0x4000018 6 0 4294967295 CORR_ERR 16 16 NON_FATAL_ERR 17 17 FATAL_ERR 18 18 USR_DETECTED 19 19 AUX_PWR 20 20 TRANSACTIONS_PEND 21 21 ixD2F3_LINK_CAP 2 0x4000019 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 ixD2F3_LINK_CNTL 2 0x400001a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 ixD2F3_LINK_STATUS 2 0x400001a 7 0 4294967295 CURRENT_LINK_SPEED 16 19 NEGOTIATED_LINK_WIDTH 20 25 LINK_TRAINING 27 27 SLOT_CLOCK_CFG 28 28 DL_ACTIVE 29 29 LINK_BW_MANAGEMENT_STATUS 30 30 LINK_AUTONOMOUS_BW_STATUS 31 31 ixD2F3_SLOT_CAP 2 0x400001b 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 ixD2F3_SLOT_CNTL 2 0x400001c 11 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 ixD2F3_SLOT_STATUS 2 0x400001c 9 0 4294967295 ATTN_BUTTON_PRESSED 16 16 PWR_FAULT_DETECTED 17 17 MRL_SENSOR_CHANGED 18 18 PRESENCE_DETECT_CHANGED 19 19 COMMAND_COMPLETED 20 20 MRL_SENSOR_STATE 21 21 PRESENCE_DETECT_STATE 22 22 ELECTROMECH_INTERLOCK_STATUS 23 23 DL_STATE_CHANGED 24 24 ixD2F3_ROOT_CNTL 2 0x400001d 5 0 4294967295 SERR_ON_CORR_ERR_EN 0 0 SERR_ON_NONFATAL_ERR_EN 1 1 SERR_ON_FATAL_ERR_EN 2 2 PM_INTERRUPT_EN 3 3 CRS_SOFTWARE_VISIBILITY_EN 4 4 ixD2F3_ROOT_CAP 2 0x400001d 1 0 4294967295 CRS_SOFTWARE_VISIBILITY 16 16 ixD2F3_ROOT_STATUS 2 0x400001e 3 0 4294967295 PME_REQUESTOR_ID 0 15 PME_STATUS 16 16 PME_PENDING 17 17 ixD2F3_DEVICE_CAP2 2 0x400001f 14 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 ixD2F3_DEVICE_CNTL2 2 0x4000020 10 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 ixD2F3_DEVICE_STATUS2 2 0x4000020 1 0 4294967295 RESERVED 16 31 ixD2F3_LINK_CAP2 2 0x4000021 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 ixD2F3_LINK_CNTL2 2 0x4000022 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 ixD2F3_LINK_STATUS2 2 0x4000022 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 16 16 EQUALIZATION_COMPLETE 17 17 EQUALIZATION_PHASE1_SUCCESS 18 18 EQUALIZATION_PHASE2_SUCCESS 19 19 EQUALIZATION_PHASE3_SUCCESS 20 20 LINK_EQUALIZATION_REQUEST 21 21 ixD2F3_SLOT_CAP2 2 0x4000023 1 0 4294967295 RESERVED 0 31 ixD2F3_SLOT_CNTL2 2 0x4000024 1 0 4294967295 RESERVED 0 15 ixD2F3_SLOT_STATUS2 2 0x4000024 1 0 4294967295 RESERVED 16 31 ixD2F3_MSI_CAP_LIST 2 0x4000028 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F3_MSI_MSG_CNTL 2 0x4000028 5 0 4294967295 MSI_EN 16 16 MSI_MULTI_CAP 17 19 MSI_MULTI_EN 20 22 MSI_64BIT 23 23 MSI_PERVECTOR_MASKING_CAP 24 24 ixD2F3_MSI_MSG_ADDR_LO 2 0x4000029 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 ixD2F3_MSI_MSG_ADDR_HI 2 0x400002a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 ixD2F3_MSI_MSG_DATA_64 2 0x400002b 1 0 4294967295 MSI_DATA_64 0 15 ixD2F3_MSI_MSG_DATA 2 0x400002a 1 0 4294967295 MSI_DATA 0 15 ixD2F3_SSID_CAP_LIST 2 0x4000030 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F3_SSID_CAP 2 0x4000031 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 ixD2F3_MSI_MAP_CAP_LIST 2 0x4000032 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F3_MSI_MAP_CAP 2 0x4000032 3 0 4294967295 EN 16 16 FIXD 17 17 CAP_TYPE 27 31 ixD2F3_MSI_MAP_ADDR_LO 2 0x4000033 1 0 4294967295 MSI_MAP_ADDR_LO 20 31 ixD2F3_MSI_MAP_ADDR_HI 2 0x4000034 1 0 4294967295 MSI_MAP_ADDR_HI 0 31 ixD2F3_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 2 0x4000040 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F3_PCIE_VENDOR_SPECIFIC_HDR 2 0x4000041 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 ixD2F3_PCIE_VENDOR_SPECIFIC1 2 0x4000042 1 0 4294967295 SCRATCH 0 31 ixD2F3_PCIE_VENDOR_SPECIFIC2 2 0x4000043 1 0 4294967295 SCRATCH 0 31 ixD2F3_PCIE_VC_ENH_CAP_LIST 2 0x4000044 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F3_PCIE_PORT_VC_CAP_REG1 2 0x4000045 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 ixD2F3_PCIE_PORT_VC_CAP_REG2 2 0x4000046 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 ixD2F3_PCIE_PORT_VC_CNTL 2 0x4000047 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 ixD2F3_PCIE_PORT_VC_STATUS 2 0x4000047 1 0 4294967295 VC_ARB_TABLE_STATUS 16 16 ixD2F3_PCIE_VC0_RESOURCE_CAP 2 0x4000048 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD2F3_PCIE_VC0_RESOURCE_CNTL 2 0x4000049 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD2F3_PCIE_VC0_RESOURCE_STATUS 2 0x400004a 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD2F3_PCIE_VC1_RESOURCE_CAP 2 0x400004b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD2F3_PCIE_VC1_RESOURCE_CNTL 2 0x400004c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD2F3_PCIE_VC1_RESOURCE_STATUS 2 0x400004d 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD2F3_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 2 0x4000050 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F3_PCIE_DEV_SERIAL_NUM_DW1 2 0x4000051 1 0 4294967295 SERIAL_NUMBER_LO 0 31 ixD2F3_PCIE_DEV_SERIAL_NUM_DW2 2 0x4000052 1 0 4294967295 SERIAL_NUMBER_HI 0 31 ixD2F3_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 2 0x4000054 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F3_PCIE_UNCORR_ERR_STATUS 2 0x4000055 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 ixD2F3_PCIE_UNCORR_ERR_MASK 2 0x4000056 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 ixD2F3_PCIE_UNCORR_ERR_SEVERITY 2 0x4000057 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 ixD2F3_PCIE_CORR_ERR_STATUS 2 0x4000058 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 ixD2F3_PCIE_CORR_ERR_MASK 2 0x4000059 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 ixD2F3_PCIE_ADV_ERR_CAP_CNTL 2 0x400005a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 ixD2F3_PCIE_HDR_LOG0 2 0x400005b 1 0 4294967295 TLP_HDR 0 31 ixD2F3_PCIE_HDR_LOG1 2 0x400005c 1 0 4294967295 TLP_HDR 0 31 ixD2F3_PCIE_HDR_LOG2 2 0x400005d 1 0 4294967295 TLP_HDR 0 31 ixD2F3_PCIE_HDR_LOG3 2 0x400005e 1 0 4294967295 TLP_HDR 0 31 ixD2F3_PCIE_ROOT_ERR_CMD 2 0x400005f 3 0 4294967295 CORR_ERR_REP_EN 0 0 NONFATAL_ERR_REP_EN 1 1 FATAL_ERR_REP_EN 2 2 ixD2F3_PCIE_ROOT_ERR_STATUS 2 0x4000060 8 0 4294967295 ERR_CORR_RCVD 0 0 MULT_ERR_CORR_RCVD 1 1 ERR_FATAL_NONFATAL_RCVD 2 2 MULT_ERR_FATAL_NONFATAL_RCVD 3 3 FIRST_UNCORRECTABLE_FATAL 4 4 NONFATAL_ERROR_MSG_RCVD 5 5 FATAL_ERROR_MSG_RCVD 6 6 ADV_ERR_INT_MSG_NUM 27 31 ixD2F3_PCIE_ERR_SRC_ID 2 0x4000061 2 0 4294967295 ERR_CORR_SRC_ID 0 15 ERR_FATAL_NONFATAL_SRC_ID 16 31 ixD2F3_PCIE_TLP_PREFIX_LOG0 2 0x4000062 1 0 4294967295 TLP_PREFIX 0 31 ixD2F3_PCIE_TLP_PREFIX_LOG1 2 0x4000063 1 0 4294967295 TLP_PREFIX 0 31 ixD2F3_PCIE_TLP_PREFIX_LOG2 2 0x4000064 1 0 4294967295 TLP_PREFIX 0 31 ixD2F3_PCIE_TLP_PREFIX_LOG3 2 0x4000065 1 0 4294967295 TLP_PREFIX 0 31 ixD2F3_PCIE_SECONDARY_ENH_CAP_LIST 2 0x400009c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F3_PCIE_LINK_CNTL3 2 0x400009d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 ixD2F3_PCIE_LANE_ERROR_STATUS 2 0x400009e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 ixD2F3_PCIE_LANE_0_EQUALIZATION_CNTL 2 0x400009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F3_PCIE_LANE_1_EQUALIZATION_CNTL 2 0x400009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F3_PCIE_LANE_2_EQUALIZATION_CNTL 2 0x40000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F3_PCIE_LANE_3_EQUALIZATION_CNTL 2 0x40000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F3_PCIE_LANE_4_EQUALIZATION_CNTL 2 0x40000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F3_PCIE_LANE_5_EQUALIZATION_CNTL 2 0x40000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F3_PCIE_LANE_6_EQUALIZATION_CNTL 2 0x40000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F3_PCIE_LANE_7_EQUALIZATION_CNTL 2 0x40000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F3_PCIE_LANE_8_EQUALIZATION_CNTL 2 0x40000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F3_PCIE_LANE_9_EQUALIZATION_CNTL 2 0x40000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F3_PCIE_LANE_10_EQUALIZATION_CNTL 2 0x40000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F3_PCIE_LANE_11_EQUALIZATION_CNTL 2 0x40000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F3_PCIE_LANE_12_EQUALIZATION_CNTL 2 0x40000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F3_PCIE_LANE_13_EQUALIZATION_CNTL 2 0x40000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F3_PCIE_LANE_14_EQUALIZATION_CNTL 2 0x40000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F3_PCIE_LANE_15_EQUALIZATION_CNTL 2 0x40000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F3_PCIE_ACS_ENH_CAP_LIST 2 0x40000a8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F3_PCIE_ACS_CAP 2 0x40000a9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 ixD2F3_PCIE_ACS_CNTL 2 0x40000a9 7 0 4294967295 SOURCE_VALIDATION_EN 16 16 TRANSLATION_BLOCKING_EN 17 17 P2P_REQUEST_REDIRECT_EN 18 18 P2P_COMPLETION_REDIRECT_EN 19 19 UPSTREAM_FORWARDING_EN 20 20 P2P_EGRESS_CONTROL_EN 21 21 DIRECT_TRANSLATED_P2P_EN 22 22 ixD2F3_PCIE_MC_ENH_CAP_LIST 2 0x40000bc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F3_PCIE_MC_CAP 2 0x40000bd 2 0 4294967295 MC_MAX_GROUP 0 5 MC_ECRC_REGEN_SUPP 15 15 ixD2F3_PCIE_MC_CNTL 2 0x40000bd 2 0 4294967295 MC_NUM_GROUP 16 21 MC_ENABLE 31 31 ixD2F3_PCIE_MC_ADDR0 2 0x40000be 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 ixD2F3_PCIE_MC_ADDR1 2 0x40000bf 1 0 4294967295 MC_BASE_ADDR_1 0 31 ixD2F3_PCIE_MC_RCV0 2 0x40000c0 1 0 4294967295 MC_RECEIVE_0 0 31 ixD2F3_PCIE_MC_RCV1 2 0x40000c1 1 0 4294967295 MC_RECEIVE_1 0 31 ixD2F3_PCIE_MC_BLOCK_ALL0 2 0x40000c2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 ixD2F3_PCIE_MC_BLOCK_ALL1 2 0x40000c3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 ixD2F3_PCIE_MC_BLOCK_UNTRANSLATED_0 2 0x40000c4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 ixD2F3_PCIE_MC_BLOCK_UNTRANSLATED_1 2 0x40000c5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 ixD2F3_PCIE_MC_OVERLAY_BAR0 2 0x40000c6 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 ixD2F3_PCIE_MC_OVERLAY_BAR1 2 0x40000c7 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 ixD2F4_PCIE_PORT_INDEX 2 0x5000038 1 0 4294967295 PCIE_INDEX 0 7 ixD2F4_PCIE_PORT_DATA 2 0x5000039 1 0 4294967295 PCIE_DATA 0 31 ixD2F4_PCIEP_RESERVED 2 0x0 1 0 4294967295 PCIEP_RESERVED 0 31 ixD2F4_PCIEP_SCRATCH 2 0x1 1 0 4294967295 PCIEP_SCRATCH 0 31 ixD2F4_PCIEP_HW_DEBUG 2 0x2 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixD2F4_PCIEP_PORT_CNTL 2 0x10 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixD2F4_PCIE_TX_CNTL 2 0x20 8 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 ixD2F4_PCIE_TX_REQUESTER_ID 2 0x21 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixD2F4_PCIE_TX_VENDOR_SPECIFIC 2 0x22 1 0 4294967295 TX_VENDOR_DATA 0 23 ixD2F4_PCIE_TX_REQUEST_NUM_CNTL 2 0x23 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixD2F4_PCIE_TX_SEQ 2 0x24 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixD2F4_PCIE_TX_REPLAY 2 0x25 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixD2F4_PCIE_TX_ACK_LATENCY_LIMIT 2 0x26 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixD2F4_PCIE_TX_CREDITS_ADVT_P 2 0x30 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixD2F4_PCIE_TX_CREDITS_ADVT_NP 2 0x31 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixD2F4_PCIE_TX_CREDITS_ADVT_CPL 2 0x32 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixD2F4_PCIE_TX_CREDITS_INIT_P 2 0x33 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixD2F4_PCIE_TX_CREDITS_INIT_NP 2 0x34 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixD2F4_PCIE_TX_CREDITS_INIT_CPL 2 0x35 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixD2F4_PCIE_TX_CREDITS_STATUS 2 0x36 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixD2F4_PCIE_TX_CREDITS_FCU_THRESHOLD 2 0x37 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixD2F4_PCIE_P_PORT_LANE_STATUS 2 0x50 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixD2F4_PCIE_FC_P 2 0x60 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixD2F4_PCIE_FC_NP 2 0x61 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixD2F4_PCIE_FC_CPL 2 0x62 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixD2F4_PCIE_ERR_CNTL 2 0x6a 14 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixD2F4_PCIE_RX_CNTL 2 0x70 26 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 RX_RCB_FLR_TIMEOUT_DIS 27 27 ixD2F4_PCIE_RX_EXPECTED_SEQNUM 2 0x71 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixD2F4_PCIE_RX_VENDOR_SPECIFIC 2 0x72 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixD2F4_PCIE_RX_CNTL3 2 0x74 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixD2F4_PCIE_RX_CREDITS_ALLOCATED_P 2 0x80 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixD2F4_PCIE_RX_CREDITS_ALLOCATED_NP 2 0x81 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixD2F4_PCIE_RX_CREDITS_ALLOCATED_CPL 2 0x82 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixD2F4_PCIEP_ERROR_INJECT_PHYSICAL 2 0x83 12 0 4294967295 ERROR_INJECT_PL_LANE_ERR 0 1 ERROR_INJECT_PL_FRAMING_ERR 2 3 ERROR_INJECT_PL_BAD_PARITY_IN_SKP 4 5 ERROR_INJECT_PL_BAD_LFSR_IN_SKP 6 7 ERROR_INJECT_PL_LOOPBACK_UFLOW 8 9 ERROR_INJECT_PL_LOOPBACK_OFLOW 10 11 ERROR_INJECT_PL_DESKEW_ERR 12 13 ERROR_INJECT_PL_8B10B_DISPARITY_ERR 14 15 ERROR_INJECT_PL_8B10B_DECODE_ERR 16 17 ERROR_INJECT_PL_SKP_OS_ERROR 18 19 ERROR_INJECT_PL_INV_OS_IDENTIFIER 20 21 ERROR_INJECT_PL_BAD_SYNC_HEADER 22 23 ixD2F4_PCIEP_ERROR_INJECT_TRANSACTION 2 0x84 10 0 4294967295 ERROR_INJECT_TL_FLOW_CTL_ERR 0 1 ERROR_INJECT_TL_REPLAY_NUM_ROLLOVER 2 3 ERROR_INJECT_TL_BAD_DLLP 4 5 ERROR_INJECT_TL_BAD_TLP 6 7 ERROR_INJECT_TL_UNSUPPORTED_REQ 8 9 ERROR_INJECT_TL_ECRC_ERROR 10 11 ERROR_INJECT_TL_MALFORMED_TLP 12 13 ERROR_INJECT_TL_UNEXPECTED_CMPLT 14 15 ERROR_INJECT_TL_COMPLETER_ABORT 16 17 ERROR_INJECT_TL_COMPLETION_TIMEOUT 18 19 ixD2F4_PCIE_LC_CNTL 2 0xa0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixD2F4_PCIE_LC_CNTL2 2 0xb1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixD2F4_PCIE_LC_CNTL3 2 0xb5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixD2F4_PCIE_LC_CNTL4 2 0xb6 22 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_DIS_CONTIG_END_SET_CHECK 2 2 LC_DIS_ASPM_L1_IN_SPEED_CHANGE 3 3 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixD2F4_PCIE_LC_CNTL5 2 0xb7 5 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 LC_DSC_EQ_FS_LF_INVALID_TO_PRESETS 24 24 ixD2F4_PCIE_LC_CNTL6 2 0xbb 3 0 4294967295 LC_SPC_MODE_2P5GT 0 0 LC_SPC_MODE_5GT 2 2 LC_SPC_MODE_8GT 4 4 ixD2F4_PCIE_LC_BW_CHANGE_CNTL 2 0xb2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixD2F4_PCIE_LC_TRAINING_CNTL 2 0xa1 25 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_WAIT_FOR_SETS_IN_RCFG 14 14 LC_HOT_RESET_QUICK_EXIT_EN 15 15 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixD2F4_PCIE_LC_LINK_WIDTH_CNTL 2 0xa2 24 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 LC_MULT_REVERSE_ATTEMP_EN 24 24 LC_RESET_TSX_CNT_IN_RCONFIG_EN 25 25 LC_WAIT_FOR_L_IDLE_IN_R_IDLE 26 26 LC_WAIT_FOR_NON_EI_ON_RXL0S_EXIT 27 27 LC_HOLD_EI_FOR_RSPEED_CMD_CHANGE 28 28 LC_BYPASS_RXL0S_ON_SHORT_EI 29 29 ixD2F4_PCIE_LC_N_FTS_CNTL 2 0xa3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixD2F4_PCIE_LC_SPEED_CNTL 2 0xa4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixD2F4_PCIE_LC_CDR_CNTL 2 0xb3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixD2F4_PCIE_LC_LANE_CNTL 2 0xb4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixD2F4_PCIE_LC_FORCE_COEFF 2 0xb8 6 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 LC_PRESET_10_EN 20 20 ixD2F4_PCIE_LC_BEST_EQ_SETTINGS 2 0xb9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixD2F4_PCIE_LC_FORCE_EQ_REQ_COEFF 2 0xba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixD2F4_PCIE_LC_STATE0 2 0xa5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixD2F4_PCIE_LC_STATE1 2 0xa6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixD2F4_PCIE_LC_STATE2 2 0xa7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixD2F4_PCIE_LC_STATE3 2 0xa8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixD2F4_PCIE_LC_STATE4 2 0xa9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixD2F4_PCIE_LC_STATE5 2 0xaa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixD2F4_PCIEP_STRAP_LC 2 0xc0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixD2F4_PCIEP_STRAP_MISC 2 0xc1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixD2F4_PCIEP_BCH_ECC_CNTL 2 0xd0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 ixD2F4_PCIEP_HPGI_PRIVATE 2 0xd2 2 0 4294967295 PRESENCE_DETECT_CHANGED_PRIVATE 3 3 PRESENCE_DETECT_STATE_PRIVATE 6 6 ixD2F4_PCIEP_HPGI 2 0xda 11 0 4294967295 REG_HPGI_ASSERT_TO_SMI_EN 0 0 REG_HPGI_ASSERT_TO_SCI_EN 1 1 REG_HPGI_DEASSERT_TO_SMI_EN 2 2 REG_HPGI_DEASSERT_TO_SCI_EN 3 3 REG_HPGI_HOOK 7 7 HPGI_REG_ASSERT_TO_SMI_STATUS 8 8 HPGI_REG_ASSERT_TO_SCI_STATUS 9 9 HPGI_REG_DEASSERT_TO_SMI_STATUS 10 10 HPGI_REG_DEASSERT_TO_SCI_STATUS 11 11 HPGI_REG_PRESENCE_DETECT_STATE_CHANGE_STATUS 15 15 REG_HPGI_PRESENCE_DETECT_STATE_CHANGE_EN 16 16 ixD2F4_VENDOR_ID 2 0x5000000 1 0 4294967295 VENDOR_ID 0 15 ixD2F4_DEVICE_ID 2 0x5000000 1 0 4294967295 DEVICE_ID 16 31 ixD2F4_COMMAND 2 0x5000001 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 ixD2F4_STATUS 2 0x5000001 11 0 4294967295 INT_STATUS 19 19 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 SIGNALED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD2F4_REVISION_ID 2 0x5000002 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 ixD2F4_PROG_INTERFACE 2 0x5000002 1 0 4294967295 PROG_INTERFACE 8 15 ixD2F4_SUB_CLASS 2 0x5000002 1 0 4294967295 SUB_CLASS 16 23 ixD2F4_BASE_CLASS 2 0x5000002 1 0 4294967295 BASE_CLASS 24 31 ixD2F4_CACHE_LINE 2 0x5000003 1 0 4294967295 CACHE_LINE_SIZE 0 7 ixD2F4_LATENCY 2 0x5000003 1 0 4294967295 LATENCY_TIMER 8 15 ixD2F4_HEADER 2 0x5000003 2 0 4294967295 HEADER_TYPE 16 22 DEVICE_TYPE 23 23 ixD2F4_BIST 2 0x5000003 3 0 4294967295 BIST_COMP 24 27 BIST_STRT 30 30 BIST_CAP 31 31 ixD2F4_SUB_BUS_NUMBER_LATENCY 2 0x5000006 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 ixD2F4_IO_BASE_LIMIT 2 0x5000007 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 ixD2F4_SECONDARY_STATUS 2 0x5000007 10 0 4294967295 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 RECEIVED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD2F4_MEM_BASE_LIMIT 2 0x5000008 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 ixD2F4_PREF_BASE_LIMIT 2 0x5000009 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 ixD2F4_PREF_BASE_UPPER 2 0x500000a 1 0 4294967295 PREF_BASE_UPPER 0 31 ixD2F4_PREF_LIMIT_UPPER 2 0x500000b 1 0 4294967295 PREF_LIMIT_UPPER 0 31 ixD2F4_IO_BASE_LIMIT_HI 2 0x500000c 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 ixD2F4_IRQ_BRIDGE_CNTL 2 0x500000f 8 0 4294967295 PARITY_RESPONSE_EN 16 16 SERR_EN 17 17 ISA_EN 18 18 VGA_EN 19 19 VGA_DEC 20 20 MASTER_ABORT_MODE 21 21 SECONDARY_BUS_RESET 22 22 FAST_B2B_EN 23 23 ixD2F4_CAP_PTR 2 0x500000d 1 0 4294967295 CAP_PTR 0 7 ixD2F4_INTERRUPT_LINE 2 0x500000f 1 0 4294967295 INTERRUPT_LINE 0 7 ixD2F4_INTERRUPT_PIN 2 0x500000f 1 0 4294967295 INTERRUPT_PIN 8 15 ixD2F4_EXT_BRIDGE_CNTL 2 0x5000010 1 0 4294967295 IO_PORT_80_EN 0 0 ixD2F4_PMI_CAP_LIST 2 0x5000014 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F4_PMI_CAP 2 0x5000014 7 0 4294967295 VERSION 16 18 PME_CLOCK 19 19 DEV_SPECIFIC_INIT 21 21 AUX_CURRENT 22 24 D1_SUPPORT 25 25 D2_SUPPORT 26 26 PME_SUPPORT 27 31 ixD2F4_PMI_STATUS_CNTL 2 0x5000015 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 ixD2F4_PCIE_CAP_LIST 2 0x5000016 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F4_PCIE_CAP 2 0x5000016 4 0 4294967295 VERSION 16 19 DEVICE_TYPE 20 23 SLOT_IMPLEMENTED 24 24 INT_MESSAGE_NUM 25 29 ixD2F4_DEVICE_CAP 2 0x5000017 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 ixD2F4_DEVICE_CNTL 2 0x5000018 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 ixD2F4_DEVICE_STATUS 2 0x5000018 6 0 4294967295 CORR_ERR 16 16 NON_FATAL_ERR 17 17 FATAL_ERR 18 18 USR_DETECTED 19 19 AUX_PWR 20 20 TRANSACTIONS_PEND 21 21 ixD2F4_LINK_CAP 2 0x5000019 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 ixD2F4_LINK_CNTL 2 0x500001a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 ixD2F4_LINK_STATUS 2 0x500001a 7 0 4294967295 CURRENT_LINK_SPEED 16 19 NEGOTIATED_LINK_WIDTH 20 25 LINK_TRAINING 27 27 SLOT_CLOCK_CFG 28 28 DL_ACTIVE 29 29 LINK_BW_MANAGEMENT_STATUS 30 30 LINK_AUTONOMOUS_BW_STATUS 31 31 ixD2F4_SLOT_CAP 2 0x500001b 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 ixD2F4_SLOT_CNTL 2 0x500001c 11 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 ixD2F4_SLOT_STATUS 2 0x500001c 9 0 4294967295 ATTN_BUTTON_PRESSED 16 16 PWR_FAULT_DETECTED 17 17 MRL_SENSOR_CHANGED 18 18 PRESENCE_DETECT_CHANGED 19 19 COMMAND_COMPLETED 20 20 MRL_SENSOR_STATE 21 21 PRESENCE_DETECT_STATE 22 22 ELECTROMECH_INTERLOCK_STATUS 23 23 DL_STATE_CHANGED 24 24 ixD2F4_ROOT_CNTL 2 0x500001d 5 0 4294967295 SERR_ON_CORR_ERR_EN 0 0 SERR_ON_NONFATAL_ERR_EN 1 1 SERR_ON_FATAL_ERR_EN 2 2 PM_INTERRUPT_EN 3 3 CRS_SOFTWARE_VISIBILITY_EN 4 4 ixD2F4_ROOT_CAP 2 0x500001d 1 0 4294967295 CRS_SOFTWARE_VISIBILITY 16 16 ixD2F4_ROOT_STATUS 2 0x500001e 3 0 4294967295 PME_REQUESTOR_ID 0 15 PME_STATUS 16 16 PME_PENDING 17 17 ixD2F4_DEVICE_CAP2 2 0x500001f 14 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 ixD2F4_DEVICE_CNTL2 2 0x5000020 10 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 ixD2F4_DEVICE_STATUS2 2 0x5000020 1 0 4294967295 RESERVED 16 31 ixD2F4_LINK_CAP2 2 0x5000021 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 ixD2F4_LINK_CNTL2 2 0x5000022 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 ixD2F4_LINK_STATUS2 2 0x5000022 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 16 16 EQUALIZATION_COMPLETE 17 17 EQUALIZATION_PHASE1_SUCCESS 18 18 EQUALIZATION_PHASE2_SUCCESS 19 19 EQUALIZATION_PHASE3_SUCCESS 20 20 LINK_EQUALIZATION_REQUEST 21 21 ixD2F4_SLOT_CAP2 2 0x5000023 1 0 4294967295 RESERVED 0 31 ixD2F4_SLOT_CNTL2 2 0x5000024 1 0 4294967295 RESERVED 0 15 ixD2F4_SLOT_STATUS2 2 0x5000024 1 0 4294967295 RESERVED 16 31 ixD2F4_MSI_CAP_LIST 2 0x5000028 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F4_MSI_MSG_CNTL 2 0x5000028 5 0 4294967295 MSI_EN 16 16 MSI_MULTI_CAP 17 19 MSI_MULTI_EN 20 22 MSI_64BIT 23 23 MSI_PERVECTOR_MASKING_CAP 24 24 ixD2F4_MSI_MSG_ADDR_LO 2 0x5000029 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 ixD2F4_MSI_MSG_ADDR_HI 2 0x500002a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 ixD2F4_MSI_MSG_DATA_64 2 0x500002b 1 0 4294967295 MSI_DATA_64 0 15 ixD2F4_MSI_MSG_DATA 2 0x500002a 1 0 4294967295 MSI_DATA 0 15 ixD2F4_SSID_CAP_LIST 2 0x5000030 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F4_SSID_CAP 2 0x5000031 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 ixD2F4_MSI_MAP_CAP_LIST 2 0x5000032 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F4_MSI_MAP_CAP 2 0x5000032 3 0 4294967295 EN 16 16 FIXD 17 17 CAP_TYPE 27 31 ixD2F4_MSI_MAP_ADDR_LO 2 0x5000033 1 0 4294967295 MSI_MAP_ADDR_LO 20 31 ixD2F4_MSI_MAP_ADDR_HI 2 0x5000034 1 0 4294967295 MSI_MAP_ADDR_HI 0 31 ixD2F4_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 2 0x5000040 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F4_PCIE_VENDOR_SPECIFIC_HDR 2 0x5000041 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 ixD2F4_PCIE_VENDOR_SPECIFIC1 2 0x5000042 1 0 4294967295 SCRATCH 0 31 ixD2F4_PCIE_VENDOR_SPECIFIC2 2 0x5000043 1 0 4294967295 SCRATCH 0 31 ixD2F4_PCIE_VC_ENH_CAP_LIST 2 0x5000044 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F4_PCIE_PORT_VC_CAP_REG1 2 0x5000045 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 ixD2F4_PCIE_PORT_VC_CAP_REG2 2 0x5000046 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 ixD2F4_PCIE_PORT_VC_CNTL 2 0x5000047 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 ixD2F4_PCIE_PORT_VC_STATUS 2 0x5000047 1 0 4294967295 VC_ARB_TABLE_STATUS 16 16 ixD2F4_PCIE_VC0_RESOURCE_CAP 2 0x5000048 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD2F4_PCIE_VC0_RESOURCE_CNTL 2 0x5000049 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD2F4_PCIE_VC0_RESOURCE_STATUS 2 0x500004a 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD2F4_PCIE_VC1_RESOURCE_CAP 2 0x500004b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD2F4_PCIE_VC1_RESOURCE_CNTL 2 0x500004c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD2F4_PCIE_VC1_RESOURCE_STATUS 2 0x500004d 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD2F4_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 2 0x5000050 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F4_PCIE_DEV_SERIAL_NUM_DW1 2 0x5000051 1 0 4294967295 SERIAL_NUMBER_LO 0 31 ixD2F4_PCIE_DEV_SERIAL_NUM_DW2 2 0x5000052 1 0 4294967295 SERIAL_NUMBER_HI 0 31 ixD2F4_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 2 0x5000054 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F4_PCIE_UNCORR_ERR_STATUS 2 0x5000055 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 ixD2F4_PCIE_UNCORR_ERR_MASK 2 0x5000056 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 ixD2F4_PCIE_UNCORR_ERR_SEVERITY 2 0x5000057 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 ixD2F4_PCIE_CORR_ERR_STATUS 2 0x5000058 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 ixD2F4_PCIE_CORR_ERR_MASK 2 0x5000059 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 ixD2F4_PCIE_ADV_ERR_CAP_CNTL 2 0x500005a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 ixD2F4_PCIE_HDR_LOG0 2 0x500005b 1 0 4294967295 TLP_HDR 0 31 ixD2F4_PCIE_HDR_LOG1 2 0x500005c 1 0 4294967295 TLP_HDR 0 31 ixD2F4_PCIE_HDR_LOG2 2 0x500005d 1 0 4294967295 TLP_HDR 0 31 ixD2F4_PCIE_HDR_LOG3 2 0x500005e 1 0 4294967295 TLP_HDR 0 31 ixD2F4_PCIE_ROOT_ERR_CMD 2 0x500005f 3 0 4294967295 CORR_ERR_REP_EN 0 0 NONFATAL_ERR_REP_EN 1 1 FATAL_ERR_REP_EN 2 2 ixD2F4_PCIE_ROOT_ERR_STATUS 2 0x5000060 8 0 4294967295 ERR_CORR_RCVD 0 0 MULT_ERR_CORR_RCVD 1 1 ERR_FATAL_NONFATAL_RCVD 2 2 MULT_ERR_FATAL_NONFATAL_RCVD 3 3 FIRST_UNCORRECTABLE_FATAL 4 4 NONFATAL_ERROR_MSG_RCVD 5 5 FATAL_ERROR_MSG_RCVD 6 6 ADV_ERR_INT_MSG_NUM 27 31 ixD2F4_PCIE_ERR_SRC_ID 2 0x5000061 2 0 4294967295 ERR_CORR_SRC_ID 0 15 ERR_FATAL_NONFATAL_SRC_ID 16 31 ixD2F4_PCIE_TLP_PREFIX_LOG0 2 0x5000062 1 0 4294967295 TLP_PREFIX 0 31 ixD2F4_PCIE_TLP_PREFIX_LOG1 2 0x5000063 1 0 4294967295 TLP_PREFIX 0 31 ixD2F4_PCIE_TLP_PREFIX_LOG2 2 0x5000064 1 0 4294967295 TLP_PREFIX 0 31 ixD2F4_PCIE_TLP_PREFIX_LOG3 2 0x5000065 1 0 4294967295 TLP_PREFIX 0 31 ixD2F4_PCIE_SECONDARY_ENH_CAP_LIST 2 0x500009c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F4_PCIE_LINK_CNTL3 2 0x500009d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 ixD2F4_PCIE_LANE_ERROR_STATUS 2 0x500009e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 ixD2F4_PCIE_LANE_0_EQUALIZATION_CNTL 2 0x500009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F4_PCIE_LANE_1_EQUALIZATION_CNTL 2 0x500009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F4_PCIE_LANE_2_EQUALIZATION_CNTL 2 0x50000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F4_PCIE_LANE_3_EQUALIZATION_CNTL 2 0x50000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F4_PCIE_LANE_4_EQUALIZATION_CNTL 2 0x50000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F4_PCIE_LANE_5_EQUALIZATION_CNTL 2 0x50000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F4_PCIE_LANE_6_EQUALIZATION_CNTL 2 0x50000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F4_PCIE_LANE_7_EQUALIZATION_CNTL 2 0x50000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F4_PCIE_LANE_8_EQUALIZATION_CNTL 2 0x50000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F4_PCIE_LANE_9_EQUALIZATION_CNTL 2 0x50000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F4_PCIE_LANE_10_EQUALIZATION_CNTL 2 0x50000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F4_PCIE_LANE_11_EQUALIZATION_CNTL 2 0x50000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F4_PCIE_LANE_12_EQUALIZATION_CNTL 2 0x50000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F4_PCIE_LANE_13_EQUALIZATION_CNTL 2 0x50000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F4_PCIE_LANE_14_EQUALIZATION_CNTL 2 0x50000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F4_PCIE_LANE_15_EQUALIZATION_CNTL 2 0x50000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F4_PCIE_ACS_ENH_CAP_LIST 2 0x50000a8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F4_PCIE_ACS_CAP 2 0x50000a9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 ixD2F4_PCIE_ACS_CNTL 2 0x50000a9 7 0 4294967295 SOURCE_VALIDATION_EN 16 16 TRANSLATION_BLOCKING_EN 17 17 P2P_REQUEST_REDIRECT_EN 18 18 P2P_COMPLETION_REDIRECT_EN 19 19 UPSTREAM_FORWARDING_EN 20 20 P2P_EGRESS_CONTROL_EN 21 21 DIRECT_TRANSLATED_P2P_EN 22 22 ixD2F4_PCIE_MC_ENH_CAP_LIST 2 0x50000bc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F4_PCIE_MC_CAP 2 0x50000bd 2 0 4294967295 MC_MAX_GROUP 0 5 MC_ECRC_REGEN_SUPP 15 15 ixD2F4_PCIE_MC_CNTL 2 0x50000bd 2 0 4294967295 MC_NUM_GROUP 16 21 MC_ENABLE 31 31 ixD2F4_PCIE_MC_ADDR0 2 0x50000be 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 ixD2F4_PCIE_MC_ADDR1 2 0x50000bf 1 0 4294967295 MC_BASE_ADDR_1 0 31 ixD2F4_PCIE_MC_RCV0 2 0x50000c0 1 0 4294967295 MC_RECEIVE_0 0 31 ixD2F4_PCIE_MC_RCV1 2 0x50000c1 1 0 4294967295 MC_RECEIVE_1 0 31 ixD2F4_PCIE_MC_BLOCK_ALL0 2 0x50000c2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 ixD2F4_PCIE_MC_BLOCK_ALL1 2 0x50000c3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 ixD2F4_PCIE_MC_BLOCK_UNTRANSLATED_0 2 0x50000c4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 ixD2F4_PCIE_MC_BLOCK_UNTRANSLATED_1 2 0x50000c5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 ixD2F4_PCIE_MC_OVERLAY_BAR0 2 0x50000c6 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 ixD2F4_PCIE_MC_OVERLAY_BAR1 2 0x50000c7 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 ixD2F5_PCIE_PORT_INDEX 2 0x6000038 1 0 4294967295 PCIE_INDEX 0 7 ixD2F5_PCIE_PORT_DATA 2 0x6000039 1 0 4294967295 PCIE_DATA 0 31 ixD2F5_PCIEP_RESERVED 2 0x0 1 0 4294967295 PCIEP_RESERVED 0 31 ixD2F5_PCIEP_SCRATCH 2 0x1 1 0 4294967295 PCIEP_SCRATCH 0 31 ixD2F5_PCIEP_HW_DEBUG 2 0x2 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixD2F5_PCIEP_PORT_CNTL 2 0x10 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixD2F5_PCIE_TX_CNTL 2 0x20 8 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 ixD2F5_PCIE_TX_REQUESTER_ID 2 0x21 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixD2F5_PCIE_TX_VENDOR_SPECIFIC 2 0x22 1 0 4294967295 TX_VENDOR_DATA 0 23 ixD2F5_PCIE_TX_REQUEST_NUM_CNTL 2 0x23 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixD2F5_PCIE_TX_SEQ 2 0x24 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixD2F5_PCIE_TX_REPLAY 2 0x25 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixD2F5_PCIE_TX_ACK_LATENCY_LIMIT 2 0x26 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixD2F5_PCIE_TX_CREDITS_ADVT_P 2 0x30 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixD2F5_PCIE_TX_CREDITS_ADVT_NP 2 0x31 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixD2F5_PCIE_TX_CREDITS_ADVT_CPL 2 0x32 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixD2F5_PCIE_TX_CREDITS_INIT_P 2 0x33 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixD2F5_PCIE_TX_CREDITS_INIT_NP 2 0x34 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixD2F5_PCIE_TX_CREDITS_INIT_CPL 2 0x35 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixD2F5_PCIE_TX_CREDITS_STATUS 2 0x36 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixD2F5_PCIE_TX_CREDITS_FCU_THRESHOLD 2 0x37 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixD2F5_PCIE_P_PORT_LANE_STATUS 2 0x50 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixD2F5_PCIE_FC_P 2 0x60 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixD2F5_PCIE_FC_NP 2 0x61 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixD2F5_PCIE_FC_CPL 2 0x62 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixD2F5_PCIE_ERR_CNTL 2 0x6a 14 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixD2F5_PCIE_RX_CNTL 2 0x70 26 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 RX_RCB_FLR_TIMEOUT_DIS 27 27 ixD2F5_PCIE_RX_EXPECTED_SEQNUM 2 0x71 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixD2F5_PCIE_RX_VENDOR_SPECIFIC 2 0x72 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixD2F5_PCIE_RX_CNTL3 2 0x74 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixD2F5_PCIE_RX_CREDITS_ALLOCATED_P 2 0x80 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixD2F5_PCIE_RX_CREDITS_ALLOCATED_NP 2 0x81 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixD2F5_PCIE_RX_CREDITS_ALLOCATED_CPL 2 0x82 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixD2F5_PCIEP_ERROR_INJECT_PHYSICAL 2 0x83 12 0 4294967295 ERROR_INJECT_PL_LANE_ERR 0 1 ERROR_INJECT_PL_FRAMING_ERR 2 3 ERROR_INJECT_PL_BAD_PARITY_IN_SKP 4 5 ERROR_INJECT_PL_BAD_LFSR_IN_SKP 6 7 ERROR_INJECT_PL_LOOPBACK_UFLOW 8 9 ERROR_INJECT_PL_LOOPBACK_OFLOW 10 11 ERROR_INJECT_PL_DESKEW_ERR 12 13 ERROR_INJECT_PL_8B10B_DISPARITY_ERR 14 15 ERROR_INJECT_PL_8B10B_DECODE_ERR 16 17 ERROR_INJECT_PL_SKP_OS_ERROR 18 19 ERROR_INJECT_PL_INV_OS_IDENTIFIER 20 21 ERROR_INJECT_PL_BAD_SYNC_HEADER 22 23 ixD2F5_PCIEP_ERROR_INJECT_TRANSACTION 2 0x84 10 0 4294967295 ERROR_INJECT_TL_FLOW_CTL_ERR 0 1 ERROR_INJECT_TL_REPLAY_NUM_ROLLOVER 2 3 ERROR_INJECT_TL_BAD_DLLP 4 5 ERROR_INJECT_TL_BAD_TLP 6 7 ERROR_INJECT_TL_UNSUPPORTED_REQ 8 9 ERROR_INJECT_TL_ECRC_ERROR 10 11 ERROR_INJECT_TL_MALFORMED_TLP 12 13 ERROR_INJECT_TL_UNEXPECTED_CMPLT 14 15 ERROR_INJECT_TL_COMPLETER_ABORT 16 17 ERROR_INJECT_TL_COMPLETION_TIMEOUT 18 19 ixD2F5_PCIE_LC_CNTL 2 0xa0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixD2F5_PCIE_LC_CNTL2 2 0xb1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixD2F5_PCIE_LC_CNTL3 2 0xb5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixD2F5_PCIE_LC_CNTL4 2 0xb6 22 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_DIS_CONTIG_END_SET_CHECK 2 2 LC_DIS_ASPM_L1_IN_SPEED_CHANGE 3 3 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixD2F5_PCIE_LC_CNTL5 2 0xb7 5 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 LC_DSC_EQ_FS_LF_INVALID_TO_PRESETS 24 24 ixD2F5_PCIE_LC_CNTL6 2 0xbb 3 0 4294967295 LC_SPC_MODE_2P5GT 0 0 LC_SPC_MODE_5GT 2 2 LC_SPC_MODE_8GT 4 4 ixD2F5_PCIE_LC_BW_CHANGE_CNTL 2 0xb2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixD2F5_PCIE_LC_TRAINING_CNTL 2 0xa1 25 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_WAIT_FOR_SETS_IN_RCFG 14 14 LC_HOT_RESET_QUICK_EXIT_EN 15 15 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixD2F5_PCIE_LC_LINK_WIDTH_CNTL 2 0xa2 24 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 LC_MULT_REVERSE_ATTEMP_EN 24 24 LC_RESET_TSX_CNT_IN_RCONFIG_EN 25 25 LC_WAIT_FOR_L_IDLE_IN_R_IDLE 26 26 LC_WAIT_FOR_NON_EI_ON_RXL0S_EXIT 27 27 LC_HOLD_EI_FOR_RSPEED_CMD_CHANGE 28 28 LC_BYPASS_RXL0S_ON_SHORT_EI 29 29 ixD2F5_PCIE_LC_N_FTS_CNTL 2 0xa3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixD2F5_PCIE_LC_SPEED_CNTL 2 0xa4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixD2F5_PCIE_LC_CDR_CNTL 2 0xb3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixD2F5_PCIE_LC_LANE_CNTL 2 0xb4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixD2F5_PCIE_LC_FORCE_COEFF 2 0xb8 6 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 LC_PRESET_10_EN 20 20 ixD2F5_PCIE_LC_BEST_EQ_SETTINGS 2 0xb9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixD2F5_PCIE_LC_FORCE_EQ_REQ_COEFF 2 0xba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixD2F5_PCIE_LC_STATE0 2 0xa5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixD2F5_PCIE_LC_STATE1 2 0xa6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixD2F5_PCIE_LC_STATE2 2 0xa7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixD2F5_PCIE_LC_STATE3 2 0xa8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixD2F5_PCIE_LC_STATE4 2 0xa9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixD2F5_PCIE_LC_STATE5 2 0xaa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixD2F5_PCIEP_STRAP_LC 2 0xc0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixD2F5_PCIEP_STRAP_MISC 2 0xc1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixD2F5_PCIEP_BCH_ECC_CNTL 2 0xd0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 ixD2F5_PCIEP_HPGI_PRIVATE 2 0xd2 2 0 4294967295 PRESENCE_DETECT_CHANGED_PRIVATE 3 3 PRESENCE_DETECT_STATE_PRIVATE 6 6 ixD2F5_PCIEP_HPGI 2 0xda 11 0 4294967295 REG_HPGI_ASSERT_TO_SMI_EN 0 0 REG_HPGI_ASSERT_TO_SCI_EN 1 1 REG_HPGI_DEASSERT_TO_SMI_EN 2 2 REG_HPGI_DEASSERT_TO_SCI_EN 3 3 REG_HPGI_HOOK 7 7 HPGI_REG_ASSERT_TO_SMI_STATUS 8 8 HPGI_REG_ASSERT_TO_SCI_STATUS 9 9 HPGI_REG_DEASSERT_TO_SMI_STATUS 10 10 HPGI_REG_DEASSERT_TO_SCI_STATUS 11 11 HPGI_REG_PRESENCE_DETECT_STATE_CHANGE_STATUS 15 15 REG_HPGI_PRESENCE_DETECT_STATE_CHANGE_EN 16 16 ixD2F5_VENDOR_ID 2 0x6000000 1 0 4294967295 VENDOR_ID 0 15 ixD2F5_DEVICE_ID 2 0x6000000 1 0 4294967295 DEVICE_ID 16 31 ixD2F5_COMMAND 2 0x6000001 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 ixD2F5_STATUS 2 0x6000001 11 0 4294967295 INT_STATUS 19 19 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 SIGNALED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD2F5_REVISION_ID 2 0x6000002 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 ixD2F5_PROG_INTERFACE 2 0x6000002 1 0 4294967295 PROG_INTERFACE 8 15 ixD2F5_SUB_CLASS 2 0x6000002 1 0 4294967295 SUB_CLASS 16 23 ixD2F5_BASE_CLASS 2 0x6000002 1 0 4294967295 BASE_CLASS 24 31 ixD2F5_CACHE_LINE 2 0x6000003 1 0 4294967295 CACHE_LINE_SIZE 0 7 ixD2F5_LATENCY 2 0x6000003 1 0 4294967295 LATENCY_TIMER 8 15 ixD2F5_HEADER 2 0x6000003 2 0 4294967295 HEADER_TYPE 16 22 DEVICE_TYPE 23 23 ixD2F5_BIST 2 0x6000003 3 0 4294967295 BIST_COMP 24 27 BIST_STRT 30 30 BIST_CAP 31 31 ixD2F5_SUB_BUS_NUMBER_LATENCY 2 0x6000006 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 ixD2F5_IO_BASE_LIMIT 2 0x6000007 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 ixD2F5_SECONDARY_STATUS 2 0x6000007 10 0 4294967295 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 RECEIVED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD2F5_MEM_BASE_LIMIT 2 0x6000008 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 ixD2F5_PREF_BASE_LIMIT 2 0x6000009 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 ixD2F5_PREF_BASE_UPPER 2 0x600000a 1 0 4294967295 PREF_BASE_UPPER 0 31 ixD2F5_PREF_LIMIT_UPPER 2 0x600000b 1 0 4294967295 PREF_LIMIT_UPPER 0 31 ixD2F5_IO_BASE_LIMIT_HI 2 0x600000c 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 ixD2F5_IRQ_BRIDGE_CNTL 2 0x600000f 8 0 4294967295 PARITY_RESPONSE_EN 16 16 SERR_EN 17 17 ISA_EN 18 18 VGA_EN 19 19 VGA_DEC 20 20 MASTER_ABORT_MODE 21 21 SECONDARY_BUS_RESET 22 22 FAST_B2B_EN 23 23 ixD2F5_CAP_PTR 2 0x600000d 1 0 4294967295 CAP_PTR 0 7 ixD2F5_INTERRUPT_LINE 2 0x600000f 1 0 4294967295 INTERRUPT_LINE 0 7 ixD2F5_INTERRUPT_PIN 2 0x600000f 1 0 4294967295 INTERRUPT_PIN 8 15 ixD2F5_EXT_BRIDGE_CNTL 2 0x6000010 1 0 4294967295 IO_PORT_80_EN 0 0 ixD2F5_PMI_CAP_LIST 2 0x6000014 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F5_PMI_CAP 2 0x6000014 7 0 4294967295 VERSION 16 18 PME_CLOCK 19 19 DEV_SPECIFIC_INIT 21 21 AUX_CURRENT 22 24 D1_SUPPORT 25 25 D2_SUPPORT 26 26 PME_SUPPORT 27 31 ixD2F5_PMI_STATUS_CNTL 2 0x6000015 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 ixD2F5_PCIE_CAP_LIST 2 0x6000016 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F5_PCIE_CAP 2 0x6000016 4 0 4294967295 VERSION 16 19 DEVICE_TYPE 20 23 SLOT_IMPLEMENTED 24 24 INT_MESSAGE_NUM 25 29 ixD2F5_DEVICE_CAP 2 0x6000017 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 ixD2F5_DEVICE_CNTL 2 0x6000018 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 ixD2F5_DEVICE_STATUS 2 0x6000018 6 0 4294967295 CORR_ERR 16 16 NON_FATAL_ERR 17 17 FATAL_ERR 18 18 USR_DETECTED 19 19 AUX_PWR 20 20 TRANSACTIONS_PEND 21 21 ixD2F5_LINK_CAP 2 0x6000019 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 ixD2F5_LINK_CNTL 2 0x600001a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 ixD2F5_LINK_STATUS 2 0x600001a 7 0 4294967295 CURRENT_LINK_SPEED 16 19 NEGOTIATED_LINK_WIDTH 20 25 LINK_TRAINING 27 27 SLOT_CLOCK_CFG 28 28 DL_ACTIVE 29 29 LINK_BW_MANAGEMENT_STATUS 30 30 LINK_AUTONOMOUS_BW_STATUS 31 31 ixD2F5_SLOT_CAP 2 0x600001b 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 ixD2F5_SLOT_CNTL 2 0x600001c 11 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 ixD2F5_SLOT_STATUS 2 0x600001c 9 0 4294967295 ATTN_BUTTON_PRESSED 16 16 PWR_FAULT_DETECTED 17 17 MRL_SENSOR_CHANGED 18 18 PRESENCE_DETECT_CHANGED 19 19 COMMAND_COMPLETED 20 20 MRL_SENSOR_STATE 21 21 PRESENCE_DETECT_STATE 22 22 ELECTROMECH_INTERLOCK_STATUS 23 23 DL_STATE_CHANGED 24 24 ixD2F5_ROOT_CNTL 2 0x600001d 5 0 4294967295 SERR_ON_CORR_ERR_EN 0 0 SERR_ON_NONFATAL_ERR_EN 1 1 SERR_ON_FATAL_ERR_EN 2 2 PM_INTERRUPT_EN 3 3 CRS_SOFTWARE_VISIBILITY_EN 4 4 ixD2F5_ROOT_CAP 2 0x600001d 1 0 4294967295 CRS_SOFTWARE_VISIBILITY 16 16 ixD2F5_ROOT_STATUS 2 0x600001e 3 0 4294967295 PME_REQUESTOR_ID 0 15 PME_STATUS 16 16 PME_PENDING 17 17 ixD2F5_DEVICE_CAP2 2 0x600001f 14 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 ixD2F5_DEVICE_CNTL2 2 0x6000020 10 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 ixD2F5_DEVICE_STATUS2 2 0x6000020 1 0 4294967295 RESERVED 16 31 ixD2F5_LINK_CAP2 2 0x6000021 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 ixD2F5_LINK_CNTL2 2 0x6000022 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 ixD2F5_LINK_STATUS2 2 0x6000022 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 16 16 EQUALIZATION_COMPLETE 17 17 EQUALIZATION_PHASE1_SUCCESS 18 18 EQUALIZATION_PHASE2_SUCCESS 19 19 EQUALIZATION_PHASE3_SUCCESS 20 20 LINK_EQUALIZATION_REQUEST 21 21 ixD2F5_SLOT_CAP2 2 0x6000023 1 0 4294967295 RESERVED 0 31 ixD2F5_SLOT_CNTL2 2 0x6000024 1 0 4294967295 RESERVED 0 15 ixD2F5_SLOT_STATUS2 2 0x6000024 1 0 4294967295 RESERVED 16 31 ixD2F5_MSI_CAP_LIST 2 0x6000028 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F5_MSI_MSG_CNTL 2 0x6000028 5 0 4294967295 MSI_EN 16 16 MSI_MULTI_CAP 17 19 MSI_MULTI_EN 20 22 MSI_64BIT 23 23 MSI_PERVECTOR_MASKING_CAP 24 24 ixD2F5_MSI_MSG_ADDR_LO 2 0x6000029 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 ixD2F5_MSI_MSG_ADDR_HI 2 0x600002a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 ixD2F5_MSI_MSG_DATA_64 2 0x600002b 1 0 4294967295 MSI_DATA_64 0 15 ixD2F5_MSI_MSG_DATA 2 0x600002a 1 0 4294967295 MSI_DATA 0 15 ixD2F5_SSID_CAP_LIST 2 0x6000030 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F5_SSID_CAP 2 0x6000031 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 ixD2F5_MSI_MAP_CAP_LIST 2 0x6000032 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD2F5_MSI_MAP_CAP 2 0x6000032 3 0 4294967295 EN 16 16 FIXD 17 17 CAP_TYPE 27 31 ixD2F5_MSI_MAP_ADDR_LO 2 0x6000033 1 0 4294967295 MSI_MAP_ADDR_LO 20 31 ixD2F5_MSI_MAP_ADDR_HI 2 0x6000034 1 0 4294967295 MSI_MAP_ADDR_HI 0 31 ixD2F5_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 2 0x6000040 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F5_PCIE_VENDOR_SPECIFIC_HDR 2 0x6000041 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 ixD2F5_PCIE_VENDOR_SPECIFIC1 2 0x6000042 1 0 4294967295 SCRATCH 0 31 ixD2F5_PCIE_VENDOR_SPECIFIC2 2 0x6000043 1 0 4294967295 SCRATCH 0 31 ixD2F5_PCIE_VC_ENH_CAP_LIST 2 0x6000044 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F5_PCIE_PORT_VC_CAP_REG1 2 0x6000045 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 ixD2F5_PCIE_PORT_VC_CAP_REG2 2 0x6000046 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 ixD2F5_PCIE_PORT_VC_CNTL 2 0x6000047 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 ixD2F5_PCIE_PORT_VC_STATUS 2 0x6000047 1 0 4294967295 VC_ARB_TABLE_STATUS 16 16 ixD2F5_PCIE_VC0_RESOURCE_CAP 2 0x6000048 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD2F5_PCIE_VC0_RESOURCE_CNTL 2 0x6000049 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD2F5_PCIE_VC0_RESOURCE_STATUS 2 0x600004a 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD2F5_PCIE_VC1_RESOURCE_CAP 2 0x600004b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD2F5_PCIE_VC1_RESOURCE_CNTL 2 0x600004c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD2F5_PCIE_VC1_RESOURCE_STATUS 2 0x600004d 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD2F5_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 2 0x6000050 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F5_PCIE_DEV_SERIAL_NUM_DW1 2 0x6000051 1 0 4294967295 SERIAL_NUMBER_LO 0 31 ixD2F5_PCIE_DEV_SERIAL_NUM_DW2 2 0x6000052 1 0 4294967295 SERIAL_NUMBER_HI 0 31 ixD2F5_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 2 0x6000054 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F5_PCIE_UNCORR_ERR_STATUS 2 0x6000055 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 ixD2F5_PCIE_UNCORR_ERR_MASK 2 0x6000056 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 ixD2F5_PCIE_UNCORR_ERR_SEVERITY 2 0x6000057 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 ixD2F5_PCIE_CORR_ERR_STATUS 2 0x6000058 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 ixD2F5_PCIE_CORR_ERR_MASK 2 0x6000059 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 ixD2F5_PCIE_ADV_ERR_CAP_CNTL 2 0x600005a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 ixD2F5_PCIE_HDR_LOG0 2 0x600005b 1 0 4294967295 TLP_HDR 0 31 ixD2F5_PCIE_HDR_LOG1 2 0x600005c 1 0 4294967295 TLP_HDR 0 31 ixD2F5_PCIE_HDR_LOG2 2 0x600005d 1 0 4294967295 TLP_HDR 0 31 ixD2F5_PCIE_HDR_LOG3 2 0x600005e 1 0 4294967295 TLP_HDR 0 31 ixD2F5_PCIE_ROOT_ERR_CMD 2 0x600005f 3 0 4294967295 CORR_ERR_REP_EN 0 0 NONFATAL_ERR_REP_EN 1 1 FATAL_ERR_REP_EN 2 2 ixD2F5_PCIE_ROOT_ERR_STATUS 2 0x6000060 8 0 4294967295 ERR_CORR_RCVD 0 0 MULT_ERR_CORR_RCVD 1 1 ERR_FATAL_NONFATAL_RCVD 2 2 MULT_ERR_FATAL_NONFATAL_RCVD 3 3 FIRST_UNCORRECTABLE_FATAL 4 4 NONFATAL_ERROR_MSG_RCVD 5 5 FATAL_ERROR_MSG_RCVD 6 6 ADV_ERR_INT_MSG_NUM 27 31 ixD2F5_PCIE_ERR_SRC_ID 2 0x6000061 2 0 4294967295 ERR_CORR_SRC_ID 0 15 ERR_FATAL_NONFATAL_SRC_ID 16 31 ixD2F5_PCIE_TLP_PREFIX_LOG0 2 0x6000062 1 0 4294967295 TLP_PREFIX 0 31 ixD2F5_PCIE_TLP_PREFIX_LOG1 2 0x6000063 1 0 4294967295 TLP_PREFIX 0 31 ixD2F5_PCIE_TLP_PREFIX_LOG2 2 0x6000064 1 0 4294967295 TLP_PREFIX 0 31 ixD2F5_PCIE_TLP_PREFIX_LOG3 2 0x6000065 1 0 4294967295 TLP_PREFIX 0 31 ixD2F5_PCIE_SECONDARY_ENH_CAP_LIST 2 0x600009c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F5_PCIE_LINK_CNTL3 2 0x600009d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 ixD2F5_PCIE_LANE_ERROR_STATUS 2 0x600009e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 ixD2F5_PCIE_LANE_0_EQUALIZATION_CNTL 2 0x600009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F5_PCIE_LANE_1_EQUALIZATION_CNTL 2 0x600009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F5_PCIE_LANE_2_EQUALIZATION_CNTL 2 0x60000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F5_PCIE_LANE_3_EQUALIZATION_CNTL 2 0x60000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F5_PCIE_LANE_4_EQUALIZATION_CNTL 2 0x60000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F5_PCIE_LANE_5_EQUALIZATION_CNTL 2 0x60000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F5_PCIE_LANE_6_EQUALIZATION_CNTL 2 0x60000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F5_PCIE_LANE_7_EQUALIZATION_CNTL 2 0x60000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F5_PCIE_LANE_8_EQUALIZATION_CNTL 2 0x60000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F5_PCIE_LANE_9_EQUALIZATION_CNTL 2 0x60000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F5_PCIE_LANE_10_EQUALIZATION_CNTL 2 0x60000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F5_PCIE_LANE_11_EQUALIZATION_CNTL 2 0x60000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F5_PCIE_LANE_12_EQUALIZATION_CNTL 2 0x60000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F5_PCIE_LANE_13_EQUALIZATION_CNTL 2 0x60000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F5_PCIE_LANE_14_EQUALIZATION_CNTL 2 0x60000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD2F5_PCIE_LANE_15_EQUALIZATION_CNTL 2 0x60000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD2F5_PCIE_ACS_ENH_CAP_LIST 2 0x60000a8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F5_PCIE_ACS_CAP 2 0x60000a9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 ixD2F5_PCIE_ACS_CNTL 2 0x60000a9 7 0 4294967295 SOURCE_VALIDATION_EN 16 16 TRANSLATION_BLOCKING_EN 17 17 P2P_REQUEST_REDIRECT_EN 18 18 P2P_COMPLETION_REDIRECT_EN 19 19 UPSTREAM_FORWARDING_EN 20 20 P2P_EGRESS_CONTROL_EN 21 21 DIRECT_TRANSLATED_P2P_EN 22 22 ixD2F5_PCIE_MC_ENH_CAP_LIST 2 0x60000bc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD2F5_PCIE_MC_CAP 2 0x60000bd 2 0 4294967295 MC_MAX_GROUP 0 5 MC_ECRC_REGEN_SUPP 15 15 ixD2F5_PCIE_MC_CNTL 2 0x60000bd 2 0 4294967295 MC_NUM_GROUP 16 21 MC_ENABLE 31 31 ixD2F5_PCIE_MC_ADDR0 2 0x60000be 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 ixD2F5_PCIE_MC_ADDR1 2 0x60000bf 1 0 4294967295 MC_BASE_ADDR_1 0 31 ixD2F5_PCIE_MC_RCV0 2 0x60000c0 1 0 4294967295 MC_RECEIVE_0 0 31 ixD2F5_PCIE_MC_RCV1 2 0x60000c1 1 0 4294967295 MC_RECEIVE_1 0 31 ixD2F5_PCIE_MC_BLOCK_ALL0 2 0x60000c2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 ixD2F5_PCIE_MC_BLOCK_ALL1 2 0x60000c3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 ixD2F5_PCIE_MC_BLOCK_UNTRANSLATED_0 2 0x60000c4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 ixD2F5_PCIE_MC_BLOCK_UNTRANSLATED_1 2 0x60000c5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 ixD2F5_PCIE_MC_OVERLAY_BAR0 2 0x60000c6 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 ixD2F5_PCIE_MC_OVERLAY_BAR1 2 0x60000c7 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 ixD3F1_PCIE_PORT_INDEX 2 0x7000038 1 0 4294967295 PCIE_INDEX 0 7 ixD3F1_PCIE_PORT_DATA 2 0x7000039 1 0 4294967295 PCIE_DATA 0 31 ixD3F1_PCIEP_RESERVED 2 0x0 1 0 4294967295 PCIEP_RESERVED 0 31 ixD3F1_PCIEP_SCRATCH 2 0x1 1 0 4294967295 PCIEP_SCRATCH 0 31 ixD3F1_PCIEP_HW_DEBUG 2 0x2 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixD3F1_PCIEP_PORT_CNTL 2 0x10 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixD3F1_PCIE_TX_CNTL 2 0x20 8 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 ixD3F1_PCIE_TX_REQUESTER_ID 2 0x21 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixD3F1_PCIE_TX_VENDOR_SPECIFIC 2 0x22 1 0 4294967295 TX_VENDOR_DATA 0 23 ixD3F1_PCIE_TX_REQUEST_NUM_CNTL 2 0x23 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixD3F1_PCIE_TX_SEQ 2 0x24 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixD3F1_PCIE_TX_REPLAY 2 0x25 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixD3F1_PCIE_TX_ACK_LATENCY_LIMIT 2 0x26 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixD3F1_PCIE_TX_CREDITS_ADVT_P 2 0x30 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixD3F1_PCIE_TX_CREDITS_ADVT_NP 2 0x31 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixD3F1_PCIE_TX_CREDITS_ADVT_CPL 2 0x32 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixD3F1_PCIE_TX_CREDITS_INIT_P 2 0x33 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixD3F1_PCIE_TX_CREDITS_INIT_NP 2 0x34 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixD3F1_PCIE_TX_CREDITS_INIT_CPL 2 0x35 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixD3F1_PCIE_TX_CREDITS_STATUS 2 0x36 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixD3F1_PCIE_TX_CREDITS_FCU_THRESHOLD 2 0x37 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixD3F1_PCIE_P_PORT_LANE_STATUS 2 0x50 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixD3F1_PCIE_FC_P 2 0x60 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixD3F1_PCIE_FC_NP 2 0x61 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixD3F1_PCIE_FC_CPL 2 0x62 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixD3F1_PCIE_ERR_CNTL 2 0x6a 14 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixD3F1_PCIE_RX_CNTL 2 0x70 26 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 RX_RCB_FLR_TIMEOUT_DIS 27 27 ixD3F1_PCIE_RX_EXPECTED_SEQNUM 2 0x71 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixD3F1_PCIE_RX_VENDOR_SPECIFIC 2 0x72 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixD3F1_PCIE_RX_CNTL3 2 0x74 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixD3F1_PCIE_RX_CREDITS_ALLOCATED_P 2 0x80 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixD3F1_PCIE_RX_CREDITS_ALLOCATED_NP 2 0x81 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixD3F1_PCIE_RX_CREDITS_ALLOCATED_CPL 2 0x82 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixD3F1_PCIEP_ERROR_INJECT_PHYSICAL 2 0x83 12 0 4294967295 ERROR_INJECT_PL_LANE_ERR 0 1 ERROR_INJECT_PL_FRAMING_ERR 2 3 ERROR_INJECT_PL_BAD_PARITY_IN_SKP 4 5 ERROR_INJECT_PL_BAD_LFSR_IN_SKP 6 7 ERROR_INJECT_PL_LOOPBACK_UFLOW 8 9 ERROR_INJECT_PL_LOOPBACK_OFLOW 10 11 ERROR_INJECT_PL_DESKEW_ERR 12 13 ERROR_INJECT_PL_8B10B_DISPARITY_ERR 14 15 ERROR_INJECT_PL_8B10B_DECODE_ERR 16 17 ERROR_INJECT_PL_SKP_OS_ERROR 18 19 ERROR_INJECT_PL_INV_OS_IDENTIFIER 20 21 ERROR_INJECT_PL_BAD_SYNC_HEADER 22 23 ixD3F1_PCIEP_ERROR_INJECT_TRANSACTION 2 0x84 10 0 4294967295 ERROR_INJECT_TL_FLOW_CTL_ERR 0 1 ERROR_INJECT_TL_REPLAY_NUM_ROLLOVER 2 3 ERROR_INJECT_TL_BAD_DLLP 4 5 ERROR_INJECT_TL_BAD_TLP 6 7 ERROR_INJECT_TL_UNSUPPORTED_REQ 8 9 ERROR_INJECT_TL_ECRC_ERROR 10 11 ERROR_INJECT_TL_MALFORMED_TLP 12 13 ERROR_INJECT_TL_UNEXPECTED_CMPLT 14 15 ERROR_INJECT_TL_COMPLETER_ABORT 16 17 ERROR_INJECT_TL_COMPLETION_TIMEOUT 18 19 ixD3F1_PCIE_LC_CNTL 2 0xa0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixD3F1_PCIE_LC_CNTL2 2 0xb1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixD3F1_PCIE_LC_CNTL3 2 0xb5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixD3F1_PCIE_LC_CNTL4 2 0xb6 22 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_DIS_CONTIG_END_SET_CHECK 2 2 LC_DIS_ASPM_L1_IN_SPEED_CHANGE 3 3 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixD3F1_PCIE_LC_CNTL5 2 0xb7 5 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 LC_DSC_EQ_FS_LF_INVALID_TO_PRESETS 24 24 ixD3F1_PCIE_LC_CNTL6 2 0xbb 3 0 4294967295 LC_SPC_MODE_2P5GT 0 0 LC_SPC_MODE_5GT 2 2 LC_SPC_MODE_8GT 4 4 ixD3F1_PCIE_LC_BW_CHANGE_CNTL 2 0xb2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixD3F1_PCIE_LC_TRAINING_CNTL 2 0xa1 25 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_WAIT_FOR_SETS_IN_RCFG 14 14 LC_HOT_RESET_QUICK_EXIT_EN 15 15 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixD3F1_PCIE_LC_LINK_WIDTH_CNTL 2 0xa2 24 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 LC_MULT_REVERSE_ATTEMP_EN 24 24 LC_RESET_TSX_CNT_IN_RCONFIG_EN 25 25 LC_WAIT_FOR_L_IDLE_IN_R_IDLE 26 26 LC_WAIT_FOR_NON_EI_ON_RXL0S_EXIT 27 27 LC_HOLD_EI_FOR_RSPEED_CMD_CHANGE 28 28 LC_BYPASS_RXL0S_ON_SHORT_EI 29 29 ixD3F1_PCIE_LC_N_FTS_CNTL 2 0xa3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixD3F1_PCIE_LC_SPEED_CNTL 2 0xa4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixD3F1_PCIE_LC_CDR_CNTL 2 0xb3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixD3F1_PCIE_LC_LANE_CNTL 2 0xb4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixD3F1_PCIE_LC_FORCE_COEFF 2 0xb8 6 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 LC_PRESET_10_EN 20 20 ixD3F1_PCIE_LC_BEST_EQ_SETTINGS 2 0xb9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixD3F1_PCIE_LC_FORCE_EQ_REQ_COEFF 2 0xba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixD3F1_PCIE_LC_STATE0 2 0xa5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixD3F1_PCIE_LC_STATE1 2 0xa6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixD3F1_PCIE_LC_STATE2 2 0xa7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixD3F1_PCIE_LC_STATE3 2 0xa8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixD3F1_PCIE_LC_STATE4 2 0xa9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixD3F1_PCIE_LC_STATE5 2 0xaa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixD3F1_PCIEP_STRAP_LC 2 0xc0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixD3F1_PCIEP_STRAP_MISC 2 0xc1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixD3F1_PCIEP_BCH_ECC_CNTL 2 0xd0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 ixD3F1_PCIEP_HPGI_PRIVATE 2 0xd2 2 0 4294967295 PRESENCE_DETECT_CHANGED_PRIVATE 3 3 PRESENCE_DETECT_STATE_PRIVATE 6 6 ixD3F1_PCIEP_HPGI 2 0xda 11 0 4294967295 REG_HPGI_ASSERT_TO_SMI_EN 0 0 REG_HPGI_ASSERT_TO_SCI_EN 1 1 REG_HPGI_DEASSERT_TO_SMI_EN 2 2 REG_HPGI_DEASSERT_TO_SCI_EN 3 3 REG_HPGI_HOOK 7 7 HPGI_REG_ASSERT_TO_SMI_STATUS 8 8 HPGI_REG_ASSERT_TO_SCI_STATUS 9 9 HPGI_REG_DEASSERT_TO_SMI_STATUS 10 10 HPGI_REG_DEASSERT_TO_SCI_STATUS 11 11 HPGI_REG_PRESENCE_DETECT_STATE_CHANGE_STATUS 15 15 REG_HPGI_PRESENCE_DETECT_STATE_CHANGE_EN 16 16 ixD3F1_VENDOR_ID 2 0x7000000 1 0 4294967295 VENDOR_ID 0 15 ixD3F1_DEVICE_ID 2 0x7000000 1 0 4294967295 DEVICE_ID 16 31 ixD3F1_COMMAND 2 0x7000001 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 ixD3F1_STATUS 2 0x7000001 11 0 4294967295 INT_STATUS 19 19 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 SIGNALED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD3F1_REVISION_ID 2 0x7000002 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 ixD3F1_PROG_INTERFACE 2 0x7000002 1 0 4294967295 PROG_INTERFACE 8 15 ixD3F1_SUB_CLASS 2 0x7000002 1 0 4294967295 SUB_CLASS 16 23 ixD3F1_BASE_CLASS 2 0x7000002 1 0 4294967295 BASE_CLASS 24 31 ixD3F1_CACHE_LINE 2 0x7000003 1 0 4294967295 CACHE_LINE_SIZE 0 7 ixD3F1_LATENCY 2 0x7000003 1 0 4294967295 LATENCY_TIMER 8 15 ixD3F1_HEADER 2 0x7000003 2 0 4294967295 HEADER_TYPE 16 22 DEVICE_TYPE 23 23 ixD3F1_BIST 2 0x7000003 3 0 4294967295 BIST_COMP 24 27 BIST_STRT 30 30 BIST_CAP 31 31 ixD3F1_SUB_BUS_NUMBER_LATENCY 2 0x7000006 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 ixD3F1_IO_BASE_LIMIT 2 0x7000007 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 ixD3F1_SECONDARY_STATUS 2 0x7000007 10 0 4294967295 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 RECEIVED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD3F1_MEM_BASE_LIMIT 2 0x7000008 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 ixD3F1_PREF_BASE_LIMIT 2 0x7000009 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 ixD3F1_PREF_BASE_UPPER 2 0x700000a 1 0 4294967295 PREF_BASE_UPPER 0 31 ixD3F1_PREF_LIMIT_UPPER 2 0x700000b 1 0 4294967295 PREF_LIMIT_UPPER 0 31 ixD3F1_IO_BASE_LIMIT_HI 2 0x700000c 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 ixD3F1_IRQ_BRIDGE_CNTL 2 0x700000f 8 0 4294967295 PARITY_RESPONSE_EN 16 16 SERR_EN 17 17 ISA_EN 18 18 VGA_EN 19 19 VGA_DEC 20 20 MASTER_ABORT_MODE 21 21 SECONDARY_BUS_RESET 22 22 FAST_B2B_EN 23 23 ixD3F1_CAP_PTR 2 0x700000d 1 0 4294967295 CAP_PTR 0 7 ixD3F1_INTERRUPT_LINE 2 0x700000f 1 0 4294967295 INTERRUPT_LINE 0 7 ixD3F1_INTERRUPT_PIN 2 0x700000f 1 0 4294967295 INTERRUPT_PIN 8 15 ixD3F1_EXT_BRIDGE_CNTL 2 0x7000010 1 0 4294967295 IO_PORT_80_EN 0 0 ixD3F1_PMI_CAP_LIST 2 0x7000014 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F1_PMI_CAP 2 0x7000014 7 0 4294967295 VERSION 16 18 PME_CLOCK 19 19 DEV_SPECIFIC_INIT 21 21 AUX_CURRENT 22 24 D1_SUPPORT 25 25 D2_SUPPORT 26 26 PME_SUPPORT 27 31 ixD3F1_PMI_STATUS_CNTL 2 0x7000015 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 ixD3F1_PCIE_CAP_LIST 2 0x7000016 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F1_PCIE_CAP 2 0x7000016 4 0 4294967295 VERSION 16 19 DEVICE_TYPE 20 23 SLOT_IMPLEMENTED 24 24 INT_MESSAGE_NUM 25 29 ixD3F1_DEVICE_CAP 2 0x7000017 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 ixD3F1_DEVICE_CNTL 2 0x7000018 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 ixD3F1_DEVICE_STATUS 2 0x7000018 6 0 4294967295 CORR_ERR 16 16 NON_FATAL_ERR 17 17 FATAL_ERR 18 18 USR_DETECTED 19 19 AUX_PWR 20 20 TRANSACTIONS_PEND 21 21 ixD3F1_LINK_CAP 2 0x7000019 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 ixD3F1_LINK_CNTL 2 0x700001a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 ixD3F1_LINK_STATUS 2 0x700001a 7 0 4294967295 CURRENT_LINK_SPEED 16 19 NEGOTIATED_LINK_WIDTH 20 25 LINK_TRAINING 27 27 SLOT_CLOCK_CFG 28 28 DL_ACTIVE 29 29 LINK_BW_MANAGEMENT_STATUS 30 30 LINK_AUTONOMOUS_BW_STATUS 31 31 ixD3F1_SLOT_CAP 2 0x700001b 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 ixD3F1_SLOT_CNTL 2 0x700001c 11 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 ixD3F1_SLOT_STATUS 2 0x700001c 9 0 4294967295 ATTN_BUTTON_PRESSED 16 16 PWR_FAULT_DETECTED 17 17 MRL_SENSOR_CHANGED 18 18 PRESENCE_DETECT_CHANGED 19 19 COMMAND_COMPLETED 20 20 MRL_SENSOR_STATE 21 21 PRESENCE_DETECT_STATE 22 22 ELECTROMECH_INTERLOCK_STATUS 23 23 DL_STATE_CHANGED 24 24 ixD3F1_ROOT_CNTL 2 0x700001d 5 0 4294967295 SERR_ON_CORR_ERR_EN 0 0 SERR_ON_NONFATAL_ERR_EN 1 1 SERR_ON_FATAL_ERR_EN 2 2 PM_INTERRUPT_EN 3 3 CRS_SOFTWARE_VISIBILITY_EN 4 4 ixD3F1_ROOT_CAP 2 0x700001d 1 0 4294967295 CRS_SOFTWARE_VISIBILITY 16 16 ixD3F1_ROOT_STATUS 2 0x700001e 3 0 4294967295 PME_REQUESTOR_ID 0 15 PME_STATUS 16 16 PME_PENDING 17 17 ixD3F1_DEVICE_CAP2 2 0x700001f 14 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 ixD3F1_DEVICE_CNTL2 2 0x7000020 10 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 ixD3F1_DEVICE_STATUS2 2 0x7000020 1 0 4294967295 RESERVED 16 31 ixD3F1_LINK_CAP2 2 0x7000021 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 ixD3F1_LINK_CNTL2 2 0x7000022 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 ixD3F1_LINK_STATUS2 2 0x7000022 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 16 16 EQUALIZATION_COMPLETE 17 17 EQUALIZATION_PHASE1_SUCCESS 18 18 EQUALIZATION_PHASE2_SUCCESS 19 19 EQUALIZATION_PHASE3_SUCCESS 20 20 LINK_EQUALIZATION_REQUEST 21 21 ixD3F1_SLOT_CAP2 2 0x7000023 1 0 4294967295 RESERVED 0 31 ixD3F1_SLOT_CNTL2 2 0x7000024 1 0 4294967295 RESERVED 0 15 ixD3F1_SLOT_STATUS2 2 0x7000024 1 0 4294967295 RESERVED 16 31 ixD3F1_MSI_CAP_LIST 2 0x7000028 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F1_MSI_MSG_CNTL 2 0x7000028 5 0 4294967295 MSI_EN 16 16 MSI_MULTI_CAP 17 19 MSI_MULTI_EN 20 22 MSI_64BIT 23 23 MSI_PERVECTOR_MASKING_CAP 24 24 ixD3F1_MSI_MSG_ADDR_LO 2 0x7000029 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 ixD3F1_MSI_MSG_ADDR_HI 2 0x700002a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 ixD3F1_MSI_MSG_DATA_64 2 0x700002b 1 0 4294967295 MSI_DATA_64 0 15 ixD3F1_MSI_MSG_DATA 2 0x700002a 1 0 4294967295 MSI_DATA 0 15 ixD3F1_SSID_CAP_LIST 2 0x7000030 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F1_SSID_CAP 2 0x7000031 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 ixD3F1_MSI_MAP_CAP_LIST 2 0x7000032 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F1_MSI_MAP_CAP 2 0x7000032 3 0 4294967295 EN 16 16 FIXD 17 17 CAP_TYPE 27 31 ixD3F1_MSI_MAP_ADDR_LO 2 0x7000033 1 0 4294967295 MSI_MAP_ADDR_LO 20 31 ixD3F1_MSI_MAP_ADDR_HI 2 0x7000034 1 0 4294967295 MSI_MAP_ADDR_HI 0 31 ixD3F1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 2 0x7000040 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F1_PCIE_VENDOR_SPECIFIC_HDR 2 0x7000041 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 ixD3F1_PCIE_VENDOR_SPECIFIC1 2 0x7000042 1 0 4294967295 SCRATCH 0 31 ixD3F1_PCIE_VENDOR_SPECIFIC2 2 0x7000043 1 0 4294967295 SCRATCH 0 31 ixD3F1_PCIE_VC_ENH_CAP_LIST 2 0x7000044 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F1_PCIE_PORT_VC_CAP_REG1 2 0x7000045 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 ixD3F1_PCIE_PORT_VC_CAP_REG2 2 0x7000046 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 ixD3F1_PCIE_PORT_VC_CNTL 2 0x7000047 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 ixD3F1_PCIE_PORT_VC_STATUS 2 0x7000047 1 0 4294967295 VC_ARB_TABLE_STATUS 16 16 ixD3F1_PCIE_VC0_RESOURCE_CAP 2 0x7000048 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD3F1_PCIE_VC0_RESOURCE_CNTL 2 0x7000049 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD3F1_PCIE_VC0_RESOURCE_STATUS 2 0x700004a 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD3F1_PCIE_VC1_RESOURCE_CAP 2 0x700004b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD3F1_PCIE_VC1_RESOURCE_CNTL 2 0x700004c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD3F1_PCIE_VC1_RESOURCE_STATUS 2 0x700004d 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD3F1_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 2 0x7000050 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F1_PCIE_DEV_SERIAL_NUM_DW1 2 0x7000051 1 0 4294967295 SERIAL_NUMBER_LO 0 31 ixD3F1_PCIE_DEV_SERIAL_NUM_DW2 2 0x7000052 1 0 4294967295 SERIAL_NUMBER_HI 0 31 ixD3F1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 2 0x7000054 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F1_PCIE_UNCORR_ERR_STATUS 2 0x7000055 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 ixD3F1_PCIE_UNCORR_ERR_MASK 2 0x7000056 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 ixD3F1_PCIE_UNCORR_ERR_SEVERITY 2 0x7000057 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 ixD3F1_PCIE_CORR_ERR_STATUS 2 0x7000058 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 ixD3F1_PCIE_CORR_ERR_MASK 2 0x7000059 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 ixD3F1_PCIE_ADV_ERR_CAP_CNTL 2 0x700005a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 ixD3F1_PCIE_HDR_LOG0 2 0x700005b 1 0 4294967295 TLP_HDR 0 31 ixD3F1_PCIE_HDR_LOG1 2 0x700005c 1 0 4294967295 TLP_HDR 0 31 ixD3F1_PCIE_HDR_LOG2 2 0x700005d 1 0 4294967295 TLP_HDR 0 31 ixD3F1_PCIE_HDR_LOG3 2 0x700005e 1 0 4294967295 TLP_HDR 0 31 ixD3F1_PCIE_ROOT_ERR_CMD 2 0x700005f 3 0 4294967295 CORR_ERR_REP_EN 0 0 NONFATAL_ERR_REP_EN 1 1 FATAL_ERR_REP_EN 2 2 ixD3F1_PCIE_ROOT_ERR_STATUS 2 0x7000060 8 0 4294967295 ERR_CORR_RCVD 0 0 MULT_ERR_CORR_RCVD 1 1 ERR_FATAL_NONFATAL_RCVD 2 2 MULT_ERR_FATAL_NONFATAL_RCVD 3 3 FIRST_UNCORRECTABLE_FATAL 4 4 NONFATAL_ERROR_MSG_RCVD 5 5 FATAL_ERROR_MSG_RCVD 6 6 ADV_ERR_INT_MSG_NUM 27 31 ixD3F1_PCIE_ERR_SRC_ID 2 0x7000061 2 0 4294967295 ERR_CORR_SRC_ID 0 15 ERR_FATAL_NONFATAL_SRC_ID 16 31 ixD3F1_PCIE_TLP_PREFIX_LOG0 2 0x7000062 1 0 4294967295 TLP_PREFIX 0 31 ixD3F1_PCIE_TLP_PREFIX_LOG1 2 0x7000063 1 0 4294967295 TLP_PREFIX 0 31 ixD3F1_PCIE_TLP_PREFIX_LOG2 2 0x7000064 1 0 4294967295 TLP_PREFIX 0 31 ixD3F1_PCIE_TLP_PREFIX_LOG3 2 0x7000065 1 0 4294967295 TLP_PREFIX 0 31 ixD3F1_PCIE_SECONDARY_ENH_CAP_LIST 2 0x700009c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F1_PCIE_LINK_CNTL3 2 0x700009d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 ixD3F1_PCIE_LANE_ERROR_STATUS 2 0x700009e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 ixD3F1_PCIE_LANE_0_EQUALIZATION_CNTL 2 0x700009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F1_PCIE_LANE_1_EQUALIZATION_CNTL 2 0x700009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F1_PCIE_LANE_2_EQUALIZATION_CNTL 2 0x70000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F1_PCIE_LANE_3_EQUALIZATION_CNTL 2 0x70000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F1_PCIE_LANE_4_EQUALIZATION_CNTL 2 0x70000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F1_PCIE_LANE_5_EQUALIZATION_CNTL 2 0x70000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F1_PCIE_LANE_6_EQUALIZATION_CNTL 2 0x70000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F1_PCIE_LANE_7_EQUALIZATION_CNTL 2 0x70000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F1_PCIE_LANE_8_EQUALIZATION_CNTL 2 0x70000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F1_PCIE_LANE_9_EQUALIZATION_CNTL 2 0x70000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F1_PCIE_LANE_10_EQUALIZATION_CNTL 2 0x70000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F1_PCIE_LANE_11_EQUALIZATION_CNTL 2 0x70000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F1_PCIE_LANE_12_EQUALIZATION_CNTL 2 0x70000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F1_PCIE_LANE_13_EQUALIZATION_CNTL 2 0x70000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F1_PCIE_LANE_14_EQUALIZATION_CNTL 2 0x70000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F1_PCIE_LANE_15_EQUALIZATION_CNTL 2 0x70000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F1_PCIE_ACS_ENH_CAP_LIST 2 0x70000a8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F1_PCIE_ACS_CAP 2 0x70000a9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 ixD3F1_PCIE_ACS_CNTL 2 0x70000a9 7 0 4294967295 SOURCE_VALIDATION_EN 16 16 TRANSLATION_BLOCKING_EN 17 17 P2P_REQUEST_REDIRECT_EN 18 18 P2P_COMPLETION_REDIRECT_EN 19 19 UPSTREAM_FORWARDING_EN 20 20 P2P_EGRESS_CONTROL_EN 21 21 DIRECT_TRANSLATED_P2P_EN 22 22 ixD3F1_PCIE_MC_ENH_CAP_LIST 2 0x70000bc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F1_PCIE_MC_CAP 2 0x70000bd 2 0 4294967295 MC_MAX_GROUP 0 5 MC_ECRC_REGEN_SUPP 15 15 ixD3F1_PCIE_MC_CNTL 2 0x70000bd 2 0 4294967295 MC_NUM_GROUP 16 21 MC_ENABLE 31 31 ixD3F1_PCIE_MC_ADDR0 2 0x70000be 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 ixD3F1_PCIE_MC_ADDR1 2 0x70000bf 1 0 4294967295 MC_BASE_ADDR_1 0 31 ixD3F1_PCIE_MC_RCV0 2 0x70000c0 1 0 4294967295 MC_RECEIVE_0 0 31 ixD3F1_PCIE_MC_RCV1 2 0x70000c1 1 0 4294967295 MC_RECEIVE_1 0 31 ixD3F1_PCIE_MC_BLOCK_ALL0 2 0x70000c2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 ixD3F1_PCIE_MC_BLOCK_ALL1 2 0x70000c3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 ixD3F1_PCIE_MC_BLOCK_UNTRANSLATED_0 2 0x70000c4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 ixD3F1_PCIE_MC_BLOCK_UNTRANSLATED_1 2 0x70000c5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 ixD3F1_PCIE_MC_OVERLAY_BAR0 2 0x70000c6 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 ixD3F1_PCIE_MC_OVERLAY_BAR1 2 0x70000c7 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 ixD3F2_PCIE_PORT_INDEX 2 0x8000038 1 0 4294967295 PCIE_INDEX 0 7 ixD3F2_PCIE_PORT_DATA 2 0x8000039 1 0 4294967295 PCIE_DATA 0 31 ixD3F2_PCIEP_RESERVED 2 0x0 1 0 4294967295 PCIEP_RESERVED 0 31 ixD3F2_PCIEP_SCRATCH 2 0x1 1 0 4294967295 PCIEP_SCRATCH 0 31 ixD3F2_PCIEP_HW_DEBUG 2 0x2 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixD3F2_PCIEP_PORT_CNTL 2 0x10 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixD3F2_PCIE_TX_CNTL 2 0x20 8 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 ixD3F2_PCIE_TX_REQUESTER_ID 2 0x21 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixD3F2_PCIE_TX_VENDOR_SPECIFIC 2 0x22 1 0 4294967295 TX_VENDOR_DATA 0 23 ixD3F2_PCIE_TX_REQUEST_NUM_CNTL 2 0x23 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixD3F2_PCIE_TX_SEQ 2 0x24 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixD3F2_PCIE_TX_REPLAY 2 0x25 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixD3F2_PCIE_TX_ACK_LATENCY_LIMIT 2 0x26 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixD3F2_PCIE_TX_CREDITS_ADVT_P 2 0x30 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixD3F2_PCIE_TX_CREDITS_ADVT_NP 2 0x31 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixD3F2_PCIE_TX_CREDITS_ADVT_CPL 2 0x32 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixD3F2_PCIE_TX_CREDITS_INIT_P 2 0x33 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixD3F2_PCIE_TX_CREDITS_INIT_NP 2 0x34 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixD3F2_PCIE_TX_CREDITS_INIT_CPL 2 0x35 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixD3F2_PCIE_TX_CREDITS_STATUS 2 0x36 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixD3F2_PCIE_TX_CREDITS_FCU_THRESHOLD 2 0x37 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixD3F2_PCIE_P_PORT_LANE_STATUS 2 0x50 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixD3F2_PCIE_FC_P 2 0x60 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixD3F2_PCIE_FC_NP 2 0x61 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixD3F2_PCIE_FC_CPL 2 0x62 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixD3F2_PCIE_ERR_CNTL 2 0x6a 14 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixD3F2_PCIE_RX_CNTL 2 0x70 26 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 RX_RCB_FLR_TIMEOUT_DIS 27 27 ixD3F2_PCIE_RX_EXPECTED_SEQNUM 2 0x71 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixD3F2_PCIE_RX_VENDOR_SPECIFIC 2 0x72 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixD3F2_PCIE_RX_CNTL3 2 0x74 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixD3F2_PCIE_RX_CREDITS_ALLOCATED_P 2 0x80 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixD3F2_PCIE_RX_CREDITS_ALLOCATED_NP 2 0x81 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixD3F2_PCIE_RX_CREDITS_ALLOCATED_CPL 2 0x82 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixD3F2_PCIEP_ERROR_INJECT_PHYSICAL 2 0x83 12 0 4294967295 ERROR_INJECT_PL_LANE_ERR 0 1 ERROR_INJECT_PL_FRAMING_ERR 2 3 ERROR_INJECT_PL_BAD_PARITY_IN_SKP 4 5 ERROR_INJECT_PL_BAD_LFSR_IN_SKP 6 7 ERROR_INJECT_PL_LOOPBACK_UFLOW 8 9 ERROR_INJECT_PL_LOOPBACK_OFLOW 10 11 ERROR_INJECT_PL_DESKEW_ERR 12 13 ERROR_INJECT_PL_8B10B_DISPARITY_ERR 14 15 ERROR_INJECT_PL_8B10B_DECODE_ERR 16 17 ERROR_INJECT_PL_SKP_OS_ERROR 18 19 ERROR_INJECT_PL_INV_OS_IDENTIFIER 20 21 ERROR_INJECT_PL_BAD_SYNC_HEADER 22 23 ixD3F2_PCIEP_ERROR_INJECT_TRANSACTION 2 0x84 10 0 4294967295 ERROR_INJECT_TL_FLOW_CTL_ERR 0 1 ERROR_INJECT_TL_REPLAY_NUM_ROLLOVER 2 3 ERROR_INJECT_TL_BAD_DLLP 4 5 ERROR_INJECT_TL_BAD_TLP 6 7 ERROR_INJECT_TL_UNSUPPORTED_REQ 8 9 ERROR_INJECT_TL_ECRC_ERROR 10 11 ERROR_INJECT_TL_MALFORMED_TLP 12 13 ERROR_INJECT_TL_UNEXPECTED_CMPLT 14 15 ERROR_INJECT_TL_COMPLETER_ABORT 16 17 ERROR_INJECT_TL_COMPLETION_TIMEOUT 18 19 ixD3F2_PCIE_LC_CNTL 2 0xa0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixD3F2_PCIE_LC_CNTL2 2 0xb1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixD3F2_PCIE_LC_CNTL3 2 0xb5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixD3F2_PCIE_LC_CNTL4 2 0xb6 22 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_DIS_CONTIG_END_SET_CHECK 2 2 LC_DIS_ASPM_L1_IN_SPEED_CHANGE 3 3 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixD3F2_PCIE_LC_CNTL5 2 0xb7 5 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 LC_DSC_EQ_FS_LF_INVALID_TO_PRESETS 24 24 ixD3F2_PCIE_LC_CNTL6 2 0xbb 3 0 4294967295 LC_SPC_MODE_2P5GT 0 0 LC_SPC_MODE_5GT 2 2 LC_SPC_MODE_8GT 4 4 ixD3F2_PCIE_LC_BW_CHANGE_CNTL 2 0xb2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixD3F2_PCIE_LC_TRAINING_CNTL 2 0xa1 25 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_WAIT_FOR_SETS_IN_RCFG 14 14 LC_HOT_RESET_QUICK_EXIT_EN 15 15 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixD3F2_PCIE_LC_LINK_WIDTH_CNTL 2 0xa2 24 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 LC_MULT_REVERSE_ATTEMP_EN 24 24 LC_RESET_TSX_CNT_IN_RCONFIG_EN 25 25 LC_WAIT_FOR_L_IDLE_IN_R_IDLE 26 26 LC_WAIT_FOR_NON_EI_ON_RXL0S_EXIT 27 27 LC_HOLD_EI_FOR_RSPEED_CMD_CHANGE 28 28 LC_BYPASS_RXL0S_ON_SHORT_EI 29 29 ixD3F2_PCIE_LC_N_FTS_CNTL 2 0xa3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixD3F2_PCIE_LC_SPEED_CNTL 2 0xa4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixD3F2_PCIE_LC_CDR_CNTL 2 0xb3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixD3F2_PCIE_LC_LANE_CNTL 2 0xb4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixD3F2_PCIE_LC_FORCE_COEFF 2 0xb8 6 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 LC_PRESET_10_EN 20 20 ixD3F2_PCIE_LC_BEST_EQ_SETTINGS 2 0xb9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixD3F2_PCIE_LC_FORCE_EQ_REQ_COEFF 2 0xba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixD3F2_PCIE_LC_STATE0 2 0xa5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixD3F2_PCIE_LC_STATE1 2 0xa6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixD3F2_PCIE_LC_STATE2 2 0xa7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixD3F2_PCIE_LC_STATE3 2 0xa8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixD3F2_PCIE_LC_STATE4 2 0xa9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixD3F2_PCIE_LC_STATE5 2 0xaa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixD3F2_PCIEP_STRAP_LC 2 0xc0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixD3F2_PCIEP_STRAP_MISC 2 0xc1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixD3F2_PCIEP_BCH_ECC_CNTL 2 0xd0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 ixD3F2_PCIEP_HPGI_PRIVATE 2 0xd2 2 0 4294967295 PRESENCE_DETECT_CHANGED_PRIVATE 3 3 PRESENCE_DETECT_STATE_PRIVATE 6 6 ixD3F2_PCIEP_HPGI 2 0xda 11 0 4294967295 REG_HPGI_ASSERT_TO_SMI_EN 0 0 REG_HPGI_ASSERT_TO_SCI_EN 1 1 REG_HPGI_DEASSERT_TO_SMI_EN 2 2 REG_HPGI_DEASSERT_TO_SCI_EN 3 3 REG_HPGI_HOOK 7 7 HPGI_REG_ASSERT_TO_SMI_STATUS 8 8 HPGI_REG_ASSERT_TO_SCI_STATUS 9 9 HPGI_REG_DEASSERT_TO_SMI_STATUS 10 10 HPGI_REG_DEASSERT_TO_SCI_STATUS 11 11 HPGI_REG_PRESENCE_DETECT_STATE_CHANGE_STATUS 15 15 REG_HPGI_PRESENCE_DETECT_STATE_CHANGE_EN 16 16 ixD3F2_VENDOR_ID 2 0x8000000 1 0 4294967295 VENDOR_ID 0 15 ixD3F2_DEVICE_ID 2 0x8000000 1 0 4294967295 DEVICE_ID 16 31 ixD3F2_COMMAND 2 0x8000001 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 ixD3F2_STATUS 2 0x8000001 11 0 4294967295 INT_STATUS 19 19 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 SIGNALED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD3F2_REVISION_ID 2 0x8000002 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 ixD3F2_PROG_INTERFACE 2 0x8000002 1 0 4294967295 PROG_INTERFACE 8 15 ixD3F2_SUB_CLASS 2 0x8000002 1 0 4294967295 SUB_CLASS 16 23 ixD3F2_BASE_CLASS 2 0x8000002 1 0 4294967295 BASE_CLASS 24 31 ixD3F2_CACHE_LINE 2 0x8000003 1 0 4294967295 CACHE_LINE_SIZE 0 7 ixD3F2_LATENCY 2 0x8000003 1 0 4294967295 LATENCY_TIMER 8 15 ixD3F2_HEADER 2 0x8000003 2 0 4294967295 HEADER_TYPE 16 22 DEVICE_TYPE 23 23 ixD3F2_BIST 2 0x8000003 3 0 4294967295 BIST_COMP 24 27 BIST_STRT 30 30 BIST_CAP 31 31 ixD3F2_SUB_BUS_NUMBER_LATENCY 2 0x8000006 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 ixD3F2_IO_BASE_LIMIT 2 0x8000007 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 ixD3F2_SECONDARY_STATUS 2 0x8000007 10 0 4294967295 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 RECEIVED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD3F2_MEM_BASE_LIMIT 2 0x8000008 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 ixD3F2_PREF_BASE_LIMIT 2 0x8000009 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 ixD3F2_PREF_BASE_UPPER 2 0x800000a 1 0 4294967295 PREF_BASE_UPPER 0 31 ixD3F2_PREF_LIMIT_UPPER 2 0x800000b 1 0 4294967295 PREF_LIMIT_UPPER 0 31 ixD3F2_IO_BASE_LIMIT_HI 2 0x800000c 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 ixD3F2_IRQ_BRIDGE_CNTL 2 0x800000f 8 0 4294967295 PARITY_RESPONSE_EN 16 16 SERR_EN 17 17 ISA_EN 18 18 VGA_EN 19 19 VGA_DEC 20 20 MASTER_ABORT_MODE 21 21 SECONDARY_BUS_RESET 22 22 FAST_B2B_EN 23 23 ixD3F2_CAP_PTR 2 0x800000d 1 0 4294967295 CAP_PTR 0 7 ixD3F2_INTERRUPT_LINE 2 0x800000f 1 0 4294967295 INTERRUPT_LINE 0 7 ixD3F2_INTERRUPT_PIN 2 0x800000f 1 0 4294967295 INTERRUPT_PIN 8 15 ixD3F2_EXT_BRIDGE_CNTL 2 0x8000010 1 0 4294967295 IO_PORT_80_EN 0 0 ixD3F2_PMI_CAP_LIST 2 0x8000014 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F2_PMI_CAP 2 0x8000014 7 0 4294967295 VERSION 16 18 PME_CLOCK 19 19 DEV_SPECIFIC_INIT 21 21 AUX_CURRENT 22 24 D1_SUPPORT 25 25 D2_SUPPORT 26 26 PME_SUPPORT 27 31 ixD3F2_PMI_STATUS_CNTL 2 0x8000015 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 ixD3F2_PCIE_CAP_LIST 2 0x8000016 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F2_PCIE_CAP 2 0x8000016 4 0 4294967295 VERSION 16 19 DEVICE_TYPE 20 23 SLOT_IMPLEMENTED 24 24 INT_MESSAGE_NUM 25 29 ixD3F2_DEVICE_CAP 2 0x8000017 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 ixD3F2_DEVICE_CNTL 2 0x8000018 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 ixD3F2_DEVICE_STATUS 2 0x8000018 6 0 4294967295 CORR_ERR 16 16 NON_FATAL_ERR 17 17 FATAL_ERR 18 18 USR_DETECTED 19 19 AUX_PWR 20 20 TRANSACTIONS_PEND 21 21 ixD3F2_LINK_CAP 2 0x8000019 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 ixD3F2_LINK_CNTL 2 0x800001a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 ixD3F2_LINK_STATUS 2 0x800001a 7 0 4294967295 CURRENT_LINK_SPEED 16 19 NEGOTIATED_LINK_WIDTH 20 25 LINK_TRAINING 27 27 SLOT_CLOCK_CFG 28 28 DL_ACTIVE 29 29 LINK_BW_MANAGEMENT_STATUS 30 30 LINK_AUTONOMOUS_BW_STATUS 31 31 ixD3F2_SLOT_CAP 2 0x800001b 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 ixD3F2_SLOT_CNTL 2 0x800001c 11 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 ixD3F2_SLOT_STATUS 2 0x800001c 9 0 4294967295 ATTN_BUTTON_PRESSED 16 16 PWR_FAULT_DETECTED 17 17 MRL_SENSOR_CHANGED 18 18 PRESENCE_DETECT_CHANGED 19 19 COMMAND_COMPLETED 20 20 MRL_SENSOR_STATE 21 21 PRESENCE_DETECT_STATE 22 22 ELECTROMECH_INTERLOCK_STATUS 23 23 DL_STATE_CHANGED 24 24 ixD3F2_ROOT_CNTL 2 0x800001d 5 0 4294967295 SERR_ON_CORR_ERR_EN 0 0 SERR_ON_NONFATAL_ERR_EN 1 1 SERR_ON_FATAL_ERR_EN 2 2 PM_INTERRUPT_EN 3 3 CRS_SOFTWARE_VISIBILITY_EN 4 4 ixD3F2_ROOT_CAP 2 0x800001d 1 0 4294967295 CRS_SOFTWARE_VISIBILITY 16 16 ixD3F2_ROOT_STATUS 2 0x800001e 3 0 4294967295 PME_REQUESTOR_ID 0 15 PME_STATUS 16 16 PME_PENDING 17 17 ixD3F2_DEVICE_CAP2 2 0x800001f 14 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 ixD3F2_DEVICE_CNTL2 2 0x8000020 10 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 ixD3F2_DEVICE_STATUS2 2 0x8000020 1 0 4294967295 RESERVED 16 31 ixD3F2_LINK_CAP2 2 0x8000021 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 ixD3F2_LINK_CNTL2 2 0x8000022 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 ixD3F2_LINK_STATUS2 2 0x8000022 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 16 16 EQUALIZATION_COMPLETE 17 17 EQUALIZATION_PHASE1_SUCCESS 18 18 EQUALIZATION_PHASE2_SUCCESS 19 19 EQUALIZATION_PHASE3_SUCCESS 20 20 LINK_EQUALIZATION_REQUEST 21 21 ixD3F2_SLOT_CAP2 2 0x8000023 1 0 4294967295 RESERVED 0 31 ixD3F2_SLOT_CNTL2 2 0x8000024 1 0 4294967295 RESERVED 0 15 ixD3F2_SLOT_STATUS2 2 0x8000024 1 0 4294967295 RESERVED 16 31 ixD3F2_MSI_CAP_LIST 2 0x8000028 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F2_MSI_MSG_CNTL 2 0x8000028 5 0 4294967295 MSI_EN 16 16 MSI_MULTI_CAP 17 19 MSI_MULTI_EN 20 22 MSI_64BIT 23 23 MSI_PERVECTOR_MASKING_CAP 24 24 ixD3F2_MSI_MSG_ADDR_LO 2 0x8000029 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 ixD3F2_MSI_MSG_ADDR_HI 2 0x800002a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 ixD3F2_MSI_MSG_DATA_64 2 0x800002b 1 0 4294967295 MSI_DATA_64 0 15 ixD3F2_MSI_MSG_DATA 2 0x800002a 1 0 4294967295 MSI_DATA 0 15 ixD3F2_SSID_CAP_LIST 2 0x8000030 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F2_SSID_CAP 2 0x8000031 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 ixD3F2_MSI_MAP_CAP_LIST 2 0x8000032 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F2_MSI_MAP_CAP 2 0x8000032 3 0 4294967295 EN 16 16 FIXD 17 17 CAP_TYPE 27 31 ixD3F2_MSI_MAP_ADDR_LO 2 0x8000033 1 0 4294967295 MSI_MAP_ADDR_LO 20 31 ixD3F2_MSI_MAP_ADDR_HI 2 0x8000034 1 0 4294967295 MSI_MAP_ADDR_HI 0 31 ixD3F2_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 2 0x8000040 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F2_PCIE_VENDOR_SPECIFIC_HDR 2 0x8000041 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 ixD3F2_PCIE_VENDOR_SPECIFIC1 2 0x8000042 1 0 4294967295 SCRATCH 0 31 ixD3F2_PCIE_VENDOR_SPECIFIC2 2 0x8000043 1 0 4294967295 SCRATCH 0 31 ixD3F2_PCIE_VC_ENH_CAP_LIST 2 0x8000044 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F2_PCIE_PORT_VC_CAP_REG1 2 0x8000045 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 ixD3F2_PCIE_PORT_VC_CAP_REG2 2 0x8000046 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 ixD3F2_PCIE_PORT_VC_CNTL 2 0x8000047 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 ixD3F2_PCIE_PORT_VC_STATUS 2 0x8000047 1 0 4294967295 VC_ARB_TABLE_STATUS 16 16 ixD3F2_PCIE_VC0_RESOURCE_CAP 2 0x8000048 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD3F2_PCIE_VC0_RESOURCE_CNTL 2 0x8000049 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD3F2_PCIE_VC0_RESOURCE_STATUS 2 0x800004a 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD3F2_PCIE_VC1_RESOURCE_CAP 2 0x800004b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD3F2_PCIE_VC1_RESOURCE_CNTL 2 0x800004c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD3F2_PCIE_VC1_RESOURCE_STATUS 2 0x800004d 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD3F2_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 2 0x8000050 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F2_PCIE_DEV_SERIAL_NUM_DW1 2 0x8000051 1 0 4294967295 SERIAL_NUMBER_LO 0 31 ixD3F2_PCIE_DEV_SERIAL_NUM_DW2 2 0x8000052 1 0 4294967295 SERIAL_NUMBER_HI 0 31 ixD3F2_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 2 0x8000054 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F2_PCIE_UNCORR_ERR_STATUS 2 0x8000055 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 ixD3F2_PCIE_UNCORR_ERR_MASK 2 0x8000056 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 ixD3F2_PCIE_UNCORR_ERR_SEVERITY 2 0x8000057 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 ixD3F2_PCIE_CORR_ERR_STATUS 2 0x8000058 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 ixD3F2_PCIE_CORR_ERR_MASK 2 0x8000059 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 ixD3F2_PCIE_ADV_ERR_CAP_CNTL 2 0x800005a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 ixD3F2_PCIE_HDR_LOG0 2 0x800005b 1 0 4294967295 TLP_HDR 0 31 ixD3F2_PCIE_HDR_LOG1 2 0x800005c 1 0 4294967295 TLP_HDR 0 31 ixD3F2_PCIE_HDR_LOG2 2 0x800005d 1 0 4294967295 TLP_HDR 0 31 ixD3F2_PCIE_HDR_LOG3 2 0x800005e 1 0 4294967295 TLP_HDR 0 31 ixD3F2_PCIE_ROOT_ERR_CMD 2 0x800005f 3 0 4294967295 CORR_ERR_REP_EN 0 0 NONFATAL_ERR_REP_EN 1 1 FATAL_ERR_REP_EN 2 2 ixD3F2_PCIE_ROOT_ERR_STATUS 2 0x8000060 8 0 4294967295 ERR_CORR_RCVD 0 0 MULT_ERR_CORR_RCVD 1 1 ERR_FATAL_NONFATAL_RCVD 2 2 MULT_ERR_FATAL_NONFATAL_RCVD 3 3 FIRST_UNCORRECTABLE_FATAL 4 4 NONFATAL_ERROR_MSG_RCVD 5 5 FATAL_ERROR_MSG_RCVD 6 6 ADV_ERR_INT_MSG_NUM 27 31 ixD3F2_PCIE_ERR_SRC_ID 2 0x8000061 2 0 4294967295 ERR_CORR_SRC_ID 0 15 ERR_FATAL_NONFATAL_SRC_ID 16 31 ixD3F2_PCIE_TLP_PREFIX_LOG0 2 0x8000062 1 0 4294967295 TLP_PREFIX 0 31 ixD3F2_PCIE_TLP_PREFIX_LOG1 2 0x8000063 1 0 4294967295 TLP_PREFIX 0 31 ixD3F2_PCIE_TLP_PREFIX_LOG2 2 0x8000064 1 0 4294967295 TLP_PREFIX 0 31 ixD3F2_PCIE_TLP_PREFIX_LOG3 2 0x8000065 1 0 4294967295 TLP_PREFIX 0 31 ixD3F2_PCIE_SECONDARY_ENH_CAP_LIST 2 0x800009c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F2_PCIE_LINK_CNTL3 2 0x800009d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 ixD3F2_PCIE_LANE_ERROR_STATUS 2 0x800009e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 ixD3F2_PCIE_LANE_0_EQUALIZATION_CNTL 2 0x800009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F2_PCIE_LANE_1_EQUALIZATION_CNTL 2 0x800009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F2_PCIE_LANE_2_EQUALIZATION_CNTL 2 0x80000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F2_PCIE_LANE_3_EQUALIZATION_CNTL 2 0x80000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F2_PCIE_LANE_4_EQUALIZATION_CNTL 2 0x80000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F2_PCIE_LANE_5_EQUALIZATION_CNTL 2 0x80000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F2_PCIE_LANE_6_EQUALIZATION_CNTL 2 0x80000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F2_PCIE_LANE_7_EQUALIZATION_CNTL 2 0x80000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F2_PCIE_LANE_8_EQUALIZATION_CNTL 2 0x80000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F2_PCIE_LANE_9_EQUALIZATION_CNTL 2 0x80000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F2_PCIE_LANE_10_EQUALIZATION_CNTL 2 0x80000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F2_PCIE_LANE_11_EQUALIZATION_CNTL 2 0x80000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F2_PCIE_LANE_12_EQUALIZATION_CNTL 2 0x80000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F2_PCIE_LANE_13_EQUALIZATION_CNTL 2 0x80000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F2_PCIE_LANE_14_EQUALIZATION_CNTL 2 0x80000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F2_PCIE_LANE_15_EQUALIZATION_CNTL 2 0x80000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F2_PCIE_ACS_ENH_CAP_LIST 2 0x80000a8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F2_PCIE_ACS_CAP 2 0x80000a9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 ixD3F2_PCIE_ACS_CNTL 2 0x80000a9 7 0 4294967295 SOURCE_VALIDATION_EN 16 16 TRANSLATION_BLOCKING_EN 17 17 P2P_REQUEST_REDIRECT_EN 18 18 P2P_COMPLETION_REDIRECT_EN 19 19 UPSTREAM_FORWARDING_EN 20 20 P2P_EGRESS_CONTROL_EN 21 21 DIRECT_TRANSLATED_P2P_EN 22 22 ixD3F2_PCIE_MC_ENH_CAP_LIST 2 0x80000bc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F2_PCIE_MC_CAP 2 0x80000bd 2 0 4294967295 MC_MAX_GROUP 0 5 MC_ECRC_REGEN_SUPP 15 15 ixD3F2_PCIE_MC_CNTL 2 0x80000bd 2 0 4294967295 MC_NUM_GROUP 16 21 MC_ENABLE 31 31 ixD3F2_PCIE_MC_ADDR0 2 0x80000be 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 ixD3F2_PCIE_MC_ADDR1 2 0x80000bf 1 0 4294967295 MC_BASE_ADDR_1 0 31 ixD3F2_PCIE_MC_RCV0 2 0x80000c0 1 0 4294967295 MC_RECEIVE_0 0 31 ixD3F2_PCIE_MC_RCV1 2 0x80000c1 1 0 4294967295 MC_RECEIVE_1 0 31 ixD3F2_PCIE_MC_BLOCK_ALL0 2 0x80000c2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 ixD3F2_PCIE_MC_BLOCK_ALL1 2 0x80000c3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 ixD3F2_PCIE_MC_BLOCK_UNTRANSLATED_0 2 0x80000c4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 ixD3F2_PCIE_MC_BLOCK_UNTRANSLATED_1 2 0x80000c5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 ixD3F2_PCIE_MC_OVERLAY_BAR0 2 0x80000c6 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 ixD3F2_PCIE_MC_OVERLAY_BAR1 2 0x80000c7 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 ixD3F3_PCIE_PORT_INDEX 2 0x9000038 1 0 4294967295 PCIE_INDEX 0 7 ixD3F3_PCIE_PORT_DATA 2 0x9000039 1 0 4294967295 PCIE_DATA 0 31 ixD3F3_PCIEP_RESERVED 2 0x0 1 0 4294967295 PCIEP_RESERVED 0 31 ixD3F3_PCIEP_SCRATCH 2 0x1 1 0 4294967295 PCIEP_SCRATCH 0 31 ixD3F3_PCIEP_HW_DEBUG 2 0x2 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixD3F3_PCIEP_PORT_CNTL 2 0x10 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixD3F3_PCIE_TX_CNTL 2 0x20 8 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 ixD3F3_PCIE_TX_REQUESTER_ID 2 0x21 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixD3F3_PCIE_TX_VENDOR_SPECIFIC 2 0x22 1 0 4294967295 TX_VENDOR_DATA 0 23 ixD3F3_PCIE_TX_REQUEST_NUM_CNTL 2 0x23 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixD3F3_PCIE_TX_SEQ 2 0x24 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixD3F3_PCIE_TX_REPLAY 2 0x25 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixD3F3_PCIE_TX_ACK_LATENCY_LIMIT 2 0x26 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixD3F3_PCIE_TX_CREDITS_ADVT_P 2 0x30 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixD3F3_PCIE_TX_CREDITS_ADVT_NP 2 0x31 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixD3F3_PCIE_TX_CREDITS_ADVT_CPL 2 0x32 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixD3F3_PCIE_TX_CREDITS_INIT_P 2 0x33 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixD3F3_PCIE_TX_CREDITS_INIT_NP 2 0x34 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixD3F3_PCIE_TX_CREDITS_INIT_CPL 2 0x35 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixD3F3_PCIE_TX_CREDITS_STATUS 2 0x36 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixD3F3_PCIE_TX_CREDITS_FCU_THRESHOLD 2 0x37 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixD3F3_PCIE_P_PORT_LANE_STATUS 2 0x50 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixD3F3_PCIE_FC_P 2 0x60 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixD3F3_PCIE_FC_NP 2 0x61 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixD3F3_PCIE_FC_CPL 2 0x62 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixD3F3_PCIE_ERR_CNTL 2 0x6a 14 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixD3F3_PCIE_RX_CNTL 2 0x70 26 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 RX_RCB_FLR_TIMEOUT_DIS 27 27 ixD3F3_PCIE_RX_EXPECTED_SEQNUM 2 0x71 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixD3F3_PCIE_RX_VENDOR_SPECIFIC 2 0x72 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixD3F3_PCIE_RX_CNTL3 2 0x74 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixD3F3_PCIE_RX_CREDITS_ALLOCATED_P 2 0x80 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixD3F3_PCIE_RX_CREDITS_ALLOCATED_NP 2 0x81 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixD3F3_PCIE_RX_CREDITS_ALLOCATED_CPL 2 0x82 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixD3F3_PCIEP_ERROR_INJECT_PHYSICAL 2 0x83 12 0 4294967295 ERROR_INJECT_PL_LANE_ERR 0 1 ERROR_INJECT_PL_FRAMING_ERR 2 3 ERROR_INJECT_PL_BAD_PARITY_IN_SKP 4 5 ERROR_INJECT_PL_BAD_LFSR_IN_SKP 6 7 ERROR_INJECT_PL_LOOPBACK_UFLOW 8 9 ERROR_INJECT_PL_LOOPBACK_OFLOW 10 11 ERROR_INJECT_PL_DESKEW_ERR 12 13 ERROR_INJECT_PL_8B10B_DISPARITY_ERR 14 15 ERROR_INJECT_PL_8B10B_DECODE_ERR 16 17 ERROR_INJECT_PL_SKP_OS_ERROR 18 19 ERROR_INJECT_PL_INV_OS_IDENTIFIER 20 21 ERROR_INJECT_PL_BAD_SYNC_HEADER 22 23 ixD3F3_PCIEP_ERROR_INJECT_TRANSACTION 2 0x84 10 0 4294967295 ERROR_INJECT_TL_FLOW_CTL_ERR 0 1 ERROR_INJECT_TL_REPLAY_NUM_ROLLOVER 2 3 ERROR_INJECT_TL_BAD_DLLP 4 5 ERROR_INJECT_TL_BAD_TLP 6 7 ERROR_INJECT_TL_UNSUPPORTED_REQ 8 9 ERROR_INJECT_TL_ECRC_ERROR 10 11 ERROR_INJECT_TL_MALFORMED_TLP 12 13 ERROR_INJECT_TL_UNEXPECTED_CMPLT 14 15 ERROR_INJECT_TL_COMPLETER_ABORT 16 17 ERROR_INJECT_TL_COMPLETION_TIMEOUT 18 19 ixD3F3_PCIE_LC_CNTL 2 0xa0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixD3F3_PCIE_LC_CNTL2 2 0xb1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixD3F3_PCIE_LC_CNTL3 2 0xb5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixD3F3_PCIE_LC_CNTL4 2 0xb6 22 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_DIS_CONTIG_END_SET_CHECK 2 2 LC_DIS_ASPM_L1_IN_SPEED_CHANGE 3 3 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixD3F3_PCIE_LC_CNTL5 2 0xb7 5 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 LC_DSC_EQ_FS_LF_INVALID_TO_PRESETS 24 24 ixD3F3_PCIE_LC_CNTL6 2 0xbb 3 0 4294967295 LC_SPC_MODE_2P5GT 0 0 LC_SPC_MODE_5GT 2 2 LC_SPC_MODE_8GT 4 4 ixD3F3_PCIE_LC_BW_CHANGE_CNTL 2 0xb2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixD3F3_PCIE_LC_TRAINING_CNTL 2 0xa1 25 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_WAIT_FOR_SETS_IN_RCFG 14 14 LC_HOT_RESET_QUICK_EXIT_EN 15 15 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixD3F3_PCIE_LC_LINK_WIDTH_CNTL 2 0xa2 24 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 LC_MULT_REVERSE_ATTEMP_EN 24 24 LC_RESET_TSX_CNT_IN_RCONFIG_EN 25 25 LC_WAIT_FOR_L_IDLE_IN_R_IDLE 26 26 LC_WAIT_FOR_NON_EI_ON_RXL0S_EXIT 27 27 LC_HOLD_EI_FOR_RSPEED_CMD_CHANGE 28 28 LC_BYPASS_RXL0S_ON_SHORT_EI 29 29 ixD3F3_PCIE_LC_N_FTS_CNTL 2 0xa3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixD3F3_PCIE_LC_SPEED_CNTL 2 0xa4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixD3F3_PCIE_LC_CDR_CNTL 2 0xb3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixD3F3_PCIE_LC_LANE_CNTL 2 0xb4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixD3F3_PCIE_LC_FORCE_COEFF 2 0xb8 6 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 LC_PRESET_10_EN 20 20 ixD3F3_PCIE_LC_BEST_EQ_SETTINGS 2 0xb9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixD3F3_PCIE_LC_FORCE_EQ_REQ_COEFF 2 0xba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixD3F3_PCIE_LC_STATE0 2 0xa5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixD3F3_PCIE_LC_STATE1 2 0xa6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixD3F3_PCIE_LC_STATE2 2 0xa7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixD3F3_PCIE_LC_STATE3 2 0xa8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixD3F3_PCIE_LC_STATE4 2 0xa9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixD3F3_PCIE_LC_STATE5 2 0xaa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixD3F3_PCIEP_STRAP_LC 2 0xc0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixD3F3_PCIEP_STRAP_MISC 2 0xc1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixD3F3_PCIEP_BCH_ECC_CNTL 2 0xd0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 ixD3F3_PCIEP_HPGI_PRIVATE 2 0xd2 2 0 4294967295 PRESENCE_DETECT_CHANGED_PRIVATE 3 3 PRESENCE_DETECT_STATE_PRIVATE 6 6 ixD3F3_PCIEP_HPGI 2 0xda 11 0 4294967295 REG_HPGI_ASSERT_TO_SMI_EN 0 0 REG_HPGI_ASSERT_TO_SCI_EN 1 1 REG_HPGI_DEASSERT_TO_SMI_EN 2 2 REG_HPGI_DEASSERT_TO_SCI_EN 3 3 REG_HPGI_HOOK 7 7 HPGI_REG_ASSERT_TO_SMI_STATUS 8 8 HPGI_REG_ASSERT_TO_SCI_STATUS 9 9 HPGI_REG_DEASSERT_TO_SMI_STATUS 10 10 HPGI_REG_DEASSERT_TO_SCI_STATUS 11 11 HPGI_REG_PRESENCE_DETECT_STATE_CHANGE_STATUS 15 15 REG_HPGI_PRESENCE_DETECT_STATE_CHANGE_EN 16 16 ixD3F3_VENDOR_ID 2 0x9000000 1 0 4294967295 VENDOR_ID 0 15 ixD3F3_DEVICE_ID 2 0x9000000 1 0 4294967295 DEVICE_ID 16 31 ixD3F3_COMMAND 2 0x9000001 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 ixD3F3_STATUS 2 0x9000001 11 0 4294967295 INT_STATUS 19 19 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 SIGNALED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD3F3_REVISION_ID 2 0x9000002 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 ixD3F3_PROG_INTERFACE 2 0x9000002 1 0 4294967295 PROG_INTERFACE 8 15 ixD3F3_SUB_CLASS 2 0x9000002 1 0 4294967295 SUB_CLASS 16 23 ixD3F3_BASE_CLASS 2 0x9000002 1 0 4294967295 BASE_CLASS 24 31 ixD3F3_CACHE_LINE 2 0x9000003 1 0 4294967295 CACHE_LINE_SIZE 0 7 ixD3F3_LATENCY 2 0x9000003 1 0 4294967295 LATENCY_TIMER 8 15 ixD3F3_HEADER 2 0x9000003 2 0 4294967295 HEADER_TYPE 16 22 DEVICE_TYPE 23 23 ixD3F3_BIST 2 0x9000003 3 0 4294967295 BIST_COMP 24 27 BIST_STRT 30 30 BIST_CAP 31 31 ixD3F3_SUB_BUS_NUMBER_LATENCY 2 0x9000006 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 ixD3F3_IO_BASE_LIMIT 2 0x9000007 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 ixD3F3_SECONDARY_STATUS 2 0x9000007 10 0 4294967295 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 RECEIVED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD3F3_MEM_BASE_LIMIT 2 0x9000008 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 ixD3F3_PREF_BASE_LIMIT 2 0x9000009 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 ixD3F3_PREF_BASE_UPPER 2 0x900000a 1 0 4294967295 PREF_BASE_UPPER 0 31 ixD3F3_PREF_LIMIT_UPPER 2 0x900000b 1 0 4294967295 PREF_LIMIT_UPPER 0 31 ixD3F3_IO_BASE_LIMIT_HI 2 0x900000c 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 ixD3F3_IRQ_BRIDGE_CNTL 2 0x900000f 8 0 4294967295 PARITY_RESPONSE_EN 16 16 SERR_EN 17 17 ISA_EN 18 18 VGA_EN 19 19 VGA_DEC 20 20 MASTER_ABORT_MODE 21 21 SECONDARY_BUS_RESET 22 22 FAST_B2B_EN 23 23 ixD3F3_CAP_PTR 2 0x900000d 1 0 4294967295 CAP_PTR 0 7 ixD3F3_INTERRUPT_LINE 2 0x900000f 1 0 4294967295 INTERRUPT_LINE 0 7 ixD3F3_INTERRUPT_PIN 2 0x900000f 1 0 4294967295 INTERRUPT_PIN 8 15 ixD3F3_EXT_BRIDGE_CNTL 2 0x9000010 1 0 4294967295 IO_PORT_80_EN 0 0 ixD3F3_PMI_CAP_LIST 2 0x9000014 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F3_PMI_CAP 2 0x9000014 7 0 4294967295 VERSION 16 18 PME_CLOCK 19 19 DEV_SPECIFIC_INIT 21 21 AUX_CURRENT 22 24 D1_SUPPORT 25 25 D2_SUPPORT 26 26 PME_SUPPORT 27 31 ixD3F3_PMI_STATUS_CNTL 2 0x9000015 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 ixD3F3_PCIE_CAP_LIST 2 0x9000016 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F3_PCIE_CAP 2 0x9000016 4 0 4294967295 VERSION 16 19 DEVICE_TYPE 20 23 SLOT_IMPLEMENTED 24 24 INT_MESSAGE_NUM 25 29 ixD3F3_DEVICE_CAP 2 0x9000017 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 ixD3F3_DEVICE_CNTL 2 0x9000018 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 ixD3F3_DEVICE_STATUS 2 0x9000018 6 0 4294967295 CORR_ERR 16 16 NON_FATAL_ERR 17 17 FATAL_ERR 18 18 USR_DETECTED 19 19 AUX_PWR 20 20 TRANSACTIONS_PEND 21 21 ixD3F3_LINK_CAP 2 0x9000019 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 ixD3F3_LINK_CNTL 2 0x900001a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 ixD3F3_LINK_STATUS 2 0x900001a 7 0 4294967295 CURRENT_LINK_SPEED 16 19 NEGOTIATED_LINK_WIDTH 20 25 LINK_TRAINING 27 27 SLOT_CLOCK_CFG 28 28 DL_ACTIVE 29 29 LINK_BW_MANAGEMENT_STATUS 30 30 LINK_AUTONOMOUS_BW_STATUS 31 31 ixD3F3_SLOT_CAP 2 0x900001b 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 ixD3F3_SLOT_CNTL 2 0x900001c 11 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 ixD3F3_SLOT_STATUS 2 0x900001c 9 0 4294967295 ATTN_BUTTON_PRESSED 16 16 PWR_FAULT_DETECTED 17 17 MRL_SENSOR_CHANGED 18 18 PRESENCE_DETECT_CHANGED 19 19 COMMAND_COMPLETED 20 20 MRL_SENSOR_STATE 21 21 PRESENCE_DETECT_STATE 22 22 ELECTROMECH_INTERLOCK_STATUS 23 23 DL_STATE_CHANGED 24 24 ixD3F3_ROOT_CNTL 2 0x900001d 5 0 4294967295 SERR_ON_CORR_ERR_EN 0 0 SERR_ON_NONFATAL_ERR_EN 1 1 SERR_ON_FATAL_ERR_EN 2 2 PM_INTERRUPT_EN 3 3 CRS_SOFTWARE_VISIBILITY_EN 4 4 ixD3F3_ROOT_CAP 2 0x900001d 1 0 4294967295 CRS_SOFTWARE_VISIBILITY 16 16 ixD3F3_ROOT_STATUS 2 0x900001e 3 0 4294967295 PME_REQUESTOR_ID 0 15 PME_STATUS 16 16 PME_PENDING 17 17 ixD3F3_DEVICE_CAP2 2 0x900001f 14 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 ixD3F3_DEVICE_CNTL2 2 0x9000020 10 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 ixD3F3_DEVICE_STATUS2 2 0x9000020 1 0 4294967295 RESERVED 16 31 ixD3F3_LINK_CAP2 2 0x9000021 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 ixD3F3_LINK_CNTL2 2 0x9000022 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 ixD3F3_LINK_STATUS2 2 0x9000022 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 16 16 EQUALIZATION_COMPLETE 17 17 EQUALIZATION_PHASE1_SUCCESS 18 18 EQUALIZATION_PHASE2_SUCCESS 19 19 EQUALIZATION_PHASE3_SUCCESS 20 20 LINK_EQUALIZATION_REQUEST 21 21 ixD3F3_SLOT_CAP2 2 0x9000023 1 0 4294967295 RESERVED 0 31 ixD3F3_SLOT_CNTL2 2 0x9000024 1 0 4294967295 RESERVED 0 15 ixD3F3_SLOT_STATUS2 2 0x9000024 1 0 4294967295 RESERVED 16 31 ixD3F3_MSI_CAP_LIST 2 0x9000028 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F3_MSI_MSG_CNTL 2 0x9000028 5 0 4294967295 MSI_EN 16 16 MSI_MULTI_CAP 17 19 MSI_MULTI_EN 20 22 MSI_64BIT 23 23 MSI_PERVECTOR_MASKING_CAP 24 24 ixD3F3_MSI_MSG_ADDR_LO 2 0x9000029 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 ixD3F3_MSI_MSG_ADDR_HI 2 0x900002a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 ixD3F3_MSI_MSG_DATA_64 2 0x900002b 1 0 4294967295 MSI_DATA_64 0 15 ixD3F3_MSI_MSG_DATA 2 0x900002a 1 0 4294967295 MSI_DATA 0 15 ixD3F3_SSID_CAP_LIST 2 0x9000030 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F3_SSID_CAP 2 0x9000031 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 ixD3F3_MSI_MAP_CAP_LIST 2 0x9000032 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F3_MSI_MAP_CAP 2 0x9000032 3 0 4294967295 EN 16 16 FIXD 17 17 CAP_TYPE 27 31 ixD3F3_MSI_MAP_ADDR_LO 2 0x9000033 1 0 4294967295 MSI_MAP_ADDR_LO 20 31 ixD3F3_MSI_MAP_ADDR_HI 2 0x9000034 1 0 4294967295 MSI_MAP_ADDR_HI 0 31 ixD3F3_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 2 0x9000040 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F3_PCIE_VENDOR_SPECIFIC_HDR 2 0x9000041 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 ixD3F3_PCIE_VENDOR_SPECIFIC1 2 0x9000042 1 0 4294967295 SCRATCH 0 31 ixD3F3_PCIE_VENDOR_SPECIFIC2 2 0x9000043 1 0 4294967295 SCRATCH 0 31 ixD3F3_PCIE_VC_ENH_CAP_LIST 2 0x9000044 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F3_PCIE_PORT_VC_CAP_REG1 2 0x9000045 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 ixD3F3_PCIE_PORT_VC_CAP_REG2 2 0x9000046 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 ixD3F3_PCIE_PORT_VC_CNTL 2 0x9000047 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 ixD3F3_PCIE_PORT_VC_STATUS 2 0x9000047 1 0 4294967295 VC_ARB_TABLE_STATUS 16 16 ixD3F3_PCIE_VC0_RESOURCE_CAP 2 0x9000048 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD3F3_PCIE_VC0_RESOURCE_CNTL 2 0x9000049 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD3F3_PCIE_VC0_RESOURCE_STATUS 2 0x900004a 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD3F3_PCIE_VC1_RESOURCE_CAP 2 0x900004b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD3F3_PCIE_VC1_RESOURCE_CNTL 2 0x900004c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD3F3_PCIE_VC1_RESOURCE_STATUS 2 0x900004d 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD3F3_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 2 0x9000050 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F3_PCIE_DEV_SERIAL_NUM_DW1 2 0x9000051 1 0 4294967295 SERIAL_NUMBER_LO 0 31 ixD3F3_PCIE_DEV_SERIAL_NUM_DW2 2 0x9000052 1 0 4294967295 SERIAL_NUMBER_HI 0 31 ixD3F3_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 2 0x9000054 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F3_PCIE_UNCORR_ERR_STATUS 2 0x9000055 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 ixD3F3_PCIE_UNCORR_ERR_MASK 2 0x9000056 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 ixD3F3_PCIE_UNCORR_ERR_SEVERITY 2 0x9000057 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 ixD3F3_PCIE_CORR_ERR_STATUS 2 0x9000058 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 ixD3F3_PCIE_CORR_ERR_MASK 2 0x9000059 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 ixD3F3_PCIE_ADV_ERR_CAP_CNTL 2 0x900005a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 ixD3F3_PCIE_HDR_LOG0 2 0x900005b 1 0 4294967295 TLP_HDR 0 31 ixD3F3_PCIE_HDR_LOG1 2 0x900005c 1 0 4294967295 TLP_HDR 0 31 ixD3F3_PCIE_HDR_LOG2 2 0x900005d 1 0 4294967295 TLP_HDR 0 31 ixD3F3_PCIE_HDR_LOG3 2 0x900005e 1 0 4294967295 TLP_HDR 0 31 ixD3F3_PCIE_ROOT_ERR_CMD 2 0x900005f 3 0 4294967295 CORR_ERR_REP_EN 0 0 NONFATAL_ERR_REP_EN 1 1 FATAL_ERR_REP_EN 2 2 ixD3F3_PCIE_ROOT_ERR_STATUS 2 0x9000060 8 0 4294967295 ERR_CORR_RCVD 0 0 MULT_ERR_CORR_RCVD 1 1 ERR_FATAL_NONFATAL_RCVD 2 2 MULT_ERR_FATAL_NONFATAL_RCVD 3 3 FIRST_UNCORRECTABLE_FATAL 4 4 NONFATAL_ERROR_MSG_RCVD 5 5 FATAL_ERROR_MSG_RCVD 6 6 ADV_ERR_INT_MSG_NUM 27 31 ixD3F3_PCIE_ERR_SRC_ID 2 0x9000061 2 0 4294967295 ERR_CORR_SRC_ID 0 15 ERR_FATAL_NONFATAL_SRC_ID 16 31 ixD3F3_PCIE_TLP_PREFIX_LOG0 2 0x9000062 1 0 4294967295 TLP_PREFIX 0 31 ixD3F3_PCIE_TLP_PREFIX_LOG1 2 0x9000063 1 0 4294967295 TLP_PREFIX 0 31 ixD3F3_PCIE_TLP_PREFIX_LOG2 2 0x9000064 1 0 4294967295 TLP_PREFIX 0 31 ixD3F3_PCIE_TLP_PREFIX_LOG3 2 0x9000065 1 0 4294967295 TLP_PREFIX 0 31 ixD3F3_PCIE_SECONDARY_ENH_CAP_LIST 2 0x900009c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F3_PCIE_LINK_CNTL3 2 0x900009d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 ixD3F3_PCIE_LANE_ERROR_STATUS 2 0x900009e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 ixD3F3_PCIE_LANE_0_EQUALIZATION_CNTL 2 0x900009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F3_PCIE_LANE_1_EQUALIZATION_CNTL 2 0x900009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F3_PCIE_LANE_2_EQUALIZATION_CNTL 2 0x90000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F3_PCIE_LANE_3_EQUALIZATION_CNTL 2 0x90000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F3_PCIE_LANE_4_EQUALIZATION_CNTL 2 0x90000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F3_PCIE_LANE_5_EQUALIZATION_CNTL 2 0x90000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F3_PCIE_LANE_6_EQUALIZATION_CNTL 2 0x90000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F3_PCIE_LANE_7_EQUALIZATION_CNTL 2 0x90000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F3_PCIE_LANE_8_EQUALIZATION_CNTL 2 0x90000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F3_PCIE_LANE_9_EQUALIZATION_CNTL 2 0x90000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F3_PCIE_LANE_10_EQUALIZATION_CNTL 2 0x90000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F3_PCIE_LANE_11_EQUALIZATION_CNTL 2 0x90000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F3_PCIE_LANE_12_EQUALIZATION_CNTL 2 0x90000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F3_PCIE_LANE_13_EQUALIZATION_CNTL 2 0x90000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F3_PCIE_LANE_14_EQUALIZATION_CNTL 2 0x90000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F3_PCIE_LANE_15_EQUALIZATION_CNTL 2 0x90000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F3_PCIE_ACS_ENH_CAP_LIST 2 0x90000a8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F3_PCIE_ACS_CAP 2 0x90000a9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 ixD3F3_PCIE_ACS_CNTL 2 0x90000a9 7 0 4294967295 SOURCE_VALIDATION_EN 16 16 TRANSLATION_BLOCKING_EN 17 17 P2P_REQUEST_REDIRECT_EN 18 18 P2P_COMPLETION_REDIRECT_EN 19 19 UPSTREAM_FORWARDING_EN 20 20 P2P_EGRESS_CONTROL_EN 21 21 DIRECT_TRANSLATED_P2P_EN 22 22 ixD3F3_PCIE_MC_ENH_CAP_LIST 2 0x90000bc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F3_PCIE_MC_CAP 2 0x90000bd 2 0 4294967295 MC_MAX_GROUP 0 5 MC_ECRC_REGEN_SUPP 15 15 ixD3F3_PCIE_MC_CNTL 2 0x90000bd 2 0 4294967295 MC_NUM_GROUP 16 21 MC_ENABLE 31 31 ixD3F3_PCIE_MC_ADDR0 2 0x90000be 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 ixD3F3_PCIE_MC_ADDR1 2 0x90000bf 1 0 4294967295 MC_BASE_ADDR_1 0 31 ixD3F3_PCIE_MC_RCV0 2 0x90000c0 1 0 4294967295 MC_RECEIVE_0 0 31 ixD3F3_PCIE_MC_RCV1 2 0x90000c1 1 0 4294967295 MC_RECEIVE_1 0 31 ixD3F3_PCIE_MC_BLOCK_ALL0 2 0x90000c2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 ixD3F3_PCIE_MC_BLOCK_ALL1 2 0x90000c3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 ixD3F3_PCIE_MC_BLOCK_UNTRANSLATED_0 2 0x90000c4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 ixD3F3_PCIE_MC_BLOCK_UNTRANSLATED_1 2 0x90000c5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 ixD3F3_PCIE_MC_OVERLAY_BAR0 2 0x90000c6 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 ixD3F3_PCIE_MC_OVERLAY_BAR1 2 0x90000c7 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 ixD3F4_PCIE_PORT_INDEX 2 0xa000038 1 0 4294967295 PCIE_INDEX 0 7 ixD3F4_PCIE_PORT_DATA 2 0xa000039 1 0 4294967295 PCIE_DATA 0 31 ixD3F4_PCIEP_RESERVED 2 0x0 1 0 4294967295 PCIEP_RESERVED 0 31 ixD3F4_PCIEP_SCRATCH 2 0x1 1 0 4294967295 PCIEP_SCRATCH 0 31 ixD3F4_PCIEP_HW_DEBUG 2 0x2 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixD3F4_PCIEP_PORT_CNTL 2 0x10 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixD3F4_PCIE_TX_CNTL 2 0x20 8 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 ixD3F4_PCIE_TX_REQUESTER_ID 2 0x21 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixD3F4_PCIE_TX_VENDOR_SPECIFIC 2 0x22 1 0 4294967295 TX_VENDOR_DATA 0 23 ixD3F4_PCIE_TX_REQUEST_NUM_CNTL 2 0x23 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixD3F4_PCIE_TX_SEQ 2 0x24 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixD3F4_PCIE_TX_REPLAY 2 0x25 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixD3F4_PCIE_TX_ACK_LATENCY_LIMIT 2 0x26 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixD3F4_PCIE_TX_CREDITS_ADVT_P 2 0x30 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixD3F4_PCIE_TX_CREDITS_ADVT_NP 2 0x31 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixD3F4_PCIE_TX_CREDITS_ADVT_CPL 2 0x32 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixD3F4_PCIE_TX_CREDITS_INIT_P 2 0x33 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixD3F4_PCIE_TX_CREDITS_INIT_NP 2 0x34 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixD3F4_PCIE_TX_CREDITS_INIT_CPL 2 0x35 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixD3F4_PCIE_TX_CREDITS_STATUS 2 0x36 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixD3F4_PCIE_TX_CREDITS_FCU_THRESHOLD 2 0x37 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixD3F4_PCIE_P_PORT_LANE_STATUS 2 0x50 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixD3F4_PCIE_FC_P 2 0x60 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixD3F4_PCIE_FC_NP 2 0x61 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixD3F4_PCIE_FC_CPL 2 0x62 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixD3F4_PCIE_ERR_CNTL 2 0x6a 14 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixD3F4_PCIE_RX_CNTL 2 0x70 26 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 RX_RCB_FLR_TIMEOUT_DIS 27 27 ixD3F4_PCIE_RX_EXPECTED_SEQNUM 2 0x71 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixD3F4_PCIE_RX_VENDOR_SPECIFIC 2 0x72 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixD3F4_PCIE_RX_CNTL3 2 0x74 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixD3F4_PCIE_RX_CREDITS_ALLOCATED_P 2 0x80 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixD3F4_PCIE_RX_CREDITS_ALLOCATED_NP 2 0x81 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixD3F4_PCIE_RX_CREDITS_ALLOCATED_CPL 2 0x82 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixD3F4_PCIEP_ERROR_INJECT_PHYSICAL 2 0x83 12 0 4294967295 ERROR_INJECT_PL_LANE_ERR 0 1 ERROR_INJECT_PL_FRAMING_ERR 2 3 ERROR_INJECT_PL_BAD_PARITY_IN_SKP 4 5 ERROR_INJECT_PL_BAD_LFSR_IN_SKP 6 7 ERROR_INJECT_PL_LOOPBACK_UFLOW 8 9 ERROR_INJECT_PL_LOOPBACK_OFLOW 10 11 ERROR_INJECT_PL_DESKEW_ERR 12 13 ERROR_INJECT_PL_8B10B_DISPARITY_ERR 14 15 ERROR_INJECT_PL_8B10B_DECODE_ERR 16 17 ERROR_INJECT_PL_SKP_OS_ERROR 18 19 ERROR_INJECT_PL_INV_OS_IDENTIFIER 20 21 ERROR_INJECT_PL_BAD_SYNC_HEADER 22 23 ixD3F4_PCIEP_ERROR_INJECT_TRANSACTION 2 0x84 10 0 4294967295 ERROR_INJECT_TL_FLOW_CTL_ERR 0 1 ERROR_INJECT_TL_REPLAY_NUM_ROLLOVER 2 3 ERROR_INJECT_TL_BAD_DLLP 4 5 ERROR_INJECT_TL_BAD_TLP 6 7 ERROR_INJECT_TL_UNSUPPORTED_REQ 8 9 ERROR_INJECT_TL_ECRC_ERROR 10 11 ERROR_INJECT_TL_MALFORMED_TLP 12 13 ERROR_INJECT_TL_UNEXPECTED_CMPLT 14 15 ERROR_INJECT_TL_COMPLETER_ABORT 16 17 ERROR_INJECT_TL_COMPLETION_TIMEOUT 18 19 ixD3F4_PCIE_LC_CNTL 2 0xa0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixD3F4_PCIE_LC_CNTL2 2 0xb1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixD3F4_PCIE_LC_CNTL3 2 0xb5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixD3F4_PCIE_LC_CNTL4 2 0xb6 22 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_DIS_CONTIG_END_SET_CHECK 2 2 LC_DIS_ASPM_L1_IN_SPEED_CHANGE 3 3 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixD3F4_PCIE_LC_CNTL5 2 0xb7 5 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 LC_DSC_EQ_FS_LF_INVALID_TO_PRESETS 24 24 ixD3F4_PCIE_LC_CNTL6 2 0xbb 3 0 4294967295 LC_SPC_MODE_2P5GT 0 0 LC_SPC_MODE_5GT 2 2 LC_SPC_MODE_8GT 4 4 ixD3F4_PCIE_LC_BW_CHANGE_CNTL 2 0xb2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixD3F4_PCIE_LC_TRAINING_CNTL 2 0xa1 25 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_WAIT_FOR_SETS_IN_RCFG 14 14 LC_HOT_RESET_QUICK_EXIT_EN 15 15 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixD3F4_PCIE_LC_LINK_WIDTH_CNTL 2 0xa2 24 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 LC_MULT_REVERSE_ATTEMP_EN 24 24 LC_RESET_TSX_CNT_IN_RCONFIG_EN 25 25 LC_WAIT_FOR_L_IDLE_IN_R_IDLE 26 26 LC_WAIT_FOR_NON_EI_ON_RXL0S_EXIT 27 27 LC_HOLD_EI_FOR_RSPEED_CMD_CHANGE 28 28 LC_BYPASS_RXL0S_ON_SHORT_EI 29 29 ixD3F4_PCIE_LC_N_FTS_CNTL 2 0xa3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixD3F4_PCIE_LC_SPEED_CNTL 2 0xa4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixD3F4_PCIE_LC_CDR_CNTL 2 0xb3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixD3F4_PCIE_LC_LANE_CNTL 2 0xb4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixD3F4_PCIE_LC_FORCE_COEFF 2 0xb8 6 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 LC_PRESET_10_EN 20 20 ixD3F4_PCIE_LC_BEST_EQ_SETTINGS 2 0xb9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixD3F4_PCIE_LC_FORCE_EQ_REQ_COEFF 2 0xba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixD3F4_PCIE_LC_STATE0 2 0xa5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixD3F4_PCIE_LC_STATE1 2 0xa6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixD3F4_PCIE_LC_STATE2 2 0xa7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixD3F4_PCIE_LC_STATE3 2 0xa8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixD3F4_PCIE_LC_STATE4 2 0xa9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixD3F4_PCIE_LC_STATE5 2 0xaa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixD3F4_PCIEP_STRAP_LC 2 0xc0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixD3F4_PCIEP_STRAP_MISC 2 0xc1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixD3F4_PCIEP_BCH_ECC_CNTL 2 0xd0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 ixD3F4_PCIEP_HPGI_PRIVATE 2 0xd2 2 0 4294967295 PRESENCE_DETECT_CHANGED_PRIVATE 3 3 PRESENCE_DETECT_STATE_PRIVATE 6 6 ixD3F4_PCIEP_HPGI 2 0xda 11 0 4294967295 REG_HPGI_ASSERT_TO_SMI_EN 0 0 REG_HPGI_ASSERT_TO_SCI_EN 1 1 REG_HPGI_DEASSERT_TO_SMI_EN 2 2 REG_HPGI_DEASSERT_TO_SCI_EN 3 3 REG_HPGI_HOOK 7 7 HPGI_REG_ASSERT_TO_SMI_STATUS 8 8 HPGI_REG_ASSERT_TO_SCI_STATUS 9 9 HPGI_REG_DEASSERT_TO_SMI_STATUS 10 10 HPGI_REG_DEASSERT_TO_SCI_STATUS 11 11 HPGI_REG_PRESENCE_DETECT_STATE_CHANGE_STATUS 15 15 REG_HPGI_PRESENCE_DETECT_STATE_CHANGE_EN 16 16 ixD3F4_VENDOR_ID 2 0xa000000 1 0 4294967295 VENDOR_ID 0 15 ixD3F4_DEVICE_ID 2 0xa000000 1 0 4294967295 DEVICE_ID 16 31 ixD3F4_COMMAND 2 0xa000001 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 ixD3F4_STATUS 2 0xa000001 11 0 4294967295 INT_STATUS 19 19 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 SIGNALED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD3F4_REVISION_ID 2 0xa000002 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 ixD3F4_PROG_INTERFACE 2 0xa000002 1 0 4294967295 PROG_INTERFACE 8 15 ixD3F4_SUB_CLASS 2 0xa000002 1 0 4294967295 SUB_CLASS 16 23 ixD3F4_BASE_CLASS 2 0xa000002 1 0 4294967295 BASE_CLASS 24 31 ixD3F4_CACHE_LINE 2 0xa000003 1 0 4294967295 CACHE_LINE_SIZE 0 7 ixD3F4_LATENCY 2 0xa000003 1 0 4294967295 LATENCY_TIMER 8 15 ixD3F4_HEADER 2 0xa000003 2 0 4294967295 HEADER_TYPE 16 22 DEVICE_TYPE 23 23 ixD3F4_BIST 2 0xa000003 3 0 4294967295 BIST_COMP 24 27 BIST_STRT 30 30 BIST_CAP 31 31 ixD3F4_SUB_BUS_NUMBER_LATENCY 2 0xa000006 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 ixD3F4_IO_BASE_LIMIT 2 0xa000007 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 ixD3F4_SECONDARY_STATUS 2 0xa000007 10 0 4294967295 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 RECEIVED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD3F4_MEM_BASE_LIMIT 2 0xa000008 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 ixD3F4_PREF_BASE_LIMIT 2 0xa000009 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 ixD3F4_PREF_BASE_UPPER 2 0xa00000a 1 0 4294967295 PREF_BASE_UPPER 0 31 ixD3F4_PREF_LIMIT_UPPER 2 0xa00000b 1 0 4294967295 PREF_LIMIT_UPPER 0 31 ixD3F4_IO_BASE_LIMIT_HI 2 0xa00000c 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 ixD3F4_IRQ_BRIDGE_CNTL 2 0xa00000f 8 0 4294967295 PARITY_RESPONSE_EN 16 16 SERR_EN 17 17 ISA_EN 18 18 VGA_EN 19 19 VGA_DEC 20 20 MASTER_ABORT_MODE 21 21 SECONDARY_BUS_RESET 22 22 FAST_B2B_EN 23 23 ixD3F4_CAP_PTR 2 0xa00000d 1 0 4294967295 CAP_PTR 0 7 ixD3F4_INTERRUPT_LINE 2 0xa00000f 1 0 4294967295 INTERRUPT_LINE 0 7 ixD3F4_INTERRUPT_PIN 2 0xa00000f 1 0 4294967295 INTERRUPT_PIN 8 15 ixD3F4_EXT_BRIDGE_CNTL 2 0xa000010 1 0 4294967295 IO_PORT_80_EN 0 0 ixD3F4_PMI_CAP_LIST 2 0xa000014 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F4_PMI_CAP 2 0xa000014 7 0 4294967295 VERSION 16 18 PME_CLOCK 19 19 DEV_SPECIFIC_INIT 21 21 AUX_CURRENT 22 24 D1_SUPPORT 25 25 D2_SUPPORT 26 26 PME_SUPPORT 27 31 ixD3F4_PMI_STATUS_CNTL 2 0xa000015 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 ixD3F4_PCIE_CAP_LIST 2 0xa000016 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F4_PCIE_CAP 2 0xa000016 4 0 4294967295 VERSION 16 19 DEVICE_TYPE 20 23 SLOT_IMPLEMENTED 24 24 INT_MESSAGE_NUM 25 29 ixD3F4_DEVICE_CAP 2 0xa000017 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 ixD3F4_DEVICE_CNTL 2 0xa000018 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 ixD3F4_DEVICE_STATUS 2 0xa000018 6 0 4294967295 CORR_ERR 16 16 NON_FATAL_ERR 17 17 FATAL_ERR 18 18 USR_DETECTED 19 19 AUX_PWR 20 20 TRANSACTIONS_PEND 21 21 ixD3F4_LINK_CAP 2 0xa000019 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 ixD3F4_LINK_CNTL 2 0xa00001a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 ixD3F4_LINK_STATUS 2 0xa00001a 7 0 4294967295 CURRENT_LINK_SPEED 16 19 NEGOTIATED_LINK_WIDTH 20 25 LINK_TRAINING 27 27 SLOT_CLOCK_CFG 28 28 DL_ACTIVE 29 29 LINK_BW_MANAGEMENT_STATUS 30 30 LINK_AUTONOMOUS_BW_STATUS 31 31 ixD3F4_SLOT_CAP 2 0xa00001b 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 ixD3F4_SLOT_CNTL 2 0xa00001c 11 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 ixD3F4_SLOT_STATUS 2 0xa00001c 9 0 4294967295 ATTN_BUTTON_PRESSED 16 16 PWR_FAULT_DETECTED 17 17 MRL_SENSOR_CHANGED 18 18 PRESENCE_DETECT_CHANGED 19 19 COMMAND_COMPLETED 20 20 MRL_SENSOR_STATE 21 21 PRESENCE_DETECT_STATE 22 22 ELECTROMECH_INTERLOCK_STATUS 23 23 DL_STATE_CHANGED 24 24 ixD3F4_ROOT_CNTL 2 0xa00001d 5 0 4294967295 SERR_ON_CORR_ERR_EN 0 0 SERR_ON_NONFATAL_ERR_EN 1 1 SERR_ON_FATAL_ERR_EN 2 2 PM_INTERRUPT_EN 3 3 CRS_SOFTWARE_VISIBILITY_EN 4 4 ixD3F4_ROOT_CAP 2 0xa00001d 1 0 4294967295 CRS_SOFTWARE_VISIBILITY 16 16 ixD3F4_ROOT_STATUS 2 0xa00001e 3 0 4294967295 PME_REQUESTOR_ID 0 15 PME_STATUS 16 16 PME_PENDING 17 17 ixD3F4_DEVICE_CAP2 2 0xa00001f 14 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 ixD3F4_DEVICE_CNTL2 2 0xa000020 10 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 ixD3F4_DEVICE_STATUS2 2 0xa000020 1 0 4294967295 RESERVED 16 31 ixD3F4_LINK_CAP2 2 0xa000021 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 ixD3F4_LINK_CNTL2 2 0xa000022 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 ixD3F4_LINK_STATUS2 2 0xa000022 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 16 16 EQUALIZATION_COMPLETE 17 17 EQUALIZATION_PHASE1_SUCCESS 18 18 EQUALIZATION_PHASE2_SUCCESS 19 19 EQUALIZATION_PHASE3_SUCCESS 20 20 LINK_EQUALIZATION_REQUEST 21 21 ixD3F4_SLOT_CAP2 2 0xa000023 1 0 4294967295 RESERVED 0 31 ixD3F4_SLOT_CNTL2 2 0xa000024 1 0 4294967295 RESERVED 0 15 ixD3F4_SLOT_STATUS2 2 0xa000024 1 0 4294967295 RESERVED 16 31 ixD3F4_MSI_CAP_LIST 2 0xa000028 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F4_MSI_MSG_CNTL 2 0xa000028 5 0 4294967295 MSI_EN 16 16 MSI_MULTI_CAP 17 19 MSI_MULTI_EN 20 22 MSI_64BIT 23 23 MSI_PERVECTOR_MASKING_CAP 24 24 ixD3F4_MSI_MSG_ADDR_LO 2 0xa000029 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 ixD3F4_MSI_MSG_ADDR_HI 2 0xa00002a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 ixD3F4_MSI_MSG_DATA_64 2 0xa00002b 1 0 4294967295 MSI_DATA_64 0 15 ixD3F4_MSI_MSG_DATA 2 0xa00002a 1 0 4294967295 MSI_DATA 0 15 ixD3F4_SSID_CAP_LIST 2 0xa000030 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F4_SSID_CAP 2 0xa000031 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 ixD3F4_MSI_MAP_CAP_LIST 2 0xa000032 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F4_MSI_MAP_CAP 2 0xa000032 3 0 4294967295 EN 16 16 FIXD 17 17 CAP_TYPE 27 31 ixD3F4_MSI_MAP_ADDR_LO 2 0xa000033 1 0 4294967295 MSI_MAP_ADDR_LO 20 31 ixD3F4_MSI_MAP_ADDR_HI 2 0xa000034 1 0 4294967295 MSI_MAP_ADDR_HI 0 31 ixD3F4_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 2 0xa000040 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F4_PCIE_VENDOR_SPECIFIC_HDR 2 0xa000041 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 ixD3F4_PCIE_VENDOR_SPECIFIC1 2 0xa000042 1 0 4294967295 SCRATCH 0 31 ixD3F4_PCIE_VENDOR_SPECIFIC2 2 0xa000043 1 0 4294967295 SCRATCH 0 31 ixD3F4_PCIE_VC_ENH_CAP_LIST 2 0xa000044 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F4_PCIE_PORT_VC_CAP_REG1 2 0xa000045 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 ixD3F4_PCIE_PORT_VC_CAP_REG2 2 0xa000046 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 ixD3F4_PCIE_PORT_VC_CNTL 2 0xa000047 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 ixD3F4_PCIE_PORT_VC_STATUS 2 0xa000047 1 0 4294967295 VC_ARB_TABLE_STATUS 16 16 ixD3F4_PCIE_VC0_RESOURCE_CAP 2 0xa000048 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD3F4_PCIE_VC0_RESOURCE_CNTL 2 0xa000049 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD3F4_PCIE_VC0_RESOURCE_STATUS 2 0xa00004a 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD3F4_PCIE_VC1_RESOURCE_CAP 2 0xa00004b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD3F4_PCIE_VC1_RESOURCE_CNTL 2 0xa00004c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD3F4_PCIE_VC1_RESOURCE_STATUS 2 0xa00004d 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD3F4_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 2 0xa000050 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F4_PCIE_DEV_SERIAL_NUM_DW1 2 0xa000051 1 0 4294967295 SERIAL_NUMBER_LO 0 31 ixD3F4_PCIE_DEV_SERIAL_NUM_DW2 2 0xa000052 1 0 4294967295 SERIAL_NUMBER_HI 0 31 ixD3F4_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 2 0xa000054 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F4_PCIE_UNCORR_ERR_STATUS 2 0xa000055 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 ixD3F4_PCIE_UNCORR_ERR_MASK 2 0xa000056 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 ixD3F4_PCIE_UNCORR_ERR_SEVERITY 2 0xa000057 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 ixD3F4_PCIE_CORR_ERR_STATUS 2 0xa000058 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 ixD3F4_PCIE_CORR_ERR_MASK 2 0xa000059 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 ixD3F4_PCIE_ADV_ERR_CAP_CNTL 2 0xa00005a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 ixD3F4_PCIE_HDR_LOG0 2 0xa00005b 1 0 4294967295 TLP_HDR 0 31 ixD3F4_PCIE_HDR_LOG1 2 0xa00005c 1 0 4294967295 TLP_HDR 0 31 ixD3F4_PCIE_HDR_LOG2 2 0xa00005d 1 0 4294967295 TLP_HDR 0 31 ixD3F4_PCIE_HDR_LOG3 2 0xa00005e 1 0 4294967295 TLP_HDR 0 31 ixD3F4_PCIE_ROOT_ERR_CMD 2 0xa00005f 3 0 4294967295 CORR_ERR_REP_EN 0 0 NONFATAL_ERR_REP_EN 1 1 FATAL_ERR_REP_EN 2 2 ixD3F4_PCIE_ROOT_ERR_STATUS 2 0xa000060 8 0 4294967295 ERR_CORR_RCVD 0 0 MULT_ERR_CORR_RCVD 1 1 ERR_FATAL_NONFATAL_RCVD 2 2 MULT_ERR_FATAL_NONFATAL_RCVD 3 3 FIRST_UNCORRECTABLE_FATAL 4 4 NONFATAL_ERROR_MSG_RCVD 5 5 FATAL_ERROR_MSG_RCVD 6 6 ADV_ERR_INT_MSG_NUM 27 31 ixD3F4_PCIE_ERR_SRC_ID 2 0xa000061 2 0 4294967295 ERR_CORR_SRC_ID 0 15 ERR_FATAL_NONFATAL_SRC_ID 16 31 ixD3F4_PCIE_TLP_PREFIX_LOG0 2 0xa000062 1 0 4294967295 TLP_PREFIX 0 31 ixD3F4_PCIE_TLP_PREFIX_LOG1 2 0xa000063 1 0 4294967295 TLP_PREFIX 0 31 ixD3F4_PCIE_TLP_PREFIX_LOG2 2 0xa000064 1 0 4294967295 TLP_PREFIX 0 31 ixD3F4_PCIE_TLP_PREFIX_LOG3 2 0xa000065 1 0 4294967295 TLP_PREFIX 0 31 ixD3F4_PCIE_SECONDARY_ENH_CAP_LIST 2 0xa00009c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F4_PCIE_LINK_CNTL3 2 0xa00009d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 ixD3F4_PCIE_LANE_ERROR_STATUS 2 0xa00009e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 ixD3F4_PCIE_LANE_0_EQUALIZATION_CNTL 2 0xa00009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F4_PCIE_LANE_1_EQUALIZATION_CNTL 2 0xa00009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F4_PCIE_LANE_2_EQUALIZATION_CNTL 2 0xa0000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F4_PCIE_LANE_3_EQUALIZATION_CNTL 2 0xa0000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F4_PCIE_LANE_4_EQUALIZATION_CNTL 2 0xa0000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F4_PCIE_LANE_5_EQUALIZATION_CNTL 2 0xa0000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F4_PCIE_LANE_6_EQUALIZATION_CNTL 2 0xa0000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F4_PCIE_LANE_7_EQUALIZATION_CNTL 2 0xa0000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F4_PCIE_LANE_8_EQUALIZATION_CNTL 2 0xa0000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F4_PCIE_LANE_9_EQUALIZATION_CNTL 2 0xa0000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F4_PCIE_LANE_10_EQUALIZATION_CNTL 2 0xa0000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F4_PCIE_LANE_11_EQUALIZATION_CNTL 2 0xa0000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F4_PCIE_LANE_12_EQUALIZATION_CNTL 2 0xa0000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F4_PCIE_LANE_13_EQUALIZATION_CNTL 2 0xa0000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F4_PCIE_LANE_14_EQUALIZATION_CNTL 2 0xa0000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F4_PCIE_LANE_15_EQUALIZATION_CNTL 2 0xa0000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F4_PCIE_ACS_ENH_CAP_LIST 2 0xa0000a8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F4_PCIE_ACS_CAP 2 0xa0000a9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 ixD3F4_PCIE_ACS_CNTL 2 0xa0000a9 7 0 4294967295 SOURCE_VALIDATION_EN 16 16 TRANSLATION_BLOCKING_EN 17 17 P2P_REQUEST_REDIRECT_EN 18 18 P2P_COMPLETION_REDIRECT_EN 19 19 UPSTREAM_FORWARDING_EN 20 20 P2P_EGRESS_CONTROL_EN 21 21 DIRECT_TRANSLATED_P2P_EN 22 22 ixD3F4_PCIE_MC_ENH_CAP_LIST 2 0xa0000bc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F4_PCIE_MC_CAP 2 0xa0000bd 2 0 4294967295 MC_MAX_GROUP 0 5 MC_ECRC_REGEN_SUPP 15 15 ixD3F4_PCIE_MC_CNTL 2 0xa0000bd 2 0 4294967295 MC_NUM_GROUP 16 21 MC_ENABLE 31 31 ixD3F4_PCIE_MC_ADDR0 2 0xa0000be 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 ixD3F4_PCIE_MC_ADDR1 2 0xa0000bf 1 0 4294967295 MC_BASE_ADDR_1 0 31 ixD3F4_PCIE_MC_RCV0 2 0xa0000c0 1 0 4294967295 MC_RECEIVE_0 0 31 ixD3F4_PCIE_MC_RCV1 2 0xa0000c1 1 0 4294967295 MC_RECEIVE_1 0 31 ixD3F4_PCIE_MC_BLOCK_ALL0 2 0xa0000c2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 ixD3F4_PCIE_MC_BLOCK_ALL1 2 0xa0000c3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 ixD3F4_PCIE_MC_BLOCK_UNTRANSLATED_0 2 0xa0000c4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 ixD3F4_PCIE_MC_BLOCK_UNTRANSLATED_1 2 0xa0000c5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 ixD3F4_PCIE_MC_OVERLAY_BAR0 2 0xa0000c6 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 ixD3F4_PCIE_MC_OVERLAY_BAR1 2 0xa0000c7 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 ixD3F5_PCIE_PORT_INDEX 2 0xb000038 1 0 4294967295 PCIE_INDEX 0 7 ixD3F5_PCIE_PORT_DATA 2 0xb000039 1 0 4294967295 PCIE_DATA 0 31 ixD3F5_PCIEP_RESERVED 2 0x0 1 0 4294967295 PCIEP_RESERVED 0 31 ixD3F5_PCIEP_SCRATCH 2 0x1 1 0 4294967295 PCIEP_SCRATCH 0 31 ixD3F5_PCIEP_HW_DEBUG 2 0x2 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixD3F5_PCIEP_PORT_CNTL 2 0x10 10 0 4294967295 SLV_PORT_REQ_EN 0 0 CI_SNOOP_OVERRIDE 1 1 HOTPLUG_MSG_EN 2 2 NATIVE_PME_EN 3 3 PWR_FAULT_EN 4 4 PMI_BM_DIS 5 5 SEQNUM_DEBUG_MODE 6 6 CI_SLV_CPL_STATIC_ALLOC_LIMIT_S 8 14 CI_MAX_CPL_PAYLOAD_SIZE_MODE 16 17 CI_PRIV_MAX_CPL_PAYLOAD_SIZE 18 20 ixD3F5_PCIE_TX_CNTL 2 0x20 8 0 4294967295 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_PACK_PACKET_DIS 14 14 TX_FLUSH_TLP_DIS 15 15 TX_CPL_PASS_P 20 20 TX_NP_PASS_P 21 21 TX_CLEAR_EXTRA_PM_REQS 22 22 TX_FC_UPDATE_TIMEOUT_DIS 23 23 ixD3F5_PCIE_TX_REQUESTER_ID 2 0x21 3 0 4294967295 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 ixD3F5_PCIE_TX_VENDOR_SPECIFIC 2 0x22 1 0 4294967295 TX_VENDOR_DATA 0 23 ixD3F5_PCIE_TX_REQUEST_NUM_CNTL 2 0x23 3 0 4294967295 TX_NUM_OUTSTANDING_NP 24 29 TX_NUM_OUTSTANDING_NP_VC1_EN 30 30 TX_NUM_OUTSTANDING_NP_EN 31 31 ixD3F5_PCIE_TX_SEQ 2 0x24 2 0 4294967295 TX_NEXT_TRANSMIT_SEQ 0 11 TX_ACKD_SEQ 16 27 ixD3F5_PCIE_TX_REPLAY 2 0x25 3 0 4294967295 TX_REPLAY_NUM 0 2 TX_REPLAY_TIMER_OVERWRITE 15 15 TX_REPLAY_TIMER 16 31 ixD3F5_PCIE_TX_ACK_LATENCY_LIMIT 2 0x26 2 0 4294967295 TX_ACK_LATENCY_LIMIT 0 11 TX_ACK_LATENCY_LIMIT_OVERWRITE 12 12 ixD3F5_PCIE_TX_CREDITS_ADVT_P 2 0x30 2 0 4294967295 TX_CREDITS_ADVT_PD 0 11 TX_CREDITS_ADVT_PH 16 23 ixD3F5_PCIE_TX_CREDITS_ADVT_NP 2 0x31 2 0 4294967295 TX_CREDITS_ADVT_NPD 0 11 TX_CREDITS_ADVT_NPH 16 23 ixD3F5_PCIE_TX_CREDITS_ADVT_CPL 2 0x32 2 0 4294967295 TX_CREDITS_ADVT_CPLD 0 11 TX_CREDITS_ADVT_CPLH 16 23 ixD3F5_PCIE_TX_CREDITS_INIT_P 2 0x33 2 0 4294967295 TX_CREDITS_INIT_PD 0 11 TX_CREDITS_INIT_PH 16 23 ixD3F5_PCIE_TX_CREDITS_INIT_NP 2 0x34 2 0 4294967295 TX_CREDITS_INIT_NPD 0 11 TX_CREDITS_INIT_NPH 16 23 ixD3F5_PCIE_TX_CREDITS_INIT_CPL 2 0x35 2 0 4294967295 TX_CREDITS_INIT_CPLD 0 11 TX_CREDITS_INIT_CPLH 16 23 ixD3F5_PCIE_TX_CREDITS_STATUS 2 0x36 12 0 4294967295 TX_CREDITS_ERR_PD 0 0 TX_CREDITS_ERR_PH 1 1 TX_CREDITS_ERR_NPD 2 2 TX_CREDITS_ERR_NPH 3 3 TX_CREDITS_ERR_CPLD 4 4 TX_CREDITS_ERR_CPLH 5 5 TX_CREDITS_CUR_STATUS_PD 16 16 TX_CREDITS_CUR_STATUS_PH 17 17 TX_CREDITS_CUR_STATUS_NPD 18 18 TX_CREDITS_CUR_STATUS_NPH 19 19 TX_CREDITS_CUR_STATUS_CPLD 20 20 TX_CREDITS_CUR_STATUS_CPLH 21 21 ixD3F5_PCIE_TX_CREDITS_FCU_THRESHOLD 2 0x37 6 0 4294967295 TX_FCU_THRESHOLD_P_VC0 0 2 TX_FCU_THRESHOLD_NP_VC0 4 6 TX_FCU_THRESHOLD_CPL_VC0 8 10 TX_FCU_THRESHOLD_P_VC1 16 18 TX_FCU_THRESHOLD_NP_VC1 20 22 TX_FCU_THRESHOLD_CPL_VC1 24 26 ixD3F5_PCIE_P_PORT_LANE_STATUS 2 0x50 2 0 4294967295 PORT_LANE_REVERSAL 0 0 PHY_LINK_WIDTH 1 6 ixD3F5_PCIE_FC_P 2 0x60 2 0 4294967295 PD_CREDITS 0 7 PH_CREDITS 8 15 ixD3F5_PCIE_FC_NP 2 0x61 2 0 4294967295 NPD_CREDITS 0 7 NPH_CREDITS 8 15 ixD3F5_PCIE_FC_CPL 2 0x62 2 0 4294967295 CPLD_CREDITS 0 7 CPLH_CREDITS 8 15 ixD3F5_PCIE_ERR_CNTL 2 0x6a 14 0 4294967295 ERR_REPORTING_DIS 0 0 STRAP_FIRST_RCVD_ERR_LOG 1 1 RX_DROP_ECRC_FAILURES 2 2 TX_GENERATE_LCRC_ERR 4 4 RX_GENERATE_LCRC_ERR 5 5 TX_GENERATE_ECRC_ERR 6 6 RX_GENERATE_ECRC_ERR 7 7 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 CI_P_SLV_BUF_RD_HALT_STATUS 14 14 CI_NP_SLV_BUF_RD_HALT_STATUS 15 15 CI_SLV_BUF_HALT_RESET 16 16 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 ixD3F5_PCIE_RX_CNTL 2 0x70 26 0 4294967295 RX_IGNORE_IO_ERR 0 0 RX_IGNORE_BE_ERR 1 1 RX_IGNORE_MSG_ERR 2 2 RX_IGNORE_CRC_ERR 3 3 RX_IGNORE_CFG_ERR 4 4 RX_IGNORE_CPL_ERR 5 5 RX_IGNORE_EP_ERR 6 6 RX_IGNORE_LEN_MISMATCH_ERR 7 7 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_IGNORE_CFG_UR 10 10 RX_IGNORE_IO_UR 11 11 RX_IGNORE_AT_ERR 12 12 RX_NAK_IF_FIFO_FULL 13 13 RX_GEN_ONE_NAK 14 14 RX_FC_INIT_FROM_REG 15 15 RX_RCB_CPL_TIMEOUT 16 18 RX_RCB_CPL_TIMEOUT_MODE 19 19 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_CPLPREFIX_ERR 23 23 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 RX_RCB_FLR_TIMEOUT_DIS 27 27 ixD3F5_PCIE_RX_EXPECTED_SEQNUM 2 0x71 1 0 4294967295 RX_EXPECTED_SEQNUM 0 11 ixD3F5_PCIE_RX_VENDOR_SPECIFIC 2 0x72 2 0 4294967295 RX_VENDOR_DATA 0 23 RX_VENDOR_STATUS 24 24 ixD3F5_PCIE_RX_CNTL3 2 0x74 5 0 4294967295 RX_IGNORE_RC_TRANSMRDPASID_UR 0 0 RX_IGNORE_RC_TRANSMWRPASID_UR 1 1 RX_IGNORE_RC_PRGRESPMSG_UR 2 2 RX_IGNORE_RC_INVREQ_UR 3 3 RX_IGNORE_RC_INVCPLPASID_UR 4 4 ixD3F5_PCIE_RX_CREDITS_ALLOCATED_P 2 0x80 2 0 4294967295 RX_CREDITS_ALLOCATED_PD 0 11 RX_CREDITS_ALLOCATED_PH 16 23 ixD3F5_PCIE_RX_CREDITS_ALLOCATED_NP 2 0x81 2 0 4294967295 RX_CREDITS_ALLOCATED_NPD 0 11 RX_CREDITS_ALLOCATED_NPH 16 23 ixD3F5_PCIE_RX_CREDITS_ALLOCATED_CPL 2 0x82 2 0 4294967295 RX_CREDITS_ALLOCATED_CPLD 0 11 RX_CREDITS_ALLOCATED_CPLH 16 23 ixD3F5_PCIEP_ERROR_INJECT_PHYSICAL 2 0x83 12 0 4294967295 ERROR_INJECT_PL_LANE_ERR 0 1 ERROR_INJECT_PL_FRAMING_ERR 2 3 ERROR_INJECT_PL_BAD_PARITY_IN_SKP 4 5 ERROR_INJECT_PL_BAD_LFSR_IN_SKP 6 7 ERROR_INJECT_PL_LOOPBACK_UFLOW 8 9 ERROR_INJECT_PL_LOOPBACK_OFLOW 10 11 ERROR_INJECT_PL_DESKEW_ERR 12 13 ERROR_INJECT_PL_8B10B_DISPARITY_ERR 14 15 ERROR_INJECT_PL_8B10B_DECODE_ERR 16 17 ERROR_INJECT_PL_SKP_OS_ERROR 18 19 ERROR_INJECT_PL_INV_OS_IDENTIFIER 20 21 ERROR_INJECT_PL_BAD_SYNC_HEADER 22 23 ixD3F5_PCIEP_ERROR_INJECT_TRANSACTION 2 0x84 10 0 4294967295 ERROR_INJECT_TL_FLOW_CTL_ERR 0 1 ERROR_INJECT_TL_REPLAY_NUM_ROLLOVER 2 3 ERROR_INJECT_TL_BAD_DLLP 4 5 ERROR_INJECT_TL_BAD_TLP 6 7 ERROR_INJECT_TL_UNSUPPORTED_REQ 8 9 ERROR_INJECT_TL_ECRC_ERROR 10 11 ERROR_INJECT_TL_MALFORMED_TLP 12 13 ERROR_INJECT_TL_UNEXPECTED_CMPLT 14 15 ERROR_INJECT_TL_COMPLETER_ABORT 16 17 ERROR_INJECT_TL_COMPLETION_TIMEOUT 18 19 ixD3F5_PCIE_LC_CNTL 2 0xa0 20 0 4294967295 LC_DONT_ENTER_L23_IN_D0 1 1 LC_RESET_L_IDLE_COUNT_EN 2 2 LC_RESET_LINK 3 3 LC_16X_CLEAR_TX_PIPE 4 7 LC_L0S_INACTIVITY 8 11 LC_L1_INACTIVITY 12 15 LC_PMI_TO_L1_DIS 16 16 LC_INC_N_FTS_EN 17 17 LC_LOOK_FOR_IDLE_IN_L1L23 18 19 LC_FACTOR_IN_EXT_SYNC 20 20 LC_WAIT_FOR_PM_ACK_DIS 21 21 LC_WAKE_FROM_L23 22 22 LC_L1_IMMEDIATE_ACK 23 23 LC_ASPM_TO_L1_DIS 24 24 LC_DELAY_COUNT 25 26 LC_DELAY_L0S_EXIT 27 27 LC_DELAY_L1_EXIT 28 28 LC_EXTEND_WAIT_FOR_EL_IDLE 29 29 LC_ESCAPE_L1L23_EN 30 30 LC_GATE_RCVR_IDLE 31 31 ixD3F5_PCIE_LC_CNTL2 2 0xb1 24 0 4294967295 LC_TIMED_OUT_STATE 0 5 LC_STATE_TIMED_OUT 6 6 LC_LOOK_FOR_BW_REDUCTION 7 7 LC_MORE_TS2_EN 8 8 LC_X12_NEGOTIATION_DIS 9 9 LC_LINK_UP_REVERSAL_EN 10 10 LC_ILLEGAL_STATE 11 11 LC_ILLEGAL_STATE_RESTART_EN 12 12 LC_WAIT_FOR_OTHER_LANES_MODE 13 13 LC_ELEC_IDLE_MODE 14 15 LC_DISABLE_INFERRED_ELEC_IDLE_DET 16 16 LC_ALLOW_PDWN_IN_L1 17 17 LC_ALLOW_PDWN_IN_L23 18 18 LC_DEASSERT_RX_EN_IN_L0S 19 19 LC_BLOCK_EL_IDLE_IN_L0 20 20 LC_RCV_L0_TO_RCV_L0S_DIS 21 21 LC_ASSERT_INACTIVE_DURING_HOLD 22 22 LC_WAIT_FOR_LANES_IN_LW_NEG 23 24 LC_PWR_DOWN_NEG_OFF_LANES 25 25 LC_DISABLE_LOST_SYM_LOCK_ARCS 26 26 LC_LINK_BW_NOTIFICATION_DIS 27 27 LC_PMI_L1_WAIT_FOR_SLV_IDLE 28 28 LC_TEST_TIMER_SEL 29 30 LC_ENABLE_INFERRED_ELEC_IDLE_FOR_PI 31 31 ixD3F5_PCIE_LC_CNTL3 2 0xb5 23 0 4294967295 LC_SELECT_DEEMPHASIS 0 0 LC_SELECT_DEEMPHASIS_CNTL 1 2 LC_RCVD_DEEMPHASIS 3 3 LC_COMP_TO_DETECT 4 4 LC_RESET_TSX_CNT_IN_RLOCK_EN 5 5 LC_AUTO_SPEED_CHANGE_ATTEMPTS_ALLOWED 6 7 LC_AUTO_SPEED_CHANGE_ATTEMPT_FAILED 8 8 LC_CLR_FAILED_AUTO_SPD_CHANGE_CNT 9 9 LC_ENHANCED_HOT_PLUG_EN 10 10 LC_RCVR_DET_EN_OVERRIDE 11 11 LC_EHP_RX_PHY_CMD 12 13 LC_EHP_TX_PHY_CMD 14 15 LC_CHIP_BIF_USB_IDLE_EN 16 16 LC_L1_BLOCK_RECONFIG_EN 17 17 LC_AUTO_DISABLE_SPEED_SUPPORT_EN 18 18 LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 19 20 LC_FAST_L1_ENTRY_EXIT_EN 21 21 LC_RXPHYCMD_INACTIVE_EN_MODE 22 22 LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK 23 23 LC_HW_VOLTAGE_IF_CONTROL 24 25 LC_VOLTAGE_TIMER_SEL 26 29 LC_GO_TO_RECOVERY 30 30 LC_N_EIE_SEL 31 31 ixD3F5_PCIE_LC_CNTL4 2 0xb6 22 0 4294967295 LC_TX_ENABLE_BEHAVIOUR 0 1 LC_DIS_CONTIG_END_SET_CHECK 2 2 LC_DIS_ASPM_L1_IN_SPEED_CHANGE 3 3 LC_BYPASS_EQ 4 4 LC_REDO_EQ 5 5 LC_EXTEND_EIEOS 6 6 LC_IGNORE_PARITY 7 7 LC_EQ_SEARCH_MODE 8 9 LC_DSC_CHECK_COEFFS_IN_RLOCK 10 10 LC_USC_EQ_NOT_REQD 11 11 LC_USC_GO_TO_EQ 12 12 LC_SET_QUIESCE 13 13 LC_QUIESCE_RCVD 14 14 LC_UNEXPECTED_COEFFS_RCVD 15 15 LC_BYPASS_EQ_REQ_PHASE 16 16 LC_FORCE_PRESET_IN_EQ_REQ_PHASE 17 17 LC_FORCE_PRESET_VALUE 18 21 LC_USC_DELAY_DLLPS 22 22 LC_PCIE_TX_FULL_SWING 23 23 LC_EQ_WAIT_FOR_EVAL_DONE 24 24 LC_8GT_SKIP_ORDER_EN 25 25 LC_WAIT_FOR_MORE_TS_IN_RLOCK 26 31 ixD3F5_PCIE_LC_CNTL5 2 0xb7 5 0 4294967295 LC_EQ_FS_0 0 5 LC_EQ_FS_8 6 11 LC_EQ_LF_0 12 17 LC_EQ_LF_8 18 23 LC_DSC_EQ_FS_LF_INVALID_TO_PRESETS 24 24 ixD3F5_PCIE_LC_CNTL6 2 0xbb 3 0 4294967295 LC_SPC_MODE_2P5GT 0 0 LC_SPC_MODE_5GT 2 2 LC_SPC_MODE_8GT 4 4 ixD3F5_PCIE_LC_BW_CHANGE_CNTL 2 0xb2 11 0 4294967295 LC_BW_CHANGE_INT_EN 0 0 LC_HW_INIT_SPEED_CHANGE 1 1 LC_SW_INIT_SPEED_CHANGE 2 2 LC_OTHER_INIT_SPEED_CHANGE 3 3 LC_RELIABILITY_SPEED_CHANGE 4 4 LC_FAILED_SPEED_NEG 5 5 LC_LONG_LW_CHANGE 6 6 LC_SHORT_LW_CHANGE 7 7 LC_LW_CHANGE_OTHER 8 8 LC_LW_CHANGE_FAILED 9 9 LC_LINK_BW_NOTIFICATION_DETECT_MODE 10 10 ixD3F5_PCIE_LC_TRAINING_CNTL 2 0xa1 25 0 4294967295 LC_TRAINING_CNTL 0 3 LC_COMPLIANCE_RECEIVE 4 4 LC_LOOK_FOR_MORE_NON_MATCHING_TS1 5 5 LC_L0S_L1_TRAINING_CNTL_EN 6 6 LC_L1_LONG_WAKE_FIX_EN 7 7 LC_POWER_STATE 8 10 LC_DONT_GO_TO_L0S_IF_L1_ARMED 11 11 LC_INIT_SPD_CHG_WITH_CSR_EN 12 12 LC_DISABLE_TRAINING_BIT_ARCH 13 13 LC_WAIT_FOR_SETS_IN_RCFG 14 14 LC_HOT_RESET_QUICK_EXIT_EN 15 15 LC_EXTEND_WAIT_FOR_SKP 16 16 LC_AUTONOMOUS_CHANGE_OFF 17 17 LC_UPCONFIGURE_CAP_OFF 18 18 LC_HW_LINK_DIS_EN 19 19 LC_LINK_DIS_BY_HW 20 20 LC_STATIC_TX_PIPE_COUNT_EN 21 21 LC_ASPM_L1_NAK_TIMER_SEL 22 23 LC_DONT_DEASSERT_RX_EN_IN_R_SPEED 24 24 LC_DONT_DEASSERT_RX_EN_IN_TEST 25 25 LC_RESET_ASPM_L1_NAK_TIMER 26 26 LC_SHORT_RCFG_TIMEOUT 27 27 LC_ALLOW_TX_L1_CONTROL 28 28 LC_WAIT_FOR_FOM_VALID_AFTER_TRACK 29 29 LC_EXTEND_EQ_REQ_TIME 30 31 ixD3F5_PCIE_LC_LINK_WIDTH_CNTL 2 0xa2 24 0 4294967295 LC_LINK_WIDTH 0 2 LC_LINK_WIDTH_RD 4 6 LC_RECONFIG_ARC_MISSING_ESCAPE 7 7 LC_RECONFIG_NOW 8 8 LC_RENEGOTIATION_SUPPORT 9 9 LC_RENEGOTIATE_EN 10 10 LC_SHORT_RECONFIG_EN 11 11 LC_UPCONFIGURE_SUPPORT 12 12 LC_UPCONFIGURE_DIS 13 13 LC_UPCFG_WAIT_FOR_RCVR_DIS 14 14 LC_UPCFG_TIMER_SEL 15 15 LC_DEASSERT_TX_PDNB 16 16 LC_L1_RECONFIG_EN 17 17 LC_DYNLINK_MST_EN 18 18 LC_DUAL_END_RECONFIG_EN 19 19 LC_UPCONFIGURE_CAPABLE 20 20 LC_DYN_LANES_PWR_STATE 21 22 LC_EQ_REVERSAL_LOGIC_EN 23 23 LC_MULT_REVERSE_ATTEMP_EN 24 24 LC_RESET_TSX_CNT_IN_RCONFIG_EN 25 25 LC_WAIT_FOR_L_IDLE_IN_R_IDLE 26 26 LC_WAIT_FOR_NON_EI_ON_RXL0S_EXIT 27 27 LC_HOLD_EI_FOR_RSPEED_CMD_CHANGE 28 28 LC_BYPASS_RXL0S_ON_SHORT_EI 29 29 ixD3F5_PCIE_LC_N_FTS_CNTL 2 0xa3 5 0 4294967295 LC_XMIT_N_FTS 0 7 LC_XMIT_N_FTS_OVERRIDE_EN 8 8 LC_XMIT_FTS_BEFORE_RECOVERY 9 9 LC_XMIT_N_FTS_LIMIT 16 23 LC_N_FTS 24 31 ixD3F5_PCIE_LC_SPEED_CNTL 2 0xa4 28 0 4294967295 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_TARGET_LINK_SPEED_OVERRIDE_EN 2 2 LC_TARGET_LINK_SPEED_OVERRIDE 3 4 LC_FORCE_EN_SW_SPEED_CHANGE 5 5 LC_FORCE_DIS_SW_SPEED_CHANGE 6 6 LC_FORCE_EN_HW_SPEED_CHANGE 7 7 LC_FORCE_DIS_HW_SPEED_CHANGE 8 8 LC_INITIATE_LINK_SPEED_CHANGE 9 9 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED 10 11 LC_SPEED_CHANGE_ATTEMPT_FAILED 12 12 LC_CURRENT_DATA_RATE 13 14 LC_DONT_CLR_TARGET_SPD_CHANGE_STATUS 15 15 LC_CLR_FAILED_SPD_CHANGE_CNT 16 16 LC_1_OR_MORE_TS2_SPEED_ARC_EN 17 17 LC_OTHER_SIDE_EVER_SENT_GEN2 18 18 LC_OTHER_SIDE_SUPPORTS_GEN2 19 19 LC_OTHER_SIDE_EVER_SENT_GEN3 20 20 LC_OTHER_SIDE_SUPPORTS_GEN3 21 21 LC_AUTO_RECOVERY_DIS 22 22 LC_SPEED_CHANGE_STATUS 23 23 LC_DATA_RATE_ADVERTISED 24 25 LC_CHECK_DATA_RATE 26 26 LC_MULT_UPSTREAM_AUTO_SPD_CHNG_EN 27 27 LC_INIT_SPEED_NEG_IN_L0s_EN 28 28 LC_INIT_SPEED_NEG_IN_L1_EN 29 29 LC_DONT_CHECK_EQTS_IN_RCFG 30 30 LC_DELAY_COEFF_UPDATE_DIS 31 31 ixD3F5_PCIE_LC_CDR_CNTL 2 0xb3 3 0 4294967295 LC_CDR_TEST_OFF 0 11 LC_CDR_TEST_SETS 12 23 LC_CDR_SET_TYPE 24 25 ixD3F5_PCIE_LC_LANE_CNTL 2 0xb4 2 0 4294967295 LC_CORRUPTED_LANES 0 15 LC_LANE_DIS 16 31 ixD3F5_PCIE_LC_FORCE_COEFF 2 0xb8 6 0 4294967295 LC_FORCE_COEFF 0 0 LC_FORCE_PRE_CURSOR 1 6 LC_FORCE_CURSOR 7 12 LC_FORCE_POST_CURSOR 13 18 LC_3X3_COEFF_SEARCH_EN 19 19 LC_PRESET_10_EN 20 20 ixD3F5_PCIE_LC_BEST_EQ_SETTINGS 2 0xb9 5 0 4294967295 LC_BEST_PRESET 0 3 LC_BEST_PRECURSOR 4 9 LC_BEST_CURSOR 10 15 LC_BEST_POSTCURSOR 16 21 LC_BEST_FOM 22 29 ixD3F5_PCIE_LC_FORCE_EQ_REQ_COEFF 2 0xba 6 0 4294967295 LC_FORCE_COEFF_IN_EQ_REQ_PHASE 0 0 LC_FORCE_PRE_CURSOR_REQ 1 6 LC_FORCE_CURSOR_REQ 7 12 LC_FORCE_POST_CURSOR_REQ 13 18 LC_FS_OTHER_END 19 24 LC_LF_OTHER_END 25 30 ixD3F5_PCIE_LC_STATE0 2 0xa5 4 0 4294967295 LC_CURRENT_STATE 0 5 LC_PREV_STATE1 8 13 LC_PREV_STATE2 16 21 LC_PREV_STATE3 24 29 ixD3F5_PCIE_LC_STATE1 2 0xa6 4 0 4294967295 LC_PREV_STATE4 0 5 LC_PREV_STATE5 8 13 LC_PREV_STATE6 16 21 LC_PREV_STATE7 24 29 ixD3F5_PCIE_LC_STATE2 2 0xa7 4 0 4294967295 LC_PREV_STATE8 0 5 LC_PREV_STATE9 8 13 LC_PREV_STATE10 16 21 LC_PREV_STATE11 24 29 ixD3F5_PCIE_LC_STATE3 2 0xa8 4 0 4294967295 LC_PREV_STATE12 0 5 LC_PREV_STATE13 8 13 LC_PREV_STATE14 16 21 LC_PREV_STATE15 24 29 ixD3F5_PCIE_LC_STATE4 2 0xa9 4 0 4294967295 LC_PREV_STATE16 0 5 LC_PREV_STATE17 8 13 LC_PREV_STATE18 16 21 LC_PREV_STATE19 24 29 ixD3F5_PCIE_LC_STATE5 2 0xaa 4 0 4294967295 LC_PREV_STATE20 0 5 LC_PREV_STATE21 8 13 LC_PREV_STATE22 16 21 LC_PREV_STATE23 24 29 ixD3F5_PCIEP_STRAP_LC 2 0xc0 11 0 4294967295 STRAP_FTS_yTSx_COUNT 0 1 STRAP_LONG_yTSx_COUNT 2 3 STRAP_MED_yTSx_COUNT 4 5 STRAP_SHORT_yTSx_COUNT 6 7 STRAP_SKIP_INTERVAL 8 10 STRAP_BYPASS_RCVR_DET 11 11 STRAP_COMPLIANCE_DIS 12 12 STRAP_FORCE_COMPLIANCE 13 13 STRAP_REVERSE_LC_LANES 14 14 STRAP_AUTO_RC_SPEED_NEGOTIATION_DIS 15 15 STRAP_LANE_NEGOTIATION 16 18 ixD3F5_PCIEP_STRAP_MISC 2 0xc1 5 0 4294967295 STRAP_REVERSE_LANES 0 0 STRAP_E2E_PREFIX_EN 1 1 STRAP_EXTENDED_FMT_SUPPORTED 2 2 STRAP_OBFF_SUPPORTED 3 4 STRAP_LTR_SUPPORTED 5 5 ixD3F5_PCIEP_BCH_ECC_CNTL 2 0xd0 3 0 4294967295 STRAP_BCH_ECC_EN 0 0 BCH_ECC_ERROR_THRESHOLD 8 15 BCH_ECC_ERROR_STATUS 16 31 ixD3F5_PCIEP_HPGI_PRIVATE 2 0xd2 2 0 4294967295 PRESENCE_DETECT_CHANGED_PRIVATE 3 3 PRESENCE_DETECT_STATE_PRIVATE 6 6 ixD3F5_PCIEP_HPGI 2 0xda 11 0 4294967295 REG_HPGI_ASSERT_TO_SMI_EN 0 0 REG_HPGI_ASSERT_TO_SCI_EN 1 1 REG_HPGI_DEASSERT_TO_SMI_EN 2 2 REG_HPGI_DEASSERT_TO_SCI_EN 3 3 REG_HPGI_HOOK 7 7 HPGI_REG_ASSERT_TO_SMI_STATUS 8 8 HPGI_REG_ASSERT_TO_SCI_STATUS 9 9 HPGI_REG_DEASSERT_TO_SMI_STATUS 10 10 HPGI_REG_DEASSERT_TO_SCI_STATUS 11 11 HPGI_REG_PRESENCE_DETECT_STATE_CHANGE_STATUS 15 15 REG_HPGI_PRESENCE_DETECT_STATE_CHANGE_EN 16 16 ixD3F5_VENDOR_ID 2 0xb000000 1 0 4294967295 VENDOR_ID 0 15 ixD3F5_DEVICE_ID 2 0xb000000 1 0 4294967295 DEVICE_ID 16 31 ixD3F5_COMMAND 2 0xb000001 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 ixD3F5_STATUS 2 0xb000001 11 0 4294967295 INT_STATUS 19 19 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 SIGNALED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD3F5_REVISION_ID 2 0xb000002 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 ixD3F5_PROG_INTERFACE 2 0xb000002 1 0 4294967295 PROG_INTERFACE 8 15 ixD3F5_SUB_CLASS 2 0xb000002 1 0 4294967295 SUB_CLASS 16 23 ixD3F5_BASE_CLASS 2 0xb000002 1 0 4294967295 BASE_CLASS 24 31 ixD3F5_CACHE_LINE 2 0xb000003 1 0 4294967295 CACHE_LINE_SIZE 0 7 ixD3F5_LATENCY 2 0xb000003 1 0 4294967295 LATENCY_TIMER 8 15 ixD3F5_HEADER 2 0xb000003 2 0 4294967295 HEADER_TYPE 16 22 DEVICE_TYPE 23 23 ixD3F5_BIST 2 0xb000003 3 0 4294967295 BIST_COMP 24 27 BIST_STRT 30 30 BIST_CAP 31 31 ixD3F5_SUB_BUS_NUMBER_LATENCY 2 0xb000006 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 ixD3F5_IO_BASE_LIMIT 2 0xb000007 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 ixD3F5_SECONDARY_STATUS 2 0xb000007 10 0 4294967295 CAP_LIST 20 20 PCI_66_EN 21 21 FAST_BACK_CAPABLE 23 23 MASTER_DATA_PARITY_ERROR 24 24 DEVSEL_TIMING 25 26 SIGNAL_TARGET_ABORT 27 27 RECEIVED_TARGET_ABORT 28 28 RECEIVED_MASTER_ABORT 29 29 RECEIVED_SYSTEM_ERROR 30 30 PARITY_ERROR_DETECTED 31 31 ixD3F5_MEM_BASE_LIMIT 2 0xb000008 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 ixD3F5_PREF_BASE_LIMIT 2 0xb000009 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 ixD3F5_PREF_BASE_UPPER 2 0xb00000a 1 0 4294967295 PREF_BASE_UPPER 0 31 ixD3F5_PREF_LIMIT_UPPER 2 0xb00000b 1 0 4294967295 PREF_LIMIT_UPPER 0 31 ixD3F5_IO_BASE_LIMIT_HI 2 0xb00000c 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 ixD3F5_IRQ_BRIDGE_CNTL 2 0xb00000f 8 0 4294967295 PARITY_RESPONSE_EN 16 16 SERR_EN 17 17 ISA_EN 18 18 VGA_EN 19 19 VGA_DEC 20 20 MASTER_ABORT_MODE 21 21 SECONDARY_BUS_RESET 22 22 FAST_B2B_EN 23 23 ixD3F5_CAP_PTR 2 0xb00000d 1 0 4294967295 CAP_PTR 0 7 ixD3F5_INTERRUPT_LINE 2 0xb00000f 1 0 4294967295 INTERRUPT_LINE 0 7 ixD3F5_INTERRUPT_PIN 2 0xb00000f 1 0 4294967295 INTERRUPT_PIN 8 15 ixD3F5_EXT_BRIDGE_CNTL 2 0xb000010 1 0 4294967295 IO_PORT_80_EN 0 0 ixD3F5_PMI_CAP_LIST 2 0xb000014 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F5_PMI_CAP 2 0xb000014 7 0 4294967295 VERSION 16 18 PME_CLOCK 19 19 DEV_SPECIFIC_INIT 21 21 AUX_CURRENT 22 24 D1_SUPPORT 25 25 D2_SUPPORT 26 26 PME_SUPPORT 27 31 ixD3F5_PMI_STATUS_CNTL 2 0xb000015 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 ixD3F5_PCIE_CAP_LIST 2 0xb000016 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F5_PCIE_CAP 2 0xb000016 4 0 4294967295 VERSION 16 19 DEVICE_TYPE 20 23 SLOT_IMPLEMENTED 24 24 INT_MESSAGE_NUM 25 29 ixD3F5_DEVICE_CAP 2 0xb000017 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 ixD3F5_DEVICE_CNTL 2 0xb000018 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 ixD3F5_DEVICE_STATUS 2 0xb000018 6 0 4294967295 CORR_ERR 16 16 NON_FATAL_ERR 17 17 FATAL_ERR 18 18 USR_DETECTED 19 19 AUX_PWR 20 20 TRANSACTIONS_PEND 21 21 ixD3F5_LINK_CAP 2 0xb000019 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 ixD3F5_LINK_CNTL 2 0xb00001a 10 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 ixD3F5_LINK_STATUS 2 0xb00001a 7 0 4294967295 CURRENT_LINK_SPEED 16 19 NEGOTIATED_LINK_WIDTH 20 25 LINK_TRAINING 27 27 SLOT_CLOCK_CFG 28 28 DL_ACTIVE 29 29 LINK_BW_MANAGEMENT_STATUS 30 30 LINK_AUTONOMOUS_BW_STATUS 31 31 ixD3F5_SLOT_CAP 2 0xb00001b 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 ixD3F5_SLOT_CNTL 2 0xb00001c 11 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 ixD3F5_SLOT_STATUS 2 0xb00001c 9 0 4294967295 ATTN_BUTTON_PRESSED 16 16 PWR_FAULT_DETECTED 17 17 MRL_SENSOR_CHANGED 18 18 PRESENCE_DETECT_CHANGED 19 19 COMMAND_COMPLETED 20 20 MRL_SENSOR_STATE 21 21 PRESENCE_DETECT_STATE 22 22 ELECTROMECH_INTERLOCK_STATUS 23 23 DL_STATE_CHANGED 24 24 ixD3F5_ROOT_CNTL 2 0xb00001d 5 0 4294967295 SERR_ON_CORR_ERR_EN 0 0 SERR_ON_NONFATAL_ERR_EN 1 1 SERR_ON_FATAL_ERR_EN 2 2 PM_INTERRUPT_EN 3 3 CRS_SOFTWARE_VISIBILITY_EN 4 4 ixD3F5_ROOT_CAP 2 0xb00001d 1 0 4294967295 CRS_SOFTWARE_VISIBILITY 16 16 ixD3F5_ROOT_STATUS 2 0xb00001e 3 0 4294967295 PME_REQUESTOR_ID 0 15 PME_STATUS 16 16 PME_PENDING 17 17 ixD3F5_DEVICE_CAP2 2 0xb00001f 14 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 ixD3F5_DEVICE_CNTL2 2 0xb000020 10 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 ixD3F5_DEVICE_STATUS2 2 0xb000020 1 0 4294967295 RESERVED 16 31 ixD3F5_LINK_CAP2 2 0xb000021 3 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 RESERVED 9 31 ixD3F5_LINK_CNTL2 2 0xb000022 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 ixD3F5_LINK_STATUS2 2 0xb000022 6 0 4294967295 CUR_DEEMPHASIS_LEVEL 16 16 EQUALIZATION_COMPLETE 17 17 EQUALIZATION_PHASE1_SUCCESS 18 18 EQUALIZATION_PHASE2_SUCCESS 19 19 EQUALIZATION_PHASE3_SUCCESS 20 20 LINK_EQUALIZATION_REQUEST 21 21 ixD3F5_SLOT_CAP2 2 0xb000023 1 0 4294967295 RESERVED 0 31 ixD3F5_SLOT_CNTL2 2 0xb000024 1 0 4294967295 RESERVED 0 15 ixD3F5_SLOT_STATUS2 2 0xb000024 1 0 4294967295 RESERVED 16 31 ixD3F5_MSI_CAP_LIST 2 0xb000028 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F5_MSI_MSG_CNTL 2 0xb000028 5 0 4294967295 MSI_EN 16 16 MSI_MULTI_CAP 17 19 MSI_MULTI_EN 20 22 MSI_64BIT 23 23 MSI_PERVECTOR_MASKING_CAP 24 24 ixD3F5_MSI_MSG_ADDR_LO 2 0xb000029 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 ixD3F5_MSI_MSG_ADDR_HI 2 0xb00002a 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 ixD3F5_MSI_MSG_DATA_64 2 0xb00002b 1 0 4294967295 MSI_DATA_64 0 15 ixD3F5_MSI_MSG_DATA 2 0xb00002a 1 0 4294967295 MSI_DATA 0 15 ixD3F5_SSID_CAP_LIST 2 0xb000030 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F5_SSID_CAP 2 0xb000031 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 ixD3F5_MSI_MAP_CAP_LIST 2 0xb000032 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 ixD3F5_MSI_MAP_CAP 2 0xb000032 3 0 4294967295 EN 16 16 FIXD 17 17 CAP_TYPE 27 31 ixD3F5_MSI_MAP_ADDR_LO 2 0xb000033 1 0 4294967295 MSI_MAP_ADDR_LO 20 31 ixD3F5_MSI_MAP_ADDR_HI 2 0xb000034 1 0 4294967295 MSI_MAP_ADDR_HI 0 31 ixD3F5_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 2 0xb000040 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F5_PCIE_VENDOR_SPECIFIC_HDR 2 0xb000041 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 ixD3F5_PCIE_VENDOR_SPECIFIC1 2 0xb000042 1 0 4294967295 SCRATCH 0 31 ixD3F5_PCIE_VENDOR_SPECIFIC2 2 0xb000043 1 0 4294967295 SCRATCH 0 31 ixD3F5_PCIE_VC_ENH_CAP_LIST 2 0xb000044 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F5_PCIE_PORT_VC_CAP_REG1 2 0xb000045 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 ixD3F5_PCIE_PORT_VC_CAP_REG2 2 0xb000046 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 ixD3F5_PCIE_PORT_VC_CNTL 2 0xb000047 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 ixD3F5_PCIE_PORT_VC_STATUS 2 0xb000047 1 0 4294967295 VC_ARB_TABLE_STATUS 16 16 ixD3F5_PCIE_VC0_RESOURCE_CAP 2 0xb000048 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD3F5_PCIE_VC0_RESOURCE_CNTL 2 0xb000049 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD3F5_PCIE_VC0_RESOURCE_STATUS 2 0xb00004a 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD3F5_PCIE_VC1_RESOURCE_CAP 2 0xb00004b 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 ixD3F5_PCIE_VC1_RESOURCE_CNTL 2 0xb00004c 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 ixD3F5_PCIE_VC1_RESOURCE_STATUS 2 0xb00004d 2 0 4294967295 PORT_ARB_TABLE_STATUS 16 16 VC_NEGOTIATION_PENDING 17 17 ixD3F5_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 2 0xb000050 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F5_PCIE_DEV_SERIAL_NUM_DW1 2 0xb000051 1 0 4294967295 SERIAL_NUMBER_LO 0 31 ixD3F5_PCIE_DEV_SERIAL_NUM_DW2 2 0xb000052 1 0 4294967295 SERIAL_NUMBER_HI 0 31 ixD3F5_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 2 0xb000054 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F5_PCIE_UNCORR_ERR_STATUS 2 0xb000055 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 ixD3F5_PCIE_UNCORR_ERR_MASK 2 0xb000056 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 ixD3F5_PCIE_UNCORR_ERR_SEVERITY 2 0xb000057 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 ixD3F5_PCIE_CORR_ERR_STATUS 2 0xb000058 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 ixD3F5_PCIE_CORR_ERR_MASK 2 0xb000059 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 ixD3F5_PCIE_ADV_ERR_CAP_CNTL 2 0xb00005a 8 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 ixD3F5_PCIE_HDR_LOG0 2 0xb00005b 1 0 4294967295 TLP_HDR 0 31 ixD3F5_PCIE_HDR_LOG1 2 0xb00005c 1 0 4294967295 TLP_HDR 0 31 ixD3F5_PCIE_HDR_LOG2 2 0xb00005d 1 0 4294967295 TLP_HDR 0 31 ixD3F5_PCIE_HDR_LOG3 2 0xb00005e 1 0 4294967295 TLP_HDR 0 31 ixD3F5_PCIE_ROOT_ERR_CMD 2 0xb00005f 3 0 4294967295 CORR_ERR_REP_EN 0 0 NONFATAL_ERR_REP_EN 1 1 FATAL_ERR_REP_EN 2 2 ixD3F5_PCIE_ROOT_ERR_STATUS 2 0xb000060 8 0 4294967295 ERR_CORR_RCVD 0 0 MULT_ERR_CORR_RCVD 1 1 ERR_FATAL_NONFATAL_RCVD 2 2 MULT_ERR_FATAL_NONFATAL_RCVD 3 3 FIRST_UNCORRECTABLE_FATAL 4 4 NONFATAL_ERROR_MSG_RCVD 5 5 FATAL_ERROR_MSG_RCVD 6 6 ADV_ERR_INT_MSG_NUM 27 31 ixD3F5_PCIE_ERR_SRC_ID 2 0xb000061 2 0 4294967295 ERR_CORR_SRC_ID 0 15 ERR_FATAL_NONFATAL_SRC_ID 16 31 ixD3F5_PCIE_TLP_PREFIX_LOG0 2 0xb000062 1 0 4294967295 TLP_PREFIX 0 31 ixD3F5_PCIE_TLP_PREFIX_LOG1 2 0xb000063 1 0 4294967295 TLP_PREFIX 0 31 ixD3F5_PCIE_TLP_PREFIX_LOG2 2 0xb000064 1 0 4294967295 TLP_PREFIX 0 31 ixD3F5_PCIE_TLP_PREFIX_LOG3 2 0xb000065 1 0 4294967295 TLP_PREFIX 0 31 ixD3F5_PCIE_SECONDARY_ENH_CAP_LIST 2 0xb00009c 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F5_PCIE_LINK_CNTL3 2 0xb00009d 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 RESERVED 2 31 ixD3F5_PCIE_LANE_ERROR_STATUS 2 0xb00009e 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 ixD3F5_PCIE_LANE_0_EQUALIZATION_CNTL 2 0xb00009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F5_PCIE_LANE_1_EQUALIZATION_CNTL 2 0xb00009f 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F5_PCIE_LANE_2_EQUALIZATION_CNTL 2 0xb0000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F5_PCIE_LANE_3_EQUALIZATION_CNTL 2 0xb0000a0 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F5_PCIE_LANE_4_EQUALIZATION_CNTL 2 0xb0000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F5_PCIE_LANE_5_EQUALIZATION_CNTL 2 0xb0000a1 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F5_PCIE_LANE_6_EQUALIZATION_CNTL 2 0xb0000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F5_PCIE_LANE_7_EQUALIZATION_CNTL 2 0xb0000a2 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F5_PCIE_LANE_8_EQUALIZATION_CNTL 2 0xb0000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F5_PCIE_LANE_9_EQUALIZATION_CNTL 2 0xb0000a3 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F5_PCIE_LANE_10_EQUALIZATION_CNTL 2 0xb0000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F5_PCIE_LANE_11_EQUALIZATION_CNTL 2 0xb0000a4 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F5_PCIE_LANE_12_EQUALIZATION_CNTL 2 0xb0000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F5_PCIE_LANE_13_EQUALIZATION_CNTL 2 0xb0000a5 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F5_PCIE_LANE_14_EQUALIZATION_CNTL 2 0xb0000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 ixD3F5_PCIE_LANE_15_EQUALIZATION_CNTL 2 0xb0000a6 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 16 19 DOWNSTREAM_PORT_RX_PRESET_HINT 20 22 UPSTREAM_PORT_TX_PRESET 24 27 UPSTREAM_PORT_RX_PRESET_HINT 28 30 RESERVED 31 31 ixD3F5_PCIE_ACS_ENH_CAP_LIST 2 0xb0000a8 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F5_PCIE_ACS_CAP 2 0xb0000a9 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 ixD3F5_PCIE_ACS_CNTL 2 0xb0000a9 7 0 4294967295 SOURCE_VALIDATION_EN 16 16 TRANSLATION_BLOCKING_EN 17 17 P2P_REQUEST_REDIRECT_EN 18 18 P2P_COMPLETION_REDIRECT_EN 19 19 UPSTREAM_FORWARDING_EN 20 20 P2P_EGRESS_CONTROL_EN 21 21 DIRECT_TRANSLATED_P2P_EN 22 22 ixD3F5_PCIE_MC_ENH_CAP_LIST 2 0xb0000bc 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 ixD3F5_PCIE_MC_CAP 2 0xb0000bd 2 0 4294967295 MC_MAX_GROUP 0 5 MC_ECRC_REGEN_SUPP 15 15 ixD3F5_PCIE_MC_CNTL 2 0xb0000bd 2 0 4294967295 MC_NUM_GROUP 16 21 MC_ENABLE 31 31 ixD3F5_PCIE_MC_ADDR0 2 0xb0000be 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 ixD3F5_PCIE_MC_ADDR1 2 0xb0000bf 1 0 4294967295 MC_BASE_ADDR_1 0 31 ixD3F5_PCIE_MC_RCV0 2 0xb0000c0 1 0 4294967295 MC_RECEIVE_0 0 31 ixD3F5_PCIE_MC_RCV1 2 0xb0000c1 1 0 4294967295 MC_RECEIVE_1 0 31 ixD3F5_PCIE_MC_BLOCK_ALL0 2 0xb0000c2 1 0 4294967295 MC_BLOCK_ALL_0 0 31 ixD3F5_PCIE_MC_BLOCK_ALL1 2 0xb0000c3 1 0 4294967295 MC_BLOCK_ALL_1 0 31 ixD3F5_PCIE_MC_BLOCK_UNTRANSLATED_0 2 0xb0000c4 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 ixD3F5_PCIE_MC_BLOCK_UNTRANSLATED_1 2 0xb0000c5 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 ixD3F5_PCIE_MC_OVERLAY_BAR0 2 0xb0000c6 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 ixD3F5_PCIE_MC_OVERLAY_BAR1 2 0xb0000c7 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 mmC_PCIE_INDEX 0 0x28 1 0 4294967295 PCIE_INDEX 0 31 mmPCIE_WRAPPER0_C_PCIE_INDEX 0 0x28 0 0 4294967295 mmPCIE_WRAPPER1_C_PCIE_INDEX 0 0x38 0 0 4294967295 mmC_PCIE_DATA 0 0x29 1 0 4294967295 PCIE_DATA 0 31 mmPCIE_WRAPPER0_C_PCIE_DATA 0 0x29 0 0 4294967295 mmPCIE_WRAPPER1_C_PCIE_DATA 0 0x39 0 0 4294967295 mmRFE_SNOOP_RST 0 0x3c 0 0 4294967295 ixPSX80_WRP_BIF_STRAP_FEATURE_EN_1 2 0x1500000 12 0 4294967295 STRAP_BIF_AER_EN 1 1 STRAP_BIF_ECN1P1_EN 2 2 STRAP_BIF_GEN2_COMPLIANCE 3 3 STRAP_BIF_EN_DEC_TO_HIDDEN_REG 5 5 STRAP_BIF_FORCE_MASTER_TIMEOUT_EN 9 9 STRAP_BIF_TPH_SUPPORTED 11 11 STRAP_BIF_MULTI_FUNC_EN 13 13 STRAP_BIF_2VC_EN 21 21 STRAP_BIF_ARI_EN 23 23 STRAP_BIF_TL_ALT_BUF_EN 28 28 STRAP_BIF_LTR_SUPPORTED 29 29 STRAP_BIF_OBFF_SUPPORTED 30 31 ixPSX80_WRP_BIF_STRAP_PI_CNTL 2 0x1500001 4 0 4294967295 STRAP_BIF_PI_HW_DEBUG 3 12 STRAP_PI_PRBS_CLK_ADJ 13 14 STRAP_RXP_HW_DEBUG 15 20 STRAP_PI_PREP_ELASTDESKEW_FOR_PRBS 21 21 ixPSX80_WRP_BIF_STRAP_LINK_SPEED_CORE 2 0x1500002 3 0 4294967295 STRAP_BIF_ALWAYS_USE_FAST_TXCLK 1 1 STRAP_PLL_CMP_FREQ_MODE 2 3 STRAP_BIF_FORCE_GEN2_MODE 4 4 ixPSX80_WRP_BIF_STRAP_LC_MISC_CORE 2 0x1500003 5 0 4294967295 STRAP_BIF_FORCE_GEN3_MODE 10 10 STRAP_BIF_GEN3_COMPLIANCE 11 11 STRAP_BIF_ECRC_GEN_EN 13 13 STRAP_BIF_ECRC_CHECK_EN 14 14 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 15 16 ixPSX80_WRP_BIF_STRAP_ERROR_IGNORE 2 0x1500004 13 0 4294967295 STRAP_BIF_RX_IGNORE_IO_ERR 0 0 STRAP_BIF_RX_IGNORE_BE_ERR 1 1 STRAP_BIF_RX_IGNORE_MSG_ERR 2 2 STRAP_BIF_RX_IGNORE_CFG_ERR 4 4 STRAP_BIF_RX_IGNORE_CPL_ERR 5 5 STRAP_BIF_RX_IGNORE_EP_ERR 6 6 STRAP_BIF_RX_IGNORE_LEN_MISMATCH_ERR 7 7 STRAP_BIF_RX_IGNORE_MAX_PAYLOAD_ERR 8 8 STRAP_BIF_RX_IGNORE_TC_ERR 9 9 STRAP_BIF_RX_IGNORE_AT_ERR 12 12 STRAP_BIF_ERR_REPORTING_DIS 16 16 STRAP_BIF_CPL_ABORT_ERR_EN 17 17 STRAP_BIF_INTERNAL_ERR_EN 18 18 ixPSX80_WRP_BIF_STRAP_TEST_DFT 2 0x1500005 2 0 4294967295 STRAP_BIF_FORCE_CDR_MODE 26 26 STRAP_BIF_TX_TEST_ALL 30 31 ixPSX80_WRP_BIF_STRAP_ID 2 0x1500006 0 0 4294967295 ixPSX80_WRP_BIF_STRAP_REV_ID 2 0x1500007 0 0 4294967295 ixPSX80_WRP_BIF_STRAP_I2C_CNTL 2 0x1500008 0 0 4294967295 ixPSX80_WRP_BIF_INT_CNTL 2 0x1500009 1 0 4294967295 INT_LINKAUTONOMOUSBWINT 0 0 ixPSX80_WRP_BIF_STRAP_ACS 2 0x150000a 3 0 4294967295 STRAP_BIF_ACS_EN 0 0 STRAP_BIF_ACS_SOURCE_VALIDATION 1 1 STRAP_BIF_ACS_TRANSLATION_BLOCKING 2 2 ixPSX80_WRP_BIF_STRAP_PM 2 0x150000b 0 0 4294967295 ixPSX80_WRP_BIF_STRAP_FEATURE_EN_2 2 0x150000c 6 0 4294967295 STRAP_BIF_KILL_GEN3 0 0 STRAP_BIF_STRAP_F0_ATOMIC_EN 2 2 STRAP_BIF_STRAP_F0_ATOMIC_ROUTING_EN 3 3 STRAP_BIF_MSI_MULTI_CAP 4 6 STRAP_BIF_STRAP_F0_NO_RO_ENABLED_P2P_PASSING 7 7 STRAP_BIF_ENABLE_LEGACY_DEBUG_BUS 8 8 ixPSX80_WRP_BIF_SERIAL_NUM 2 0x1500045 0 0 4294967295 ixPSX80_WRP_BIF_SSID 2 0x1500046 2 0 4294967295 STRAP_BIF_SUBSYS_VEN_ID 0 15 STRAP_BIF_SUBSYS_ID 16 31 ixPSX80_WRP_BIF_LANE_EQUALIZATION_CNTL 2 0x1500050 4 0 4294967295 STRAP_BIF_PCIE_LANE_EQUALIZATION_CNTL_DOWNSTREAM_PORT_RX_PRESET_HINT 0 2 STRAP_BIF_PCIE_LANE_EQUALIZATION_CNTL_UPSTREAM_PORT_RX_PRESET_HINT 3 5 STRAP_BIF_PCIE_LANE_EQUALIZATION_CNTL_DOWNSTREAM_PORT_TX_PRESET 6 9 STRAP_BIF_PCIE_LANE_EQUALIZATION_CNTL_UPSTREAM_PORT_TX_PRESET 10 13 ixPSX80_WRP_PCIE_LINK_CONFIG 2 0x1500080 1 0 4294967295 STRAP_BIF_LINK_CONFIG 0 3 ixPSX80_WRP_PCIE_HOLD_TRAINING_A 2 0x1500800 1 0 4294967295 HOLD_TRAINING 0 0 ixPSX80_WRP_BIF_STRAP_LINK_SPEED_PORT_A 2 0x1500801 8 0 4294967295 STRAP_BIF_AUTO_RC_SPEED_NEGOTIATION_DIS 2 2 STRAP_BIF_LC_TARGET_LINK_SPEED_OVERRIDE_EN 6 6 STRAP_BIF_LC_BYPASS_EQ 7 7 STRAP_BIF_LC_BYPASS_EQ_REQ_PHASE 8 8 STRAP_BIF_LC_EQ_SEARCH_MODE 9 10 STRAP_BIF_TARGET_LINK_SPEED 12 13 STRAP_BIF_LC_EQ_FS 16 21 STRAP_BIF_LC_EQ_LF 24 29 ixPSX80_WRP_BIF_STRAP_ASPM_A 2 0x1500802 4 0 4294967295 STRAP_BIF_PM_SUPPORT 14 15 STRAP_BIF_L1_EXIT_LATENCY 16 18 STRAP_BIF_L0S_EXIT_LATENCY 19 21 STRAP_ENABLE_SIGNAL_EXIT_L1 22 22 ixPSX80_WRP_BIF_STRAP_LC_MISC_PORT_A 2 0x1500803 5 0 4294967295 STRAP_BIF_DE_EMPHASIS_SEL 5 5 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_EN 11 11 STRAP_BIF_LC_SPC_MODE_2P5GT 12 12 STRAP_BIF_LC_SPC_MODE_5GT 13 13 STRAP_BIF_LC_SPC_MODE_8GT 14 14 ixPSX80_WRP_BIF_STRAP_MISC_PORT_A 2 0x1500804 7 0 4294967295 STRAP_BIF_POISONED_ADVISORY_NONFATAL 0 0 STRAP_BIF_MAX_PAYLOAD_SUPPORT 1 3 STRAP_BIF_FIRST_RCVD_ERR_LOG 4 4 STRAP_BIF_EXTENDED_FMT_SUPPORTED 5 5 STRAP_BIF_E2E_PREFIX_EN 6 6 STRAP_BIF_BCH_ECC_EN 7 7 STRAP_BIF_MC_ECRC_REGEN_SUPP 8 8 ixPSX80_WRP_BIF_STRAP_LINK_TRAINING_A 2 0x1500805 2 0 4294967295 STRAP_BIF_LC_ENHANCED_HOT_PLUG_EN 9 9 STRAP_BIF_INITIAL_N_FTS 24 31 ixPSX80_WRP_PCIE_PORT_IS_SB_A 2 0x1500813 1 0 4294967295 PORT_IS_SB 0 0 ixPSX80_WRP_PCIE_HOLD_TRAINING_B 2 0x1500900 1 0 4294967295 HOLD_TRAINING 0 0 ixPSX80_WRP_BIF_STRAP_LINK_SPEED_PORT_B 2 0x1500901 8 0 4294967295 STRAP_BIF_AUTO_RC_SPEED_NEGOTIATION_DIS 2 2 STRAP_BIF_LC_TARGET_LINK_SPEED_OVERRIDE_EN 6 6 STRAP_BIF_LC_BYPASS_EQ 7 7 STRAP_BIF_LC_BYPASS_EQ_REQ_PHASE 8 8 STRAP_BIF_LC_EQ_SEARCH_MODE 9 10 STRAP_BIF_TARGET_LINK_SPEED 12 13 STRAP_BIF_LC_EQ_FS 16 21 STRAP_BIF_LC_EQ_LF 24 29 ixPSX80_WRP_BIF_STRAP_ASPM_B 2 0x1500902 4 0 4294967295 STRAP_BIF_PM_SUPPORT 14 15 STRAP_BIF_L1_EXIT_LATENCY 16 18 STRAP_BIF_L0S_EXIT_LATENCY 19 21 STRAP_ENABLE_SIGNAL_EXIT_L1 22 22 ixPSX80_WRP_BIF_STRAP_LC_MISC_PORT_B 2 0x1500903 5 0 4294967295 STRAP_BIF_DE_EMPHASIS_SEL 5 5 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_EN 11 11 STRAP_BIF_LC_SPC_MODE_2P5GT 12 12 STRAP_BIF_LC_SPC_MODE_5GT 13 13 STRAP_BIF_LC_SPC_MODE_8GT 14 14 ixPSX80_WRP_BIF_STRAP_MISC_PORT_B 2 0x1500904 7 0 4294967295 STRAP_BIF_POISONED_ADVISORY_NONFATAL 0 0 STRAP_BIF_MAX_PAYLOAD_SUPPORT 1 3 STRAP_BIF_FIRST_RCVD_ERR_LOG 4 4 STRAP_BIF_EXTENDED_FMT_SUPPORTED 5 5 STRAP_BIF_E2E_PREFIX_EN 6 6 STRAP_BIF_BCH_ECC_EN 7 7 STRAP_BIF_MC_ECRC_REGEN_SUPP 8 8 ixPSX80_WRP_BIF_STRAP_LINK_TRAINING_B 2 0x1500905 2 0 4294967295 STRAP_BIF_LC_ENHANCED_HOT_PLUG_EN 9 9 STRAP_BIF_INITIAL_N_FTS 24 31 ixPSX80_WRP_PCIE_PORT_IS_SB_B 2 0x1500913 1 0 4294967295 PORT_IS_SB 0 0 ixPSX80_WRP_PCIE_HOLD_TRAINING_C 2 0x1500a00 1 0 4294967295 HOLD_TRAINING 0 0 ixPSX80_WRP_BIF_STRAP_LINK_SPEED_PORT_C 2 0x1500a01 8 0 4294967295 STRAP_BIF_AUTO_RC_SPEED_NEGOTIATION_DIS 2 2 STRAP_BIF_LC_TARGET_LINK_SPEED_OVERRIDE_EN 6 6 STRAP_BIF_LC_BYPASS_EQ 7 7 STRAP_BIF_LC_BYPASS_EQ_REQ_PHASE 8 8 STRAP_BIF_LC_EQ_SEARCH_MODE 9 10 STRAP_BIF_TARGET_LINK_SPEED 12 13 STRAP_BIF_LC_EQ_FS 16 21 STRAP_BIF_LC_EQ_LF 24 29 ixPSX80_WRP_BIF_STRAP_ASPM_C 2 0x1500a02 4 0 4294967295 STRAP_BIF_PM_SUPPORT 14 15 STRAP_BIF_L1_EXIT_LATENCY 16 18 STRAP_BIF_L0S_EXIT_LATENCY 19 21 STRAP_ENABLE_SIGNAL_EXIT_L1 22 22 ixPSX80_WRP_BIF_STRAP_LC_MISC_PORT_C 2 0x1500a03 5 0 4294967295 STRAP_BIF_DE_EMPHASIS_SEL 5 5 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_EN 11 11 STRAP_BIF_LC_SPC_MODE_2P5GT 12 12 STRAP_BIF_LC_SPC_MODE_5GT 13 13 STRAP_BIF_LC_SPC_MODE_8GT 14 14 ixPSX80_WRP_BIF_STRAP_MISC_PORT_C 2 0x1500a04 7 0 4294967295 STRAP_BIF_POISONED_ADVISORY_NONFATAL 0 0 STRAP_BIF_MAX_PAYLOAD_SUPPORT 1 3 STRAP_BIF_FIRST_RCVD_ERR_LOG 4 4 STRAP_BIF_EXTENDED_FMT_SUPPORTED 5 5 STRAP_BIF_E2E_PREFIX_EN 6 6 STRAP_BIF_BCH_ECC_EN 7 7 STRAP_BIF_MC_ECRC_REGEN_SUPP 8 8 ixPSX80_WRP_BIF_STRAP_LINK_TRAINING_C 2 0x1500a05 2 0 4294967295 STRAP_BIF_LC_ENHANCED_HOT_PLUG_EN 9 9 STRAP_BIF_INITIAL_N_FTS 24 31 ixPSX80_WRP_PCIE_PORT_IS_SB_C 2 0x1500a13 1 0 4294967295 PORT_IS_SB 0 0 ixPSX80_WRP_PCIE_HOLD_TRAINING_D 2 0x1500b00 1 0 4294967295 HOLD_TRAINING 0 0 ixPSX80_WRP_BIF_STRAP_LINK_SPEED_PORT_D 2 0x1500b01 8 0 4294967295 STRAP_BIF_AUTO_RC_SPEED_NEGOTIATION_DIS 2 2 STRAP_BIF_LC_TARGET_LINK_SPEED_OVERRIDE_EN 6 6 STRAP_BIF_LC_BYPASS_EQ 7 7 STRAP_BIF_LC_BYPASS_EQ_REQ_PHASE 8 8 STRAP_BIF_LC_EQ_SEARCH_MODE 9 10 STRAP_BIF_TARGET_LINK_SPEED 12 13 STRAP_BIF_LC_EQ_FS 16 21 STRAP_BIF_LC_EQ_LF 24 29 ixPSX80_WRP_BIF_STRAP_ASPM_D 2 0x1500b02 4 0 4294967295 STRAP_BIF_PM_SUPPORT 14 15 STRAP_BIF_L1_EXIT_LATENCY 16 18 STRAP_BIF_L0S_EXIT_LATENCY 19 21 STRAP_ENABLE_SIGNAL_EXIT_L1 22 22 ixPSX80_WRP_BIF_STRAP_LC_MISC_PORT_D 2 0x1500b03 5 0 4294967295 STRAP_BIF_DE_EMPHASIS_SEL 5 5 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_EN 11 11 STRAP_BIF_LC_SPC_MODE_2P5GT 12 12 STRAP_BIF_LC_SPC_MODE_5GT 13 13 STRAP_BIF_LC_SPC_MODE_8GT 14 14 ixPSX80_WRP_BIF_STRAP_MISC_PORT_D 2 0x1500b04 7 0 4294967295 STRAP_BIF_POISONED_ADVISORY_NONFATAL 0 0 STRAP_BIF_MAX_PAYLOAD_SUPPORT 1 3 STRAP_BIF_FIRST_RCVD_ERR_LOG 4 4 STRAP_BIF_EXTENDED_FMT_SUPPORTED 5 5 STRAP_BIF_E2E_PREFIX_EN 6 6 STRAP_BIF_BCH_ECC_EN 7 7 STRAP_BIF_MC_ECRC_REGEN_SUPP 8 8 ixPSX80_WRP_BIF_STRAP_LINK_TRAINING_D 2 0x1500b05 2 0 4294967295 STRAP_BIF_LC_ENHANCED_HOT_PLUG_EN 9 9 STRAP_BIF_INITIAL_N_FTS 24 31 ixPSX80_WRP_PCIE_PORT_IS_SB_D 2 0x1500b13 1 0 4294967295 PORT_IS_SB 0 0 ixPSX80_WRP_PCIE_HOLD_TRAINING_E 2 0x1500c00 1 0 4294967295 HOLD_TRAINING 0 0 ixPSX80_WRP_BIF_STRAP_LINK_SPEED_PORT_E 2 0x1500c01 8 0 4294967295 STRAP_BIF_AUTO_RC_SPEED_NEGOTIATION_DIS 2 2 STRAP_BIF_LC_TARGET_LINK_SPEED_OVERRIDE_EN 6 6 STRAP_BIF_LC_BYPASS_EQ 7 7 STRAP_BIF_LC_BYPASS_EQ_REQ_PHASE 8 8 STRAP_BIF_LC_EQ_SEARCH_MODE 9 10 STRAP_BIF_TARGET_LINK_SPEED 12 13 STRAP_BIF_LC_EQ_FS 16 21 STRAP_BIF_LC_EQ_LF 24 29 ixPSX80_WRP_BIF_STRAP_ASPM_E 2 0x1500c02 4 0 4294967295 STRAP_BIF_PM_SUPPORT 14 15 STRAP_BIF_L1_EXIT_LATENCY 16 18 STRAP_BIF_L0S_EXIT_LATENCY 19 21 STRAP_ENABLE_SIGNAL_EXIT_L1 22 22 ixPSX80_WRP_BIF_STRAP_LC_MISC_PORT_E 2 0x1500c03 5 0 4294967295 STRAP_BIF_DE_EMPHASIS_SEL 5 5 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_EN 11 11 STRAP_BIF_LC_SPC_MODE_2P5GT 12 12 STRAP_BIF_LC_SPC_MODE_5GT 13 13 STRAP_BIF_LC_SPC_MODE_8GT 14 14 ixPSX80_WRP_BIF_STRAP_MISC_PORT_E 2 0x1500c04 7 0 4294967295 STRAP_BIF_POISONED_ADVISORY_NONFATAL 0 0 STRAP_BIF_MAX_PAYLOAD_SUPPORT 1 3 STRAP_BIF_FIRST_RCVD_ERR_LOG 4 4 STRAP_BIF_EXTENDED_FMT_SUPPORTED 5 5 STRAP_BIF_E2E_PREFIX_EN 6 6 STRAP_BIF_BCH_ECC_EN 7 7 STRAP_BIF_MC_ECRC_REGEN_SUPP 8 8 ixPSX80_WRP_BIF_STRAP_LINK_TRAINING_E 2 0x1500c05 2 0 4294967295 STRAP_BIF_LC_ENHANCED_HOT_PLUG_EN 9 9 STRAP_BIF_INITIAL_N_FTS 24 31 ixPSX80_WRP_PCIE_PORT_IS_SB_E 2 0x1500c13 1 0 4294967295 PORT_IS_SB 0 0 ixPSX80_WRP_LNCNT_CONTROL 2 0x1508030 5 0 4294967295 CFG_LNC_WINDOW_EN0 0 0 CFG_LNC_BW_CNT_EN1 1 1 CFG_LNC_CMN_CNT_EN2 2 2 CFG_LNC_OVRD_EN3 3 3 CFG_LNC_OVRD_VAL4 4 4 ixPSX80_WRP_CFG_LNC_WINDOW 2 0x1508031 1 0 4294967295 CFG_LNC_WINDOW0 0 23 ixPSX80_WRP_LNCNT_QUAN_THRD 2 0x1508032 2 0 4294967295 CFG_LNC_BW_QUAN_THRD0 0 2 CFG_LNC_CMN_QUAN_THRD4 4 6 ixPSX80_WRP_LNCNT_WEIGHT 2 0x1508033 2 0 4294967295 CFG_LNC_BW_WEIGHT0 0 15 CFG_LNC_CMN_WEIGHT16 16 31 ixPSX80_WRP_LNC_TOTAL_WACC 2 0x1508034 1 0 4294967295 LNC_TOTAL_WACC 0 31 ixPSX80_WRP_LNC_BW_WACC 2 0x1508035 1 0 4294967295 LNC_BW_WACC 0 31 ixPSX80_WRP_LNC_CMN_WACC 2 0x1508036 1 0 4294967295 LNC_CMN_WACC 0 31 ixPSX80_WRP_PCIE_EFUSE 2 0x150fff0 1 0 4294967295 PCIE_EFUSE 0 31 ixPSX80_WRP_PCIE_EFUSE2 2 0x150fff1 1 0 4294967295 PCIE_EFUSE2 0 31 ixPSX80_WRP_PCIE_EFUSE3 2 0x150fff2 1 0 4294967295 PCIE_EFUSE3 0 31 ixPSX80_WRP_PCIE_EFUSE4 2 0x150fff3 1 0 4294967295 PCIE_EFUSE4 0 31 ixPSX80_WRP_PCIE_EFUSE5 2 0x150fff4 1 0 4294967295 PCIE_EFUSE5 0 31 ixPSX80_WRP_PCIE_EFUSE6 2 0x150fff5 1 0 4294967295 PCIE_EFUSE6 0 31 ixPSX80_WRP_PCIE_EFUSE7 2 0x150fff6 1 0 4294967295 PCIE_EFUSE7 0 31 ixPSX80_WRP_PCIE_WRAP_SCRATCH1 2 0x1308001 1 0 4294967295 PCIE_WRAP_SCRATCH1 0 31 ixPSX80_WRP_PCIE_WRAP_SCRATCH2 2 0x1308002 1 0 4294967295 PCIE_WRAP_SCRATCH2 0 31 ixPSX80_WRP_PCIE_WRAP_REG_TARG_MISC 2 0x1308005 1 0 4294967295 CLKEN_MASK 0 0 ixPSX80_WRP_PCIE_WRAP_DTM_MISC 2 0x1308006 1 0 4294967295 DTM_BULKPHY_FREQDIV_OVERRIDE 0 0 ixPSX80_WRP_PCIE_WRAP_TURNAROUND_DAISYCHAIN 2 0x1308007 2 0 4294967295 END_BIFCORE_REGISTER_DAISYCHAIN 0 0 END_WRAPPER_REGISTER_DAISYCHAIN 1 1 ixPSX80_WRP_PCIE_WRAP_MISC 2 0x1308008 2 0 4294967295 HOLD_TRAINING_STICKY 1 1 STRAP_BIF_QUICKSIM_START 2 2 ixPSX80_WRP_PCIE_WRAP_PIF_MISC 2 0x1308009 4 0 4294967295 DTM_PIF_DELAY_FI 0 2 DTM_PIF_DELAY_DI 4 6 DTM_PIF_ATSEL_FI 7 7 DTM_PIF_ATSEL_DI 8 8 ixPSX80_WRP_PCIE_RXDET_OVERRIDE 2 0x130800a 2 0 4294967295 RxDetOvrVal 0 7 RxDetOvrEn 16 16 ixPSX80_WRP_IMPCTL_CNTL_PIF0 2 0x1308070 2 0 4294967295 ArbEn0 0 0 QuickSimOverRide0 11 11 ixPSX80_WRP_REG_ADAPT_pciecore0_CONTROL 2 0x1308090 1 0 4294967295 ACCESS_MODE_pciecore0 0 0 ixPSX80_WRP_REG_ADAPT_pwregt_CONTROL 2 0x1308096 1 0 4294967295 ACCESS_MODE_pwregt 0 0 ixPSX80_WRP_REG_ADAPT_pwregr_CONTROL 2 0x1308097 1 0 4294967295 ACCESS_MODE_pwregr 0 0 ixPSX80_WRP_REG_ADAPT_pif0_CONTROL 2 0x1308098 1 0 4294967295 ACCESS_MODE_pif0 0 0 ixPSX80_WRP_BIOSTIMER_CMD 2 0x13080f0 1 0 4294967295 Microseconds 0 31 ixPSX80_WRP_BIOSTIMER_CNTL 2 0x13080f1 1 0 4294967295 ClockRate 0 7 ixPSX80_WRP_BIOSTIMER_DEBUG 2 0x13080f2 1 0 4294967295 Microseconds_compare 0 31 ixPSX80_WRP_DTM_RX_BP_CNTL 2 0x130ffe0 4 0 4294967295 rxElasBP_Cntl 0 7 Dbg_Cntl 16 19 rxElasBP_SlideValue 20 23 td_hold_training_override 24 28 ixPSX80_WRP_DTM_CNTL 2 0x130ffe1 26 0 4294967295 Dtm_Dummy0 0 0 Dtm_Dummy1 1 1 Determinism_En_DTM 2 2 Dtm_Dummy2 3 3 Dtm_Dummy3 4 4 Dtm_Dummy4 5 5 Dtm_Dummy5 6 6 Dtm_Dummy6 7 7 TxClk1x_Cntl 8 9 TxClkGskt_Cntl 10 11 refClk_Cntl 12 13 dtmClk_Sel_Timer 14 15 Dtm_Dummy7 16 16 Dtm_Dummy8 17 17 Dtm_Dummy9 18 18 Dtm_Dummy10 19 19 Dtm_Dummy11 20 20 Dtm_Dummy12 21 21 rxElasWidth_Cntl 22 23 Dtm_Dummy13 24 24 Dtm_Dummy14 25 25 Dtm_Dummy15 26 26 Dtm_Dummy16 27 27 Dtm_Dummy17 28 28 Warm_RstTimer 29 30 Dtm_Dummy18 31 31 ixPSX80_WRP_DTM_CNTL_LEGACY 2 0x130ffe2 10 0 4294967295 Dtm_Dummy19 0 0 fifoInit_one_dropout 1 1 Dtm_Clk_2sym 2 2 Dtm_GsktClk_2sym 3 3 Dtm_hardRst_slide 4 5 Dtm_earlyRst_slide 6 7 Dtm_txPhyStsOk_slide 8 9 Dtm_Sti_TXCLK_Period 12 15 Dtm_Sti_TXCLK_Send 16 19 Dtm_Sti_TXCLK_Rcv 20 23 ixPSX80_WRP_DTM_STI_LCLK_CTRL 2 0x130ffe3 3 0 4294967295 Dtm_Sti_LCLK_Period 0 8 Dtm_Sti_LCLK_Send 9 17 Dtm_Sti_LCLK_Rcv 18 26 ixPSX80_WRP_DTM_DENTIST_GATE_TIMING_DI_clk10x 2 0x130ffe4 3 0 4294967295 DentistGate_startTime_DI_clk10x 0 7 DentistGate_dropoutTime_DI_clk10x 8 15 DentistGate_stopTime_DI_clk10x 16 23 ixPSX80_WRP_DTM_DENTIST_GATE_TIMING_DI_clkGskt 2 0x130ffe5 3 0 4294967295 DentistGate_startTime_DI_clkGskt 0 7 DentistGate_dropoutTime_DI_clkGskt 8 15 DentistGate_stopTime_DI_clkGskt 16 23 ixPSX80_WRP_DTM_DENTIST_GATE_TIMING_FI_clk10x 2 0x130ffe6 3 0 4294967295 DentistGate_startTime_FI_clk10x 0 7 DentistGate_dropoutTime_FI_clk10x 8 15 DentistGate_stopTime_FI_clk10x 16 23 ixPSX80_WRP_DTM_DENTIST_GATE_TIMING_FI_clkGskt 2 0x130ffe7 3 0 4294967295 DentistGate_startTime_FI_clkGskt 0 7 DentistGate_dropoutTime_FI_clkGskt 8 15 DentistGate_stopTime_FI_clkGskt 16 23 ixPSX80_WRP_DELAYLINE_COMMAND 2 0x130ffd0 11 0 4294967295 CFG_DPC_modeCharz 0 0 CFG_DPC_modeMaintainLock 1 1 CFG_DPC_modeWidePhase 2 2 CFG_DPC_modeOverrideDelay 3 3 CFG_DPC_delayOverride 8 15 CFG_DPC_cmdIdle 16 16 CFG_DPC_cmdStart 17 17 CFG_DPC_cmdRestart 18 18 CFG_DPC_Enable 20 20 CFG_DPC_FastCkStable 21 21 CFG_DPC_spare 28 31 ixPSX80_WRP_DELAYLINE_STATUS 2 0x130ffd1 8 0 4294967295 DPC_CFG_controllerIdle 0 0 DPC_CFG_commandComplete 1 1 DPC_CFG_phaseLocked 2 2 DPC_CFG_posAlignmentVld 3 3 DPC_CFG_negAlignmentVld 4 4 DPC_CFG_posDelayValue 8 15 DPC_CFG_negDelayValue 16 23 DPC_CFG_freqRatio 24 28 ixPSX81_WRP_BIF_STRAP_FEATURE_EN_1 2 0x1510000 12 0 4294967295 STRAP_BIF_AER_EN 1 1 STRAP_BIF_ECN1P1_EN 2 2 STRAP_BIF_GEN2_COMPLIANCE 3 3 STRAP_BIF_EN_DEC_TO_HIDDEN_REG 5 5 STRAP_BIF_FORCE_MASTER_TIMEOUT_EN 9 9 STRAP_BIF_TPH_SUPPORTED 11 11 STRAP_BIF_MULTI_FUNC_EN 13 13 STRAP_BIF_2VC_EN 21 21 STRAP_BIF_ARI_EN 23 23 STRAP_BIF_TL_ALT_BUF_EN 28 28 STRAP_BIF_LTR_SUPPORTED 29 29 STRAP_BIF_OBFF_SUPPORTED 30 31 ixPSX81_WRP_BIF_STRAP_PI_CNTL 2 0x1510001 4 0 4294967295 STRAP_BIF_PI_HW_DEBUG 3 12 STRAP_PI_PRBS_CLK_ADJ 13 14 STRAP_RXP_HW_DEBUG 15 20 STRAP_PI_PREP_ELASTDESKEW_FOR_PRBS 21 21 ixPSX81_WRP_BIF_STRAP_LINK_SPEED_CORE 2 0x1510002 3 0 4294967295 STRAP_BIF_ALWAYS_USE_FAST_TXCLK 1 1 STRAP_PLL_CMP_FREQ_MODE 2 3 STRAP_BIF_FORCE_GEN2_MODE 4 4 ixPSX81_WRP_BIF_STRAP_LC_MISC_CORE 2 0x1510003 5 0 4294967295 STRAP_BIF_FORCE_GEN3_MODE 10 10 STRAP_BIF_GEN3_COMPLIANCE 11 11 STRAP_BIF_ECRC_GEN_EN 13 13 STRAP_BIF_ECRC_CHECK_EN 14 14 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_MAX_FAIL_SEL 15 16 ixPSX81_WRP_BIF_STRAP_ERROR_IGNORE 2 0x1510004 13 0 4294967295 STRAP_BIF_RX_IGNORE_IO_ERR 0 0 STRAP_BIF_RX_IGNORE_BE_ERR 1 1 STRAP_BIF_RX_IGNORE_MSG_ERR 2 2 STRAP_BIF_RX_IGNORE_CFG_ERR 4 4 STRAP_BIF_RX_IGNORE_CPL_ERR 5 5 STRAP_BIF_RX_IGNORE_EP_ERR 6 6 STRAP_BIF_RX_IGNORE_LEN_MISMATCH_ERR 7 7 STRAP_BIF_RX_IGNORE_MAX_PAYLOAD_ERR 8 8 STRAP_BIF_RX_IGNORE_TC_ERR 9 9 STRAP_BIF_RX_IGNORE_AT_ERR 12 12 STRAP_BIF_ERR_REPORTING_DIS 16 16 STRAP_BIF_CPL_ABORT_ERR_EN 17 17 STRAP_BIF_INTERNAL_ERR_EN 18 18 ixPSX81_WRP_BIF_STRAP_TEST_DFT 2 0x1510005 2 0 4294967295 STRAP_BIF_FORCE_CDR_MODE 26 26 STRAP_BIF_TX_TEST_ALL 30 31 ixPSX81_WRP_BIF_STRAP_ID 2 0x1510006 0 0 4294967295 ixPSX81_WRP_BIF_STRAP_REV_ID 2 0x1510007 0 0 4294967295 ixPSX81_WRP_BIF_STRAP_I2C_CNTL 2 0x1510008 0 0 4294967295 ixPSX81_WRP_BIF_INT_CNTL 2 0x1510009 1 0 4294967295 INT_LINKAUTONOMOUSBWINT 0 0 ixPSX81_WRP_BIF_STRAP_ACS 2 0x151000a 3 0 4294967295 STRAP_BIF_ACS_EN 0 0 STRAP_BIF_ACS_SOURCE_VALIDATION 1 1 STRAP_BIF_ACS_TRANSLATION_BLOCKING 2 2 ixPSX81_WRP_BIF_STRAP_PM 2 0x151000b 0 0 4294967295 ixPSX81_WRP_BIF_STRAP_FEATURE_EN_2 2 0x151000c 6 0 4294967295 STRAP_BIF_KILL_GEN3 0 0 STRAP_BIF_STRAP_F0_ATOMIC_EN 2 2 STRAP_BIF_STRAP_F0_ATOMIC_ROUTING_EN 3 3 STRAP_BIF_MSI_MULTI_CAP 4 6 STRAP_BIF_STRAP_F0_NO_RO_ENABLED_P2P_PASSING 7 7 STRAP_BIF_ENABLE_LEGACY_DEBUG_BUS 8 8 ixPSX81_WRP_BIF_SERIAL_NUM 2 0x1510045 0 0 4294967295 ixPSX81_WRP_BIF_SSID 2 0x1510046 2 0 4294967295 STRAP_BIF_SUBSYS_VEN_ID 0 15 STRAP_BIF_SUBSYS_ID 16 31 ixPSX81_WRP_BIF_LANE_EQUALIZATION_CNTL 2 0x1510050 4 0 4294967295 STRAP_BIF_PCIE_LANE_EQUALIZATION_CNTL_DOWNSTREAM_PORT_RX_PRESET_HINT 0 2 STRAP_BIF_PCIE_LANE_EQUALIZATION_CNTL_UPSTREAM_PORT_RX_PRESET_HINT 3 5 STRAP_BIF_PCIE_LANE_EQUALIZATION_CNTL_DOWNSTREAM_PORT_TX_PRESET 6 9 STRAP_BIF_PCIE_LANE_EQUALIZATION_CNTL_UPSTREAM_PORT_TX_PRESET 10 13 ixPSX81_WRP_PCIE_LINK_CONFIG 2 0x1510080 1 0 4294967295 STRAP_BIF_LINK_CONFIG 0 3 ixPSX81_WRP_PCIE_HOLD_TRAINING_A 2 0x1510800 1 0 4294967295 HOLD_TRAINING 0 0 ixPSX81_WRP_BIF_STRAP_LINK_SPEED_PORT_A 2 0x1510801 8 0 4294967295 STRAP_BIF_AUTO_RC_SPEED_NEGOTIATION_DIS 2 2 STRAP_BIF_LC_TARGET_LINK_SPEED_OVERRIDE_EN 6 6 STRAP_BIF_LC_BYPASS_EQ 7 7 STRAP_BIF_LC_BYPASS_EQ_REQ_PHASE 8 8 STRAP_BIF_LC_EQ_SEARCH_MODE 9 10 STRAP_BIF_TARGET_LINK_SPEED 12 13 STRAP_BIF_LC_EQ_FS 16 21 STRAP_BIF_LC_EQ_LF 24 29 ixPSX81_WRP_BIF_STRAP_ASPM_A 2 0x1510802 4 0 4294967295 STRAP_BIF_PM_SUPPORT 14 15 STRAP_BIF_L1_EXIT_LATENCY 16 18 STRAP_BIF_L0S_EXIT_LATENCY 19 21 STRAP_ENABLE_SIGNAL_EXIT_L1 22 22 ixPSX81_WRP_BIF_STRAP_LC_MISC_PORT_A 2 0x1510803 5 0 4294967295 STRAP_BIF_DE_EMPHASIS_SEL 5 5 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_EN 11 11 STRAP_BIF_LC_SPC_MODE_2P5GT 12 12 STRAP_BIF_LC_SPC_MODE_5GT 13 13 STRAP_BIF_LC_SPC_MODE_8GT 14 14 ixPSX81_WRP_BIF_STRAP_MISC_PORT_A 2 0x1510804 7 0 4294967295 STRAP_BIF_POISONED_ADVISORY_NONFATAL 0 0 STRAP_BIF_MAX_PAYLOAD_SUPPORT 1 3 STRAP_BIF_FIRST_RCVD_ERR_LOG 4 4 STRAP_BIF_EXTENDED_FMT_SUPPORTED 5 5 STRAP_BIF_E2E_PREFIX_EN 6 6 STRAP_BIF_BCH_ECC_EN 7 7 STRAP_BIF_MC_ECRC_REGEN_SUPP 8 8 ixPSX81_WRP_BIF_STRAP_LINK_TRAINING_A 2 0x1510805 2 0 4294967295 STRAP_BIF_LC_ENHANCED_HOT_PLUG_EN 9 9 STRAP_BIF_INITIAL_N_FTS 24 31 ixPSX81_WRP_PCIE_PORT_IS_SB_A 2 0x1510813 1 0 4294967295 PORT_IS_SB 0 0 ixPSX81_WRP_PCIE_HOLD_TRAINING_B 2 0x1510900 1 0 4294967295 HOLD_TRAINING 0 0 ixPSX81_WRP_BIF_STRAP_LINK_SPEED_PORT_B 2 0x1510901 8 0 4294967295 STRAP_BIF_AUTO_RC_SPEED_NEGOTIATION_DIS 2 2 STRAP_BIF_LC_TARGET_LINK_SPEED_OVERRIDE_EN 6 6 STRAP_BIF_LC_BYPASS_EQ 7 7 STRAP_BIF_LC_BYPASS_EQ_REQ_PHASE 8 8 STRAP_BIF_LC_EQ_SEARCH_MODE 9 10 STRAP_BIF_TARGET_LINK_SPEED 12 13 STRAP_BIF_LC_EQ_FS 16 21 STRAP_BIF_LC_EQ_LF 24 29 ixPSX81_WRP_BIF_STRAP_ASPM_B 2 0x1510902 4 0 4294967295 STRAP_BIF_PM_SUPPORT 14 15 STRAP_BIF_L1_EXIT_LATENCY 16 18 STRAP_BIF_L0S_EXIT_LATENCY 19 21 STRAP_ENABLE_SIGNAL_EXIT_L1 22 22 ixPSX81_WRP_BIF_STRAP_LC_MISC_PORT_B 2 0x1510903 5 0 4294967295 STRAP_BIF_DE_EMPHASIS_SEL 5 5 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_EN 11 11 STRAP_BIF_LC_SPC_MODE_2P5GT 12 12 STRAP_BIF_LC_SPC_MODE_5GT 13 13 STRAP_BIF_LC_SPC_MODE_8GT 14 14 ixPSX81_WRP_BIF_STRAP_MISC_PORT_B 2 0x1510904 7 0 4294967295 STRAP_BIF_POISONED_ADVISORY_NONFATAL 0 0 STRAP_BIF_MAX_PAYLOAD_SUPPORT 1 3 STRAP_BIF_FIRST_RCVD_ERR_LOG 4 4 STRAP_BIF_EXTENDED_FMT_SUPPORTED 5 5 STRAP_BIF_E2E_PREFIX_EN 6 6 STRAP_BIF_BCH_ECC_EN 7 7 STRAP_BIF_MC_ECRC_REGEN_SUPP 8 8 ixPSX81_WRP_BIF_STRAP_LINK_TRAINING_B 2 0x1510905 2 0 4294967295 STRAP_BIF_LC_ENHANCED_HOT_PLUG_EN 9 9 STRAP_BIF_INITIAL_N_FTS 24 31 ixPSX81_WRP_PCIE_PORT_IS_SB_B 2 0x1510913 1 0 4294967295 PORT_IS_SB 0 0 ixPSX81_WRP_PCIE_HOLD_TRAINING_C 2 0x1510a00 1 0 4294967295 HOLD_TRAINING 0 0 ixPSX81_WRP_BIF_STRAP_LINK_SPEED_PORT_C 2 0x1510a01 8 0 4294967295 STRAP_BIF_AUTO_RC_SPEED_NEGOTIATION_DIS 2 2 STRAP_BIF_LC_TARGET_LINK_SPEED_OVERRIDE_EN 6 6 STRAP_BIF_LC_BYPASS_EQ 7 7 STRAP_BIF_LC_BYPASS_EQ_REQ_PHASE 8 8 STRAP_BIF_LC_EQ_SEARCH_MODE 9 10 STRAP_BIF_TARGET_LINK_SPEED 12 13 STRAP_BIF_LC_EQ_FS 16 21 STRAP_BIF_LC_EQ_LF 24 29 ixPSX81_WRP_BIF_STRAP_ASPM_C 2 0x1510a02 4 0 4294967295 STRAP_BIF_PM_SUPPORT 14 15 STRAP_BIF_L1_EXIT_LATENCY 16 18 STRAP_BIF_L0S_EXIT_LATENCY 19 21 STRAP_ENABLE_SIGNAL_EXIT_L1 22 22 ixPSX81_WRP_BIF_STRAP_LC_MISC_PORT_C 2 0x1510a03 5 0 4294967295 STRAP_BIF_DE_EMPHASIS_SEL 5 5 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_EN 11 11 STRAP_BIF_LC_SPC_MODE_2P5GT 12 12 STRAP_BIF_LC_SPC_MODE_5GT 13 13 STRAP_BIF_LC_SPC_MODE_8GT 14 14 ixPSX81_WRP_BIF_STRAP_MISC_PORT_C 2 0x1510a04 7 0 4294967295 STRAP_BIF_POISONED_ADVISORY_NONFATAL 0 0 STRAP_BIF_MAX_PAYLOAD_SUPPORT 1 3 STRAP_BIF_FIRST_RCVD_ERR_LOG 4 4 STRAP_BIF_EXTENDED_FMT_SUPPORTED 5 5 STRAP_BIF_E2E_PREFIX_EN 6 6 STRAP_BIF_BCH_ECC_EN 7 7 STRAP_BIF_MC_ECRC_REGEN_SUPP 8 8 ixPSX81_WRP_BIF_STRAP_LINK_TRAINING_C 2 0x1510a05 2 0 4294967295 STRAP_BIF_LC_ENHANCED_HOT_PLUG_EN 9 9 STRAP_BIF_INITIAL_N_FTS 24 31 ixPSX81_WRP_PCIE_PORT_IS_SB_C 2 0x1510a13 1 0 4294967295 PORT_IS_SB 0 0 ixPSX81_WRP_PCIE_HOLD_TRAINING_D 2 0x1510b00 1 0 4294967295 HOLD_TRAINING 0 0 ixPSX81_WRP_BIF_STRAP_LINK_SPEED_PORT_D 2 0x1510b01 8 0 4294967295 STRAP_BIF_AUTO_RC_SPEED_NEGOTIATION_DIS 2 2 STRAP_BIF_LC_TARGET_LINK_SPEED_OVERRIDE_EN 6 6 STRAP_BIF_LC_BYPASS_EQ 7 7 STRAP_BIF_LC_BYPASS_EQ_REQ_PHASE 8 8 STRAP_BIF_LC_EQ_SEARCH_MODE 9 10 STRAP_BIF_TARGET_LINK_SPEED 12 13 STRAP_BIF_LC_EQ_FS 16 21 STRAP_BIF_LC_EQ_LF 24 29 ixPSX81_WRP_BIF_STRAP_ASPM_D 2 0x1510b02 4 0 4294967295 STRAP_BIF_PM_SUPPORT 14 15 STRAP_BIF_L1_EXIT_LATENCY 16 18 STRAP_BIF_L0S_EXIT_LATENCY 19 21 STRAP_ENABLE_SIGNAL_EXIT_L1 22 22 ixPSX81_WRP_BIF_STRAP_LC_MISC_PORT_D 2 0x1510b03 5 0 4294967295 STRAP_BIF_DE_EMPHASIS_SEL 5 5 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_EN 11 11 STRAP_BIF_LC_SPC_MODE_2P5GT 12 12 STRAP_BIF_LC_SPC_MODE_5GT 13 13 STRAP_BIF_LC_SPC_MODE_8GT 14 14 ixPSX81_WRP_BIF_STRAP_MISC_PORT_D 2 0x1510b04 7 0 4294967295 STRAP_BIF_POISONED_ADVISORY_NONFATAL 0 0 STRAP_BIF_MAX_PAYLOAD_SUPPORT 1 3 STRAP_BIF_FIRST_RCVD_ERR_LOG 4 4 STRAP_BIF_EXTENDED_FMT_SUPPORTED 5 5 STRAP_BIF_E2E_PREFIX_EN 6 6 STRAP_BIF_BCH_ECC_EN 7 7 STRAP_BIF_MC_ECRC_REGEN_SUPP 8 8 ixPSX81_WRP_BIF_STRAP_LINK_TRAINING_D 2 0x1510b05 2 0 4294967295 STRAP_BIF_LC_ENHANCED_HOT_PLUG_EN 9 9 STRAP_BIF_INITIAL_N_FTS 24 31 ixPSX81_WRP_PCIE_PORT_IS_SB_D 2 0x1510b13 1 0 4294967295 PORT_IS_SB 0 0 ixPSX81_WRP_PCIE_HOLD_TRAINING_E 2 0x1510c00 1 0 4294967295 HOLD_TRAINING 0 0 ixPSX81_WRP_BIF_STRAP_LINK_SPEED_PORT_E 2 0x1510c01 8 0 4294967295 STRAP_BIF_AUTO_RC_SPEED_NEGOTIATION_DIS 2 2 STRAP_BIF_LC_TARGET_LINK_SPEED_OVERRIDE_EN 6 6 STRAP_BIF_LC_BYPASS_EQ 7 7 STRAP_BIF_LC_BYPASS_EQ_REQ_PHASE 8 8 STRAP_BIF_LC_EQ_SEARCH_MODE 9 10 STRAP_BIF_TARGET_LINK_SPEED 12 13 STRAP_BIF_LC_EQ_FS 16 21 STRAP_BIF_LC_EQ_LF 24 29 ixPSX81_WRP_BIF_STRAP_ASPM_E 2 0x1510c02 4 0 4294967295 STRAP_BIF_PM_SUPPORT 14 15 STRAP_BIF_L1_EXIT_LATENCY 16 18 STRAP_BIF_L0S_EXIT_LATENCY 19 21 STRAP_ENABLE_SIGNAL_EXIT_L1 22 22 ixPSX81_WRP_BIF_STRAP_LC_MISC_PORT_E 2 0x1510c03 5 0 4294967295 STRAP_BIF_DE_EMPHASIS_SEL 5 5 STRAP_BIF_LC_AUTO_DISABLE_SPEED_SUPPORT_EN 11 11 STRAP_BIF_LC_SPC_MODE_2P5GT 12 12 STRAP_BIF_LC_SPC_MODE_5GT 13 13 STRAP_BIF_LC_SPC_MODE_8GT 14 14 ixPSX81_WRP_BIF_STRAP_MISC_PORT_E 2 0x1510c04 7 0 4294967295 STRAP_BIF_POISONED_ADVISORY_NONFATAL 0 0 STRAP_BIF_MAX_PAYLOAD_SUPPORT 1 3 STRAP_BIF_FIRST_RCVD_ERR_LOG 4 4 STRAP_BIF_EXTENDED_FMT_SUPPORTED 5 5 STRAP_BIF_E2E_PREFIX_EN 6 6 STRAP_BIF_BCH_ECC_EN 7 7 STRAP_BIF_MC_ECRC_REGEN_SUPP 8 8 ixPSX81_WRP_BIF_STRAP_LINK_TRAINING_E 2 0x1510c05 2 0 4294967295 STRAP_BIF_LC_ENHANCED_HOT_PLUG_EN 9 9 STRAP_BIF_INITIAL_N_FTS 24 31 ixPSX81_WRP_PCIE_PORT_IS_SB_E 2 0x1510c13 1 0 4294967295 PORT_IS_SB 0 0 ixPSX81_WRP_LNCNT_CONTROL 2 0x1518030 5 0 4294967295 CFG_LNC_WINDOW_EN0 0 0 CFG_LNC_BW_CNT_EN1 1 1 CFG_LNC_CMN_CNT_EN2 2 2 CFG_LNC_OVRD_EN3 3 3 CFG_LNC_OVRD_VAL4 4 4 ixPSX81_WRP_CFG_LNC_WINDOW 2 0x1518031 1 0 4294967295 CFG_LNC_WINDOW0 0 23 ixPSX81_WRP_LNCNT_QUAN_THRD 2 0x1518032 2 0 4294967295 CFG_LNC_BW_QUAN_THRD0 0 2 CFG_LNC_CMN_QUAN_THRD4 4 6 ixPSX81_WRP_LNCNT_WEIGHT 2 0x1518033 2 0 4294967295 CFG_LNC_BW_WEIGHT0 0 15 CFG_LNC_CMN_WEIGHT16 16 31 ixPSX81_WRP_LNC_TOTAL_WACC 2 0x1518034 1 0 4294967295 LNC_TOTAL_WACC 0 31 ixPSX81_WRP_LNC_BW_WACC 2 0x1518035 1 0 4294967295 LNC_BW_WACC 0 31 ixPSX81_WRP_LNC_CMN_WACC 2 0x1518036 1 0 4294967295 LNC_CMN_WACC 0 31 ixPSX81_WRP_PCIE_EFUSE 2 0x151fff0 1 0 4294967295 PCIE_EFUSE 0 31 ixPSX81_WRP_PCIE_EFUSE2 2 0x151fff1 1 0 4294967295 PCIE_EFUSE2 0 31 ixPSX81_WRP_PCIE_EFUSE3 2 0x151fff2 1 0 4294967295 PCIE_EFUSE3 0 31 ixPSX81_WRP_PCIE_EFUSE4 2 0x151fff3 1 0 4294967295 PCIE_EFUSE4 0 31 ixPSX81_WRP_PCIE_EFUSE5 2 0x151fff4 1 0 4294967295 PCIE_EFUSE5 0 31 ixPSX81_WRP_PCIE_EFUSE6 2 0x151fff5 1 0 4294967295 PCIE_EFUSE6 0 31 ixPSX81_WRP_PCIE_EFUSE7 2 0x151fff6 1 0 4294967295 PCIE_EFUSE7 0 31 ixPSX81_WRP_PCIE_WRAP_SCRATCH1 2 0x1318001 1 0 4294967295 PCIE_WRAP_SCRATCH1 0 31 ixPSX81_WRP_PCIE_WRAP_SCRATCH2 2 0x1318002 1 0 4294967295 PCIE_WRAP_SCRATCH2 0 31 ixPSX81_WRP_PCIE_WRAP_REG_TARG_MISC 2 0x1318005 1 0 4294967295 CLKEN_MASK 0 0 ixPSX81_WRP_PCIE_WRAP_DTM_MISC 2 0x1318006 1 0 4294967295 DTM_BULKPHY_FREQDIV_OVERRIDE 0 0 ixPSX81_WRP_PCIE_WRAP_TURNAROUND_DAISYCHAIN 2 0x1318007 2 0 4294967295 END_BIFCORE_REGISTER_DAISYCHAIN 0 0 END_WRAPPER_REGISTER_DAISYCHAIN 1 1 ixPSX81_WRP_PCIE_WRAP_MISC 2 0x1318008 2 0 4294967295 HOLD_TRAINING_STICKY 1 1 STRAP_BIF_QUICKSIM_START 2 2 ixPSX81_WRP_PCIE_WRAP_PIF_MISC 2 0x1318009 4 0 4294967295 DTM_PIF_DELAY_FI 0 2 DTM_PIF_DELAY_DI 4 6 DTM_PIF_ATSEL_FI 7 7 DTM_PIF_ATSEL_DI 8 8 ixPSX81_WRP_PCIE_RXDET_OVERRIDE 2 0x131800a 2 0 4294967295 RxDetOvrVal 0 7 RxDetOvrEn 16 16 ixPSX81_WRP_IMPCTL_CNTL_PIF0 2 0x1318070 2 0 4294967295 ArbEn0 0 0 QuickSimOverRide0 11 11 ixPSX81_WRP_REG_ADAPT_pciecore0_CONTROL 2 0x1318090 1 0 4294967295 ACCESS_MODE_pciecore0 0 0 ixPSX81_WRP_REG_ADAPT_pwregt_CONTROL 2 0x1318096 1 0 4294967295 ACCESS_MODE_pwregt 0 0 ixPSX81_WRP_REG_ADAPT_pwregr_CONTROL 2 0x1318097 1 0 4294967295 ACCESS_MODE_pwregr 0 0 ixPSX81_WRP_REG_ADAPT_pif0_CONTROL 2 0x1318098 1 0 4294967295 ACCESS_MODE_pif0 0 0 ixPSX81_WRP_BIOSTIMER_CMD 2 0x13180f0 1 0 4294967295 Microseconds 0 31 ixPSX81_WRP_BIOSTIMER_CNTL 2 0x13180f1 1 0 4294967295 ClockRate 0 7 ixPSX81_WRP_BIOSTIMER_DEBUG 2 0x13180f2 1 0 4294967295 Microseconds_compare 0 31 ixPSX81_WRP_DTM_RX_BP_CNTL 2 0x131ffe0 4 0 4294967295 rxElasBP_Cntl 0 7 Dbg_Cntl 16 19 rxElasBP_SlideValue 20 23 td_hold_training_override 24 28 ixPSX81_WRP_DTM_CNTL 2 0x131ffe1 26 0 4294967295 Dtm_Dummy0 0 0 Dtm_Dummy1 1 1 Determinism_En_DTM 2 2 Dtm_Dummy2 3 3 Dtm_Dummy3 4 4 Dtm_Dummy4 5 5 Dtm_Dummy5 6 6 Dtm_Dummy6 7 7 TxClk1x_Cntl 8 9 TxClkGskt_Cntl 10 11 refClk_Cntl 12 13 dtmClk_Sel_Timer 14 15 Dtm_Dummy7 16 16 Dtm_Dummy8 17 17 Dtm_Dummy9 18 18 Dtm_Dummy10 19 19 Dtm_Dummy11 20 20 Dtm_Dummy12 21 21 rxElasWidth_Cntl 22 23 Dtm_Dummy13 24 24 Dtm_Dummy14 25 25 Dtm_Dummy15 26 26 Dtm_Dummy16 27 27 Dtm_Dummy17 28 28 Warm_RstTimer 29 30 Dtm_Dummy18 31 31 ixPSX81_WRP_DTM_CNTL_LEGACY 2 0x131ffe2 10 0 4294967295 Dtm_Dummy19 0 0 fifoInit_one_dropout 1 1 Dtm_Clk_2sym 2 2 Dtm_GsktClk_2sym 3 3 Dtm_hardRst_slide 4 5 Dtm_earlyRst_slide 6 7 Dtm_txPhyStsOk_slide 8 9 Dtm_Sti_TXCLK_Period 12 15 Dtm_Sti_TXCLK_Send 16 19 Dtm_Sti_TXCLK_Rcv 20 23 ixPSX81_WRP_DTM_STI_LCLK_CTRL 2 0x131ffe3 3 0 4294967295 Dtm_Sti_LCLK_Period 0 8 Dtm_Sti_LCLK_Send 9 17 Dtm_Sti_LCLK_Rcv 18 26 ixPSX81_WRP_DTM_DENTIST_GATE_TIMING_DI_clk10x 2 0x131ffe4 3 0 4294967295 DentistGate_startTime_DI_clk10x 0 7 DentistGate_dropoutTime_DI_clk10x 8 15 DentistGate_stopTime_DI_clk10x 16 23 ixPSX81_WRP_DTM_DENTIST_GATE_TIMING_DI_clkGskt 2 0x131ffe5 3 0 4294967295 DentistGate_startTime_DI_clkGskt 0 7 DentistGate_dropoutTime_DI_clkGskt 8 15 DentistGate_stopTime_DI_clkGskt 16 23 ixPSX81_WRP_DTM_DENTIST_GATE_TIMING_FI_clk10x 2 0x131ffe6 3 0 4294967295 DentistGate_startTime_FI_clk10x 0 7 DentistGate_dropoutTime_FI_clk10x 8 15 DentistGate_stopTime_FI_clk10x 16 23 ixPSX81_WRP_DTM_DENTIST_GATE_TIMING_FI_clkGskt 2 0x131ffe7 3 0 4294967295 DentistGate_startTime_FI_clkGskt 0 7 DentistGate_dropoutTime_FI_clkGskt 8 15 DentistGate_stopTime_FI_clkGskt 16 23 ixPSX81_WRP_DELAYLINE_COMMAND 2 0x131ffd0 11 0 4294967295 CFG_DPC_modeCharz 0 0 CFG_DPC_modeMaintainLock 1 1 CFG_DPC_modeWidePhase 2 2 CFG_DPC_modeOverrideDelay 3 3 CFG_DPC_delayOverride 8 15 CFG_DPC_cmdIdle 16 16 CFG_DPC_cmdStart 17 17 CFG_DPC_cmdRestart 18 18 CFG_DPC_Enable 20 20 CFG_DPC_FastCkStable 21 21 CFG_DPC_spare 28 31 ixPSX81_WRP_DELAYLINE_STATUS 2 0x131ffd1 8 0 4294967295 DPC_CFG_controllerIdle 0 0 DPC_CFG_commandComplete 1 1 DPC_CFG_phaseLocked 2 2 DPC_CFG_posAlignmentVld 3 3 DPC_CFG_negAlignmentVld 4 4 DPC_CFG_posDelayValue 8 15 DPC_CFG_negDelayValue 16 23 DPC_CFG_freqRatio 24 28 ixRFE_WARMRST_CNTL 2 0x1085164 2 0 4294967295 REG_RST_warmRstRfeEn 0 0 REG_RST_warmRstImpEn 1 1 ixRFE_SOFTRST_CNTL 2 0x1080001 3 0 4294967295 REG_RST_rstTimer 0 15 REG_RST_softRstPropEn 30 30 SoftRstReg 31 31 ixRFE_IMPRST_CNTL 2 0x1085160 1 0 4294967295 REG_RST_impEn 0 0 ixRFE_CLIENT_SOFTRST_TRIGGER 2 0x1080004 3 0 4294967295 CLIENT0_RFE_RFEWRC_rst 0 0 CLIENT1_RFE_RFEWRC_rst 1 1 CLIENT2_RFE_RFEWRC_rst 2 2 ixRFE_MASTER_SOFTRST_TRIGGER 2 0x1080005 3 0 4294967295 PCIEW0_rst 0 0 PCIEW1_rst 1 1 RWREG_RFEWRC_rst 2 2 ixRFE_PWDN_COMMAND 2 0x1080010 3 0 4294967295 REG_PCIEW0_pw_cmd 0 0 REG_PCIEW1_pw_cmd 1 1 REG_RWREG_RFEWRC_pw_cmd 2 2 ixRFE_PWDN_STATUS 2 0x1080011 3 0 4294967295 PCIEW0_REG_pw_status 0 0 PCIEW1_REG_pw_status 1 1 RWREG_RFEWRC_REG_pw_status 2 2 ixRFE_MST_PCIEW0_CMDSTATUS 2 0x1080020 4 0 4294967295 REG_PCIEW0_clkGate_timer 0 7 REG_PCIEW0_clkSetup_timer 8 11 REG_PCIEW0_timeout_timer 16 23 PCIEW0_RFE_mstTimeout 24 24 ixRFE_MST_PCIEW1_CMDSTATUS 2 0x1080021 4 0 4294967295 REG_PCIEW1_clkGate_timer 0 7 REG_PCIEW1_clkSetup_timer 8 11 REG_PCIEW1_timeout_timer 16 23 PCIEW1_RFE_mstTimeout 24 24 ixRFE_MST_RWREG_RFEWRC_CMDSTATUS 2 0x1080022 4 0 4294967295 REG_RWREG_RFEWRC_clkGate_timer 0 7 REG_RWREG_RFEWRC_clkSetup_timer 8 11 REG_RWREG_RFEWRC_timeout_timer 16 23 RWREG_RFEWRC_RFE_mstTimeout 24 24 ixRFE_MST_TMOUT_STATUS 2 0x108003f 1 0 4294967295 MstTmoutStatus 0 0 ixRFE_IMPARBH_STATUS 2 0x1085140 1 0 4294967295 IMPAH_REG_calDone 0 0 ixRFE_IMPARBH_CONTROL 2 0x1080083 1 0 4294967295 REG_IMPA_throttleTimer 0 9 ixPSX80_BIF_PCIE_RESERVED 2 0x1400000 1 0 4294967295 PCIE_RESERVED 0 31 ixPSX80_BIF_PCIE_SCRATCH 2 0x1400001 1 0 4294967295 PCIE_SCRATCH 0 31 ixPSX80_BIF_PCIE_HW_DEBUG 2 0x1400002 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixPSX80_BIF_PCIE_RX_NUM_NAK 2 0x140000e 1 0 4294967295 RX_NUM_NAK 0 31 ixPSX80_BIF_PCIE_RX_NUM_NAK_GENERATED 2 0x140000f 1 0 4294967295 RX_NUM_NAK_GENERATED 0 31 ixPSX80_BIF_PCIE_CNTL 2 0x1400010 18 0 4294967295 HWINIT_WR_LOCK 0 0 LC_HOT_PLUG_DELAY_SEL 1 3 UR_ERR_REPORT_DIS 7 7 PCIE_MALFORM_ATOMIC_OPS 8 8 PCIE_HT_NP_MEM_WRITE 9 9 RX_SB_ADJ_PAYLOAD_SIZE 10 12 RX_RCB_ATS_UC_DIS 15 15 RX_RCB_REORDER_EN 16 16 RX_RCB_INVALID_SIZE_DIS 17 17 RX_RCB_UNEXP_CPL_DIS 18 18 RX_RCB_CPL_TIMEOUT_TEST_MODE 19 19 RX_RCB_WRONG_PREFIX_DIS 20 20 RX_RCB_WRONG_ATTR_DIS 21 21 RX_RCB_WRONG_FUNCNUM_DIS 22 22 RX_ATS_TRAN_CPL_SPLIT_DIS 23 23 TX_CPL_DEBUG 24 29 RX_IGNORE_LTR_MSG_UR 30 30 RX_CPL_POSTED_REQ_ORD_EN 31 31 ixPSX80_BIF_PCIE_CONFIG_CNTL 2 0x1400011 7 0 4294967295 DYN_CLK_LATENCY 0 3 CI_MAX_PAYLOAD_SIZE_MODE 16 16 CI_PRIV_MAX_PAYLOAD_SIZE 17 19 CI_MAX_READ_REQUEST_SIZE_MODE 20 20 CI_PRIV_MAX_READ_REQUEST_SIZE 21 23 CI_MAX_READ_SAFE_MODE 24 24 CI_EXTENDED_TAG_EN_OVERRIDE 25 26 ixPSX80_BIF_PCIE_DEBUG_CNTL 2 0x1400012 3 0 4294967295 DEBUG_PORT_EN 0 7 DEBUG_SELECT 8 8 DEBUG_LANE_EN 16 31 ixPSX80_BIF_PCIE_CNTL2 2 0x140001c 19 0 4294967295 TX_ARB_ROUND_ROBIN_EN 0 0 TX_ARB_SLV_LIMIT 1 5 TX_ARB_MST_LIMIT 6 10 TX_BLOCK_TLP_ON_PM_DIS 11 11 TX_NP_MEM_WRITE_SWP_ENCODING 12 12 TX_ATOMIC_OPS_DISABLE 13 13 TX_ATOMIC_ORDERING_DIS 14 14 SLV_MEM_LS_EN 16 16 SLV_MEM_AGGRESSIVE_LS_EN 17 17 MST_MEM_LS_EN 18 18 REPLAY_MEM_LS_EN 19 19 SLV_MEM_SD_EN 20 20 SLV_MEM_AGGRESSIVE_SD_EN 21 21 MST_MEM_SD_EN 22 22 REPLAY_MEM_SD_EN 23 23 RX_NP_MEM_WRITE_ENCODING 24 28 SLV_MEM_DS_EN 29 29 MST_MEM_DS_EN 30 30 REPLAY_MEM_DS_EN 31 31 ixPSX80_BIF_PCIE_RX_CNTL2 2 0x140001d 13 0 4294967295 RX_IGNORE_EP_INVALIDPASID_UR 0 0 RX_IGNORE_EP_TRANSMRD_UR 1 1 RX_IGNORE_EP_TRANSMWR_UR 2 2 RX_IGNORE_EP_ATSTRANSREQ_UR 3 3 RX_IGNORE_EP_PAGEREQMSG_UR 4 4 RX_IGNORE_EP_INVCPL_UR 5 5 RX_RCB_LATENCY_EN 8 8 RX_RCB_LATENCY_SCALE 9 11 SLVCPL_MEM_LS_EN 12 12 SLVCPL_MEM_SD_EN 13 13 SLVCPL_MEM_DS_EN 14 14 RX_RCB_LATENCY_MAX_COUNT 16 25 FLR_EXTEND_MODE 28 30 ixPSX80_BIF_PCIE_TX_F0_ATTR_CNTL 2 0x140001e 7 0 4294967295 TX_F0_IDO_OVERRIDE_P 0 1 TX_F0_IDO_OVERRIDE_NP 2 3 TX_F0_IDO_OVERRIDE_CPL 4 5 TX_F0_RO_OVERRIDE_P 6 7 TX_F0_RO_OVERRIDE_NP 8 9 TX_F0_SNR_OVERRIDE_P 10 11 TX_F0_SNR_OVERRIDE_NP 12 13 ixPSX80_BIF_PCIE_CI_CNTL 2 0x1400020 9 0 4294967295 CI_SLAVE_SPLIT_MODE 2 2 CI_SLAVE_GEN_USR_DIS 3 3 CI_MST_CMPL_DUMMY_DATA 4 4 CI_SLV_RC_RD_REQ_SIZE 6 7 CI_SLV_ORDERING_DIS 8 8 CI_RC_ORDERING_DIS 9 9 CI_SLV_CPL_ALLOC_DIS 10 10 CI_SLV_CPL_ALLOC_MODE 11 11 CI_SLV_CPL_ALLOC_SOR 12 12 ixPSX80_BIF_PCIE_BUS_CNTL 2 0x1400021 3 0 4294967295 PMI_INT_DIS 6 6 IMMEDIATE_PMI_DIS 7 7 TRUE_PM_STATUS_EN 12 12 ixPSX80_BIF_PCIE_LC_STATE6 2 0x1400022 4 0 4294967295 LC_PREV_STATE24 0 5 LC_PREV_STATE25 8 13 LC_PREV_STATE26 16 21 LC_PREV_STATE27 24 29 ixPSX80_BIF_PCIE_LC_STATE7 2 0x1400023 4 0 4294967295 LC_PREV_STATE28 0 5 LC_PREV_STATE29 8 13 LC_PREV_STATE30 16 21 LC_PREV_STATE31 24 29 ixPSX80_BIF_PCIE_LC_STATE8 2 0x1400024 4 0 4294967295 LC_PREV_STATE32 0 5 LC_PREV_STATE33 8 13 LC_PREV_STATE34 16 21 LC_PREV_STATE35 24 29 ixPSX80_BIF_PCIE_LC_STATE9 2 0x1400025 4 0 4294967295 LC_PREV_STATE36 0 5 LC_PREV_STATE37 8 13 LC_PREV_STATE38 16 21 LC_PREV_STATE39 24 29 ixPSX80_BIF_PCIE_LC_STATE10 2 0x1400026 4 0 4294967295 LC_PREV_STATE40 0 5 LC_PREV_STATE41 8 13 LC_PREV_STATE42 16 21 LC_PREV_STATE43 24 29 ixPSX80_BIF_PCIE_LC_STATE11 2 0x1400027 4 0 4294967295 LC_PREV_STATE44 0 5 LC_PREV_STATE45 8 13 LC_PREV_STATE46 16 21 LC_PREV_STATE47 24 29 ixPSX80_BIF_PCIE_LC_STATUS1 2 0x1400028 4 0 4294967295 LC_REVERSE_RCVR 0 0 LC_REVERSE_XMIT 1 1 LC_OPERATING_LINK_WIDTH 2 4 LC_DETECTED_LINK_WIDTH 5 7 ixPSX80_BIF_PCIE_LC_STATUS2 2 0x1400029 2 0 4294967295 LC_TOTAL_INACTIVE_LANES 0 15 LC_TURN_ON_LANE 16 31 ixPSX80_BIF_PCIE_WPR_CNTL 2 0x1400030 7 0 4294967295 WPR_RESET_HOT_RST_EN 0 0 WPR_RESET_LNK_DWN_EN 1 1 WPR_RESET_LNK_DIS_EN 2 2 WPR_RESET_COR_EN 3 3 WPR_RESET_REG_EN 4 4 WPR_RESET_STY_EN 5 5 WPR_RESET_PHY_EN 6 6 ixPSX80_BIF_PCIE_RX_LAST_TLP0 2 0x1400031 1 0 4294967295 RX_LAST_TLP0 0 31 ixPSX80_BIF_PCIE_RX_LAST_TLP1 2 0x1400032 1 0 4294967295 RX_LAST_TLP1 0 31 ixPSX80_BIF_PCIE_RX_LAST_TLP2 2 0x1400033 1 0 4294967295 RX_LAST_TLP2 0 31 ixPSX80_BIF_PCIE_RX_LAST_TLP3 2 0x1400034 1 0 4294967295 RX_LAST_TLP3 0 31 ixPSX80_BIF_PCIE_TX_LAST_TLP0 2 0x1400035 1 0 4294967295 TX_LAST_TLP0 0 31 ixPSX80_BIF_PCIE_TX_LAST_TLP1 2 0x1400036 1 0 4294967295 TX_LAST_TLP1 0 31 ixPSX80_BIF_PCIE_TX_LAST_TLP2 2 0x1400037 1 0 4294967295 TX_LAST_TLP2 0 31 ixPSX80_BIF_PCIE_TX_LAST_TLP3 2 0x1400038 1 0 4294967295 TX_LAST_TLP3 0 31 ixPSX80_BIF_PCIE_I2C_REG_ADDR_EXPAND 2 0x140003a 1 0 4294967295 I2C_REG_ADDR 0 16 ixPSX80_BIF_PCIE_I2C_REG_DATA 2 0x140003b 1 0 4294967295 I2C_REG_DATA 0 31 ixPSX80_BIF_PCIE_CFG_CNTL 2 0x140003c 3 0 4294967295 CFG_EN_DEC_TO_HIDDEN_REG 0 0 CFG_EN_DEC_TO_GEN2_HIDDEN_REG 1 1 CFG_EN_DEC_TO_GEN3_HIDDEN_REG 2 2 ixPSX80_BIF_PCIE_LC_PM_CNTL 2 0x140003d 1 0 4294967295 LC_L1_POWER_GATING_EN 0 0 ixPSX80_BIF_PCIE_P_CNTL 2 0x1400040 13 0 4294967295 P_PWRDN_EN 0 0 P_SYMALIGN_MODE 1 1 P_SYMALIGN_HW_DEBUG 2 2 P_ELASTDESKEW_HW_DEBUG 3 3 P_IGNORE_CRC_ERR 4 4 P_IGNORE_LEN_ERR 5 5 P_IGNORE_EDB_ERR 6 6 P_IGNORE_IDL_ERR 7 7 P_IGNORE_TOK_ERR 8 8 P_BLK_LOCK_MODE 12 12 P_ALWAYS_USE_FAST_TXCLK 13 13 P_ELEC_IDLE_MODE 14 15 DLP_IGNORE_IN_L1_EN 16 16 ixPSX80_BIF_PCIE_P_BUF_STATUS 2 0x1400041 2 0 4294967295 P_OVERFLOW_ERR 0 15 P_UNDERFLOW_ERR 16 31 ixPSX80_BIF_PCIE_P_DECODER_STATUS 2 0x1400042 1 0 4294967295 P_DECODE_ERR 0 15 ixPSX80_BIF_PCIE_P_MISC_STATUS 2 0x1400043 2 0 4294967295 P_DESKEW_ERR 0 7 P_SYMUNLOCK_ERR 16 31 ixPSX80_BIF_PCIE_P_RCV_L0S_FTS_DET 2 0x1400050 2 0 4294967295 P_RCV_L0S_FTS_DET_MIN 0 7 P_RCV_L0S_FTS_DET_MAX 8 15 ixPSX80_BIF_PCIE_PERF_COUNT_CNTL 2 0x1400080 3 0 4294967295 GLOBAL_COUNT_EN 0 0 GLOBAL_SHADOW_WR 1 1 GLOBAL_COUNT_RESET 2 2 ixPSX80_BIF_PCIE_PERF_CNTL_TXCLK 2 0x1400081 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX80_BIF_PCIE_PERF_COUNT0_TXCLK 2 0x1400082 1 0 4294967295 COUNTER0 0 31 ixPSX80_BIF_PCIE_PERF_COUNT1_TXCLK 2 0x1400083 1 0 4294967295 COUNTER1 0 31 ixPSX80_BIF_PCIE_PERF_CNTL_MST_R_CLK 2 0x1400084 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX80_BIF_PCIE_PERF_COUNT0_MST_R_CLK 2 0x1400085 1 0 4294967295 COUNTER0 0 31 ixPSX80_BIF_PCIE_PERF_COUNT1_MST_R_CLK 2 0x1400086 1 0 4294967295 COUNTER1 0 31 ixPSX80_BIF_PCIE_PERF_CNTL_MST_C_CLK 2 0x1400087 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX80_BIF_PCIE_PERF_COUNT0_MST_C_CLK 2 0x1400088 1 0 4294967295 COUNTER0 0 31 ixPSX80_BIF_PCIE_PERF_COUNT1_MST_C_CLK 2 0x1400089 1 0 4294967295 COUNTER1 0 31 ixPSX80_BIF_PCIE_PERF_CNTL_SLV_R_CLK 2 0x140008a 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX80_BIF_PCIE_PERF_COUNT0_SLV_R_CLK 2 0x140008b 1 0 4294967295 COUNTER0 0 31 ixPSX80_BIF_PCIE_PERF_COUNT1_SLV_R_CLK 2 0x140008c 1 0 4294967295 COUNTER1 0 31 ixPSX80_BIF_PCIE_PERF_CNTL_SLV_S_C_CLK 2 0x140008d 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX80_BIF_PCIE_PERF_COUNT0_SLV_S_C_CLK 2 0x140008e 1 0 4294967295 COUNTER0 0 31 ixPSX80_BIF_PCIE_PERF_COUNT1_SLV_S_C_CLK 2 0x140008f 1 0 4294967295 COUNTER1 0 31 ixPSX80_BIF_PCIE_PERF_CNTL_SLV_NS_C_CLK 2 0x1400090 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX80_BIF_PCIE_PERF_COUNT0_SLV_NS_C_CLK 2 0x1400091 1 0 4294967295 COUNTER0 0 31 ixPSX80_BIF_PCIE_PERF_COUNT1_SLV_NS_C_CLK 2 0x1400092 1 0 4294967295 COUNTER1 0 31 ixPSX80_BIF_PCIE_PERF_CNTL_EVENT0_PORT_SEL 2 0x1400093 7 0 4294967295 PERF0_PORT_SEL_TXCLK 0 3 PERF0_PORT_SEL_MST_R_CLK 4 7 PERF0_PORT_SEL_MST_C_CLK 8 11 PERF0_PORT_SEL_SLV_R_CLK 12 15 PERF0_PORT_SEL_SLV_S_C_CLK 16 19 PERF0_PORT_SEL_SLV_NS_C_CLK 20 23 PERF0_PORT_SEL_TXCLK2 24 27 ixPSX80_BIF_PCIE_PERF_CNTL_EVENT1_PORT_SEL 2 0x1400094 7 0 4294967295 PERF1_PORT_SEL_TXCLK 0 3 PERF1_PORT_SEL_MST_R_CLK 4 7 PERF1_PORT_SEL_MST_C_CLK 8 11 PERF1_PORT_SEL_SLV_R_CLK 12 15 PERF1_PORT_SEL_SLV_S_C_CLK 16 19 PERF1_PORT_SEL_SLV_NS_C_CLK 20 23 PERF1_PORT_SEL_TXCLK2 24 27 ixPSX80_BIF_PCIE_PERF_CNTL_TXCLK2 2 0x1400095 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX80_BIF_PCIE_PERF_COUNT0_TXCLK2 2 0x1400096 1 0 4294967295 COUNTER0 0 31 ixPSX80_BIF_PCIE_PERF_COUNT1_TXCLK2 2 0x1400097 1 0 4294967295 COUNTER1 0 31 ixPSX80_BIF_PCIE_STRAP_F0 2 0x14000b0 27 0 4294967295 STRAP_F0_EN 0 0 STRAP_F0_LEGACY_DEVICE_TYPE_EN 1 1 STRAP_F0_MSI_EN 2 2 STRAP_F0_VC_EN 3 3 STRAP_F0_DSN_EN 4 4 STRAP_F0_AER_EN 5 5 STRAP_F0_ACS_EN 6 6 STRAP_F0_BAR_EN 7 7 STRAP_F0_PWR_EN 8 8 STRAP_F0_DPA_EN 9 9 STRAP_F0_ATS_EN 10 10 STRAP_F0_PAGE_REQ_EN 11 11 STRAP_F0_PASID_EN 12 12 STRAP_F0_ECRC_CHECK_EN 13 13 STRAP_F0_ECRC_GEN_EN 14 14 STRAP_F0_CPL_ABORT_ERR_EN 15 15 STRAP_F0_POISONED_ADVISORY_NONFATAL 16 16 STRAP_F0_MC_EN 17 17 STRAP_F0_ATOMIC_EN 18 18 STRAP_F0_ATOMIC_64BIT_EN 19 19 STRAP_F0_ATOMIC_ROUTING_EN 20 20 STRAP_F0_MSI_MULTI_CAP 21 23 STRAP_F0_VFn_MSI_MULTI_CAP 24 26 STRAP_F0_MSI_PERVECTOR_MASK_CAP 27 27 STRAP_F0_NO_RO_ENABLED_P2P_PASSING 28 28 STRAP_F0_ARI_EN 29 29 STRAP_F0_SRIOV_EN 30 30 ixPSX80_BIF_PCIE_STRAP_MISC 2 0x14000c0 8 0 4294967295 STRAP_TL_ALT_BUF_EN 4 4 STRAP_CLK_PM_EN 24 24 STRAP_ECN1P1_EN 25 25 STRAP_EXT_VC_COUNT 26 26 STRAP_REVERSE_ALL 28 28 STRAP_MST_ADR64_EN 29 29 STRAP_FLR_EN 30 30 STRAP_INTERNAL_ERR_EN 31 31 ixPSX80_BIF_PCIE_STRAP_MISC2 2 0x14000c1 5 0 4294967295 STRAP_LINK_BW_NOTIFICATION_CAP_EN 0 0 STRAP_GEN2_COMPLIANCE 1 1 STRAP_MSTCPL_TIMEOUT_EN 2 2 STRAP_GEN3_COMPLIANCE 3 3 STRAP_TPH_SUPPORTED 4 4 ixPSX80_BIF_PCIE_STRAP_PI 2 0x14000c2 3 0 4294967295 STRAP_QUICKSIM_START 0 0 STRAP_TEST_TOGGLE_PATTERN 28 28 STRAP_TEST_TOGGLE_MODE 29 29 ixPSX80_BIF_PCIE_STRAP_I2C_BD 2 0x14000c4 2 0 4294967295 STRAP_BIF_I2C_SLV_ADR 0 6 STRAP_BIF_DBG_I2C_EN 7 7 ixPSX80_BIF_PCIE_PRBS_CLR 2 0x14000c8 3 0 4294967295 PRBS_CLR 0 15 PRBS_CHECKER_DEBUG_BUS_SELECT 16 19 PRBS_POLARITY_EN 24 24 ixPSX80_BIF_PCIE_PRBS_STATUS1 2 0x14000c9 2 0 4294967295 PRBS_ERRSTAT 0 15 PRBS_LOCKED 16 31 ixPSX80_BIF_PCIE_PRBS_STATUS2 2 0x14000ca 1 0 4294967295 PRBS_BITCNT_DONE 0 15 ixPSX80_BIF_PCIE_PRBS_FREERUN 2 0x14000cb 1 0 4294967295 PRBS_FREERUN 0 15 ixPSX80_BIF_PCIE_PRBS_MISC 2 0x14000cc 8 0 4294967295 PRBS_EN 0 0 PRBS_TEST_MODE 1 3 PRBS_USER_PATTERN_TOGGLE 4 4 PRBS_8BIT_SEL 5 5 PRBS_COMMA_NUM 6 7 PRBS_LOCK_CNT 8 12 PRBS_DATA_RATE 14 15 PRBS_CHK_ERR_MASK 16 31 ixPSX80_BIF_PCIE_PRBS_USER_PATTERN 2 0x14000cd 1 0 4294967295 PRBS_USER_PATTERN 0 29 ixPSX80_BIF_PCIE_PRBS_LO_BITCNT 2 0x14000ce 1 0 4294967295 PRBS_LO_BITCNT 0 31 ixPSX80_BIF_PCIE_PRBS_HI_BITCNT 2 0x14000cf 1 0 4294967295 PRBS_HI_BITCNT 0 7 ixPSX80_BIF_PCIE_PRBS_ERRCNT_0 2 0x14000d0 1 0 4294967295 PRBS_ERRCNT_0 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_1 2 0x14000d1 1 0 4294967295 PRBS_ERRCNT_1 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_2 2 0x14000d2 1 0 4294967295 PRBS_ERRCNT_2 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_3 2 0x14000d3 1 0 4294967295 PRBS_ERRCNT_3 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_4 2 0x14000d4 1 0 4294967295 PRBS_ERRCNT_4 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_5 2 0x14000d5 1 0 4294967295 PRBS_ERRCNT_5 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_6 2 0x14000d6 1 0 4294967295 PRBS_ERRCNT_6 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_7 2 0x14000d7 1 0 4294967295 PRBS_ERRCNT_7 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_8 2 0x14000d8 1 0 4294967295 PRBS_ERRCNT_8 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_9 2 0x14000d9 1 0 4294967295 PRBS_ERRCNT_9 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_10 2 0x14000da 1 0 4294967295 PRBS_ERRCNT_10 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_11 2 0x14000db 1 0 4294967295 PRBS_ERRCNT_11 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_12 2 0x14000dc 1 0 4294967295 PRBS_ERRCNT_12 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_13 2 0x14000dd 1 0 4294967295 PRBS_ERRCNT_13 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_14 2 0x14000de 1 0 4294967295 PRBS_ERRCNT_14 0 31 ixPSX80_BIF_PCIE_PRBS_ERRCNT_15 2 0x14000df 1 0 4294967295 PRBS_ERRCNT_15 0 31 ixPSX80_BIF_SWRST_COMMAND_STATUS 2 0x1400100 4 0 4294967295 RECONFIGURE 0 0 ATOMIC_RESET 1 1 RESET_COMPLETE 16 16 WAIT_STATE 17 17 ixPSX80_BIF_SWRST_GENERAL_CONTROL 2 0x1400101 11 0 4294967295 RECONFIGURE_EN 0 0 ATOMIC_RESET_EN 1 1 RESET_PERIOD 2 4 WAIT_LINKUP 8 8 FORCE_REGIDLE 9 9 BLOCK_ON_IDLE 10 10 CONFIG_XFER_MODE 12 12 MUXSEL_XFER_MODE 13 13 HLDTRAIN_XFER_MODE 14 14 BYPASS_HOLD 16 16 BYPASS_PIF_HOLD 17 17 ixPSX80_BIF_SWRST_COMMAND_0 2 0x1400102 8 0 4294967295 BIF_STRAPREG_RESET 15 15 BIF0_GLOBAL_RESET 16 16 BIF0_CALIB_RESET 17 17 BIF0_CORE_RESET 18 18 BIF0_REGISTER_RESET 19 19 BIF0_PHY_RESET 20 20 BIF0_STICKY_RESET 21 21 BIF0_CONFIG_RESET 22 22 ixPSX80_BIF_SWRST_COMMAND_1 2 0x1400103 20 0 4294967295 SWITCHCLK 0 0 RESETPCFG 1 1 RESETLANEMUX 2 2 RESETWRAPREGS 3 3 RESETSRBM0 4 4 RESETSRBM1 5 5 RESETLC 6 6 SYNCIDLEPIF0 8 8 SYNCIDLEPIF1 9 9 RESETMNTR 13 13 RESETHLTR 14 14 RESETCPM 15 15 RESETPIF0 16 16 RESETPIF1 17 17 RESETIMPARB0 20 20 RESETIMPARB1 21 21 RESETPHY0 24 24 RESETPHY1 25 25 TOGGLESTRAP 28 28 CMDCFGEN 29 29 ixPSX80_BIF_SWRST_CONTROL_0 2 0x1400104 8 0 4294967295 BIF_STRAPREG_RESETRCEN 15 15 BIF0_GLOBAL_RESETRCEN 16 16 BIF0_CALIB_RESETRCEN 17 17 BIF0_CORE_RESETRCEN 18 18 BIF0_REGISTER_RESETRCEN 19 19 BIF0_PHY_RESETRCEN 20 20 BIF0_STICKY_RESETRCEN 21 21 BIF0_CONFIG_RESETRCEN 22 22 ixPSX80_BIF_SWRST_CONTROL_1 2 0x1400105 20 0 4294967295 SWITCHCLK_RCEN 0 0 RESETPCFG_RCEN 1 1 RESETLANEMUX_RCEN 2 2 RESETWRAPREGS_RCEN 3 3 RESETSRBM0_RCEN 4 4 RESETSRBM1_RCEN 5 5 RESETLC_RCEN 6 6 SYNCIDLEPIF0_RCEN 8 8 SYNCIDLEPIF1_RCEN 9 9 RESETMNTR_RCEN 13 13 RESETHLTR_RCEN 14 14 RESETCPM_RCEN 15 15 RESETPIF0_RCEN 16 16 RESETPIF1_RCEN 17 17 RESETIMPARB0_RCEN 20 20 RESETIMPARB1_RCEN 21 21 RESETPHY0_RCEN 24 24 RESETPHY1_RCEN 25 25 STRAPVLD_RCEN 28 28 CMDCFG_RCEN 29 29 ixPSX80_BIF_SWRST_CONTROL_2 2 0x1400106 8 0 4294967295 BIF_STRAPREG_RESETATEN 15 15 BIF0_GLOBAL_RESETATEN 16 16 BIF0_CALIB_RESETATEN 17 17 BIF0_CORE_RESETATEN 18 18 BIF0_REGISTER_RESETATEN 19 19 BIF0_PHY_RESETATEN 20 20 BIF0_STICKY_RESETATEN 21 21 BIF0_CONFIG_RESETATEN 22 22 ixPSX80_BIF_SWRST_CONTROL_3 2 0x1400107 20 0 4294967295 SWITCHCLK_ATEN 0 0 RESETPCFG_ATEN 1 1 RESETLANEMUX_ATEN 2 2 RESETWRAPREGS_ATEN 3 3 RESETSRBM0_ATEN 4 4 RESETSRBM1_ATEN 5 5 RESETLC_ATEN 6 6 SYNCIDLEPIF0_ATEN 8 8 SYNCIDLEPIF1_ATEN 9 9 RESETMNTR_ATEN 13 13 RESETHLTR_ATEN 14 14 RESETCPM_ATEN 15 15 RESETPIF0_ATEN 16 16 RESETPIF1_ATEN 17 17 RESETIMPARB0_ATEN 20 20 RESETIMPARB1_ATEN 21 21 RESETPHY0_ATEN 24 24 RESETPHY1_ATEN 25 25 STRAPVLD_ATEN 28 28 CMDCFG_ATEN 29 29 ixPSX80_BIF_SWRST_CONTROL_4 2 0x1400108 8 0 4294967295 BIF_STRAPREG_WRRESETEN 14 14 BIF0_GLOBAL_WRRESETEN 16 16 BIF0_CALIB_WRRESETEN 17 17 BIF0_CORE_WRRESETEN 18 18 BIF0_REGISTER_WRRESETEN 19 19 BIF0_PHY_WRRESETEN 20 20 BIF0_STICKY_WRRESETEN 21 21 BIF0_CONFIG_WRRESETEN 22 22 ixPSX80_BIF_SWRST_CONTROL_5 2 0x1400109 20 0 4294967295 WRSWITCHCLK_EN 0 0 WRRESETPCFG_EN 1 1 WRRESETLANEMUX_EN 2 2 WRRESETWRAPREGS_EN 3 3 WRRESETSRBM0_EN 4 4 WRRESETSRBM1_EN 5 5 WRRESETLC_EN 6 6 WRSYNCIDLEPIF0_EN 8 8 WRSYNCIDLEPIF1_EN 9 9 WRRESETMNTR_EN 13 13 WRRESETHLTR_EN 14 14 WRRESETCPM_EN 15 15 WRRESETPIF0_EN 16 16 WRRESETPIF1_EN 17 17 WRRESETIMPARB0_EN 20 20 WRRESETIMPARB1_EN 21 21 WRRESETPHY0_EN 24 24 WRRESETPHY1_EN 25 25 WRSTRAPVLD_EN 28 28 WRCMDCFG_EN 29 29 ixPSX80_BIF_SWRST_CONTROL_6 2 0x140010a 2 0 4294967295 WARMRESET_EN 0 0 CONNECTWITHWRAPREGS_EN 8 8 ixPSX80_BIF_CPM_CONTROL 2 0x1400118 23 0 4294967295 LCLK_DYN_GATE_ENABLE 0 0 TXCLK_DYN_GATE_ENABLE 1 1 TXCLK_PERM_GATE_ENABLE 2 2 TXCLK_PIF_GATE_ENABLE 3 3 TXCLK_GSKT_GATE_ENABLE 4 4 TXCLK_LCNT_GATE_ENABLE 5 5 TXCLK_REGS_GATE_ENABLE 6 6 TXCLK_PRBS_GATE_ENABLE 7 7 REFCLK_REGS_GATE_ENABLE 8 8 LCLK_DYN_GATE_LATENCY 9 9 TXCLK_DYN_GATE_LATENCY 10 10 TXCLK_PERM_GATE_LATENCY 11 11 TXCLK_REGS_GATE_LATENCY 12 12 REFCLK_REGS_GATE_LATENCY 13 13 LCLK_GATE_TXCLK_FREE 14 14 RCVR_DET_CLK_ENABLE 15 15 TXCLK_PERM_GATE_PLL_PDN 16 16 FAST_TXCLK_LATENCY 17 19 MASTER_PCIE_PLL_SELECT 20 20 MASTER_PCIE_PLL_AUTO 21 21 REFCLK_XSTCLK_ENABLE 22 22 REFCLK_XSTCLK_LATENCY 23 23 SPARE_REGS 24 31 ixPSX80_BIF_LM_CONTROL 2 0x1400120 4 0 4294967295 LoopbackSelect 1 4 PRBSPCIeLbSelect 5 5 LoopbackHalfRate 6 7 LoopbackFifoPtr 8 10 ixPSX80_BIF_LM_PCIETXMUX0 2 0x1400121 4 0 4294967295 TXLANE0 0 7 TXLANE1 8 15 TXLANE2 16 23 TXLANE3 24 31 ixPSX80_BIF_LM_PCIETXMUX1 2 0x1400122 4 0 4294967295 TXLANE4 0 7 TXLANE5 8 15 TXLANE6 16 23 TXLANE7 24 31 ixPSX80_BIF_LM_PCIETXMUX2 2 0x1400123 4 0 4294967295 TXLANE8 0 7 TXLANE9 8 15 TXLANE10 16 23 TXLANE11 24 31 ixPSX80_BIF_LM_PCIETXMUX3 2 0x1400124 4 0 4294967295 TXLANE12 0 7 TXLANE13 8 15 TXLANE14 16 23 TXLANE15 24 31 ixPSX80_BIF_LM_PCIERXMUX0 2 0x1400125 4 0 4294967295 RXLANE0 0 7 RXLANE1 8 15 RXLANE2 16 23 RXLANE3 24 31 ixPSX80_BIF_LM_PCIERXMUX1 2 0x1400126 4 0 4294967295 RXLANE4 0 7 RXLANE5 8 15 RXLANE6 16 23 RXLANE7 24 31 ixPSX80_BIF_LM_PCIERXMUX2 2 0x1400127 4 0 4294967295 RXLANE8 0 7 RXLANE9 8 15 RXLANE10 16 23 RXLANE11 24 31 ixPSX80_BIF_LM_PCIERXMUX3 2 0x1400128 4 0 4294967295 RXLANE12 0 7 RXLANE13 8 15 RXLANE14 16 23 RXLANE15 24 31 ixPSX80_BIF_LM_LANEENABLE 2 0x1400129 1 0 4294967295 LANE_enable 0 15 ixPSX80_BIF_LM_PRBSCONTROL 2 0x140012a 5 0 4294967295 PRBSPCIeSelect 0 15 LMLaneDegrade0 28 28 LMLaneDegrade1 29 29 LMLaneDegrade2 30 30 LMLaneDegrade3 31 31 ixPSX80_BIF_LM_POWERCONTROL 2 0x140012b 12 0 4294967295 LMTxPhyCmd0 0 2 LMRxPhyCmd0 3 5 LMLinkSpeed0 6 7 LMTxPhyCmd1 8 10 LMRxPhyCmd1 11 13 LMLinkSpeed1 14 15 LMTxPhyCmd2 16 18 LMRxPhyCmd2 19 21 LMLinkSpeed2 22 23 LMTxPhyCmd3 24 26 LMRxPhyCmd3 27 29 LMLinkSpeed3 30 31 ixPSX80_BIF_LM_POWERCONTROL1 2 0x140012c 23 0 4294967295 LMTxEn0 0 0 LMTxClkEn0 1 1 LMTxMargin0 2 4 LMSkipBit0 5 5 LMLaneUnused0 6 6 LMTxMarginEn0 7 7 LMDeemph0 8 8 LMTxEn1 9 9 LMTxClkEn1 10 10 LMTxMargin1 11 13 LMSkipBit1 14 14 LMLaneUnused1 15 15 LMTxMarginEn1 16 16 LMDeemph1 17 17 LMTxEn2 18 18 LMTxClkEn2 19 19 LMTxMargin2 20 22 LMSkipBit2 23 23 LMLaneUnused2 24 24 LMTxMarginEn2 25 25 LMDeemph2 26 26 TxCoeffID0 27 28 TxCoeffID1 29 30 ixPSX80_BIF_LM_POWERCONTROL2 2 0x140012d 12 0 4294967295 LMTxEn3 0 0 LMTxClkEn3 1 1 LMTxMargin3 2 4 LMSkipBit3 5 5 LMLaneUnused3 6 6 LMTxMarginEn3 7 7 LMDeemph3 8 8 TxCoeffID2 9 10 TxCoeffID3 11 12 TxCoeff0 13 18 TxCoeff1 19 24 TxCoeff2 25 30 ixPSX80_BIF_LM_POWERCONTROL3 2 0x140012e 5 0 4294967295 TxCoeff3 0 5 RxEqCtl0 6 11 RxEqCtl1 12 17 RxEqCtl2 18 23 RxEqCtl3 24 29 ixPSX80_BIF_LM_POWERCONTROL4 2 0x140012f 12 0 4294967295 LinkNum0 0 2 LinkNum1 3 5 LinkNum2 6 8 LinkNum3 9 11 LaneNum0 12 15 LaneNum1 16 19 LaneNum2 20 23 LaneNum3 24 27 SpcMode0 28 28 SpcMode1 29 29 SpcMode2 30 30 SpcMode3 31 31 ixPSX81_BIF_PCIE_RESERVED 2 0x1410000 1 0 4294967295 PCIE_RESERVED 0 31 ixPSX81_BIF_PCIE_SCRATCH 2 0x1410001 1 0 4294967295 PCIE_SCRATCH 0 31 ixPSX81_BIF_PCIE_HW_DEBUG 2 0x1410002 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixPSX81_BIF_PCIE_RX_NUM_NAK 2 0x141000e 1 0 4294967295 RX_NUM_NAK 0 31 ixPSX81_BIF_PCIE_RX_NUM_NAK_GENERATED 2 0x141000f 1 0 4294967295 RX_NUM_NAK_GENERATED 0 31 ixPSX81_BIF_PCIE_CNTL 2 0x1410010 18 0 4294967295 HWINIT_WR_LOCK 0 0 LC_HOT_PLUG_DELAY_SEL 1 3 UR_ERR_REPORT_DIS 7 7 PCIE_MALFORM_ATOMIC_OPS 8 8 PCIE_HT_NP_MEM_WRITE 9 9 RX_SB_ADJ_PAYLOAD_SIZE 10 12 RX_RCB_ATS_UC_DIS 15 15 RX_RCB_REORDER_EN 16 16 RX_RCB_INVALID_SIZE_DIS 17 17 RX_RCB_UNEXP_CPL_DIS 18 18 RX_RCB_CPL_TIMEOUT_TEST_MODE 19 19 RX_RCB_WRONG_PREFIX_DIS 20 20 RX_RCB_WRONG_ATTR_DIS 21 21 RX_RCB_WRONG_FUNCNUM_DIS 22 22 RX_ATS_TRAN_CPL_SPLIT_DIS 23 23 TX_CPL_DEBUG 24 29 RX_IGNORE_LTR_MSG_UR 30 30 RX_CPL_POSTED_REQ_ORD_EN 31 31 ixPSX81_BIF_PCIE_CONFIG_CNTL 2 0x1410011 7 0 4294967295 DYN_CLK_LATENCY 0 3 CI_MAX_PAYLOAD_SIZE_MODE 16 16 CI_PRIV_MAX_PAYLOAD_SIZE 17 19 CI_MAX_READ_REQUEST_SIZE_MODE 20 20 CI_PRIV_MAX_READ_REQUEST_SIZE 21 23 CI_MAX_READ_SAFE_MODE 24 24 CI_EXTENDED_TAG_EN_OVERRIDE 25 26 ixPSX81_BIF_PCIE_DEBUG_CNTL 2 0x1410012 3 0 4294967295 DEBUG_PORT_EN 0 7 DEBUG_SELECT 8 8 DEBUG_LANE_EN 16 31 ixPSX81_BIF_PCIE_CNTL2 2 0x141001c 19 0 4294967295 TX_ARB_ROUND_ROBIN_EN 0 0 TX_ARB_SLV_LIMIT 1 5 TX_ARB_MST_LIMIT 6 10 TX_BLOCK_TLP_ON_PM_DIS 11 11 TX_NP_MEM_WRITE_SWP_ENCODING 12 12 TX_ATOMIC_OPS_DISABLE 13 13 TX_ATOMIC_ORDERING_DIS 14 14 SLV_MEM_LS_EN 16 16 SLV_MEM_AGGRESSIVE_LS_EN 17 17 MST_MEM_LS_EN 18 18 REPLAY_MEM_LS_EN 19 19 SLV_MEM_SD_EN 20 20 SLV_MEM_AGGRESSIVE_SD_EN 21 21 MST_MEM_SD_EN 22 22 REPLAY_MEM_SD_EN 23 23 RX_NP_MEM_WRITE_ENCODING 24 28 SLV_MEM_DS_EN 29 29 MST_MEM_DS_EN 30 30 REPLAY_MEM_DS_EN 31 31 ixPSX81_BIF_PCIE_RX_CNTL2 2 0x141001d 13 0 4294967295 RX_IGNORE_EP_INVALIDPASID_UR 0 0 RX_IGNORE_EP_TRANSMRD_UR 1 1 RX_IGNORE_EP_TRANSMWR_UR 2 2 RX_IGNORE_EP_ATSTRANSREQ_UR 3 3 RX_IGNORE_EP_PAGEREQMSG_UR 4 4 RX_IGNORE_EP_INVCPL_UR 5 5 RX_RCB_LATENCY_EN 8 8 RX_RCB_LATENCY_SCALE 9 11 SLVCPL_MEM_LS_EN 12 12 SLVCPL_MEM_SD_EN 13 13 SLVCPL_MEM_DS_EN 14 14 RX_RCB_LATENCY_MAX_COUNT 16 25 FLR_EXTEND_MODE 28 30 ixPSX81_BIF_PCIE_TX_F0_ATTR_CNTL 2 0x141001e 7 0 4294967295 TX_F0_IDO_OVERRIDE_P 0 1 TX_F0_IDO_OVERRIDE_NP 2 3 TX_F0_IDO_OVERRIDE_CPL 4 5 TX_F0_RO_OVERRIDE_P 6 7 TX_F0_RO_OVERRIDE_NP 8 9 TX_F0_SNR_OVERRIDE_P 10 11 TX_F0_SNR_OVERRIDE_NP 12 13 ixPSX81_BIF_PCIE_CI_CNTL 2 0x1410020 9 0 4294967295 CI_SLAVE_SPLIT_MODE 2 2 CI_SLAVE_GEN_USR_DIS 3 3 CI_MST_CMPL_DUMMY_DATA 4 4 CI_SLV_RC_RD_REQ_SIZE 6 7 CI_SLV_ORDERING_DIS 8 8 CI_RC_ORDERING_DIS 9 9 CI_SLV_CPL_ALLOC_DIS 10 10 CI_SLV_CPL_ALLOC_MODE 11 11 CI_SLV_CPL_ALLOC_SOR 12 12 ixPSX81_BIF_PCIE_BUS_CNTL 2 0x1410021 3 0 4294967295 PMI_INT_DIS 6 6 IMMEDIATE_PMI_DIS 7 7 TRUE_PM_STATUS_EN 12 12 ixPSX81_BIF_PCIE_LC_STATE6 2 0x1410022 4 0 4294967295 LC_PREV_STATE24 0 5 LC_PREV_STATE25 8 13 LC_PREV_STATE26 16 21 LC_PREV_STATE27 24 29 ixPSX81_BIF_PCIE_LC_STATE7 2 0x1410023 4 0 4294967295 LC_PREV_STATE28 0 5 LC_PREV_STATE29 8 13 LC_PREV_STATE30 16 21 LC_PREV_STATE31 24 29 ixPSX81_BIF_PCIE_LC_STATE8 2 0x1410024 4 0 4294967295 LC_PREV_STATE32 0 5 LC_PREV_STATE33 8 13 LC_PREV_STATE34 16 21 LC_PREV_STATE35 24 29 ixPSX81_BIF_PCIE_LC_STATE9 2 0x1410025 4 0 4294967295 LC_PREV_STATE36 0 5 LC_PREV_STATE37 8 13 LC_PREV_STATE38 16 21 LC_PREV_STATE39 24 29 ixPSX81_BIF_PCIE_LC_STATE10 2 0x1410026 4 0 4294967295 LC_PREV_STATE40 0 5 LC_PREV_STATE41 8 13 LC_PREV_STATE42 16 21 LC_PREV_STATE43 24 29 ixPSX81_BIF_PCIE_LC_STATE11 2 0x1410027 4 0 4294967295 LC_PREV_STATE44 0 5 LC_PREV_STATE45 8 13 LC_PREV_STATE46 16 21 LC_PREV_STATE47 24 29 ixPSX81_BIF_PCIE_LC_STATUS1 2 0x1410028 4 0 4294967295 LC_REVERSE_RCVR 0 0 LC_REVERSE_XMIT 1 1 LC_OPERATING_LINK_WIDTH 2 4 LC_DETECTED_LINK_WIDTH 5 7 ixPSX81_BIF_PCIE_LC_STATUS2 2 0x1410029 2 0 4294967295 LC_TOTAL_INACTIVE_LANES 0 15 LC_TURN_ON_LANE 16 31 ixPSX81_BIF_PCIE_WPR_CNTL 2 0x1410030 7 0 4294967295 WPR_RESET_HOT_RST_EN 0 0 WPR_RESET_LNK_DWN_EN 1 1 WPR_RESET_LNK_DIS_EN 2 2 WPR_RESET_COR_EN 3 3 WPR_RESET_REG_EN 4 4 WPR_RESET_STY_EN 5 5 WPR_RESET_PHY_EN 6 6 ixPSX81_BIF_PCIE_RX_LAST_TLP0 2 0x1410031 1 0 4294967295 RX_LAST_TLP0 0 31 ixPSX81_BIF_PCIE_RX_LAST_TLP1 2 0x1410032 1 0 4294967295 RX_LAST_TLP1 0 31 ixPSX81_BIF_PCIE_RX_LAST_TLP2 2 0x1410033 1 0 4294967295 RX_LAST_TLP2 0 31 ixPSX81_BIF_PCIE_RX_LAST_TLP3 2 0x1410034 1 0 4294967295 RX_LAST_TLP3 0 31 ixPSX81_BIF_PCIE_TX_LAST_TLP0 2 0x1410035 1 0 4294967295 TX_LAST_TLP0 0 31 ixPSX81_BIF_PCIE_TX_LAST_TLP1 2 0x1410036 1 0 4294967295 TX_LAST_TLP1 0 31 ixPSX81_BIF_PCIE_TX_LAST_TLP2 2 0x1410037 1 0 4294967295 TX_LAST_TLP2 0 31 ixPSX81_BIF_PCIE_TX_LAST_TLP3 2 0x1410038 1 0 4294967295 TX_LAST_TLP3 0 31 ixPSX81_BIF_PCIE_I2C_REG_ADDR_EXPAND 2 0x141003a 1 0 4294967295 I2C_REG_ADDR 0 16 ixPSX81_BIF_PCIE_I2C_REG_DATA 2 0x141003b 1 0 4294967295 I2C_REG_DATA 0 31 ixPSX81_BIF_PCIE_CFG_CNTL 2 0x141003c 3 0 4294967295 CFG_EN_DEC_TO_HIDDEN_REG 0 0 CFG_EN_DEC_TO_GEN2_HIDDEN_REG 1 1 CFG_EN_DEC_TO_GEN3_HIDDEN_REG 2 2 ixPSX81_BIF_PCIE_LC_PM_CNTL 2 0x141003d 1 0 4294967295 LC_L1_POWER_GATING_EN 0 0 ixPSX81_BIF_PCIE_P_CNTL 2 0x1410040 13 0 4294967295 P_PWRDN_EN 0 0 P_SYMALIGN_MODE 1 1 P_SYMALIGN_HW_DEBUG 2 2 P_ELASTDESKEW_HW_DEBUG 3 3 P_IGNORE_CRC_ERR 4 4 P_IGNORE_LEN_ERR 5 5 P_IGNORE_EDB_ERR 6 6 P_IGNORE_IDL_ERR 7 7 P_IGNORE_TOK_ERR 8 8 P_BLK_LOCK_MODE 12 12 P_ALWAYS_USE_FAST_TXCLK 13 13 P_ELEC_IDLE_MODE 14 15 DLP_IGNORE_IN_L1_EN 16 16 ixPSX81_BIF_PCIE_P_BUF_STATUS 2 0x1410041 2 0 4294967295 P_OVERFLOW_ERR 0 15 P_UNDERFLOW_ERR 16 31 ixPSX81_BIF_PCIE_P_DECODER_STATUS 2 0x1410042 1 0 4294967295 P_DECODE_ERR 0 15 ixPSX81_BIF_PCIE_P_MISC_STATUS 2 0x1410043 2 0 4294967295 P_DESKEW_ERR 0 7 P_SYMUNLOCK_ERR 16 31 ixPSX81_BIF_PCIE_P_RCV_L0S_FTS_DET 2 0x1410050 2 0 4294967295 P_RCV_L0S_FTS_DET_MIN 0 7 P_RCV_L0S_FTS_DET_MAX 8 15 ixPSX81_BIF_PCIE_PERF_COUNT_CNTL 2 0x1410080 3 0 4294967295 GLOBAL_COUNT_EN 0 0 GLOBAL_SHADOW_WR 1 1 GLOBAL_COUNT_RESET 2 2 ixPSX81_BIF_PCIE_PERF_CNTL_TXCLK 2 0x1410081 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX81_BIF_PCIE_PERF_COUNT0_TXCLK 2 0x1410082 1 0 4294967295 COUNTER0 0 31 ixPSX81_BIF_PCIE_PERF_COUNT1_TXCLK 2 0x1410083 1 0 4294967295 COUNTER1 0 31 ixPSX81_BIF_PCIE_PERF_CNTL_MST_R_CLK 2 0x1410084 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX81_BIF_PCIE_PERF_COUNT0_MST_R_CLK 2 0x1410085 1 0 4294967295 COUNTER0 0 31 ixPSX81_BIF_PCIE_PERF_COUNT1_MST_R_CLK 2 0x1410086 1 0 4294967295 COUNTER1 0 31 ixPSX81_BIF_PCIE_PERF_CNTL_MST_C_CLK 2 0x1410087 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX81_BIF_PCIE_PERF_COUNT0_MST_C_CLK 2 0x1410088 1 0 4294967295 COUNTER0 0 31 ixPSX81_BIF_PCIE_PERF_COUNT1_MST_C_CLK 2 0x1410089 1 0 4294967295 COUNTER1 0 31 ixPSX81_BIF_PCIE_PERF_CNTL_SLV_R_CLK 2 0x141008a 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX81_BIF_PCIE_PERF_COUNT0_SLV_R_CLK 2 0x141008b 1 0 4294967295 COUNTER0 0 31 ixPSX81_BIF_PCIE_PERF_COUNT1_SLV_R_CLK 2 0x141008c 1 0 4294967295 COUNTER1 0 31 ixPSX81_BIF_PCIE_PERF_CNTL_SLV_S_C_CLK 2 0x141008d 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX81_BIF_PCIE_PERF_COUNT0_SLV_S_C_CLK 2 0x141008e 1 0 4294967295 COUNTER0 0 31 ixPSX81_BIF_PCIE_PERF_COUNT1_SLV_S_C_CLK 2 0x141008f 1 0 4294967295 COUNTER1 0 31 ixPSX81_BIF_PCIE_PERF_CNTL_SLV_NS_C_CLK 2 0x1410090 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX81_BIF_PCIE_PERF_COUNT0_SLV_NS_C_CLK 2 0x1410091 1 0 4294967295 COUNTER0 0 31 ixPSX81_BIF_PCIE_PERF_COUNT1_SLV_NS_C_CLK 2 0x1410092 1 0 4294967295 COUNTER1 0 31 ixPSX81_BIF_PCIE_PERF_CNTL_EVENT0_PORT_SEL 2 0x1410093 7 0 4294967295 PERF0_PORT_SEL_TXCLK 0 3 PERF0_PORT_SEL_MST_R_CLK 4 7 PERF0_PORT_SEL_MST_C_CLK 8 11 PERF0_PORT_SEL_SLV_R_CLK 12 15 PERF0_PORT_SEL_SLV_S_C_CLK 16 19 PERF0_PORT_SEL_SLV_NS_C_CLK 20 23 PERF0_PORT_SEL_TXCLK2 24 27 ixPSX81_BIF_PCIE_PERF_CNTL_EVENT1_PORT_SEL 2 0x1410094 7 0 4294967295 PERF1_PORT_SEL_TXCLK 0 3 PERF1_PORT_SEL_MST_R_CLK 4 7 PERF1_PORT_SEL_MST_C_CLK 8 11 PERF1_PORT_SEL_SLV_R_CLK 12 15 PERF1_PORT_SEL_SLV_S_C_CLK 16 19 PERF1_PORT_SEL_SLV_NS_C_CLK 20 23 PERF1_PORT_SEL_TXCLK2 24 27 ixPSX81_BIF_PCIE_PERF_CNTL_TXCLK2 2 0x1410095 4 0 4294967295 EVENT0_SEL 0 7 EVENT1_SEL 8 15 COUNTER0_UPPER 16 23 COUNTER1_UPPER 24 31 ixPSX81_BIF_PCIE_PERF_COUNT0_TXCLK2 2 0x1410096 1 0 4294967295 COUNTER0 0 31 ixPSX81_BIF_PCIE_PERF_COUNT1_TXCLK2 2 0x1410097 1 0 4294967295 COUNTER1 0 31 ixPSX81_BIF_PCIE_STRAP_F0 2 0x14100b0 27 0 4294967295 STRAP_F0_EN 0 0 STRAP_F0_LEGACY_DEVICE_TYPE_EN 1 1 STRAP_F0_MSI_EN 2 2 STRAP_F0_VC_EN 3 3 STRAP_F0_DSN_EN 4 4 STRAP_F0_AER_EN 5 5 STRAP_F0_ACS_EN 6 6 STRAP_F0_BAR_EN 7 7 STRAP_F0_PWR_EN 8 8 STRAP_F0_DPA_EN 9 9 STRAP_F0_ATS_EN 10 10 STRAP_F0_PAGE_REQ_EN 11 11 STRAP_F0_PASID_EN 12 12 STRAP_F0_ECRC_CHECK_EN 13 13 STRAP_F0_ECRC_GEN_EN 14 14 STRAP_F0_CPL_ABORT_ERR_EN 15 15 STRAP_F0_POISONED_ADVISORY_NONFATAL 16 16 STRAP_F0_MC_EN 17 17 STRAP_F0_ATOMIC_EN 18 18 STRAP_F0_ATOMIC_64BIT_EN 19 19 STRAP_F0_ATOMIC_ROUTING_EN 20 20 STRAP_F0_MSI_MULTI_CAP 21 23 STRAP_F0_VFn_MSI_MULTI_CAP 24 26 STRAP_F0_MSI_PERVECTOR_MASK_CAP 27 27 STRAP_F0_NO_RO_ENABLED_P2P_PASSING 28 28 STRAP_F0_ARI_EN 29 29 STRAP_F0_SRIOV_EN 30 30 ixPSX81_BIF_PCIE_STRAP_MISC 2 0x14100c0 8 0 4294967295 STRAP_TL_ALT_BUF_EN 4 4 STRAP_CLK_PM_EN 24 24 STRAP_ECN1P1_EN 25 25 STRAP_EXT_VC_COUNT 26 26 STRAP_REVERSE_ALL 28 28 STRAP_MST_ADR64_EN 29 29 STRAP_FLR_EN 30 30 STRAP_INTERNAL_ERR_EN 31 31 ixPSX81_BIF_PCIE_STRAP_MISC2 2 0x14100c1 5 0 4294967295 STRAP_LINK_BW_NOTIFICATION_CAP_EN 0 0 STRAP_GEN2_COMPLIANCE 1 1 STRAP_MSTCPL_TIMEOUT_EN 2 2 STRAP_GEN3_COMPLIANCE 3 3 STRAP_TPH_SUPPORTED 4 4 ixPSX81_BIF_PCIE_STRAP_PI 2 0x14100c2 3 0 4294967295 STRAP_QUICKSIM_START 0 0 STRAP_TEST_TOGGLE_PATTERN 28 28 STRAP_TEST_TOGGLE_MODE 29 29 ixPSX81_BIF_PCIE_STRAP_I2C_BD 2 0x14100c4 2 0 4294967295 STRAP_BIF_I2C_SLV_ADR 0 6 STRAP_BIF_DBG_I2C_EN 7 7 ixPSX81_BIF_PCIE_PRBS_CLR 2 0x14100c8 3 0 4294967295 PRBS_CLR 0 15 PRBS_CHECKER_DEBUG_BUS_SELECT 16 19 PRBS_POLARITY_EN 24 24 ixPSX81_BIF_PCIE_PRBS_STATUS1 2 0x14100c9 2 0 4294967295 PRBS_ERRSTAT 0 15 PRBS_LOCKED 16 31 ixPSX81_BIF_PCIE_PRBS_STATUS2 2 0x14100ca 1 0 4294967295 PRBS_BITCNT_DONE 0 15 ixPSX81_BIF_PCIE_PRBS_FREERUN 2 0x14100cb 1 0 4294967295 PRBS_FREERUN 0 15 ixPSX81_BIF_PCIE_PRBS_MISC 2 0x14100cc 8 0 4294967295 PRBS_EN 0 0 PRBS_TEST_MODE 1 3 PRBS_USER_PATTERN_TOGGLE 4 4 PRBS_8BIT_SEL 5 5 PRBS_COMMA_NUM 6 7 PRBS_LOCK_CNT 8 12 PRBS_DATA_RATE 14 15 PRBS_CHK_ERR_MASK 16 31 ixPSX81_BIF_PCIE_PRBS_USER_PATTERN 2 0x14100cd 1 0 4294967295 PRBS_USER_PATTERN 0 29 ixPSX81_BIF_PCIE_PRBS_LO_BITCNT 2 0x14100ce 1 0 4294967295 PRBS_LO_BITCNT 0 31 ixPSX81_BIF_PCIE_PRBS_HI_BITCNT 2 0x14100cf 1 0 4294967295 PRBS_HI_BITCNT 0 7 ixPSX81_BIF_PCIE_PRBS_ERRCNT_0 2 0x14100d0 1 0 4294967295 PRBS_ERRCNT_0 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_1 2 0x14100d1 1 0 4294967295 PRBS_ERRCNT_1 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_2 2 0x14100d2 1 0 4294967295 PRBS_ERRCNT_2 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_3 2 0x14100d3 1 0 4294967295 PRBS_ERRCNT_3 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_4 2 0x14100d4 1 0 4294967295 PRBS_ERRCNT_4 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_5 2 0x14100d5 1 0 4294967295 PRBS_ERRCNT_5 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_6 2 0x14100d6 1 0 4294967295 PRBS_ERRCNT_6 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_7 2 0x14100d7 1 0 4294967295 PRBS_ERRCNT_7 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_8 2 0x14100d8 1 0 4294967295 PRBS_ERRCNT_8 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_9 2 0x14100d9 1 0 4294967295 PRBS_ERRCNT_9 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_10 2 0x14100da 1 0 4294967295 PRBS_ERRCNT_10 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_11 2 0x14100db 1 0 4294967295 PRBS_ERRCNT_11 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_12 2 0x14100dc 1 0 4294967295 PRBS_ERRCNT_12 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_13 2 0x14100dd 1 0 4294967295 PRBS_ERRCNT_13 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_14 2 0x14100de 1 0 4294967295 PRBS_ERRCNT_14 0 31 ixPSX81_BIF_PCIE_PRBS_ERRCNT_15 2 0x14100df 1 0 4294967295 PRBS_ERRCNT_15 0 31 ixPSX81_BIF_SWRST_COMMAND_STATUS 2 0x1410100 4 0 4294967295 RECONFIGURE 0 0 ATOMIC_RESET 1 1 RESET_COMPLETE 16 16 WAIT_STATE 17 17 ixPSX81_BIF_SWRST_GENERAL_CONTROL 2 0x1410101 11 0 4294967295 RECONFIGURE_EN 0 0 ATOMIC_RESET_EN 1 1 RESET_PERIOD 2 4 WAIT_LINKUP 8 8 FORCE_REGIDLE 9 9 BLOCK_ON_IDLE 10 10 CONFIG_XFER_MODE 12 12 MUXSEL_XFER_MODE 13 13 HLDTRAIN_XFER_MODE 14 14 BYPASS_HOLD 16 16 BYPASS_PIF_HOLD 17 17 ixPSX81_BIF_SWRST_COMMAND_0 2 0x1410102 8 0 4294967295 BIF_STRAPREG_RESET 15 15 BIF0_GLOBAL_RESET 16 16 BIF0_CALIB_RESET 17 17 BIF0_CORE_RESET 18 18 BIF0_REGISTER_RESET 19 19 BIF0_PHY_RESET 20 20 BIF0_STICKY_RESET 21 21 BIF0_CONFIG_RESET 22 22 ixPSX81_BIF_SWRST_COMMAND_1 2 0x1410103 20 0 4294967295 SWITCHCLK 0 0 RESETPCFG 1 1 RESETLANEMUX 2 2 RESETWRAPREGS 3 3 RESETSRBM0 4 4 RESETSRBM1 5 5 RESETLC 6 6 SYNCIDLEPIF0 8 8 SYNCIDLEPIF1 9 9 RESETMNTR 13 13 RESETHLTR 14 14 RESETCPM 15 15 RESETPIF0 16 16 RESETPIF1 17 17 RESETIMPARB0 20 20 RESETIMPARB1 21 21 RESETPHY0 24 24 RESETPHY1 25 25 TOGGLESTRAP 28 28 CMDCFGEN 29 29 ixPSX81_BIF_SWRST_CONTROL_0 2 0x1410104 8 0 4294967295 BIF_STRAPREG_RESETRCEN 15 15 BIF0_GLOBAL_RESETRCEN 16 16 BIF0_CALIB_RESETRCEN 17 17 BIF0_CORE_RESETRCEN 18 18 BIF0_REGISTER_RESETRCEN 19 19 BIF0_PHY_RESETRCEN 20 20 BIF0_STICKY_RESETRCEN 21 21 BIF0_CONFIG_RESETRCEN 22 22 ixPSX81_BIF_SWRST_CONTROL_1 2 0x1410105 20 0 4294967295 SWITCHCLK_RCEN 0 0 RESETPCFG_RCEN 1 1 RESETLANEMUX_RCEN 2 2 RESETWRAPREGS_RCEN 3 3 RESETSRBM0_RCEN 4 4 RESETSRBM1_RCEN 5 5 RESETLC_RCEN 6 6 SYNCIDLEPIF0_RCEN 8 8 SYNCIDLEPIF1_RCEN 9 9 RESETMNTR_RCEN 13 13 RESETHLTR_RCEN 14 14 RESETCPM_RCEN 15 15 RESETPIF0_RCEN 16 16 RESETPIF1_RCEN 17 17 RESETIMPARB0_RCEN 20 20 RESETIMPARB1_RCEN 21 21 RESETPHY0_RCEN 24 24 RESETPHY1_RCEN 25 25 STRAPVLD_RCEN 28 28 CMDCFG_RCEN 29 29 ixPSX81_BIF_SWRST_CONTROL_2 2 0x1410106 8 0 4294967295 BIF_STRAPREG_RESETATEN 15 15 BIF0_GLOBAL_RESETATEN 16 16 BIF0_CALIB_RESETATEN 17 17 BIF0_CORE_RESETATEN 18 18 BIF0_REGISTER_RESETATEN 19 19 BIF0_PHY_RESETATEN 20 20 BIF0_STICKY_RESETATEN 21 21 BIF0_CONFIG_RESETATEN 22 22 ixPSX81_BIF_SWRST_CONTROL_3 2 0x1410107 20 0 4294967295 SWITCHCLK_ATEN 0 0 RESETPCFG_ATEN 1 1 RESETLANEMUX_ATEN 2 2 RESETWRAPREGS_ATEN 3 3 RESETSRBM0_ATEN 4 4 RESETSRBM1_ATEN 5 5 RESETLC_ATEN 6 6 SYNCIDLEPIF0_ATEN 8 8 SYNCIDLEPIF1_ATEN 9 9 RESETMNTR_ATEN 13 13 RESETHLTR_ATEN 14 14 RESETCPM_ATEN 15 15 RESETPIF0_ATEN 16 16 RESETPIF1_ATEN 17 17 RESETIMPARB0_ATEN 20 20 RESETIMPARB1_ATEN 21 21 RESETPHY0_ATEN 24 24 RESETPHY1_ATEN 25 25 STRAPVLD_ATEN 28 28 CMDCFG_ATEN 29 29 ixPSX81_BIF_SWRST_CONTROL_4 2 0x1410108 8 0 4294967295 BIF_STRAPREG_WRRESETEN 14 14 BIF0_GLOBAL_WRRESETEN 16 16 BIF0_CALIB_WRRESETEN 17 17 BIF0_CORE_WRRESETEN 18 18 BIF0_REGISTER_WRRESETEN 19 19 BIF0_PHY_WRRESETEN 20 20 BIF0_STICKY_WRRESETEN 21 21 BIF0_CONFIG_WRRESETEN 22 22 ixPSX81_BIF_SWRST_CONTROL_5 2 0x1410109 20 0 4294967295 WRSWITCHCLK_EN 0 0 WRRESETPCFG_EN 1 1 WRRESETLANEMUX_EN 2 2 WRRESETWRAPREGS_EN 3 3 WRRESETSRBM0_EN 4 4 WRRESETSRBM1_EN 5 5 WRRESETLC_EN 6 6 WRSYNCIDLEPIF0_EN 8 8 WRSYNCIDLEPIF1_EN 9 9 WRRESETMNTR_EN 13 13 WRRESETHLTR_EN 14 14 WRRESETCPM_EN 15 15 WRRESETPIF0_EN 16 16 WRRESETPIF1_EN 17 17 WRRESETIMPARB0_EN 20 20 WRRESETIMPARB1_EN 21 21 WRRESETPHY0_EN 24 24 WRRESETPHY1_EN 25 25 WRSTRAPVLD_EN 28 28 WRCMDCFG_EN 29 29 ixPSX81_BIF_SWRST_CONTROL_6 2 0x141010a 2 0 4294967295 WARMRESET_EN 0 0 CONNECTWITHWRAPREGS_EN 8 8 ixPSX81_BIF_CPM_CONTROL 2 0x1410118 23 0 4294967295 LCLK_DYN_GATE_ENABLE 0 0 TXCLK_DYN_GATE_ENABLE 1 1 TXCLK_PERM_GATE_ENABLE 2 2 TXCLK_PIF_GATE_ENABLE 3 3 TXCLK_GSKT_GATE_ENABLE 4 4 TXCLK_LCNT_GATE_ENABLE 5 5 TXCLK_REGS_GATE_ENABLE 6 6 TXCLK_PRBS_GATE_ENABLE 7 7 REFCLK_REGS_GATE_ENABLE 8 8 LCLK_DYN_GATE_LATENCY 9 9 TXCLK_DYN_GATE_LATENCY 10 10 TXCLK_PERM_GATE_LATENCY 11 11 TXCLK_REGS_GATE_LATENCY 12 12 REFCLK_REGS_GATE_LATENCY 13 13 LCLK_GATE_TXCLK_FREE 14 14 RCVR_DET_CLK_ENABLE 15 15 TXCLK_PERM_GATE_PLL_PDN 16 16 FAST_TXCLK_LATENCY 17 19 MASTER_PCIE_PLL_SELECT 20 20 MASTER_PCIE_PLL_AUTO 21 21 REFCLK_XSTCLK_ENABLE 22 22 REFCLK_XSTCLK_LATENCY 23 23 SPARE_REGS 24 31 ixPSX81_BIF_LM_CONTROL 2 0x1410120 4 0 4294967295 LoopbackSelect 1 4 PRBSPCIeLbSelect 5 5 LoopbackHalfRate 6 7 LoopbackFifoPtr 8 10 ixPSX81_BIF_LM_PCIETXMUX0 2 0x1410121 4 0 4294967295 TXLANE0 0 7 TXLANE1 8 15 TXLANE2 16 23 TXLANE3 24 31 ixPSX81_BIF_LM_PCIETXMUX1 2 0x1410122 4 0 4294967295 TXLANE4 0 7 TXLANE5 8 15 TXLANE6 16 23 TXLANE7 24 31 ixPSX81_BIF_LM_PCIETXMUX2 2 0x1410123 4 0 4294967295 TXLANE8 0 7 TXLANE9 8 15 TXLANE10 16 23 TXLANE11 24 31 ixPSX81_BIF_LM_PCIETXMUX3 2 0x1410124 4 0 4294967295 TXLANE12 0 7 TXLANE13 8 15 TXLANE14 16 23 TXLANE15 24 31 ixPSX81_BIF_LM_PCIERXMUX0 2 0x1410125 4 0 4294967295 RXLANE0 0 7 RXLANE1 8 15 RXLANE2 16 23 RXLANE3 24 31 ixPSX81_BIF_LM_PCIERXMUX1 2 0x1410126 4 0 4294967295 RXLANE4 0 7 RXLANE5 8 15 RXLANE6 16 23 RXLANE7 24 31 ixPSX81_BIF_LM_PCIERXMUX2 2 0x1410127 4 0 4294967295 RXLANE8 0 7 RXLANE9 8 15 RXLANE10 16 23 RXLANE11 24 31 ixPSX81_BIF_LM_PCIERXMUX3 2 0x1410128 4 0 4294967295 RXLANE12 0 7 RXLANE13 8 15 RXLANE14 16 23 RXLANE15 24 31 ixPSX81_BIF_LM_LANEENABLE 2 0x1410129 1 0 4294967295 LANE_enable 0 15 ixPSX81_BIF_LM_PRBSCONTROL 2 0x141012a 5 0 4294967295 PRBSPCIeSelect 0 15 LMLaneDegrade0 28 28 LMLaneDegrade1 29 29 LMLaneDegrade2 30 30 LMLaneDegrade3 31 31 ixPSX81_BIF_LM_POWERCONTROL 2 0x141012b 12 0 4294967295 LMTxPhyCmd0 0 2 LMRxPhyCmd0 3 5 LMLinkSpeed0 6 7 LMTxPhyCmd1 8 10 LMRxPhyCmd1 11 13 LMLinkSpeed1 14 15 LMTxPhyCmd2 16 18 LMRxPhyCmd2 19 21 LMLinkSpeed2 22 23 LMTxPhyCmd3 24 26 LMRxPhyCmd3 27 29 LMLinkSpeed3 30 31 ixPSX81_BIF_LM_POWERCONTROL1 2 0x141012c 23 0 4294967295 LMTxEn0 0 0 LMTxClkEn0 1 1 LMTxMargin0 2 4 LMSkipBit0 5 5 LMLaneUnused0 6 6 LMTxMarginEn0 7 7 LMDeemph0 8 8 LMTxEn1 9 9 LMTxClkEn1 10 10 LMTxMargin1 11 13 LMSkipBit1 14 14 LMLaneUnused1 15 15 LMTxMarginEn1 16 16 LMDeemph1 17 17 LMTxEn2 18 18 LMTxClkEn2 19 19 LMTxMargin2 20 22 LMSkipBit2 23 23 LMLaneUnused2 24 24 LMTxMarginEn2 25 25 LMDeemph2 26 26 TxCoeffID0 27 28 TxCoeffID1 29 30 ixPSX81_BIF_LM_POWERCONTROL2 2 0x141012d 12 0 4294967295 LMTxEn3 0 0 LMTxClkEn3 1 1 LMTxMargin3 2 4 LMSkipBit3 5 5 LMLaneUnused3 6 6 LMTxMarginEn3 7 7 LMDeemph3 8 8 TxCoeffID2 9 10 TxCoeffID3 11 12 TxCoeff0 13 18 TxCoeff1 19 24 TxCoeff2 25 30 ixPSX81_BIF_LM_POWERCONTROL3 2 0x141012e 5 0 4294967295 TxCoeff3 0 5 RxEqCtl0 6 11 RxEqCtl1 12 17 RxEqCtl2 18 23 RxEqCtl3 24 29 ixPSX81_BIF_LM_POWERCONTROL4 2 0x141012f 12 0 4294967295 LinkNum0 0 2 LinkNum1 3 5 LinkNum2 6 8 LinkNum3 9 11 LaneNum0 12 15 LaneNum1 16 19 LaneNum2 20 23 LaneNum3 24 27 SpcMode0 28 28 SpcMode1 29 29 SpcMode2 30 30 SpcMode3 31 31 ixPSX80_PHY0_COM_COMMON_FUSE1 2 0x1206200 9 0 4294967295 fuse1_valid 0 0 fuse1_ei_det_thresh_sel 1 2 fuse1_dll_flock_disable 3 3 fuse1_cdr_ph_gain_gen12 4 7 fuse1_cdr_pi_stpsz_gen12 8 8 fuse1_ron_ctl 9 10 fuse1_rtt_ctl 11 12 fuse1_rxdetect_samp_time 18 19 fuse1_spare 20 31 ixPSX80_PHY0_COM_COMMON_FUSE2 2 0x1206201 2 0 4294967295 fuse2_valid 0 0 fuse2_spare 1 31 ixPSX80_PHY0_COM_COMMON_FUSE3 2 0x1206202 9 0 4294967295 fuse3_valid 0 0 fuse3_dll_cpi_sel 1 3 fuse3_ron_override_val 4 9 fuse3_rtt_override_val 10 15 fuse3_lcpll_bw_adj 16 19 fuse3_lcpll_ref_adj 20 23 fuse3_ropll_ref_adj 24 27 fuse3_refresh_cal_en 28 28 fuse3_spare 29 31 ixPSX80_PHY0_COM_COMMON_ELECIDLE 2 0x1206204 4 0 4294967295 ei_det_dis_ps0 0 0 ei_det_initiate_ofc_cal 1 1 ei_det_dac_test_ofc_sel 2 2 ei_det_dac_test_code 4 9 ixPSX80_PHY0_COM_COMMON_DFX 2 0x1206205 8 0 4294967295 nelb_en 0 0 prbs_seed 1 10 force_cdr_en 11 11 ovrd_pll_on 13 13 ovrd_clk_en 15 15 dsm_sel 17 22 dsm_en 24 27 hold_rdy_response 29 29 ixPSX80_PHY0_COM_COMMON_MAR_DEEMPH_NOM 2 0x1206206 4 0 4294967295 tx_margin_nom 0 7 deemph_gen1_nom 8 15 deemph35_gen2_nom 16 23 deemph60_gen2_nom 24 31 ixPSX80_PHY0_COM_COMMON_SELDEEMPH35 2 0x1206207 4 0 4294967295 deemph_3pt5db_1 0 7 deemph_3pt5db_2 8 15 deemph_3pt5db_3 16 23 deemph_3pt5db_4 24 31 ixPSX80_PHY0_COM_COMMON_SELDEEMPH60 2 0x1206208 4 0 4294967295 deemph_6db_1 0 7 deemph_6db_2 8 15 deemph_6db_3 16 23 deemph_6db_4 24 31 ixPSX80_PHY0_COM_COMMON_LANE_PWRMGMT 2 0x1206209 2 0 4294967295 pgdelay 0 3 pgmask 4 9 ixPSX80_PHY0_COM_COMMON_ADAPTCTL1 2 0x120620a 7 0 4294967295 adapt_cfg_fom_ber 0 2 adapt_cfg_oc_time 4 7 adapt_cfg_cdr_time 9 12 adapt_cfg_leq_time 14 17 adapt_cfg_dfe_time 19 22 adapt_cfg_fom_time 25 28 adapt_cfg_dfe_alg_sel 29 31 ixPSX80_PHY0_COM_COMMON_ADAPTCTL2 2 0x120620b 7 0 4294967295 adapt_cfg_leq_loop_gain 0 1 adapt_cfg_ofc_loop_gain 3 6 adapt_cfg_fom_loop_gain 8 11 adapt_cfg_dfe_ref_loop_gain 13 16 adapt_cfg_dfe_tap_loop_gain 18 21 adapt_cfg_pi_off_range_rt 23 25 adapt_cfg_pi_off_range_lt 27 29 ixPSX80_PHY0_COM_COMMON_ADAPT_CFG_BYP_VAL 2 0x120620c 5 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_val 0 4 adapt_cfg_gen3_leq_dcattn_byp_val 6 10 adapt_cfg_gen12_leq_pole_byp_val 13 15 adapt_cfg_gen3_leq_pole_byp_val 17 19 adapt_cfg_gen12_dfe_tp1_byp_val 22 27 ixPSX80_PHY0_COM_COMMON_ADAPT_CFG_BYP_VAL1 2 0x120620d 3 0 4294967295 adapt_cfg_gen12_dfe_tp2_byp_val 0 5 adapt_cfg_gen12_pi_off_byp_val 8 11 adapt_cfg_gen3_pi_off_byp_val 13 16 ixPSX80_PHY0_COM_COMMON_ADAPT_DBG_BYP_VAL 2 0x120620e 3 0 4294967295 adapt_dbg_doff_byp_val 0 8 adapt_dbg_xoff_byp_val 11 19 adapt_dbg_eoff_byp_val 22 30 ixPSX80_PHY0_COM_COMMON_ADAPT_DBG_BYP_VAL1 2 0x120620f 2 0 4294967295 adapt_dbg_gen3_dfe_tp1_byp_val 0 5 adapt_dbg_gen3_dfe_tp2_byp_val 7 12 ixPSX80_PHY0_COM_COMMON_ADAPT_DBG1 2 0x1206210 3 0 4294967295 adapt_dbg_apu_mode 0 2 adapt_dbg_apu_exec 6 8 adapt_dbg_apu_inst 10 25 ixPSX80_PHY0_COM_COMMON_LNCNTRL 2 0x1206211 3 0 4294967295 clkgate_dis 5 5 dll_lock_time_sel 6 7 cdr_lock_time_sel 8 9 ixPSX80_PHY0_COM_COMMON_TXTESTDEBUG 2 0x1206212 2 0 4294967295 test_single_leg_sel 0 4 test_single_leg_en 6 6 ixPSX80_PHY0_COM_COMMON_RXTESTDEBUG 2 0x1206213 1 0 4294967295 rx2tx_bypass_sel 4 6 ixPSX80_PHY0_COM_COMMON_CDR_PHCTL 2 0x1206214 3 0 4294967295 cdr_pi_stpsz_gen3 0 0 cdr_ph_gain_gen3 7 10 cdr_ph_byp_val 13 18 ixPSX80_PHY0_COM_COMMON_CDR_FRCTL 2 0x1206215 5 0 4294967295 cdr_fr_en 0 0 cdr_fr_gain_gen12 2 5 cdr_fr_gain_gen3 7 10 cdr_fr_byp_val 12 20 cdr_fr_limit 22 23 ixPSX80_PHY0_RX_CMD_BUS_RX_CONTROL_BROADCAST 2 0x120fe00 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX80_PHY0_RX_CMD_BUS_RX_CONTROL_LANE0 2 0x1200000 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX80_PHY0_RX_CMD_BUS_RX_CONTROL_LANE1 2 0x1200100 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX80_PHY0_RX_CMD_BUS_RX_CONTROL_LANE2 2 0x1200200 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX80_PHY0_RX_CMD_BUS_RX_CONTROL_LANE3 2 0x1200300 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX80_PHY0_RX_CMD_BUS_RX_CONTROL_LANE4 2 0x1200400 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX80_PHY0_RX_CMD_BUS_RX_CONTROL_LANE5 2 0x1200500 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX80_PHY0_RX_CMD_BUS_RX_CONTROL_LANE6 2 0x1200600 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX80_PHY0_RX_CMD_BUS_RX_CONTROL_LANE7 2 0x1200700 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX80_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_BROADCAST 2 0x120fe01 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX80_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE0 2 0x1200001 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX80_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE1 2 0x1200101 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX80_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE2 2 0x1200201 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX80_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE3 2 0x1200301 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX80_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE4 2 0x1200401 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX80_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE5 2 0x1200501 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX80_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE6 2 0x1200601 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX80_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE7 2 0x1200701 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX80_PHY0_RX_RX_CTL_BROADCAST 2 0x120fe02 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX80_PHY0_RX_RX_CTL_LANE0 2 0x1200002 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX80_PHY0_RX_RX_CTL_LANE1 2 0x1200102 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX80_PHY0_RX_RX_CTL_LANE2 2 0x1200202 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX80_PHY0_RX_RX_CTL_LANE3 2 0x1200302 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX80_PHY0_RX_RX_CTL_LANE4 2 0x1200402 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX80_PHY0_RX_RX_CTL_LANE5 2 0x1200502 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX80_PHY0_RX_RX_CTL_LANE6 2 0x1200602 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX80_PHY0_RX_RX_CTL_LANE7 2 0x1200702 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX80_PHY0_RX_DLL_CTL_BROADCAST 2 0x120fe03 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX80_PHY0_RX_DLL_CTL_LANE0 2 0x1200003 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX80_PHY0_RX_DLL_CTL_LANE1 2 0x1200103 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX80_PHY0_RX_DLL_CTL_LANE2 2 0x1200203 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX80_PHY0_RX_DLL_CTL_LANE3 2 0x1200303 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX80_PHY0_RX_DLL_CTL_LANE4 2 0x1200403 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX80_PHY0_RX_DLL_CTL_LANE5 2 0x1200503 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX80_PHY0_RX_DLL_CTL_LANE6 2 0x1200603 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX80_PHY0_RX_DLL_CTL_LANE7 2 0x1200703 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX80_PHY0_RX_RXTEST_REGS_BROADCAST 2 0x120fe04 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX80_PHY0_RX_RXTEST_REGS_LANE0 2 0x1200004 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX80_PHY0_RX_RXTEST_REGS_LANE1 2 0x1200104 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX80_PHY0_RX_RXTEST_REGS_LANE2 2 0x1200204 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX80_PHY0_RX_RXTEST_REGS_LANE3 2 0x1200304 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX80_PHY0_RX_RXTEST_REGS_LANE4 2 0x1200404 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX80_PHY0_RX_RXTEST_REGS_LANE5 2 0x1200504 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX80_PHY0_RX_RXTEST_REGS_LANE6 2 0x1200604 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX80_PHY0_RX_RXTEST_REGS_LANE7 2 0x1200704 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX80_PHY0_RX_ELECIDLE_DEBUG_BROADCAST 2 0x120fe05 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX80_PHY0_RX_ELECIDLE_DEBUG_LANE0 2 0x1200005 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX80_PHY0_RX_ELECIDLE_DEBUG_LANE1 2 0x1200105 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX80_PHY0_RX_ELECIDLE_DEBUG_LANE2 2 0x1200205 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX80_PHY0_RX_ELECIDLE_DEBUG_LANE3 2 0x1200305 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX80_PHY0_RX_ELECIDLE_DEBUG_LANE4 2 0x1200405 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX80_PHY0_RX_ELECIDLE_DEBUG_LANE5 2 0x1200505 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX80_PHY0_RX_ELECIDLE_DEBUG_LANE6 2 0x1200605 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX80_PHY0_RX_ELECIDLE_DEBUG_LANE7 2 0x1200705 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX80_PHY0_RX_ADAPTCTL_BROADCAST 2 0x120fe0a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX80_PHY0_RX_ADAPTCTL_LANE0 2 0x120000a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX80_PHY0_RX_ADAPTCTL_LANE1 2 0x120010a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX80_PHY0_RX_ADAPTCTL_LANE2 2 0x120020a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX80_PHY0_RX_ADAPTCTL_LANE3 2 0x120030a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX80_PHY0_RX_ADAPTCTL_LANE4 2 0x120040a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX80_PHY0_RX_ADAPTCTL_LANE5 2 0x120050a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX80_PHY0_RX_ADAPTCTL_LANE6 2 0x120060a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX80_PHY0_RX_ADAPTCTL_LANE7 2 0x120070a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX80_PHY0_RX_FOMCALCCTL_BROADCAST 2 0x120fe0b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX80_PHY0_RX_FOMCALCCTL_LANE0 2 0x120000b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX80_PHY0_RX_FOMCALCCTL_LANE1 2 0x120010b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX80_PHY0_RX_FOMCALCCTL_LANE2 2 0x120020b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX80_PHY0_RX_FOMCALCCTL_LANE3 2 0x120030b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX80_PHY0_RX_FOMCALCCTL_LANE4 2 0x120040b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX80_PHY0_RX_FOMCALCCTL_LANE5 2 0x120050b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX80_PHY0_RX_FOMCALCCTL_LANE6 2 0x120060b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX80_PHY0_RX_FOMCALCCTL_LANE7 2 0x120070b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX80_PHY0_RX_ADAPT_CFG_BYP_EN_BROADCAST 2 0x120fe0c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX80_PHY0_RX_ADAPT_CFG_BYP_EN_LANE0 2 0x120000c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX80_PHY0_RX_ADAPT_CFG_BYP_EN_LANE1 2 0x120010c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX80_PHY0_RX_ADAPT_CFG_BYP_EN_LANE2 2 0x120020c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX80_PHY0_RX_ADAPT_CFG_BYP_EN_LANE3 2 0x120030c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX80_PHY0_RX_ADAPT_CFG_BYP_EN_LANE4 2 0x120040c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX80_PHY0_RX_ADAPT_CFG_BYP_EN_LANE5 2 0x120050c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX80_PHY0_RX_ADAPT_CFG_BYP_EN_LANE6 2 0x120060c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX80_PHY0_RX_ADAPT_CFG_BYP_EN_LANE7 2 0x120070c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX80_PHY0_RX_DBG_BYP_EN_BROADCAST 2 0x120fe0d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX80_PHY0_RX_DBG_BYP_EN_LANE0 2 0x120000d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX80_PHY0_RX_DBG_BYP_EN_LANE1 2 0x120010d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX80_PHY0_RX_DBG_BYP_EN_LANE2 2 0x120020d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX80_PHY0_RX_DBG_BYP_EN_LANE3 2 0x120030d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX80_PHY0_RX_DBG_BYP_EN_LANE4 2 0x120040d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX80_PHY0_RX_DBG_BYP_EN_LANE5 2 0x120050d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX80_PHY0_RX_DBG_BYP_EN_LANE6 2 0x120060d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX80_PHY0_RX_DBG_BYP_EN_LANE7 2 0x120070d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX80_PHY0_RX_ADAPTDBG1_BROADCAST 2 0x120fe0e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX80_PHY0_RX_ADAPTDBG1_LANE0 2 0x120000e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX80_PHY0_RX_ADAPTDBG1_LANE1 2 0x120010e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX80_PHY0_RX_ADAPTDBG1_LANE2 2 0x120020e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX80_PHY0_RX_ADAPTDBG1_LANE3 2 0x120030e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX80_PHY0_RX_ADAPTDBG1_LANE4 2 0x120040e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX80_PHY0_RX_ADAPTDBG1_LANE5 2 0x120050e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX80_PHY0_RX_ADAPTDBG1_LANE6 2 0x120060e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX80_PHY0_RX_ADAPTDBG1_LANE7 2 0x120070e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX80_PHY0_TX_CMD_BUS_TX_CONTROL_BROADCAST 2 0x120ff00 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX80_PHY0_TX_CMD_BUS_TX_CONTROL_LANE0 2 0x1202000 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX80_PHY0_TX_CMD_BUS_TX_CONTROL_LANE1 2 0x1202100 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX80_PHY0_TX_CMD_BUS_TX_CONTROL_LANE2 2 0x1202200 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX80_PHY0_TX_CMD_BUS_TX_CONTROL_LANE3 2 0x1202300 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX80_PHY0_TX_CMD_BUS_TX_CONTROL_LANE4 2 0x1202400 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX80_PHY0_TX_CMD_BUS_TX_CONTROL_LANE5 2 0x1202500 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX80_PHY0_TX_CMD_BUS_TX_CONTROL_LANE6 2 0x1202600 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX80_PHY0_TX_CMD_BUS_TX_CONTROL_LANE7 2 0x1202700 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX80_PHY0_TX_DFX_BROADCAST 2 0x120ff01 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX80_PHY0_TX_DFX_LANE0 2 0x1202001 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX80_PHY0_TX_DFX_LANE1 2 0x1202101 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX80_PHY0_TX_DFX_LANE2 2 0x1202201 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX80_PHY0_TX_DFX_LANE3 2 0x1202301 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX80_PHY0_TX_DFX_LANE4 2 0x1202401 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX80_PHY0_TX_DFX_LANE5 2 0x1202501 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX80_PHY0_TX_DFX_LANE6 2 0x1202601 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX80_PHY0_TX_DFX_LANE7 2 0x1202701 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX80_PHY0_TX_DEEMPH_BROADCAST 2 0x120ff02 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX80_PHY0_TX_DEEMPH_LANE0 2 0x1202002 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX80_PHY0_TX_DEEMPH_LANE1 2 0x1202102 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX80_PHY0_TX_DEEMPH_LANE2 2 0x1202202 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX80_PHY0_TX_DEEMPH_LANE3 2 0x1202302 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX80_PHY0_TX_DEEMPH_LANE4 2 0x1202402 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX80_PHY0_TX_DEEMPH_LANE5 2 0x1202502 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX80_PHY0_TX_DEEMPH_LANE6 2 0x1202602 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX80_PHY0_TX_DEEMPH_LANE7 2 0x1202702 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX80_PHY0_TX_TSTMARGDEEMPH_BROADCAST 2 0x120ff03 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX80_PHY0_TX_TSTMARGDEEMPH_LANE0 2 0x1202003 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX80_PHY0_TX_TSTMARGDEEMPH_LANE1 2 0x1202103 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX80_PHY0_TX_TSTMARGDEEMPH_LANE2 2 0x1202203 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX80_PHY0_TX_TSTMARGDEEMPH_LANE3 2 0x1202303 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX80_PHY0_TX_TSTMARGDEEMPH_LANE4 2 0x1202403 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX80_PHY0_TX_TSTMARGDEEMPH_LANE5 2 0x1202503 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX80_PHY0_TX_TSTMARGDEEMPH_LANE6 2 0x1202603 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX80_PHY0_TX_TSTMARGDEEMPH_LANE7 2 0x1202703 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX80_PHY0_TX_MARGDEEMPHSTATUS_BROADCAST 2 0x120ff04 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX80_PHY0_TX_MARGDEEMPHSTATUS_LANE0 2 0x1202004 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX80_PHY0_TX_MARGDEEMPHSTATUS_LANE1 2 0x1202104 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX80_PHY0_TX_MARGDEEMPHSTATUS_LANE2 2 0x1202204 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX80_PHY0_TX_MARGDEEMPHSTATUS_LANE3 2 0x1202304 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX80_PHY0_TX_MARGDEEMPHSTATUS_LANE4 2 0x1202404 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX80_PHY0_TX_MARGDEEMPHSTATUS_LANE5 2 0x1202504 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX80_PHY0_TX_MARGDEEMPHSTATUS_LANE6 2 0x1202604 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX80_PHY0_TX_MARGDEEMPHSTATUS_LANE7 2 0x1202704 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX80_PHY0_TX_TXCNTRL_BROADCAST 2 0x120ff06 1 0 4294967295 rxdetect_response 11 11 ixPSX80_PHY0_TX_TXCNTRL_LANE0 2 0x1202006 1 0 4294967295 rxdetect_response 11 11 ixPSX80_PHY0_TX_TXCNTRL_LANE1 2 0x1202106 1 0 4294967295 rxdetect_response 11 11 ixPSX80_PHY0_TX_TXCNTRL_LANE2 2 0x1202206 1 0 4294967295 rxdetect_response 11 11 ixPSX80_PHY0_TX_TXCNTRL_LANE3 2 0x1202306 1 0 4294967295 rxdetect_response 11 11 ixPSX80_PHY0_TX_TXCNTRL_LANE4 2 0x1202406 1 0 4294967295 rxdetect_response 11 11 ixPSX80_PHY0_TX_TXCNTRL_LANE5 2 0x1202506 1 0 4294967295 rxdetect_response 11 11 ixPSX80_PHY0_TX_TXCNTRL_LANE6 2 0x1202606 1 0 4294967295 rxdetect_response 11 11 ixPSX80_PHY0_TX_TXCNTRL_LANE7 2 0x1202706 1 0 4294967295 rxdetect_response 11 11 ixPSX80_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_BROADCAST 2 0x120ff07 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX80_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE0 2 0x1202007 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX80_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE1 2 0x1202107 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX80_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE2 2 0x1202207 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX80_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE3 2 0x1202307 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX80_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE4 2 0x1202407 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX80_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE5 2 0x1202507 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX80_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE6 2 0x1202607 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX80_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE7 2 0x1202707 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX80_PHY0_HTPLL_ROPLL_PowerDownEn 2 0x1204180 2 0 4294967295 PllPowerDownEn 0 2 PllPowerDownOvrd 4 4 ixPSX80_PHY0_HTPLL_ROPLL_PciPllControlExt 2 0x1204101 2 0 4294967295 BgRcFiltShortTimer 0 2 BgRcFiltShortForce 3 3 ixPSX80_PHY0_HTPLL_ROPLL_PciPllControl 2 0x1204102 8 0 4294967295 VcoRange 0 7 LpfRes 10 13 CpiDac 14 21 FastLockTimer 22 25 FastLock 26 26 ClearLockDetect 28 28 PllLocked 29 29 ManaregRampTimer 30 31 ixPSX80_PHY0_HTPLL_ROPLL_PciPllTestDebug1 2 0x1204103 2 0 4294967295 PllMeasCtl 0 10 PllTp 11 31 ixPSX80_PHY0_HTPLL_ROPLL_PciPllTestDebug2 2 0x1204104 3 0 4294967295 PLL_MeasOut 0 17 PLL_Tpo 18 18 PllDsmObsSel 21 23 ixPSX80_PHY0_HTPLL_ROPLL_PciPllFreqMode 2 0x1204105 10 0 4294967295 PllClkFreq 0 6 PllFreqModeOvrd 7 7 Clk2CtlrEn 8 8 Clk2CtlrEnOvrd 9 9 Clk2CtlrRate 10 10 Clk2CtlrRateOvrd 11 11 FullRateClkEn 12 12 FullRateClkEnOvrd 13 13 HalfRateClkEn 16 16 HalfRateClkEnOvrd 17 17 ixPSX80_PHY0_HTPLL_ROPLL_PciPllUpdateCtrl 2 0x1204108 1 0 4294967295 PllControlUpdate 0 0 ixPSX80_PHY0_HTPLL_ROPLL_PciPllTestDebug3 2 0x1204109 8 0 4294967295 AutoTrigRoCal 0 0 ManTrigRoCal 1 1 ContinueCal 2 2 CalDone 3 3 ManCalRdyNext 4 4 CalFail 5 6 ADCRefIn 20 25 PLL_AdcOut 26 26 ixPSX80_PHY0_HTPLL_ROPLL_PciFuseProcess 2 0x120410a 3 0 4294967295 PhyFuseValid 0 0 FuseProcRefAdj 1 4 FuseProcPllSpare 8 11 ixPSX80_PHY0_HTPLL_ROPLL_PciPllTestDebug4 2 0x120410b 1 0 4294967295 AltDiv 0 15 ixPSX80_PHY0_HTPLL_ROPLL_PciPllTestDebug5 2 0x120410c 2 0 4294967295 VregCtl7_0 0 7 VregCtl11_8 8 11 ixPSX80_PHY0_LCPLL_LCPLL_PowerDownEn 2 0x1204080 2 0 4294967295 PllPowerDownEn 0 2 PllPowerDownOvrd 4 4 ixPSX80_PHY0_LCPLL_LCPLL_PciPllControlExt 2 0x1204001 2 0 4294967295 BgRcFiltShortTimer 0 2 BgRcFiltShortForce 3 3 ixPSX80_PHY0_LCPLL_LCPLL_PciPllControl 2 0x1204002 10 0 4294967295 VcoRange 0 7 VcoRangeBin 8 10 LpfRes 12 13 CpiDac3_0 14 17 CpiDac7_4 18 21 FastLockTimer 22 25 FastLock 26 26 ClearLockDetect 28 28 PllLocked 29 29 ManaregRampTimer 30 31 ixPSX80_PHY0_LCPLL_LCPLL_PciPllTestDebug1 2 0x1204003 2 0 4294967295 PllMeasCtl 0 10 PllTp 11 31 ixPSX80_PHY0_LCPLL_LCPLL_PciPllTestDebug2 2 0x1204004 3 0 4294967295 PLC_MeasOut 0 17 PLC_Tpo 18 18 PllDsmObsSel 21 23 ixPSX80_PHY0_LCPLL_LCPLL_PciPllFreqMode 2 0x1204005 4 0 4294967295 FullRateClkEn 12 12 FullRateClkEnOvrd 13 13 HalfRateClkEn 16 16 HalfRateClkEnOvrd 17 17 ixPSX80_PHY0_LCPLL_LCPLL_PciLcVcoCtrl 2 0x1204007 1 0 4294967295 LCTankI 0 7 ixPSX80_PHY0_LCPLL_LCPLL_PciPllUpdateCtrl 2 0x1204008 2 0 4294967295 PllControlUpdate 0 0 MeasCycleCnt 23 25 ixPSX80_PHY0_LCPLL_LCPLL_PciPllTestDebug3 2 0x1204009 8 0 4294967295 FinalFbCnt 0 13 CalDone 15 15 ManCalRdyNext 16 16 CalFail 17 19 ADCRefIn 20 25 PLC_AdcOut 26 26 StartCntEn 27 27 ContinueCal 29 29 ixPSX80_PHY0_LCPLL_LCPLL_PciPllTestDebug4 2 0x120400b 1 0 4294967295 AltDiv 0 15 ixPSX80_PHY0_LCPLL_LCPLL_PciPllTestDebug5 2 0x120400c 2 0 4294967295 VregCtl7_0 0 7 VregCtl11_8 8 11 ixPSX81_PHY0_COM_COMMON_FUSE1 2 0x1216200 9 0 4294967295 fuse1_valid 0 0 fuse1_ei_det_thresh_sel 1 2 fuse1_dll_flock_disable 3 3 fuse1_cdr_ph_gain_gen12 4 7 fuse1_cdr_pi_stpsz_gen12 8 8 fuse1_ron_ctl 9 10 fuse1_rtt_ctl 11 12 fuse1_rxdetect_samp_time 18 19 fuse1_spare 20 31 ixPSX81_PHY0_COM_COMMON_FUSE2 2 0x1216201 2 0 4294967295 fuse2_valid 0 0 fuse2_spare 1 31 ixPSX81_PHY0_COM_COMMON_FUSE3 2 0x1216202 9 0 4294967295 fuse3_valid 0 0 fuse3_dll_cpi_sel 1 3 fuse3_ron_override_val 4 9 fuse3_rtt_override_val 10 15 fuse3_lcpll_bw_adj 16 19 fuse3_lcpll_ref_adj 20 23 fuse3_ropll_ref_adj 24 27 fuse3_refresh_cal_en 28 28 fuse3_spare 29 31 ixPSX81_PHY0_COM_COMMON_ELECIDLE 2 0x1216204 4 0 4294967295 ei_det_dis_ps0 0 0 ei_det_initiate_ofc_cal 1 1 ei_det_dac_test_ofc_sel 2 2 ei_det_dac_test_code 4 9 ixPSX81_PHY0_COM_COMMON_DFX 2 0x1216205 8 0 4294967295 nelb_en 0 0 prbs_seed 1 10 force_cdr_en 11 11 ovrd_pll_on 13 13 ovrd_clk_en 15 15 dsm_sel 17 22 dsm_en 24 27 hold_rdy_response 29 29 ixPSX81_PHY0_COM_COMMON_MAR_DEEMPH_NOM 2 0x1216206 4 0 4294967295 tx_margin_nom 0 7 deemph_gen1_nom 8 15 deemph35_gen2_nom 16 23 deemph60_gen2_nom 24 31 ixPSX81_PHY0_COM_COMMON_SELDEEMPH35 2 0x1216207 4 0 4294967295 deemph_3pt5db_1 0 7 deemph_3pt5db_2 8 15 deemph_3pt5db_3 16 23 deemph_3pt5db_4 24 31 ixPSX81_PHY0_COM_COMMON_SELDEEMPH60 2 0x1216208 4 0 4294967295 deemph_6db_1 0 7 deemph_6db_2 8 15 deemph_6db_3 16 23 deemph_6db_4 24 31 ixPSX81_PHY0_COM_COMMON_LANE_PWRMGMT 2 0x1216209 2 0 4294967295 pgdelay 0 3 pgmask 4 9 ixPSX81_PHY0_COM_COMMON_ADAPTCTL1 2 0x121620a 7 0 4294967295 adapt_cfg_fom_ber 0 2 adapt_cfg_oc_time 4 7 adapt_cfg_cdr_time 9 12 adapt_cfg_leq_time 14 17 adapt_cfg_dfe_time 19 22 adapt_cfg_fom_time 25 28 adapt_cfg_dfe_alg_sel 29 31 ixPSX81_PHY0_COM_COMMON_ADAPTCTL2 2 0x121620b 7 0 4294967295 adapt_cfg_leq_loop_gain 0 1 adapt_cfg_ofc_loop_gain 3 6 adapt_cfg_fom_loop_gain 8 11 adapt_cfg_dfe_ref_loop_gain 13 16 adapt_cfg_dfe_tap_loop_gain 18 21 adapt_cfg_pi_off_range_rt 23 25 adapt_cfg_pi_off_range_lt 27 29 ixPSX81_PHY0_COM_COMMON_ADAPT_CFG_BYP_VAL 2 0x121620c 5 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_val 0 4 adapt_cfg_gen3_leq_dcattn_byp_val 6 10 adapt_cfg_gen12_leq_pole_byp_val 13 15 adapt_cfg_gen3_leq_pole_byp_val 17 19 adapt_cfg_gen12_dfe_tp1_byp_val 22 27 ixPSX81_PHY0_COM_COMMON_ADAPT_CFG_BYP_VAL1 2 0x121620d 3 0 4294967295 adapt_cfg_gen12_dfe_tp2_byp_val 0 5 adapt_cfg_gen12_pi_off_byp_val 8 11 adapt_cfg_gen3_pi_off_byp_val 13 16 ixPSX81_PHY0_COM_COMMON_ADAPT_DBG_BYP_VAL 2 0x121620e 3 0 4294967295 adapt_dbg_doff_byp_val 0 8 adapt_dbg_xoff_byp_val 11 19 adapt_dbg_eoff_byp_val 22 30 ixPSX81_PHY0_COM_COMMON_ADAPT_DBG_BYP_VAL1 2 0x121620f 2 0 4294967295 adapt_dbg_gen3_dfe_tp1_byp_val 0 5 adapt_dbg_gen3_dfe_tp2_byp_val 7 12 ixPSX81_PHY0_COM_COMMON_ADAPT_DBG1 2 0x1216210 3 0 4294967295 adapt_dbg_apu_mode 0 2 adapt_dbg_apu_exec 6 8 adapt_dbg_apu_inst 10 25 ixPSX81_PHY0_COM_COMMON_LNCNTRL 2 0x1216211 3 0 4294967295 clkgate_dis 5 5 dll_lock_time_sel 6 7 cdr_lock_time_sel 8 9 ixPSX81_PHY0_COM_COMMON_TXTESTDEBUG 2 0x1216212 2 0 4294967295 test_single_leg_sel 0 4 test_single_leg_en 6 6 ixPSX81_PHY0_COM_COMMON_RXTESTDEBUG 2 0x1216213 1 0 4294967295 rx2tx_bypass_sel 4 6 ixPSX81_PHY0_COM_COMMON_CDR_PHCTL 2 0x1216214 3 0 4294967295 cdr_pi_stpsz_gen3 0 0 cdr_ph_gain_gen3 7 10 cdr_ph_byp_val 13 18 ixPSX81_PHY0_COM_COMMON_CDR_FRCTL 2 0x1216215 5 0 4294967295 cdr_fr_en 0 0 cdr_fr_gain_gen12 2 5 cdr_fr_gain_gen3 7 10 cdr_fr_byp_val 12 20 cdr_fr_limit 22 23 ixPSX81_PHY0_RX_CMD_BUS_RX_CONTROL_BROADCAST 2 0x121fe00 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX81_PHY0_RX_CMD_BUS_RX_CONTROL_LANE0 2 0x1210000 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX81_PHY0_RX_CMD_BUS_RX_CONTROL_LANE1 2 0x1210100 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX81_PHY0_RX_CMD_BUS_RX_CONTROL_LANE2 2 0x1210200 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX81_PHY0_RX_CMD_BUS_RX_CONTROL_LANE3 2 0x1210300 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX81_PHY0_RX_CMD_BUS_RX_CONTROL_LANE4 2 0x1210400 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX81_PHY0_RX_CMD_BUS_RX_CONTROL_LANE5 2 0x1210500 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX81_PHY0_RX_CMD_BUS_RX_CONTROL_LANE6 2 0x1210600 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX81_PHY0_RX_CMD_BUS_RX_CONTROL_LANE7 2 0x1210700 3 0 4294967295 rx_pwr 0 2 rx_pg_en 3 4 eidet_en 5 5 ixPSX81_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_BROADCAST 2 0x121fe01 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX81_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE0 2 0x1210001 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX81_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE1 2 0x1210101 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX81_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE2 2 0x1210201 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX81_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE3 2 0x1210301 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX81_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE4 2 0x1210401 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX81_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE5 2 0x1210501 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX81_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE6 2 0x1210601 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX81_PHY0_RX_CMD_BUS_GLOBAL_FOR_RX_LANE7 2 0x1210701 3 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 ixPSX81_PHY0_RX_RX_CTL_BROADCAST 2 0x121fe02 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX81_PHY0_RX_RX_CTL_LANE0 2 0x1210002 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX81_PHY0_RX_RX_CTL_LANE1 2 0x1210102 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX81_PHY0_RX_RX_CTL_LANE2 2 0x1210202 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX81_PHY0_RX_RX_CTL_LANE3 2 0x1210302 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX81_PHY0_RX_RX_CTL_LANE4 2 0x1210402 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX81_PHY0_RX_RX_CTL_LANE5 2 0x1210502 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX81_PHY0_RX_RX_CTL_LANE6 2 0x1210602 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX81_PHY0_RX_RX_CTL_LANE7 2 0x1210702 6 0 4294967295 rx_dfr_dis 0 0 rx_dac_vdc 1 8 rx_term_mode 11 12 rx_vdc_dac_tri 13 13 rx_vdc_dac_fixed_polarity 14 14 rx_dfr_data_sign 15 15 ixPSX81_PHY0_RX_DLL_CTL_BROADCAST 2 0x121fe03 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX81_PHY0_RX_DLL_CTL_LANE0 2 0x1210003 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX81_PHY0_RX_DLL_CTL_LANE1 2 0x1210103 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX81_PHY0_RX_DLL_CTL_LANE2 2 0x1210203 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX81_PHY0_RX_DLL_CTL_LANE3 2 0x1210303 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX81_PHY0_RX_DLL_CTL_LANE4 2 0x1210403 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX81_PHY0_RX_DLL_CTL_LANE5 2 0x1210503 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX81_PHY0_RX_DLL_CTL_LANE6 2 0x1210603 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX81_PHY0_RX_DLL_CTL_LANE7 2 0x1210703 4 0 4294967295 dll_dbg_clk_sel 0 2 dll_dbg_vreg_ref_sel 4 4 dll_analog_obs_en 5 5 dll_surge_ctrl 7 7 ixPSX81_PHY0_RX_RXTEST_REGS_BROADCAST 2 0x121fe04 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX81_PHY0_RX_RXTEST_REGS_LANE0 2 0x1210004 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX81_PHY0_RX_RXTEST_REGS_LANE1 2 0x1210104 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX81_PHY0_RX_RXTEST_REGS_LANE2 2 0x1210204 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX81_PHY0_RX_RXTEST_REGS_LANE3 2 0x1210304 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX81_PHY0_RX_RXTEST_REGS_LANE4 2 0x1210404 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX81_PHY0_RX_RXTEST_REGS_LANE5 2 0x1210504 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX81_PHY0_RX_RXTEST_REGS_LANE6 2 0x1210604 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX81_PHY0_RX_RXTEST_REGS_LANE7 2 0x1210704 8 0 4294967295 prbs_clr 0 0 prbs_err 1 1 rx_dfr_force 4 4 rx_force_leq_en 5 5 rx_byp_ac_cap 6 6 rx_byp_res 7 7 rx_raw_pin_gate 8 8 rx_force_short_vdc_out 10 10 ixPSX81_PHY0_RX_ELECIDLE_DEBUG_BROADCAST 2 0x121fe05 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX81_PHY0_RX_ELECIDLE_DEBUG_LANE0 2 0x1210005 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX81_PHY0_RX_ELECIDLE_DEBUG_LANE1 2 0x1210105 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX81_PHY0_RX_ELECIDLE_DEBUG_LANE2 2 0x1210205 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX81_PHY0_RX_ELECIDLE_DEBUG_LANE3 2 0x1210305 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX81_PHY0_RX_ELECIDLE_DEBUG_LANE4 2 0x1210405 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX81_PHY0_RX_ELECIDLE_DEBUG_LANE5 2 0x1210505 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX81_PHY0_RX_ELECIDLE_DEBUG_LANE6 2 0x1210605 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX81_PHY0_RX_ELECIDLE_DEBUG_LANE7 2 0x1210705 5 0 4294967295 ei_det_async_ei 0 0 ei_det_ofc_comp_out 1 1 ei_det_ofc_out_of_bounds 2 2 ei_det_thresh_adj 3 8 ei_det_dac_test_en 10 10 ixPSX81_PHY0_RX_ADAPTCTL_BROADCAST 2 0x121fe0a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX81_PHY0_RX_ADAPTCTL_LANE0 2 0x121000a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX81_PHY0_RX_ADAPTCTL_LANE1 2 0x121010a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX81_PHY0_RX_ADAPTCTL_LANE2 2 0x121020a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX81_PHY0_RX_ADAPTCTL_LANE3 2 0x121030a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX81_PHY0_RX_ADAPTCTL_LANE4 2 0x121040a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX81_PHY0_RX_ADAPTCTL_LANE5 2 0x121050a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX81_PHY0_RX_ADAPTCTL_LANE6 2 0x121060a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX81_PHY0_RX_ADAPTCTL_LANE7 2 0x121070a 4 0 4294967295 adapt_cfg_mode 0 9 adapt_cfg_track_sel 13 15 adapt_cfg_pwr_save_off 17 17 adapt_cfg_pwr_down_time_sel 19 20 ixPSX81_PHY0_RX_FOMCALCCTL_BROADCAST 2 0x121fe0b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX81_PHY0_RX_FOMCALCCTL_LANE0 2 0x121000b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX81_PHY0_RX_FOMCALCCTL_LANE1 2 0x121010b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX81_PHY0_RX_FOMCALCCTL_LANE2 2 0x121020b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX81_PHY0_RX_FOMCALCCTL_LANE3 2 0x121030b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX81_PHY0_RX_FOMCALCCTL_LANE4 2 0x121040b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX81_PHY0_RX_FOMCALCCTL_LANE5 2 0x121050b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX81_PHY0_RX_FOMCALCCTL_LANE6 2 0x121060b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX81_PHY0_RX_FOMCALCCTL_LANE7 2 0x121070b 7 0 4294967295 rx_fom_valid 0 0 rx_eye_fom 1 8 enable_fom 11 11 request_fom 12 12 request_trk 13 13 request_trn 14 14 response_mode 16 16 ixPSX81_PHY0_RX_ADAPT_CFG_BYP_EN_BROADCAST 2 0x121fe0c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX81_PHY0_RX_ADAPT_CFG_BYP_EN_LANE0 2 0x121000c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX81_PHY0_RX_ADAPT_CFG_BYP_EN_LANE1 2 0x121010c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX81_PHY0_RX_ADAPT_CFG_BYP_EN_LANE2 2 0x121020c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX81_PHY0_RX_ADAPT_CFG_BYP_EN_LANE3 2 0x121030c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX81_PHY0_RX_ADAPT_CFG_BYP_EN_LANE4 2 0x121040c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX81_PHY0_RX_ADAPT_CFG_BYP_EN_LANE5 2 0x121050c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX81_PHY0_RX_ADAPT_CFG_BYP_EN_LANE6 2 0x121060c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX81_PHY0_RX_ADAPT_CFG_BYP_EN_LANE7 2 0x121070c 8 0 4294967295 adapt_cfg_gen12_leq_dcattn_byp_en 0 0 adapt_cfg_gen3_leq_dcattn_byp_en 1 1 adapt_cfg_gen12_leq_pole_byp_en 2 2 adapt_cfg_gen3_leq_pole_byp_en 3 3 adapt_cfg_gen12_dfe_tp1_byp_en 4 4 adapt_cfg_gen12_dfe_tp2_byp_en 5 5 adapt_cfg_gen12_pi_off_byp_en 6 6 adapt_cfg_gen3_pi_off_byp_en 7 7 ixPSX81_PHY0_RX_DBG_BYP_EN_BROADCAST 2 0x121fe0d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX81_PHY0_RX_DBG_BYP_EN_LANE0 2 0x121000d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX81_PHY0_RX_DBG_BYP_EN_LANE1 2 0x121010d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX81_PHY0_RX_DBG_BYP_EN_LANE2 2 0x121020d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX81_PHY0_RX_DBG_BYP_EN_LANE3 2 0x121030d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX81_PHY0_RX_DBG_BYP_EN_LANE4 2 0x121040d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX81_PHY0_RX_DBG_BYP_EN_LANE5 2 0x121050d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX81_PHY0_RX_DBG_BYP_EN_LANE6 2 0x121060d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX81_PHY0_RX_DBG_BYP_EN_LANE7 2 0x121070d 8 0 4294967295 adapt_dbg_doff_byp_en 0 0 adapt_dbg_xoff_byp_en 1 1 adapt_dbg_eoff_byp_en 2 2 adapt_dbg_gen3_dfe_tp1_byp_en 3 3 adapt_dbg_gen3_dfe_tp2_byp_en 4 4 adapt_dbg_leq_dcattn_byp_ovr_disable 5 5 cdr_ph_byp_en 6 6 cdr_fr_byp_en 7 7 ixPSX81_PHY0_RX_ADAPTDBG1_BROADCAST 2 0x121fe0e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX81_PHY0_RX_ADAPTDBG1_LANE0 2 0x121000e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX81_PHY0_RX_ADAPTDBG1_LANE1 2 0x121010e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX81_PHY0_RX_ADAPTDBG1_LANE2 2 0x121020e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX81_PHY0_RX_ADAPTDBG1_LANE3 2 0x121030e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX81_PHY0_RX_ADAPTDBG1_LANE4 2 0x121040e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX81_PHY0_RX_ADAPTDBG1_LANE5 2 0x121050e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX81_PHY0_RX_ADAPTDBG1_LANE6 2 0x121060e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX81_PHY0_RX_ADAPTDBG1_LANE7 2 0x121070e 4 0 4294967295 adapt_dbg_bus_sel 0 3 adapt_dbg_bus_out 6 16 adapt_dbg_force_rst 19 19 adapt_dbg_force_en 20 20 ixPSX81_PHY0_TX_CMD_BUS_TX_CONTROL_BROADCAST 2 0x121ff00 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX81_PHY0_TX_CMD_BUS_TX_CONTROL_LANE0 2 0x1212000 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX81_PHY0_TX_CMD_BUS_TX_CONTROL_LANE1 2 0x1212100 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX81_PHY0_TX_CMD_BUS_TX_CONTROL_LANE2 2 0x1212200 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX81_PHY0_TX_CMD_BUS_TX_CONTROL_LANE3 2 0x1212300 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX81_PHY0_TX_CMD_BUS_TX_CONTROL_LANE4 2 0x1212400 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX81_PHY0_TX_CMD_BUS_TX_CONTROL_LANE5 2 0x1212500 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX81_PHY0_TX_CMD_BUS_TX_CONTROL_LANE6 2 0x1212600 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX81_PHY0_TX_CMD_BUS_TX_CONTROL_LANE7 2 0x1212700 2 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 ixPSX81_PHY0_TX_DFX_BROADCAST 2 0x121ff01 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX81_PHY0_TX_DFX_LANE0 2 0x1212001 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX81_PHY0_TX_DFX_LANE1 2 0x1212101 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX81_PHY0_TX_DFX_LANE2 2 0x1212201 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX81_PHY0_TX_DFX_LANE3 2 0x1212301 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX81_PHY0_TX_DFX_LANE4 2 0x1212401 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX81_PHY0_TX_DFX_LANE5 2 0x1212501 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX81_PHY0_TX_DFX_LANE6 2 0x1212601 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX81_PHY0_TX_DFX_LANE7 2 0x1212701 4 0 4294967295 obs_en 0 0 obs_sel 2 2 felb_en 4 4 prbs_en 8 8 ixPSX81_PHY0_TX_DEEMPH_BROADCAST 2 0x121ff02 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX81_PHY0_TX_DEEMPH_LANE0 2 0x1212002 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX81_PHY0_TX_DEEMPH_LANE1 2 0x1212102 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX81_PHY0_TX_DEEMPH_LANE2 2 0x1212202 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX81_PHY0_TX_DEEMPH_LANE3 2 0x1212302 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX81_PHY0_TX_DEEMPH_LANE4 2 0x1212402 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX81_PHY0_TX_DEEMPH_LANE5 2 0x1212502 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX81_PHY0_TX_DEEMPH_LANE6 2 0x1212602 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX81_PHY0_TX_DEEMPH_LANE7 2 0x1212702 3 0 4294967295 gen3_coeff_cm1 0 7 gen3_coeff_c0 8 13 gen3_coeff_cp1 16 23 ixPSX81_PHY0_TX_TSTMARGDEEMPH_BROADCAST 2 0x121ff03 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX81_PHY0_TX_TSTMARGDEEMPH_LANE0 2 0x1212003 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX81_PHY0_TX_TSTMARGDEEMPH_LANE1 2 0x1212103 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX81_PHY0_TX_TSTMARGDEEMPH_LANE2 2 0x1212203 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX81_PHY0_TX_TSTMARGDEEMPH_LANE3 2 0x1212303 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX81_PHY0_TX_TSTMARGDEEMPH_LANE4 2 0x1212403 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX81_PHY0_TX_TSTMARGDEEMPH_LANE5 2 0x1212503 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX81_PHY0_TX_TSTMARGDEEMPH_LANE6 2 0x1212603 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX81_PHY0_TX_TSTMARGDEEMPH_LANE7 2 0x1212703 2 0 4294967295 txmarg_sel 0 2 deemph35_sel 3 3 ixPSX81_PHY0_TX_MARGDEEMPHSTATUS_BROADCAST 2 0x121ff04 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX81_PHY0_TX_MARGDEEMPHSTATUS_LANE0 2 0x1212004 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX81_PHY0_TX_MARGDEEMPHSTATUS_LANE1 2 0x1212104 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX81_PHY0_TX_MARGDEEMPHSTATUS_LANE2 2 0x1212204 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX81_PHY0_TX_MARGDEEMPHSTATUS_LANE3 2 0x1212304 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX81_PHY0_TX_MARGDEEMPHSTATUS_LANE4 2 0x1212404 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX81_PHY0_TX_MARGDEEMPHSTATUS_LANE5 2 0x1212504 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX81_PHY0_TX_MARGDEEMPHSTATUS_LANE6 2 0x1212604 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX81_PHY0_TX_MARGDEEMPHSTATUS_LANE7 2 0x1212704 6 0 4294967295 ron_comp_binary 0 4 ron_comp_valid 6 6 too_many_allocated 8 8 alloc_error 10 10 first_allocation_done 12 12 total_legs_allocated 16 22 ixPSX81_PHY0_TX_TXCNTRL_BROADCAST 2 0x121ff06 1 0 4294967295 rxdetect_response 11 11 ixPSX81_PHY0_TX_TXCNTRL_LANE0 2 0x1212006 1 0 4294967295 rxdetect_response 11 11 ixPSX81_PHY0_TX_TXCNTRL_LANE1 2 0x1212106 1 0 4294967295 rxdetect_response 11 11 ixPSX81_PHY0_TX_TXCNTRL_LANE2 2 0x1212206 1 0 4294967295 rxdetect_response 11 11 ixPSX81_PHY0_TX_TXCNTRL_LANE3 2 0x1212306 1 0 4294967295 rxdetect_response 11 11 ixPSX81_PHY0_TX_TXCNTRL_LANE4 2 0x1212406 1 0 4294967295 rxdetect_response 11 11 ixPSX81_PHY0_TX_TXCNTRL_LANE5 2 0x1212506 1 0 4294967295 rxdetect_response 11 11 ixPSX81_PHY0_TX_TXCNTRL_LANE6 2 0x1212606 1 0 4294967295 rxdetect_response 11 11 ixPSX81_PHY0_TX_TXCNTRL_LANE7 2 0x1212706 1 0 4294967295 rxdetect_response 11 11 ixPSX81_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_BROADCAST 2 0x121ff07 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX81_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE0 2 0x1212007 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX81_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE1 2 0x1212107 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX81_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE2 2 0x1212207 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX81_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE3 2 0x1212307 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX81_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE4 2 0x1212407 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX81_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE5 2 0x1212507 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX81_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE6 2 0x1212607 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX81_PHY0_TX_CMD_BUS_GLOBAL_FOR_TX_LANE7 2 0x1212707 4 0 4294967295 twosym_en 0 0 link_speed 1 2 freq_div2 3 3 gang_mode 5 7 ixPSX81_PHY0_HTPLL_ROPLL_PowerDownEn 2 0x1214180 2 0 4294967295 PllPowerDownEn 0 2 PllPowerDownOvrd 4 4 ixPSX81_PHY0_HTPLL_ROPLL_PciPllControlExt 2 0x1214101 2 0 4294967295 BgRcFiltShortTimer 0 2 BgRcFiltShortForce 3 3 ixPSX81_PHY0_HTPLL_ROPLL_PciPllControl 2 0x1214102 8 0 4294967295 VcoRange 0 7 LpfRes 10 13 CpiDac 14 21 FastLockTimer 22 25 FastLock 26 26 ClearLockDetect 28 28 PllLocked 29 29 ManaregRampTimer 30 31 ixPSX81_PHY0_HTPLL_ROPLL_PciPllTestDebug1 2 0x1214103 2 0 4294967295 PllMeasCtl 0 10 PllTp 11 31 ixPSX81_PHY0_HTPLL_ROPLL_PciPllTestDebug2 2 0x1214104 3 0 4294967295 PLL_MeasOut 0 17 PLL_Tpo 18 18 PllDsmObsSel 21 23 ixPSX81_PHY0_HTPLL_ROPLL_PciPllFreqMode 2 0x1214105 10 0 4294967295 PllClkFreq 0 6 PllFreqModeOvrd 7 7 Clk2CtlrEn 8 8 Clk2CtlrEnOvrd 9 9 Clk2CtlrRate 10 10 Clk2CtlrRateOvrd 11 11 FullRateClkEn 12 12 FullRateClkEnOvrd 13 13 HalfRateClkEn 16 16 HalfRateClkEnOvrd 17 17 ixPSX81_PHY0_HTPLL_ROPLL_PciPllUpdateCtrl 2 0x1214108 1 0 4294967295 PllControlUpdate 0 0 ixPSX81_PHY0_HTPLL_ROPLL_PciPllTestDebug3 2 0x1214109 8 0 4294967295 AutoTrigRoCal 0 0 ManTrigRoCal 1 1 ContinueCal 2 2 CalDone 3 3 ManCalRdyNext 4 4 CalFail 5 6 ADCRefIn 20 25 PLL_AdcOut 26 26 ixPSX81_PHY0_HTPLL_ROPLL_PciFuseProcess 2 0x121410a 3 0 4294967295 PhyFuseValid 0 0 FuseProcRefAdj 1 4 FuseProcPllSpare 8 11 ixPSX81_PHY0_HTPLL_ROPLL_PciPllTestDebug4 2 0x121410b 1 0 4294967295 AltDiv 0 15 ixPSX81_PHY0_HTPLL_ROPLL_PciPllTestDebug5 2 0x121410c 2 0 4294967295 VregCtl7_0 0 7 VregCtl11_8 8 11 ixPSX81_PHY0_LCPLL_LCPLL_PowerDownEn 2 0x1214080 2 0 4294967295 PllPowerDownEn 0 2 PllPowerDownOvrd 4 4 ixPSX81_PHY0_LCPLL_LCPLL_PciPllControlExt 2 0x1214001 2 0 4294967295 BgRcFiltShortTimer 0 2 BgRcFiltShortForce 3 3 ixPSX81_PHY0_LCPLL_LCPLL_PciPllControl 2 0x1214002 10 0 4294967295 VcoRange 0 7 VcoRangeBin 8 10 LpfRes 12 13 CpiDac3_0 14 17 CpiDac7_4 18 21 FastLockTimer 22 25 FastLock 26 26 ClearLockDetect 28 28 PllLocked 29 29 ManaregRampTimer 30 31 ixPSX81_PHY0_LCPLL_LCPLL_PciPllTestDebug1 2 0x1214003 2 0 4294967295 PllMeasCtl 0 10 PllTp 11 31 ixPSX81_PHY0_LCPLL_LCPLL_PciPllTestDebug2 2 0x1214004 3 0 4294967295 PLC_MeasOut 0 17 PLC_Tpo 18 18 PllDsmObsSel 21 23 ixPSX81_PHY0_LCPLL_LCPLL_PciPllFreqMode 2 0x1214005 4 0 4294967295 FullRateClkEn 12 12 FullRateClkEnOvrd 13 13 HalfRateClkEn 16 16 HalfRateClkEnOvrd 17 17 ixPSX81_PHY0_LCPLL_LCPLL_PciLcVcoCtrl 2 0x1214007 1 0 4294967295 LCTankI 0 7 ixPSX81_PHY0_LCPLL_LCPLL_PciPllUpdateCtrl 2 0x1214008 2 0 4294967295 PllControlUpdate 0 0 MeasCycleCnt 23 25 ixPSX81_PHY0_LCPLL_LCPLL_PciPllTestDebug3 2 0x1214009 8 0 4294967295 FinalFbCnt 0 13 CalDone 15 15 ManCalRdyNext 16 16 CalFail 17 19 ADCRefIn 20 25 PLC_AdcOut 26 26 StartCntEn 27 27 ContinueCal 29 29 ixPSX81_PHY0_LCPLL_LCPLL_PciPllTestDebug4 2 0x121400b 1 0 4294967295 AltDiv 0 15 ixPSX81_PHY0_LCPLL_LCPLL_PciPllTestDebug5 2 0x121400c 2 0 4294967295 VregCtl7_0 0 7 VregCtl11_8 8 11 ixPSX80_PIF0_SCRATCH 2 0x1100001 1 0 4294967295 PIF_SCRATCH 0 31 ixPSX80_PIF0_HW_DEBUG 2 0x1100002 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixPSX80_PIF0_STRAP_0 2 0x1100003 14 0 4294967295 STRAP_TX_RDY_XTND_DIS 1 1 STRAP_RX_RDY_XTND_DIS 2 2 STRAP_TX_STATUS_XTND_DIS 3 3 STRAP_RX_STATUS_XTND_DIS 4 4 STRAP_FORCE_OWN_MSTR 5 5 STRAP_PIF_CDR_EN_MODE 6 7 STRAP_RX_EI_FILTER 8 9 STRAP_RX_DIS_HLD_EIE_IN_PS1 10 10 STRAP_RX_DIS_HLD_EIE_IN_PS2 11 11 STRAP_PIF_BIT_12 12 12 STRAP_PIF_BIT_13 13 13 STRAP_PIF_BIT_14 14 14 STRAP_PIF_BIT_15 15 15 STRAP_PIF_BIT_16 16 16 ixPSX80_PIF0_CTRL 2 0x1100004 13 0 4294967295 PIF_PLL_PWRDN_EN 0 0 DTM_FORCE_FREQDIV_X1 1 1 PIF_PLL_HNDSHK_EARLY_ABORT 2 2 PIF_PLL_PWRDN_EARLY_EXIT 3 3 PHY_RST_PWROK_VDD 4 4 PIF_PLL_STATUS 6 7 PIF_PLL_DEGRADE_OFF_VOTE 8 8 PIF_PLL_UNUSED_OFF_VOTE 9 9 PIF_PLL_DEGRADE_S2_VOTE 10 10 PIF_PG_EXIT_MODE 11 11 PIF_DEGRADE_PWR_PLL_MODE 12 12 PIF_LANEUNUSED_AFFECT_GANG 13 13 PIF_PG_ABORT_DISABLE 14 14 ixPSX80_PIF0_TX_CTRL 2 0x1100008 11 0 4294967295 TXPWR_IN_S2 0 2 TXPWR_IN_SPDCHNG 3 5 TXPWR_IN_OFF 6 8 TXPWR_IN_DEGRADE 9 11 TXPWR_IN_UNUSED 12 14 TXPWR_IN_INIT 15 17 TXPWR_IN_PLL_OFF 18 20 TXPWR_IN_DEGRADE_MODE 21 21 TXPWR_IN_UNUSED_MODE 22 22 TXPWR_GATING_IN_L1 23 23 TXPWR_GATING_IN_UNUSED 24 24 ixPSX80_PIF0_TX_CTRL2 2 0x1100009 13 0 4294967295 TX_RDY_DASRT_COUNT 0 2 TX_STATUS_DASRT_COUNT 3 5 TXPHYSTATUS_DELAY 6 8 TX_L1_PG_PHY_STATUS_MODE 9 9 TX_OFF_PG_PHY_STATUS_MODE 10 10 TX_HIGH_IMP_STAG_MP 16 16 TX_HIGH_IMP_STAG_MODE 17 18 TX_FORCE_DATA_VALID 21 21 TX_L0_TO_HIZ_DLY 22 24 TX_FIFO_INIT_UPCONFIG 25 25 TX_HIZ_TO_L0_DLY 26 28 TX_LINKSPEED_ACK_IN_S2 29 29 TX_DELAY_FIFO_INIT_IN_S1 30 30 ixPSX80_PIF0_RX_CTRL 2 0x110000a 13 0 4294967295 RXPWR_IN_S2 0 2 RXPWR_IN_SPDCHNG 3 5 RXPWR_IN_OFF 6 8 RXPWR_IN_DEGRADE 9 11 RXPWR_IN_UNUSED 12 14 RXPWR_IN_INIT 15 17 RXPWR_IN_PLL_OFF 18 20 RXPWR_IN_DEGRADE_MODE 21 21 RXPWR_IN_UNUSED_MODE 22 22 RXPWR_GATING_IN_L1 23 23 RXPWR_GATING_IN_UNUSED 24 24 RX_HLD_EIE_COUNT 25 25 RX_EI_DET_IN_PS2_DEGRADE 26 26 ixPSX80_PIF0_RX_CTRL2 2 0x110000b 12 0 4294967295 RX_RDY_DASRT_COUNT 0 2 RX_STATUS_DASRT_COUNT 3 5 RXPHYSTATUS_DELAY 6 8 RX_L1_PG_PHY_STATUS_MODE 9 9 RX_OFF_PG_PHY_STATUS_MODE 10 10 FORCE_CDREN_IN_L0S 16 16 EI_DET_CYCLE_MODE 17 18 EI_DET_ON_TIME 19 20 EI_DET_OFF_TIME 21 23 EI_DET_CYCLE_DIS_IN_PS1 24 24 RX_CDR_XTND_MODE 25 26 RX_L0S_TO_L0_DETECT_EI 27 27 ixPSX80_PIF0_GLB_OVRD 2 0x110000c 9 0 4294967295 RXDETECT_OVERRIDE_VAL_0 0 0 RXDETECT_OVERRIDE_VAL_1 1 1 RXDETECT_OVERRIDE_VAL_2 2 2 RXDETECT_OVERRIDE_VAL_3 3 3 RXDETECT_OVERRIDE_VAL_4 4 4 RXDETECT_OVERRIDE_VAL_5 5 5 RXDETECT_OVERRIDE_VAL_6 6 6 RXDETECT_OVERRIDE_VAL_7 7 7 RXDETECT_OVERRIDE_EN 16 16 ixPSX80_PIF0_GLB_OVRD2 2 0x110000d 15 0 4294967295 X2_LANE_1_0_OVRD 0 0 X2_LANE_3_2_OVRD 1 1 X2_LANE_5_4_OVRD 2 2 X2_LANE_7_6_OVRD 3 3 X2_LANE_9_8_OVRD 4 4 X2_LANE_11_10_OVRD 5 5 X2_LANE_13_12_OVRD 6 6 X2_LANE_15_14_OVRD 7 7 X4_LANE_3_0_OVRD 8 8 X4_LANE_7_4_OVRD 9 9 X4_LANE_11_8_OVRD 10 10 X4_LANE_15_12_OVRD 11 11 X8_LANE_7_0_OVRD 16 16 X8_LANE_15_8_OVRD 17 17 X16_LANE_15_0_OVRD 20 20 ixPSX80_PIF0_BIF_CMD_STATUS 2 0x1100010 32 0 4294967295 TXPHYSTATUS_0 0 0 TXPHYSTATUS_1 1 1 TXPHYSTATUS_2 2 2 TXPHYSTATUS_3 3 3 TXPHYSTATUS_4 4 4 TXPHYSTATUS_5 5 5 TXPHYSTATUS_6 6 6 TXPHYSTATUS_7 7 7 RXPHYSTATUS_0 8 8 RXPHYSTATUS_1 9 9 RXPHYSTATUS_2 10 10 RXPHYSTATUS_3 11 11 RXPHYSTATUS_4 12 12 RXPHYSTATUS_5 13 13 RXPHYSTATUS_6 14 14 RXPHYSTATUS_7 15 15 BPHY_CORE_TX_RDY_0 16 16 BPHY_CORE_TX_RDY_1 17 17 BPHY_CORE_TX_RDY_2 18 18 BPHY_CORE_TX_RDY_3 19 19 BPHY_CORE_TX_RDY_4 20 20 BPHY_CORE_TX_RDY_5 21 21 BPHY_CORE_TX_RDY_6 22 22 BPHY_CORE_TX_RDY_7 23 23 BPHY_CORE_RX_RDY_0 24 24 BPHY_CORE_RX_RDY_1 25 25 BPHY_CORE_RX_RDY_2 26 26 BPHY_CORE_RX_RDY_3 27 27 BPHY_CORE_RX_RDY_4 28 28 BPHY_CORE_RX_RDY_5 29 29 BPHY_CORE_RX_RDY_6 30 30 BPHY_CORE_RX_RDY_7 31 31 ixPSX80_PIF0_CMD_BUS_CTRL 2 0x1100011 7 0 4294967295 CMD_BUS_SCHL_MODE 0 1 CMD_BUS_STAG_MODE 2 3 CMD_BUS_STAG_DIS 4 4 CMD_BUS_SCH_REQ_MODE 5 6 CMD_BUS_IGNR_PEND_PWR 7 7 SEND_GANGED_MODE_UPDATE_FOR_OFFPG_LANES 8 8 CMD_BUS_IGNR_PWR_NOT_ON 9 9 ixPSX80_PIF0_CMD_BUS_GLB_OVRD 2 0x1100013 15 0 4294967295 TXMARG_OVRD_EN 0 0 DEEMPH_OVRD_EN 1 1 PLLFREQ_OVRD_EN 2 2 TXMARG 3 5 DEEMPH 6 6 PLLFREQ 7 8 RESPONSEMODE_PIF_OVRD 9 9 CMD_BUS_LANE_DIS_0 16 16 CMD_BUS_LANE_DIS_1 17 17 CMD_BUS_LANE_DIS_2 18 18 CMD_BUS_LANE_DIS_3 19 19 CMD_BUS_LANE_DIS_4 20 20 CMD_BUS_LANE_DIS_5 21 21 CMD_BUS_LANE_DIS_6 22 22 CMD_BUS_LANE_DIS_7 23 23 ixPSX80_PIF0_LANE0_OVRD 2 0x1100014 18 0 4294967295 GANGMODE_OVRD_EN_0 0 0 FREQDIV_OVRD_EN_0 1 1 LINKSPEED_OVRD_EN_0 2 2 TWOSYMENABLE_OVRD_EN_0 3 3 TXPWR_OVRD_EN_0 4 4 TXPGENABLE_OVRD_EN_0 5 5 RXPWR_OVRD_EN_0 6 6 RXPGENABLE_OVRD_EN_0 7 7 ELECIDLEDETEN_OVRD_EN_0 8 8 ENABLEFOM_OVRD_EN_0 9 9 REQUESTFOM_OVRD_EN_0 10 10 RESPONSEMODE_OVRD_EN_0 11 11 REQUESTTRK_OVRD_EN_0 12 12 REQUESTTRN_OVRD_EN_0 13 13 COEFFICIENTID_OVRD_EN_0 14 14 COEFFICIENT_OVRD_EN_0 15 15 CDREN_OVRD_EN_0 16 16 CDREN_OVRD_VAL_0 17 17 ixPSX80_PIF0_LANE0_OVRD2 2 0x1100015 16 0 4294967295 GANGMODE_0 0 2 FREQDIV_0 3 4 LINKSPEED_0 5 6 TWOSYMENABLE_0 7 7 TXPWR_0 8 10 TXPGENABLE_0 11 12 RXPWR_0 13 15 RXPGENABLE_0 16 17 ELECIDLEDETEN_0 18 18 ENABLEFOM_0 19 19 REQUESTFOM_0 20 20 RESPONSEMODE_0 21 21 REQUESTTRK_0 22 22 REQUESTTRN_0 23 23 COEFFICIENTID_0 24 25 COEFFICIENT_0 26 31 ixPSX80_PIF0_LANE1_OVRD 2 0x1100016 18 0 4294967295 GANGMODE_OVRD_EN_1 0 0 FREQDIV_OVRD_EN_1 1 1 LINKSPEED_OVRD_EN_1 2 2 TWOSYMENABLE_OVRD_EN_1 3 3 TXPWR_OVRD_EN_1 4 4 TXPGENABLE_OVRD_EN_1 5 5 RXPWR_OVRD_EN_1 6 6 RXPGENABLE_OVRD_EN_1 7 7 ELECIDLEDETEN_OVRD_EN_1 8 8 ENABLEFOM_OVRD_EN_1 9 9 REQUESTFOM_OVRD_EN_1 10 10 RESPONSEMODE_OVRD_EN_1 11 11 REQUESTTRK_OVRD_EN_1 12 12 REQUESTTRN_OVRD_EN_1 13 13 COEFFICIENTID_OVRD_EN_1 14 14 COEFFICIENT_OVRD_EN_1 15 15 CDREN_OVRD_EN_1 16 16 CDREN_OVRD_VAL_1 17 17 ixPSX80_PIF0_LANE1_OVRD2 2 0x1100017 16 0 4294967295 GANGMODE_1 0 2 FREQDIV_1 3 4 LINKSPEED_1 5 6 TWOSYMENABLE_1 7 7 TXPWR_1 8 10 TXPGENABLE_1 11 12 RXPWR_1 13 15 RXPGENABLE_1 16 17 ELECIDLEDETEN_1 18 18 ENABLEFOM_1 19 19 REQUESTFOM_1 20 20 RESPONSEMODE_1 21 21 REQUESTTRK_1 22 22 REQUESTTRN_1 23 23 COEFFICIENTID_1 24 25 COEFFICIENT_1 26 31 ixPSX80_PIF0_LANE2_OVRD 2 0x1100018 18 0 4294967295 GANGMODE_OVRD_EN_2 0 0 FREQDIV_OVRD_EN_2 1 1 LINKSPEED_OVRD_EN_2 2 2 TWOSYMENABLE_OVRD_EN_2 3 3 TXPWR_OVRD_EN_2 4 4 TXPGENABLE_OVRD_EN_2 5 5 RXPWR_OVRD_EN_2 6 6 RXPGENABLE_OVRD_EN_2 7 7 ELECIDLEDETEN_OVRD_EN_2 8 8 ENABLEFOM_OVRD_EN_2 9 9 REQUESTFOM_OVRD_EN_2 10 10 RESPONSEMODE_OVRD_EN_2 11 11 REQUESTTRK_OVRD_EN_2 12 12 REQUESTTRN_OVRD_EN_2 13 13 COEFFICIENTID_OVRD_EN_2 14 14 COEFFICIENT_OVRD_EN_2 15 15 CDREN_OVRD_EN_2 16 16 CDREN_OVRD_VAL_2 17 17 ixPSX80_PIF0_LANE2_OVRD2 2 0x1100019 16 0 4294967295 GANGMODE_2 0 2 FREQDIV_2 3 4 LINKSPEED_2 5 6 TWOSYMENABLE_2 7 7 TXPWR_2 8 10 TXPGENABLE_2 11 12 RXPWR_2 13 15 RXPGENABLE_2 16 17 ELECIDLEDETEN_2 18 18 ENABLEFOM_2 19 19 REQUESTFOM_2 20 20 RESPONSEMODE_2 21 21 REQUESTTRK_2 22 22 REQUESTTRN_2 23 23 COEFFICIENTID_2 24 25 COEFFICIENT_2 26 31 ixPSX80_PIF0_LANE3_OVRD 2 0x110001a 18 0 4294967295 GANGMODE_OVRD_EN_3 0 0 FREQDIV_OVRD_EN_3 1 1 LINKSPEED_OVRD_EN_3 2 2 TWOSYMENABLE_OVRD_EN_3 3 3 TXPWR_OVRD_EN_3 4 4 TXPGENABLE_OVRD_EN_3 5 5 RXPWR_OVRD_EN_3 6 6 RXPGENABLE_OVRD_EN_3 7 7 ELECIDLEDETEN_OVRD_EN_3 8 8 ENABLEFOM_OVRD_EN_3 9 9 REQUESTFOM_OVRD_EN_3 10 10 RESPONSEMODE_OVRD_EN_3 11 11 REQUESTTRK_OVRD_EN_3 12 12 REQUESTTRN_OVRD_EN_3 13 13 COEFFICIENTID_OVRD_EN_3 14 14 COEFFICIENT_OVRD_EN_3 15 15 CDREN_OVRD_EN_3 16 16 CDREN_OVRD_VAL_3 17 17 ixPSX80_PIF0_LANE3_OVRD2 2 0x110001b 16 0 4294967295 GANGMODE_3 0 2 FREQDIV_3 3 4 LINKSPEED_3 5 6 TWOSYMENABLE_3 7 7 TXPWR_3 8 10 TXPGENABLE_3 11 12 RXPWR_3 13 15 RXPGENABLE_3 16 17 ELECIDLEDETEN_3 18 18 ENABLEFOM_3 19 19 REQUESTFOM_3 20 20 RESPONSEMODE_3 21 21 REQUESTTRK_3 22 22 REQUESTTRN_3 23 23 COEFFICIENTID_3 24 25 COEFFICIENT_3 26 31 ixPSX80_PIF0_LANE4_OVRD 2 0x110001c 18 0 4294967295 GANGMODE_OVRD_EN_4 0 0 FREQDIV_OVRD_EN_4 1 1 LINKSPEED_OVRD_EN_4 2 2 TWOSYMENABLE_OVRD_EN_4 3 3 TXPWR_OVRD_EN_4 4 4 TXPGENABLE_OVRD_EN_4 5 5 RXPWR_OVRD_EN_4 6 6 RXPGENABLE_OVRD_EN_4 7 7 ELECIDLEDETEN_OVRD_EN_4 8 8 ENABLEFOM_OVRD_EN_4 9 9 REQUESTFOM_OVRD_EN_4 10 10 RESPONSEMODE_OVRD_EN_4 11 11 REQUESTTRK_OVRD_EN_4 12 12 REQUESTTRN_OVRD_EN_4 13 13 COEFFICIENTID_OVRD_EN_4 14 14 COEFFICIENT_OVRD_EN_4 15 15 CDREN_OVRD_EN_4 16 16 CDREN_OVRD_VAL_4 17 17 ixPSX80_PIF0_LANE4_OVRD2 2 0x110001d 16 0 4294967295 GANGMODE_4 0 2 FREQDIV_4 3 4 LINKSPEED_4 5 6 TWOSYMENABLE_4 7 7 TXPWR_4 8 10 TXPGENABLE_4 11 12 RXPWR_4 13 15 RXPGENABLE_4 16 17 ELECIDLEDETEN_4 18 18 ENABLEFOM_4 19 19 REQUESTFOM_4 20 20 RESPONSEMODE_4 21 21 REQUESTTRK_4 22 22 REQUESTTRN_4 23 23 COEFFICIENTID_4 24 25 COEFFICIENT_4 26 31 ixPSX80_PIF0_LANE5_OVRD 2 0x110001e 18 0 4294967295 GANGMODE_OVRD_EN_5 0 0 FREQDIV_OVRD_EN_5 1 1 LINKSPEED_OVRD_EN_5 2 2 TWOSYMENABLE_OVRD_EN_5 3 3 TXPWR_OVRD_EN_5 4 4 TXPGENABLE_OVRD_EN_5 5 5 RXPWR_OVRD_EN_5 6 6 RXPGENABLE_OVRD_EN_5 7 7 ELECIDLEDETEN_OVRD_EN_5 8 8 ENABLEFOM_OVRD_EN_5 9 9 REQUESTFOM_OVRD_EN_5 10 10 RESPONSEMODE_OVRD_EN_5 11 11 REQUESTTRK_OVRD_EN_5 12 12 REQUESTTRN_OVRD_EN_5 13 13 COEFFICIENTID_OVRD_EN_5 14 14 COEFFICIENT_OVRD_EN_5 15 15 CDREN_OVRD_EN_5 16 16 CDREN_OVRD_VAL_5 17 17 ixPSX80_PIF0_LANE5_OVRD2 2 0x110001f 16 0 4294967295 GANGMODE_5 0 2 FREQDIV_5 3 4 LINKSPEED_5 5 6 TWOSYMENABLE_5 7 7 TXPWR_5 8 10 TXPGENABLE_5 11 12 RXPWR_5 13 15 RXPGENABLE_5 16 17 ELECIDLEDETEN_5 18 18 ENABLEFOM_5 19 19 REQUESTFOM_5 20 20 RESPONSEMODE_5 21 21 REQUESTTRK_5 22 22 REQUESTTRN_5 23 23 COEFFICIENTID_5 24 25 COEFFICIENT_5 26 31 ixPSX80_PIF0_LANE6_OVRD 2 0x1100020 18 0 4294967295 GANGMODE_OVRD_EN_6 0 0 FREQDIV_OVRD_EN_6 1 1 LINKSPEED_OVRD_EN_6 2 2 TWOSYMENABLE_OVRD_EN_6 3 3 TXPWR_OVRD_EN_6 4 4 TXPGENABLE_OVRD_EN_6 5 5 RXPWR_OVRD_EN_6 6 6 RXPGENABLE_OVRD_EN_6 7 7 ELECIDLEDETEN_OVRD_EN_6 8 8 ENABLEFOM_OVRD_EN_6 9 9 REQUESTFOM_OVRD_EN_6 10 10 RESPONSEMODE_OVRD_EN_6 11 11 REQUESTTRK_OVRD_EN_6 12 12 REQUESTTRN_OVRD_EN_6 13 13 COEFFICIENTID_OVRD_EN_6 14 14 COEFFICIENT_OVRD_EN_6 15 15 CDREN_OVRD_EN_6 16 16 CDREN_OVRD_VAL_6 17 17 ixPSX80_PIF0_LANE6_OVRD2 2 0x1100021 16 0 4294967295 GANGMODE_6 0 2 FREQDIV_6 3 4 LINKSPEED_6 5 6 TWOSYMENABLE_6 7 7 TXPWR_6 8 10 TXPGENABLE_6 11 12 RXPWR_6 13 15 RXPGENABLE_6 16 17 ELECIDLEDETEN_6 18 18 ENABLEFOM_6 19 19 REQUESTFOM_6 20 20 RESPONSEMODE_6 21 21 REQUESTTRK_6 22 22 REQUESTTRN_6 23 23 COEFFICIENTID_6 24 25 COEFFICIENT_6 26 31 ixPSX80_PIF0_LANE7_OVRD 2 0x1100022 18 0 4294967295 GANGMODE_OVRD_EN_7 0 0 FREQDIV_OVRD_EN_7 1 1 LINKSPEED_OVRD_EN_7 2 2 TWOSYMENABLE_OVRD_EN_7 3 3 TXPWR_OVRD_EN_7 4 4 TXPGENABLE_OVRD_EN_7 5 5 RXPWR_OVRD_EN_7 6 6 RXPGENABLE_OVRD_EN_7 7 7 ELECIDLEDETEN_OVRD_EN_7 8 8 ENABLEFOM_OVRD_EN_7 9 9 REQUESTFOM_OVRD_EN_7 10 10 RESPONSEMODE_OVRD_EN_7 11 11 REQUESTTRK_OVRD_EN_7 12 12 REQUESTTRN_OVRD_EN_7 13 13 COEFFICIENTID_OVRD_EN_7 14 14 COEFFICIENT_OVRD_EN_7 15 15 CDREN_OVRD_EN_7 16 16 CDREN_OVRD_VAL_7 17 17 ixPSX80_PIF0_LANE7_OVRD2 2 0x1100023 16 0 4294967295 GANGMODE_7 0 2 FREQDIV_7 3 4 LINKSPEED_7 5 6 TWOSYMENABLE_7 7 7 TXPWR_7 8 10 TXPGENABLE_7 11 12 RXPWR_7 13 15 RXPGENABLE_7 16 17 ELECIDLEDETEN_7 18 18 ENABLEFOM_7 19 19 REQUESTFOM_7 20 20 RESPONSEMODE_7 21 21 REQUESTTRK_7 22 22 REQUESTTRN_7 23 23 COEFFICIENTID_7 24 25 COEFFICIENT_7 26 31 ixPSX81_PIF0_SCRATCH 2 0x1110001 1 0 4294967295 PIF_SCRATCH 0 31 ixPSX81_PIF0_HW_DEBUG 2 0x1110002 16 0 4294967295 HW_00_DEBUG 0 0 HW_01_DEBUG 1 1 HW_02_DEBUG 2 2 HW_03_DEBUG 3 3 HW_04_DEBUG 4 4 HW_05_DEBUG 5 5 HW_06_DEBUG 6 6 HW_07_DEBUG 7 7 HW_08_DEBUG 8 8 HW_09_DEBUG 9 9 HW_10_DEBUG 10 10 HW_11_DEBUG 11 11 HW_12_DEBUG 12 12 HW_13_DEBUG 13 13 HW_14_DEBUG 14 14 HW_15_DEBUG 15 15 ixPSX81_PIF0_STRAP_0 2 0x1110003 14 0 4294967295 STRAP_TX_RDY_XTND_DIS 1 1 STRAP_RX_RDY_XTND_DIS 2 2 STRAP_TX_STATUS_XTND_DIS 3 3 STRAP_RX_STATUS_XTND_DIS 4 4 STRAP_FORCE_OWN_MSTR 5 5 STRAP_PIF_CDR_EN_MODE 6 7 STRAP_RX_EI_FILTER 8 9 STRAP_RX_DIS_HLD_EIE_IN_PS1 10 10 STRAP_RX_DIS_HLD_EIE_IN_PS2 11 11 STRAP_PIF_BIT_12 12 12 STRAP_PIF_BIT_13 13 13 STRAP_PIF_BIT_14 14 14 STRAP_PIF_BIT_15 15 15 STRAP_PIF_BIT_16 16 16 ixPSX81_PIF0_CTRL 2 0x1110004 13 0 4294967295 PIF_PLL_PWRDN_EN 0 0 DTM_FORCE_FREQDIV_X1 1 1 PIF_PLL_HNDSHK_EARLY_ABORT 2 2 PIF_PLL_PWRDN_EARLY_EXIT 3 3 PHY_RST_PWROK_VDD 4 4 PIF_PLL_STATUS 6 7 PIF_PLL_DEGRADE_OFF_VOTE 8 8 PIF_PLL_UNUSED_OFF_VOTE 9 9 PIF_PLL_DEGRADE_S2_VOTE 10 10 PIF_PG_EXIT_MODE 11 11 PIF_DEGRADE_PWR_PLL_MODE 12 12 PIF_LANEUNUSED_AFFECT_GANG 13 13 PIF_PG_ABORT_DISABLE 14 14 ixPSX81_PIF0_TX_CTRL 2 0x1110008 11 0 4294967295 TXPWR_IN_S2 0 2 TXPWR_IN_SPDCHNG 3 5 TXPWR_IN_OFF 6 8 TXPWR_IN_DEGRADE 9 11 TXPWR_IN_UNUSED 12 14 TXPWR_IN_INIT 15 17 TXPWR_IN_PLL_OFF 18 20 TXPWR_IN_DEGRADE_MODE 21 21 TXPWR_IN_UNUSED_MODE 22 22 TXPWR_GATING_IN_L1 23 23 TXPWR_GATING_IN_UNUSED 24 24 ixPSX81_PIF0_TX_CTRL2 2 0x1110009 13 0 4294967295 TX_RDY_DASRT_COUNT 0 2 TX_STATUS_DASRT_COUNT 3 5 TXPHYSTATUS_DELAY 6 8 TX_L1_PG_PHY_STATUS_MODE 9 9 TX_OFF_PG_PHY_STATUS_MODE 10 10 TX_HIGH_IMP_STAG_MP 16 16 TX_HIGH_IMP_STAG_MODE 17 18 TX_FORCE_DATA_VALID 21 21 TX_L0_TO_HIZ_DLY 22 24 TX_FIFO_INIT_UPCONFIG 25 25 TX_HIZ_TO_L0_DLY 26 28 TX_LINKSPEED_ACK_IN_S2 29 29 TX_DELAY_FIFO_INIT_IN_S1 30 30 ixPSX81_PIF0_RX_CTRL 2 0x111000a 13 0 4294967295 RXPWR_IN_S2 0 2 RXPWR_IN_SPDCHNG 3 5 RXPWR_IN_OFF 6 8 RXPWR_IN_DEGRADE 9 11 RXPWR_IN_UNUSED 12 14 RXPWR_IN_INIT 15 17 RXPWR_IN_PLL_OFF 18 20 RXPWR_IN_DEGRADE_MODE 21 21 RXPWR_IN_UNUSED_MODE 22 22 RXPWR_GATING_IN_L1 23 23 RXPWR_GATING_IN_UNUSED 24 24 RX_HLD_EIE_COUNT 25 25 RX_EI_DET_IN_PS2_DEGRADE 26 26 ixPSX81_PIF0_RX_CTRL2 2 0x111000b 12 0 4294967295 RX_RDY_DASRT_COUNT 0 2 RX_STATUS_DASRT_COUNT 3 5 RXPHYSTATUS_DELAY 6 8 RX_L1_PG_PHY_STATUS_MODE 9 9 RX_OFF_PG_PHY_STATUS_MODE 10 10 FORCE_CDREN_IN_L0S 16 16 EI_DET_CYCLE_MODE 17 18 EI_DET_ON_TIME 19 20 EI_DET_OFF_TIME 21 23 EI_DET_CYCLE_DIS_IN_PS1 24 24 RX_CDR_XTND_MODE 25 26 RX_L0S_TO_L0_DETECT_EI 27 27 ixPSX81_PIF0_GLB_OVRD 2 0x111000c 9 0 4294967295 RXDETECT_OVERRIDE_VAL_0 0 0 RXDETECT_OVERRIDE_VAL_1 1 1 RXDETECT_OVERRIDE_VAL_2 2 2 RXDETECT_OVERRIDE_VAL_3 3 3 RXDETECT_OVERRIDE_VAL_4 4 4 RXDETECT_OVERRIDE_VAL_5 5 5 RXDETECT_OVERRIDE_VAL_6 6 6 RXDETECT_OVERRIDE_VAL_7 7 7 RXDETECT_OVERRIDE_EN 16 16 ixPSX81_PIF0_GLB_OVRD2 2 0x111000d 15 0 4294967295 X2_LANE_1_0_OVRD 0 0 X2_LANE_3_2_OVRD 1 1 X2_LANE_5_4_OVRD 2 2 X2_LANE_7_6_OVRD 3 3 X2_LANE_9_8_OVRD 4 4 X2_LANE_11_10_OVRD 5 5 X2_LANE_13_12_OVRD 6 6 X2_LANE_15_14_OVRD 7 7 X4_LANE_3_0_OVRD 8 8 X4_LANE_7_4_OVRD 9 9 X4_LANE_11_8_OVRD 10 10 X4_LANE_15_12_OVRD 11 11 X8_LANE_7_0_OVRD 16 16 X8_LANE_15_8_OVRD 17 17 X16_LANE_15_0_OVRD 20 20 ixPSX81_PIF0_BIF_CMD_STATUS 2 0x1110010 32 0 4294967295 TXPHYSTATUS_0 0 0 TXPHYSTATUS_1 1 1 TXPHYSTATUS_2 2 2 TXPHYSTATUS_3 3 3 TXPHYSTATUS_4 4 4 TXPHYSTATUS_5 5 5 TXPHYSTATUS_6 6 6 TXPHYSTATUS_7 7 7 RXPHYSTATUS_0 8 8 RXPHYSTATUS_1 9 9 RXPHYSTATUS_2 10 10 RXPHYSTATUS_3 11 11 RXPHYSTATUS_4 12 12 RXPHYSTATUS_5 13 13 RXPHYSTATUS_6 14 14 RXPHYSTATUS_7 15 15 BPHY_CORE_TX_RDY_0 16 16 BPHY_CORE_TX_RDY_1 17 17 BPHY_CORE_TX_RDY_2 18 18 BPHY_CORE_TX_RDY_3 19 19 BPHY_CORE_TX_RDY_4 20 20 BPHY_CORE_TX_RDY_5 21 21 BPHY_CORE_TX_RDY_6 22 22 BPHY_CORE_TX_RDY_7 23 23 BPHY_CORE_RX_RDY_0 24 24 BPHY_CORE_RX_RDY_1 25 25 BPHY_CORE_RX_RDY_2 26 26 BPHY_CORE_RX_RDY_3 27 27 BPHY_CORE_RX_RDY_4 28 28 BPHY_CORE_RX_RDY_5 29 29 BPHY_CORE_RX_RDY_6 30 30 BPHY_CORE_RX_RDY_7 31 31 ixPSX81_PIF0_CMD_BUS_CTRL 2 0x1110011 7 0 4294967295 CMD_BUS_SCHL_MODE 0 1 CMD_BUS_STAG_MODE 2 3 CMD_BUS_STAG_DIS 4 4 CMD_BUS_SCH_REQ_MODE 5 6 CMD_BUS_IGNR_PEND_PWR 7 7 SEND_GANGED_MODE_UPDATE_FOR_OFFPG_LANES 8 8 CMD_BUS_IGNR_PWR_NOT_ON 9 9 ixPSX81_PIF0_CMD_BUS_GLB_OVRD 2 0x1110013 15 0 4294967295 TXMARG_OVRD_EN 0 0 DEEMPH_OVRD_EN 1 1 PLLFREQ_OVRD_EN 2 2 TXMARG 3 5 DEEMPH 6 6 PLLFREQ 7 8 RESPONSEMODE_PIF_OVRD 9 9 CMD_BUS_LANE_DIS_0 16 16 CMD_BUS_LANE_DIS_1 17 17 CMD_BUS_LANE_DIS_2 18 18 CMD_BUS_LANE_DIS_3 19 19 CMD_BUS_LANE_DIS_4 20 20 CMD_BUS_LANE_DIS_5 21 21 CMD_BUS_LANE_DIS_6 22 22 CMD_BUS_LANE_DIS_7 23 23 ixPSX81_PIF0_LANE0_OVRD 2 0x1110014 18 0 4294967295 GANGMODE_OVRD_EN_0 0 0 FREQDIV_OVRD_EN_0 1 1 LINKSPEED_OVRD_EN_0 2 2 TWOSYMENABLE_OVRD_EN_0 3 3 TXPWR_OVRD_EN_0 4 4 TXPGENABLE_OVRD_EN_0 5 5 RXPWR_OVRD_EN_0 6 6 RXPGENABLE_OVRD_EN_0 7 7 ELECIDLEDETEN_OVRD_EN_0 8 8 ENABLEFOM_OVRD_EN_0 9 9 REQUESTFOM_OVRD_EN_0 10 10 RESPONSEMODE_OVRD_EN_0 11 11 REQUESTTRK_OVRD_EN_0 12 12 REQUESTTRN_OVRD_EN_0 13 13 COEFFICIENTID_OVRD_EN_0 14 14 COEFFICIENT_OVRD_EN_0 15 15 CDREN_OVRD_EN_0 16 16 CDREN_OVRD_VAL_0 17 17 ixPSX81_PIF0_LANE0_OVRD2 2 0x1110015 16 0 4294967295 GANGMODE_0 0 2 FREQDIV_0 3 4 LINKSPEED_0 5 6 TWOSYMENABLE_0 7 7 TXPWR_0 8 10 TXPGENABLE_0 11 12 RXPWR_0 13 15 RXPGENABLE_0 16 17 ELECIDLEDETEN_0 18 18 ENABLEFOM_0 19 19 REQUESTFOM_0 20 20 RESPONSEMODE_0 21 21 REQUESTTRK_0 22 22 REQUESTTRN_0 23 23 COEFFICIENTID_0 24 25 COEFFICIENT_0 26 31 ixPSX81_PIF0_LANE1_OVRD 2 0x1110016 18 0 4294967295 GANGMODE_OVRD_EN_1 0 0 FREQDIV_OVRD_EN_1 1 1 LINKSPEED_OVRD_EN_1 2 2 TWOSYMENABLE_OVRD_EN_1 3 3 TXPWR_OVRD_EN_1 4 4 TXPGENABLE_OVRD_EN_1 5 5 RXPWR_OVRD_EN_1 6 6 RXPGENABLE_OVRD_EN_1 7 7 ELECIDLEDETEN_OVRD_EN_1 8 8 ENABLEFOM_OVRD_EN_1 9 9 REQUESTFOM_OVRD_EN_1 10 10 RESPONSEMODE_OVRD_EN_1 11 11 REQUESTTRK_OVRD_EN_1 12 12 REQUESTTRN_OVRD_EN_1 13 13 COEFFICIENTID_OVRD_EN_1 14 14 COEFFICIENT_OVRD_EN_1 15 15 CDREN_OVRD_EN_1 16 16 CDREN_OVRD_VAL_1 17 17 ixPSX81_PIF0_LANE1_OVRD2 2 0x1110017 16 0 4294967295 GANGMODE_1 0 2 FREQDIV_1 3 4 LINKSPEED_1 5 6 TWOSYMENABLE_1 7 7 TXPWR_1 8 10 TXPGENABLE_1 11 12 RXPWR_1 13 15 RXPGENABLE_1 16 17 ELECIDLEDETEN_1 18 18 ENABLEFOM_1 19 19 REQUESTFOM_1 20 20 RESPONSEMODE_1 21 21 REQUESTTRK_1 22 22 REQUESTTRN_1 23 23 COEFFICIENTID_1 24 25 COEFFICIENT_1 26 31 ixPSX81_PIF0_LANE2_OVRD 2 0x1110018 18 0 4294967295 GANGMODE_OVRD_EN_2 0 0 FREQDIV_OVRD_EN_2 1 1 LINKSPEED_OVRD_EN_2 2 2 TWOSYMENABLE_OVRD_EN_2 3 3 TXPWR_OVRD_EN_2 4 4 TXPGENABLE_OVRD_EN_2 5 5 RXPWR_OVRD_EN_2 6 6 RXPGENABLE_OVRD_EN_2 7 7 ELECIDLEDETEN_OVRD_EN_2 8 8 ENABLEFOM_OVRD_EN_2 9 9 REQUESTFOM_OVRD_EN_2 10 10 RESPONSEMODE_OVRD_EN_2 11 11 REQUESTTRK_OVRD_EN_2 12 12 REQUESTTRN_OVRD_EN_2 13 13 COEFFICIENTID_OVRD_EN_2 14 14 COEFFICIENT_OVRD_EN_2 15 15 CDREN_OVRD_EN_2 16 16 CDREN_OVRD_VAL_2 17 17 ixPSX81_PIF0_LANE2_OVRD2 2 0x1110019 16 0 4294967295 GANGMODE_2 0 2 FREQDIV_2 3 4 LINKSPEED_2 5 6 TWOSYMENABLE_2 7 7 TXPWR_2 8 10 TXPGENABLE_2 11 12 RXPWR_2 13 15 RXPGENABLE_2 16 17 ELECIDLEDETEN_2 18 18 ENABLEFOM_2 19 19 REQUESTFOM_2 20 20 RESPONSEMODE_2 21 21 REQUESTTRK_2 22 22 REQUESTTRN_2 23 23 COEFFICIENTID_2 24 25 COEFFICIENT_2 26 31 ixPSX81_PIF0_LANE3_OVRD 2 0x111001a 18 0 4294967295 GANGMODE_OVRD_EN_3 0 0 FREQDIV_OVRD_EN_3 1 1 LINKSPEED_OVRD_EN_3 2 2 TWOSYMENABLE_OVRD_EN_3 3 3 TXPWR_OVRD_EN_3 4 4 TXPGENABLE_OVRD_EN_3 5 5 RXPWR_OVRD_EN_3 6 6 RXPGENABLE_OVRD_EN_3 7 7 ELECIDLEDETEN_OVRD_EN_3 8 8 ENABLEFOM_OVRD_EN_3 9 9 REQUESTFOM_OVRD_EN_3 10 10 RESPONSEMODE_OVRD_EN_3 11 11 REQUESTTRK_OVRD_EN_3 12 12 REQUESTTRN_OVRD_EN_3 13 13 COEFFICIENTID_OVRD_EN_3 14 14 COEFFICIENT_OVRD_EN_3 15 15 CDREN_OVRD_EN_3 16 16 CDREN_OVRD_VAL_3 17 17 ixPSX81_PIF0_LANE3_OVRD2 2 0x111001b 16 0 4294967295 GANGMODE_3 0 2 FREQDIV_3 3 4 LINKSPEED_3 5 6 TWOSYMENABLE_3 7 7 TXPWR_3 8 10 TXPGENABLE_3 11 12 RXPWR_3 13 15 RXPGENABLE_3 16 17 ELECIDLEDETEN_3 18 18 ENABLEFOM_3 19 19 REQUESTFOM_3 20 20 RESPONSEMODE_3 21 21 REQUESTTRK_3 22 22 REQUESTTRN_3 23 23 COEFFICIENTID_3 24 25 COEFFICIENT_3 26 31 ixPSX81_PIF0_LANE4_OVRD 2 0x111001c 18 0 4294967295 GANGMODE_OVRD_EN_4 0 0 FREQDIV_OVRD_EN_4 1 1 LINKSPEED_OVRD_EN_4 2 2 TWOSYMENABLE_OVRD_EN_4 3 3 TXPWR_OVRD_EN_4 4 4 TXPGENABLE_OVRD_EN_4 5 5 RXPWR_OVRD_EN_4 6 6 RXPGENABLE_OVRD_EN_4 7 7 ELECIDLEDETEN_OVRD_EN_4 8 8 ENABLEFOM_OVRD_EN_4 9 9 REQUESTFOM_OVRD_EN_4 10 10 RESPONSEMODE_OVRD_EN_4 11 11 REQUESTTRK_OVRD_EN_4 12 12 REQUESTTRN_OVRD_EN_4 13 13 COEFFICIENTID_OVRD_EN_4 14 14 COEFFICIENT_OVRD_EN_4 15 15 CDREN_OVRD_EN_4 16 16 CDREN_OVRD_VAL_4 17 17 ixPSX81_PIF0_LANE4_OVRD2 2 0x111001d 16 0 4294967295 GANGMODE_4 0 2 FREQDIV_4 3 4 LINKSPEED_4 5 6 TWOSYMENABLE_4 7 7 TXPWR_4 8 10 TXPGENABLE_4 11 12 RXPWR_4 13 15 RXPGENABLE_4 16 17 ELECIDLEDETEN_4 18 18 ENABLEFOM_4 19 19 REQUESTFOM_4 20 20 RESPONSEMODE_4 21 21 REQUESTTRK_4 22 22 REQUESTTRN_4 23 23 COEFFICIENTID_4 24 25 COEFFICIENT_4 26 31 ixPSX81_PIF0_LANE5_OVRD 2 0x111001e 18 0 4294967295 GANGMODE_OVRD_EN_5 0 0 FREQDIV_OVRD_EN_5 1 1 LINKSPEED_OVRD_EN_5 2 2 TWOSYMENABLE_OVRD_EN_5 3 3 TXPWR_OVRD_EN_5 4 4 TXPGENABLE_OVRD_EN_5 5 5 RXPWR_OVRD_EN_5 6 6 RXPGENABLE_OVRD_EN_5 7 7 ELECIDLEDETEN_OVRD_EN_5 8 8 ENABLEFOM_OVRD_EN_5 9 9 REQUESTFOM_OVRD_EN_5 10 10 RESPONSEMODE_OVRD_EN_5 11 11 REQUESTTRK_OVRD_EN_5 12 12 REQUESTTRN_OVRD_EN_5 13 13 COEFFICIENTID_OVRD_EN_5 14 14 COEFFICIENT_OVRD_EN_5 15 15 CDREN_OVRD_EN_5 16 16 CDREN_OVRD_VAL_5 17 17 ixPSX81_PIF0_LANE5_OVRD2 2 0x111001f 16 0 4294967295 GANGMODE_5 0 2 FREQDIV_5 3 4 LINKSPEED_5 5 6 TWOSYMENABLE_5 7 7 TXPWR_5 8 10 TXPGENABLE_5 11 12 RXPWR_5 13 15 RXPGENABLE_5 16 17 ELECIDLEDETEN_5 18 18 ENABLEFOM_5 19 19 REQUESTFOM_5 20 20 RESPONSEMODE_5 21 21 REQUESTTRK_5 22 22 REQUESTTRN_5 23 23 COEFFICIENTID_5 24 25 COEFFICIENT_5 26 31 ixPSX81_PIF0_LANE6_OVRD 2 0x1110020 18 0 4294967295 GANGMODE_OVRD_EN_6 0 0 FREQDIV_OVRD_EN_6 1 1 LINKSPEED_OVRD_EN_6 2 2 TWOSYMENABLE_OVRD_EN_6 3 3 TXPWR_OVRD_EN_6 4 4 TXPGENABLE_OVRD_EN_6 5 5 RXPWR_OVRD_EN_6 6 6 RXPGENABLE_OVRD_EN_6 7 7 ELECIDLEDETEN_OVRD_EN_6 8 8 ENABLEFOM_OVRD_EN_6 9 9 REQUESTFOM_OVRD_EN_6 10 10 RESPONSEMODE_OVRD_EN_6 11 11 REQUESTTRK_OVRD_EN_6 12 12 REQUESTTRN_OVRD_EN_6 13 13 COEFFICIENTID_OVRD_EN_6 14 14 COEFFICIENT_OVRD_EN_6 15 15 CDREN_OVRD_EN_6 16 16 CDREN_OVRD_VAL_6 17 17 ixPSX81_PIF0_LANE6_OVRD2 2 0x1110021 16 0 4294967295 GANGMODE_6 0 2 FREQDIV_6 3 4 LINKSPEED_6 5 6 TWOSYMENABLE_6 7 7 TXPWR_6 8 10 TXPGENABLE_6 11 12 RXPWR_6 13 15 RXPGENABLE_6 16 17 ELECIDLEDETEN_6 18 18 ENABLEFOM_6 19 19 REQUESTFOM_6 20 20 RESPONSEMODE_6 21 21 REQUESTTRK_6 22 22 REQUESTTRN_6 23 23 COEFFICIENTID_6 24 25 COEFFICIENT_6 26 31 ixPSX81_PIF0_LANE7_OVRD 2 0x1110022 18 0 4294967295 GANGMODE_OVRD_EN_7 0 0 FREQDIV_OVRD_EN_7 1 1 LINKSPEED_OVRD_EN_7 2 2 TWOSYMENABLE_OVRD_EN_7 3 3 TXPWR_OVRD_EN_7 4 4 TXPGENABLE_OVRD_EN_7 5 5 RXPWR_OVRD_EN_7 6 6 RXPGENABLE_OVRD_EN_7 7 7 ELECIDLEDETEN_OVRD_EN_7 8 8 ENABLEFOM_OVRD_EN_7 9 9 REQUESTFOM_OVRD_EN_7 10 10 RESPONSEMODE_OVRD_EN_7 11 11 REQUESTTRK_OVRD_EN_7 12 12 REQUESTTRN_OVRD_EN_7 13 13 COEFFICIENTID_OVRD_EN_7 14 14 COEFFICIENT_OVRD_EN_7 15 15 CDREN_OVRD_EN_7 16 16 CDREN_OVRD_VAL_7 17 17 ixPSX81_PIF0_LANE7_OVRD2 2 0x1110023 16 0 4294967295 GANGMODE_7 0 2 FREQDIV_7 3 4 LINKSPEED_7 5 6 TWOSYMENABLE_7 7 7 TXPWR_7 8 10 TXPGENABLE_7 11 12 RXPWR_7 13 15 RXPGENABLE_7 16 17 ELECIDLEDETEN_7 18 18 ENABLEFOM_7 19 19 REQUESTFOM_7 20 20 RESPONSEMODE_7 21 21 REQUESTTRK_7 22 22 REQUESTTRN_7 23 23 COEFFICIENTID_7 24 25 COEFFICIENT_7 26 31