10056 mmPIPE0_PG_CONFIG 0 0x2c0 1 0 4294967295 PIPE0_POWER_FORCEON 0 0 mmPIPE0_PG_ENABLE 0 0x2c1 1 0 4294967295 PIPE0_POWER_GATE 0 0 mmPIPE0_PG_STATUS 0 0x2c2 5 0 4294967295 PIPE0_PGFSM_READ_DATA 0 23 PIPE0_DEBUG_PWR_STATUS 24 25 PIPE0_DESIRED_PWR_STATE 28 28 PIPE0_REQUESTED_PWR_STATE 29 29 PIPE0_PGFSM_PWR_STATUS 30 31 mmPIPE1_PG_CONFIG 0 0x2c3 1 0 4294967295 PIPE1_POWER_FORCEON 0 0 mmPIPE1_PG_ENABLE 0 0x2c4 1 0 4294967295 PIPE1_POWER_GATE 0 0 mmPIPE1_PG_STATUS 0 0x2c5 5 0 4294967295 PIPE1_PGFSM_READ_DATA 0 23 PIPE1_DEBUG_PWR_STATUS 24 25 PIPE1_DESIRED_PWR_STATE 28 28 PIPE1_REQUESTED_PWR_STATE 29 29 PIPE1_PGFSM_PWR_STATUS 30 31 mmPIPE2_PG_CONFIG 0 0x2c6 1 0 4294967295 PIPE2_POWER_FORCEON 0 0 mmPIPE2_PG_ENABLE 0 0x2c7 1 0 4294967295 PIPE2_POWER_GATE 0 0 mmPIPE2_PG_STATUS 0 0x2c8 5 0 4294967295 PIPE2_PGFSM_READ_DATA 0 23 PIPE2_DEBUG_PWR_STATUS 24 25 PIPE2_DESIRED_PWR_STATE 28 28 PIPE2_REQUESTED_PWR_STATE 29 29 PIPE2_PGFSM_PWR_STATUS 30 31 mmPIPE3_PG_CONFIG 0 0x2c9 1 0 4294967295 PIPE3_POWER_FORCEON 0 0 mmPIPE3_PG_ENABLE 0 0x2ca 1 0 4294967295 PIPE3_POWER_GATE 0 0 mmPIPE3_PG_STATUS 0 0x2cb 5 0 4294967295 PIPE3_PGFSM_READ_DATA 0 23 PIPE3_DEBUG_PWR_STATUS 24 25 PIPE3_DESIRED_PWR_STATE 28 28 PIPE3_REQUESTED_PWR_STATE 29 29 PIPE3_PGFSM_PWR_STATUS 30 31 mmPIPE4_PG_CONFIG 0 0x2cc 1 0 4294967295 PIPE4_POWER_FORCEON 0 0 mmPIPE4_PG_ENABLE 0 0x2cd 1 0 4294967295 PIPE4_POWER_GATE 0 0 mmPIPE4_PG_STATUS 0 0x2ce 5 0 4294967295 PIPE4_PGFSM_READ_DATA 0 23 PIPE4_DEBUG_PWR_STATUS 24 25 PIPE4_DESIRED_PWR_STATE 28 28 PIPE4_REQUESTED_PWR_STATE 29 29 PIPE4_PGFSM_PWR_STATUS 30 31 mmPIPE5_PG_CONFIG 0 0x2cf 1 0 4294967295 PIPE5_POWER_FORCEON 0 0 mmPIPE5_PG_ENABLE 0 0x2d0 1 0 4294967295 PIPE5_POWER_GATE 0 0 mmPIPE5_PG_STATUS 0 0x2d1 5 0 4294967295 PIPE5_PGFSM_READ_DATA 0 23 PIPE5_DEBUG_PWR_STATUS 24 25 PIPE5_DESIRED_PWR_STATE 28 28 PIPE5_REQUESTED_PWR_STATE 29 29 PIPE5_PGFSM_PWR_STATUS 30 31 mmDCPG_INTERRUPT_STATUS 0 0x2de 18 0 4294967295 DCFE0_POWER_UP_INT_OCCURRED 0 0 DCFE0_POWER_DOWN_INT_OCCURRED 1 1 DCFE1_POWER_UP_INT_OCCURRED 2 2 DCFE1_POWER_DOWN_INT_OCCURRED 3 3 DCFE2_POWER_UP_INT_OCCURRED 4 4 DCFE2_POWER_DOWN_INT_OCCURRED 5 5 DCFE3_POWER_UP_INT_OCCURRED 6 6 DCFE3_POWER_DOWN_INT_OCCURRED 7 7 DCFE4_POWER_UP_INT_OCCURRED 8 8 DCFE4_POWER_DOWN_INT_OCCURRED 9 9 DCFE5_POWER_UP_INT_OCCURRED 10 10 DCFE5_POWER_DOWN_INT_OCCURRED 11 11 DCFEV0_POWER_UP_INT_OCCURRED 12 12 DCFEV0_POWER_DOWN_INT_OCCURRED 13 13 DSI_POWER_UP_INT_OCCURRED 14 14 DSI_POWER_DOWN_INT_OCCURRED 15 15 DCFEV1_POWER_UP_INT_OCCURRED 16 16 DCFEV1_POWER_DOWN_INT_OCCURRED 17 17 mmDCPG_INTERRUPT_CONTROL 0 0x2df 32 0 4294967295 DCFE0_POWER_UP_INT_MASK 0 0 DCFE0_POWER_UP_INT_CLEAR 1 1 DCFE0_POWER_DOWN_INT_MASK 2 2 DCFE0_POWER_DOWN_INT_CLEAR 3 3 DCFE1_POWER_UP_INT_MASK 4 4 DCFE1_POWER_UP_INT_CLEAR 5 5 DCFE1_POWER_DOWN_INT_MASK 6 6 DCFE1_POWER_DOWN_INT_CLEAR 7 7 DCFE2_POWER_UP_INT_MASK 8 8 DCFE2_POWER_UP_INT_CLEAR 9 9 DCFE2_POWER_DOWN_INT_MASK 10 10 DCFE2_POWER_DOWN_INT_CLEAR 11 11 DCFE3_POWER_UP_INT_MASK 12 12 DCFE3_POWER_UP_INT_CLEAR 13 13 DCFE3_POWER_DOWN_INT_MASK 14 14 DCFE3_POWER_DOWN_INT_CLEAR 15 15 DCFE4_POWER_UP_INT_MASK 16 16 DCFE4_POWER_UP_INT_CLEAR 17 17 DCFE4_POWER_DOWN_INT_MASK 18 18 DCFE4_POWER_DOWN_INT_CLEAR 19 19 DCFE5_POWER_UP_INT_MASK 20 20 DCFE5_POWER_UP_INT_CLEAR 21 21 DCFE5_POWER_DOWN_INT_MASK 22 22 DCFE5_POWER_DOWN_INT_CLEAR 23 23 DCFEV0_POWER_UP_INT_MASK 24 24 DCFEV0_POWER_UP_INT_CLEAR 25 25 DCFEV0_POWER_DOWN_INT_MASK 26 26 DCFEV0_POWER_DOWN_INT_CLEAR 27 27 DSI_POWER_UP_INT_MASK 28 28 DSI_POWER_UP_INT_CLEAR 29 29 DSI_POWER_DOWN_INT_MASK 30 30 DSI_POWER_DOWN_INT_CLEAR 31 31 mmDCPG_INTERRUPT_CONTROL2 0 0x2e0 4 0 4294967295 DCFEV1_POWER_UP_INT_MASK 24 24 DCFEV1_POWER_UP_INT_CLEAR 25 25 DCFEV1_POWER_DOWN_INT_MASK 26 26 DCFEV1_POWER_DOWN_INT_CLEAR 27 27 mmDC_IP_REQUEST_CNTL 0 0x2d2 1 0 4294967295 IP_REQUEST_EN 0 0 mmDC_PGFSM_CONFIG_REG 0 0x2d3 1 0 4294967295 PGFSM_CONFIG_REG 0 31 mmDC_PGFSM_WRITE_REG 0 0x2d4 1 0 4294967295 PGFSM_WRITE_REG 0 31 mmDC_PGCNTL_STATUS_REG 0 0x2d5 4 0 4294967295 SWREQ_RWOP_BUSY 0 0 SWREQ_RWOP_FORCE 1 1 IPREQ_IGNORE_STATUS 2 2 DCPG_ECO_DEBUG 16 31 mmDCPG_TEST_DEBUG_INDEX 0 0x2d6 2 0 4294967295 DCPG_TEST_DEBUG_INDEX 0 7 DCPG_TEST_DEBUG_WRITE_EN 8 8 mmDCPG_TEST_DEBUG_DATA 0 0x2d7 1 0 4294967295 DCPG_TEST_DEBUG_DATA 0 31 mmBL1_PWM_AMBIENT_LIGHT_LEVEL 0 0x1628 1 0 4294967295 BL1_PWM_AMBIENT_LIGHT_LEVEL 0 16 mmBL1_PWM_USER_LEVEL 0 0x1629 1 0 4294967295 BL1_PWM_USER_LEVEL 0 16 mmBL1_PWM_TARGET_ABM_LEVEL 0 0x162a 1 0 4294967295 BL1_PWM_TARGET_ABM_LEVEL 0 16 mmBL1_PWM_CURRENT_ABM_LEVEL 0 0x162b 1 0 4294967295 BL1_PWM_CURRENT_ABM_LEVEL 0 16 mmBL1_PWM_FINAL_DUTY_CYCLE 0 0x162c 1 0 4294967295 BL1_PWM_FINAL_DUTY_CYCLE 0 16 mmBL1_PWM_MINIMUM_DUTY_CYCLE 0 0x162d 1 0 4294967295 BL1_PWM_MINIMUM_DUTY_CYCLE 0 16 mmBL1_PWM_ABM_CNTL 0 0x162e 5 0 4294967295 BL1_PWM_USE_ABM_EN 0 0 BL1_PWM_USE_AMBIENT_LEVEL_EN 1 1 BL1_PWM_AUTO_UPDATE_CURRENT_ABM_LEVEL_EN 2 2 BL1_PWM_AUTO_CALC_FINAL_DUTY_CYCLE_EN 3 3 BL1_PWM_AUTO_UPDATE_CURRENT_ABM_STEP_SIZE 16 31 mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0 0x162f 5 0 4294967295 BL1_PWM_BL_UPDATE_SAMPLE_RATE_COUNT_EN 0 0 BL1_PWM_BL_UPDATE_RESET_SAMPLE_RATE_FRAME_COUNTER 1 1 BL1_PWM_BL_UPDATE_SAMPLE_RATE_FRAME_COUNT 8 15 BL1_PWM_BL_UPDATE_INITIAL_SAMPLE_RATE_COUNT_VALUE_WHEN_RESET 16 23 ABM1_HGLS_REG_LOCK 31 31 mmBL1_PWM_GRP2_REG_LOCK 0 0x1630 6 0 4294967295 BL1_PWM_GRP2_REG_LOCK 0 0 BL1_PWM_GRP2_REG_UPDATE_PENDING 8 8 BL1_PWM_GRP2_UPDATE_AT_FRAME_START 16 16 BL1_PWM_GRP2_FRAME_START_DISP_SEL 17 19 BL1_PWM_GRP2_READBACK_DB_REG_VALUE_EN 24 24 BL1_PWM_GRP2_IGNORE_MASTER_LOCK_EN 31 31 mmDC_ABM1_CNTL 0 0x1638 3 0 4294967295 ABM1_EN 0 0 ABM1_SOURCE_SELECT 8 10 ABM1_BLANK_MODE_SUPPORT_ENABLE 31 31 mmDC_ABM1_IPCSC_COEFF_SEL 0 0x1639 4 0 4294967295 ABM1_IPCSC_COEFF_SEL_B 0 3 ABM1_IPCSC_COEFF_SEL_G 8 11 ABM1_IPCSC_COEFF_SEL_R 16 19 ABM1_HGLS_REG_LOCK 31 31 mmDC_ABM1_ACE_OFFSET_SLOPE_0 0 0x163a 3 0 4294967295 ABM1_ACE_SLOPE_0 0 14 ABM1_ACE_OFFSET_0 16 26 ABM1_ACE_LOCK 31 31 mmDC_ABM1_ACE_OFFSET_SLOPE_1 0 0x163b 3 0 4294967295 ABM1_ACE_SLOPE_1 0 14 ABM1_ACE_OFFSET_1 16 26 ABM1_ACE_LOCK 31 31 mmDC_ABM1_ACE_OFFSET_SLOPE_2 0 0x163c 3 0 4294967295 ABM1_ACE_SLOPE_2 0 14 ABM1_ACE_OFFSET_2 16 26 ABM1_ACE_LOCK 31 31 mmDC_ABM1_ACE_OFFSET_SLOPE_3 0 0x163d 3 0 4294967295 ABM1_ACE_SLOPE_3 0 14 ABM1_ACE_OFFSET_3 16 26 ABM1_ACE_LOCK 31 31 mmDC_ABM1_ACE_OFFSET_SLOPE_4 0 0x163e 3 0 4294967295 ABM1_ACE_SLOPE_4 0 14 ABM1_ACE_OFFSET_4 16 26 ABM1_ACE_LOCK 31 31 mmDC_ABM1_ACE_THRES_12 0 0x163f 3 0 4294967295 ABM1_ACE_THRES_1 0 9 ABM1_ACE_THRES_2 16 25 ABM1_ACE_LOCK 31 31 mmDC_ABM1_ACE_THRES_34 0 0x1640 6 0 4294967295 ABM1_ACE_THRES_3 0 9 ABM1_ACE_THRES_4 16 25 ABM1_ACE_IGNORE_MASTER_LOCK_EN 28 28 ABM1_ACE_READBACK_DB_REG_VALUE_EN 29 29 ABM1_ACE_DBUF_REG_UPDATE_PENDING 30 30 ABM1_ACE_LOCK 31 31 mmDC_ABM1_ACE_CNTL_MISC 0 0x1641 2 0 4294967295 ABM1_ACE_REG_WR_MISSED_FRAME 0 0 ABM1_ACE_REG_WR_MISSED_FRAME_CLEAR 8 8 mmDC_ABM1_DEBUG_MISC 0 0x1649 3 0 4294967295 ABM1_HG_FORCE_INTERRUPT 0 0 ABM1_LS_FORCE_INTERRUPT 8 8 ABM1_BL_FORCE_INTERRUPT 16 16 mmDC_ABM1_HGLS_REG_READ_PROGRESS 0 0x164a 9 0 4294967295 ABM1_HG_REG_READ_IN_PROGRESS 0 0 ABM1_LS_REG_READ_IN_PROGRESS 1 1 ABM1_BL_REG_READ_IN_PROGRESS 2 2 ABM1_HG_REG_READ_MISSED_FRAME 8 8 ABM1_LS_REG_READ_MISSED_FRAME 9 9 ABM1_BL_REG_READ_MISSED_FRAME 10 10 ABM1_HG_REG_READ_MISSED_FRAME_CLEAR 16 16 ABM1_LS_REG_READ_MISSED_FRAME_CLEAR 24 24 ABM1_BL_REG_READ_MISSED_FRAME_CLEAR 31 31 mmDC_ABM1_HG_MISC_CTRL 0 0x164b 11 0 4294967295 ABM1_HG_NUM_OF_BINS_SEL 0 1 ABM1_HG_VMAX_SEL 8 8 ABM1_HG_FINE_MODE_BIN_SEL 12 12 ABM1_HG_BIN_BITWIDTH_SIZE_SEL 16 17 ABM1_OVR_SCAN_PIXEL_PROCESS_EN 20 20 ABM1_DBUF_HGLS_READBACK_DB_REG_VALUE_EN 23 23 ABM1_DBUF_HGLS_REG_FRAME_START_DISP_SEL 24 26 ABM1_DBUF_HGLS_REG_UPDATE_AT_FRAME_START 28 28 ABM1_HGLS_IGNORE_MASTER_LOCK_EN 29 29 ABM1_DBUF_HGLS_REG_UPDATE_PENDING 30 30 ABM1_HGLS_REG_LOCK 31 31 mmDC_ABM1_LS_SUM_OF_LUMA 0 0x164c 1 0 4294967295 ABM1_LS_SUM_OF_LUMA 0 31 mmDC_ABM1_LS_MIN_MAX_LUMA 0 0x164d 2 0 4294967295 ABM1_LS_MIN_LUMA 0 9 ABM1_LS_MAX_LUMA 16 25 mmDC_ABM1_LS_FILTERED_MIN_MAX_LUMA 0 0x164e 2 0 4294967295 ABM1_LS_FILTERED_MIN_LUMA 0 9 ABM1_LS_FILTERED_MAX_LUMA 16 25 mmDC_ABM1_LS_PIXEL_COUNT 0 0x164f 1 0 4294967295 ABM1_LS_PIXEL_COUNT 0 23 mmDC_ABM1_LS_OVR_SCAN_BIN 0 0x1650 1 0 4294967295 ABM1_LS_OVR_SCAN_BIN 0 23 mmDC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES 0 0x1651 3 0 4294967295 ABM1_LS_MIN_PIXEL_VALUE_THRES 0 9 ABM1_LS_MAX_PIXEL_VALUE_THRES 16 25 ABM1_HGLS_REG_LOCK 31 31 mmDC_ABM1_LS_MIN_PIXEL_VALUE_COUNT 0 0x1652 1 0 4294967295 ABM1_LS_MIN_PIXEL_VALUE_COUNT 0 23 mmDC_ABM1_LS_MAX_PIXEL_VALUE_COUNT 0 0x1653 1 0 4294967295 ABM1_LS_MAX_PIXEL_VALUE_COUNT 0 23 mmDC_ABM1_HG_SAMPLE_RATE 0 0x1654 5 0 4294967295 ABM1_HG_SAMPLE_RATE_COUNT_EN 0 0 ABM1_HG_RESET_SAMPLE_RATE_FRAME_COUNTER 1 1 ABM1_HG_SAMPLE_RATE_FRAME_COUNT 8 15 ABM1_HG_INITIAL_SAMPLE_RATE_COUNT_VALUE_WHEN_RESET 16 23 ABM1_HGLS_REG_LOCK 31 31 mmDC_ABM1_LS_SAMPLE_RATE 0 0x1655 5 0 4294967295 ABM1_LS_SAMPLE_RATE_COUNT_EN 0 0 ABM1_LS_RESET_SAMPLE_RATE_FRAME_COUNTER 1 1 ABM1_LS_SAMPLE_RATE_FRAME_COUNT 8 15 ABM1_LS_INITIAL_SAMPLE_RATE_COUNT_VALUE_WHEN_RESET 16 23 ABM1_HGLS_REG_LOCK 31 31 mmDC_ABM1_HG_BIN_1_32_SHIFT_FLAG 0 0x1656 1 0 4294967295 ABM1_HG_BIN_1_32_SHIFT_FLAG 0 31 mmDC_ABM1_HG_BIN_1_8_SHIFT_INDEX 0 0x1657 1 0 4294967295 ABM1_HG_BIN_1_8_SHIFT_INDEX 0 31 mmDC_ABM1_HG_BIN_9_16_SHIFT_INDEX 0 0x1658 1 0 4294967295 ABM1_HG_BIN_9_16_SHIFT_INDEX 0 31 mmDC_ABM1_HG_BIN_17_24_SHIFT_INDEX 0 0x1659 1 0 4294967295 ABM1_HG_BIN_17_24_SHIFT_INDEX 0 31 mmDC_ABM1_HG_BIN_25_32_SHIFT_INDEX 0 0x165a 1 0 4294967295 ABM1_HG_BIN_25_32_SHIFT_INDEX 0 31 mmDC_ABM1_HG_RESULT_1 0 0x165b 1 0 4294967295 ABM1_HG_RESULT_1 0 31 mmDC_ABM1_HG_RESULT_2 0 0x165c 1 0 4294967295 ABM1_HG_RESULT_2 0 31 mmDC_ABM1_HG_RESULT_3 0 0x165d 1 0 4294967295 ABM1_HG_RESULT_3 0 31 mmDC_ABM1_HG_RESULT_4 0 0x165e 1 0 4294967295 ABM1_HG_RESULT_4 0 31 mmDC_ABM1_HG_RESULT_5 0 0x165f 1 0 4294967295 ABM1_HG_RESULT_5 0 31 mmDC_ABM1_HG_RESULT_6 0 0x1660 1 0 4294967295 ABM1_HG_RESULT_6 0 31 mmDC_ABM1_HG_RESULT_7 0 0x1661 1 0 4294967295 ABM1_HG_RESULT_7 0 31 mmDC_ABM1_HG_RESULT_8 0 0x1662 1 0 4294967295 ABM1_HG_RESULT_8 0 31 mmDC_ABM1_HG_RESULT_9 0 0x1663 1 0 4294967295 ABM1_HG_RESULT_9 0 31 mmDC_ABM1_HG_RESULT_10 0 0x1664 1 0 4294967295 ABM1_HG_RESULT_10 0 31 mmDC_ABM1_HG_RESULT_11 0 0x1665 1 0 4294967295 ABM1_HG_RESULT_11 0 31 mmDC_ABM1_HG_RESULT_12 0 0x1666 1 0 4294967295 ABM1_HG_RESULT_12 0 31 mmDC_ABM1_HG_RESULT_13 0 0x1667 1 0 4294967295 ABM1_HG_RESULT_13 0 31 mmDC_ABM1_HG_RESULT_14 0 0x1668 1 0 4294967295 ABM1_HG_RESULT_14 0 31 mmDC_ABM1_HG_RESULT_15 0 0x1669 1 0 4294967295 ABM1_HG_RESULT_15 0 31 mmDC_ABM1_HG_RESULT_16 0 0x166a 1 0 4294967295 ABM1_HG_RESULT_16 0 31 mmDC_ABM1_HG_RESULT_17 0 0x166b 1 0 4294967295 ABM1_HG_RESULT_17 0 31 mmDC_ABM1_HG_RESULT_18 0 0x166c 1 0 4294967295 ABM1_HG_RESULT_18 0 31 mmDC_ABM1_HG_RESULT_19 0 0x166d 1 0 4294967295 ABM1_HG_RESULT_19 0 31 mmDC_ABM1_HG_RESULT_20 0 0x166e 1 0 4294967295 ABM1_HG_RESULT_20 0 31 mmDC_ABM1_HG_RESULT_21 0 0x166f 1 0 4294967295 ABM1_HG_RESULT_21 0 31 mmDC_ABM1_HG_RESULT_22 0 0x1670 1 0 4294967295 ABM1_HG_RESULT_22 0 31 mmDC_ABM1_HG_RESULT_23 0 0x1671 1 0 4294967295 ABM1_HG_RESULT_23 0 31 mmDC_ABM1_HG_RESULT_24 0 0x1672 1 0 4294967295 ABM1_HG_RESULT_24 0 31 mmDC_ABM1_OVERSCAN_PIXEL_VALUE 0 0x169b 3 0 4294967295 ABM1_OVERSCAN_R_PIXEL_VALUE 0 9 ABM1_OVERSCAN_G_PIXEL_VALUE 10 19 ABM1_OVERSCAN_B_PIXEL_VALUE 20 29 mmDC_ABM1_BL_MASTER_LOCK 0 0x169c 1 0 4294967295 ABM1_BL_MASTER_LOCK 31 31 mmABM_TEST_DEBUG_INDEX 0 0x169e 2 0 4294967295 ABM_TEST_DEBUG_INDEX 0 7 ABM_TEST_DEBUG_WRITE_EN 8 8 mmABM_TEST_DEBUG_DATA 0 0x169f 1 0 4294967295 ABM_TEST_DEBUG_DATA 0 31 mmCRTC_H_BLANK_EARLY_NUM 0 0x1b7d 2 0 4294967295 CRTC_H_BLANK_EARLY_NUM 0 9 CRTC_H_BLANK_EARLY_NUM_DIS 16 16 mmCRTC0_CRTC_H_BLANK_EARLY_NUM 0 0x1b7d 0 0 4294967295 mmCRTC1_CRTC_H_BLANK_EARLY_NUM 0 0x1d7d 0 0 4294967295 mmCRTC2_CRTC_H_BLANK_EARLY_NUM 0 0x1f7d 0 0 4294967295 mmCRTC3_CRTC_H_BLANK_EARLY_NUM 0 0x417d 0 0 4294967295 mmCRTC4_CRTC_H_BLANK_EARLY_NUM 0 0x437d 0 0 4294967295 mmCRTC5_CRTC_H_BLANK_EARLY_NUM 0 0x457d 0 0 4294967295 mmCRTC_H_TOTAL 0 0x1b80 1 0 4294967295 CRTC_H_TOTAL 0 13 mmCRTC0_CRTC_H_TOTAL 0 0x1b80 0 0 4294967295 mmCRTC1_CRTC_H_TOTAL 0 0x1d80 0 0 4294967295 mmCRTC2_CRTC_H_TOTAL 0 0x1f80 0 0 4294967295 mmCRTC3_CRTC_H_TOTAL 0 0x4180 0 0 4294967295 mmCRTC4_CRTC_H_TOTAL 0 0x4380 0 0 4294967295 mmCRTC5_CRTC_H_TOTAL 0 0x4580 0 0 4294967295 mmCRTC_H_BLANK_START_END 0 0x1b81 2 0 4294967295 CRTC_H_BLANK_START 0 13 CRTC_H_BLANK_END 16 29 mmCRTC0_CRTC_H_BLANK_START_END 0 0x1b81 0 0 4294967295 mmCRTC1_CRTC_H_BLANK_START_END 0 0x1d81 0 0 4294967295 mmCRTC2_CRTC_H_BLANK_START_END 0 0x1f81 0 0 4294967295 mmCRTC3_CRTC_H_BLANK_START_END 0 0x4181 0 0 4294967295 mmCRTC4_CRTC_H_BLANK_START_END 0 0x4381 0 0 4294967295 mmCRTC5_CRTC_H_BLANK_START_END 0 0x4581 0 0 4294967295 mmCRTC_H_SYNC_A 0 0x1b82 2 0 4294967295 CRTC_H_SYNC_A_START 0 13 CRTC_H_SYNC_A_END 16 29 mmCRTC0_CRTC_H_SYNC_A 0 0x1b82 0 0 4294967295 mmCRTC1_CRTC_H_SYNC_A 0 0x1d82 0 0 4294967295 mmCRTC2_CRTC_H_SYNC_A 0 0x1f82 0 0 4294967295 mmCRTC3_CRTC_H_SYNC_A 0 0x4182 0 0 4294967295 mmCRTC4_CRTC_H_SYNC_A 0 0x4382 0 0 4294967295 mmCRTC5_CRTC_H_SYNC_A 0 0x4582 0 0 4294967295 mmCRTC_H_SYNC_A_CNTL 0 0x1b83 3 0 4294967295 CRTC_H_SYNC_A_POL 0 0 CRTC_COMP_SYNC_A_EN 16 16 CRTC_H_SYNC_A_CUTOFF 17 17 mmCRTC0_CRTC_H_SYNC_A_CNTL 0 0x1b83 0 0 4294967295 mmCRTC1_CRTC_H_SYNC_A_CNTL 0 0x1d83 0 0 4294967295 mmCRTC2_CRTC_H_SYNC_A_CNTL 0 0x1f83 0 0 4294967295 mmCRTC3_CRTC_H_SYNC_A_CNTL 0 0x4183 0 0 4294967295 mmCRTC4_CRTC_H_SYNC_A_CNTL 0 0x4383 0 0 4294967295 mmCRTC5_CRTC_H_SYNC_A_CNTL 0 0x4583 0 0 4294967295 mmCRTC_H_SYNC_B 0 0x1b84 2 0 4294967295 CRTC_H_SYNC_B_START 0 13 CRTC_H_SYNC_B_END 16 29 mmCRTC0_CRTC_H_SYNC_B 0 0x1b84 0 0 4294967295 mmCRTC1_CRTC_H_SYNC_B 0 0x1d84 0 0 4294967295 mmCRTC2_CRTC_H_SYNC_B 0 0x1f84 0 0 4294967295 mmCRTC3_CRTC_H_SYNC_B 0 0x4184 0 0 4294967295 mmCRTC4_CRTC_H_SYNC_B 0 0x4384 0 0 4294967295 mmCRTC5_CRTC_H_SYNC_B 0 0x4584 0 0 4294967295 mmCRTC_H_SYNC_B_CNTL 0 0x1b85 3 0 4294967295 CRTC_H_SYNC_B_POL 0 0 CRTC_COMP_SYNC_B_EN 16 16 CRTC_H_SYNC_B_CUTOFF 17 17 mmCRTC0_CRTC_H_SYNC_B_CNTL 0 0x1b85 0 0 4294967295 mmCRTC1_CRTC_H_SYNC_B_CNTL 0 0x1d85 0 0 4294967295 mmCRTC2_CRTC_H_SYNC_B_CNTL 0 0x1f85 0 0 4294967295 mmCRTC3_CRTC_H_SYNC_B_CNTL 0 0x4185 0 0 4294967295 mmCRTC4_CRTC_H_SYNC_B_CNTL 0 0x4385 0 0 4294967295 mmCRTC5_CRTC_H_SYNC_B_CNTL 0 0x4585 0 0 4294967295 mmCRTC_VBI_END 0 0x1b86 2 0 4294967295 CRTC_VBI_V_END 0 13 CRTC_VBI_H_END 16 29 mmCRTC0_CRTC_VBI_END 0 0x1b86 0 0 4294967295 mmCRTC1_CRTC_VBI_END 0 0x1d86 0 0 4294967295 mmCRTC2_CRTC_VBI_END 0 0x1f86 0 0 4294967295 mmCRTC3_CRTC_VBI_END 0 0x4186 0 0 4294967295 mmCRTC4_CRTC_VBI_END 0 0x4386 0 0 4294967295 mmCRTC5_CRTC_VBI_END 0 0x4586 0 0 4294967295 mmCRTC_V_TOTAL 0 0x1b87 1 0 4294967295 CRTC_V_TOTAL 0 13 mmCRTC0_CRTC_V_TOTAL 0 0x1b87 0 0 4294967295 mmCRTC1_CRTC_V_TOTAL 0 0x1d87 0 0 4294967295 mmCRTC2_CRTC_V_TOTAL 0 0x1f87 0 0 4294967295 mmCRTC3_CRTC_V_TOTAL 0 0x4187 0 0 4294967295 mmCRTC4_CRTC_V_TOTAL 0 0x4387 0 0 4294967295 mmCRTC5_CRTC_V_TOTAL 0 0x4587 0 0 4294967295 mmCRTC_V_TOTAL_MIN 0 0x1b88 1 0 4294967295 CRTC_V_TOTAL_MIN 0 13 mmCRTC0_CRTC_V_TOTAL_MIN 0 0x1b88 0 0 4294967295 mmCRTC1_CRTC_V_TOTAL_MIN 0 0x1d88 0 0 4294967295 mmCRTC2_CRTC_V_TOTAL_MIN 0 0x1f88 0 0 4294967295 mmCRTC3_CRTC_V_TOTAL_MIN 0 0x4188 0 0 4294967295 mmCRTC4_CRTC_V_TOTAL_MIN 0 0x4388 0 0 4294967295 mmCRTC5_CRTC_V_TOTAL_MIN 0 0x4588 0 0 4294967295 mmCRTC_V_TOTAL_MAX 0 0x1b89 2 0 4294967295 CRTC_V_TOTAL_MAX 0 13 CRTC_ALLOW_VBLANK_EXTENSION_FOR_MC_TRAINING 16 16 mmCRTC0_CRTC_V_TOTAL_MAX 0 0x1b89 0 0 4294967295 mmCRTC1_CRTC_V_TOTAL_MAX 0 0x1d89 0 0 4294967295 mmCRTC2_CRTC_V_TOTAL_MAX 0 0x1f89 0 0 4294967295 mmCRTC3_CRTC_V_TOTAL_MAX 0 0x4189 0 0 4294967295 mmCRTC4_CRTC_V_TOTAL_MAX 0 0x4389 0 0 4294967295 mmCRTC5_CRTC_V_TOTAL_MAX 0 0x4589 0 0 4294967295 mmCRTC_V_TOTAL_CONTROL 0 0x1b8a 6 0 4294967295 CRTC_V_TOTAL_MIN_SEL 0 0 CRTC_V_TOTAL_MAX_SEL 4 4 CRTC_FORCE_LOCK_ON_EVENT 8 8 CRTC_FORCE_LOCK_TO_MASTER_VSYNC 12 12 CRTC_SET_V_TOTAL_MIN_MASK_EN 15 15 CRTC_SET_V_TOTAL_MIN_MASK 16 31 mmCRTC0_CRTC_V_TOTAL_CONTROL 0 0x1b8a 0 0 4294967295 mmCRTC1_CRTC_V_TOTAL_CONTROL 0 0x1d8a 0 0 4294967295 mmCRTC2_CRTC_V_TOTAL_CONTROL 0 0x1f8a 0 0 4294967295 mmCRTC3_CRTC_V_TOTAL_CONTROL 0 0x418a 0 0 4294967295 mmCRTC4_CRTC_V_TOTAL_CONTROL 0 0x438a 0 0 4294967295 mmCRTC5_CRTC_V_TOTAL_CONTROL 0 0x458a 0 0 4294967295 mmCRTC_V_TOTAL_INT_STATUS 0 0x1b8b 4 0 4294967295 CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED 0 0 CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_INT 4 4 CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK 8 8 CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_MSK 12 12 mmCRTC0_CRTC_V_TOTAL_INT_STATUS 0 0x1b8b 0 0 4294967295 mmCRTC1_CRTC_V_TOTAL_INT_STATUS 0 0x1d8b 0 0 4294967295 mmCRTC2_CRTC_V_TOTAL_INT_STATUS 0 0x1f8b 0 0 4294967295 mmCRTC3_CRTC_V_TOTAL_INT_STATUS 0 0x418b 0 0 4294967295 mmCRTC4_CRTC_V_TOTAL_INT_STATUS 0 0x438b 0 0 4294967295 mmCRTC5_CRTC_V_TOTAL_INT_STATUS 0 0x458b 0 0 4294967295 mmCRTC_VSYNC_NOM_INT_STATUS 0 0x1b8c 2 0 4294967295 CRTC_VSYNC_NOM 0 0 CRTC_VSYNC_NOM_INT_CLEAR 4 4 mmCRTC0_CRTC_VSYNC_NOM_INT_STATUS 0 0x1b8c 0 0 4294967295 mmCRTC1_CRTC_VSYNC_NOM_INT_STATUS 0 0x1d8c 0 0 4294967295 mmCRTC2_CRTC_VSYNC_NOM_INT_STATUS 0 0x1f8c 0 0 4294967295 mmCRTC3_CRTC_VSYNC_NOM_INT_STATUS 0 0x418c 0 0 4294967295 mmCRTC4_CRTC_VSYNC_NOM_INT_STATUS 0 0x438c 0 0 4294967295 mmCRTC5_CRTC_VSYNC_NOM_INT_STATUS 0 0x458c 0 0 4294967295 mmCRTC_V_BLANK_START_END 0 0x1b8d 2 0 4294967295 CRTC_V_BLANK_START 0 13 CRTC_V_BLANK_END 16 29 mmCRTC0_CRTC_V_BLANK_START_END 0 0x1b8d 0 0 4294967295 mmCRTC1_CRTC_V_BLANK_START_END 0 0x1d8d 0 0 4294967295 mmCRTC2_CRTC_V_BLANK_START_END 0 0x1f8d 0 0 4294967295 mmCRTC3_CRTC_V_BLANK_START_END 0 0x418d 0 0 4294967295 mmCRTC4_CRTC_V_BLANK_START_END 0 0x438d 0 0 4294967295 mmCRTC5_CRTC_V_BLANK_START_END 0 0x458d 0 0 4294967295 mmCRTC_V_SYNC_A 0 0x1b8e 2 0 4294967295 CRTC_V_SYNC_A_START 0 13 CRTC_V_SYNC_A_END 16 29 mmCRTC0_CRTC_V_SYNC_A 0 0x1b8e 0 0 4294967295 mmCRTC1_CRTC_V_SYNC_A 0 0x1d8e 0 0 4294967295 mmCRTC2_CRTC_V_SYNC_A 0 0x1f8e 0 0 4294967295 mmCRTC3_CRTC_V_SYNC_A 0 0x418e 0 0 4294967295 mmCRTC4_CRTC_V_SYNC_A 0 0x438e 0 0 4294967295 mmCRTC5_CRTC_V_SYNC_A 0 0x458e 0 0 4294967295 mmCRTC_V_SYNC_A_CNTL 0 0x1b8f 1 0 4294967295 CRTC_V_SYNC_A_POL 0 0 mmCRTC0_CRTC_V_SYNC_A_CNTL 0 0x1b8f 0 0 4294967295 mmCRTC1_CRTC_V_SYNC_A_CNTL 0 0x1d8f 0 0 4294967295 mmCRTC2_CRTC_V_SYNC_A_CNTL 0 0x1f8f 0 0 4294967295 mmCRTC3_CRTC_V_SYNC_A_CNTL 0 0x418f 0 0 4294967295 mmCRTC4_CRTC_V_SYNC_A_CNTL 0 0x438f 0 0 4294967295 mmCRTC5_CRTC_V_SYNC_A_CNTL 0 0x458f 0 0 4294967295 mmCRTC_V_SYNC_B 0 0x1b90 2 0 4294967295 CRTC_V_SYNC_B_START 0 13 CRTC_V_SYNC_B_END 16 29 mmCRTC0_CRTC_V_SYNC_B 0 0x1b90 0 0 4294967295 mmCRTC1_CRTC_V_SYNC_B 0 0x1d90 0 0 4294967295 mmCRTC2_CRTC_V_SYNC_B 0 0x1f90 0 0 4294967295 mmCRTC3_CRTC_V_SYNC_B 0 0x4190 0 0 4294967295 mmCRTC4_CRTC_V_SYNC_B 0 0x4390 0 0 4294967295 mmCRTC5_CRTC_V_SYNC_B 0 0x4590 0 0 4294967295 mmCRTC_V_SYNC_B_CNTL 0 0x1b91 1 0 4294967295 CRTC_V_SYNC_B_POL 0 0 mmCRTC0_CRTC_V_SYNC_B_CNTL 0 0x1b91 0 0 4294967295 mmCRTC1_CRTC_V_SYNC_B_CNTL 0 0x1d91 0 0 4294967295 mmCRTC2_CRTC_V_SYNC_B_CNTL 0 0x1f91 0 0 4294967295 mmCRTC3_CRTC_V_SYNC_B_CNTL 0 0x4191 0 0 4294967295 mmCRTC4_CRTC_V_SYNC_B_CNTL 0 0x4391 0 0 4294967295 mmCRTC5_CRTC_V_SYNC_B_CNTL 0 0x4591 0 0 4294967295 mmCRTC_DTMTEST_CNTL 0 0x1b92 2 0 4294967295 CRTC_DTMTEST_CRTC_EN 0 0 CRTC_DTMTEST_CLK_DIV 1 4 mmCRTC0_CRTC_DTMTEST_CNTL 0 0x1b92 0 0 4294967295 mmCRTC1_CRTC_DTMTEST_CNTL 0 0x1d92 0 0 4294967295 mmCRTC2_CRTC_DTMTEST_CNTL 0 0x1f92 0 0 4294967295 mmCRTC3_CRTC_DTMTEST_CNTL 0 0x4192 0 0 4294967295 mmCRTC4_CRTC_DTMTEST_CNTL 0 0x4392 0 0 4294967295 mmCRTC5_CRTC_DTMTEST_CNTL 0 0x4592 0 0 4294967295 mmCRTC_DTMTEST_STATUS_POSITION 0 0x1b93 2 0 4294967295 CRTC_DTMTEST_VERT_COUNT 0 13 CRTC_DTMTEST_HORZ_COUNT 16 29 mmCRTC0_CRTC_DTMTEST_STATUS_POSITION 0 0x1b93 0 0 4294967295 mmCRTC1_CRTC_DTMTEST_STATUS_POSITION 0 0x1d93 0 0 4294967295 mmCRTC2_CRTC_DTMTEST_STATUS_POSITION 0 0x1f93 0 0 4294967295 mmCRTC3_CRTC_DTMTEST_STATUS_POSITION 0 0x4193 0 0 4294967295 mmCRTC4_CRTC_DTMTEST_STATUS_POSITION 0 0x4393 0 0 4294967295 mmCRTC5_CRTC_DTMTEST_STATUS_POSITION 0 0x4593 0 0 4294967295 mmCRTC_TRIGA_CNTL 0 0x1b94 11 0 4294967295 CRTC_TRIGA_SOURCE_SELECT 0 4 CRTC_TRIGA_POLARITY_SELECT 5 7 CRTC_TRIGA_RESYNC_BYPASS_EN 8 8 CRTC_TRIGA_INPUT_STATUS 9 9 CRTC_TRIGA_POLARITY_STATUS 10 10 CRTC_TRIGA_OCCURRED 11 11 CRTC_TRIGA_RISING_EDGE_DETECT_CNTL 12 13 CRTC_TRIGA_FALLING_EDGE_DETECT_CNTL 16 17 CRTC_TRIGA_FREQUENCY_SELECT 20 21 CRTC_TRIGA_DELAY 24 28 CRTC_TRIGA_CLEAR 31 31 mmCRTC0_CRTC_TRIGA_CNTL 0 0x1b94 0 0 4294967295 mmCRTC1_CRTC_TRIGA_CNTL 0 0x1d94 0 0 4294967295 mmCRTC2_CRTC_TRIGA_CNTL 0 0x1f94 0 0 4294967295 mmCRTC3_CRTC_TRIGA_CNTL 0 0x4194 0 0 4294967295 mmCRTC4_CRTC_TRIGA_CNTL 0 0x4394 0 0 4294967295 mmCRTC5_CRTC_TRIGA_CNTL 0 0x4594 0 0 4294967295 mmCRTC_TRIGA_MANUAL_TRIG 0 0x1b95 1 0 4294967295 CRTC_TRIGA_MANUAL_TRIG 0 0 mmCRTC0_CRTC_TRIGA_MANUAL_TRIG 0 0x1b95 0 0 4294967295 mmCRTC1_CRTC_TRIGA_MANUAL_TRIG 0 0x1d95 0 0 4294967295 mmCRTC2_CRTC_TRIGA_MANUAL_TRIG 0 0x1f95 0 0 4294967295 mmCRTC3_CRTC_TRIGA_MANUAL_TRIG 0 0x4195 0 0 4294967295 mmCRTC4_CRTC_TRIGA_MANUAL_TRIG 0 0x4395 0 0 4294967295 mmCRTC5_CRTC_TRIGA_MANUAL_TRIG 0 0x4595 0 0 4294967295 mmCRTC_TRIGB_CNTL 0 0x1b96 11 0 4294967295 CRTC_TRIGB_SOURCE_SELECT 0 4 CRTC_TRIGB_POLARITY_SELECT 5 7 CRTC_TRIGB_RESYNC_BYPASS_EN 8 8 CRTC_TRIGB_INPUT_STATUS 9 9 CRTC_TRIGB_POLARITY_STATUS 10 10 CRTC_TRIGB_OCCURRED 11 11 CRTC_TRIGB_RISING_EDGE_DETECT_CNTL 12 13 CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL 16 17 CRTC_TRIGB_FREQUENCY_SELECT 20 21 CRTC_TRIGB_DELAY 24 28 CRTC_TRIGB_CLEAR 31 31 mmCRTC0_CRTC_TRIGB_CNTL 0 0x1b96 0 0 4294967295 mmCRTC1_CRTC_TRIGB_CNTL 0 0x1d96 0 0 4294967295 mmCRTC2_CRTC_TRIGB_CNTL 0 0x1f96 0 0 4294967295 mmCRTC3_CRTC_TRIGB_CNTL 0 0x4196 0 0 4294967295 mmCRTC4_CRTC_TRIGB_CNTL 0 0x4396 0 0 4294967295 mmCRTC5_CRTC_TRIGB_CNTL 0 0x4596 0 0 4294967295 mmCRTC_TRIGB_MANUAL_TRIG 0 0x1b97 1 0 4294967295 CRTC_TRIGB_MANUAL_TRIG 0 0 mmCRTC0_CRTC_TRIGB_MANUAL_TRIG 0 0x1b97 0 0 4294967295 mmCRTC1_CRTC_TRIGB_MANUAL_TRIG 0 0x1d97 0 0 4294967295 mmCRTC2_CRTC_TRIGB_MANUAL_TRIG 0 0x1f97 0 0 4294967295 mmCRTC3_CRTC_TRIGB_MANUAL_TRIG 0 0x4197 0 0 4294967295 mmCRTC4_CRTC_TRIGB_MANUAL_TRIG 0 0x4397 0 0 4294967295 mmCRTC5_CRTC_TRIGB_MANUAL_TRIG 0 0x4597 0 0 4294967295 mmCRTC_FORCE_COUNT_NOW_CNTL 0 0x1b98 5 0 4294967295 CRTC_FORCE_COUNT_NOW_MODE 0 1 CRTC_FORCE_COUNT_NOW_CHECK 4 4 CRTC_FORCE_COUNT_NOW_TRIG_SEL 8 8 CRTC_FORCE_COUNT_NOW_OCCURRED 16 16 CRTC_FORCE_COUNT_NOW_CLEAR 24 24 mmCRTC0_CRTC_FORCE_COUNT_NOW_CNTL 0 0x1b98 0 0 4294967295 mmCRTC1_CRTC_FORCE_COUNT_NOW_CNTL 0 0x1d98 0 0 4294967295 mmCRTC2_CRTC_FORCE_COUNT_NOW_CNTL 0 0x1f98 0 0 4294967295 mmCRTC3_CRTC_FORCE_COUNT_NOW_CNTL 0 0x4198 0 0 4294967295 mmCRTC4_CRTC_FORCE_COUNT_NOW_CNTL 0 0x4398 0 0 4294967295 mmCRTC5_CRTC_FORCE_COUNT_NOW_CNTL 0 0x4598 0 0 4294967295 mmCRTC_FLOW_CONTROL 0 0x1b99 4 0 4294967295 CRTC_FLOW_CONTROL_SOURCE_SELECT 0 4 CRTC_FLOW_CONTROL_POLARITY 8 8 CRTC_FLOW_CONTROL_GRANULARITY 16 16 CRTC_FLOW_CONTROL_INPUT_STATUS 24 24 mmCRTC0_CRTC_FLOW_CONTROL 0 0x1b99 0 0 4294967295 mmCRTC1_CRTC_FLOW_CONTROL 0 0x1d99 0 0 4294967295 mmCRTC2_CRTC_FLOW_CONTROL 0 0x1f99 0 0 4294967295 mmCRTC3_CRTC_FLOW_CONTROL 0 0x4199 0 0 4294967295 mmCRTC4_CRTC_FLOW_CONTROL 0 0x4399 0 0 4294967295 mmCRTC5_CRTC_FLOW_CONTROL 0 0x4599 0 0 4294967295 mmCRTC_STEREO_FORCE_NEXT_EYE 0 0x1b9a 3 0 4294967295 CRTC_STEREO_FORCE_NEXT_EYE 0 1 CRTC_AVSYNC_FRAME_COUNTER 8 15 CRTC_AVSYNC_LINE_COUNTER 16 28 mmCRTC0_CRTC_STEREO_FORCE_NEXT_EYE 0 0x1b9a 0 0 4294967295 mmCRTC1_CRTC_STEREO_FORCE_NEXT_EYE 0 0x1d9a 0 0 4294967295 mmCRTC2_CRTC_STEREO_FORCE_NEXT_EYE 0 0x1f9a 0 0 4294967295 mmCRTC3_CRTC_STEREO_FORCE_NEXT_EYE 0 0x419a 0 0 4294967295 mmCRTC4_CRTC_STEREO_FORCE_NEXT_EYE 0 0x439a 0 0 4294967295 mmCRTC5_CRTC_STEREO_FORCE_NEXT_EYE 0 0x459a 0 0 4294967295 mmCRTC_AVSYNC_COUNTER 0 0x1b9b 1 0 4294967295 CRTC_AVSYNC_COUNTER 0 31 mmCRTC0_CRTC_AVSYNC_COUNTER 0 0x1b9b 0 0 4294967295 mmCRTC1_CRTC_AVSYNC_COUNTER 0 0x1d9b 0 0 4294967295 mmCRTC2_CRTC_AVSYNC_COUNTER 0 0x1f9b 0 0 4294967295 mmCRTC3_CRTC_AVSYNC_COUNTER 0 0x419b 0 0 4294967295 mmCRTC4_CRTC_AVSYNC_COUNTER 0 0x439b 0 0 4294967295 mmCRTC5_CRTC_AVSYNC_COUNTER 0 0x459b 0 0 4294967295 mmCRTC_CONTROL 0 0x1b9c 12 0 4294967295 CRTC_MASTER_EN 0 0 CRTC_SYNC_RESET_SEL 4 4 CRTC_DISABLE_POINT_CNTL 8 9 CRTC_START_POINT_CNTL 12 12 CRTC_FIELD_NUMBER_CNTL 13 13 CRTC_FIELD_NUMBER_POLARITY 14 14 CRTC_CURRENT_MASTER_EN_STATE 16 16 CRTC_HBLANK_EARLY_CONTROL 20 22 CRTC_DISP_READ_REQUEST_DISABLE 24 24 CRTC_SOF_PULL_EN 29 29 CRTC_AVSYNC_LOCK_SNAPSHOT 30 30 CRTC_AVSYNC_VSYNC_N_HSYNC_MODE 31 31 mmCRTC0_CRTC_CONTROL 0 0x1b9c 0 0 4294967295 mmCRTC1_CRTC_CONTROL 0 0x1d9c 0 0 4294967295 mmCRTC2_CRTC_CONTROL 0 0x1f9c 0 0 4294967295 mmCRTC3_CRTC_CONTROL 0 0x419c 0 0 4294967295 mmCRTC4_CRTC_CONTROL 0 0x439c 0 0 4294967295 mmCRTC5_CRTC_CONTROL 0 0x459c 0 0 4294967295 mmCRTC_BLANK_CONTROL 0 0x1b9d 3 0 4294967295 CRTC_CURRENT_BLANK_STATE 0 0 CRTC_BLANK_DATA_EN 8 8 CRTC_BLANK_DE_MODE 16 16 mmCRTC0_CRTC_BLANK_CONTROL 0 0x1b9d 0 0 4294967295 mmCRTC1_CRTC_BLANK_CONTROL 0 0x1d9d 0 0 4294967295 mmCRTC2_CRTC_BLANK_CONTROL 0 0x1f9d 0 0 4294967295 mmCRTC3_CRTC_BLANK_CONTROL 0 0x419d 0 0 4294967295 mmCRTC4_CRTC_BLANK_CONTROL 0 0x439d 0 0 4294967295 mmCRTC5_CRTC_BLANK_CONTROL 0 0x459d 0 0 4294967295 mmCRTC_INTERLACE_CONTROL 0 0x1b9e 2 0 4294967295 CRTC_INTERLACE_ENABLE 0 0 CRTC_INTERLACE_FORCE_NEXT_FIELD 16 17 mmCRTC0_CRTC_INTERLACE_CONTROL 0 0x1b9e 0 0 4294967295 mmCRTC1_CRTC_INTERLACE_CONTROL 0 0x1d9e 0 0 4294967295 mmCRTC2_CRTC_INTERLACE_CONTROL 0 0x1f9e 0 0 4294967295 mmCRTC3_CRTC_INTERLACE_CONTROL 0 0x419e 0 0 4294967295 mmCRTC4_CRTC_INTERLACE_CONTROL 0 0x439e 0 0 4294967295 mmCRTC5_CRTC_INTERLACE_CONTROL 0 0x459e 0 0 4294967295 mmCRTC_INTERLACE_STATUS 0 0x1b9f 2 0 4294967295 CRTC_INTERLACE_CURRENT_FIELD 0 0 CRTC_INTERLACE_NEXT_FIELD 1 1 mmCRTC0_CRTC_INTERLACE_STATUS 0 0x1b9f 0 0 4294967295 mmCRTC1_CRTC_INTERLACE_STATUS 0 0x1d9f 0 0 4294967295 mmCRTC2_CRTC_INTERLACE_STATUS 0 0x1f9f 0 0 4294967295 mmCRTC3_CRTC_INTERLACE_STATUS 0 0x419f 0 0 4294967295 mmCRTC4_CRTC_INTERLACE_STATUS 0 0x439f 0 0 4294967295 mmCRTC5_CRTC_INTERLACE_STATUS 0 0x459f 0 0 4294967295 mmCRTC_FIELD_INDICATION_CONTROL 0 0x1ba0 2 0 4294967295 CRTC_FIELD_INDICATION_OUTPUT_POLARITY 0 0 CRTC_FIELD_ALIGNMENT 1 1 mmCRTC0_CRTC_FIELD_INDICATION_CONTROL 0 0x1ba0 0 0 4294967295 mmCRTC1_CRTC_FIELD_INDICATION_CONTROL 0 0x1da0 0 0 4294967295 mmCRTC2_CRTC_FIELD_INDICATION_CONTROL 0 0x1fa0 0 0 4294967295 mmCRTC3_CRTC_FIELD_INDICATION_CONTROL 0 0x41a0 0 0 4294967295 mmCRTC4_CRTC_FIELD_INDICATION_CONTROL 0 0x43a0 0 0 4294967295 mmCRTC5_CRTC_FIELD_INDICATION_CONTROL 0 0x45a0 0 0 4294967295 mmCRTC_PIXEL_DATA_READBACK0 0 0x1ba1 2 0 4294967295 CRTC_PIXEL_DATA_BLUE_CB 0 11 CRTC_PIXEL_DATA_GREEN_Y 16 27 mmCRTC0_CRTC_PIXEL_DATA_READBACK0 0 0x1ba1 0 0 4294967295 mmCRTC1_CRTC_PIXEL_DATA_READBACK0 0 0x1da1 0 0 4294967295 mmCRTC2_CRTC_PIXEL_DATA_READBACK0 0 0x1fa1 0 0 4294967295 mmCRTC3_CRTC_PIXEL_DATA_READBACK0 0 0x41a1 0 0 4294967295 mmCRTC4_CRTC_PIXEL_DATA_READBACK0 0 0x43a1 0 0 4294967295 mmCRTC5_CRTC_PIXEL_DATA_READBACK0 0 0x45a1 0 0 4294967295 mmCRTC_PIXEL_DATA_READBACK1 0 0x1ba2 1 0 4294967295 CRTC_PIXEL_DATA_RED_CR 0 11 mmCRTC0_CRTC_PIXEL_DATA_READBACK1 0 0x1ba2 0 0 4294967295 mmCRTC1_CRTC_PIXEL_DATA_READBACK1 0 0x1da2 0 0 4294967295 mmCRTC2_CRTC_PIXEL_DATA_READBACK1 0 0x1fa2 0 0 4294967295 mmCRTC3_CRTC_PIXEL_DATA_READBACK1 0 0x41a2 0 0 4294967295 mmCRTC4_CRTC_PIXEL_DATA_READBACK1 0 0x43a2 0 0 4294967295 mmCRTC5_CRTC_PIXEL_DATA_READBACK1 0 0x45a2 0 0 4294967295 mmCRTC_STATUS 0 0x1ba3 9 0 4294967295 CRTC_V_BLANK 0 0 CRTC_V_ACTIVE_DISP 1 1 CRTC_V_SYNC_A 2 2 CRTC_V_UPDATE 3 3 CRTC_V_START_LINE 4 4 CRTC_V_BLANK_3D_STRUCTURE 5 5 CRTC_H_BLANK 16 16 CRTC_H_ACTIVE_DISP 17 17 CRTC_H_SYNC_A 18 18 mmCRTC0_CRTC_STATUS 0 0x1ba3 0 0 4294967295 mmCRTC1_CRTC_STATUS 0 0x1da3 0 0 4294967295 mmCRTC2_CRTC_STATUS 0 0x1fa3 0 0 4294967295 mmCRTC3_CRTC_STATUS 0 0x41a3 0 0 4294967295 mmCRTC4_CRTC_STATUS 0 0x43a3 0 0 4294967295 mmCRTC5_CRTC_STATUS 0 0x45a3 0 0 4294967295 mmCRTC_STATUS_POSITION 0 0x1ba4 2 0 4294967295 CRTC_VERT_COUNT 0 13 CRTC_HORZ_COUNT 16 29 mmCRTC0_CRTC_STATUS_POSITION 0 0x1ba4 0 0 4294967295 mmCRTC1_CRTC_STATUS_POSITION 0 0x1da4 0 0 4294967295 mmCRTC2_CRTC_STATUS_POSITION 0 0x1fa4 0 0 4294967295 mmCRTC3_CRTC_STATUS_POSITION 0 0x41a4 0 0 4294967295 mmCRTC4_CRTC_STATUS_POSITION 0 0x43a4 0 0 4294967295 mmCRTC5_CRTC_STATUS_POSITION 0 0x45a4 0 0 4294967295 mmCRTC_NOM_VERT_POSITION 0 0x1ba5 1 0 4294967295 CRTC_VERT_COUNT_NOM 0 13 mmCRTC0_CRTC_NOM_VERT_POSITION 0 0x1ba5 0 0 4294967295 mmCRTC1_CRTC_NOM_VERT_POSITION 0 0x1da5 0 0 4294967295 mmCRTC2_CRTC_NOM_VERT_POSITION 0 0x1fa5 0 0 4294967295 mmCRTC3_CRTC_NOM_VERT_POSITION 0 0x41a5 0 0 4294967295 mmCRTC4_CRTC_NOM_VERT_POSITION 0 0x43a5 0 0 4294967295 mmCRTC5_CRTC_NOM_VERT_POSITION 0 0x45a5 0 0 4294967295 mmCRTC_STATUS_FRAME_COUNT 0 0x1ba6 1 0 4294967295 CRTC_FRAME_COUNT 0 23 mmCRTC0_CRTC_STATUS_FRAME_COUNT 0 0x1ba6 0 0 4294967295 mmCRTC1_CRTC_STATUS_FRAME_COUNT 0 0x1da6 0 0 4294967295 mmCRTC2_CRTC_STATUS_FRAME_COUNT 0 0x1fa6 0 0 4294967295 mmCRTC3_CRTC_STATUS_FRAME_COUNT 0 0x41a6 0 0 4294967295 mmCRTC4_CRTC_STATUS_FRAME_COUNT 0 0x43a6 0 0 4294967295 mmCRTC5_CRTC_STATUS_FRAME_COUNT 0 0x45a6 0 0 4294967295 mmCRTC_STATUS_VF_COUNT 0 0x1ba7 1 0 4294967295 CRTC_VF_COUNT 0 29 mmCRTC0_CRTC_STATUS_VF_COUNT 0 0x1ba7 0 0 4294967295 mmCRTC1_CRTC_STATUS_VF_COUNT 0 0x1da7 0 0 4294967295 mmCRTC2_CRTC_STATUS_VF_COUNT 0 0x1fa7 0 0 4294967295 mmCRTC3_CRTC_STATUS_VF_COUNT 0 0x41a7 0 0 4294967295 mmCRTC4_CRTC_STATUS_VF_COUNT 0 0x43a7 0 0 4294967295 mmCRTC5_CRTC_STATUS_VF_COUNT 0 0x45a7 0 0 4294967295 mmCRTC_STATUS_HV_COUNT 0 0x1ba8 1 0 4294967295 CRTC_HV_COUNT 0 29 mmCRTC0_CRTC_STATUS_HV_COUNT 0 0x1ba8 0 0 4294967295 mmCRTC1_CRTC_STATUS_HV_COUNT 0 0x1da8 0 0 4294967295 mmCRTC2_CRTC_STATUS_HV_COUNT 0 0x1fa8 0 0 4294967295 mmCRTC3_CRTC_STATUS_HV_COUNT 0 0x41a8 0 0 4294967295 mmCRTC4_CRTC_STATUS_HV_COUNT 0 0x43a8 0 0 4294967295 mmCRTC5_CRTC_STATUS_HV_COUNT 0 0x45a8 0 0 4294967295 mmCRTC_COUNT_CONTROL 0 0x1ba9 2 0 4294967295 CRTC_HORZ_COUNT_BY2_EN 0 0 CRTC_HORZ_REPETITION_COUNT 1 4 mmCRTC0_CRTC_COUNT_CONTROL 0 0x1ba9 0 0 4294967295 mmCRTC1_CRTC_COUNT_CONTROL 0 0x1da9 0 0 4294967295 mmCRTC2_CRTC_COUNT_CONTROL 0 0x1fa9 0 0 4294967295 mmCRTC3_CRTC_COUNT_CONTROL 0 0x41a9 0 0 4294967295 mmCRTC4_CRTC_COUNT_CONTROL 0 0x43a9 0 0 4294967295 mmCRTC5_CRTC_COUNT_CONTROL 0 0x45a9 0 0 4294967295 mmCRTC_COUNT_RESET 0 0x1baa 1 0 4294967295 CRTC_RESET_FRAME_COUNT 0 0 mmCRTC0_CRTC_COUNT_RESET 0 0x1baa 0 0 4294967295 mmCRTC1_CRTC_COUNT_RESET 0 0x1daa 0 0 4294967295 mmCRTC2_CRTC_COUNT_RESET 0 0x1faa 0 0 4294967295 mmCRTC3_CRTC_COUNT_RESET 0 0x41aa 0 0 4294967295 mmCRTC4_CRTC_COUNT_RESET 0 0x43aa 0 0 4294967295 mmCRTC5_CRTC_COUNT_RESET 0 0x45aa 0 0 4294967295 mmCRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0 0x1bab 1 0 4294967295 CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0 0 mmCRTC0_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0 0x1bab 0 0 4294967295 mmCRTC1_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0 0x1dab 0 0 4294967295 mmCRTC2_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0 0x1fab 0 0 4294967295 mmCRTC3_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0 0x41ab 0 0 4294967295 mmCRTC4_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0 0x43ab 0 0 4294967295 mmCRTC5_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0 0x45ab 0 0 4294967295 mmCRTC_VERT_SYNC_CONTROL 0 0x1bac 3 0 4294967295 CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED 0 0 CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR 8 8 CRTC_AUTO_FORCE_VSYNC_MODE 16 17 mmCRTC0_CRTC_VERT_SYNC_CONTROL 0 0x1bac 0 0 4294967295 mmCRTC1_CRTC_VERT_SYNC_CONTROL 0 0x1dac 0 0 4294967295 mmCRTC2_CRTC_VERT_SYNC_CONTROL 0 0x1fac 0 0 4294967295 mmCRTC3_CRTC_VERT_SYNC_CONTROL 0 0x41ac 0 0 4294967295 mmCRTC4_CRTC_VERT_SYNC_CONTROL 0 0x43ac 0 0 4294967295 mmCRTC5_CRTC_VERT_SYNC_CONTROL 0 0x45ac 0 0 4294967295 mmCRTC_STEREO_STATUS 0 0x1bad 5 0 4294967295 CRTC_STEREO_CURRENT_EYE 0 0 CRTC_STEREO_SYNC_OUTPUT 8 8 CRTC_STEREO_SYNC_SELECT 16 16 CRTC_STEREO_EYE_FLAG 20 20 CRTC_STEREO_FORCE_NEXT_EYE_PENDING 24 25 mmCRTC0_CRTC_STEREO_STATUS 0 0x1bad 0 0 4294967295 mmCRTC1_CRTC_STEREO_STATUS 0 0x1dad 0 0 4294967295 mmCRTC2_CRTC_STEREO_STATUS 0 0x1fad 0 0 4294967295 mmCRTC3_CRTC_STEREO_STATUS 0 0x41ad 0 0 4294967295 mmCRTC4_CRTC_STEREO_STATUS 0 0x43ad 0 0 4294967295 mmCRTC5_CRTC_STEREO_STATUS 0 0x45ad 0 0 4294967295 mmCRTC_STEREO_CONTROL 0 0x1bae 8 0 4294967295 CRTC_STEREO_SYNC_OUTPUT_LINE_NUM 0 13 CRTC_STEREO_SYNC_OUTPUT_POLARITY 15 15 CRTC_STEREO_SYNC_SELECT_POLARITY 16 16 CRTC_STEREO_EYE_FLAG_POLARITY 17 17 CRTC_DISABLE_STEREOSYNC_OUTPUT_FOR_DP 18 18 CRTC_DISABLE_FIELD_NUM 19 19 CRTC_DISABLE_V_BLANK_FOR_DP_FIX 20 20 CRTC_STEREO_EN 24 24 mmCRTC0_CRTC_STEREO_CONTROL 0 0x1bae 0 0 4294967295 mmCRTC1_CRTC_STEREO_CONTROL 0 0x1dae 0 0 4294967295 mmCRTC2_CRTC_STEREO_CONTROL 0 0x1fae 0 0 4294967295 mmCRTC3_CRTC_STEREO_CONTROL 0 0x41ae 0 0 4294967295 mmCRTC4_CRTC_STEREO_CONTROL 0 0x43ae 0 0 4294967295 mmCRTC5_CRTC_STEREO_CONTROL 0 0x45ae 0 0 4294967295 mmCRTC_SNAPSHOT_STATUS 0 0x1baf 3 0 4294967295 CRTC_SNAPSHOT_OCCURRED 0 0 CRTC_SNAPSHOT_CLEAR 1 1 CRTC_SNAPSHOT_MANUAL_TRIGGER 2 2 mmCRTC0_CRTC_SNAPSHOT_STATUS 0 0x1baf 0 0 4294967295 mmCRTC1_CRTC_SNAPSHOT_STATUS 0 0x1daf 0 0 4294967295 mmCRTC2_CRTC_SNAPSHOT_STATUS 0 0x1faf 0 0 4294967295 mmCRTC3_CRTC_SNAPSHOT_STATUS 0 0x41af 0 0 4294967295 mmCRTC4_CRTC_SNAPSHOT_STATUS 0 0x43af 0 0 4294967295 mmCRTC5_CRTC_SNAPSHOT_STATUS 0 0x45af 0 0 4294967295 mmCRTC_SNAPSHOT_CONTROL 0 0x1bb0 1 0 4294967295 CRTC_AUTO_SNAPSHOT_TRIG_SEL 0 1 mmCRTC0_CRTC_SNAPSHOT_CONTROL 0 0x1bb0 0 0 4294967295 mmCRTC1_CRTC_SNAPSHOT_CONTROL 0 0x1db0 0 0 4294967295 mmCRTC2_CRTC_SNAPSHOT_CONTROL 0 0x1fb0 0 0 4294967295 mmCRTC3_CRTC_SNAPSHOT_CONTROL 0 0x41b0 0 0 4294967295 mmCRTC4_CRTC_SNAPSHOT_CONTROL 0 0x43b0 0 0 4294967295 mmCRTC5_CRTC_SNAPSHOT_CONTROL 0 0x45b0 0 0 4294967295 mmCRTC_SNAPSHOT_POSITION 0 0x1bb1 2 0 4294967295 CRTC_SNAPSHOT_VERT_COUNT 0 13 CRTC_SNAPSHOT_HORZ_COUNT 16 29 mmCRTC0_CRTC_SNAPSHOT_POSITION 0 0x1bb1 0 0 4294967295 mmCRTC1_CRTC_SNAPSHOT_POSITION 0 0x1db1 0 0 4294967295 mmCRTC2_CRTC_SNAPSHOT_POSITION 0 0x1fb1 0 0 4294967295 mmCRTC3_CRTC_SNAPSHOT_POSITION 0 0x41b1 0 0 4294967295 mmCRTC4_CRTC_SNAPSHOT_POSITION 0 0x43b1 0 0 4294967295 mmCRTC5_CRTC_SNAPSHOT_POSITION 0 0x45b1 0 0 4294967295 mmCRTC_SNAPSHOT_FRAME 0 0x1bb2 1 0 4294967295 CRTC_SNAPSHOT_FRAME_COUNT 0 23 mmCRTC0_CRTC_SNAPSHOT_FRAME 0 0x1bb2 0 0 4294967295 mmCRTC1_CRTC_SNAPSHOT_FRAME 0 0x1db2 0 0 4294967295 mmCRTC2_CRTC_SNAPSHOT_FRAME 0 0x1fb2 0 0 4294967295 mmCRTC3_CRTC_SNAPSHOT_FRAME 0 0x41b2 0 0 4294967295 mmCRTC4_CRTC_SNAPSHOT_FRAME 0 0x43b2 0 0 4294967295 mmCRTC5_CRTC_SNAPSHOT_FRAME 0 0x45b2 0 0 4294967295 mmCRTC_START_LINE_CONTROL 0 0x1bb3 5 0 4294967295 CRTC_PROGRESSIVE_START_LINE_EARLY 0 0 CRTC_INTERLACE_START_LINE_EARLY 1 1 CRTC_PREFETCH_EN 2 2 CRTC_LEGACY_REQUESTOR_EN 8 8 CRTC_ADVANCED_START_LINE_POSITION 12 19 mmCRTC0_CRTC_START_LINE_CONTROL 0 0x1bb3 0 0 4294967295 mmCRTC1_CRTC_START_LINE_CONTROL 0 0x1db3 0 0 4294967295 mmCRTC2_CRTC_START_LINE_CONTROL 0 0x1fb3 0 0 4294967295 mmCRTC3_CRTC_START_LINE_CONTROL 0 0x41b3 0 0 4294967295 mmCRTC4_CRTC_START_LINE_CONTROL 0 0x43b3 0 0 4294967295 mmCRTC5_CRTC_START_LINE_CONTROL 0 0x45b3 0 0 4294967295 mmCRTC_INTERRUPT_CONTROL 0 0x1bb4 16 0 4294967295 CRTC_SNAPSHOT_INT_MSK 0 0 CRTC_SNAPSHOT_INT_TYPE 1 1 CRTC_V_UPDATE_INT_MSK 4 4 CRTC_V_UPDATE_INT_TYPE 5 5 CRTC_FORCE_COUNT_NOW_INT_MSK 8 8 CRTC_FORCE_COUNT_NOW_INT_TYPE 9 9 CRTC_FORCE_VSYNC_NEXT_LINE_INT_MSK 16 16 CRTC_FORCE_VSYNC_NEXT_LINE_INT_TYPE 17 17 CRTC_TRIGA_INT_MSK 24 24 CRTC_TRIGB_INT_MSK 25 25 CRTC_TRIGA_INT_TYPE 26 26 CRTC_TRIGB_INT_TYPE 27 27 CRTC_VSYNC_NOM_INT_MSK 28 28 CRTC_VSYNC_NOM_INT_TYPE 29 29 CRTC_GSL_VSYNC_GAP_INT_MSK 30 30 CRTC_GSL_VSYNC_GAP_INT_TYPE 31 31 mmCRTC0_CRTC_INTERRUPT_CONTROL 0 0x1bb4 0 0 4294967295 mmCRTC1_CRTC_INTERRUPT_CONTROL 0 0x1db4 0 0 4294967295 mmCRTC2_CRTC_INTERRUPT_CONTROL 0 0x1fb4 0 0 4294967295 mmCRTC3_CRTC_INTERRUPT_CONTROL 0 0x41b4 0 0 4294967295 mmCRTC4_CRTC_INTERRUPT_CONTROL 0 0x43b4 0 0 4294967295 mmCRTC5_CRTC_INTERRUPT_CONTROL 0 0x45b4 0 0 4294967295 mmCRTC_UPDATE_LOCK 0 0x1bb5 1 0 4294967295 CRTC_UPDATE_LOCK 0 0 mmCRTC0_CRTC_UPDATE_LOCK 0 0x1bb5 0 0 4294967295 mmCRTC1_CRTC_UPDATE_LOCK 0 0x1db5 0 0 4294967295 mmCRTC2_CRTC_UPDATE_LOCK 0 0x1fb5 0 0 4294967295 mmCRTC3_CRTC_UPDATE_LOCK 0 0x41b5 0 0 4294967295 mmCRTC4_CRTC_UPDATE_LOCK 0 0x43b5 0 0 4294967295 mmCRTC5_CRTC_UPDATE_LOCK 0 0x45b5 0 0 4294967295 mmCRTC_DOUBLE_BUFFER_CONTROL 0 0x1bb6 3 0 4294967295 CRTC_UPDATE_PENDING 0 0 CRTC_UPDATE_INSTANTLY 8 8 CRTC_BLANK_DATA_DOUBLE_BUFFER_EN 16 16 mmCRTC0_CRTC_DOUBLE_BUFFER_CONTROL 0 0x1bb6 0 0 4294967295 mmCRTC1_CRTC_DOUBLE_BUFFER_CONTROL 0 0x1db6 0 0 4294967295 mmCRTC2_CRTC_DOUBLE_BUFFER_CONTROL 0 0x1fb6 0 0 4294967295 mmCRTC3_CRTC_DOUBLE_BUFFER_CONTROL 0 0x41b6 0 0 4294967295 mmCRTC4_CRTC_DOUBLE_BUFFER_CONTROL 0 0x43b6 0 0 4294967295 mmCRTC5_CRTC_DOUBLE_BUFFER_CONTROL 0 0x45b6 0 0 4294967295 mmCRTC_VGA_PARAMETER_CAPTURE_MODE 0 0x1bb7 1 0 4294967295 CRTC_VGA_PARAMETER_CAPTURE_MODE 0 0 mmCRTC0_CRTC_VGA_PARAMETER_CAPTURE_MODE 0 0x1bb7 0 0 4294967295 mmCRTC1_CRTC_VGA_PARAMETER_CAPTURE_MODE 0 0x1db7 0 0 4294967295 mmCRTC2_CRTC_VGA_PARAMETER_CAPTURE_MODE 0 0x1fb7 0 0 4294967295 mmCRTC3_CRTC_VGA_PARAMETER_CAPTURE_MODE 0 0x41b7 0 0 4294967295 mmCRTC4_CRTC_VGA_PARAMETER_CAPTURE_MODE 0 0x43b7 0 0 4294967295 mmCRTC5_CRTC_VGA_PARAMETER_CAPTURE_MODE 0 0x45b7 0 0 4294967295 mmCRTC_TEST_PATTERN_CONTROL 0 0x1bba 4 0 4294967295 CRTC_TEST_PATTERN_EN 0 0 CRTC_TEST_PATTERN_MODE 8 10 CRTC_TEST_PATTERN_DYNAMIC_RANGE 16 16 CRTC_TEST_PATTERN_COLOR_FORMAT 24 31 mmCRTC0_CRTC_TEST_PATTERN_CONTROL 0 0x1bba 0 0 4294967295 mmCRTC1_CRTC_TEST_PATTERN_CONTROL 0 0x1dba 0 0 4294967295 mmCRTC2_CRTC_TEST_PATTERN_CONTROL 0 0x1fba 0 0 4294967295 mmCRTC3_CRTC_TEST_PATTERN_CONTROL 0 0x41ba 0 0 4294967295 mmCRTC4_CRTC_TEST_PATTERN_CONTROL 0 0x43ba 0 0 4294967295 mmCRTC5_CRTC_TEST_PATTERN_CONTROL 0 0x45ba 0 0 4294967295 mmCRTC_TEST_PATTERN_PARAMETERS 0 0x1bbb 5 0 4294967295 CRTC_TEST_PATTERN_INC0 0 3 CRTC_TEST_PATTERN_INC1 4 7 CRTC_TEST_PATTERN_VRES 8 11 CRTC_TEST_PATTERN_HRES 12 15 CRTC_TEST_PATTERN_RAMP0_OFFSET 16 31 mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS 0 0x1bbb 0 0 4294967295 mmCRTC1_CRTC_TEST_PATTERN_PARAMETERS 0 0x1dbb 0 0 4294967295 mmCRTC2_CRTC_TEST_PATTERN_PARAMETERS 0 0x1fbb 0 0 4294967295 mmCRTC3_CRTC_TEST_PATTERN_PARAMETERS 0 0x41bb 0 0 4294967295 mmCRTC4_CRTC_TEST_PATTERN_PARAMETERS 0 0x43bb 0 0 4294967295 mmCRTC5_CRTC_TEST_PATTERN_PARAMETERS 0 0x45bb 0 0 4294967295 mmCRTC_TEST_PATTERN_COLOR 0 0x1bbc 2 0 4294967295 CRTC_TEST_PATTERN_DATA 0 15 CRTC_TEST_PATTERN_MASK 16 21 mmCRTC0_CRTC_TEST_PATTERN_COLOR 0 0x1bbc 0 0 4294967295 mmCRTC1_CRTC_TEST_PATTERN_COLOR 0 0x1dbc 0 0 4294967295 mmCRTC2_CRTC_TEST_PATTERN_COLOR 0 0x1fbc 0 0 4294967295 mmCRTC3_CRTC_TEST_PATTERN_COLOR 0 0x41bc 0 0 4294967295 mmCRTC4_CRTC_TEST_PATTERN_COLOR 0 0x43bc 0 0 4294967295 mmCRTC5_CRTC_TEST_PATTERN_COLOR 0 0x45bc 0 0 4294967295 mmCRTC_MASTER_UPDATE_LOCK 0 0x1bbd 3 0 4294967295 MASTER_UPDATE_LOCK 0 0 GSL_CONTROL_MASTER_UPDATE_LOCK 8 8 UNDERFLOW_UPDATE_LOCK 16 16 mmCRTC0_CRTC_MASTER_UPDATE_LOCK 0 0x1bbd 0 0 4294967295 mmCRTC1_CRTC_MASTER_UPDATE_LOCK 0 0x1dbd 0 0 4294967295 mmCRTC2_CRTC_MASTER_UPDATE_LOCK 0 0x1fbd 0 0 4294967295 mmCRTC3_CRTC_MASTER_UPDATE_LOCK 0 0x41bd 0 0 4294967295 mmCRTC4_CRTC_MASTER_UPDATE_LOCK 0 0x43bd 0 0 4294967295 mmCRTC5_CRTC_MASTER_UPDATE_LOCK 0 0x45bd 0 0 4294967295 mmCRTC_MASTER_UPDATE_MODE 0 0x1bbe 2 0 4294967295 MASTER_UPDATE_MODE 0 2 MASTER_UPDATE_INTERLACED_MODE 16 17 mmCRTC0_CRTC_MASTER_UPDATE_MODE 0 0x1bbe 0 0 4294967295 mmCRTC1_CRTC_MASTER_UPDATE_MODE 0 0x1dbe 0 0 4294967295 mmCRTC2_CRTC_MASTER_UPDATE_MODE 0 0x1fbe 0 0 4294967295 mmCRTC3_CRTC_MASTER_UPDATE_MODE 0 0x41be 0 0 4294967295 mmCRTC4_CRTC_MASTER_UPDATE_MODE 0 0x43be 0 0 4294967295 mmCRTC5_CRTC_MASTER_UPDATE_MODE 0 0x45be 0 0 4294967295 mmCRTC_MVP_INBAND_CNTL_INSERT 0 0x1bbf 2 0 4294967295 CRTC_MVP_INBAND_OUT_MODE 0 1 CRTC_MVP_INBAND_CNTL_CHAR_INSERT 8 31 mmCRTC0_CRTC_MVP_INBAND_CNTL_INSERT 0 0x1bbf 0 0 4294967295 mmCRTC1_CRTC_MVP_INBAND_CNTL_INSERT 0 0x1dbf 0 0 4294967295 mmCRTC2_CRTC_MVP_INBAND_CNTL_INSERT 0 0x1fbf 0 0 4294967295 mmCRTC3_CRTC_MVP_INBAND_CNTL_INSERT 0 0x41bf 0 0 4294967295 mmCRTC4_CRTC_MVP_INBAND_CNTL_INSERT 0 0x43bf 0 0 4294967295 mmCRTC5_CRTC_MVP_INBAND_CNTL_INSERT 0 0x45bf 0 0 4294967295 mmCRTC_MVP_INBAND_CNTL_INSERT_TIMER 0 0x1bc0 1 0 4294967295 CRTC_MVP_INBAND_CNTL_CHAR_INSERT_TIMER 0 7 mmCRTC0_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0 0x1bc0 0 0 4294967295 mmCRTC1_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0 0x1dc0 0 0 4294967295 mmCRTC2_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0 0x1fc0 0 0 4294967295 mmCRTC3_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0 0x41c0 0 0 4294967295 mmCRTC4_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0 0x43c0 0 0 4294967295 mmCRTC5_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0 0x45c0 0 0 4294967295 mmCRTC_MVP_STATUS 0 0x1bc1 4 0 4294967295 CRTC_FLIP_NOW_OCCURRED 0 0 CRTC_AFR_HSYNC_SWITCH_DONE_OCCURRED 4 4 CRTC_FLIP_NOW_CLEAR 16 16 CRTC_AFR_HSYNC_SWITCH_DONE_CLEAR 20 20 mmCRTC0_CRTC_MVP_STATUS 0 0x1bc1 0 0 4294967295 mmCRTC1_CRTC_MVP_STATUS 0 0x1dc1 0 0 4294967295 mmCRTC2_CRTC_MVP_STATUS 0 0x1fc1 0 0 4294967295 mmCRTC3_CRTC_MVP_STATUS 0 0x41c1 0 0 4294967295 mmCRTC4_CRTC_MVP_STATUS 0 0x43c1 0 0 4294967295 mmCRTC5_CRTC_MVP_STATUS 0 0x45c1 0 0 4294967295 mmCRTC_MASTER_EN 0 0x1bc2 1 0 4294967295 CRTC_MASTER_EN 0 0 mmCRTC0_CRTC_MASTER_EN 0 0x1bc2 0 0 4294967295 mmCRTC1_CRTC_MASTER_EN 0 0x1dc2 0 0 4294967295 mmCRTC2_CRTC_MASTER_EN 0 0x1fc2 0 0 4294967295 mmCRTC3_CRTC_MASTER_EN 0 0x41c2 0 0 4294967295 mmCRTC4_CRTC_MASTER_EN 0 0x43c2 0 0 4294967295 mmCRTC5_CRTC_MASTER_EN 0 0x45c2 0 0 4294967295 mmCRTC_ALLOW_STOP_OFF_V_CNT 0 0x1bc3 2 0 4294967295 CRTC_ALLOW_STOP_OFF_V_CNT 0 7 CRTC_DISABLE_ALLOW_STOP_OFF_V_CNT 16 16 mmCRTC0_CRTC_ALLOW_STOP_OFF_V_CNT 0 0x1bc3 0 0 4294967295 mmCRTC1_CRTC_ALLOW_STOP_OFF_V_CNT 0 0x1dc3 0 0 4294967295 mmCRTC2_CRTC_ALLOW_STOP_OFF_V_CNT 0 0x1fc3 0 0 4294967295 mmCRTC3_CRTC_ALLOW_STOP_OFF_V_CNT 0 0x41c3 0 0 4294967295 mmCRTC4_CRTC_ALLOW_STOP_OFF_V_CNT 0 0x43c3 0 0 4294967295 mmCRTC5_CRTC_ALLOW_STOP_OFF_V_CNT 0 0x45c3 0 0 4294967295 mmCRTC_V_UPDATE_INT_STATUS 0 0x1bc4 2 0 4294967295 CRTC_V_UPDATE_INT_OCCURRED 0 0 CRTC_V_UPDATE_INT_CLEAR 8 8 mmCRTC0_CRTC_V_UPDATE_INT_STATUS 0 0x1bc4 0 0 4294967295 mmCRTC1_CRTC_V_UPDATE_INT_STATUS 0 0x1dc4 0 0 4294967295 mmCRTC2_CRTC_V_UPDATE_INT_STATUS 0 0x1fc4 0 0 4294967295 mmCRTC3_CRTC_V_UPDATE_INT_STATUS 0 0x41c4 0 0 4294967295 mmCRTC4_CRTC_V_UPDATE_INT_STATUS 0 0x43c4 0 0 4294967295 mmCRTC5_CRTC_V_UPDATE_INT_STATUS 0 0x45c4 0 0 4294967295 mmCRTC_OVERSCAN_COLOR 0 0x1bc8 3 0 4294967295 CRTC_OVERSCAN_COLOR_BLUE 0 9 CRTC_OVERSCAN_COLOR_GREEN 10 19 CRTC_OVERSCAN_COLOR_RED 20 29 mmCRTC0_CRTC_OVERSCAN_COLOR 0 0x1bc8 0 0 4294967295 mmCRTC1_CRTC_OVERSCAN_COLOR 0 0x1dc8 0 0 4294967295 mmCRTC2_CRTC_OVERSCAN_COLOR 0 0x1fc8 0 0 4294967295 mmCRTC3_CRTC_OVERSCAN_COLOR 0 0x41c8 0 0 4294967295 mmCRTC4_CRTC_OVERSCAN_COLOR 0 0x43c8 0 0 4294967295 mmCRTC5_CRTC_OVERSCAN_COLOR 0 0x45c8 0 0 4294967295 mmCRTC_OVERSCAN_COLOR_EXT 0 0x1bc9 3 0 4294967295 CRTC_OVERSCAN_COLOR_BLUE_EXT 0 1 CRTC_OVERSCAN_COLOR_GREEN_EXT 8 9 CRTC_OVERSCAN_COLOR_RED_EXT 16 17 mmCRTC0_CRTC_OVERSCAN_COLOR_EXT 0 0x1bc9 0 0 4294967295 mmCRTC1_CRTC_OVERSCAN_COLOR_EXT 0 0x1dc9 0 0 4294967295 mmCRTC2_CRTC_OVERSCAN_COLOR_EXT 0 0x1fc9 0 0 4294967295 mmCRTC3_CRTC_OVERSCAN_COLOR_EXT 0 0x41c9 0 0 4294967295 mmCRTC4_CRTC_OVERSCAN_COLOR_EXT 0 0x43c9 0 0 4294967295 mmCRTC5_CRTC_OVERSCAN_COLOR_EXT 0 0x45c9 0 0 4294967295 mmCRTC_BLANK_DATA_COLOR 0 0x1bca 3 0 4294967295 CRTC_BLANK_DATA_COLOR_BLUE_CB 0 9 CRTC_BLANK_DATA_COLOR_GREEN_Y 10 19 CRTC_BLANK_DATA_COLOR_RED_CR 20 29 mmCRTC0_CRTC_BLANK_DATA_COLOR 0 0x1bca 0 0 4294967295 mmCRTC1_CRTC_BLANK_DATA_COLOR 0 0x1dca 0 0 4294967295 mmCRTC2_CRTC_BLANK_DATA_COLOR 0 0x1fca 0 0 4294967295 mmCRTC3_CRTC_BLANK_DATA_COLOR 0 0x41ca 0 0 4294967295 mmCRTC4_CRTC_BLANK_DATA_COLOR 0 0x43ca 0 0 4294967295 mmCRTC5_CRTC_BLANK_DATA_COLOR 0 0x45ca 0 0 4294967295 mmCRTC_BLANK_DATA_COLOR_EXT 0 0x1bcb 3 0 4294967295 CRTC_BLANK_DATA_COLOR_BLUE_CB_EXT 0 1 CRTC_BLANK_DATA_COLOR_GREEN_Y_EXT 8 9 CRTC_BLANK_DATA_COLOR_RED_CR_EXT 16 17 mmCRTC0_CRTC_BLANK_DATA_COLOR_EXT 0 0x1bcb 0 0 4294967295 mmCRTC1_CRTC_BLANK_DATA_COLOR_EXT 0 0x1dcb 0 0 4294967295 mmCRTC2_CRTC_BLANK_DATA_COLOR_EXT 0 0x1fcb 0 0 4294967295 mmCRTC3_CRTC_BLANK_DATA_COLOR_EXT 0 0x41cb 0 0 4294967295 mmCRTC4_CRTC_BLANK_DATA_COLOR_EXT 0 0x43cb 0 0 4294967295 mmCRTC5_CRTC_BLANK_DATA_COLOR_EXT 0 0x45cb 0 0 4294967295 mmCRTC_BLACK_COLOR 0 0x1bcc 3 0 4294967295 CRTC_BLACK_COLOR_B_CB 0 9 CRTC_BLACK_COLOR_G_Y 10 19 CRTC_BLACK_COLOR_R_CR 20 29 mmCRTC0_CRTC_BLACK_COLOR 0 0x1bcc 0 0 4294967295 mmCRTC1_CRTC_BLACK_COLOR 0 0x1dcc 0 0 4294967295 mmCRTC2_CRTC_BLACK_COLOR 0 0x1fcc 0 0 4294967295 mmCRTC3_CRTC_BLACK_COLOR 0 0x41cc 0 0 4294967295 mmCRTC4_CRTC_BLACK_COLOR 0 0x43cc 0 0 4294967295 mmCRTC5_CRTC_BLACK_COLOR 0 0x45cc 0 0 4294967295 mmCRTC_BLACK_COLOR_EXT 0 0x1bcd 3 0 4294967295 CRTC_BLACK_COLOR_B_CB_EXT 0 1 CRTC_BLACK_COLOR_G_Y_EXT 8 9 CRTC_BLACK_COLOR_R_CR_EXT 16 17 mmCRTC0_CRTC_BLACK_COLOR_EXT 0 0x1bcd 0 0 4294967295 mmCRTC1_CRTC_BLACK_COLOR_EXT 0 0x1dcd 0 0 4294967295 mmCRTC2_CRTC_BLACK_COLOR_EXT 0 0x1fcd 0 0 4294967295 mmCRTC3_CRTC_BLACK_COLOR_EXT 0 0x41cd 0 0 4294967295 mmCRTC4_CRTC_BLACK_COLOR_EXT 0 0x43cd 0 0 4294967295 mmCRTC5_CRTC_BLACK_COLOR_EXT 0 0x45cd 0 0 4294967295 mmCRTC_VERTICAL_INTERRUPT0_POSITION 0 0x1bce 2 0 4294967295 CRTC_VERTICAL_INTERRUPT0_LINE_START 0 13 CRTC_VERTICAL_INTERRUPT0_LINE_END 16 29 mmCRTC0_CRTC_VERTICAL_INTERRUPT0_POSITION 0 0x1bce 0 0 4294967295 mmCRTC1_CRTC_VERTICAL_INTERRUPT0_POSITION 0 0x1dce 0 0 4294967295 mmCRTC2_CRTC_VERTICAL_INTERRUPT0_POSITION 0 0x1fce 0 0 4294967295 mmCRTC3_CRTC_VERTICAL_INTERRUPT0_POSITION 0 0x41ce 0 0 4294967295 mmCRTC4_CRTC_VERTICAL_INTERRUPT0_POSITION 0 0x43ce 0 0 4294967295 mmCRTC5_CRTC_VERTICAL_INTERRUPT0_POSITION 0 0x45ce 0 0 4294967295 mmCRTC_VERTICAL_INTERRUPT0_CONTROL 0 0x1bcf 6 0 4294967295 CRTC_VERTICAL_INTERRUPT0_OUTPUT_POLARITY 4 4 CRTC_VERTICAL_INTERRUPT0_INT_ENABLE 8 8 CRTC_VERTICAL_INTERRUPT0_STATUS 12 12 CRTC_VERTICAL_INTERRUPT0_INT_STATUS 16 16 CRTC_VERTICAL_INTERRUPT0_CLEAR 20 20 CRTC_VERTICAL_INTERRUPT0_INT_TYPE 24 24 mmCRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL 0 0x1bcf 0 0 4294967295 mmCRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL 0 0x1dcf 0 0 4294967295 mmCRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL 0 0x1fcf 0 0 4294967295 mmCRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL 0 0x41cf 0 0 4294967295 mmCRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL 0 0x43cf 0 0 4294967295 mmCRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL 0 0x45cf 0 0 4294967295 mmCRTC_VERTICAL_INTERRUPT1_POSITION 0 0x1bd0 1 0 4294967295 CRTC_VERTICAL_INTERRUPT1_LINE_START 0 13 mmCRTC0_CRTC_VERTICAL_INTERRUPT1_POSITION 0 0x1bd0 0 0 4294967295 mmCRTC1_CRTC_VERTICAL_INTERRUPT1_POSITION 0 0x1dd0 0 0 4294967295 mmCRTC2_CRTC_VERTICAL_INTERRUPT1_POSITION 0 0x1fd0 0 0 4294967295 mmCRTC3_CRTC_VERTICAL_INTERRUPT1_POSITION 0 0x41d0 0 0 4294967295 mmCRTC4_CRTC_VERTICAL_INTERRUPT1_POSITION 0 0x43d0 0 0 4294967295 mmCRTC5_CRTC_VERTICAL_INTERRUPT1_POSITION 0 0x45d0 0 0 4294967295 mmCRTC_VERTICAL_INTERRUPT1_CONTROL 0 0x1bd1 5 0 4294967295 CRTC_VERTICAL_INTERRUPT1_INT_ENABLE 8 8 CRTC_VERTICAL_INTERRUPT1_STATUS 12 12 CRTC_VERTICAL_INTERRUPT1_INT_STATUS 16 16 CRTC_VERTICAL_INTERRUPT1_CLEAR 20 20 CRTC_VERTICAL_INTERRUPT1_INT_TYPE 24 24 mmCRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL 0 0x1bd1 0 0 4294967295 mmCRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL 0 0x1dd1 0 0 4294967295 mmCRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL 0 0x1fd1 0 0 4294967295 mmCRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL 0 0x41d1 0 0 4294967295 mmCRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL 0 0x43d1 0 0 4294967295 mmCRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL 0 0x45d1 0 0 4294967295 mmCRTC_VERTICAL_INTERRUPT2_POSITION 0 0x1bd2 1 0 4294967295 CRTC_VERTICAL_INTERRUPT2_LINE_START 0 13 mmCRTC0_CRTC_VERTICAL_INTERRUPT2_POSITION 0 0x1bd2 0 0 4294967295 mmCRTC1_CRTC_VERTICAL_INTERRUPT2_POSITION 0 0x1dd2 0 0 4294967295 mmCRTC2_CRTC_VERTICAL_INTERRUPT2_POSITION 0 0x1fd2 0 0 4294967295 mmCRTC3_CRTC_VERTICAL_INTERRUPT2_POSITION 0 0x41d2 0 0 4294967295 mmCRTC4_CRTC_VERTICAL_INTERRUPT2_POSITION 0 0x43d2 0 0 4294967295 mmCRTC5_CRTC_VERTICAL_INTERRUPT2_POSITION 0 0x45d2 0 0 4294967295 mmCRTC_VERTICAL_INTERRUPT2_CONTROL 0 0x1bd3 5 0 4294967295 CRTC_VERTICAL_INTERRUPT2_INT_ENABLE 8 8 CRTC_VERTICAL_INTERRUPT2_STATUS 12 12 CRTC_VERTICAL_INTERRUPT2_INT_STATUS 16 16 CRTC_VERTICAL_INTERRUPT2_CLEAR 20 20 CRTC_VERTICAL_INTERRUPT2_INT_TYPE 24 24 mmCRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL 0 0x1bd3 0 0 4294967295 mmCRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL 0 0x1dd3 0 0 4294967295 mmCRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL 0 0x1fd3 0 0 4294967295 mmCRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL 0 0x41d3 0 0 4294967295 mmCRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL 0 0x43d3 0 0 4294967295 mmCRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL 0 0x45d3 0 0 4294967295 mmCRTC_CRC_CNTL 0 0x1bd4 7 0 4294967295 CRTC_CRC_EN 0 0 CRTC_CRC_CONT_EN 4 4 CRTC_CRC_STEREO_MODE 8 9 CRTC_CRC_INTERLACE_MODE 12 13 CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS 16 16 CRTC_CRC0_SELECT 20 22 CRTC_CRC1_SELECT 24 26 mmCRTC0_CRTC_CRC_CNTL 0 0x1bd4 0 0 4294967295 mmCRTC1_CRTC_CRC_CNTL 0 0x1dd4 0 0 4294967295 mmCRTC2_CRTC_CRC_CNTL 0 0x1fd4 0 0 4294967295 mmCRTC3_CRTC_CRC_CNTL 0 0x41d4 0 0 4294967295 mmCRTC4_CRTC_CRC_CNTL 0 0x43d4 0 0 4294967295 mmCRTC5_CRTC_CRC_CNTL 0 0x45d4 0 0 4294967295 mmCRTC_CRC0_WINDOWA_X_CONTROL 0 0x1bd5 2 0 4294967295 CRTC_CRC0_WINDOWA_X_START 0 13 CRTC_CRC0_WINDOWA_X_END 16 29 mmCRTC0_CRTC_CRC0_WINDOWA_X_CONTROL 0 0x1bd5 0 0 4294967295 mmCRTC1_CRTC_CRC0_WINDOWA_X_CONTROL 0 0x1dd5 0 0 4294967295 mmCRTC2_CRTC_CRC0_WINDOWA_X_CONTROL 0 0x1fd5 0 0 4294967295 mmCRTC3_CRTC_CRC0_WINDOWA_X_CONTROL 0 0x41d5 0 0 4294967295 mmCRTC4_CRTC_CRC0_WINDOWA_X_CONTROL 0 0x43d5 0 0 4294967295 mmCRTC5_CRTC_CRC0_WINDOWA_X_CONTROL 0 0x45d5 0 0 4294967295 mmCRTC_CRC0_WINDOWA_Y_CONTROL 0 0x1bd6 2 0 4294967295 CRTC_CRC0_WINDOWA_Y_START 0 13 CRTC_CRC0_WINDOWA_Y_END 16 29 mmCRTC0_CRTC_CRC0_WINDOWA_Y_CONTROL 0 0x1bd6 0 0 4294967295 mmCRTC1_CRTC_CRC0_WINDOWA_Y_CONTROL 0 0x1dd6 0 0 4294967295 mmCRTC2_CRTC_CRC0_WINDOWA_Y_CONTROL 0 0x1fd6 0 0 4294967295 mmCRTC3_CRTC_CRC0_WINDOWA_Y_CONTROL 0 0x41d6 0 0 4294967295 mmCRTC4_CRTC_CRC0_WINDOWA_Y_CONTROL 0 0x43d6 0 0 4294967295 mmCRTC5_CRTC_CRC0_WINDOWA_Y_CONTROL 0 0x45d6 0 0 4294967295 mmCRTC_CRC0_WINDOWB_X_CONTROL 0 0x1bd7 2 0 4294967295 CRTC_CRC0_WINDOWB_X_START 0 13 CRTC_CRC0_WINDOWB_X_END 16 29 mmCRTC0_CRTC_CRC0_WINDOWB_X_CONTROL 0 0x1bd7 0 0 4294967295 mmCRTC1_CRTC_CRC0_WINDOWB_X_CONTROL 0 0x1dd7 0 0 4294967295 mmCRTC2_CRTC_CRC0_WINDOWB_X_CONTROL 0 0x1fd7 0 0 4294967295 mmCRTC3_CRTC_CRC0_WINDOWB_X_CONTROL 0 0x41d7 0 0 4294967295 mmCRTC4_CRTC_CRC0_WINDOWB_X_CONTROL 0 0x43d7 0 0 4294967295 mmCRTC5_CRTC_CRC0_WINDOWB_X_CONTROL 0 0x45d7 0 0 4294967295 mmCRTC_CRC0_WINDOWB_Y_CONTROL 0 0x1bd8 2 0 4294967295 CRTC_CRC0_WINDOWB_Y_START 0 13 CRTC_CRC0_WINDOWB_Y_END 16 29 mmCRTC0_CRTC_CRC0_WINDOWB_Y_CONTROL 0 0x1bd8 0 0 4294967295 mmCRTC1_CRTC_CRC0_WINDOWB_Y_CONTROL 0 0x1dd8 0 0 4294967295 mmCRTC2_CRTC_CRC0_WINDOWB_Y_CONTROL 0 0x1fd8 0 0 4294967295 mmCRTC3_CRTC_CRC0_WINDOWB_Y_CONTROL 0 0x41d8 0 0 4294967295 mmCRTC4_CRTC_CRC0_WINDOWB_Y_CONTROL 0 0x43d8 0 0 4294967295 mmCRTC5_CRTC_CRC0_WINDOWB_Y_CONTROL 0 0x45d8 0 0 4294967295 mmCRTC_CRC0_DATA_RG 0 0x1bd9 2 0 4294967295 CRC0_R_CR 0 15 CRC0_G_Y 16 31 mmCRTC0_CRTC_CRC0_DATA_RG 0 0x1bd9 0 0 4294967295 mmCRTC1_CRTC_CRC0_DATA_RG 0 0x1dd9 0 0 4294967295 mmCRTC2_CRTC_CRC0_DATA_RG 0 0x1fd9 0 0 4294967295 mmCRTC3_CRTC_CRC0_DATA_RG 0 0x41d9 0 0 4294967295 mmCRTC4_CRTC_CRC0_DATA_RG 0 0x43d9 0 0 4294967295 mmCRTC5_CRTC_CRC0_DATA_RG 0 0x45d9 0 0 4294967295 mmCRTC_CRC0_DATA_B 0 0x1bda 1 0 4294967295 CRC0_B_CB 0 15 mmCRTC0_CRTC_CRC0_DATA_B 0 0x1bda 0 0 4294967295 mmCRTC1_CRTC_CRC0_DATA_B 0 0x1dda 0 0 4294967295 mmCRTC2_CRTC_CRC0_DATA_B 0 0x1fda 0 0 4294967295 mmCRTC3_CRTC_CRC0_DATA_B 0 0x41da 0 0 4294967295 mmCRTC4_CRTC_CRC0_DATA_B 0 0x43da 0 0 4294967295 mmCRTC5_CRTC_CRC0_DATA_B 0 0x45da 0 0 4294967295 mmCRTC_CRC1_WINDOWA_X_CONTROL 0 0x1bdb 2 0 4294967295 CRTC_CRC1_WINDOWA_X_START 0 13 CRTC_CRC1_WINDOWA_X_END 16 29 mmCRTC0_CRTC_CRC1_WINDOWA_X_CONTROL 0 0x1bdb 0 0 4294967295 mmCRTC1_CRTC_CRC1_WINDOWA_X_CONTROL 0 0x1ddb 0 0 4294967295 mmCRTC2_CRTC_CRC1_WINDOWA_X_CONTROL 0 0x1fdb 0 0 4294967295 mmCRTC3_CRTC_CRC1_WINDOWA_X_CONTROL 0 0x41db 0 0 4294967295 mmCRTC4_CRTC_CRC1_WINDOWA_X_CONTROL 0 0x43db 0 0 4294967295 mmCRTC5_CRTC_CRC1_WINDOWA_X_CONTROL 0 0x45db 0 0 4294967295 mmCRTC_CRC1_WINDOWA_Y_CONTROL 0 0x1bdc 2 0 4294967295 CRTC_CRC1_WINDOWA_Y_START 0 13 CRTC_CRC1_WINDOWA_Y_END 16 29 mmCRTC0_CRTC_CRC1_WINDOWA_Y_CONTROL 0 0x1bdc 0 0 4294967295 mmCRTC1_CRTC_CRC1_WINDOWA_Y_CONTROL 0 0x1ddc 0 0 4294967295 mmCRTC2_CRTC_CRC1_WINDOWA_Y_CONTROL 0 0x1fdc 0 0 4294967295 mmCRTC3_CRTC_CRC1_WINDOWA_Y_CONTROL 0 0x41dc 0 0 4294967295 mmCRTC4_CRTC_CRC1_WINDOWA_Y_CONTROL 0 0x43dc 0 0 4294967295 mmCRTC5_CRTC_CRC1_WINDOWA_Y_CONTROL 0 0x45dc 0 0 4294967295 mmCRTC_CRC1_WINDOWB_X_CONTROL 0 0x1bdd 2 0 4294967295 CRTC_CRC1_WINDOWB_X_START 0 13 CRTC_CRC1_WINDOWB_X_END 16 29 mmCRTC0_CRTC_CRC1_WINDOWB_X_CONTROL 0 0x1bdd 0 0 4294967295 mmCRTC1_CRTC_CRC1_WINDOWB_X_CONTROL 0 0x1ddd 0 0 4294967295 mmCRTC2_CRTC_CRC1_WINDOWB_X_CONTROL 0 0x1fdd 0 0 4294967295 mmCRTC3_CRTC_CRC1_WINDOWB_X_CONTROL 0 0x41dd 0 0 4294967295 mmCRTC4_CRTC_CRC1_WINDOWB_X_CONTROL 0 0x43dd 0 0 4294967295 mmCRTC5_CRTC_CRC1_WINDOWB_X_CONTROL 0 0x45dd 0 0 4294967295 mmCRTC_CRC1_WINDOWB_Y_CONTROL 0 0x1bde 2 0 4294967295 CRTC_CRC1_WINDOWB_Y_START 0 13 CRTC_CRC1_WINDOWB_Y_END 16 29 mmCRTC0_CRTC_CRC1_WINDOWB_Y_CONTROL 0 0x1bde 0 0 4294967295 mmCRTC1_CRTC_CRC1_WINDOWB_Y_CONTROL 0 0x1dde 0 0 4294967295 mmCRTC2_CRTC_CRC1_WINDOWB_Y_CONTROL 0 0x1fde 0 0 4294967295 mmCRTC3_CRTC_CRC1_WINDOWB_Y_CONTROL 0 0x41de 0 0 4294967295 mmCRTC4_CRTC_CRC1_WINDOWB_Y_CONTROL 0 0x43de 0 0 4294967295 mmCRTC5_CRTC_CRC1_WINDOWB_Y_CONTROL 0 0x45de 0 0 4294967295 mmCRTC_CRC1_DATA_RG 0 0x1bdf 2 0 4294967295 CRC1_R_CR 0 15 CRC1_G_Y 16 31 mmCRTC0_CRTC_CRC1_DATA_RG 0 0x1bdf 0 0 4294967295 mmCRTC1_CRTC_CRC1_DATA_RG 0 0x1ddf 0 0 4294967295 mmCRTC2_CRTC_CRC1_DATA_RG 0 0x1fdf 0 0 4294967295 mmCRTC3_CRTC_CRC1_DATA_RG 0 0x41df 0 0 4294967295 mmCRTC4_CRTC_CRC1_DATA_RG 0 0x43df 0 0 4294967295 mmCRTC5_CRTC_CRC1_DATA_RG 0 0x45df 0 0 4294967295 mmCRTC_CRC1_DATA_B 0 0x1be0 1 0 4294967295 CRC1_B_CB 0 15 mmCRTC0_CRTC_CRC1_DATA_B 0 0x1be0 0 0 4294967295 mmCRTC1_CRTC_CRC1_DATA_B 0 0x1de0 0 0 4294967295 mmCRTC2_CRTC_CRC1_DATA_B 0 0x1fe0 0 0 4294967295 mmCRTC3_CRTC_CRC1_DATA_B 0 0x41e0 0 0 4294967295 mmCRTC4_CRTC_CRC1_DATA_B 0 0x43e0 0 0 4294967295 mmCRTC5_CRTC_CRC1_DATA_B 0 0x45e0 0 0 4294967295 mmCRTC_EXT_TIMING_SYNC_CONTROL 0 0x1be1 11 0 4294967295 CRTC_EXT_TIMING_SYNC_ENABLE 0 1 CRTC_EXT_TIMING_SYNC_HCOUNT_MODE_ENABLE 3 3 CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_ENABLE 4 4 CRTC_EXT_TIMING_SYNC_JITTER_FILTERING_WINDOW 5 6 CRTC_EXT_TIMING_SYNC_WINDOW_ENABLE 8 8 CRTC_EXT_TIMING_SYNC_WINDOW_UPDATE 9 9 CRTC_EXT_TIMING_SYNC_VSYNC_POLARITY 12 12 CRTC_EXT_TIMING_SYNC_HSYNC_POLARITY 13 13 CRTC_EXT_TIMING_SYNC_INTERLACE_MODE 14 14 CRTC_EXT_TIMING_SYNC_MASTER_FRAME_RATE 24 26 CRTC_EXT_TIMING_SYNC_SLAVE_FRAME_RATE 28 30 mmCRTC0_CRTC_EXT_TIMING_SYNC_CONTROL 0 0x1be1 0 0 4294967295 mmCRTC1_CRTC_EXT_TIMING_SYNC_CONTROL 0 0x1de1 0 0 4294967295 mmCRTC2_CRTC_EXT_TIMING_SYNC_CONTROL 0 0x1fe1 0 0 4294967295 mmCRTC3_CRTC_EXT_TIMING_SYNC_CONTROL 0 0x41e1 0 0 4294967295 mmCRTC4_CRTC_EXT_TIMING_SYNC_CONTROL 0 0x43e1 0 0 4294967295 mmCRTC5_CRTC_EXT_TIMING_SYNC_CONTROL 0 0x45e1 0 0 4294967295 mmCRTC_EXT_TIMING_SYNC_WINDOW_START 0 0x1be2 2 0 4294967295 CRTC_EXT_TIMING_SYNC_WINDOW_START_X 0 13 CRTC_EXT_TIMING_SYNC_WINDOW_START_Y 16 29 mmCRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_START 0 0x1be2 0 0 4294967295 mmCRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_START 0 0x1de2 0 0 4294967295 mmCRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_START 0 0x1fe2 0 0 4294967295 mmCRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_START 0 0x41e2 0 0 4294967295 mmCRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_START 0 0x43e2 0 0 4294967295 mmCRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_START 0 0x45e2 0 0 4294967295 mmCRTC_EXT_TIMING_SYNC_WINDOW_END 0 0x1be3 2 0 4294967295 CRTC_EXT_TIMING_SYNC_WINDOW_END_X 0 13 CRTC_EXT_TIMING_SYNC_WINDOW_END_Y 16 29 mmCRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_END 0 0x1be3 0 0 4294967295 mmCRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_END 0 0x1de3 0 0 4294967295 mmCRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_END 0 0x1fe3 0 0 4294967295 mmCRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_END 0 0x41e3 0 0 4294967295 mmCRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_END 0 0x43e3 0 0 4294967295 mmCRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_END 0 0x45e3 0 0 4294967295 mmCRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL 0 0x1be4 6 0 4294967295 CRTC_EXT_TIMING_SYNC_LOSS_INT_ENABLE 0 0 CRTC_EXT_TIMING_SYNC_LOSS_STATUS 4 4 CRTC_EXT_TIMING_SYNC_LOSS_INT_STATUS 8 8 CRTC_EXT_TIMING_SYNC_LOSS_CLEAR 16 16 CRTC_EXT_TIMING_SYNC_LOSS_INT_TYPE 20 20 CRTC_EXT_TIMING_SYNC_LOSS_FRAME_COUNT 29 31 mmCRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL 0 0x1be4 0 0 4294967295 mmCRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL 0 0x1de4 0 0 4294967295 mmCRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL 0 0x1fe4 0 0 4294967295 mmCRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL 0 0x41e4 0 0 4294967295 mmCRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL 0 0x43e4 0 0 4294967295 mmCRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL 0 0x45e4 0 0 4294967295 mmCRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL 0 0x1be5 5 0 4294967295 CRTC_EXT_TIMING_SYNC_INT_ENABLE 0 0 CRTC_EXT_TIMING_SYNC_STATUS 4 4 CRTC_EXT_TIMING_SYNC_INT_STATUS 8 8 CRTC_EXT_TIMING_SYNC_CLEAR 16 16 CRTC_EXT_TIMING_SYNC_INT_TYPE 20 20 mmCRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL 0 0x1be5 0 0 4294967295 mmCRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL 0 0x1de5 0 0 4294967295 mmCRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL 0 0x1fe5 0 0 4294967295 mmCRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL 0 0x41e5 0 0 4294967295 mmCRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL 0 0x43e5 0 0 4294967295 mmCRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL 0 0x45e5 0 0 4294967295 mmCRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL 0 0x1be6 5 0 4294967295 CRTC_EXT_TIMING_SYNC_SIGNAL_INT_ENABLE 0 0 CRTC_EXT_TIMING_SYNC_SIGNAL_STATUS 4 4 CRTC_EXT_TIMING_SYNC_SIGNAL_INT_STATUS 8 8 CRTC_EXT_TIMING_SYNC_SIGNAL_CLEAR 16 16 CRTC_EXT_TIMING_SYNC_SIGNAL_INT_TYPE 20 20 mmCRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL 0 0x1be6 0 0 4294967295 mmCRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL 0 0x1de6 0 0 4294967295 mmCRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL 0 0x1fe6 0 0 4294967295 mmCRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL 0 0x41e6 0 0 4294967295 mmCRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL 0 0x43e6 0 0 4294967295 mmCRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL 0 0x45e6 0 0 4294967295 mmCRTC_STATIC_SCREEN_CONTROL 0 0x1be7 9 0 4294967295 CRTC_STATIC_SCREEN_EVENT_MASK 0 15 CRTC_STATIC_SCREEN_FRAME_COUNT 16 23 CRTC_CPU_SS_INT_ENABLE 24 24 CRTC_SS_STATUS 25 25 CRTC_CPU_SS_INT_STATUS 26 26 CRTC_CPU_SS_INT_CLEAR 27 27 CRTC_CPU_SS_INT_TYPE 28 28 CRTC_STATIC_SCREEN_OVERRIDE 30 30 CRTC_STATIC_SCREEN_OVERRIDE_VALUE 31 31 mmCRTC0_CRTC_STATIC_SCREEN_CONTROL 0 0x1be7 0 0 4294967295 mmCRTC1_CRTC_STATIC_SCREEN_CONTROL 0 0x1de7 0 0 4294967295 mmCRTC2_CRTC_STATIC_SCREEN_CONTROL 0 0x1fe7 0 0 4294967295 mmCRTC3_CRTC_STATIC_SCREEN_CONTROL 0 0x41e7 0 0 4294967295 mmCRTC4_CRTC_STATIC_SCREEN_CONTROL 0 0x43e7 0 0 4294967295 mmCRTC5_CRTC_STATIC_SCREEN_CONTROL 0 0x45e7 0 0 4294967295 mmCRTC_3D_STRUCTURE_CONTROL 0 0x1b78 7 0 4294967295 CRTC_3D_STRUCTURE_EN 0 0 CRTC_3D_STRUCTURE_EN_DB 4 4 CRTC_3D_STRUCTURE_V_UPDATE_MODE 8 9 CRTC_3D_STRUCTURE_STEREO_SEL_OVR 12 12 CRTC_3D_STRUCTURE_F_COUNT_RESET 16 16 CRTC_3D_STRUCTURE_F_COUNT_RESET_PENDING 17 17 CRTC_3D_STRUCTURE_F_COUNT 18 19 mmCRTC0_CRTC_3D_STRUCTURE_CONTROL 0 0x1b78 0 0 4294967295 mmCRTC1_CRTC_3D_STRUCTURE_CONTROL 0 0x1d78 0 0 4294967295 mmCRTC2_CRTC_3D_STRUCTURE_CONTROL 0 0x1f78 0 0 4294967295 mmCRTC3_CRTC_3D_STRUCTURE_CONTROL 0 0x4178 0 0 4294967295 mmCRTC4_CRTC_3D_STRUCTURE_CONTROL 0 0x4378 0 0 4294967295 mmCRTC5_CRTC_3D_STRUCTURE_CONTROL 0 0x4578 0 0 4294967295 mmCRTC_GSL_VSYNC_GAP 0 0x1b79 8 0 4294967295 CRTC_GSL_VSYNC_GAP_LIMIT 0 7 CRTC_GSL_VSYNC_GAP_DELAY 8 15 CRTC_GSL_VSYNC_GAP_SOURCE_SEL 16 16 CRTC_GSL_VSYNC_GAP_MODE 17 18 CRTC_GSL_VSYNC_GAP_CLEAR 19 19 CRTC_GSL_VSYNC_GAP_OCCURRED 20 20 CRTC_GSL_VSYNC_GAP_MASTER_FASTER 23 23 CRTC_GSL_VSYNC_GAP 24 31 mmCRTC0_CRTC_GSL_VSYNC_GAP 0 0x1b79 0 0 4294967295 mmCRTC1_CRTC_GSL_VSYNC_GAP 0 0x1d79 0 0 4294967295 mmCRTC2_CRTC_GSL_VSYNC_GAP 0 0x1f79 0 0 4294967295 mmCRTC3_CRTC_GSL_VSYNC_GAP 0 0x4179 0 0 4294967295 mmCRTC4_CRTC_GSL_VSYNC_GAP 0 0x4379 0 0 4294967295 mmCRTC5_CRTC_GSL_VSYNC_GAP 0 0x4579 0 0 4294967295 mmCRTC_GSL_WINDOW 0 0x1b7a 2 0 4294967295 CRTC_GSL_WINDOW_START 0 13 CRTC_GSL_WINDOW_END 16 29 mmCRTC0_CRTC_GSL_WINDOW 0 0x1b7a 0 0 4294967295 mmCRTC1_CRTC_GSL_WINDOW 0 0x1d7a 0 0 4294967295 mmCRTC2_CRTC_GSL_WINDOW 0 0x1f7a 0 0 4294967295 mmCRTC3_CRTC_GSL_WINDOW 0 0x417a 0 0 4294967295 mmCRTC4_CRTC_GSL_WINDOW 0 0x437a 0 0 4294967295 mmCRTC5_CRTC_GSL_WINDOW 0 0x457a 0 0 4294967295 mmCRTC_GSL_CONTROL 0 0x1b7b 3 0 4294967295 CRTC_GSL_CHECK_LINE_NUM 0 13 CRTC_GSL_FORCE_DELAY 16 20 CRTC_GSL_CHECK_ALL_FIELDS 28 28 mmCRTC0_CRTC_GSL_CONTROL 0 0x1b7b 0 0 4294967295 mmCRTC1_CRTC_GSL_CONTROL 0 0x1d7b 0 0 4294967295 mmCRTC2_CRTC_GSL_CONTROL 0 0x1f7b 0 0 4294967295 mmCRTC3_CRTC_GSL_CONTROL 0 0x417b 0 0 4294967295 mmCRTC4_CRTC_GSL_CONTROL 0 0x437b 0 0 4294967295 mmCRTC5_CRTC_GSL_CONTROL 0 0x457b 0 0 4294967295 mmCRTC_TEST_DEBUG_INDEX 0 0x1bc6 2 0 4294967295 CRTC_TEST_DEBUG_INDEX 0 7 CRTC_TEST_DEBUG_WRITE_EN 8 8 mmCRTC0_CRTC_TEST_DEBUG_INDEX 0 0x1bc6 0 0 4294967295 mmCRTC1_CRTC_TEST_DEBUG_INDEX 0 0x1dc6 0 0 4294967295 mmCRTC2_CRTC_TEST_DEBUG_INDEX 0 0x1fc6 0 0 4294967295 mmCRTC3_CRTC_TEST_DEBUG_INDEX 0 0x41c6 0 0 4294967295 mmCRTC4_CRTC_TEST_DEBUG_INDEX 0 0x43c6 0 0 4294967295 mmCRTC5_CRTC_TEST_DEBUG_INDEX 0 0x45c6 0 0 4294967295 mmCRTC_TEST_DEBUG_DATA 0 0x1bc7 1 0 4294967295 CRTC_TEST_DEBUG_DATA 0 31 mmCRTC0_CRTC_TEST_DEBUG_DATA 0 0x1bc7 0 0 4294967295 mmCRTC1_CRTC_TEST_DEBUG_DATA 0 0x1dc7 0 0 4294967295 mmCRTC2_CRTC_TEST_DEBUG_DATA 0 0x1fc7 0 0 4294967295 mmCRTC3_CRTC_TEST_DEBUG_DATA 0 0x41c7 0 0 4294967295 mmCRTC4_CRTC_TEST_DEBUG_DATA 0 0x43c7 0 0 4294967295 mmCRTC5_CRTC_TEST_DEBUG_DATA 0 0x45c7 0 0 4294967295 mmDAC_ENABLE 0 0x16aa 6 0 4294967295 DAC_ENABLE 0 0 DAC_RESYNC_FIFO_ENABLE 1 1 DAC_RESYNC_FIFO_POINTER_SKEW 2 3 DAC_RESYNC_FIFO_ERROR 4 4 DAC_RESYNC_FIFO_ERROR_ACK 5 5 DAC_RESYNC_FIFO_TVOUT_SIM 8 8 mmDAC_SOURCE_SELECT 0 0x16ab 2 0 4294967295 DAC_SOURCE_SELECT 0 2 DAC_TV_SELECT 3 3 mmDAC_CRC_EN 0 0x16ac 2 0 4294967295 DAC_CRC_EN 0 0 DAC_CRC_CONT_EN 16 16 mmDAC_CRC_CONTROL 0 0x16ad 2 0 4294967295 DAC_CRC_FIELD 0 0 DAC_CRC_ONLY_BLANKB 8 8 mmDAC_CRC_SIG_RGB_MASK 0 0x16ae 3 0 4294967295 DAC_CRC_SIG_BLUE_MASK 0 9 DAC_CRC_SIG_GREEN_MASK 10 19 DAC_CRC_SIG_RED_MASK 20 29 mmDAC_CRC_SIG_CONTROL_MASK 0 0x16af 1 0 4294967295 DAC_CRC_SIG_CONTROL_MASK 0 5 mmDAC_CRC_SIG_RGB 0 0x16b0 3 0 4294967295 DAC_CRC_SIG_BLUE 0 9 DAC_CRC_SIG_GREEN 10 19 DAC_CRC_SIG_RED 20 29 mmDAC_CRC_SIG_CONTROL 0 0x16b1 1 0 4294967295 DAC_CRC_SIG_CONTROL 0 5 mmDAC_SYNC_TRISTATE_CONTROL 0 0x16b2 3 0 4294967295 DAC_HSYNCA_TRISTATE 0 0 DAC_VSYNCA_TRISTATE 8 8 DAC_SYNCA_TRISTATE 16 16 mmDAC_STEREOSYNC_SELECT 0 0x16b3 1 0 4294967295 DAC_STEREOSYNC_SELECT 0 2 mmDAC_AUTODETECT_CONTROL 0 0x16b4 3 0 4294967295 DAC_AUTODETECT_MODE 0 1 DAC_AUTODETECT_FRAME_TIME_COUNTER 8 15 DAC_AUTODETECT_CHECK_MASK 16 18 mmDAC_AUTODETECT_CONTROL2 0 0x16b5 2 0 4294967295 DAC_AUTODETECT_POWERUP_COUNTER 0 7 DAC_AUTODETECT_TESTMODE 8 8 mmDAC_AUTODETECT_CONTROL3 0 0x16b6 2 0 4294967295 DAC_AUTODET_COMPARATOR_IN_DELAY 0 7 DAC_AUTODET_COMPARATOR_OUT_DELAY 8 15 mmDAC_AUTODETECT_STATUS 0 0x16b7 5 0 4294967295 DAC_AUTODETECT_STATUS 0 0 DAC_AUTODETECT_CONNECT 4 4 DAC_AUTODETECT_RED_SENSE 8 9 DAC_AUTODETECT_GREEN_SENSE 16 17 DAC_AUTODETECT_BLUE_SENSE 24 25 mmDAC_AUTODETECT_INT_CONTROL 0 0x16b8 2 0 4294967295 DAC_AUTODETECT_ACK 0 0 DAC_AUTODETECT_INT_ENABLE 16 16 mmDAC_FORCE_OUTPUT_CNTL 0 0x16b9 3 0 4294967295 DAC_FORCE_DATA_EN 0 0 DAC_FORCE_DATA_SEL 8 10 DAC_FORCE_DATA_ON_BLANKB_ONLY 24 24 mmDAC_FORCE_DATA 0 0x16ba 1 0 4294967295 DAC_FORCE_DATA 0 9 mmDAC_POWERDOWN 0 0x16bb 4 0 4294967295 DAC_POWERDOWN 0 0 DAC_POWERDOWN_BLUE 8 8 DAC_POWERDOWN_GREEN 16 16 DAC_POWERDOWN_RED 24 24 mmDAC_CONTROL 0 0x16bc 3 0 4294967295 DAC_DFORCE_EN 0 0 DAC_TV_ENABLE 8 8 DAC_ZSCALE_SHIFT 16 16 mmDAC_COMPARATOR_ENABLE 0 0x16bd 5 0 4294967295 DAC_COMP_DDET_REF_EN 0 0 DAC_COMP_SDET_REF_EN 8 8 DAC_R_ASYNC_ENABLE 16 16 DAC_G_ASYNC_ENABLE 17 17 DAC_B_ASYNC_ENABLE 18 18 mmDAC_COMPARATOR_OUTPUT 0 0x16be 4 0 4294967295 DAC_COMPARATOR_OUTPUT 0 0 DAC_COMPARATOR_OUTPUT_BLUE 1 1 DAC_COMPARATOR_OUTPUT_GREEN 2 2 DAC_COMPARATOR_OUTPUT_RED 3 3 mmDAC_PWR_CNTL 0 0x16bf 2 0 4294967295 DAC_BG_MODE 0 1 DAC_PWRCNTL 16 17 mmDAC_DFT_CONFIG 0 0x16c0 1 0 4294967295 DAC_DFT_CONFIG 0 31 mmDAC_FIFO_STATUS 0 0x16c1 8 0 4294967295 DAC_FIFO_USE_OVERWRITE_LEVEL 1 1 DAC_FIFO_OVERWRITE_LEVEL 2 7 DAC_FIFO_CAL_AVERAGE_LEVEL 10 15 DAC_FIFO_MAXIMUM_LEVEL 16 19 DAC_FIFO_MINIMUM_LEVEL 22 25 DAC_FIFO_CALIBRATED 29 29 DAC_FIFO_FORCE_RECAL_AVERAGE 30 30 DAC_FIFO_FORCE_RECOMP_MINMAX 31 31 mmDAC_TEST_DEBUG_INDEX 0 0x16c2 2 0 4294967295 DAC_TEST_DEBUG_INDEX 0 7 DAC_TEST_DEBUG_WRITE_EN 8 8 mmDAC_TEST_DEBUG_DATA 0 0x16c3 1 0 4294967295 DAC_TEST_DEBUG_DATA 0 31 mmPERFCOUNTER_CNTL 0 0x170 14 0 4294967295 PERFCOUNTER_EVENT_SEL 0 8 PERFCOUNTER_CVALUE_SEL 9 11 PERFCOUNTER_INC_MODE 12 13 PERFCOUNTER_HW_CNTL_SEL 14 14 PERFCOUNTER_RUNEN_MODE 15 15 PERFCOUNTER_CNTOFF_SEL 16 20 PERFCOUNTER_CNTOFF_START_DIS 21 21 PERFCOUNTER_RESTART_EN 22 22 PERFCOUNTER_INT_EN 23 23 PERFCOUNTER_OFF_MASK 24 24 PERFCOUNTER_ACTIVE 25 25 PERFCOUNTER_INT_TYPE 26 26 PERFCOUNTER_COUNTED_VALUE_TYPE 27 27 PERFCOUNTER_CNTL_SEL 29 31 mmDC_PERFMON0_PERFCOUNTER_CNTL 0 0x170 0 0 4294967295 mmDC_PERFMON1_PERFCOUNTER_CNTL 0 0x358 0 0 4294967295 mmDC_PERFMON2_PERFCOUNTER_CNTL 0 0x364 0 0 4294967295 mmDC_PERFMON3_PERFCOUNTER_CNTL 0 0x18c8 0 0 4294967295 mmDC_PERFMON4_PERFCOUNTER_CNTL 0 0x1b24 0 0 4294967295 mmDC_PERFMON5_PERFCOUNTER_CNTL 0 0x1d24 0 0 4294967295 mmDC_PERFMON6_PERFCOUNTER_CNTL 0 0x1f24 0 0 4294967295 mmDC_PERFMON7_PERFCOUNTER_CNTL 0 0x4124 0 0 4294967295 mmDC_PERFMON8_PERFCOUNTER_CNTL 0 0x4324 0 0 4294967295 mmDC_PERFMON9_PERFCOUNTER_CNTL 0 0x4524 0 0 4294967295 mmDC_PERFMON10_PERFCOUNTER_CNTL 0 0x4724 0 0 4294967295 mmDC_PERFMON11_PERFCOUNTER_CNTL 0 0x59a0 0 0 4294967295 mmDC_PERFMON12_PERFCOUNTER_CNTL 0 0x5f68 0 0 4294967295 mmDC_PERFMON13_PERFCOUNTER_CNTL 0 0x9924 0 0 4294967295 mmPERFCOUNTER_STATE 0 0x171 16 0 4294967295 PERFCOUNTER_CNT0_STATE 0 1 PERFCOUNTER_STATE_SEL0 2 2 PERFCOUNTER_CNT1_STATE 4 5 PERFCOUNTER_STATE_SEL1 6 6 PERFCOUNTER_CNT2_STATE 8 9 PERFCOUNTER_STATE_SEL2 10 10 PERFCOUNTER_CNT3_STATE 12 13 PERFCOUNTER_STATE_SEL3 14 14 PERFCOUNTER_CNT4_STATE 16 17 PERFCOUNTER_STATE_SEL4 18 18 PERFCOUNTER_CNT5_STATE 20 21 PERFCOUNTER_STATE_SEL5 22 22 PERFCOUNTER_CNT6_STATE 24 25 PERFCOUNTER_STATE_SEL6 26 26 PERFCOUNTER_CNT7_STATE 28 29 PERFCOUNTER_STATE_SEL7 30 30 mmDC_PERFMON0_PERFCOUNTER_STATE 0 0x171 0 0 4294967295 mmDC_PERFMON1_PERFCOUNTER_STATE 0 0x359 0 0 4294967295 mmDC_PERFMON2_PERFCOUNTER_STATE 0 0x365 0 0 4294967295 mmDC_PERFMON3_PERFCOUNTER_STATE 0 0x18c9 0 0 4294967295 mmDC_PERFMON4_PERFCOUNTER_STATE 0 0x1b25 0 0 4294967295 mmDC_PERFMON5_PERFCOUNTER_STATE 0 0x1d25 0 0 4294967295 mmDC_PERFMON6_PERFCOUNTER_STATE 0 0x1f25 0 0 4294967295 mmDC_PERFMON7_PERFCOUNTER_STATE 0 0x4125 0 0 4294967295 mmDC_PERFMON8_PERFCOUNTER_STATE 0 0x4325 0 0 4294967295 mmDC_PERFMON9_PERFCOUNTER_STATE 0 0x4525 0 0 4294967295 mmDC_PERFMON10_PERFCOUNTER_STATE 0 0x4725 0 0 4294967295 mmDC_PERFMON11_PERFCOUNTER_STATE 0 0x59a1 0 0 4294967295 mmDC_PERFMON12_PERFCOUNTER_STATE 0 0x5f69 0 0 4294967295 mmDC_PERFMON13_PERFCOUNTER_STATE 0 0x9925 0 0 4294967295 mmPERFMON_CNTL 0 0x173 7 0 4294967295 PERFMON_STATE 0 1 PERFMON_RUN_ENABLE_SEL 2 7 PERFMON_RPT_COUNT 8 27 PERFMON_CNTOFF_AND_OR 28 28 PERFMON_CNTOFF_INT_EN 29 29 PERFMON_CNTOFF_INT_STATUS 30 30 PERFMON_CNTOFF_INT_ACK 31 31 mmDC_PERFMON0_PERFMON_CNTL 0 0x173 0 0 4294967295 mmDC_PERFMON1_PERFMON_CNTL 0 0x35b 0 0 4294967295 mmDC_PERFMON2_PERFMON_CNTL 0 0x367 0 0 4294967295 mmDC_PERFMON3_PERFMON_CNTL 0 0x18cb 0 0 4294967295 mmDC_PERFMON4_PERFMON_CNTL 0 0x1b27 0 0 4294967295 mmDC_PERFMON5_PERFMON_CNTL 0 0x1d27 0 0 4294967295 mmDC_PERFMON6_PERFMON_CNTL 0 0x1f27 0 0 4294967295 mmDC_PERFMON7_PERFMON_CNTL 0 0x4127 0 0 4294967295 mmDC_PERFMON8_PERFMON_CNTL 0 0x4327 0 0 4294967295 mmDC_PERFMON9_PERFMON_CNTL 0 0x4527 0 0 4294967295 mmDC_PERFMON10_PERFMON_CNTL 0 0x4727 0 0 4294967295 mmDC_PERFMON11_PERFMON_CNTL 0 0x59a3 0 0 4294967295 mmDC_PERFMON12_PERFMON_CNTL 0 0x5f6b 0 0 4294967295 mmDC_PERFMON13_PERFMON_CNTL 0 0x9927 0 0 4294967295 mmPERFMON_CNTL2 0 0x17a 2 0 4294967295 PERFMON_CNTOFF_INT_TYPE 0 0 PERFMON_CLK_ENABLE 1 1 mmDC_PERFMON0_PERFMON_CNTL2 0 0x17a 0 0 4294967295 mmDC_PERFMON1_PERFMON_CNTL2 0 0x362 0 0 4294967295 mmDC_PERFMON2_PERFMON_CNTL2 0 0x36e 0 0 4294967295 mmDC_PERFMON3_PERFMON_CNTL2 0 0x18d2 0 0 4294967295 mmDC_PERFMON4_PERFMON_CNTL2 0 0x1b2e 0 0 4294967295 mmDC_PERFMON5_PERFMON_CNTL2 0 0x1d2e 0 0 4294967295 mmDC_PERFMON6_PERFMON_CNTL2 0 0x1f2e 0 0 4294967295 mmDC_PERFMON7_PERFMON_CNTL2 0 0x412e 0 0 4294967295 mmDC_PERFMON8_PERFMON_CNTL2 0 0x432e 0 0 4294967295 mmDC_PERFMON9_PERFMON_CNTL2 0 0x452e 0 0 4294967295 mmDC_PERFMON10_PERFMON_CNTL2 0 0x472e 0 0 4294967295 mmDC_PERFMON11_PERFMON_CNTL2 0 0x59aa 0 0 4294967295 mmDC_PERFMON12_PERFMON_CNTL2 0 0x5f72 0 0 4294967295 mmDC_PERFMON13_PERFMON_CNTL2 0 0x992e 0 0 4294967295 mmPERFMON_CVALUE_INT_MISC 0 0x172 17 0 4294967295 PERFCOUNTER_INT0_STATUS 0 0 PERFCOUNTER_INT1_STATUS 1 1 PERFCOUNTER_INT2_STATUS 2 2 PERFCOUNTER_INT3_STATUS 3 3 PERFCOUNTER_INT4_STATUS 4 4 PERFCOUNTER_INT5_STATUS 5 5 PERFCOUNTER_INT6_STATUS 6 6 PERFCOUNTER_INT7_STATUS 7 7 PERFCOUNTER_INT0_ACK 8 8 PERFCOUNTER_INT1_ACK 9 9 PERFCOUNTER_INT2_ACK 10 10 PERFCOUNTER_INT3_ACK 11 11 PERFCOUNTER_INT4_ACK 12 12 PERFCOUNTER_INT5_ACK 13 13 PERFCOUNTER_INT6_ACK 14 14 PERFCOUNTER_INT7_ACK 15 15 PERFMON_CVALUE_HI 16 31 mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC 0 0x172 0 0 4294967295 mmDC_PERFMON1_PERFMON_CVALUE_INT_MISC 0 0x35a 0 0 4294967295 mmDC_PERFMON2_PERFMON_CVALUE_INT_MISC 0 0x366 0 0 4294967295 mmDC_PERFMON3_PERFMON_CVALUE_INT_MISC 0 0x18ca 0 0 4294967295 mmDC_PERFMON4_PERFMON_CVALUE_INT_MISC 0 0x1b26 0 0 4294967295 mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC 0 0x1d26 0 0 4294967295 mmDC_PERFMON6_PERFMON_CVALUE_INT_MISC 0 0x1f26 0 0 4294967295 mmDC_PERFMON7_PERFMON_CVALUE_INT_MISC 0 0x4126 0 0 4294967295 mmDC_PERFMON8_PERFMON_CVALUE_INT_MISC 0 0x4326 0 0 4294967295 mmDC_PERFMON9_PERFMON_CVALUE_INT_MISC 0 0x4526 0 0 4294967295 mmDC_PERFMON10_PERFMON_CVALUE_INT_MISC 0 0x4726 0 0 4294967295 mmDC_PERFMON11_PERFMON_CVALUE_INT_MISC 0 0x59a2 0 0 4294967295 mmDC_PERFMON12_PERFMON_CVALUE_INT_MISC 0 0x5f6a 0 0 4294967295 mmDC_PERFMON13_PERFMON_CVALUE_INT_MISC 0 0x9926 0 0 4294967295 mmPERFMON_CVALUE_LOW 0 0x174 1 0 4294967295 PERFMON_CVALUE_LOW 0 31 mmDC_PERFMON0_PERFMON_CVALUE_LOW 0 0x174 0 0 4294967295 mmDC_PERFMON1_PERFMON_CVALUE_LOW 0 0x35c 0 0 4294967295 mmDC_PERFMON2_PERFMON_CVALUE_LOW 0 0x368 0 0 4294967295 mmDC_PERFMON3_PERFMON_CVALUE_LOW 0 0x18cc 0 0 4294967295 mmDC_PERFMON4_PERFMON_CVALUE_LOW 0 0x1b28 0 0 4294967295 mmDC_PERFMON5_PERFMON_CVALUE_LOW 0 0x1d28 0 0 4294967295 mmDC_PERFMON6_PERFMON_CVALUE_LOW 0 0x1f28 0 0 4294967295 mmDC_PERFMON7_PERFMON_CVALUE_LOW 0 0x4128 0 0 4294967295 mmDC_PERFMON8_PERFMON_CVALUE_LOW 0 0x4328 0 0 4294967295 mmDC_PERFMON9_PERFMON_CVALUE_LOW 0 0x4528 0 0 4294967295 mmDC_PERFMON10_PERFMON_CVALUE_LOW 0 0x4728 0 0 4294967295 mmDC_PERFMON11_PERFMON_CVALUE_LOW 0 0x59a4 0 0 4294967295 mmDC_PERFMON12_PERFMON_CVALUE_LOW 0 0x5f6c 0 0 4294967295 mmDC_PERFMON13_PERFMON_CVALUE_LOW 0 0x9928 0 0 4294967295 mmPERFMON_HI 0 0x175 2 0 4294967295 PERFMON_HI 0 15 PERFMON_READ_SEL 29 31 mmDC_PERFMON0_PERFMON_HI 0 0x175 0 0 4294967295 mmDC_PERFMON1_PERFMON_HI 0 0x35d 0 0 4294967295 mmDC_PERFMON2_PERFMON_HI 0 0x369 0 0 4294967295 mmDC_PERFMON3_PERFMON_HI 0 0x18cd 0 0 4294967295 mmDC_PERFMON4_PERFMON_HI 0 0x1b29 0 0 4294967295 mmDC_PERFMON5_PERFMON_HI 0 0x1d29 0 0 4294967295 mmDC_PERFMON6_PERFMON_HI 0 0x1f29 0 0 4294967295 mmDC_PERFMON7_PERFMON_HI 0 0x4129 0 0 4294967295 mmDC_PERFMON8_PERFMON_HI 0 0x4329 0 0 4294967295 mmDC_PERFMON9_PERFMON_HI 0 0x4529 0 0 4294967295 mmDC_PERFMON10_PERFMON_HI 0 0x4729 0 0 4294967295 mmDC_PERFMON11_PERFMON_HI 0 0x59a5 0 0 4294967295 mmDC_PERFMON12_PERFMON_HI 0 0x5f6d 0 0 4294967295 mmDC_PERFMON13_PERFMON_HI 0 0x9929 0 0 4294967295 mmPERFMON_LOW 0 0x176 1 0 4294967295 PERFMON_LOW 0 31 mmDC_PERFMON0_PERFMON_LOW 0 0x176 0 0 4294967295 mmDC_PERFMON1_PERFMON_LOW 0 0x35e 0 0 4294967295 mmDC_PERFMON2_PERFMON_LOW 0 0x36a 0 0 4294967295 mmDC_PERFMON3_PERFMON_LOW 0 0x18ce 0 0 4294967295 mmDC_PERFMON4_PERFMON_LOW 0 0x1b2a 0 0 4294967295 mmDC_PERFMON5_PERFMON_LOW 0 0x1d2a 0 0 4294967295 mmDC_PERFMON6_PERFMON_LOW 0 0x1f2a 0 0 4294967295 mmDC_PERFMON7_PERFMON_LOW 0 0x412a 0 0 4294967295 mmDC_PERFMON8_PERFMON_LOW 0 0x432a 0 0 4294967295 mmDC_PERFMON9_PERFMON_LOW 0 0x452a 0 0 4294967295 mmDC_PERFMON10_PERFMON_LOW 0 0x472a 0 0 4294967295 mmDC_PERFMON11_PERFMON_LOW 0 0x59a6 0 0 4294967295 mmDC_PERFMON12_PERFMON_LOW 0 0x5f6e 0 0 4294967295 mmDC_PERFMON13_PERFMON_LOW 0 0x992a 0 0 4294967295 mmPERFMON_TEST_DEBUG_INDEX 0 0x177 2 0 4294967295 PERFMON_TEST_DEBUG_INDEX 0 7 PERFMON_TEST_DEBUG_WRITE_EN 8 8 mmDC_PERFMON0_PERFMON_TEST_DEBUG_INDEX 0 0x177 0 0 4294967295 mmDC_PERFMON1_PERFMON_TEST_DEBUG_INDEX 0 0x35f 0 0 4294967295 mmDC_PERFMON2_PERFMON_TEST_DEBUG_INDEX 0 0x36b 0 0 4294967295 mmDC_PERFMON3_PERFMON_TEST_DEBUG_INDEX 0 0x18cf 0 0 4294967295 mmDC_PERFMON4_PERFMON_TEST_DEBUG_INDEX 0 0x1b2b 0 0 4294967295 mmDC_PERFMON5_PERFMON_TEST_DEBUG_INDEX 0 0x1d2b 0 0 4294967295 mmDC_PERFMON6_PERFMON_TEST_DEBUG_INDEX 0 0x1f2b 0 0 4294967295 mmDC_PERFMON7_PERFMON_TEST_DEBUG_INDEX 0 0x412b 0 0 4294967295 mmDC_PERFMON8_PERFMON_TEST_DEBUG_INDEX 0 0x432b 0 0 4294967295 mmDC_PERFMON9_PERFMON_TEST_DEBUG_INDEX 0 0x452b 0 0 4294967295 mmDC_PERFMON10_PERFMON_TEST_DEBUG_INDEX 0 0x472b 0 0 4294967295 mmDC_PERFMON11_PERFMON_TEST_DEBUG_INDEX 0 0x59a7 0 0 4294967295 mmDC_PERFMON12_PERFMON_TEST_DEBUG_INDEX 0 0x5f6f 0 0 4294967295 mmDC_PERFMON13_PERFMON_TEST_DEBUG_INDEX 0 0x992b 0 0 4294967295 mmPERFMON_TEST_DEBUG_DATA 0 0x178 1 0 4294967295 PERFMON_TEST_DEBUG_DATA 0 31 mmDC_PERFMON0_PERFMON_TEST_DEBUG_DATA 0 0x178 0 0 4294967295 mmDC_PERFMON1_PERFMON_TEST_DEBUG_DATA 0 0x360 0 0 4294967295 mmDC_PERFMON2_PERFMON_TEST_DEBUG_DATA 0 0x36c 0 0 4294967295 mmDC_PERFMON3_PERFMON_TEST_DEBUG_DATA 0 0x18d0 0 0 4294967295 mmDC_PERFMON4_PERFMON_TEST_DEBUG_DATA 0 0x1b2c 0 0 4294967295 mmDC_PERFMON5_PERFMON_TEST_DEBUG_DATA 0 0x1d2c 0 0 4294967295 mmDC_PERFMON6_PERFMON_TEST_DEBUG_DATA 0 0x1f2c 0 0 4294967295 mmDC_PERFMON7_PERFMON_TEST_DEBUG_DATA 0 0x412c 0 0 4294967295 mmDC_PERFMON8_PERFMON_TEST_DEBUG_DATA 0 0x432c 0 0 4294967295 mmDC_PERFMON9_PERFMON_TEST_DEBUG_DATA 0 0x452c 0 0 4294967295 mmDC_PERFMON10_PERFMON_TEST_DEBUG_DATA 0 0x472c 0 0 4294967295 mmDC_PERFMON11_PERFMON_TEST_DEBUG_DATA 0 0x59a8 0 0 4294967295 mmDC_PERFMON12_PERFMON_TEST_DEBUG_DATA 0 0x5f70 0 0 4294967295 mmDC_PERFMON13_PERFMON_TEST_DEBUG_DATA 0 0x992c 0 0 4294967295 mmREFCLK_CNTL 0 0x109 2 0 4294967295 REFCLK_CLOCK_EN 0 0 REFCLK_SRC_SEL 1 1 mmDCCG_CBUS_ANTIGLITCH_RESETB 0 0x15c 4 0 4294967295 P0PLL_CBUS_ANTIGLITCH_RESETB 0 0 P1PLL_CBUS_ANTIGLITCH_RESETB 1 1 P2PLL_CBUS_ANTIGLITCH_RESETB 2 2 P3PLL_CBUS_ANTIGLITCH_RESETB 3 3 mmDCCG_CBUS_SPARE 0 0x15d 4 0 4294967295 P0PLL_CBUS_SPARE 0 7 P1PLL_CBUS_SPARE 8 15 P2PLL_CBUS_SPARE 16 23 P3PLL_CBUS_SPARE 24 31 mmDCCG_CBUS_WRCMD_DELAY 0 0x110 1 0 4294967295 CBUS_PLL_WRCMD_DELAY 0 3 mmDPREFCLK_CNTL 0 0x118 2 0 4294967295 DPREFCLK_SRC_SEL 0 2 UNB_DB_CLK_ENABLE 8 8 mmDCE_VERSION 0 0x11e 2 0 4294967295 MAJOR_VERSION 0 7 MINOR_VERSION 8 15 mmAVSYNC_COUNTER_WRITE 0 0x12a 1 0 4294967295 AVSYNC_COUNTER_WRVALUE 0 31 mmAVSYNC_COUNTER_CONTROL 0 0x12b 1 0 4294967295 AVSYNC_COUNTER_ENABLE 0 0 mmAVSYNC_COUNTER_READ 0 0x12f 1 0 4294967295 AVSYNC_COUNTER_RDVALUE 0 31 mmDCCG_GTC_CNTL 0 0x120 1 0 4294967295 DCCG_GTC_ENABLE 0 0 mmDCCG_GTC_DTO_INCR 0 0x121 1 0 4294967295 DCCG_GTC_DTO_INCR 0 31 mmDCCG_GTC_DTO_MODULO 0 0x122 1 0 4294967295 DCCG_GTC_DTO_MODULO 0 31 mmDCCG_GTC_CURRENT 0 0x123 1 0 4294967295 DCCG_GTC_CURRENT 0 31 mmDCCG_DS_DTO_INCR 0 0x113 1 0 4294967295 DCCG_DS_DTO_INCR 0 31 mmDCCG_DS_DTO_MODULO 0 0x114 1 0 4294967295 DCCG_DS_DTO_MODULO 0 31 mmDCCG_DS_CNTL 0 0x115 7 0 4294967295 DCCG_DS_ENABLE 0 0 DCCG_DS_REF_SRC 4 5 DCCG_DS_HW_CAL_ENABLE 8 8 DCCG_DS_ENABLED_STATUS 9 9 DCCG_DS_XTALIN_RATE_DIV 16 17 DCCG_DS_JITTER_REMOVE_DIS 24 24 DCCG_DS_DELAY_XTAL_SEL 25 25 mmDCCG_DS_HW_CAL_INTERVAL 0 0x116 1 0 4294967295 DCCG_DS_HW_CAL_INTERVAL 0 31 mmDCCG_DS_DEBUG_CNTL 0 0x112 7 0 4294967295 DCCG_DS_DEBUG_COUNT_ENABLE 0 0 DCCG_DS_DEBUG_COUNT_TRIG_VALUE 4 12 DCCG_DS_DEBUG_COUNT_TRIG_OCCURRED 16 16 DCCG_DS_DEBUG_COUNT_TRIG_CLEAR 17 17 DCCG_DS_JITTER_COUNT_ENABLE 20 20 DCCG_DS_JITTER_COUNT_SRC_SEL 21 21 DCCG_DS_JITTER_COUNT 24 31 mmDMCU_SMU_INTERRUPT_CNTL 0 0x12c 2 0 4294967295 DMCU_SMU_STATIC_SCREEN_INT 0 0 DMCU_SMU_STATIC_SCREEN_STATUS 16 31 mmSMU_CONTROL 0 0x12d 10 0 4294967295 DISPLAY0_FORCE_VBI 0 0 DISPLAY1_FORCE_VBI 1 1 DISPLAY2_FORCE_VBI 2 2 DISPLAY3_FORCE_VBI 3 3 DISPLAY4_FORCE_VBI 4 4 DISPLAY5_FORCE_VBI 5 5 DISPLAY_V0_FORCE_VBI 6 6 DISPLAY_V1_FORCE_VBI 7 7 MCIF_WB_FORCE_VBI 8 8 SMU_DC_INT_CLEAR 16 16 mmSMU_INTERRUPT_CONTROL 0 0x12e 3 0 4294967295 DC_SMU_INT_ENABLE 0 0 DC_SMU_INT_STATUS 4 4 DC_SMU_INT_EVENT 16 31 mmDAC_CLK_ENABLE 0 0x128 2 0 4294967295 DACA_CLK_ENABLE 0 0 DACB_CLK_ENABLE 4 4 mmDVO_CLK_ENABLE 0 0x129 1 0 4294967295 DVO_CLK_ENABLE 0 0 mmDCCG_GATE_DISABLE_CNTL 0 0x134 20 0 4294967295 DISPCLK_DCCG_GATE_DISABLE 0 0 DISPCLK_R_DCCG_GATE_DISABLE 1 1 SCLK_GATE_DISABLE 2 2 DPREFCLK_GATE_DISABLE 3 3 DACACLK_GATE_DISABLE 4 4 DACBCLK_GATE_DISABLE 5 5 DVOACLK_GATE_DISABLE 6 6 DPDBG_CLK_GATE_DISABLE 7 7 DPREFCLK_R_DCCG_GATE_DISABLE 8 8 AOMCLK0_GATE_DISABLE 17 17 AOMCLK1_GATE_DISABLE 18 18 AOMCLK2_GATE_DISABLE 19 19 AUDIO_DTO2_CLK_GATE_DISABLE 21 21 DPREFCLK_GTC_GATE_DISABLE 22 22 UNB_DB_CLK_GATE_DISABLE 23 23 REFCLK_GATE_DISABLE 26 26 REFCLK_R_DIG_GATE_DISABLE 27 27 DSICLK_GATE_DISABLE 28 28 BYTECLK_GATE_DISABLE 29 29 ESCCLK_GATE_DISABLE 30 30 mmDCCG_GATE_DISABLE_CNTL2 0 0x13c 18 0 4294967295 SYMCLKA_FE_GATE_DISABLE 0 0 SYMCLKB_FE_GATE_DISABLE 1 1 SYMCLKC_FE_GATE_DISABLE 2 2 SYMCLKD_FE_GATE_DISABLE 3 3 SYMCLKE_FE_GATE_DISABLE 4 4 SYMCLKF_FE_GATE_DISABLE 5 5 SYMCLKG_FE_GATE_DISABLE 6 6 SYMCLKLPA_FE_GATE_DISABLE 8 8 SYMCLKLPB_FE_GATE_DISABLE 9 9 SYMCLKA_GATE_DISABLE 16 16 SYMCLKB_GATE_DISABLE 17 17 SYMCLKC_GATE_DISABLE 18 18 SYMCLKD_GATE_DISABLE 19 19 SYMCLKE_GATE_DISABLE 20 20 SYMCLKF_GATE_DISABLE 21 21 SYMCLKG_GATE_DISABLE 22 22 SYMCLKLPA_GATE_DISABLE 24 24 SYMCLKLPB_GATE_DISABLE 25 25 mmDISPCLK_CGTT_BLK_CTRL_REG 0 0x135 2 0 4294967295 DISPCLK_TURN_ON_DELAY 0 3 DISPCLK_TURN_OFF_DELAY 4 11 mmSCLK_CGTT_BLK_CTRL_REG 0 0x136 3 0 4294967295 SCLK_TURN_ON_DELAY 0 3 SCLK_TURN_OFF_DELAY 4 11 CGTT_SCLK_OVERRIDE 12 12 mmDPREFCLK_CGTT_BLK_CTRL_REG 0 0x108 2 0 4294967295 DPREFCLK_TURN_ON_DELAY 0 3 DPREFCLK_TURN_OFF_DELAY 4 11 mmREFCLK_CGTT_BLK_CTRL_REG 0 0x10b 2 0 4294967295 REFCLK_TURN_ON_DELAY 0 3 REFCLK_TURN_OFF_DELAY 4 11 mmSYMCLK_CGTT_BLK_CTRL_REG 0 0x13d 2 0 4294967295 SYMCLK_TURN_ON_DELAY 0 3 SYMCLK_TURN_OFF_DELAY 4 11 mmDCCG_CAC_STATUS 0 0x137 1 0 4294967295 CAC_STATUS_RDDATA 0 31 mmPIXCLK0_RESYNC_CNTL 0 0x13a 2 0 4294967295 PIXCLK0_RESYNC_ENABLE 0 0 DCCG_DEEP_COLOR_CNTL0 4 5 mmPHYPLLA_PIXCLK_RESYNC_CNTL 0 0x100 4 0 4294967295 PHYPLLA_PIXCLK_RESYNC_ENABLE 0 0 PHYPLLA_DCCG_DEEP_COLOR_CNTL 4 5 PHYPLLA_PIXCLK_ENABLE 8 8 PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE 9 9 mmPHYPLLB_PIXCLK_RESYNC_CNTL 0 0x101 4 0 4294967295 PHYPLLB_PIXCLK_RESYNC_ENABLE 0 0 PHYPLLB_DCCG_DEEP_COLOR_CNTL 4 5 PHYPLLB_PIXCLK_ENABLE 8 8 PHYPLLB_PIXCLK_DOUBLE_RATE_ENABLE 9 9 mmPHYPLLC_PIXCLK_RESYNC_CNTL 0 0x102 4 0 4294967295 PHYPLLC_PIXCLK_RESYNC_ENABLE 0 0 PHYPLLC_DCCG_DEEP_COLOR_CNTL 4 5 PHYPLLC_PIXCLK_ENABLE 8 8 PHYPLLC_PIXCLK_DOUBLE_RATE_ENABLE 9 9 mmPHYPLLD_PIXCLK_RESYNC_CNTL 0 0x103 4 0 4294967295 PHYPLLD_PIXCLK_RESYNC_ENABLE 0 0 PHYPLLD_DCCG_DEEP_COLOR_CNTL 4 5 PHYPLLD_PIXCLK_ENABLE 8 8 PHYPLLD_PIXCLK_DOUBLE_RATE_ENABLE 9 9 mmPHYPLLE_PIXCLK_RESYNC_CNTL 0 0x10c 4 0 4294967295 PHYPLLE_PIXCLK_RESYNC_ENABLE 0 0 PHYPLLE_DCCG_DEEP_COLOR_CNTL 4 5 PHYPLLE_PIXCLK_ENABLE 8 8 PHYPLLE_PIXCLK_DOUBLE_RATE_ENABLE 9 9 mmPHYPLLF_PIXCLK_RESYNC_CNTL 0 0x13e 4 0 4294967295 PHYPLLF_PIXCLK_RESYNC_ENABLE 0 0 PHYPLLF_DCCG_DEEP_COLOR_CNTL 4 5 PHYPLLF_PIXCLK_ENABLE 8 8 PHYPLLF_PIXCLK_DOUBLE_RATE_ENABLE 9 9 mmMICROSECOND_TIME_BASE_DIV 0 0x13b 5 0 4294967295 MICROSECOND_TIME_BASE_DIV 0 6 XTAL_REF_DIV 8 14 XTAL_REF_SEL 16 16 XTAL_REF_CLOCK_SOURCE_SEL 17 17 MICROSECOND_TIME_BASE_CLOCK_SOURCE_SEL 20 20 mmDCCG_DISP_CNTL_REG 0 0x13f 1 0 4294967295 ALLOW_SR_ON_TRANS_REQ 8 8 mmMILLISECOND_TIME_BASE_DIV 0 0x130 2 0 4294967295 MILLISECOND_TIME_BASE_DIV 0 16 MILLISECOND_TIME_BASE_CLOCK_SOURCE_SEL 20 20 mmDISPCLK_FREQ_CHANGE_CNTL 0 0x131 8 0 4294967295 DISPCLK_STEP_DELAY 0 13 DISPCLK_STEP_SIZE 16 19 DISPCLK_FREQ_RAMP_DONE 20 20 DISPCLK_MAX_ERRDET_CYCLES 25 27 DCCG_FIFO_ERRDET_RESET 28 28 DCCG_FIFO_ERRDET_STATE 29 29 DCCG_FIFO_ERRDET_OVR_EN 30 30 DISPCLK_CHG_FWD_CORR_DISABLE 31 31 mmDC_MEM_GLOBAL_PWR_REQ_CNTL 0 0x132 1 0 4294967295 DC_MEM_GLOBAL_PWR_REQ_DIS 0 0 mmDCCG_PERFMON_CNTL 0 0x133 10 0 4294967295 DCCG_PERF_DISPCLK_ENABLE 0 0 DCCG_PERF_DPREFCLK_ENABLE 1 1 DCCG_PERF_UNIPHYA_PIXCLK_ENABLE 2 2 DCCG_PERF_UNIPHYB_PIXCLK_ENABLE 3 3 DCCG_PERF_PIXCLK0_ENABLE 4 4 DCCG_PERF_RUN 5 5 DCCG_PERF_MODE_VSYNC 6 6 DCCG_PERF_MODE_HSYNC 7 7 DCCG_PERF_CRTC_SEL 8 10 DCCG_PERF_XTALIN_PULSE_DIV 11 31 mmDCCG_PERFMON_CNTL2 0 0x10e 9 0 4294967295 DCCG_PERF_DSICLK_ENABLE 0 0 DCCG_PERF_REFCLK_ENABLE 1 1 DCCG_PERF_PIXCLK1_ENABLE 2 2 DCCG_PERF_PIXCLK2_ENABLE 3 3 DCCG_PERF_UNIPHYC_PIXCLK_ENABLE 4 4 DCCG_PERF_UNIPHYD_PIXCLK_ENABLE 5 5 DCCG_PERF_UNIPHYE_PIXCLK_ENABLE 6 6 DCCG_PERF_UNIPHYF_PIXCLK_ENABLE 7 7 DCCG_PERF_UNIPHYG_PIXCLK_ENABLE 8 8 mmCRTC0_PIXEL_RATE_CNTL 0 0x140 8 0 4294967295 CRTC0_PIXEL_RATE_SOURCE 0 1 DP_DTO0_ENABLE 4 4 DP_DTO0_DS_DISABLE 5 5 CRTC0_ADD_PIXEL 8 8 CRTC0_DROP_PIXEL 9 9 CRTC0_DISPOUT_HALF_RATE_EN 11 11 CRTC0_DISPOUT_FIFO_ERROR 14 15 CRTC0_DISPOUT_ERROR_COUNT 16 27 mmDP_DTO0_PHASE 0 0x141 1 0 4294967295 DP_DTO0_PHASE 0 31 mmDP_DTO0_MODULO 0 0x142 1 0 4294967295 DP_DTO0_MODULO 0 31 mmCRTC0_PHYPLL_PIXEL_RATE_CNTL 0 0x143 2 0 4294967295 CRTC0_PHYPLL_PIXEL_RATE_SOURCE 0 2 CRTC0_PIXEL_RATE_PLL_SOURCE 4 4 mmCRTC1_PIXEL_RATE_CNTL 0 0x144 8 0 4294967295 CRTC1_PIXEL_RATE_SOURCE 0 1 DP_DTO1_ENABLE 4 4 DP_DTO1_DS_DISABLE 5 5 CRTC1_ADD_PIXEL 8 8 CRTC1_DROP_PIXEL 9 9 CRTC1_DISPOUT_HALF_RATE_EN 11 11 CRTC1_DISPOUT_FIFO_ERROR 14 15 CRTC1_DISPOUT_ERROR_COUNT 16 27 mmDP_DTO1_PHASE 0 0x145 1 0 4294967295 DP_DTO1_PHASE 0 31 mmDP_DTO1_MODULO 0 0x146 1 0 4294967295 DP_DTO1_MODULO 0 31 mmCRTC1_PHYPLL_PIXEL_RATE_CNTL 0 0x147 2 0 4294967295 CRTC1_PHYPLL_PIXEL_RATE_SOURCE 0 2 CRTC1_PIXEL_RATE_PLL_SOURCE 4 4 mmCRTC2_PIXEL_RATE_CNTL 0 0x148 8 0 4294967295 CRTC2_PIXEL_RATE_SOURCE 0 1 DP_DTO2_ENABLE 4 4 DP_DTO2_DS_DISABLE 5 5 CRTC2_ADD_PIXEL 8 8 CRTC2_DROP_PIXEL 9 9 CRTC2_DISPOUT_HALF_RATE_EN 11 11 CRTC2_DISPOUT_FIFO_ERROR 14 15 CRTC2_DISPOUT_ERROR_COUNT 16 27 mmDP_DTO2_PHASE 0 0x149 1 0 4294967295 DP_DTO2_PHASE 0 31 mmDP_DTO2_MODULO 0 0x14a 1 0 4294967295 DP_DTO2_MODULO 0 31 mmCRTC2_PHYPLL_PIXEL_RATE_CNTL 0 0x14b 2 0 4294967295 CRTC2_PHYPLL_PIXEL_RATE_SOURCE 0 2 CRTC2_PIXEL_RATE_PLL_SOURCE 4 4 mmCRTC3_PIXEL_RATE_CNTL 0 0x14c 8 0 4294967295 CRTC3_PIXEL_RATE_SOURCE 0 1 DP_DTO3_ENABLE 4 4 DP_DTO3_DS_DISABLE 5 5 CRTC3_ADD_PIXEL 8 8 CRTC3_DROP_PIXEL 9 9 CRTC3_DISPOUT_HALF_RATE_EN 11 11 CRTC3_DISPOUT_FIFO_ERROR 14 15 CRTC3_DISPOUT_ERROR_COUNT 16 27 mmDP_DTO3_PHASE 0 0x14d 1 0 4294967295 DP_DTO3_PHASE 0 31 mmDP_DTO3_MODULO 0 0x14e 1 0 4294967295 DP_DTO3_MODULO 0 31 mmCRTC3_PHYPLL_PIXEL_RATE_CNTL 0 0x14f 2 0 4294967295 CRTC3_PHYPLL_PIXEL_RATE_SOURCE 0 2 CRTC3_PIXEL_RATE_PLL_SOURCE 4 4 mmCRTC4_PIXEL_RATE_CNTL 0 0x150 8 0 4294967295 CRTC4_PIXEL_RATE_SOURCE 0 1 DP_DTO4_ENABLE 4 4 DP_DTO4_DS_DISABLE 5 5 CRTC4_ADD_PIXEL 8 8 CRTC4_DROP_PIXEL 9 9 CRTC4_DISPOUT_HALF_RATE_EN 11 11 CRTC4_DISPOUT_FIFO_ERROR 14 15 CRTC4_DISPOUT_ERROR_COUNT 16 27 mmDP_DTO4_PHASE 0 0x151 1 0 4294967295 DP_DTO4_PHASE 0 31 mmDP_DTO4_MODULO 0 0x152 1 0 4294967295 DP_DTO4_MODULO 0 31 mmCRTC4_PHYPLL_PIXEL_RATE_CNTL 0 0x153 2 0 4294967295 CRTC4_PHYPLL_PIXEL_RATE_SOURCE 0 2 CRTC4_PIXEL_RATE_PLL_SOURCE 4 4 mmCRTC5_PIXEL_RATE_CNTL 0 0x154 8 0 4294967295 CRTC5_PIXEL_RATE_SOURCE 0 1 DP_DTO5_ENABLE 4 4 DP_DTO5_DS_DISABLE 5 5 CRTC5_ADD_PIXEL 8 8 CRTC5_DROP_PIXEL 9 9 CRTC5_DISPOUT_HALF_RATE_EN 11 11 CRTC5_DISPOUT_FIFO_ERROR 14 15 CRTC5_DISPOUT_ERROR_COUNT 16 27 mmDP_DTO5_PHASE 0 0x155 1 0 4294967295 DP_DTO5_PHASE 0 31 mmDP_DTO5_MODULO 0 0x156 1 0 4294967295 DP_DTO5_MODULO 0 31 mmCRTC5_PHYPLL_PIXEL_RATE_CNTL 0 0x157 2 0 4294967295 CRTC5_PHYPLL_PIXEL_RATE_SOURCE 0 2 CRTC5_PIXEL_RATE_PLL_SOURCE 4 4 mmDCCG_SOFT_RESET 0 0x15f 16 0 4294967295 REFCLK_SOFT_RESET 0 0 PCIE_REFCLK_SOFT_RESET 1 1 SOFT_RESET_DVO 2 2 DVO_ENABLE_RST 3 3 AUDIO_DTO2_CLK_SOFT_RESET 4 4 DPREFCLK_SOFT_RESET 8 8 AMCLK0_SOFT_RESET 12 12 AMCLK1_SOFT_RESET 13 13 P0PLL_CFG_IF_SOFT_RESET 14 14 P1PLL_CFG_IF_SOFT_RESET 15 15 P2PLL_CFG_IF_SOFT_RESET 16 16 A0PLL_CFG_IF_SOFT_RESET 17 17 A1PLL_CFG_IF_SOFT_RESET 18 18 C0PLL_CFG_IF_SOFT_RESET 19 19 C1PLL_CFG_IF_SOFT_RESET 20 20 C2PLL_CFG_IF_SOFT_RESET 21 21 mmSYMCLKA_CLOCK_ENABLE 0 0x160 3 0 4294967295 SYMCLKA_CLOCK_ENABLE 0 0 SYMCLKA_FE_FORCE_EN 4 4 SYMCLKA_FE_FORCE_SRC 8 10 mmSYMCLKB_CLOCK_ENABLE 0 0x161 3 0 4294967295 SYMCLKB_CLOCK_ENABLE 0 0 SYMCLKB_FE_FORCE_EN 4 4 SYMCLKB_FE_FORCE_SRC 8 10 mmSYMCLKC_CLOCK_ENABLE 0 0x162 3 0 4294967295 SYMCLKC_CLOCK_ENABLE 0 0 SYMCLKC_FE_FORCE_EN 4 4 SYMCLKC_FE_FORCE_SRC 8 10 mmSYMCLKD_CLOCK_ENABLE 0 0x163 3 0 4294967295 SYMCLKD_CLOCK_ENABLE 0 0 SYMCLKD_FE_FORCE_EN 4 4 SYMCLKD_FE_FORCE_SRC 8 10 mmSYMCLKE_CLOCK_ENABLE 0 0x164 3 0 4294967295 SYMCLKE_CLOCK_ENABLE 0 0 SYMCLKE_FE_FORCE_EN 4 4 SYMCLKE_FE_FORCE_SRC 8 10 mmSYMCLKF_CLOCK_ENABLE 0 0x165 3 0 4294967295 SYMCLKF_CLOCK_ENABLE 0 0 SYMCLKF_FE_FORCE_EN 4 4 SYMCLKF_FE_FORCE_SRC 8 10 mmDPDBG_CLK_FORCE_CONTROL 0 0x10d 2 0 4294967295 DPDBG_CLK_FORCE_EN 4 4 DPDBG_CLK_FORCE_SRC 8 10 mmDCCG_AUDIO_DTO_SOURCE 0 0x16b 7 0 4294967295 DCCG_AUDIO_DTO0_SOURCE_SEL 0 2 DCCG_AUDIO_DTO_SEL 4 5 DCCG_AUDIO_DTO2_SOURCE_SEL 12 13 DCCG_AUDIO_DTO2_CLOCK_EN 16 16 DCCG_AUDIO_DTO2_USE_512FBR_DTO 20 20 DCCG_AUDIO_DTO0_USE_512FBR_DTO 24 24 DCCG_AUDIO_DTO1_USE_512FBR_DTO 28 28 mmDCCG_AUDIO_DTO0_PHASE 0 0x16c 1 0 4294967295 DCCG_AUDIO_DTO0_PHASE 0 31 mmDCCG_AUDIO_DTO0_MODULE 0 0x16d 1 0 4294967295 DCCG_AUDIO_DTO0_MODULE 0 31 mmDCCG_AUDIO_DTO1_PHASE 0 0x16e 1 0 4294967295 DCCG_AUDIO_DTO1_PHASE 0 31 mmDCCG_AUDIO_DTO1_MODULE 0 0x16f 1 0 4294967295 DCCG_AUDIO_DTO1_MODULE 0 31 mmDCCG_TEST_DEBUG_INDEX 0 0x17c 2 0 4294967295 DCCG_TEST_DEBUG_INDEX 0 7 DCCG_TEST_DEBUG_WRITE_EN 8 8 mmDCCG_TEST_DEBUG_DATA 0 0x17d 1 0 4294967295 DCCG_TEST_DEBUG_DATA 0 31 mmDCCG_TEST_CLK_SEL 0 0x17e 4 0 4294967295 DCCG_TEST_CLK_GENERICA_SEL 0 8 DCCG_TEST_CLK_GENERICA_INV 12 12 DCCG_TEST_CLK_GENERICB_SEL 16 24 DCCG_TEST_CLK_GENERICB_INV 28 28 mmCPLL_MACRO_CNTL_RESERVED0 0 0x5fd0 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED0 0 0x5fd0 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED0 0 0x5fdc 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED0 0 0x5fe8 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED0 0 0x5ff4 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED1 0 0x5fd1 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED1 0 0x5fd1 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED1 0 0x5fdd 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED1 0 0x5fe9 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED1 0 0x5ff5 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED2 0 0x5fd2 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED2 0 0x5fd2 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED2 0 0x5fde 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED2 0 0x5fea 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED2 0 0x5ff6 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED3 0 0x5fd3 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED3 0 0x5fd3 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED3 0 0x5fdf 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED3 0 0x5feb 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED3 0 0x5ff7 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED4 0 0x5fd4 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED4 0 0x5fd4 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED4 0 0x5fe0 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED4 0 0x5fec 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED4 0 0x5ff8 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED5 0 0x5fd5 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED5 0 0x5fd5 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED5 0 0x5fe1 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED5 0 0x5fed 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED5 0 0x5ff9 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED6 0 0x5fd6 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED6 0 0x5fd6 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED6 0 0x5fe2 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED6 0 0x5fee 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED6 0 0x5ffa 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED7 0 0x5fd7 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED7 0 0x5fd7 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED7 0 0x5fe3 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED7 0 0x5fef 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED7 0 0x5ffb 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED8 0 0x5fd8 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED8 0 0x5fd8 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED8 0 0x5fe4 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED8 0 0x5ff0 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED8 0 0x5ffc 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED9 0 0x5fd9 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED9 0 0x5fd9 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED9 0 0x5fe5 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED9 0 0x5ff1 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED9 0 0x5ffd 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED10 0 0x5fda 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED10 0 0x5fda 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED10 0 0x5fe6 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED10 0 0x5ff2 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED10 0 0x5ffe 0 0 4294967295 mmCPLL_MACRO_CNTL_RESERVED11 0 0x5fdb 1 0 4294967295 CPLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED11 0 0x5fdb 0 0 4294967295 mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED11 0 0x5fe7 0 0 4294967295 mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED11 0 0x5ff3 0 0 4294967295 mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED11 0 0x5fff 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED0 0 0x1700 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED0 0 0x1700 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED0 0 0x172a 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED0 0 0x1754 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED1 0 0x1701 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED1 0 0x1701 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED1 0 0x172b 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED1 0 0x1755 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED2 0 0x1702 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED2 0 0x1702 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED2 0 0x172c 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED2 0 0x1756 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED3 0 0x1703 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED3 0 0x1703 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED3 0 0x172d 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED3 0 0x1757 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED4 0 0x1704 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED4 0 0x1704 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED4 0 0x172e 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED4 0 0x1758 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED5 0 0x1705 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED5 0 0x1705 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED5 0 0x172f 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED5 0 0x1759 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED6 0 0x1706 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED6 0 0x1706 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED6 0 0x1730 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED6 0 0x175a 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED7 0 0x1707 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED7 0 0x1707 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED7 0 0x1731 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED7 0 0x175b 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED8 0 0x1708 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED8 0 0x1708 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED8 0 0x1732 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED8 0 0x175c 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED9 0 0x1709 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED9 0 0x1709 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED9 0 0x1733 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED9 0 0x175d 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED10 0 0x170a 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED10 0 0x170a 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED10 0 0x1734 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED10 0 0x175e 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED11 0 0x170b 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED11 0 0x170b 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED11 0 0x1735 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED11 0 0x175f 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED12 0 0x170c 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED12 0 0x170c 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED12 0 0x1736 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED12 0 0x1760 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED13 0 0x170d 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED13 0 0x170d 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED13 0 0x1737 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED13 0 0x1761 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED14 0 0x170e 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED14 0 0x170e 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED14 0 0x1738 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED14 0 0x1762 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED15 0 0x170f 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED15 0 0x170f 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED15 0 0x1739 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED15 0 0x1763 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED16 0 0x1710 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED16 0 0x1710 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED16 0 0x173a 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED16 0 0x1764 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED17 0 0x1711 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED17 0 0x1711 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED17 0 0x173b 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED17 0 0x1765 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED18 0 0x1712 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED18 0 0x1712 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED18 0 0x173c 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED18 0 0x1766 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED19 0 0x1713 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED19 0 0x1713 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED19 0 0x173d 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED19 0 0x1767 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED20 0 0x1714 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED20 0 0x1714 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED20 0 0x173e 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED20 0 0x1768 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED21 0 0x1715 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED21 0 0x1715 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED21 0 0x173f 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED21 0 0x1769 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED22 0 0x1716 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED22 0 0x1716 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED22 0 0x1740 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED22 0 0x176a 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED23 0 0x1717 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED23 0 0x1717 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED23 0 0x1741 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED23 0 0x176b 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED24 0 0x1718 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED24 0 0x1718 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED24 0 0x1742 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED24 0 0x176c 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED25 0 0x1719 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED25 0 0x1719 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED25 0 0x1743 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED25 0 0x176d 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED26 0 0x171a 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED26 0 0x171a 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED26 0 0x1744 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED26 0 0x176e 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED27 0 0x171b 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED27 0 0x171b 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED27 0 0x1745 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED27 0 0x176f 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED28 0 0x171c 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED28 0 0x171c 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED28 0 0x1746 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED28 0 0x1770 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED29 0 0x171d 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED29 0 0x171d 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED29 0 0x1747 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED29 0 0x1771 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED30 0 0x171e 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED30 0 0x171e 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED30 0 0x1748 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED30 0 0x1772 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED31 0 0x171f 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED31 0 0x171f 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED31 0 0x1749 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED31 0 0x1773 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED32 0 0x1720 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED32 0 0x1720 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED32 0 0x174a 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED32 0 0x1774 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED33 0 0x1721 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED33 0 0x1721 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED33 0 0x174b 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED33 0 0x1775 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED34 0 0x1722 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED34 0 0x1722 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED34 0 0x174c 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED34 0 0x1776 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED35 0 0x1723 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED35 0 0x1723 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED35 0 0x174d 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED35 0 0x1777 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED36 0 0x1724 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED36 0 0x1724 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED36 0 0x174e 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED36 0 0x1778 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED37 0 0x1725 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED37 0 0x1725 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED37 0 0x174f 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED37 0 0x1779 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED38 0 0x1726 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED38 0 0x1726 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED38 0 0x1750 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED38 0 0x177a 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED39 0 0x1727 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED39 0 0x1727 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED39 0 0x1751 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED39 0 0x177b 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED40 0 0x1728 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED40 0 0x1728 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED40 0 0x1752 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED40 0 0x177c 0 0 4294967295 mmPLL_MACRO_CNTL_RESERVED41 0 0x1729 1 0 4294967295 PLL_MACRO_CNTL_RESERVED 0 31 mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED41 0 0x1729 0 0 4294967295 mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED41 0 0x1753 0 0 4294967295 mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED41 0 0x177d 0 0 4294967295 mmDENTIST_DISPCLK_CNTL 0 0x124 10 0 4294967295 DENTIST_DISPCLK_WDIVIDER 0 6 DENTIST_DISPCLK_RDIVIDER 8 14 DENTIST_DISPCLK_CHG_MODE 15 16 DENTIST_DISPCLK_CHGTOG 17 17 DENTIST_DISPCLK_DONETOG 18 18 DENTIST_DISPCLK_CHG_DONE 19 19 DENTIST_DPREFCLK_CHG_DONE 20 20 DENTIST_DPREFCLK_CHGTOG 21 21 DENTIST_DPREFCLK_DONETOG 22 22 DENTIST_DPREFCLK_WDIVIDER 24 30 mmDCDEBUG_BUS_CLK1_SEL 0 0x16c4 1 0 4294967295 DCDEBUG_BUS_CLK1_SEL 0 31 mmDCDEBUG_BUS_CLK2_SEL 0 0x16c5 1 0 4294967295 DCDEBUG_BUS_CLK2_SEL 0 31 mmDCDEBUG_BUS_CLK3_SEL 0 0x16c6 1 0 4294967295 DCDEBUG_BUS_CLK3_SEL 0 31 mmDCDEBUG_BUS_CLK4_SEL 0 0x16c7 1 0 4294967295 DCDEBUG_BUS_CLK4_SEL 0 31 mmDCDEBUG_BUS_CLK5_SEL 0 0x16c8 1 0 4294967295 DCDEBUG_BUS_CLK5_SEL 0 31 mmDCDEBUG_OUT_PIN_OVERRIDE 0 0x16c9 6 0 4294967295 DCDEBUG_OUT_OVERRIDE1_PIN_SEL 0 4 DCDEBUG_OUT_OVERRIDE1_REGBIT_SEL 5 9 DCDEBUG_OUT_OVERRIDE1_EN 12 12 DCDEBUG_OUT_OVERRIDE2_PIN_SEL 15 19 DCDEBUG_OUT_OVERRIDE2_REGBIT_SEL 20 24 DCDEBUG_OUT_OVERRIDE2_EN 28 28 mmDCDEBUG_OUT_CNTL 0 0x16ca 3 0 4294967295 DCDEBUG_BLOCK_SEL 0 4 DCDEBUG_OUT_24BIT_SEL 23 23 DCDEBUG_CLK_SEL 24 28 mmDCDEBUG_OUT_DATA 0 0x16cb 1 0 4294967295 DCDEBUG_OUT_DATA 0 31 mmDMIF_CONTROL 0 0x2f6 10 0 4294967295 DMIF_BUFF_SIZE 0 1 DMIF_GROUP_REQUESTS_IN_CHUNK 2 2 DMIF_DISABLE_EARLY_RECEIVED_LEVEL_COUNT 4 4 DMIF_REQ_BURST_SIZE 8 10 DMIF_UNDERFLOW_RECOVERY_EN 11 11 DMIF_FORCE_TOTAL_REQ_BURST_SIZE 12 16 DMIF_MAX_TOTAL_OUTSTANDING_CHUNK_REQUESTS 17 22 DMIF_DELAY_ARBITRATION 24 28 DMIF_CHUNK_BUFF_MARGIN 29 30 DMIF_PSTATE_URGENT_DISABLE 31 31 mmDMIF_STATUS 0 0x2f7 9 0 4294967295 DMIF_MC_SEND_ON_IDLE 0 5 DMIF_CLEAR_MC_SEND_ON_IDLE 8 13 DMIF_MC_LATENCY_COUNTER_ENABLE 16 16 DMIF_MC_LATENCY_COUNTER_URGENT_ONLY 17 17 DMIF_MC_LATENCY_COUNTER_SOURCE_SELECT 20 23 DMIF_PERFORMANCE_COUNTER_SOURCE_SELECT 24 27 DMIF_UNDERFLOW 28 28 DMIF_MC_LATENCY_TAP_POINT 29 30 DMIF_MC_LATENCY_REQ_TYPE 31 31 mmDMIFV_STATUS 0 0x2f5 2 0 4294967295 DMIFV_MC_SEND_ON_IDLE 0 3 DMIFV_CLEAR_MC_SEND_ON_IDLE 8 11 mmDMIF_HW_DEBUG 0 0x2f8 1 0 4294967295 DMIF_HW_DEBUG 0 31 mmDMIF_ARBITRATION_CONTROL 0 0x2f9 2 0 4294967295 DMIF_ARBITRATION_REFERENCE_CLOCK_PERIOD 0 15 PIPE_SWITCH_EFFICIENCY_WEIGHT 16 31 mmPIPE0_ARBITRATION_CONTROL3 0 0x2fa 1 0 4294967295 EFFICIENCY_WEIGHT 0 15 mmPIPE1_ARBITRATION_CONTROL3 0 0x2fb 1 0 4294967295 EFFICIENCY_WEIGHT 0 15 mmPIPE2_ARBITRATION_CONTROL3 0 0x2fc 1 0 4294967295 EFFICIENCY_WEIGHT 0 15 mmPIPE3_ARBITRATION_CONTROL3 0 0x2fd 1 0 4294967295 EFFICIENCY_WEIGHT 0 15 mmPIPE4_ARBITRATION_CONTROL3 0 0x2fe 1 0 4294967295 EFFICIENCY_WEIGHT 0 15 mmPIPE5_ARBITRATION_CONTROL3 0 0x2ff 1 0 4294967295 EFFICIENCY_WEIGHT 0 15 mmPIPE6_ARBITRATION_CONTROL3 0 0x32a 1 0 4294967295 EFFICIENCY_WEIGHT 0 15 mmPIPE7_ARBITRATION_CONTROL3 0 0x32b 1 0 4294967295 EFFICIENCY_WEIGHT 0 15 mmDMIF_P_VMID 0 0x300 8 0 4294967295 P_VMID_PIPE0 0 3 P_VMID_PIPE1 4 7 P_VMID_PIPE2 8 11 P_VMID_PIPE3 12 15 P_VMID_PIPE4 16 19 P_VMID_PIPE5 20 23 P_VMID_PIPE6 24 27 P_VMID_PIPE7 28 31 mmDMIF_URG_OVERRIDE 0 0x329 2 0 4294967295 DMIF_URG_OVERRIDE_EN 0 0 DMIF_URG_OVERRIDE_LEVEL 4 7 mmDMIF_TEST_DEBUG_INDEX 0 0x301 2 0 4294967295 DMIF_TEST_DEBUG_INDEX 0 7 DMIF_TEST_DEBUG_WRITE_EN 8 8 mmDMIF_TEST_DEBUG_DATA 0 0x302 1 0 4294967295 DMIF_TEST_DEBUG_DATA 0 31 ixDMIF_DEBUG02_CORE0 2 0x2 3 0 4294967295 DB_DATA 0 15 MC_RDRET_COUNT_EN 16 16 MC_RDRET_COUNTER 17 27 ixDMIF_DEBUG02_CORE1 2 0xa 3 0 4294967295 DB_DATA 0 15 MC_RDRET_COUNT_EN 16 16 MC_RDRET_COUNTER 17 27 mmDMIF_ADDR_CALC 0 0x303 2 0 4294967295 ADDR_CONFIG_PIPE_INTERLEAVE_SIZE 4 6 ADDR_CONFIG_ROW_SIZE 28 29 mmDMIF_STATUS2 0 0x304 8 0 4294967295 DMIF_PIPE0_DISPCLK_STATUS 0 0 DMIF_PIPE1_DISPCLK_STATUS 1 1 DMIF_PIPE2_DISPCLK_STATUS 2 2 DMIF_PIPE3_DISPCLK_STATUS 3 3 DMIF_PIPE4_DISPCLK_STATUS 4 4 DMIF_PIPE5_DISPCLK_STATUS 5 5 DMIF_CHUNK_TRACKER_SCLK_STATUS 8 8 DMIF_FBC_TRACKER_SCLK_STATUS 9 9 mmPIPE0_MAX_REQUESTS 0 0x305 1 0 4294967295 MAX_REQUESTS 0 9 mmPIPE1_MAX_REQUESTS 0 0x306 1 0 4294967295 MAX_REQUESTS 0 9 mmPIPE2_MAX_REQUESTS 0 0x307 1 0 4294967295 MAX_REQUESTS 0 9 mmPIPE3_MAX_REQUESTS 0 0x308 1 0 4294967295 MAX_REQUESTS 0 9 mmPIPE4_MAX_REQUESTS 0 0x309 1 0 4294967295 MAX_REQUESTS 0 9 mmPIPE5_MAX_REQUESTS 0 0x30a 1 0 4294967295 MAX_REQUESTS 0 9 mmPIPE6_MAX_REQUESTS 0 0x32c 1 0 4294967295 MAX_REQUESTS 0 9 mmPIPE7_MAX_REQUESTS 0 0x32d 1 0 4294967295 MAX_REQUESTS 0 9 mmDVMM_REG_RD_STATUS 0 0x32e 1 0 4294967295 DVMM_REG_RD_STATUS 0 0 mmDVMM_REG_RD_DATA 0 0x32f 1 0 4294967295 DVMM_REG_RD_DATA 0 31 mmDVMM_PTE_REQ 0 0x330 3 0 4294967295 MAX_PTEREQ_TO_ISSUE 0 7 HFLIP_PTEREQ_PER_CHUNK_INT 8 15 HFLIP_PTEREQ_PER_CHUNK_MULTIPLIER 16 21 mmDVMM_CNTL 0 0x331 7 0 4294967295 PDE_CACHE_INVALIDATE_CNTL 0 1 DEBUG_SYSTEM_ACCESS_MODE 4 5 FORCE_SYSTEM_ACCESS_MODE 7 7 DBG_DCE_VMID 8 11 FORCE_DBG_DCE_VMID 15 15 OVERRIDE_SNOOP 17 17 ENABLE_PDE_INVALIDATE 18 18 mmDVMM_FAULT_STATUS 0 0x332 1 0 4294967295 DVMM_FAULT_STATUS 0 31 mmDVMM_FAULT_ADDR 0 0x333 1 0 4294967295 DVMM_FAULT_ADDR 0 31 mmLOW_POWER_TILING_CONTROL 0 0x30b 7 0 4294967295 LOW_POWER_TILING_ENABLE 0 0 LOW_POWER_TILING_MODE 3 4 LOW_POWER_TILING_NUM_PIPES 5 7 LOW_POWER_TILING_NUM_BANKS 8 10 LOW_POWER_TILING_PIPE_INTERLEAVE_SIZE 11 11 LOW_POWER_TILING_ROW_SIZE 12 14 LOW_POWER_TILING_ROWS_PER_CHAN 16 27 mmMCIF_CONTROL 0 0x30c 8 0 4294967295 MCIF_BUFF_SIZE 0 1 ADDRESS_TRANSLATION_ENABLE 4 4 PRIVILEGED_ACCESS_ENABLE 8 8 MCIF_SLOW_REQ_INTERVAL 12 15 LOW_READ_URG_LEVEL 16 23 MC_CLEAN_DEASSERT_LATENCY 24 29 MCIF_MC_LATENCY_COUNTER_ENABLE 30 30 MCIF_MC_LATENCY_COUNTER_URGENT_ONLY 31 31 mmMCIF_WRITE_COMBINE_CONTROL 0 0x30d 2 0 4294967295 MCIF_WRITE_COMBINE_TIMEOUT 0 7 VIP_WRITE_COMBINE_TIMEOUT 8 15 mmMCIF_TEST_DEBUG_INDEX 0 0x30e 2 0 4294967295 MCIF_TEST_DEBUG_INDEX 0 7 MCIF_TEST_DEBUG_WRITE_EN 8 8 mmMCIF_TEST_DEBUG_DATA 0 0x30f 1 0 4294967295 MCIF_TEST_DEBUG_DATA 0 31 ixIDDCCIF02_DBG_DCCIF_C 2 0x9 1 0 4294967295 DBG_DCCIF_C 0 31 ixIDDCCIF04_DBG_DCCIF_E 2 0xb 1 0 4294967295 DBG_DCCIF_E 0 31 ixIDDCCIF05_DBG_DCCIF_F 2 0xc 1 0 4294967295 DBG_DCCIF_F 0 31 mmMCIF_VMID 0 0x310 2 0 4294967295 MCIF_WR_VMID 0 3 VIP_WR_VMID 4 7 mmMCIF_MEM_CONTROL 0 0x311 5 0 4294967295 MCIFMEM_CACHE_MODE_DIS 0 0 MCIFMEM_CACHE_MODE 4 5 MCIFMEM_CACHE_SIZE 8 15 MCIFMEM_CACHE_PIPE 16 18 MCIFMEM_CACHE_TYPE 19 20 mmCC_DC_PIPE_DIS 0 0x312 2 0 4294967295 DC_PIPE_DIS 1 6 DC_UNDERLAY_PIPE_DIS 16 21 mmMC_DC_INTERFACE_NACK_STATUS 0 0x313 8 0 4294967295 DMIF_RDRET_NACK_OCCURRED 0 0 DMIF_RDRET_NACK_CLEAR 4 4 VIP_WRRET_NACK_OCCURRED 8 8 VIP_WRRET_NACK_CLEAR 12 12 MCIF_RDRET_NACK_OCCURRED 16 16 MCIF_RDRET_NACK_CLEAR 20 20 MCIF_WRRET_NACK_OCCURRED 24 24 MCIF_WRRET_NACK_CLEAR 28 28 mmRBBMIF_TIMEOUT 0 0x314 2 0 4294967295 RBBMIF_TIMEOUT_DELAY 0 19 RBBMIF_TIMEOUT_TO_REQ_HOLD 20 31 mmRBBMIF_STATUS 0 0x315 5 0 4294967295 RBBMIF_TIMEOUT_CLIENTS_DEC 0 15 RBBMIF_TIMEOUT_OP 28 28 RBBMIF_TIMEOUT_RDWR_STATUS 29 29 RBBMIF_TIMEOUT_ACK 30 30 RBBMIF_TIMEOUT_MASK 31 31 mmRBBMIF_TIMEOUT_DIS 0 0x316 16 0 4294967295 CLIENT0_TIMEOUT_DIS 0 0 CLIENT1_TIMEOUT_DIS 1 1 CLIENT2_TIMEOUT_DIS 2 2 CLIENT3_TIMEOUT_DIS 3 3 CLIENT4_TIMEOUT_DIS 4 4 CLIENT5_TIMEOUT_DIS 5 5 CLIENT6_TIMEOUT_DIS 6 6 CLIENT7_TIMEOUT_DIS 7 7 CLIENT8_TIMEOUT_DIS 8 8 CLIENT9_TIMEOUT_DIS 9 9 CLIENT10_TIMEOUT_DIS 10 10 CLIENT11_TIMEOUT_DIS 11 11 CLIENT12_TIMEOUT_DIS 12 12 CLIENT13_TIMEOUT_DIS 13 13 CLIENT14_TIMEOUT_DIS 14 14 CLIENT15_TIMEOUT_DIS 15 15 mmRBBMIF_STATUS_FLAG 0 0x327 4 0 4294967295 RBBMIF_STATE 0 1 RBBMIF_READ_TIMEOUT 4 4 RBBMIF_FIFO_EMPTY 5 5 RBBMIF_FIFO_FULL 6 6 mmDCI_MEM_PWR_STATUS 0 0x317 14 0 4294967295 DMIF_RDREQ_MEM1_PWR_STATE 0 1 DMIF_RDREQ_MEM2_PWR_STATE 2 3 MCIF_RDREQ_MEM_PWR_STATE 4 4 MCIF_WRREQ_MEM_PWR_STATE 6 6 VGA_MEM_PWR_STATE 8 8 DMCU_ERAM_MEM_PWR_STATE 9 10 DMCU_IRAM_MEM_PWR_STATE 11 11 FBC_MEM_PWR_STATE 12 13 MCIF_MEM_PWR_STATE 14 15 VIP_MEM_PWR_STATE 22 22 DMIF0_ASYNC_MEM_PWR_STATE 24 25 DMIF0_DATA_MEM_PWR_STATE 26 27 DMIF0_CHUNK_MEM_PWR_STATE 28 28 DMIF_RDREQ_MEM3_PWR_STATE 30 31 mmDCI_MEM_PWR_STATUS2 0 0x318 15 0 4294967295 DMIF1_ASYNC_MEM_PWR_STATE 0 1 DMIF1_DATA_MEM_PWR_STATE 2 3 DMIF1_CHUNK_MEM_PWR_STATE 4 4 DMIF2_ASYNC_MEM_PWR_STATE 5 6 DMIF2_DATA_MEM_PWR_STATE 7 8 DMIF2_CHUNK_MEM_PWR_STATE 9 9 DMIF3_ASYNC_MEM_PWR_STATE 10 11 DMIF3_DATA_MEM_PWR_STATE 12 13 DMIF3_CHUNK_MEM_PWR_STATE 14 14 DMIF4_ASYNC_MEM_PWR_STATE 15 16 DMIF4_DATA_MEM_PWR_STATE 17 18 DMIF4_CHUNK_MEM_PWR_STATE 19 19 DMIF5_ASYNC_MEM_PWR_STATE 20 21 DMIF5_DATA_MEM_PWR_STATE 22 23 DMIF5_CHUNK_MEM_PWR_STATE 24 24 mmDCI_MEM_PWR_STATUS3 0 0x33d 12 0 4294967295 MCIF_DWB_LUMA_MEM0_PWR_STATE 0 1 MCIF_DWB_LUMA_MEM1_PWR_STATE 2 3 MCIF_DWB_CHROMA_MEM0_PWR_STATE 4 5 MCIF_DWB_CHROMA_MEM1_PWR_STATE 6 7 MCIF_CWB0_LUMA_MEM0_PWR_STATE 8 9 MCIF_CWB0_LUMA_MEM1_PWR_STATE 10 11 MCIF_CWB0_CHROMA_MEM0_PWR_STATE 12 13 MCIF_CWB0_CHROMA_MEM1_PWR_STATE 14 15 MCIF_CWB1_LUMA_MEM0_PWR_STATE 16 17 MCIF_CWB1_LUMA_MEM1_PWR_STATE 18 19 MCIF_CWB1_CHROMA_MEM0_PWR_STATE 20 21 MCIF_CWB1_CHROMA_MEM1_PWR_STATE 22 23 mmDCI_CLK_CNTL 0 0x319 24 0 4294967295 DCI_TEST_CLK_SEL 0 4 DISPCLK_R_DCI_GATE_DIS 5 5 DISPCLK_M_GATE_DIS 6 6 SCLK_G_STREAM_AZ_GATE_DIS 7 7 SCLK_R_AZ_GATE_DIS 8 8 DISPCLK_G_FBC_GATE_DIS 9 9 DISPCLK_G_DMIFV1_L_GATE_DIS 10 10 DISPCLK_G_VGA_GATE_DIS 11 11 DISPCLK_G_DMIFV1_C_GATE_DIS 12 12 DISPCLK_G_VIP_GATE_DIS 13 13 VPCLK_POL 14 14 DISPCLK_G_DMCU_GATE_DIS 15 15 DISPCLK_G_DMIF0_GATE_DIS 16 16 DISPCLK_G_DMIF1_GATE_DIS 17 17 DISPCLK_G_DMIF2_GATE_DIS 18 18 DISPCLK_G_DMIF3_GATE_DIS 19 19 DISPCLK_G_DMIF4_GATE_DIS 20 20 DISPCLK_G_DMIF5_GATE_DIS 21 21 SCLK_G_DMIF_GATE_DIS 22 22 SCLK_G_DMIFTRK_GATE_DIS 23 23 SCLK_G_CNTL_AZ_GATE_DIS 24 24 DISPCLK_G_DMIFV0_L_GATE_DIS 25 25 DISPCLK_G_DMIFV0_C_GATE_DIS 26 26 DCI_PG_TEST_CLK_SEL 27 31 mmDCI_CLK_RAMP_CNTL 0 0x31a 6 0 4294967295 DISPCLK_G_MCIF_DWB_GATE_DIS 0 0 SCLK_G_MCIF_DWB_GATE_DIS 1 1 DISPCLK_G_MCIF_CWB0_GATE_DIS 2 2 SCLK_G_MCIF_CWB0_GATE_DIS 3 3 DISPCLK_G_MCIF_CWB1_GATE_DIS 4 4 SCLK_G_MCIF_CWB1_GATE_DIS 31 31 mmDCI_MEM_PWR_CNTL 0 0x31b 24 0 4294967295 DMIF_RDREQ_MEM_PWR_FORCE 0 1 DMIF_RDREQ_MEM_PWR_DIS 2 2 MCIF_RDREQ_MEM_PWR_FORCE 3 3 MCIF_RDREQ_MEM_PWR_DIS 4 4 MCIF_WRREQ_MEM_PWR_FORCE 5 5 MCIF_WRREQ_MEM_PWR_DIS 6 6 VGA_MEM_PWR_FORCE 7 7 VGA_MEM_PWR_DIS 8 8 DMCU_ERAM_MEM_PWR_FORCE 9 10 DMCU_ERAM_MEM_PWR_DIS 11 11 DMCU_IRAM_MEM_PWR_FORCE 12 12 DMCU_IRAM_MEM_PWR_DIS 13 13 FBC_MEM_PWR_FORCE 14 15 FBC_MEM_PWR_DIS 16 16 MCIF_MEM_PWR_FORCE 17 18 MCIF_MEM_PWR_DIS 19 19 MCIF_DWB_MEM_PWR_FORCE 20 21 MCIF_DWB_MEM_PWR_DIS 22 22 MCIF_CWB0_MEM_PWR_FORCE 23 24 MCIF_CWB0_MEM_PWR_DIS 25 25 MCIF_CWB1_MEM_PWR_FORCE 26 27 MCIF_CWB1_MEM_PWR_DIS 28 28 VIP_MEM_PWR_FORCE 29 29 VIP_MEM_PWR_DIS 30 30 mmDCI_MEM_PWR_CNTL2 0 0x31c 24 0 4294967295 DMIF0_ASYNC_MEM_PWR_FORCE 0 1 DMIF0_ASYNC_MEM_PWR_DIS 2 2 DMIF0_DATA_MEM_PWR_FORCE 3 4 DMIF0_DATA_MEM_PWR_DIS 5 5 DMIF0_CHUNK_MEM_PWR_FORCE 6 6 DMIF0_CHUNK_MEM_PWR_DIS 7 7 DMIF1_ASYNC_MEM_PWR_FORCE 8 9 DMIF1_ASYNC_MEM_PWR_DIS 10 10 DMIF1_DATA_MEM_PWR_FORCE 11 12 DMIF1_DATA_MEM_PWR_DIS 13 13 DMIF1_CHUNK_MEM_PWR_FORCE 14 14 DMIF1_CHUNK_MEM_PWR_DIS 15 15 DMIF2_ASYNC_MEM_PWR_FORCE 16 17 DMIF2_ASYNC_MEM_PWR_DIS 18 18 DMIF2_DATA_MEM_PWR_FORCE 19 20 DMIF2_DATA_MEM_PWR_DIS 21 21 DMIF2_CHUNK_MEM_PWR_FORCE 22 22 DMIF2_CHUNK_MEM_PWR_DIS 23 23 DMIF3_ASYNC_MEM_PWR_FORCE 24 25 DMIF3_ASYNC_MEM_PWR_DIS 26 26 DMIF3_DATA_MEM_PWR_FORCE 27 28 DMIF3_DATA_MEM_PWR_DIS 29 29 DMIF3_CHUNK_MEM_PWR_FORCE 30 30 DMIF3_CHUNK_MEM_PWR_DIS 31 31 mmDCI_MEM_PWR_CNTL3 0 0x31d 20 0 4294967295 DMIF4_ASYNC_MEM_PWR_FORCE 0 1 DMIF4_ASYNC_MEM_PWR_DIS 2 2 DMIF4_DATA_MEM_PWR_FORCE 3 4 DMIF4_DATA_MEM_PWR_DIS 5 5 DMIF4_CHUNK_MEM_PWR_FORCE 6 6 DMIF4_CHUNK_MEM_PWR_DIS 7 7 DMIF5_ASYNC_MEM_PWR_FORCE 8 9 DMIF5_ASYNC_MEM_PWR_DIS 10 10 DMIF5_DATA_MEM_PWR_FORCE 11 12 DMIF5_DATA_MEM_PWR_DIS 13 13 DMIF5_CHUNK_MEM_PWR_FORCE 14 14 DMIF5_CHUNK_MEM_PWR_DIS 15 15 DMIF_RDREQ_MEM_PWR_MODE_SEL 16 17 DMIF_ASYNC_MEM_PWR_MODE_SEL 18 19 DMIF_DATA_MEM_PWR_MODE_SEL 20 21 DMCU_ERAM_MEM_PWR_MODE_SEL 22 22 FBC_MEM_PWR_MODE_SEL 23 24 MCIF_CWB0_MEM_PWR_MODE_SEL 25 26 MCIF_CWB1_MEM_PWR_MODE_SEL 27 28 MCIF_DWB_MEM_PWR_MODE_SEL 29 30 mmDCI_MEM_PWR_CNTL4 0 0x33b 6 0 4294967295 MCIF_DWB_LUMA_MEM_EN_NUM 0 0 MCIF_DWB_CHROMA_MEM_EN_NUM 1 1 MCIF_CWB0_LUMA_MEM_EN_NUM 2 2 MCIF_CWB0_CHROMA_MEM_EN_NUM 3 3 MCIF_CWB1_LUMA_MEM_EN_NUM 4 4 MCIF_CWB1_CHROMA_MEM_EN_NUM 5 5 mmDVMM_PTE_PGMEM_CONTROL 0 0x335 17 0 4294967295 DVMM_PTE0_MEM_PWR_FORCE 0 1 DVMM_PTE0_MEM_PWR_DIS 2 2 DVMM_PTE1_MEM_PWR_FORCE 3 4 DVMM_PTE1_MEM_PWR_DIS 5 5 DVMM_PTE2_MEM_PWR_FORCE 6 7 DVMM_PTE2_MEM_PWR_DIS 8 8 DVMM_PTE3_MEM_PWR_FORCE 9 10 DVMM_PTE3_MEM_PWR_DIS 11 11 DVMM_PTE4_MEM_PWR_FORCE 12 13 DVMM_PTE4_MEM_PWR_DIS 14 14 DVMM_PTE5_MEM_PWR_FORCE 15 16 DVMM_PTE5_MEM_PWR_DIS 17 17 DVMM_PTE6_MEM_PWR_FORCE 18 19 DVMM_PTE6_MEM_PWR_DIS 20 20 DVMM_PTE7_MEM_PWR_FORCE 21 22 DVMM_PTE7_MEM_PWR_DIS 23 23 DVMM_PTE_MEM_PWR_MODE_SEL 24 25 mmDVMM_PTE_PGMEM_STATE 0 0x336 8 0 4294967295 DVMM_PIPE0_PTE_PGMEM_STATE 0 1 DVMM_PIPE1_PTE_PGMEM_STATE 2 3 DVMM_PIPE2_PTE_PGMEM_STATE 4 5 DVMM_PIPE3_PTE_PGMEM_STATE 6 7 DVMM_PIPE4_PTE_PGMEM_STATE 8 9 DVMM_PIPE5_PTE_PGMEM_STATE 10 11 DVMM_PIPE6_PTE_PGMEM_STATE 12 13 DVMM_PIPE7_PTE_PGMEM_STATE 14 15 mmDCI_SOFT_RESET 0 0x328 19 0 4294967295 VGA_SOFT_RESET 0 0 VIP_SOFT_RESET 1 1 MCIF_SOFT_RESET 2 2 FBC_SOFT_RESET 3 3 DMIF0_SOFT_RESET 4 4 DMIF1_SOFT_RESET 5 5 DMIF2_SOFT_RESET 6 6 DMIF3_SOFT_RESET 7 7 DMIF4_SOFT_RESET 8 8 DMIF5_SOFT_RESET 9 9 DCFEV0_L_SOFT_RESET 10 10 DCFEV0_C_SOFT_RESET 11 11 DCFEV1_L_SOFT_RESET 12 12 DCFEV1_C_SOFT_RESET 13 13 DMIFARB_SOFT_RESET 14 14 MCIF_DWB_SOFT_RESET 16 16 MCIF_CWB0_SOFT_RESET 17 17 MCIF_CWB1_SOFT_RESET 18 18 MCIF_WB_SOFT_RESET 19 19 mmDCI_MISC 0 0x33c 2 0 4294967295 MCIF_WB_URG_OVRD 0 0 MCIF_WB_URG_LVL 1 4 mmDCI_TEST_DEBUG_INDEX 0 0x31e 2 0 4294967295 DCI_TEST_DEBUG_INDEX 0 7 DCI_TEST_DEBUG_WRITE_EN 8 8 mmDCI_TEST_DEBUG_DATA 0 0x31f 1 0 4294967295 DCI_TEST_DEBUG_DATA 0 31 mmDCI_DEBUG_CONFIG 0 0x320 3 0 4294967295 DCI_DBG_EN 0 0 DCI_DBG_BLOCK_SEL 4 7 DCI_DBG_CLOCK_SEL 8 11 mmPIPE0_DMIF_BUFFER_CONTROL 0 0x321 2 0 4294967295 DMIF_BUFFERS_ALLOCATED 0 2 DMIF_BUFFERS_ALLOCATION_COMPLETED 4 4 mmPIPE1_DMIF_BUFFER_CONTROL 0 0x322 2 0 4294967295 DMIF_BUFFERS_ALLOCATED 0 2 DMIF_BUFFERS_ALLOCATION_COMPLETED 4 4 mmPIPE2_DMIF_BUFFER_CONTROL 0 0x323 2 0 4294967295 DMIF_BUFFERS_ALLOCATED 0 2 DMIF_BUFFERS_ALLOCATION_COMPLETED 4 4 mmPIPE3_DMIF_BUFFER_CONTROL 0 0x324 2 0 4294967295 DMIF_BUFFERS_ALLOCATED 0 2 DMIF_BUFFERS_ALLOCATION_COMPLETED 4 4 mmPIPE4_DMIF_BUFFER_CONTROL 0 0x325 2 0 4294967295 DMIF_BUFFERS_ALLOCATED 0 2 DMIF_BUFFERS_ALLOCATION_COMPLETED 4 4 mmPIPE5_DMIF_BUFFER_CONTROL 0 0x326 2 0 4294967295 DMIF_BUFFERS_ALLOCATED 0 2 DMIF_BUFFERS_ALLOCATION_COMPLETED 4 4 mmDC_GENERICA 0 0x4800 6 0 4294967295 GENERICA_EN 0 0 GENERICA_SEL 7 11 GENERICA_UNIPHY_REFDIV_CLK_SEL 12 15 GENERICA_UNIPHY_FBDIV_CLK_SEL 16 19 GENERICA_UNIPHY_FBDIV_SSC_CLK_SEL 20 23 GENERICA_UNIPHY_FBDIV_CLK_DIV2_SEL 24 27 mmDC_GENERICB 0 0x4801 6 0 4294967295 GENERICB_EN 0 0 GENERICB_SEL 8 11 GENERICB_UNIPHY_REFDIV_CLK_SEL 12 15 GENERICB_UNIPHY_FBDIV_CLK_SEL 16 19 GENERICB_UNIPHY_FBDIV_SSC_CLK_SEL 20 23 GENERICB_UNIPHY_FBDIV_CLK_DIV2_SEL 24 27 mmDC_PAD_EXTERN_SIG 0 0x4802 2 0 4294967295 DC_PAD_EXTERN_SIG_SEL 0 3 MVP_PIXEL_SRC_STATUS 4 5 mmDC_REF_CLK_CNTL 0 0x4803 2 0 4294967295 HSYNCA_OUTPUT_SEL 0 1 GENLK_CLK_OUTPUT_SEL 8 9 mmDC_GPIO_DEBUG 0 0x4804 5 0 4294967295 DC_GPIO_VIP_DEBUG 0 0 DC_GPIO_MACRO_DEBUG 8 9 DC_GPIO_CHIP_DEBUG_OUT_PIN_SEL 16 16 DC_GPIO_DEBUG_BUS_FLOP_EN 17 17 DPRX_LOOPBACK_ENABLE 31 31 mmUNIPHYA_LINK_CNTL 0 0x4805 9 0 4294967295 UNIPHY_PFREQCHG 0 0 UNIPHY_PIXVLD_RESET 4 4 UNIPHY_MINIMUM_PIXVLD_LOW_DURATION 8 10 UNIPHY_CHANNEL0_INVERT 12 12 UNIPHY_CHANNEL1_INVERT 13 13 UNIPHY_CHANNEL2_INVERT 14 14 UNIPHY_CHANNEL3_INVERT 15 15 UNIPHY_LANE_STAGGER_DELAY 20 22 UNIPHY_LINK_ENABLE_HPD_MASK 24 25 mmUNIPHYB_LINK_CNTL 0 0x4807 9 0 4294967295 UNIPHY_PFREQCHG 0 0 UNIPHY_PIXVLD_RESET 4 4 UNIPHY_MINIMUM_PIXVLD_LOW_DURATION 8 10 UNIPHY_CHANNEL0_INVERT 12 12 UNIPHY_CHANNEL1_INVERT 13 13 UNIPHY_CHANNEL2_INVERT 14 14 UNIPHY_CHANNEL3_INVERT 15 15 UNIPHY_LANE_STAGGER_DELAY 20 22 UNIPHY_LINK_ENABLE_HPD_MASK 24 25 mmUNIPHYC_LINK_CNTL 0 0x4809 9 0 4294967295 UNIPHY_PFREQCHG 0 0 UNIPHY_PIXVLD_RESET 4 4 UNIPHY_MINIMUM_PIXVLD_LOW_DURATION 8 10 UNIPHY_CHANNEL0_INVERT 12 12 UNIPHY_CHANNEL1_INVERT 13 13 UNIPHY_CHANNEL2_INVERT 14 14 UNIPHY_CHANNEL3_INVERT 15 15 UNIPHY_LANE_STAGGER_DELAY 20 22 UNIPHY_LINK_ENABLE_HPD_MASK 24 25 mmUNIPHYD_LINK_CNTL 0 0x480b 9 0 4294967295 UNIPHY_PFREQCHG 0 0 UNIPHY_PIXVLD_RESET 4 4 UNIPHY_MINIMUM_PIXVLD_LOW_DURATION 8 10 UNIPHY_CHANNEL0_INVERT 12 12 UNIPHY_CHANNEL1_INVERT 13 13 UNIPHY_CHANNEL2_INVERT 14 14 UNIPHY_CHANNEL3_INVERT 15 15 UNIPHY_LANE_STAGGER_DELAY 20 22 UNIPHY_LINK_ENABLE_HPD_MASK 24 25 mmUNIPHYE_LINK_CNTL 0 0x480d 9 0 4294967295 UNIPHY_PFREQCHG 0 0 UNIPHY_PIXVLD_RESET 4 4 UNIPHY_MINIMUM_PIXVLD_LOW_DURATION 8 10 UNIPHY_CHANNEL0_INVERT 12 12 UNIPHY_CHANNEL1_INVERT 13 13 UNIPHY_CHANNEL2_INVERT 14 14 UNIPHY_CHANNEL3_INVERT 15 15 UNIPHY_LANE_STAGGER_DELAY 20 22 UNIPHY_LINK_ENABLE_HPD_MASK 24 25 mmUNIPHYF_LINK_CNTL 0 0x480f 9 0 4294967295 UNIPHY_PFREQCHG 0 0 UNIPHY_PIXVLD_RESET 4 4 UNIPHY_MINIMUM_PIXVLD_LOW_DURATION 8 10 UNIPHY_CHANNEL0_INVERT 12 12 UNIPHY_CHANNEL1_INVERT 13 13 UNIPHY_CHANNEL2_INVERT 14 14 UNIPHY_CHANNEL3_INVERT 15 15 UNIPHY_LANE_STAGGER_DELAY 20 22 UNIPHY_LINK_ENABLE_HPD_MASK 24 25 mmUNIPHYG_LINK_CNTL 0 0x4811 9 0 4294967295 UNIPHY_PFREQCHG 0 0 UNIPHY_PIXVLD_RESET 4 4 UNIPHY_MINIMUM_PIXVLD_LOW_DURATION 8 10 UNIPHY_CHANNEL0_INVERT 12 12 UNIPHY_CHANNEL1_INVERT 13 13 UNIPHY_CHANNEL2_INVERT 14 14 UNIPHY_CHANNEL3_INVERT 15 15 UNIPHY_LANE_STAGGER_DELAY 20 22 UNIPHY_LINK_ENABLE_HPD_MASK 24 25 mmUNIPHYA_CHANNEL_XBAR_CNTL 0 0x4806 5 0 4294967295 UNIPHY_CHANNEL0_XBAR_SOURCE 0 1 UNIPHY_CHANNEL1_XBAR_SOURCE 8 9 UNIPHY_CHANNEL2_XBAR_SOURCE 16 17 UNIPHY_CHANNEL3_XBAR_SOURCE 24 25 UNIPHY_LINK_ENABLE 28 28 mmUNIPHYB_CHANNEL_XBAR_CNTL 0 0x4808 5 0 4294967295 UNIPHY_CHANNEL0_XBAR_SOURCE 0 1 UNIPHY_CHANNEL1_XBAR_SOURCE 8 9 UNIPHY_CHANNEL2_XBAR_SOURCE 16 17 UNIPHY_CHANNEL3_XBAR_SOURCE 24 25 UNIPHY_LINK_ENABLE 28 28 mmUNIPHYC_CHANNEL_XBAR_CNTL 0 0x480a 5 0 4294967295 UNIPHY_CHANNEL0_XBAR_SOURCE 0 1 UNIPHY_CHANNEL1_XBAR_SOURCE 8 9 UNIPHY_CHANNEL2_XBAR_SOURCE 16 17 UNIPHY_CHANNEL3_XBAR_SOURCE 24 25 UNIPHY_LINK_ENABLE 28 28 mmUNIPHYD_CHANNEL_XBAR_CNTL 0 0x480c 5 0 4294967295 UNIPHY_CHANNEL0_XBAR_SOURCE 0 1 UNIPHY_CHANNEL1_XBAR_SOURCE 8 9 UNIPHY_CHANNEL2_XBAR_SOURCE 16 17 UNIPHY_CHANNEL3_XBAR_SOURCE 24 25 UNIPHY_LINK_ENABLE 28 28 mmUNIPHYE_CHANNEL_XBAR_CNTL 0 0x480e 5 0 4294967295 UNIPHY_CHANNEL0_XBAR_SOURCE 0 1 UNIPHY_CHANNEL1_XBAR_SOURCE 8 9 UNIPHY_CHANNEL2_XBAR_SOURCE 16 17 UNIPHY_CHANNEL3_XBAR_SOURCE 24 25 UNIPHY_LINK_ENABLE 28 28 mmUNIPHYF_CHANNEL_XBAR_CNTL 0 0x4810 5 0 4294967295 UNIPHY_CHANNEL0_XBAR_SOURCE 0 1 UNIPHY_CHANNEL1_XBAR_SOURCE 8 9 UNIPHY_CHANNEL2_XBAR_SOURCE 16 17 UNIPHY_CHANNEL3_XBAR_SOURCE 24 25 UNIPHY_LINK_ENABLE 28 28 mmUNIPHYG_CHANNEL_XBAR_CNTL 0 0x4812 5 0 4294967295 UNIPHY_CHANNEL0_XBAR_SOURCE 0 1 UNIPHY_CHANNEL1_XBAR_SOURCE 8 9 UNIPHY_CHANNEL2_XBAR_SOURCE 16 17 UNIPHY_CHANNEL3_XBAR_SOURCE 24 25 UNIPHY_LINK_ENABLE 28 28 mmUNIPHYLPA_LINK_CNTL 0 0x4847 9 0 4294967295 UNIPHYLP_PFREQCHG 0 0 UNIPHYLP_PIXVLD_RESET 4 4 UNIPHYLP_MINIMUM_PIXVLD_LOW_DURATION 8 10 UNIPHYLP_CHANNEL0_INVERT 12 12 UNIPHYLP_CHANNEL1_INVERT 13 13 UNIPHYLP_CHANNEL2_INVERT 14 14 UNIPHYLP_CHANNEL3_INVERT 15 15 UNIPHYLP_LANE_STAGGER_DELAY 20 22 UNIPHYLP_LINK_ENABLE_HPD_MASK 24 25 mmUNIPHYLPB_LINK_CNTL 0 0x4848 9 0 4294967295 UNIPHYLP_PFREQCHG 0 0 UNIPHYLP_PIXVLD_RESET 4 4 UNIPHYLP_MINIMUM_PIXVLD_LOW_DURATION 8 10 UNIPHYLP_CHANNEL0_INVERT 12 12 UNIPHYLP_CHANNEL1_INVERT 13 13 UNIPHYLP_CHANNEL2_INVERT 14 14 UNIPHYLP_CHANNEL3_INVERT 15 15 UNIPHYLP_LANE_STAGGER_DELAY 20 22 UNIPHYLP_LINK_ENABLE_HPD_MASK 24 25 mmUNIPHYLPA_CHANNEL_XBAR_CNTL 0 0x4849 5 0 4294967295 UNIPHYLP_CHANNEL0_XBAR_SOURCE 0 1 UNIPHYLP_CHANNEL1_XBAR_SOURCE 8 9 UNIPHYLP_CHANNEL2_XBAR_SOURCE 16 17 UNIPHYLP_CHANNEL3_XBAR_SOURCE 24 25 UNIPHYLP_LINK_ENABLE 28 28 mmUNIPHYLPB_CHANNEL_XBAR_CNTL 0 0x484a 5 0 4294967295 UNIPHYLP_CHANNEL0_XBAR_SOURCE 0 1 UNIPHYLP_CHANNEL1_XBAR_SOURCE 8 9 UNIPHYLP_CHANNEL2_XBAR_SOURCE 16 17 UNIPHYLP_CHANNEL3_XBAR_SOURCE 24 25 UNIPHYLP_LINK_ENABLE 28 28 mmUNIPHY_IMPCAL_LINKA 0 0x4838 9 0 4294967295 UNIPHY_IMPCAL_ENABLE_LINKA 0 0 UNIPHY_IMPCAL_CALOUT_LINKA 8 8 UNIPHY_CALOUT_ERROR_LINKA 9 9 UNIPHY_CALOUT_ERROR_LINKA_AK 10 10 UNIPHY_IMPCAL_VALUE_LINKA 16 19 UNIPHY_IMPCAL_STEP_DELAY_LINKA 20 23 UNIPHY_IMPCAL_OVERRIDE_LINKA 24 27 UNIPHY_IMPCAL_OVERRIDE_ENABLE_LINKA 28 28 UNIPHY_IMPCAL_SEL_LINKA 30 30 mmUNIPHY_IMPCAL_LINKB 0 0x4839 9 0 4294967295 UNIPHY_IMPCAL_ENABLE_LINKB 0 0 UNIPHY_IMPCAL_CALOUT_LINKB 8 8 UNIPHY_CALOUT_ERROR_LINKB 9 9 UNIPHY_CALOUT_ERROR_LINKB_AK 10 10 UNIPHY_IMPCAL_VALUE_LINKB 16 19 UNIPHY_IMPCAL_STEP_DELAY_LINKB 20 23 UNIPHY_IMPCAL_OVERRIDE_LINKB 24 27 UNIPHY_IMPCAL_OVERRIDE_ENABLE_LINKB 28 28 UNIPHY_IMPCAL_SEL_LINKB 30 30 mmUNIPHY_IMPCAL_LINKC 0 0x483f 9 0 4294967295 UNIPHY_IMPCAL_ENABLE_LINKC 0 0 UNIPHY_IMPCAL_CALOUT_LINKC 8 8 UNIPHY_CALOUT_ERROR_LINKC 9 9 UNIPHY_CALOUT_ERROR_LINKC_AK 10 10 UNIPHY_IMPCAL_VALUE_LINKC 16 19 UNIPHY_IMPCAL_STEP_DELAY_LINKC 20 23 UNIPHY_IMPCAL_OVERRIDE_LINKC 24 27 UNIPHY_IMPCAL_OVERRIDE_ENABLE_LINKC 28 28 UNIPHY_IMPCAL_SEL_LINKC 30 30 mmUNIPHY_IMPCAL_LINKD 0 0x4840 9 0 4294967295 UNIPHY_IMPCAL_ENABLE_LINKD 0 0 UNIPHY_IMPCAL_CALOUT_LINKD 8 8 UNIPHY_CALOUT_ERROR_LINKD 9 9 UNIPHY_CALOUT_ERROR_LINKD_AK 10 10 UNIPHY_IMPCAL_VALUE_LINKD 16 19 UNIPHY_IMPCAL_STEP_DELAY_LINKD 20 23 UNIPHY_IMPCAL_OVERRIDE_LINKD 24 27 UNIPHY_IMPCAL_OVERRIDE_ENABLE_LINKD 28 28 UNIPHY_IMPCAL_SEL_LINKD 30 30 mmUNIPHY_IMPCAL_LINKE 0 0x4843 9 0 4294967295 UNIPHY_IMPCAL_ENABLE_LINKE 0 0 UNIPHY_IMPCAL_CALOUT_LINKE 8 8 UNIPHY_CALOUT_ERROR_LINKE 9 9 UNIPHY_CALOUT_ERROR_LINKE_AK 10 10 UNIPHY_IMPCAL_VALUE_LINKE 16 19 UNIPHY_IMPCAL_STEP_DELAY_LINKE 20 23 UNIPHY_IMPCAL_OVERRIDE_LINKE 24 27 UNIPHY_IMPCAL_OVERRIDE_ENABLE_LINKE 28 28 UNIPHY_IMPCAL_SEL_LINKE 30 30 mmUNIPHY_IMPCAL_LINKF 0 0x4844 9 0 4294967295 UNIPHY_IMPCAL_ENABLE_LINKF 0 0 UNIPHY_IMPCAL_CALOUT_LINKF 8 8 UNIPHY_CALOUT_ERROR_LINKF 9 9 UNIPHY_CALOUT_ERROR_LINKF_AK 10 10 UNIPHY_IMPCAL_VALUE_LINKF 16 19 UNIPHY_IMPCAL_STEP_DELAY_LINKF 20 23 UNIPHY_IMPCAL_OVERRIDE_LINKF 24 27 UNIPHY_IMPCAL_OVERRIDE_ENABLE_LINKF 28 28 UNIPHY_IMPCAL_SEL_LINKF 30 30 mmUNIPHY_IMPCAL_PERIOD 0 0x483a 1 0 4294967295 UNIPHY_IMPCAL_PERIOD 0 31 mmAUXP_IMPCAL 0 0x483b 8 0 4294967295 AUXP_IMPCAL_ENABLE 0 0 AUXP_IMPCAL_CALOUT 8 8 AUXP_CALOUT_ERROR 9 9 AUXP_CALOUT_ERROR_AK 10 10 AUXP_IMPCAL_VALUE 16 19 AUXP_IMPCAL_STEP_DELAY 20 23 AUXP_IMPCAL_OVERRIDE 24 27 AUXP_IMPCAL_OVERRIDE_ENABLE 28 28 mmAUXN_IMPCAL 0 0x483c 8 0 4294967295 AUXN_IMPCAL_ENABLE 0 0 AUXN_IMPCAL_CALOUT 8 8 AUXN_CALOUT_ERROR 9 9 AUXN_CALOUT_ERROR_AK 10 10 AUXN_IMPCAL_VALUE 16 19 AUXN_IMPCAL_STEP_DELAY 20 23 AUXN_IMPCAL_OVERRIDE 24 27 AUXN_IMPCAL_OVERRIDE_ENABLE 28 28 mmDCIO_IMPCAL_CNTL 0 0x483d 8 0 4294967295 CALR_CNTL_OVERRIDE 0 3 IMPCAL_SOFT_RESET 5 5 IMPCAL_STATUS 8 9 IMPCAL_ARB_STATE 12 14 AUX_IMPCAL_INTERVAL 15 18 AUX_IMPCAL_BIASENTST 19 21 AUX_IMPCAL_RESBIASEN 22 22 AUX_IMPCAL_SPARE_CONTROL 23 24 mmUNIPHY_IMPCAL_PSW_AB 0 0x483e 2 0 4294967295 UNIPHY_IMPCAL_PSW_LINKA 0 14 UNIPHY_IMPCAL_PSW_LINKB 16 30 mmDCIO_IMPCAL_CNTL_CD 0 0x4841 4 0 4294967295 CALR_CNTL_OVERRIDE 0 3 IMPCAL_SOFT_RESET 5 5 IMPCAL_STATUS 8 9 IMPCAL_ARB_STATE 12 14 mmUNIPHY_IMPCAL_PSW_CD 0 0x4842 2 0 4294967295 UNIPHY_IMPCAL_PSW_LINKC 0 14 UNIPHY_IMPCAL_PSW_LINKD 16 30 mmDCIO_IMPCAL_CNTL_EF 0 0x4845 4 0 4294967295 CALR_CNTL_OVERRIDE 0 3 IMPCAL_SOFT_RESET 5 5 IMPCAL_STATUS 8 9 IMPCAL_ARB_STATE 12 14 mmUNIPHY_IMPCAL_PSW_EF 0 0x4846 2 0 4294967295 UNIPHY_IMPCAL_PSW_LINKE 0 14 UNIPHY_IMPCAL_PSW_LINKF 16 30 mmDCIO_WRCMD_DELAY 0 0x4816 5 0 4294967295 UNIPHY_DELAY 0 3 DAC_DELAY 4 7 DPHY_DELAY 8 11 DCRXPHY_DELAY 12 15 ZCAL_DELAY 16 19 mmDC_PINSTRAPS 0 0x4818 5 0 4294967295 DC_PINSTRAPS_BIF_CEC_DIS 10 10 DC_PINSTRAPS_SMS_EN_HARD 13 13 DC_PINSTRAPS_AUDIO 14 15 DC_PINSTRAPS_CCBYPASS 16 16 DC_PINSTRAPS_CONNECTIVITY 17 19 mmDC_DVODATA_CONFIG 0 0x481a 3 0 4294967295 VIP_MUX_EN 19 19 VIP_ALTER_MAPPING_EN 20 20 DVO_ALTER_MAPPING_EN 21 21 mmLVTMA_PWRSEQ_CNTL 0 0x481b 12 0 4294967295 LVTMA_PWRSEQ_EN 0 0 LVTMA_PWRSEQ_DISABLE_SYNCEN_CONTROL_OF_TX_EN 1 1 LVTMA_PWRSEQ_TARGET_STATE 4 4 LVTMA_SYNCEN 8 8 LVTMA_SYNCEN_OVRD 9 9 LVTMA_SYNCEN_POL 10 10 LVTMA_DIGON 16 16 LVTMA_DIGON_OVRD 17 17 LVTMA_DIGON_POL 18 18 LVTMA_BLON 24 24 LVTMA_BLON_OVRD 25 25 LVTMA_BLON_POL 26 26 mmLVTMA_PWRSEQ_STATE 0 0x481c 6 0 4294967295 LVTMA_PWRSEQ_TARGET_STATE_R 0 0 LVTMA_PWRSEQ_DIGON 1 1 LVTMA_PWRSEQ_SYNCEN 2 2 LVTMA_PWRSEQ_BLON 3 3 LVTMA_PWRSEQ_DONE 4 4 LVTMA_PWRSEQ_STATE 8 11 mmLVTMA_PWRSEQ_REF_DIV 0 0x481d 2 0 4294967295 LVTMA_PWRSEQ_REF_DIV 0 11 BL_PWM_REF_DIV 16 31 mmLVTMA_PWRSEQ_DELAY1 0 0x481e 4 0 4294967295 LVTMA_PWRUP_DELAY1 0 7 LVTMA_PWRUP_DELAY2 8 15 LVTMA_PWRDN_DELAY1 16 23 LVTMA_PWRDN_DELAY2 24 31 mmLVTMA_PWRSEQ_DELAY2 0 0x481f 4 0 4294967295 LVTMA_PWRDN_MIN_LENGTH 0 7 LVTMA_PWRUP_DELAY3 8 15 LVTMA_PWRDN_DELAY3 16 23 LVTMA_VARY_BL_OVERRIDE_EN 24 24 mmBL_PWM_CNTL 0 0x4820 3 0 4294967295 BL_ACTIVE_INT_FRAC_CNT 0 15 BL_PWM_FRACTIONAL_EN 30 30 BL_PWM_EN 31 31 mmBL_PWM_CNTL2 0 0x4821 4 0 4294967295 BL_PWM_POST_FRAME_START_DELAY_BEFORE_UPDATE 0 15 DBG_BL_PWM_INPUT_REFCLK_SELECT 28 29 BL_PWM_OVERRIDE_BL_OUT_ENABLE 30 30 BL_PWM_OVERRIDE_LVTMA_PWRSEQ_EN 31 31 mmBL_PWM_PERIOD_CNTL 0 0x4822 2 0 4294967295 BL_PWM_PERIOD 0 15 BL_PWM_PERIOD_BITCNT 16 19 mmBL_PWM_GRP1_REG_LOCK 0 0x4823 6 0 4294967295 BL_PWM_GRP1_REG_LOCK 0 0 BL_PWM_GRP1_REG_UPDATE_PENDING 8 8 BL_PWM_GRP1_UPDATE_AT_FRAME_START 16 16 BL_PWM_GRP1_FRAME_START_DISP_SEL 17 19 BL_PWM_GRP1_READBACK_DB_REG_VALUE_EN 24 24 BL_PWM_GRP1_IGNORE_MASTER_LOCK_EN 31 31 mmDCIO_GSL_GENLK_PAD_CNTL 0 0x4824 6 0 4294967295 DCIO_GENLK_CLK_GSL_TIMING_SYNC_SEL 0 1 DCIO_GENLK_CLK_GSL_FLIP_LOCK_SEL 4 5 DCIO_GENLK_CLK_GSL_MASK 8 9 DCIO_GENLK_VSYNC_GSL_TIMING_SYNC_SEL 16 17 DCIO_GENLK_VSYNC_GSL_FLIP_LOCK_SEL 20 21 DCIO_GENLK_VSYNC_GSL_MASK 24 25 mmDCIO_GSL_SWAPLOCK_PAD_CNTL 0 0x4825 6 0 4294967295 DCIO_SWAPLOCK_A_GSL_TIMING_SYNC_SEL 0 1 DCIO_SWAPLOCK_A_GSL_FLIP_LOCK_SEL 4 5 DCIO_SWAPLOCK_A_GSL_MASK 8 9 DCIO_SWAPLOCK_B_GSL_TIMING_SYNC_SEL 16 17 DCIO_SWAPLOCK_B_GSL_FLIP_LOCK_SEL 20 21 DCIO_SWAPLOCK_B_GSL_MASK 24 25 mmDCIO_GSL0_CNTL 0 0x4826 3 0 4294967295 DCIO_GSL0_VSYNC_SEL 0 2 DCIO_GSL0_TIMING_SYNC_SEL 8 10 DCIO_GSL0_GLOBAL_UNLOCK_SEL 16 18 mmDCIO_GSL1_CNTL 0 0x4827 3 0 4294967295 DCIO_GSL1_VSYNC_SEL 0 2 DCIO_GSL1_TIMING_SYNC_SEL 8 10 DCIO_GSL1_GLOBAL_UNLOCK_SEL 16 18 mmDCIO_GSL2_CNTL 0 0x4828 3 0 4294967295 DCIO_GSL2_VSYNC_SEL 0 2 DCIO_GSL2_TIMING_SYNC_SEL 8 10 DCIO_GSL2_GLOBAL_UNLOCK_SEL 16 18 mmDC_GPU_TIMER_START_POSITION_V_UPDATE 0 0x4829 6 0 4294967295 DC_GPU_TIMER_START_POSITION_D1_V_UPDATE 0 2 DC_GPU_TIMER_START_POSITION_D2_V_UPDATE 4 6 DC_GPU_TIMER_START_POSITION_D3_V_UPDATE 8 10 DC_GPU_TIMER_START_POSITION_D4_V_UPDATE 12 14 DC_GPU_TIMER_START_POSITION_D5_V_UPDATE 16 18 DC_GPU_TIMER_START_POSITION_D6_V_UPDATE 20 22 mmDC_GPU_TIMER_START_POSITION_P_FLIP 0 0x482a 8 0 4294967295 DC_GPU_TIMER_START_POSITION_D1_P_FLIP 0 2 DC_GPU_TIMER_START_POSITION_D2_P_FLIP 4 6 DC_GPU_TIMER_START_POSITION_D3_P_FLIP 8 10 DC_GPU_TIMER_START_POSITION_D4_P_FLIP 12 14 DC_GPU_TIMER_START_POSITION_D5_P_FLIP 16 18 DC_GPU_TIMER_START_POSITION_D6_P_FLIP 20 22 DC_GPU_TIMER_START_POSITION_DCFEV0_P_FLIP 23 25 DC_GPU_TIMER_START_POSITION_DCFEV1_P_FLIP 26 28 mmDC_GPU_TIMER_READ 0 0x482b 1 0 4294967295 DC_GPU_TIMER_READ 0 31 mmDC_GPU_TIMER_READ_CNTL 0 0x482c 7 0 4294967295 DC_GPU_TIMER_READ_SELECT 0 5 DC_GPU_TIMER_START_POSITION_D1_VSYNC_NOM 8 10 DC_GPU_TIMER_START_POSITION_D2_VSYNC_NOM 11 13 DC_GPU_TIMER_START_POSITION_D3_VSYNC_NOM 14 16 DC_GPU_TIMER_START_POSITION_D4_VSYNC_NOM 17 19 DC_GPU_TIMER_START_POSITION_D5_VSYNC_NOM 20 22 DC_GPU_TIMER_START_POSITION_D6_VSYNC_NOM 23 25 mmDCIO_CLOCK_CNTL 0 0x482d 2 0 4294967295 DCIO_TEST_CLK_SEL 0 4 DISPCLK_R_DCIO_GATE_DIS 5 5 mmDCIO_DEBUG 0 0x482f 1 0 4294967295 DCIO_DEBUG 0 31 mmDCO_DCFE_EXT_VSYNC_CNTL 0 0x4830 9 0 4294967295 DCO_DCFE0_EXT_VSYNC_MUX 0 2 DCO_DCFE1_EXT_VSYNC_MUX 4 6 DCO_DCFE2_EXT_VSYNC_MUX 8 10 DCO_DCFE3_EXT_VSYNC_MUX 12 14 DCO_DCFE4_EXT_VSYNC_MUX 16 18 DCO_DCFE5_EXT_VSYNC_MUX 20 22 DCO_SWAPLOCKB_EXT_VSYNC_MASK 24 26 DCO_GENERICB_EXT_VSYNC_MASK 28 30 DCO_CRTC_MANUAL_FLOW_CONTROL 31 31 mmDBG_OUT_CNTL 0 0x4834 4 0 4294967295 DBG_OUT_PIN_EN 0 0 DBG_OUT_PIN_SEL 4 4 DBG_OUT_12BIT_SEL 8 9 DBG_OUT_TEST_DATA 12 23 mmDCIO_DEBUG_CONFIG 0 0x4835 2 0 4294967295 DCIO_DBG_EN 0 0 DCIO_DBG_SEL 8 11 mmDCIO_SOFT_RESET 0 0x4836 22 0 4294967295 UNIPHYA_SOFT_RESET 0 0 DSYNCA_SOFT_RESET 1 1 UNIPHYB_SOFT_RESET 2 2 DSYNCB_SOFT_RESET 3 3 UNIPHYC_SOFT_RESET 4 4 DSYNCC_SOFT_RESET 5 5 UNIPHYD_SOFT_RESET 6 6 DSYNCD_SOFT_RESET 7 7 UNIPHYE_SOFT_RESET 8 8 DSYNCE_SOFT_RESET 9 9 UNIPHYF_SOFT_RESET 10 10 DSYNCF_SOFT_RESET 11 11 UNIPHYG_SOFT_RESET 12 12 DSYNCG_SOFT_RESET 13 13 DACA_SOFT_RESET 16 16 DCRXPHY_SOFT_RESET 20 20 DPHY_SOFT_RESET 24 24 ZCAL_SOFT_RESET 26 26 UNIPHYLPA_SOFT_RESET 28 28 DSYNCLPA_SOFT_RESET 29 29 UNIPHYLPB_SOFT_RESET 30 30 DSYNCLPB_SOFT_RESET 31 31 mmDCIO_DPHY_SEL 0 0x4837 4 0 4294967295 DPHY_LANE0_SEL 0 1 DPHY_LANE1_SEL 2 3 DPHY_LANE2_SEL 4 5 DPHY_LANE3_SEL 6 7 mmDCIO_DPCS_TX_INTERRUPT 0 0x484b 27 0 4294967295 DCIO_DPCS_TXA_INT_TYPE 0 0 DCIO_DPCS_TXA_INT_MASK 1 1 DCIO_DPCS_TXA_INT_OCCUR 2 2 DCIO_DPCS_TXB_INT_TYPE 3 3 DCIO_DPCS_TXB_INT_MASK 4 4 DCIO_DPCS_TXB_INT_OCCUR 5 5 DCIO_DPCS_TXC_INT_TYPE 6 6 DCIO_DPCS_TXC_INT_MASK 7 7 DCIO_DPCS_TXC_INT_OCCUR 8 8 DCIO_DPCS_TXD_INT_TYPE 9 9 DCIO_DPCS_TXD_INT_MASK 10 10 DCIO_DPCS_TXD_INT_OCCUR 11 11 DCIO_DPCS_TXE_INT_TYPE 12 12 DCIO_DPCS_TXE_INT_MASK 13 13 DCIO_DPCS_TXE_INT_OCCUR 14 14 DCIO_DPCS_TXF_INT_TYPE 15 15 DCIO_DPCS_TXF_INT_MASK 16 16 DCIO_DPCS_TXF_INT_OCCUR 17 17 DCIO_DPCS_TXG_INT_TYPE 18 18 DCIO_DPCS_TXG_INT_MASK 19 19 DCIO_DPCS_TXG_INT_OCCUR 20 20 DCIO_DPCS_TXLPA_INT_TYPE 24 24 DCIO_DPCS_TXLPA_INT_MASK 25 25 DCIO_DPCS_TXLPA_INT_OCCUR 26 26 DCIO_DPCS_TXLPB_INT_TYPE 27 27 DCIO_DPCS_TXLPB_INT_MASK 28 28 DCIO_DPCS_TXLPB_INT_OCCUR 29 29 mmDCIO_DPCS_RX_INTERRUPT 0 0x484c 3 0 4294967295 DCIO_DPCS_RXA_INT_TYPE 0 0 DCIO_DPCS_RXA_INT_MASK 1 1 DCIO_DPCS_RXA_INT_OCCUR 2 2 mmDCIO_SEMAPHORE0 0 0x484d 2 0 4294967295 DCIO_SEMAPHORE0_REQ 0 15 DCIO_SEMAPHORE0_GNT 16 31 mmDCIO_SEMAPHORE1 0 0x484e 2 0 4294967295 DCIO_SEMAPHORE1_REQ 0 15 DCIO_SEMAPHORE1_GNT 16 31 mmDCIO_SEMAPHORE2 0 0x484f 2 0 4294967295 DCIO_SEMAPHORE2_REQ 0 15 DCIO_SEMAPHORE2_GNT 16 31 mmDCIO_SEMAPHORE3 0 0x4850 2 0 4294967295 DCIO_SEMAPHORE3_REQ 0 15 DCIO_SEMAPHORE3_GNT 16 31 mmDCIO_SEMAPHORE4 0 0x4851 2 0 4294967295 DCIO_SEMAPHORE4_REQ 0 15 DCIO_SEMAPHORE4_GNT 16 31 mmDCIO_SEMAPHORE5 0 0x4852 2 0 4294967295 DCIO_SEMAPHORE5_REQ 0 15 DCIO_SEMAPHORE5_GNT 16 31 mmDCIO_SEMAPHORE6 0 0x4853 2 0 4294967295 DCIO_SEMAPHORE6_REQ 0 15 DCIO_SEMAPHORE6_GNT 16 31 mmDCIO_SEMAPHORE7 0 0x4854 2 0 4294967295 DCIO_SEMAPHORE7_REQ 0 15 DCIO_SEMAPHORE7_GNT 16 31 mmDCIO_TEST_DEBUG_INDEX 0 0x4831 2 0 4294967295 DCIO_TEST_DEBUG_INDEX 0 7 DCIO_TEST_DEBUG_WRITE_EN 8 8 mmDCIO_TEST_DEBUG_DATA 0 0x4832 1 0 4294967295 DCIO_TEST_DEBUG_DATA 0 31 ixDCIO_DEBUG1 2 0x1 22 0 4294967295 DCO_DCIO_MVP_DVOCNTL_A0_REG 0 1 DCO_DCIO_MVP_DVOCNTL_MASK_REG 2 3 DCO_DCIO_MVP_DVOCNTL_EN_REG 4 5 DCO_DCIO_MVP_DVOCNTL_A0 6 7 DCO_DCIO_MVP_DVOCNTL_SEL0 8 9 DCO_DCIO_MVP_DVOCNTL_EN 10 11 DCO_DCIO_MVP_DVOCLK_C 12 12 DCO_DCIO_DVOCNTL1_A0_REG 13 13 DCO_DCIO_DVOCNTL1_A0_PREMUX 14 14 DCO_DCIO_DVOCNTL1_A0 15 15 DCO_DCIO_DVOCNTL1_EN_REG 16 16 DCO_DCIO_DVO_HSYNC_TRISTATE 17 17 DCO_DCIO_DVO_CLK_TRISTATE 18 18 DCO_DCIO_DVOCNTL1_EN_PREMUX 19 19 DCO_DCIO_DVOCNTL1_EN 20 20 DCO_DCIO_DVOCNTL1_MUX 21 21 DCO_DCIO_DVOCNTL1_MASK_REG 22 22 DCO_DCIO_DVO_ENABLE 23 23 DCO_DCIO_DVO_VSYNC_TRISTATE 24 24 DCO_DCIO_DVO_RATE_SEL 25 25 DCO_DCIO_DVOCNTL1_SEL0_PREMUX 26 26 DCO_DCIO_DVOCNTL1_SEL0 27 27 ixDCIO_DEBUG2 2 0x2 1 0 4294967295 DCIO_DEBUG2 0 31 ixDCIO_DEBUG3 2 0x3 1 0 4294967295 DCIO_DEBUG3 0 31 ixDCIO_DEBUG4 2 0x4 1 0 4294967295 DCIO_DEBUG4 0 31 ixDCIO_DEBUG5 2 0x5 1 0 4294967295 DCIO_DEBUG5 0 31 ixDCIO_DEBUG6 2 0x6 1 0 4294967295 DCIO_DEBUG6 0 31 ixDCIO_DEBUG7 2 0x7 1 0 4294967295 DCIO_DEBUG7 0 31 ixDCIO_DEBUG8 2 0x8 1 0 4294967295 DCIO_DEBUG8 0 31 ixDCIO_DEBUG9 2 0x9 1 0 4294967295 DCIO_DEBUG9 0 31 ixDCIO_DEBUGA 2 0xa 1 0 4294967295 DCIO_DEBUGA 0 31 ixDCIO_DEBUGB 2 0xb 1 0 4294967295 DCIO_DEBUGB 0 31 ixDCIO_DEBUGC 2 0xc 1 0 4294967295 DCIO_DEBUGC 0 31 ixDCIO_DEBUGD 2 0xd 1 0 4294967295 DCIO_DEBUGD 0 31 ixDCIO_DEBUGE 2 0xe 1 0 4294967295 DCIO_DIGA_DEBUG 0 31 ixDCIO_DEBUGF 2 0xf 1 0 4294967295 DCIO_DIGB_DEBUG 0 31 ixDCIO_DEBUG10 2 0x10 1 0 4294967295 DCIO_DIGC_DEBUG 0 31 ixDCIO_DEBUG11 2 0x11 1 0 4294967295 DCIO_DIGD_DEBUG 0 31 ixDCIO_DEBUG12 2 0x12 1 0 4294967295 DCIO_DIGE_DEBUG 0 31 ixDCIO_DEBUG13 2 0x13 1 0 4294967295 DCIO_DIGF_DEBUG 0 31 ixDCIO_DEBUG14 2 0x14 1 0 4294967295 DCIO_DIGG_DEBUG 0 31 ixDCIO_DEBUG15 2 0x15 1 0 4294967295 DCIO_DEBUG15 0 31 ixDCIO_DEBUG16 2 0x16 1 0 4294967295 DCIO_DEBUG16 0 31 ixDCIO_DEBUG17 2 0x17 1 0 4294967295 DCIO_DEBUG17 0 31 ixDCIO_DEBUG18 2 0x18 1 0 4294967295 DCIO_DEBUG18 0 31 ixDCIO_DEBUG19 2 0x19 1 0 4294967295 DCIO_DIGLPA_DEBUG 0 31 ixDCIO_DEBUG1A 2 0x1a 1 0 4294967295 DCIO_DIGLPB_DEBUG 0 31 ixDCIO_DEBUG1B 2 0x1b 1 0 4294967295 DCIO_DEBUGHPD 0 31 ixDCIO_DEBUG1C 2 0x1c 1 0 4294967295 DCIO_DEBUG_UNIPHYA_CFG 0 31 ixDCIO_DEBUG1D 2 0x1d 1 0 4294967295 DCIO_DEBUG_UNIPHYB_CFG 0 31 ixDCIO_DEBUG1E 2 0x1e 1 0 4294967295 DCIO_DEBUG_UNIPHYC_CFG 0 31 ixDCIO_DEBUG1F 2 0x1f 1 0 4294967295 DCIO_DEBUG_UNIPHYD_CFG 0 31 ixDCIO_DEBUG20 2 0x20 1 0 4294967295 DCIO_DEBUG_UNIPHYE_CFG 0 31 ixDCIO_DEBUG21 2 0x21 1 0 4294967295 DCIO_DEBUG_UNIPHYF_CFG 0 31 ixDCIO_DEBUG22 2 0x22 1 0 4294967295 DCIO_DEBUG_UNIPHYG_CFG 0 31 ixDCIO_DEBUG23 2 0x23 1 0 4294967295 DCIO_DEBUG_UNIPHYLPA_CFG 0 31 ixDCIO_DEBUG24 2 0x24 1 0 4294967295 DCIO_DEBUG_UNIPHYLPB_CFG 0 31 ixDCIO_DEBUG25 2 0x25 1 0 4294967295 DCIO_DEBUG_DCRXPHY_CFG 0 31 ixDCIO_DEBUG26 2 0x26 1 0 4294967295 DCIO_DEBUG_DPHY_CFG 0 31 ixDCIO_DEBUG27 2 0x27 1 0 4294967295 DCIO_DEBUG_DACA_CFG 0 31 ixDCIO_DEBUG28 2 0x28 1 0 4294967295 DCIO_DEBUG_ZCAL_CFG 0 31 ixDCIO_DEBUG_ID 2 0x0 1 0 4294967295 DCIO_DEBUG_ID 0 31 mmDC_GPIO_GENERIC_MASK 0 0x4860 28 0 4294967295 DC_GPIO_GENERICA_MASK 0 0 DC_GPIO_GENERICA_PD_DIS 1 1 DC_GPIO_GENERICA_RECV 2 2 DC_GPIO_GENERICA_RECV1 3 3 DC_GPIO_GENERICB_MASK 4 4 DC_GPIO_GENERICB_PD_DIS 5 5 DC_GPIO_GENERICB_RECV 6 6 DC_GPIO_GENERICB_RECV1 7 7 DC_GPIO_GENERICC_MASK 8 8 DC_GPIO_GENERICC_PD_DIS 9 9 DC_GPIO_GENERICC_RECV 10 10 DC_GPIO_GENERICC_RECV1 11 11 DC_GPIO_GENERICD_MASK 12 12 DC_GPIO_GENERICD_PD_DIS 13 13 DC_GPIO_GENERICD_RECV 14 14 DC_GPIO_GENERICD_RECV1 15 15 DC_GPIO_GENERICE_MASK 16 16 DC_GPIO_GENERICE_PD_DIS 17 17 DC_GPIO_GENERICE_RECV 18 18 DC_GPIO_GENERICE_RECV1 19 19 DC_GPIO_GENERICF_MASK 20 20 DC_GPIO_GENERICF_PD_DIS 21 21 DC_GPIO_GENERICF_RECV 22 22 DC_GPIO_GENERICF_RECV1 23 23 DC_GPIO_GENERICG_MASK 24 24 DC_GPIO_GENERICG_PD_DIS 25 25 DC_GPIO_GENERICG_RECV 26 26 DC_GPIO_GENERICG_RECV1 27 27 mmDC_GPIO_GENERIC_A 0 0x4861 7 0 4294967295 DC_GPIO_GENERICA_A 0 0 DC_GPIO_GENERICB_A 8 8 DC_GPIO_GENERICC_A 16 16 DC_GPIO_GENERICD_A 20 20 DC_GPIO_GENERICE_A 21 21 DC_GPIO_GENERICF_A 22 22 DC_GPIO_GENERICG_A 23 23 mmDC_GPIO_GENERIC_EN 0 0x4862 7 0 4294967295 DC_GPIO_GENERICA_EN 0 0 DC_GPIO_GENERICB_EN 8 8 DC_GPIO_GENERICC_EN 16 16 DC_GPIO_GENERICD_EN 20 20 DC_GPIO_GENERICE_EN 21 21 DC_GPIO_GENERICF_EN 22 22 DC_GPIO_GENERICG_EN 23 23 mmDC_GPIO_GENERIC_Y 0 0x4863 7 0 4294967295 DC_GPIO_GENERICA_Y 0 0 DC_GPIO_GENERICB_Y 8 8 DC_GPIO_GENERICC_Y 16 16 DC_GPIO_GENERICD_Y 20 20 DC_GPIO_GENERICE_Y 21 21 DC_GPIO_GENERICF_Y 22 22 DC_GPIO_GENERICG_Y 23 23 mmDC_GPIO_DDC1_MASK 0 0x4868 13 0 4294967295 DC_GPIO_DDC1CLK_MASK 0 0 DC_GPIO_DDC1CLK_PD_EN 4 4 DC_GPIO_DDC1CLK_RECV 6 6 DC_GPIO_DDC1CLK_RECV1 7 7 DC_GPIO_DDC1DATA_MASK 8 8 DC_GPIO_DDC1DATA_PD_EN 12 12 DC_GPIO_DDC1DATA_RECV 14 14 DC_GPIO_DDC1DATA_RECV1 15 15 AUX_PAD1_MODE 16 16 AUX1_POL 20 20 ALLOW_HW_DDC1_PD_EN 22 22 DC_GPIO_DDC1CLK_STR 24 27 DC_GPIO_DDC1DATA_STR 28 31 mmDC_GPIO_DDC1_A 0 0x4869 2 0 4294967295 DC_GPIO_DDC1CLK_A 0 0 DC_GPIO_DDC1DATA_A 8 8 mmDC_GPIO_DDC1_EN 0 0x486a 2 0 4294967295 DC_GPIO_DDC1CLK_EN 0 0 DC_GPIO_DDC1DATA_EN 8 8 mmDC_GPIO_DDC1_Y 0 0x486b 2 0 4294967295 DC_GPIO_DDC1CLK_Y 0 0 DC_GPIO_DDC1DATA_Y 8 8 mmDC_GPIO_DDC2_MASK 0 0x486c 13 0 4294967295 DC_GPIO_DDC2CLK_MASK 0 0 DC_GPIO_DDC2CLK_PD_EN 4 4 DC_GPIO_DDC2CLK_RECV 6 6 DC_GPIO_DDC2CLK_RECV1 7 7 DC_GPIO_DDC2DATA_MASK 8 8 DC_GPIO_DDC2DATA_PD_EN 12 12 DC_GPIO_DDC2DATA_RECV 14 14 DC_GPIO_DDC2DATA_RECV1 15 15 AUX_PAD2_MODE 16 16 AUX2_POL 20 20 ALLOW_HW_DDC2_PD_EN 22 22 DC_GPIO_DDC2CLK_STR 24 27 DC_GPIO_DDC2DATA_STR 28 31 mmDC_GPIO_DDC2_A 0 0x486d 2 0 4294967295 DC_GPIO_DDC2CLK_A 0 0 DC_GPIO_DDC2DATA_A 8 8 mmDC_GPIO_DDC2_EN 0 0x486e 2 0 4294967295 DC_GPIO_DDC2CLK_EN 0 0 DC_GPIO_DDC2DATA_EN 8 8 mmDC_GPIO_DDC2_Y 0 0x486f 2 0 4294967295 DC_GPIO_DDC2CLK_Y 0 0 DC_GPIO_DDC2DATA_Y 8 8 mmDC_GPIO_DDC3_MASK 0 0x4870 13 0 4294967295 DC_GPIO_DDC3CLK_MASK 0 0 DC_GPIO_DDC3CLK_PD_EN 4 4 DC_GPIO_DDC3CLK_RECV 6 6 DC_GPIO_DDC3CLK_RECV1 7 7 DC_GPIO_DDC3DATA_MASK 8 8 DC_GPIO_DDC3DATA_PD_EN 12 12 DC_GPIO_DDC3DATA_RECV 14 14 DC_GPIO_DDC3DATA_RECV1 15 15 AUX_PAD3_MODE 16 16 AUX3_POL 20 20 ALLOW_HW_DDC3_PD_EN 22 22 DC_GPIO_DDC3CLK_STR 24 27 DC_GPIO_DDC3DATA_STR 28 31 mmDC_GPIO_DDC3_A 0 0x4871 2 0 4294967295 DC_GPIO_DDC3CLK_A 0 0 DC_GPIO_DDC3DATA_A 8 8 mmDC_GPIO_DDC3_EN 0 0x4872 2 0 4294967295 DC_GPIO_DDC3CLK_EN 0 0 DC_GPIO_DDC3DATA_EN 8 8 mmDC_GPIO_DDC3_Y 0 0x4873 2 0 4294967295 DC_GPIO_DDC3CLK_Y 0 0 DC_GPIO_DDC3DATA_Y 8 8 mmDC_GPIO_DDC4_MASK 0 0x4874 13 0 4294967295 DC_GPIO_DDC4CLK_MASK 0 0 DC_GPIO_DDC4CLK_PD_EN 4 4 DC_GPIO_DDC4CLK_RECV 6 6 DC_GPIO_DDC4CLK_RECV1 7 7 DC_GPIO_DDC4DATA_MASK 8 8 DC_GPIO_DDC4DATA_PD_EN 12 12 DC_GPIO_DDC4DATA_RECV 14 14 DC_GPIO_DDC4DATA_RECV1 15 15 AUX_PAD4_MODE 16 16 AUX4_POL 20 20 ALLOW_HW_DDC4_PD_EN 22 22 DC_GPIO_DDC4CLK_STR 24 27 DC_GPIO_DDC4DATA_STR 28 31 mmDC_GPIO_DDC4_A 0 0x4875 2 0 4294967295 DC_GPIO_DDC4CLK_A 0 0 DC_GPIO_DDC4DATA_A 8 8 mmDC_GPIO_DDC4_EN 0 0x4876 2 0 4294967295 DC_GPIO_DDC4CLK_EN 0 0 DC_GPIO_DDC4DATA_EN 8 8 mmDC_GPIO_DDC4_Y 0 0x4877 2 0 4294967295 DC_GPIO_DDC4CLK_Y 0 0 DC_GPIO_DDC4DATA_Y 8 8 mmDC_GPIO_DDC5_MASK 0 0x4878 13 0 4294967295 DC_GPIO_DDC5CLK_MASK 0 0 DC_GPIO_DDC5CLK_PD_EN 4 4 DC_GPIO_DDC5CLK_RECV 6 6 DC_GPIO_DDC5CLK_RECV1 7 7 DC_GPIO_DDC5DATA_MASK 8 8 DC_GPIO_DDC5DATA_PD_EN 12 12 DC_GPIO_DDC5DATA_RECV 14 14 DC_GPIO_DDC5DATA_RECV1 15 15 AUX_PAD5_MODE 16 16 AUX5_POL 20 20 ALLOW_HW_DDC5_PD_EN 22 22 DC_GPIO_DDC5CLK_STR 24 27 DC_GPIO_DDC5DATA_STR 28 31 mmDC_GPIO_DDC5_A 0 0x4879 2 0 4294967295 DC_GPIO_DDC5CLK_A 0 0 DC_GPIO_DDC5DATA_A 8 8 mmDC_GPIO_DDC5_EN 0 0x487a 2 0 4294967295 DC_GPIO_DDC5CLK_EN 0 0 DC_GPIO_DDC5DATA_EN 8 8 mmDC_GPIO_DDC5_Y 0 0x487b 2 0 4294967295 DC_GPIO_DDC5CLK_Y 0 0 DC_GPIO_DDC5DATA_Y 8 8 mmDC_GPIO_DDC6_MASK 0 0x487c 13 0 4294967295 DC_GPIO_DDC6CLK_MASK 0 0 DC_GPIO_DDC6CLK_PD_EN 4 4 DC_GPIO_DDC6CLK_RECV 6 6 DC_GPIO_DDC6CLK_RECV1 7 7 DC_GPIO_DDC6DATA_MASK 8 8 DC_GPIO_DDC6DATA_PD_EN 12 12 DC_GPIO_DDC6DATA_RECV 14 14 DC_GPIO_DDC6DATA_RECV1 15 15 AUX_PAD6_MODE 16 16 AUX6_POL 20 20 ALLOW_HW_DDC6_PD_EN 22 22 DC_GPIO_DDC6CLK_STR 24 27 DC_GPIO_DDC6DATA_STR 28 31 mmDC_GPIO_DDC6_A 0 0x487d 2 0 4294967295 DC_GPIO_DDC6CLK_A 0 0 DC_GPIO_DDC6DATA_A 8 8 mmDC_GPIO_DDC6_EN 0 0x487e 2 0 4294967295 DC_GPIO_DDC6CLK_EN 0 0 DC_GPIO_DDC6DATA_EN 8 8 mmDC_GPIO_DDC6_Y 0 0x487f 2 0 4294967295 DC_GPIO_DDC6CLK_Y 0 0 DC_GPIO_DDC6DATA_Y 8 8 mmDC_GPIO_DDCVGA_MASK 0 0x4880 12 0 4294967295 DC_GPIO_DDCVGACLK_MASK 0 0 DC_GPIO_DDCVGACLK_RECV 6 6 DC_GPIO_DDCVGACLK_RECV1 7 7 DC_GPIO_DDCVGADATA_MASK 8 8 DC_GPIO_DDCVGADATA_PD_EN 12 12 DC_GPIO_DDCVGADATA_RECV 14 14 DC_GPIO_DDCVGADATA_RECV1 15 15 AUX_PADVGA_MODE 16 16 AUXVGA_POL 20 20 ALLOW_HW_DDCVGA_PD_EN 22 22 DC_GPIO_DDCVGACLK_STR 24 27 DC_GPIO_DDCVGADATA_STR 28 31 mmDC_GPIO_DDCVGA_A 0 0x4881 2 0 4294967295 DC_GPIO_DDCVGACLK_A 0 0 DC_GPIO_DDCVGADATA_A 8 8 mmDC_GPIO_DDCVGA_EN 0 0x4882 15 0 4294967295 DC_GPIO_DDCVGACLK_EN 0 0 DC_GPIO_DDCVGADATA_EN 8 8 DC_GPIO_DDCVGADATA_PAD_RXSEL 16 17 DC_GPIO_DDCVGADATA_PAD_SPARE 18 19 DC_GPIO_DDCVGADATA_PAD_BIASCRTEN 20 20 DC_GPIO_DDCVGADATA_PAD_CSEL0P9 21 21 DC_GPIO_DDCVGADATA_PAD_CSEL1P1 22 22 DC_GPIO_DDCVGADATA_PAD_COMPSEL 23 23 DC_GPIO_DDCVGADATA_PAD_RSEL0P9 24 24 DC_GPIO_DDCVGADATA_PAD_RSEL1P1 25 25 DC_GPIO_DDCVGADATA_PAD_SPIKERCEN 26 26 DC_GPIO_DDCVGADATA_PAD_SPIKERCSEL 27 27 DC_GPIO_DDCVGADATA_PAD_FALLSLEWSEL 28 29 DC_GPIO_DDCVGADATA_PAD_RESBIASEN 30 30 DC_GPIO_DDCVGADATA_PAD_SLEWN 31 31 mmDC_GPIO_DDCVGA_Y 0 0x4883 2 0 4294967295 DC_GPIO_DDCVGACLK_Y 0 0 DC_GPIO_DDCVGADATA_Y 8 8 mmDC_GPIO_SYNCA_MASK 0 0x4884 10 0 4294967295 DC_GPIO_HSYNCA_MASK 0 0 DC_GPIO_HSYNCA_PD_DIS 4 4 DC_GPIO_HSYNCA_RECV 6 6 DC_GPIO_HSYNCA_RECV1 7 7 DC_GPIO_VSYNCA_MASK 8 8 DC_GPIO_VSYNCA_PD_DIS 12 12 DC_GPIO_VSYNCA_RECV 14 14 DC_GPIO_VSYNCA_RECV1 15 15 DC_GPIO_HSYNCA_CRTC_HSYNC_MASK 24 26 DC_GPIO_VSYNCA_CRTC_VSYNC_MASK 28 30 mmDC_GPIO_SYNCA_A 0 0x4885 2 0 4294967295 DC_GPIO_HSYNCA_A 0 0 DC_GPIO_VSYNCA_A 8 8 mmDC_GPIO_SYNCA_EN 0 0x4886 2 0 4294967295 DC_GPIO_HSYNCA_EN 0 0 DC_GPIO_VSYNCA_EN 8 8 mmDC_GPIO_SYNCA_Y 0 0x4887 2 0 4294967295 DC_GPIO_HSYNCA_Y 0 0 DC_GPIO_VSYNCA_Y 8 8 mmDC_GPIO_GENLK_MASK 0 0x4888 20 0 4294967295 DC_GPIO_GENLK_CLK_MASK 0 0 DC_GPIO_GENLK_CLK_PD_DIS 1 1 DC_GPIO_GENLK_CLK_RECV 2 2 DC_GPIO_GENLK_CLK_PU_EN 3 3 DC_GPIO_GENLK_CLK_RECV1 4 4 DC_GPIO_GENLK_VSYNC_RECV1 5 5 DC_GPIO_GENLK_VSYNC_MASK 8 8 DC_GPIO_GENLK_VSYNC_PD_DIS 9 9 DC_GPIO_GENLK_VSYNC_RECV 10 10 DC_GPIO_GENLK_VSYNC_PU_EN 11 11 DC_GPIO_SWAPLOCK_A_MASK 16 16 DC_GPIO_SWAPLOCK_A_PD_DIS 17 17 DC_GPIO_SWAPLOCK_A_RECV 18 18 DC_GPIO_SWAPLOCK_A_PU_EN 19 19 DC_GPIO_SWAPLOCK_A_RECV1 20 20 DC_GPIO_SWAPLOCK_B_RECV1 23 23 DC_GPIO_SWAPLOCK_B_MASK 24 24 DC_GPIO_SWAPLOCK_B_PD_DIS 25 25 DC_GPIO_SWAPLOCK_B_RECV 26 26 DC_GPIO_SWAPLOCK_B_PU_EN 27 27 mmDC_GPIO_GENLK_A 0 0x4889 4 0 4294967295 DC_GPIO_GENLK_CLK_A 0 0 DC_GPIO_GENLK_VSYNC_A 8 8 DC_GPIO_SWAPLOCK_A_A 16 16 DC_GPIO_SWAPLOCK_B_A 24 24 mmDC_GPIO_GENLK_EN 0 0x488a 4 0 4294967295 DC_GPIO_GENLK_CLK_EN 0 0 DC_GPIO_GENLK_VSYNC_EN 8 8 DC_GPIO_SWAPLOCK_A_EN 16 16 DC_GPIO_SWAPLOCK_B_EN 24 24 mmDC_GPIO_GENLK_Y 0 0x488b 4 0 4294967295 DC_GPIO_GENLK_CLK_Y 0 0 DC_GPIO_GENLK_VSYNC_Y 8 8 DC_GPIO_SWAPLOCK_A_Y 16 16 DC_GPIO_SWAPLOCK_B_Y 24 24 mmDC_GPIO_HPD_MASK 0 0x488c 28 0 4294967295 DC_GPIO_HPD1_MASK 0 0 DC_GPIO_RX_HPD_MASK 1 1 DC_GPIO_RX_HPD_PD_DIS 2 2 DC_GPIO_RX_HPD_RECV 3 3 DC_GPIO_HPD1_PD_DIS 4 4 DC_GPIO_HPD1_RECV1 5 5 DC_GPIO_HPD1_RECV 6 6 DC_GPIO_RX_HPD_RECV1 7 7 DC_GPIO_HPD2_MASK 8 8 DC_GPIO_HPD2_PD_DIS 9 9 DC_GPIO_HPD2_RECV 10 10 DC_GPIO_HPD2_RECV1 11 11 DC_GPIO_HPD3_MASK 16 16 DC_GPIO_HPD3_PD_DIS 17 17 DC_GPIO_HPD3_RECV 18 18 DC_GPIO_HPD3_RECV1 19 19 DC_GPIO_HPD4_MASK 20 20 DC_GPIO_HPD4_PD_DIS 21 21 DC_GPIO_HPD4_RECV 22 22 DC_GPIO_HPD4_RECV1 23 23 DC_GPIO_HPD5_MASK 24 24 DC_GPIO_HPD5_PD_DIS 25 25 DC_GPIO_HPD5_RECV 26 26 DC_GPIO_HPD5_RECV1 27 27 DC_GPIO_HPD6_MASK 28 28 DC_GPIO_HPD6_PD_DIS 29 29 DC_GPIO_HPD6_RECV 30 30 DC_GPIO_HPD6_RECV1 31 31 mmDC_GPIO_HPD_A 0 0x488d 6 0 4294967295 DC_GPIO_HPD1_A 0 0 DC_GPIO_HPD2_A 8 8 DC_GPIO_HPD3_A 16 16 DC_GPIO_HPD4_A 24 24 DC_GPIO_HPD5_A 26 26 DC_GPIO_HPD6_A 28 28 mmDC_GPIO_HPD_EN 0 0x488e 23 0 4294967295 DC_GPIO_HPD1_EN 0 0 HPD1_SCHMEN_PI 1 1 HPD1_SLEWNCORE 2 2 RX_HPD_SCHMEN_PI 3 3 RX_HPD_SLEWNCORE 4 4 HPD12_SPARE0 5 5 HPD1_SEL0 6 6 RX_HPD_SEL0 7 7 DC_GPIO_HPD2_EN 8 8 HPD2_SCHMEN_PI 9 9 HPD12_SPARE1 10 10 DC_GPIO_HPD3_EN 16 16 HPD3_SCHMEN_PI 17 17 HPD34_SPARE0 18 18 DC_GPIO_HPD4_EN 20 20 HPD4_SCHMEN_PI 21 21 HPD34_SPARE1 22 22 DC_GPIO_HPD5_EN 24 24 HPD5_SCHMEN_PI 25 25 HPD56_SPARE0 26 26 DC_GPIO_HPD6_EN 28 28 HPD6_SCHMEN_PI 29 29 HPD56_SPARE1 30 30 mmDC_GPIO_HPD_Y 0 0x488f 6 0 4294967295 DC_GPIO_HPD1_Y 0 0 DC_GPIO_HPD2_Y 8 8 DC_GPIO_HPD3_Y 16 16 DC_GPIO_HPD4_Y 24 24 DC_GPIO_HPD5_Y 26 26 DC_GPIO_HPD6_Y 28 28 mmDC_GPIO_PWRSEQ_MASK 0 0x4890 20 0 4294967295 DC_GPIO_BLON_MASK 0 0 DC_GPIO_BLON_PD_DIS 4 4 DC_GPIO_BLON_RECV 6 6 DC_GPIO_BLON_RECV1 7 7 DC_GPIO_DIGON_MASK 8 8 DC_GPIO_DIGON_PD_DIS 12 12 DC_GPIO_DIGON_RECV 14 14 DC_GPIO_DIGON_RECV1 15 15 DC_GPIO_ENA_BL_MASK 16 16 DC_GPIO_ENA_BL_PD_DIS 20 20 DC_GPIO_ENA_BL_RECV 22 22 DC_GPIO_ENA_BL_RECV1 23 23 DC_GPIO_VSYNC_IN_MASK 24 24 DC_GPIO_VSYNC_IN_PD_DIS 25 25 DC_GPIO_VSYNC_IN_RECV 26 26 DC_GPIO_VSYNC_IN_RECV1 27 27 DC_GPIO_HSYNC_IN_MASK 28 28 DC_GPIO_HSYNC_IN_PD_DIS 29 29 DC_GPIO_HSYNC_IN_RECV 30 30 DC_GPIO_HSYNC_IN_RECV1 31 31 mmDC_GPIO_PWRSEQ_A 0 0x4891 5 0 4294967295 DC_GPIO_BLON_A 0 0 DC_GPIO_DIGON_A 8 8 DC_GPIO_ENA_BL_A 16 16 DC_GPIO_VSYNC_IN_A 24 24 DC_GPIO_HSYNC_IN_A 31 31 mmDC_GPIO_PWRSEQ_EN 0 0x4892 6 0 4294967295 DC_GPIO_BLON_EN 0 0 DC_GPIO_VARY_BL_GENERICA_EN 1 1 DC_GPIO_DIGON_EN 8 8 DC_GPIO_ENA_BL_EN 16 16 DC_GPIO_VSYNC_IN_EN 24 24 DC_GPIO_HSYNC_IN_EN 31 31 mmDC_GPIO_PWRSEQ_Y 0 0x4893 5 0 4294967295 DC_GPIO_BLON_Y 0 0 DC_GPIO_DIGON_Y 8 8 DC_GPIO_ENA_BL_Y 16 16 DC_GPIO_VSYNC_IN 24 24 DC_GPIO_HSYNC_IN 31 31 mmDC_GPIO_PAD_STRENGTH_1 0 0x4894 8 0 4294967295 GENLK_STRENGTH_SN 0 3 GENLK_STRENGTH_SP 4 7 RX_HPD_STRENGTH_SN 8 11 RX_HPD_STRENGTH_SP 12 15 TX_HPD_STRENGTH_SN 16 19 TX_HPD_STRENGTH_SP 20 23 SYNC_STRENGTH_SN 24 27 SYNC_STRENGTH_SP 28 31 mmDC_GPIO_PAD_STRENGTH_2 0 0x4895 7 0 4294967295 STRENGTH_SN 0 3 STRENGTH_SP 4 7 EXT_RESET_DRVSTRENGTH 8 10 REF_27_DRVSTRENGTH 12 14 PWRSEQ_STRENGTH_SN 16 19 PWRSEQ_STRENGTH_SP 20 23 REF_27_SRC_SEL 30 31 mmPHY_AUX_CNTL 0 0x4897 14 0 4294967295 AUXSLAVE_PAD_SLEWN 0 0 AUXSLAVE_PAD_WAKE 1 1 AUXSLAVE_PAD_RXSEL 2 2 AUXSLAVE_PAD_MODE 3 3 DDCSLAVE_DATA_PD_EN 4 4 DDCSLAVE_DATA_EN 5 5 DDCSLAVE_CLK_PD_EN 6 6 DDCSLAVE_CLK_EN 7 7 AUX_PAD_SLEWN 12 12 AUXSLAVE_CLK_PD_EN 13 13 AUX_PAD_WAKE 14 14 AUX_PAD_RXSEL 16 17 AUX_PAD_RESBIASEN 18 18 AUX_PAD_COMPSEL 19 19 mmDC_GPIO_I2CPAD_A 0 0x4899 2 0 4294967295 DC_GPIO_SCL_A 0 0 DC_GPIO_SDA_A 1 1 mmDC_GPIO_I2CPAD_EN 0 0x489a 16 0 4294967295 DC_GPIO_SCL_EN 0 0 DC_GPIO_SDA_EN 1 1 DC_GPIO_I2C_PAD_DATA_PD_EN 2 2 DC_GPIO_I2C_PAD_RXSEL 16 17 DC_GPIO_I2C_PAD_SPARE 18 19 DC_GPIO_I2C_PAD_BIASCRTEN 20 20 DC_GPIO_I2C_PAD_CSEL0P9 21 21 DC_GPIO_I2C_PAD_CSEL1P1 22 22 DC_GPIO_I2C_PAD_COMPSEL 23 23 DC_GPIO_I2C_PAD_RSEL0P9 24 24 DC_GPIO_I2C_PAD_RSEL1P1 25 25 DC_GPIO_I2C_PAD_SPIKERCEN 26 26 DC_GPIO_I2C_PAD_SPIKERCSEL 27 27 DC_GPIO_I2C_PAD_FALLSLEWSEL 28 29 DC_GPIO_I2C_PAD_RESBIASEN 30 30 DC_GPIO_I2C_PAD_SLEWN 31 31 mmDC_GPIO_I2CPAD_Y 0 0x489b 2 0 4294967295 DC_GPIO_SCL_Y 0 0 DC_GPIO_SDA_Y 1 1 mmDC_GPIO_I2CPAD_STRENGTH 0 0x489c 2 0 4294967295 I2C_STRENGTH_SN 0 3 I2C_STRENGTH_SP 4 7 mmDVO_VREF_CONTROL 0 0x489e 3 0 4294967295 DVO_VREFPON 0 0 DVO_VREFSEL 1 1 DVO_VREFCAL 4 7 mmDVO_SKEW_ADJUST 0 0x489f 1 0 4294967295 DVO_SKEW_ADJUST 0 31 mmDC_GPIO_RECEIVER_EN0 0 0x48a0 18 0 4294967295 VIPPAD_SCL_RECEN 0 0 VIPPAD_SDA_RECEN 1 1 DC_GPIO_RX_HPD_RECEN 16 16 DC_GPIO_HPD1_RECEN 17 17 DC_GPIO_GENLK_VSYNC_RECEN 18 18 DC_GPIO_GENLK_CLK_RECEN 19 19 DC_GPIO_VSYNCA_RECEN 20 20 DC_GPIO_HSYNCA_RECEN 21 21 DC_GPIO_GENERICG_RECEN 22 22 DC_GPIO_GENERICF_RECEN 23 23 DC_GPIO_GENERICE_RECEN 24 24 DC_GPIO_GENERICD_RECEN 25 25 DC_GPIO_GENERICC_RECEN 26 26 DC_GPIO_GENERICB_RECEN 27 27 DC_GPIO_GENERICA_RECEN 28 28 DC_GPIO_BLON_RECEN 29 29 DC_GPIO_DIGON_RECEN 30 30 DC_GPIO_DDC2DATA_RECEN 31 31 mmDC_GPIO_RECEIVER_EN1 0 0x48a1 19 0 4294967295 DC_GPIO_DDC2CLK_RECEN 0 0 DC_GPIO_DDC1DATA_RECEN 1 1 DC_GPIO_DDC1CLK_RECEN 2 2 DC_GPIO_DDC3DATA_RECEN 3 3 DC_GPIO_DDC3CLK_RECEN 4 4 DC_GPIO_DDC4DATA_RECEN 5 5 DC_GPIO_DDC4CLK_RECEN 6 6 DC_GPIO_DDC5DATA_RECEN 7 7 DC_GPIO_DDC5CLK_RECEN 8 8 DC_GPIO_DDC6DATA_RECEN 9 9 DC_GPIO_DDC6CLK_RECEN 10 10 DC_GPIO_HPD2_RECEN 11 11 DC_GPIO_HPD3_RECEN 12 12 DC_GPIO_HPD4_RECEN 13 13 DC_GPIO_HPD5_RECEN 14 14 DC_GPIO_HPD6_RECEN 15 15 DC_GPIO_ENA_BL_RECEN 16 16 DC_GPIO_SWAPLOCK_A_RECEN 17 17 DC_GPIO_SWAPLOCK_B_RECEN 18 18 mmDC_GPIO_I2S_SPDIF_MASK 0 0x48a8 10 0 4294967295 DC_GPIO_I2SDATA0_MASK 0 3 DC_GPIO_MCLK0_MASK 4 4 DC_GPIO_BCLK0_MASK 5 5 DC_GPIO_LRCK0_MASK 6 6 DC_GPIO_SPDIF0_MASK 7 7 DC_GPIO_I2SDATA1_MASK 8 8 DC_GPIO_MCLK1_MASK 9 9 DC_GPIO_BCLK1_MASK 10 10 DC_GPIO_LRCK1_MASK 11 11 DC_GPIO_SPDIF1_MASK 12 12 mmDC_GPIO_I2S_SPDIF_A 0 0x48a9 10 0 4294967295 DC_GPIO_I2SDATA0_A 0 3 DC_GPIO_MCLK0_A 4 4 DC_GPIO_BCLK0_A 5 5 DC_GPIO_LRCK0_A 6 6 DC_GPIO_SPDIF0_A 7 7 DC_GPIO_I2SDATA1_A 8 8 DC_GPIO_MCLK1_A 9 9 DC_GPIO_BCLK1_A 10 10 DC_GPIO_LRCK1_A 11 11 DC_GPIO_SPDIF1_A 12 12 mmDC_GPIO_I2S_SPDIF_EN 0 0x48aa 16 0 4294967295 DC_GPIO_I2SDATA0_EN 0 3 DC_GPIO_MCLK0_EN 4 4 DC_GPIO_BCLK0_EN 5 5 DC_GPIO_LRCK0_EN 6 6 DC_GPIO_SPDIF0_EN 7 7 DC_GPIO_I2SDATA1_EN 8 8 DC_GPIO_MCLK1_EN 9 9 DC_GPIO_BCLK1_EN 10 10 DC_GPIO_LRCK1_EN 11 11 DC_GPIO_SPDIF1_EN 12 12 SPDIF1_APORT 13 13 SPDIF1_PU 14 14 SPDIF1_RXSEL 15 15 SPDIF1_SCHMEN 16 16 SPDIF1_SMODE_EN 17 17 SPDIF1_IMODE 18 18 mmDC_GPIO_I2S_SPDIF_Y 0 0x48ab 10 0 4294967295 DC_GPIO_I2SDATA0_Y 0 3 DC_GPIO_MCLK0_Y 4 4 DC_GPIO_BCLK0_Y 5 5 DC_GPIO_LRCK0_Y 6 6 DC_GPIO_SPDIF0_Y 7 7 DC_GPIO_I2SDATA1_Y 8 8 DC_GPIO_MCLK1_Y 9 9 DC_GPIO_BCLK1_Y 10 10 DC_GPIO_LRCK1_Y 11 11 DC_GPIO_SPDIF1_Y 12 12 mmDC_GPIO_I2S_SPDIF_STRENGTH 0 0x48ac 6 0 4294967295 I2S0_DRVSTRENGTH 0 2 SPDIF0_DRVSTRENGTH_SN 8 10 SPDIF0_DRVSTRENGTH_SP 11 13 I2S1_DRVSTRENGTH 16 18 SPDIF1_DRVSTRENGTH_SN 24 26 SPDIF1_DRVSTRENGTH_SP 27 29 mmDC_GPIO_TX12_EN 0 0x48ad 10 0 4294967295 DC_GPIO_BLON_TX12_EN 0 0 DC_GPIO_DIGON_TX12_EN 1 1 DC_GPIO_ENA_BL_TX12_EN 2 2 DC_GPIO_GENERICA_TX12_EN 3 3 DC_GPIO_GENERICB_TX12_EN 4 4 DC_GPIO_GENERICC_TX12_EN 5 5 DC_GPIO_GENERICD_TX12_EN 6 6 DC_GPIO_GENERICE_TX12_EN 7 7 DC_GPIO_GENERICF_TX12_EN 8 8 DC_GPIO_GENERICG_TX12_EN 9 9 mmDC_GPIO_AUX_CTRL_0 0 0x48ae 18 0 4294967295 DC_GPIO_AUX1_FALLSLEWSEL 0 1 DC_GPIO_AUX2_FALLSLEWSEL 2 3 DC_GPIO_AUX3_FALLSLEWSEL 4 5 DC_GPIO_AUX4_FALLSLEWSEL 6 7 DC_GPIO_AUX5_FALLSLEWSEL 8 9 DC_GPIO_AUX6_FALLSLEWSEL 10 11 DC_GPIO_AUX1_SPIKERCEN 16 16 DC_GPIO_AUX2_SPIKERCEN 17 17 DC_GPIO_AUX3_SPIKERCEN 18 18 DC_GPIO_AUX4_SPIKERCEN 19 19 DC_GPIO_AUX5_SPIKERCEN 20 20 DC_GPIO_AUX6_SPIKERCEN 21 21 DC_GPIO_AUX1_SPIKERCSEL 24 24 DC_GPIO_AUX2_SPIKERCSEL 25 25 DC_GPIO_AUX3_SPIKERCSEL 26 26 DC_GPIO_AUX4_SPIKERCSEL 27 27 DC_GPIO_AUX5_SPIKERCSEL 28 28 DC_GPIO_AUX6_SPIKERCSEL 29 29 mmDC_GPIO_AUX_CTRL_1 0 0x48af 24 0 4294967295 DC_GPIO_AUX1_CSEL_0P9 0 0 DC_GPIO_AUX2_CSEL_0P9 1 1 DC_GPIO_AUX3_CSEL_0P9 2 2 DC_GPIO_AUX4_CSEL_0P9 3 3 DC_GPIO_AUX5_CSEL_0P9 4 4 DC_GPIO_AUX6_CSEL_0P9 5 5 DC_GPIO_AUX1_CSEL_1P1 8 8 DC_GPIO_AUX2_CSEL_1P1 9 9 DC_GPIO_AUX3_CSEL_1P1 10 10 DC_GPIO_AUX4_CSEL_1P1 11 11 DC_GPIO_AUX5_CSEL_1P1 12 12 DC_GPIO_AUX6_CSEL_1P1 13 13 DC_GPIO_AUX1_RSEL_0P9 16 16 DC_GPIO_AUX2_RSEL_0P9 17 17 DC_GPIO_AUX3_RSEL_0P9 18 18 DC_GPIO_AUX4_RSEL_0P9 19 19 DC_GPIO_AUX5_RSEL_0P9 20 20 DC_GPIO_AUX6_RSEL_0P9 21 21 DC_GPIO_AUX1_RSEL_1P1 24 24 DC_GPIO_AUX2_RSEL_1P1 25 25 DC_GPIO_AUX3_RSEL_1P1 26 26 DC_GPIO_AUX4_RSEL_1P1 27 27 DC_GPIO_AUX5_RSEL_1P1 28 28 DC_GPIO_AUX6_RSEL_1P1 29 29 mmDC_GPIO_AUX_CTRL_2 0 0x48b0 12 0 4294967295 DC_GPIO_AUX1_BIASCRTEN 0 0 DC_GPIO_AUX2_BIASCRTEN 1 1 DC_GPIO_AUX3_BIASCRTEN 2 2 DC_GPIO_AUX4_BIASCRTEN 3 3 DC_GPIO_AUX5_BIASCRTEN 4 4 DC_GPIO_AUX6_BIASCRTEN 5 5 DC_IO_AUX1_SPARE 6 7 DC_IO_AUX2_SPARE 8 9 DC_IO_AUX3_SPARE 10 11 DC_IO_AUX4_SPARE 12 13 DC_IO_AUX5_SPARE 14 15 DC_IO_AUX6_SPARE 16 17 mmDC_GPIO_HPD_CTRL_0 0 0x48b1 21 0 4294967295 DC_GPIO_HPD12_FALLSLEWSEL 0 1 DC_GPIO_HPD34_FALLSLEWSEL 2 3 DC_GPIO_HPD56_FALLSLEWSEL 4 5 DC_GPIO_HPD12_SPIKERCEN 8 8 DC_GPIO_HPD34_SPIKERCEN 9 9 DC_GPIO_HPD56_SPIKERCEN 10 10 DC_GPIO_HPD12_SPIKERCSEL 12 12 DC_GPIO_HPD34_SPIKERCSEL 13 13 DC_GPIO_HPD56_SPIKERCSEL 14 14 DC_GPIO_HPD12_CSEL_0P9 16 16 DC_GPIO_HPD34_CSEL_0P9 17 17 DC_GPIO_HPD56_CSEL_0P9 18 18 DC_GPIO_HPD12_CSEL_1P1 20 20 DC_GPIO_HPD34_CSEL_1P1 21 21 DC_GPIO_HPD56_CSEL_1P1 22 22 DC_GPIO_HPD12_RSEL_0P9 24 24 DC_GPIO_HPD34_RSEL_0P9 25 25 DC_GPIO_HPD56_RSEL_0P9 26 26 DC_GPIO_HPD12_RSEL_1P1 28 28 DC_GPIO_HPD34_RSEL_1P1 29 29 DC_GPIO_HPD56_RSEL_1P1 30 30 mmDC_GPIO_HPD_CTRL_1 0 0x48b2 6 0 4294967295 DC_GPIO_HPD12_BIASCRTEN 0 0 DC_GPIO_HPD34_BIASCRTEN 1 1 DC_GPIO_HPD56_BIASCRTEN 2 2 DC_GPIO_HPD12_SLEWN 4 4 DC_GPIO_HPD34_SLEWN 5 5 DC_GPIO_HPD56_SLEWN 6 6 mmDAC_MACRO_CNTL_RESERVED0 0 0x48b8 1 0 4294967295 DAC_MACRO_CNTL_RESERVED 0 31 mmDAC_MACRO_CNTL_RESERVED1 0 0x48b9 1 0 4294967295 DAC_MACRO_CNTL_RESERVED 0 31 mmDAC_MACRO_CNTL_RESERVED2 0 0x48ba 1 0 4294967295 DAC_MACRO_CNTL_RESERVED 0 31 mmDAC_MACRO_CNTL_RESERVED3 0 0x48bb 1 0 4294967295 DAC_MACRO_CNTL_RESERVED 0 31 mmUNIPHY_MACRO_CNTL_RESERVED0 0 0x48c0 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED0 0 0x48c0 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 0 0x4960 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 0 0x9a00 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED0 0 0x9aa0 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED0 0 0x9b40 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED0 0 0x9be0 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED0 0 0x9c80 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED0 0 0x9d20 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED1 0 0x48c1 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED1 0 0x48c1 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED1 0 0x4961 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED1 0 0x9a01 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED1 0 0x9aa1 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED1 0 0x9b41 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED1 0 0x9be1 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED1 0 0x9c81 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED1 0 0x9d21 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED2 0 0x48c2 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED2 0 0x48c2 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED2 0 0x4962 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 0 0x9a02 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED2 0 0x9aa2 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED2 0 0x9b42 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED2 0 0x9be2 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED2 0 0x9c82 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED2 0 0x9d22 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED3 0 0x48c3 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED3 0 0x48c3 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED3 0 0x4963 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED3 0 0x9a03 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED3 0 0x9aa3 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED3 0 0x9b43 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED3 0 0x9be3 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED3 0 0x9c83 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED3 0 0x9d23 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED4 0 0x48c4 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED4 0 0x48c4 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4 0 0x4964 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED4 0 0x9a04 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED4 0 0x9aa4 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED4 0 0x9b44 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED4 0 0x9be4 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED4 0 0x9c84 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED4 0 0x9d24 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED5 0 0x48c5 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED5 0 0x48c5 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED5 0 0x4965 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 0 0x9a05 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED5 0 0x9aa5 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED5 0 0x9b45 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED5 0 0x9be5 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED5 0 0x9c85 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED5 0 0x9d25 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED6 0 0x48c6 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED6 0 0x48c6 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED6 0 0x4966 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED6 0 0x9a06 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED6 0 0x9aa6 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED6 0 0x9b46 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED6 0 0x9be6 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED6 0 0x9c86 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED6 0 0x9d26 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED7 0 0x48c7 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED7 0 0x48c7 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED7 0 0x4967 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED7 0 0x9a07 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED7 0 0x9aa7 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED7 0 0x9b47 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED7 0 0x9be7 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED7 0 0x9c87 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED7 0 0x9d27 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED8 0 0x48c8 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED8 0 0x48c8 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED8 0 0x4968 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED8 0 0x9a08 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED8 0 0x9aa8 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED8 0 0x9b48 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED8 0 0x9be8 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED8 0 0x9c88 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED8 0 0x9d28 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED9 0 0x48c9 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED9 0 0x48c9 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED9 0 0x4969 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED9 0 0x9a09 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED9 0 0x9aa9 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED9 0 0x9b49 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED9 0 0x9be9 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED9 0 0x9c89 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED9 0 0x9d29 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED10 0 0x48ca 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED10 0 0x48ca 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10 0 0x496a 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED10 0 0x9a0a 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED10 0 0x9aaa 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED10 0 0x9b4a 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED10 0 0x9bea 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED10 0 0x9c8a 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED10 0 0x9d2a 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED11 0 0x48cb 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED11 0 0x48cb 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED11 0 0x496b 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED11 0 0x9a0b 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED11 0 0x9aab 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED11 0 0x9b4b 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED11 0 0x9beb 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED11 0 0x9c8b 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED11 0 0x9d2b 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED12 0 0x48cc 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED12 0 0x48cc 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12 0 0x496c 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED12 0 0x9a0c 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED12 0 0x9aac 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED12 0 0x9b4c 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED12 0 0x9bec 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED12 0 0x9c8c 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED12 0 0x9d2c 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED13 0 0x48cd 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED13 0 0x48cd 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED13 0 0x496d 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED13 0 0x9a0d 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED13 0 0x9aad 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED13 0 0x9b4d 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED13 0 0x9bed 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED13 0 0x9c8d 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED13 0 0x9d2d 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED14 0 0x48ce 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED14 0 0x48ce 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED14 0 0x496e 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED14 0 0x9a0e 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED14 0 0x9aae 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED14 0 0x9b4e 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED14 0 0x9bee 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED14 0 0x9c8e 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED14 0 0x9d2e 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED15 0 0x48cf 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED15 0 0x48cf 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED15 0 0x496f 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED15 0 0x9a0f 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED15 0 0x9aaf 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED15 0 0x9b4f 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED15 0 0x9bef 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED15 0 0x9c8f 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED15 0 0x9d2f 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED16 0 0x48d0 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED16 0 0x48d0 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED16 0 0x4970 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED16 0 0x9a10 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED16 0 0x9ab0 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED16 0 0x9b50 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED16 0 0x9bf0 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED16 0 0x9c90 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED16 0 0x9d30 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED17 0 0x48d1 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED17 0 0x48d1 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED17 0 0x4971 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED17 0 0x9a11 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED17 0 0x9ab1 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED17 0 0x9b51 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED17 0 0x9bf1 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED17 0 0x9c91 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED17 0 0x9d31 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED18 0 0x48d2 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED18 0 0x48d2 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED18 0 0x4972 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED18 0 0x9a12 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED18 0 0x9ab2 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED18 0 0x9b52 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED18 0 0x9bf2 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED18 0 0x9c92 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED18 0 0x9d32 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED19 0 0x48d3 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED19 0 0x48d3 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED19 0 0x4973 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED19 0 0x9a13 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED19 0 0x9ab3 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED19 0 0x9b53 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED19 0 0x9bf3 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED19 0 0x9c93 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED19 0 0x9d33 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED20 0 0x48d4 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED20 0 0x48d4 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED20 0 0x4974 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED20 0 0x9a14 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED20 0 0x9ab4 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED20 0 0x9b54 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED20 0 0x9bf4 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED20 0 0x9c94 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED20 0 0x9d34 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED21 0 0x48d5 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED21 0 0x48d5 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED21 0 0x4975 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21 0 0x9a15 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED21 0 0x9ab5 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED21 0 0x9b55 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED21 0 0x9bf5 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED21 0 0x9c95 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED21 0 0x9d35 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED22 0 0x48d6 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED22 0 0x48d6 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED22 0 0x4976 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED22 0 0x9a16 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED22 0 0x9ab6 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED22 0 0x9b56 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED22 0 0x9bf6 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED22 0 0x9c96 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED22 0 0x9d36 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED23 0 0x48d7 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED23 0 0x48d7 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED23 0 0x4977 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED23 0 0x9a17 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED23 0 0x9ab7 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED23 0 0x9b57 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED23 0 0x9bf7 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED23 0 0x9c97 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED23 0 0x9d37 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED24 0 0x48d8 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED24 0 0x48d8 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED24 0 0x4978 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED24 0 0x9a18 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED24 0 0x9ab8 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED24 0 0x9b58 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED24 0 0x9bf8 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED24 0 0x9c98 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED24 0 0x9d38 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED25 0 0x48d9 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED25 0 0x48d9 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED25 0 0x4979 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED25 0 0x9a19 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED25 0 0x9ab9 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED25 0 0x9b59 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED25 0 0x9bf9 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED25 0 0x9c99 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED25 0 0x9d39 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED26 0 0x48da 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED26 0 0x48da 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED26 0 0x497a 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED26 0 0x9a1a 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED26 0 0x9aba 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED26 0 0x9b5a 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED26 0 0x9bfa 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED26 0 0x9c9a 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED26 0 0x9d3a 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED27 0 0x48db 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED27 0 0x48db 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED27 0 0x497b 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED27 0 0x9a1b 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED27 0 0x9abb 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED27 0 0x9b5b 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED27 0 0x9bfb 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED27 0 0x9c9b 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED27 0 0x9d3b 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED28 0 0x48dc 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED28 0 0x48dc 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED28 0 0x497c 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED28 0 0x9a1c 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED28 0 0x9abc 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED28 0 0x9b5c 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED28 0 0x9bfc 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED28 0 0x9c9c 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED28 0 0x9d3c 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED29 0 0x48dd 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED29 0 0x48dd 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED29 0 0x497d 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED29 0 0x9a1d 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED29 0 0x9abd 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED29 0 0x9b5d 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED29 0 0x9bfd 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED29 0 0x9c9d 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED29 0 0x9d3d 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED30 0 0x48de 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED30 0 0x48de 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED30 0 0x497e 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED30 0 0x9a1e 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED30 0 0x9abe 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED30 0 0x9b5e 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED30 0 0x9bfe 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED30 0 0x9c9e 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED30 0 0x9d3e 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED31 0 0x48df 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED31 0 0x48df 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED31 0 0x497f 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 0 0x9a1f 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED31 0 0x9abf 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED31 0 0x9b5f 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED31 0 0x9bff 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED31 0 0x9c9f 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED31 0 0x9d3f 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED32 0 0x48e0 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED32 0 0x48e0 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED32 0 0x4980 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED32 0 0x9a20 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED32 0 0x9ac0 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED32 0 0x9b60 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED32 0 0x9c00 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED32 0 0x9ca0 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED32 0 0x9d40 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED33 0 0x48e1 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED33 0 0x48e1 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED33 0 0x4981 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED33 0 0x9a21 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED33 0 0x9ac1 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED33 0 0x9b61 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED33 0 0x9c01 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED33 0 0x9ca1 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED33 0 0x9d41 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED34 0 0x48e2 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED34 0 0x48e2 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED34 0 0x4982 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED34 0 0x9a22 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED34 0 0x9ac2 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED34 0 0x9b62 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED34 0 0x9c02 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED34 0 0x9ca2 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED34 0 0x9d42 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED35 0 0x48e3 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED35 0 0x48e3 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED35 0 0x4983 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED35 0 0x9a23 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED35 0 0x9ac3 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED35 0 0x9b63 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED35 0 0x9c03 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED35 0 0x9ca3 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED35 0 0x9d43 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED36 0 0x48e4 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED36 0 0x48e4 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED36 0 0x4984 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED36 0 0x9a24 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED36 0 0x9ac4 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED36 0 0x9b64 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED36 0 0x9c04 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED36 0 0x9ca4 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED36 0 0x9d44 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED37 0 0x48e5 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED37 0 0x48e5 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED37 0 0x4985 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED37 0 0x9a25 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED37 0 0x9ac5 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED37 0 0x9b65 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED37 0 0x9c05 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED37 0 0x9ca5 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED37 0 0x9d45 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED38 0 0x48e6 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED38 0 0x48e6 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED38 0 0x4986 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED38 0 0x9a26 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED38 0 0x9ac6 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED38 0 0x9b66 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED38 0 0x9c06 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED38 0 0x9ca6 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED38 0 0x9d46 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED39 0 0x48e7 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED39 0 0x48e7 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED39 0 0x4987 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED39 0 0x9a27 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED39 0 0x9ac7 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED39 0 0x9b67 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED39 0 0x9c07 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED39 0 0x9ca7 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED39 0 0x9d47 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED40 0 0x48e8 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED40 0 0x48e8 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED40 0 0x4988 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 0 0x9a28 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED40 0 0x9ac8 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED40 0 0x9b68 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED40 0 0x9c08 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED40 0 0x9ca8 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED40 0 0x9d48 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED41 0 0x48e9 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED41 0 0x48e9 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED41 0 0x4989 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED41 0 0x9a29 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED41 0 0x9ac9 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED41 0 0x9b69 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED41 0 0x9c09 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED41 0 0x9ca9 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED41 0 0x9d49 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED42 0 0x48ea 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED42 0 0x48ea 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED42 0 0x498a 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED42 0 0x9a2a 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 0 0x9aca 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED42 0 0x9b6a 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED42 0 0x9c0a 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED42 0 0x9caa 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED42 0 0x9d4a 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED43 0 0x48eb 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED43 0 0x48eb 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED43 0 0x498b 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED43 0 0x9a2b 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED43 0 0x9acb 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED43 0 0x9b6b 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED43 0 0x9c0b 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED43 0 0x9cab 0 0 4294967295 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mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED51 0 0x9c13 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED51 0 0x9cb3 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED51 0 0x9d53 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED52 0 0x48f4 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED52 0 0x48f4 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52 0 0x4994 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED52 0 0x9a34 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED52 0 0x9ad4 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED52 0 0x9b74 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED52 0 0x9c14 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED52 0 0x9cb4 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED52 0 0x9d54 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED53 0 0x48f5 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED53 0 0x48f5 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 0 0x4995 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED53 0 0x9a35 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED53 0 0x9ad5 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED53 0 0x9b75 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED53 0 0x9c15 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED53 0 0x9cb5 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED53 0 0x9d55 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED54 0 0x48f6 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED54 0 0x48f6 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 0 0x4996 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED54 0 0x9a36 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED54 0 0x9ad6 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED54 0 0x9b76 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED54 0 0x9c16 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED54 0 0x9cb6 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED54 0 0x9d56 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED55 0 0x48f7 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED55 0 0x48f7 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED55 0 0x4997 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED55 0 0x9a37 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED55 0 0x9ad7 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED55 0 0x9b77 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED55 0 0x9c17 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED55 0 0x9cb7 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED55 0 0x9d57 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED56 0 0x48f8 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED56 0 0x48f8 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED56 0 0x4998 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED56 0 0x9a38 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED56 0 0x9ad8 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED56 0 0x9b78 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED56 0 0x9c18 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED56 0 0x9cb8 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED56 0 0x9d58 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED57 0 0x48f9 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED57 0 0x48f9 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED57 0 0x4999 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED57 0 0x9a39 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED57 0 0x9ad9 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED57 0 0x9b79 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED57 0 0x9c19 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED57 0 0x9cb9 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED57 0 0x9d59 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED58 0 0x48fa 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED58 0 0x48fa 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED58 0 0x499a 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED58 0 0x9a3a 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED58 0 0x9ada 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED58 0 0x9b7a 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED58 0 0x9c1a 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED58 0 0x9cba 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED58 0 0x9d5a 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED59 0 0x48fb 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED59 0 0x48fb 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED59 0 0x499b 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED59 0 0x9a3b 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED59 0 0x9adb 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED59 0 0x9b7b 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED59 0 0x9c1b 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED59 0 0x9cbb 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED59 0 0x9d5b 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED60 0 0x48fc 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED60 0 0x48fc 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED60 0 0x499c 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED60 0 0x9a3c 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED60 0 0x9adc 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED60 0 0x9b7c 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED60 0 0x9c1c 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED60 0 0x9cbc 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED60 0 0x9d5c 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED61 0 0x48fd 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED61 0 0x48fd 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED61 0 0x499d 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED61 0 0x9a3d 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED61 0 0x9add 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED61 0 0x9b7d 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED61 0 0x9c1d 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED61 0 0x9cbd 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED61 0 0x9d5d 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED62 0 0x48fe 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED62 0 0x48fe 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED62 0 0x499e 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED62 0 0x9a3e 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED62 0 0x9ade 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED62 0 0x9b7e 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED62 0 0x9c1e 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED62 0 0x9cbe 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED62 0 0x9d5e 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED63 0 0x48ff 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED63 0 0x48ff 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED63 0 0x499f 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED63 0 0x9a3f 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED63 0 0x9adf 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED63 0 0x9b7f 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED63 0 0x9c1f 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED63 0 0x9cbf 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED63 0 0x9d5f 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED64 0 0x4900 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED64 0 0x4900 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED64 0 0x49a0 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED64 0 0x9a40 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED64 0 0x9ae0 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED64 0 0x9b80 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED64 0 0x9c20 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED64 0 0x9cc0 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED64 0 0x9d60 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED65 0 0x4901 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED65 0 0x4901 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED65 0 0x49a1 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED65 0 0x9a41 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED65 0 0x9ae1 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED65 0 0x9b81 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED65 0 0x9c21 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED65 0 0x9cc1 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED65 0 0x9d61 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED66 0 0x4902 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED66 0 0x4902 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED66 0 0x49a2 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED66 0 0x9a42 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED66 0 0x9ae2 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED66 0 0x9b82 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED66 0 0x9c22 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED66 0 0x9cc2 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED66 0 0x9d62 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED67 0 0x4903 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED67 0 0x4903 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED67 0 0x49a3 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED67 0 0x9a43 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED67 0 0x9ae3 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED67 0 0x9b83 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED67 0 0x9c23 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED67 0 0x9cc3 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED67 0 0x9d63 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED68 0 0x4904 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED68 0 0x4904 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED68 0 0x49a4 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED68 0 0x9a44 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED68 0 0x9ae4 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED68 0 0x9b84 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED68 0 0x9c24 0 0 4294967295 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mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED73 0 0x9ae9 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED73 0 0x9b89 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED73 0 0x9c29 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED73 0 0x9cc9 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED73 0 0x9d69 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED74 0 0x490a 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED74 0 0x490a 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED74 0 0x49aa 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED74 0 0x9a4a 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED74 0 0x9aea 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED74 0 0x9b8a 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED74 0 0x9c2a 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED74 0 0x9cca 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED74 0 0x9d6a 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED75 0 0x490b 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED75 0 0x490b 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED75 0 0x49ab 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED75 0 0x9a4b 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED75 0 0x9aeb 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED75 0 0x9b8b 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED75 0 0x9c2b 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED75 0 0x9ccb 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED75 0 0x9d6b 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED76 0 0x490c 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED76 0 0x490c 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED76 0 0x49ac 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED76 0 0x9a4c 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED76 0 0x9aec 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED76 0 0x9b8c 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED76 0 0x9c2c 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED76 0 0x9ccc 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED76 0 0x9d6c 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED77 0 0x490d 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED77 0 0x490d 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED77 0 0x49ad 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED77 0 0x9a4d 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED77 0 0x9aed 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED77 0 0x9b8d 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED77 0 0x9c2d 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED77 0 0x9ccd 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED77 0 0x9d6d 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED78 0 0x490e 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED78 0 0x490e 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED78 0 0x49ae 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED78 0 0x9a4e 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED78 0 0x9aee 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED78 0 0x9b8e 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED78 0 0x9c2e 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED78 0 0x9cce 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED78 0 0x9d6e 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED79 0 0x490f 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED79 0 0x490f 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED79 0 0x49af 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED79 0 0x9a4f 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED79 0 0x9aef 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED79 0 0x9b8f 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED79 0 0x9c2f 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED79 0 0x9ccf 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED79 0 0x9d6f 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED80 0 0x4910 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED80 0 0x4910 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED80 0 0x49b0 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED80 0 0x9a50 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED80 0 0x9af0 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED80 0 0x9b90 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED80 0 0x9c30 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED80 0 0x9cd0 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED80 0 0x9d70 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED81 0 0x4911 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED81 0 0x4911 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED81 0 0x49b1 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED81 0 0x9a51 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED81 0 0x9af1 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED81 0 0x9b91 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED81 0 0x9c31 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED81 0 0x9cd1 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED81 0 0x9d71 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED82 0 0x4912 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED82 0 0x4912 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED82 0 0x49b2 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED82 0 0x9a52 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED82 0 0x9af2 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED82 0 0x9b92 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED82 0 0x9c32 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED82 0 0x9cd2 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED82 0 0x9d72 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED83 0 0x4913 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED83 0 0x4913 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED83 0 0x49b3 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED83 0 0x9a53 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED83 0 0x9af3 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED83 0 0x9b93 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED83 0 0x9c33 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED83 0 0x9cd3 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED83 0 0x9d73 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED84 0 0x4914 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED84 0 0x4914 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED84 0 0x49b4 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED84 0 0x9a54 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED84 0 0x9af4 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED84 0 0x9b94 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED84 0 0x9c34 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED84 0 0x9cd4 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED84 0 0x9d74 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED85 0 0x4915 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED85 0 0x4915 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED85 0 0x49b5 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED85 0 0x9a55 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED85 0 0x9af5 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED85 0 0x9b95 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED85 0 0x9c35 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED85 0 0x9cd5 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED85 0 0x9d75 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED86 0 0x4916 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED86 0 0x4916 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED86 0 0x49b6 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED86 0 0x9a56 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED86 0 0x9af6 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED86 0 0x9b96 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED86 0 0x9c36 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED86 0 0x9cd6 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED86 0 0x9d76 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED87 0 0x4917 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED87 0 0x4917 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED87 0 0x49b7 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED87 0 0x9a57 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED87 0 0x9af7 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED87 0 0x9b97 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED87 0 0x9c37 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED87 0 0x9cd7 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED87 0 0x9d77 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED88 0 0x4918 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED88 0 0x4918 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED88 0 0x49b8 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED88 0 0x9a58 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED88 0 0x9af8 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED88 0 0x9b98 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED88 0 0x9c38 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED88 0 0x9cd8 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED88 0 0x9d78 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED89 0 0x4919 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED89 0 0x4919 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED89 0 0x49b9 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED89 0 0x9a59 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED89 0 0x9af9 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED89 0 0x9b99 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED89 0 0x9c39 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED89 0 0x9cd9 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED89 0 0x9d79 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED90 0 0x491a 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED90 0 0x491a 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED90 0 0x49ba 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED90 0 0x9a5a 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED90 0 0x9afa 0 0 4294967295 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mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED93 0 0x9c3d 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED93 0 0x9cdd 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED93 0 0x9d7d 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED94 0 0x491e 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED94 0 0x491e 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED94 0 0x49be 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED94 0 0x9a5e 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED94 0 0x9afe 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED94 0 0x9b9e 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED94 0 0x9c3e 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED94 0 0x9cde 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED94 0 0x9d7e 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED95 0 0x491f 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED95 0 0x491f 0 0 4294967295 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mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED96 0 0x9ce0 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED96 0 0x9d80 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED97 0 0x4921 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED97 0 0x4921 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED97 0 0x49c1 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED97 0 0x9a61 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED97 0 0x9b01 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED97 0 0x9ba1 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED97 0 0x9c41 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED97 0 0x9ce1 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED97 0 0x9d81 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED98 0 0x4922 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED98 0 0x4922 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED98 0 0x49c2 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED98 0 0x9a62 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED98 0 0x9b02 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED98 0 0x9ba2 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED98 0 0x9c42 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED98 0 0x9ce2 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED98 0 0x9d82 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED99 0 0x4923 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED99 0 0x4923 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED99 0 0x49c3 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED99 0 0x9a63 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED99 0 0x9b03 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED99 0 0x9ba3 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED99 0 0x9c43 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED99 0 0x9ce3 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED99 0 0x9d83 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED100 0 0x4924 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED100 0 0x4924 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED100 0 0x49c4 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED100 0 0x9a64 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED100 0 0x9b04 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED100 0 0x9ba4 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED100 0 0x9c44 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED100 0 0x9ce4 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED100 0 0x9d84 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED101 0 0x4925 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED101 0 0x4925 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED101 0 0x49c5 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED101 0 0x9a65 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED101 0 0x9b05 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED101 0 0x9ba5 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED101 0 0x9c45 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED101 0 0x9ce5 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED101 0 0x9d85 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED102 0 0x4926 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED102 0 0x4926 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED102 0 0x49c6 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED102 0 0x9a66 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED102 0 0x9b06 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED102 0 0x9ba6 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED102 0 0x9c46 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED102 0 0x9ce6 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED102 0 0x9d86 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED103 0 0x4927 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED103 0 0x4927 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED103 0 0x49c7 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED103 0 0x9a67 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED103 0 0x9b07 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED103 0 0x9ba7 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED103 0 0x9c47 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED103 0 0x9ce7 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED103 0 0x9d87 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED104 0 0x4928 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED104 0 0x4928 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED104 0 0x49c8 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED104 0 0x9a68 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED104 0 0x9b08 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED104 0 0x9ba8 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED104 0 0x9c48 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED104 0 0x9ce8 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED104 0 0x9d88 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED105 0 0x4929 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED105 0 0x4929 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED105 0 0x49c9 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED105 0 0x9a69 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED105 0 0x9b09 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED105 0 0x9ba9 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED105 0 0x9c49 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED105 0 0x9ce9 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED105 0 0x9d89 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED106 0 0x492a 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED106 0 0x492a 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED106 0 0x49ca 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED106 0 0x9a6a 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED106 0 0x9b0a 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED106 0 0x9baa 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED106 0 0x9c4a 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED106 0 0x9cea 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED106 0 0x9d8a 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED107 0 0x492b 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED107 0 0x492b 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED107 0 0x49cb 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED107 0 0x9a6b 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED107 0 0x9b0b 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED107 0 0x9bab 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED107 0 0x9c4b 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED107 0 0x9ceb 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED107 0 0x9d8b 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED108 0 0x492c 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED108 0 0x492c 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED108 0 0x49cc 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED108 0 0x9a6c 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED108 0 0x9b0c 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED108 0 0x9bac 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED108 0 0x9c4c 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED108 0 0x9cec 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED108 0 0x9d8c 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED109 0 0x492d 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED109 0 0x492d 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED109 0 0x49cd 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED109 0 0x9a6d 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED109 0 0x9b0d 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED109 0 0x9bad 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED109 0 0x9c4d 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED109 0 0x9ced 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED109 0 0x9d8d 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED110 0 0x492e 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED110 0 0x492e 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED110 0 0x49ce 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED110 0 0x9a6e 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED110 0 0x9b0e 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED110 0 0x9bae 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED110 0 0x9c4e 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED110 0 0x9cee 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED110 0 0x9d8e 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED111 0 0x492f 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED111 0 0x492f 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED111 0 0x49cf 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED111 0 0x9a6f 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED111 0 0x9b0f 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED111 0 0x9baf 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED111 0 0x9c4f 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED111 0 0x9cef 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED111 0 0x9d8f 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED112 0 0x4930 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED112 0 0x4930 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED112 0 0x49d0 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED112 0 0x9a70 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED112 0 0x9b10 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED112 0 0x9bb0 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED112 0 0x9c50 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED112 0 0x9cf0 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED112 0 0x9d90 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED113 0 0x4931 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED113 0 0x4931 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED113 0 0x49d1 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED113 0 0x9a71 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED113 0 0x9b11 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED113 0 0x9bb1 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED113 0 0x9c51 0 0 4294967295 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4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED115 0 0x9a73 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED115 0 0x9b13 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED115 0 0x9bb3 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED115 0 0x9c53 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED115 0 0x9cf3 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED115 0 0x9d93 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED116 0 0x4934 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED116 0 0x4934 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED116 0 0x49d4 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED116 0 0x9a74 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED116 0 0x9b14 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED116 0 0x9bb4 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED116 0 0x9c54 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED116 0 0x9cf4 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED116 0 0x9d94 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED117 0 0x4935 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED117 0 0x4935 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED117 0 0x49d5 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED117 0 0x9a75 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED117 0 0x9b15 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED117 0 0x9bb5 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED117 0 0x9c55 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED117 0 0x9cf5 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED117 0 0x9d95 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED118 0 0x4936 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED118 0 0x4936 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED118 0 0x49d6 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED118 0 0x9a76 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED118 0 0x9b16 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED118 0 0x9bb6 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED118 0 0x9c56 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED118 0 0x9cf6 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED118 0 0x9d96 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED119 0 0x4937 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED119 0 0x4937 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED119 0 0x49d7 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED119 0 0x9a77 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED119 0 0x9b17 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED119 0 0x9bb7 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED119 0 0x9c57 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED119 0 0x9cf7 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED119 0 0x9d97 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED120 0 0x4938 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED120 0 0x4938 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED120 0 0x49d8 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED120 0 0x9a78 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED120 0 0x9b18 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED120 0 0x9bb8 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED120 0 0x9c58 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED120 0 0x9cf8 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED120 0 0x9d98 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED121 0 0x4939 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED121 0 0x4939 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED121 0 0x49d9 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED121 0 0x9a79 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED121 0 0x9b19 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED121 0 0x9bb9 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED121 0 0x9c59 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED121 0 0x9cf9 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED121 0 0x9d99 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED122 0 0x493a 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED122 0 0x493a 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED122 0 0x49da 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED122 0 0x9a7a 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED122 0 0x9b1a 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED122 0 0x9bba 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED122 0 0x9c5a 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED122 0 0x9cfa 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED122 0 0x9d9a 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED123 0 0x493b 1 0 4294967295 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0x9bbc 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED124 0 0x9c5c 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED124 0 0x9cfc 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED124 0 0x9d9c 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED125 0 0x493d 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED125 0 0x493d 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED125 0 0x49dd 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED125 0 0x9a7d 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED125 0 0x9b1d 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED125 0 0x9bbd 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED125 0 0x9c5d 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED125 0 0x9cfd 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED125 0 0x9d9d 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED126 0 0x493e 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 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mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED127 0 0x9c5f 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED127 0 0x9cff 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED127 0 0x9d9f 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED128 0 0x4940 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED128 0 0x4940 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED128 0 0x49e0 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED128 0 0x9a80 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED128 0 0x9b20 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED128 0 0x9bc0 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED128 0 0x9c60 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED128 0 0x9d00 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED128 0 0x9da0 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED129 0 0x4941 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED129 0 0x4941 0 0 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UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED140 0 0x494c 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED140 0 0x49ec 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED140 0 0x9a8c 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED140 0 0x9b2c 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED140 0 0x9bcc 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED140 0 0x9c6c 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED140 0 0x9d0c 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED140 0 0x9dac 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED141 0 0x494d 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED141 0 0x494d 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED141 0 0x49ed 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED141 0 0x9a8d 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED141 0 0x9b2d 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED141 0 0x9bcd 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED141 0 0x9c6d 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED141 0 0x9d0d 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED141 0 0x9dad 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED142 0 0x494e 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED142 0 0x494e 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED142 0 0x49ee 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED142 0 0x9a8e 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED142 0 0x9b2e 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED142 0 0x9bce 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED142 0 0x9c6e 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED142 0 0x9d0e 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED142 0 0x9dae 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED143 0 0x494f 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED143 0 0x494f 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED143 0 0x49ef 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED143 0 0x9a8f 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED143 0 0x9b2f 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED143 0 0x9bcf 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED143 0 0x9c6f 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED143 0 0x9d0f 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED143 0 0x9daf 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED144 0 0x4950 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED144 0 0x4950 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED144 0 0x49f0 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED144 0 0x9a90 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED144 0 0x9b30 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED144 0 0x9bd0 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED144 0 0x9c70 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED144 0 0x9d10 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED144 0 0x9db0 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED145 0 0x4951 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED145 0 0x4951 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED145 0 0x49f1 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED145 0 0x9a91 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED145 0 0x9b31 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED145 0 0x9bd1 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED145 0 0x9c71 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED145 0 0x9d11 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED145 0 0x9db1 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED146 0 0x4952 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED146 0 0x4952 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED146 0 0x49f2 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED146 0 0x9a92 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED146 0 0x9b32 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED146 0 0x9bd2 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED146 0 0x9c72 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED146 0 0x9d12 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED146 0 0x9db2 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED147 0 0x4953 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED147 0 0x4953 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED147 0 0x49f3 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED147 0 0x9a93 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED147 0 0x9b33 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED147 0 0x9bd3 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED147 0 0x9c73 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED147 0 0x9d13 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED147 0 0x9db3 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED148 0 0x4954 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED148 0 0x4954 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED148 0 0x49f4 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED148 0 0x9a94 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED148 0 0x9b34 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED148 0 0x9bd4 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED148 0 0x9c74 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED148 0 0x9d14 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED148 0 0x9db4 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED149 0 0x4955 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED149 0 0x4955 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED149 0 0x49f5 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED149 0 0x9a95 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED149 0 0x9b35 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED149 0 0x9bd5 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED149 0 0x9c75 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED149 0 0x9d15 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED149 0 0x9db5 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED150 0 0x4956 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED150 0 0x4956 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED150 0 0x49f6 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED150 0 0x9a96 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED150 0 0x9b36 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED150 0 0x9bd6 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED150 0 0x9c76 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED150 0 0x9d16 0 0 4294967295 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0x9bde 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED158 0 0x9c7e 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED158 0 0x9d1e 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED158 0 0x9dbe 0 0 4294967295 mmUNIPHY_MACRO_CNTL_RESERVED159 0 0x495f 1 0 4294967295 UNIPHY_MACRO_CNTL_RESERVED 0 31 mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED159 0 0x495f 0 0 4294967295 mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED159 0 0x49ff 0 0 4294967295 mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED159 0 0x9a9f 0 0 4294967295 mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED159 0 0x9b3f 0 0 4294967295 mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED159 0 0x9bdf 0 0 4294967295 mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED159 0 0x9c7f 0 0 4294967295 mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED159 0 0x9d1f 0 0 4294967295 mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED159 0 0x9dbf 0 0 4294967295 mmDCRX_PHY_MACRO_CNTL_RESERVED0 0 0x5a84 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED1 0 0x5a85 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED2 0 0x5a86 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED3 0 0x5a87 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED4 0 0x5a88 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED5 0 0x5a89 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED6 0 0x5a8a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED7 0 0x5a8b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED8 0 0x5a8c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED9 0 0x5a8d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED10 0 0x5a8e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED11 0 0x5a8f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED12 0 0x5a90 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED13 0 0x5a91 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED14 0 0x5a92 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED15 0 0x5a93 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED16 0 0x5a94 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED17 0 0x5a95 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED18 0 0x5a96 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED19 0 0x5a97 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED20 0 0x5a98 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED21 0 0x5a99 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED22 0 0x5a9a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED23 0 0x5a9b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED24 0 0x5a9c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED25 0 0x5a9d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED26 0 0x5a9e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED27 0 0x5a9f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED28 0 0x5aa0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED29 0 0x5aa1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED30 0 0x5aa2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED31 0 0x5aa3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED32 0 0x5aa4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED33 0 0x5aa5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED34 0 0x5aa6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED35 0 0x5aa7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED36 0 0x5aa8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED37 0 0x5aa9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED38 0 0x5aaa 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED39 0 0x5aab 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED40 0 0x5aac 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED41 0 0x5aad 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED42 0 0x5aae 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED43 0 0x5aaf 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED44 0 0x5ab0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED45 0 0x5ab1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED46 0 0x5ab2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED47 0 0x5ab3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED48 0 0x5ab4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED49 0 0x5ab5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED50 0 0x5ab6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED51 0 0x5ab7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED52 0 0x5ab8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED53 0 0x5ab9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED54 0 0x5aba 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED55 0 0x5abb 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED56 0 0x5abc 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED57 0 0x5abd 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED58 0 0x5abe 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED59 0 0x5abf 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED60 0 0x5ac0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED61 0 0x5ac1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED62 0 0x5ac2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED63 0 0x5ac3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED64 0 0x5ac4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED65 0 0x5ac5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED66 0 0x5ac6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED67 0 0x5ac7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED68 0 0x5ac8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED69 0 0x5ac9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED70 0 0x5aca 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED71 0 0x5acb 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED72 0 0x5acc 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED73 0 0x5acd 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED74 0 0x5ace 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED75 0 0x5acf 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED76 0 0x5ad0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED77 0 0x5ad1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED78 0 0x5ad2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED79 0 0x5ad3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED80 0 0x5ad4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED81 0 0x5ad5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED82 0 0x5ad6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED83 0 0x5ad7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED84 0 0x5ad8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED85 0 0x5ad9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED86 0 0x5ada 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED87 0 0x5adb 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED88 0 0x5adc 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED89 0 0x5add 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED90 0 0x5ade 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED91 0 0x5adf 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED92 0 0x5ae0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED93 0 0x5ae1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED94 0 0x5ae2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED95 0 0x5ae3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED96 0 0x5ae4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED97 0 0x5ae5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED98 0 0x5ae6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED99 0 0x5ae7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED100 0 0x5ae8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED101 0 0x5ae9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED102 0 0x5aea 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED103 0 0x5aeb 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED104 0 0x5aec 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED105 0 0x5aed 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED106 0 0x5aee 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED107 0 0x5aef 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED108 0 0x5af0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED109 0 0x5af1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED110 0 0x5af2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED111 0 0x5af3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED112 0 0x5af4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED113 0 0x5af5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED114 0 0x5af6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED115 0 0x5af7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED116 0 0x5af8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED117 0 0x5af9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED118 0 0x5afa 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED119 0 0x5afb 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED120 0 0x5afc 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED121 0 0x5afd 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED122 0 0x5afe 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED123 0 0x5aff 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED124 0 0x5b00 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED125 0 0x5b01 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED126 0 0x5b02 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED127 0 0x5b03 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED128 0 0x5b04 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED129 0 0x5b05 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED130 0 0x5b06 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED131 0 0x5b07 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED132 0 0x5b08 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED133 0 0x5b09 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED134 0 0x5b0a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED135 0 0x5b0b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED136 0 0x5b0c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED137 0 0x5b0d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED138 0 0x5b0e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED139 0 0x5b0f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED140 0 0x5b10 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED141 0 0x5b11 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED142 0 0x5b12 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED143 0 0x5b13 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED144 0 0x5b14 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED145 0 0x5b15 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED146 0 0x5b16 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED147 0 0x5b17 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED148 0 0x5b18 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED149 0 0x5b19 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED150 0 0x5b1a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED151 0 0x5b1b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED152 0 0x5b1c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED153 0 0x5b1d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED154 0 0x5b1e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED155 0 0x5b1f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED156 0 0x5b20 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED157 0 0x5b21 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED158 0 0x5b22 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED159 0 0x5b23 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED160 0 0x5b24 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED161 0 0x5b25 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED162 0 0x5b26 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED163 0 0x5b27 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED164 0 0x5b28 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED165 0 0x5b29 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED166 0 0x5b2a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED167 0 0x5b2b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED168 0 0x5b2c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED169 0 0x5b2d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED170 0 0x5b2e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED171 0 0x5b2f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED172 0 0x5b30 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED173 0 0x5b31 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED174 0 0x5b32 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED175 0 0x5b33 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED176 0 0x5b34 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED177 0 0x5b35 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED178 0 0x5b36 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED179 0 0x5b37 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED180 0 0x5b38 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED181 0 0x5b39 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED182 0 0x5b3a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED183 0 0x5b3b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED184 0 0x5b3c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED185 0 0x5b3d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED186 0 0x5b3e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED187 0 0x5b3f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED188 0 0x5b40 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED189 0 0x5b41 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED190 0 0x5b42 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED191 0 0x5b43 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED192 0 0x5b44 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED193 0 0x5b45 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED194 0 0x5b46 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED195 0 0x5b47 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED196 0 0x5b48 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED197 0 0x5b49 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED198 0 0x5b4a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED199 0 0x5b4b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED200 0 0x5b4c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED201 0 0x5b4d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED202 0 0x5b4e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED203 0 0x5b4f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED204 0 0x5b50 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED205 0 0x5b51 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED206 0 0x5b52 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED207 0 0x5b53 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED208 0 0x5b54 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED209 0 0x5b55 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED210 0 0x5b56 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED211 0 0x5b57 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED212 0 0x5b58 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED213 0 0x5b59 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED214 0 0x5b5a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED215 0 0x5b5b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED216 0 0x5b5c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED217 0 0x5b5d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED218 0 0x5b5e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED219 0 0x5b5f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED220 0 0x5b60 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED221 0 0x5b61 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED222 0 0x5b62 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED223 0 0x5b63 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED224 0 0x5b64 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED225 0 0x5b65 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED226 0 0x5b66 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED227 0 0x5b67 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED228 0 0x5b68 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED229 0 0x5b69 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED230 0 0x5b6a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED231 0 0x5b6b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED232 0 0x5b6c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED233 0 0x5b6d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED234 0 0x5b6e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED235 0 0x5b6f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED236 0 0x5b70 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED237 0 0x5b71 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED238 0 0x5b72 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED239 0 0x5b73 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED240 0 0x5b74 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED241 0 0x5b75 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED242 0 0x5b76 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED243 0 0x5b77 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED244 0 0x5b78 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED245 0 0x5b79 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED246 0 0x5b7a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED247 0 0x5b7b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED248 0 0x5b7c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED249 0 0x5b7d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED250 0 0x5b7e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED251 0 0x5b7f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED252 0 0x5b80 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED253 0 0x5b81 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED254 0 0x5b82 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED255 0 0x5b83 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED256 0 0x5b84 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED257 0 0x5b85 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED258 0 0x5b86 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED259 0 0x5b87 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED260 0 0x5b88 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED261 0 0x5b89 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED262 0 0x5b8a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED263 0 0x5b8b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED264 0 0x5b8c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED265 0 0x5b8d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED266 0 0x5b8e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED267 0 0x5b8f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED268 0 0x5b90 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED269 0 0x5b91 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED270 0 0x5b92 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED271 0 0x5b93 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED272 0 0x5b94 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED273 0 0x5b95 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED274 0 0x5b96 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED275 0 0x5b97 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED276 0 0x5b98 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED277 0 0x5b99 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED278 0 0x5b9a 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED279 0 0x5b9b 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED280 0 0x5b9c 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED281 0 0x5b9d 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED282 0 0x5b9e 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED283 0 0x5b9f 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED284 0 0x5ba0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED285 0 0x5ba1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED286 0 0x5ba2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED287 0 0x5ba3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED288 0 0x5ba4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED289 0 0x5ba5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED290 0 0x5ba6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED291 0 0x5ba7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED292 0 0x5ba8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED293 0 0x5ba9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED294 0 0x5baa 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED295 0 0x5bab 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED296 0 0x5bac 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED297 0 0x5bad 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED298 0 0x5bae 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED299 0 0x5baf 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED300 0 0x5bb0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED301 0 0x5bb1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED302 0 0x5bb2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED303 0 0x5bb3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED304 0 0x5bb4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED305 0 0x5bb5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED306 0 0x5bb6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED307 0 0x5bb7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED308 0 0x5bb8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED309 0 0x5bb9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED310 0 0x5bba 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED311 0 0x5bbb 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED312 0 0x5bbc 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED313 0 0x5bbd 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED314 0 0x5bbe 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED315 0 0x5bbf 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED316 0 0x5bc0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED317 0 0x5bc1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED318 0 0x5bc2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED319 0 0x5bc3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED320 0 0x5bc4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED321 0 0x5bc5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED322 0 0x5bc6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED323 0 0x5bc7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED324 0 0x5bc8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED325 0 0x5bc9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED326 0 0x5bca 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED327 0 0x5bcb 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED328 0 0x5bcc 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED329 0 0x5bcd 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED330 0 0x5bce 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED331 0 0x5bcf 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED332 0 0x5bd0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED333 0 0x5bd1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED334 0 0x5bd2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED335 0 0x5bd3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED336 0 0x5bd4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED337 0 0x5bd5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED338 0 0x5bd6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED339 0 0x5bd7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED340 0 0x5bd8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED341 0 0x5bd9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED342 0 0x5bda 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED343 0 0x5bdb 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED344 0 0x5bdc 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED345 0 0x5bdd 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED346 0 0x5bde 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED347 0 0x5bdf 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED348 0 0x5be0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED349 0 0x5be1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED350 0 0x5be2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED351 0 0x5be3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED352 0 0x5be4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED353 0 0x5be5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED354 0 0x5be6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED355 0 0x5be7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED356 0 0x5be8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED357 0 0x5be9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED358 0 0x5bea 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED359 0 0x5beb 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED360 0 0x5bec 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED361 0 0x5bed 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED362 0 0x5bee 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED363 0 0x5bef 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED364 0 0x5bf0 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED365 0 0x5bf1 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED366 0 0x5bf2 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED367 0 0x5bf3 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED368 0 0x5bf4 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED369 0 0x5bf5 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED370 0 0x5bf6 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED371 0 0x5bf7 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED372 0 0x5bf8 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED373 0 0x5bf9 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED374 0 0x5bfa 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED375 0 0x5bfb 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED376 0 0x5bfc 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED377 0 0x5bfd 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED378 0 0x5bfe 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDCRX_PHY_MACRO_CNTL_RESERVED379 0 0x5bff 1 0 4294967295 DCRX_PHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED0 0 0x5d98 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED1 0 0x5d99 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED2 0 0x5d9a 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED3 0 0x5d9b 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED4 0 0x5d9c 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED5 0 0x5d9d 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED6 0 0x5d9e 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED7 0 0x5d9f 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED8 0 0x5da0 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED9 0 0x5da1 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED10 0 0x5da2 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED11 0 0x5da3 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED12 0 0x5da4 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED13 0 0x5da5 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED14 0 0x5da6 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED15 0 0x5da7 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED16 0 0x5da8 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED17 0 0x5da9 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED18 0 0x5daa 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED19 0 0x5dab 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED20 0 0x5dac 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED21 0 0x5dad 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED22 0 0x5dae 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED23 0 0x5daf 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED24 0 0x5db0 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED25 0 0x5db1 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED26 0 0x5db2 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED27 0 0x5db3 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED28 0 0x5db4 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED29 0 0x5db5 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED30 0 0x5db6 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED31 0 0x5db7 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED32 0 0x5db8 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED33 0 0x5db9 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED34 0 0x5dba 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED35 0 0x5dbb 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED36 0 0x5dbc 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED37 0 0x5dbd 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED38 0 0x5dbe 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED39 0 0x5dbf 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED40 0 0x5dc0 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED41 0 0x5dc1 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED42 0 0x5dc2 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED43 0 0x5dc3 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED44 0 0x5dc4 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED45 0 0x5dc5 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED46 0 0x5dc6 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED47 0 0x5dc7 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED48 0 0x5dc8 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED49 0 0x5dc9 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED50 0 0x5dca 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED51 0 0x5dcb 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED52 0 0x5dcc 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED53 0 0x5dcd 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED54 0 0x5dce 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED55 0 0x5dcf 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED56 0 0x5dd0 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED57 0 0x5dd1 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED58 0 0x5dd2 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED59 0 0x5dd3 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED60 0 0x5dd4 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED61 0 0x5dd5 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED62 0 0x5dd6 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmDPHY_MACRO_CNTL_RESERVED63 0 0x5dd7 1 0 4294967295 DPHY_MACRO_CNTL_RESERVED 0 31 mmGRPH_ENABLE 0 0x1a00 2 0 4294967295 GRPH_ENABLE 0 0 GRPH_KEYER_ALPHA_SEL 1 1 mmDCP0_GRPH_ENABLE 0 0x1a00 0 0 4294967295 mmDCP1_GRPH_ENABLE 0 0x1c00 0 0 4294967295 mmDCP2_GRPH_ENABLE 0 0x1e00 0 0 4294967295 mmDCP3_GRPH_ENABLE 0 0x4000 0 0 4294967295 mmDCP4_GRPH_ENABLE 0 0x4200 0 0 4294967295 mmDCP5_GRPH_ENABLE 0 0x4400 0 0 4294967295 mmGRPH_CONTROL 0 0x1a01 14 0 4294967295 GRPH_DEPTH 0 1 GRPH_NUM_BANKS 2 3 GRPH_Z 4 5 GRPH_BANK_WIDTH 6 7 GRPH_FORMAT 8 10 GRPH_BANK_HEIGHT 11 12 GRPH_TILE_SPLIT 13 15 GRPH_ADDRESS_TRANSLATION_ENABLE 16 16 GRPH_PRIVILEGED_ACCESS_ENABLE 17 17 GRPH_MACRO_TILE_ASPECT 18 19 GRPH_ARRAY_MODE 20 23 GRPH_PIPE_CONFIG 24 28 GRPH_MICRO_TILE_MODE 29 30 GRPH_COLOR_EXPANSION_MODE 31 31 mmDCP0_GRPH_CONTROL 0 0x1a01 0 0 4294967295 mmDCP1_GRPH_CONTROL 0 0x1c01 0 0 4294967295 mmDCP2_GRPH_CONTROL 0 0x1e01 0 0 4294967295 mmDCP3_GRPH_CONTROL 0 0x4001 0 0 4294967295 mmDCP4_GRPH_CONTROL 0 0x4201 0 0 4294967295 mmDCP5_GRPH_CONTROL 0 0x4401 0 0 4294967295 mmGRPH_LUT_10BIT_BYPASS 0 0x1a02 2 0 4294967295 GRPH_LUT_10BIT_BYPASS_EN 8 8 GRPH_LUT_10BIT_BYPASS_DBL_BUF_EN 16 16 mmDCP0_GRPH_LUT_10BIT_BYPASS 0 0x1a02 0 0 4294967295 mmDCP1_GRPH_LUT_10BIT_BYPASS 0 0x1c02 0 0 4294967295 mmDCP2_GRPH_LUT_10BIT_BYPASS 0 0x1e02 0 0 4294967295 mmDCP3_GRPH_LUT_10BIT_BYPASS 0 0x4002 0 0 4294967295 mmDCP4_GRPH_LUT_10BIT_BYPASS 0 0x4202 0 0 4294967295 mmDCP5_GRPH_LUT_10BIT_BYPASS 0 0x4402 0 0 4294967295 mmGRPH_SWAP_CNTL 0 0x1a03 5 0 4294967295 GRPH_ENDIAN_SWAP 0 1 GRPH_RED_CROSSBAR 4 5 GRPH_GREEN_CROSSBAR 6 7 GRPH_BLUE_CROSSBAR 8 9 GRPH_ALPHA_CROSSBAR 10 11 mmDCP0_GRPH_SWAP_CNTL 0 0x1a03 0 0 4294967295 mmDCP1_GRPH_SWAP_CNTL 0 0x1c03 0 0 4294967295 mmDCP2_GRPH_SWAP_CNTL 0 0x1e03 0 0 4294967295 mmDCP3_GRPH_SWAP_CNTL 0 0x4003 0 0 4294967295 mmDCP4_GRPH_SWAP_CNTL 0 0x4203 0 0 4294967295 mmDCP5_GRPH_SWAP_CNTL 0 0x4403 0 0 4294967295 mmGRPH_PRIMARY_SURFACE_ADDRESS 0 0x1a04 2 0 4294967295 GRPH_PRIMARY_DFQ_ENABLE 0 0 GRPH_PRIMARY_SURFACE_ADDRESS 8 31 mmDCP0_GRPH_PRIMARY_SURFACE_ADDRESS 0 0x1a04 0 0 4294967295 mmDCP1_GRPH_PRIMARY_SURFACE_ADDRESS 0 0x1c04 0 0 4294967295 mmDCP2_GRPH_PRIMARY_SURFACE_ADDRESS 0 0x1e04 0 0 4294967295 mmDCP3_GRPH_PRIMARY_SURFACE_ADDRESS 0 0x4004 0 0 4294967295 mmDCP4_GRPH_PRIMARY_SURFACE_ADDRESS 0 0x4204 0 0 4294967295 mmDCP5_GRPH_PRIMARY_SURFACE_ADDRESS 0 0x4404 0 0 4294967295 mmGRPH_SECONDARY_SURFACE_ADDRESS 0 0x1a05 2 0 4294967295 GRPH_SECONDARY_DFQ_ENABLE 0 0 GRPH_SECONDARY_SURFACE_ADDRESS 8 31 mmDCP0_GRPH_SECONDARY_SURFACE_ADDRESS 0 0x1a05 0 0 4294967295 mmDCP1_GRPH_SECONDARY_SURFACE_ADDRESS 0 0x1c05 0 0 4294967295 mmDCP2_GRPH_SECONDARY_SURFACE_ADDRESS 0 0x1e05 0 0 4294967295 mmDCP3_GRPH_SECONDARY_SURFACE_ADDRESS 0 0x4005 0 0 4294967295 mmDCP4_GRPH_SECONDARY_SURFACE_ADDRESS 0 0x4205 0 0 4294967295 mmDCP5_GRPH_SECONDARY_SURFACE_ADDRESS 0 0x4405 0 0 4294967295 mmGRPH_PITCH 0 0x1a06 1 0 4294967295 GRPH_PITCH 0 14 mmDCP0_GRPH_PITCH 0 0x1a06 0 0 4294967295 mmDCP1_GRPH_PITCH 0 0x1c06 0 0 4294967295 mmDCP2_GRPH_PITCH 0 0x1e06 0 0 4294967295 mmDCP3_GRPH_PITCH 0 0x4006 0 0 4294967295 mmDCP4_GRPH_PITCH 0 0x4206 0 0 4294967295 mmDCP5_GRPH_PITCH 0 0x4406 0 0 4294967295 mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0 0x1a07 1 0 4294967295 GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0 7 mmDCP0_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0 0x1a07 0 0 4294967295 mmDCP1_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0 0x1c07 0 0 4294967295 mmDCP2_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0 0x1e07 0 0 4294967295 mmDCP3_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0 0x4007 0 0 4294967295 mmDCP4_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0 0x4207 0 0 4294967295 mmDCP5_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0 0x4407 0 0 4294967295 mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0 0x1a08 1 0 4294967295 GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0 7 mmDCP0_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0 0x1a08 0 0 4294967295 mmDCP1_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0 0x1c08 0 0 4294967295 mmDCP2_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0 0x1e08 0 0 4294967295 mmDCP3_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0 0x4008 0 0 4294967295 mmDCP4_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0 0x4208 0 0 4294967295 mmDCP5_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0 0x4408 0 0 4294967295 mmGRPH_SURFACE_OFFSET_X 0 0x1a09 1 0 4294967295 GRPH_SURFACE_OFFSET_X 0 13 mmDCP0_GRPH_SURFACE_OFFSET_X 0 0x1a09 0 0 4294967295 mmDCP1_GRPH_SURFACE_OFFSET_X 0 0x1c09 0 0 4294967295 mmDCP2_GRPH_SURFACE_OFFSET_X 0 0x1e09 0 0 4294967295 mmDCP3_GRPH_SURFACE_OFFSET_X 0 0x4009 0 0 4294967295 mmDCP4_GRPH_SURFACE_OFFSET_X 0 0x4209 0 0 4294967295 mmDCP5_GRPH_SURFACE_OFFSET_X 0 0x4409 0 0 4294967295 mmGRPH_SURFACE_OFFSET_Y 0 0x1a0a 1 0 4294967295 GRPH_SURFACE_OFFSET_Y 0 13 mmDCP0_GRPH_SURFACE_OFFSET_Y 0 0x1a0a 0 0 4294967295 mmDCP1_GRPH_SURFACE_OFFSET_Y 0 0x1c0a 0 0 4294967295 mmDCP2_GRPH_SURFACE_OFFSET_Y 0 0x1e0a 0 0 4294967295 mmDCP3_GRPH_SURFACE_OFFSET_Y 0 0x400a 0 0 4294967295 mmDCP4_GRPH_SURFACE_OFFSET_Y 0 0x420a 0 0 4294967295 mmDCP5_GRPH_SURFACE_OFFSET_Y 0 0x440a 0 0 4294967295 mmGRPH_X_START 0 0x1a0b 1 0 4294967295 GRPH_X_START 0 13 mmDCP0_GRPH_X_START 0 0x1a0b 0 0 4294967295 mmDCP1_GRPH_X_START 0 0x1c0b 0 0 4294967295 mmDCP2_GRPH_X_START 0 0x1e0b 0 0 4294967295 mmDCP3_GRPH_X_START 0 0x400b 0 0 4294967295 mmDCP4_GRPH_X_START 0 0x420b 0 0 4294967295 mmDCP5_GRPH_X_START 0 0x440b 0 0 4294967295 mmGRPH_Y_START 0 0x1a0c 1 0 4294967295 GRPH_Y_START 0 13 mmDCP0_GRPH_Y_START 0 0x1a0c 0 0 4294967295 mmDCP1_GRPH_Y_START 0 0x1c0c 0 0 4294967295 mmDCP2_GRPH_Y_START 0 0x1e0c 0 0 4294967295 mmDCP3_GRPH_Y_START 0 0x400c 0 0 4294967295 mmDCP4_GRPH_Y_START 0 0x420c 0 0 4294967295 mmDCP5_GRPH_Y_START 0 0x440c 0 0 4294967295 mmGRPH_X_END 0 0x1a0d 1 0 4294967295 GRPH_X_END 0 14 mmDCP0_GRPH_X_END 0 0x1a0d 0 0 4294967295 mmDCP1_GRPH_X_END 0 0x1c0d 0 0 4294967295 mmDCP2_GRPH_X_END 0 0x1e0d 0 0 4294967295 mmDCP3_GRPH_X_END 0 0x400d 0 0 4294967295 mmDCP4_GRPH_X_END 0 0x420d 0 0 4294967295 mmDCP5_GRPH_X_END 0 0x440d 0 0 4294967295 mmGRPH_Y_END 0 0x1a0e 1 0 4294967295 GRPH_Y_END 0 14 mmDCP0_GRPH_Y_END 0 0x1a0e 0 0 4294967295 mmDCP1_GRPH_Y_END 0 0x1c0e 0 0 4294967295 mmDCP2_GRPH_Y_END 0 0x1e0e 0 0 4294967295 mmDCP3_GRPH_Y_END 0 0x400e 0 0 4294967295 mmDCP4_GRPH_Y_END 0 0x420e 0 0 4294967295 mmDCP5_GRPH_Y_END 0 0x440e 0 0 4294967295 mmINPUT_GAMMA_CONTROL 0 0x1a10 1 0 4294967295 GRPH_INPUT_GAMMA_MODE 0 0 mmDCP0_INPUT_GAMMA_CONTROL 0 0x1a10 0 0 4294967295 mmDCP1_INPUT_GAMMA_CONTROL 0 0x1c10 0 0 4294967295 mmDCP2_INPUT_GAMMA_CONTROL 0 0x1e10 0 0 4294967295 mmDCP3_INPUT_GAMMA_CONTROL 0 0x4010 0 0 4294967295 mmDCP4_INPUT_GAMMA_CONTROL 0 0x4210 0 0 4294967295 mmDCP5_INPUT_GAMMA_CONTROL 0 0x4410 0 0 4294967295 mmGRPH_UPDATE 0 0x1a11 9 0 4294967295 GRPH_MODE_UPDATE_PENDING 0 0 GRPH_MODE_UPDATE_TAKEN 1 1 GRPH_SURFACE_UPDATE_PENDING 2 2 GRPH_SURFACE_UPDATE_TAKEN 3 3 GRPH_SURFACE_XDMA_PENDING_ENABLE 8 8 GRPH_UPDATE_LOCK 16 16 GRPH_SURFACE_IGNORE_UPDATE_LOCK 20 20 GRPH_MODE_DISABLE_MULTIPLE_UPDATE 24 24 GRPH_SURFACE_DISABLE_MULTIPLE_UPDATE 28 28 mmDCP0_GRPH_UPDATE 0 0x1a11 0 0 4294967295 mmDCP1_GRPH_UPDATE 0 0x1c11 0 0 4294967295 mmDCP2_GRPH_UPDATE 0 0x1e11 0 0 4294967295 mmDCP3_GRPH_UPDATE 0 0x4011 0 0 4294967295 mmDCP4_GRPH_UPDATE 0 0x4211 0 0 4294967295 mmDCP5_GRPH_UPDATE 0 0x4411 0 0 4294967295 mmGRPH_FLIP_CONTROL 0 0x1a12 4 0 4294967295 GRPH_SURFACE_UPDATE_H_RETRACE_EN 0 0 GRPH_XDMA_SUPER_AA_EN 1 1 GRPH_SURFACE_UPDATE_IMMEDIATE_EN 4 4 GRPH_SURFACE_UPDATE_PENDING_MODE 5 5 mmDCP0_GRPH_FLIP_CONTROL 0 0x1a12 0 0 4294967295 mmDCP1_GRPH_FLIP_CONTROL 0 0x1c12 0 0 4294967295 mmDCP2_GRPH_FLIP_CONTROL 0 0x1e12 0 0 4294967295 mmDCP3_GRPH_FLIP_CONTROL 0 0x4012 0 0 4294967295 mmDCP4_GRPH_FLIP_CONTROL 0 0x4212 0 0 4294967295 mmDCP5_GRPH_FLIP_CONTROL 0 0x4412 0 0 4294967295 mmGRPH_SURFACE_ADDRESS_INUSE 0 0x1a13 1 0 4294967295 GRPH_SURFACE_ADDRESS_INUSE 8 31 mmDCP0_GRPH_SURFACE_ADDRESS_INUSE 0 0x1a13 0 0 4294967295 mmDCP1_GRPH_SURFACE_ADDRESS_INUSE 0 0x1c13 0 0 4294967295 mmDCP2_GRPH_SURFACE_ADDRESS_INUSE 0 0x1e13 0 0 4294967295 mmDCP3_GRPH_SURFACE_ADDRESS_INUSE 0 0x4013 0 0 4294967295 mmDCP4_GRPH_SURFACE_ADDRESS_INUSE 0 0x4213 0 0 4294967295 mmDCP5_GRPH_SURFACE_ADDRESS_INUSE 0 0x4413 0 0 4294967295 mmGRPH_DFQ_CONTROL 0 0x1a14 3 0 4294967295 GRPH_DFQ_RESET 0 0 GRPH_DFQ_SIZE 4 6 GRPH_DFQ_MIN_FREE_ENTRIES 8 10 mmDCP0_GRPH_DFQ_CONTROL 0 0x1a14 0 0 4294967295 mmDCP1_GRPH_DFQ_CONTROL 0 0x1c14 0 0 4294967295 mmDCP2_GRPH_DFQ_CONTROL 0 0x1e14 0 0 4294967295 mmDCP3_GRPH_DFQ_CONTROL 0 0x4014 0 0 4294967295 mmDCP4_GRPH_DFQ_CONTROL 0 0x4214 0 0 4294967295 mmDCP5_GRPH_DFQ_CONTROL 0 0x4414 0 0 4294967295 mmGRPH_DFQ_STATUS 0 0x1a15 4 0 4294967295 GRPH_PRIMARY_DFQ_NUM_ENTRIES 0 3 GRPH_SECONDARY_DFQ_NUM_ENTRIES 4 7 GRPH_DFQ_RESET_FLAG 8 8 GRPH_DFQ_RESET_ACK 9 9 mmDCP0_GRPH_DFQ_STATUS 0 0x1a15 0 0 4294967295 mmDCP1_GRPH_DFQ_STATUS 0 0x1c15 0 0 4294967295 mmDCP2_GRPH_DFQ_STATUS 0 0x1e15 0 0 4294967295 mmDCP3_GRPH_DFQ_STATUS 0 0x4015 0 0 4294967295 mmDCP4_GRPH_DFQ_STATUS 0 0x4215 0 0 4294967295 mmDCP5_GRPH_DFQ_STATUS 0 0x4415 0 0 4294967295 mmGRPH_INTERRUPT_STATUS 0 0x1a16 2 0 4294967295 GRPH_PFLIP_INT_OCCURRED 0 0 GRPH_PFLIP_INT_CLEAR 8 8 mmDCP0_GRPH_INTERRUPT_STATUS 0 0x1a16 0 0 4294967295 mmDCP1_GRPH_INTERRUPT_STATUS 0 0x1c16 0 0 4294967295 mmDCP2_GRPH_INTERRUPT_STATUS 0 0x1e16 0 0 4294967295 mmDCP3_GRPH_INTERRUPT_STATUS 0 0x4016 0 0 4294967295 mmDCP4_GRPH_INTERRUPT_STATUS 0 0x4216 0 0 4294967295 mmDCP5_GRPH_INTERRUPT_STATUS 0 0x4416 0 0 4294967295 mmGRPH_INTERRUPT_CONTROL 0 0x1a17 2 0 4294967295 GRPH_PFLIP_INT_MASK 0 0 GRPH_PFLIP_INT_TYPE 8 8 mmDCP0_GRPH_INTERRUPT_CONTROL 0 0x1a17 0 0 4294967295 mmDCP1_GRPH_INTERRUPT_CONTROL 0 0x1c17 0 0 4294967295 mmDCP2_GRPH_INTERRUPT_CONTROL 0 0x1e17 0 0 4294967295 mmDCP3_GRPH_INTERRUPT_CONTROL 0 0x4017 0 0 4294967295 mmDCP4_GRPH_INTERRUPT_CONTROL 0 0x4217 0 0 4294967295 mmDCP5_GRPH_INTERRUPT_CONTROL 0 0x4417 0 0 4294967295 mmGRPH_SURFACE_ADDRESS_HIGH_INUSE 0 0x1a18 1 0 4294967295 GRPH_SURFACE_ADDRESS_HIGH_INUSE 0 7 mmDCP0_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0 0x1a18 0 0 4294967295 mmDCP1_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0 0x1c18 0 0 4294967295 mmDCP2_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0 0x1e18 0 0 4294967295 mmDCP3_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0 0x4018 0 0 4294967295 mmDCP4_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0 0x4218 0 0 4294967295 mmDCP5_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0 0x4418 0 0 4294967295 mmGRPH_COMPRESS_SURFACE_ADDRESS 0 0x1a19 1 0 4294967295 GRPH_COMPRESS_SURFACE_ADDRESS 8 31 mmDCP0_GRPH_COMPRESS_SURFACE_ADDRESS 0 0x1a19 0 0 4294967295 mmDCP1_GRPH_COMPRESS_SURFACE_ADDRESS 0 0x1c19 0 0 4294967295 mmDCP2_GRPH_COMPRESS_SURFACE_ADDRESS 0 0x1e19 0 0 4294967295 mmDCP3_GRPH_COMPRESS_SURFACE_ADDRESS 0 0x4019 0 0 4294967295 mmDCP4_GRPH_COMPRESS_SURFACE_ADDRESS 0 0x4219 0 0 4294967295 mmDCP5_GRPH_COMPRESS_SURFACE_ADDRESS 0 0x4419 0 0 4294967295 mmGRPH_COMPRESS_PITCH 0 0x1a1a 1 0 4294967295 GRPH_COMPRESS_PITCH 6 16 mmDCP0_GRPH_COMPRESS_PITCH 0 0x1a1a 0 0 4294967295 mmDCP1_GRPH_COMPRESS_PITCH 0 0x1c1a 0 0 4294967295 mmDCP2_GRPH_COMPRESS_PITCH 0 0x1e1a 0 0 4294967295 mmDCP3_GRPH_COMPRESS_PITCH 0 0x401a 0 0 4294967295 mmDCP4_GRPH_COMPRESS_PITCH 0 0x421a 0 0 4294967295 mmDCP5_GRPH_COMPRESS_PITCH 0 0x441a 0 0 4294967295 mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0 0x1a1b 1 0 4294967295 GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0 7 mmDCP0_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0 0x1a1b 0 0 4294967295 mmDCP1_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0 0x1c1b 0 0 4294967295 mmDCP2_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0 0x1e1b 0 0 4294967295 mmDCP3_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0 0x401b 0 0 4294967295 mmDCP4_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0 0x421b 0 0 4294967295 mmDCP5_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0 0x441b 0 0 4294967295 mmGRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0 0x1a1c 1 0 4294967295 GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0 7 mmDCP0_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0 0x1a1c 0 0 4294967295 mmDCP1_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0 0x1c1c 0 0 4294967295 mmDCP2_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0 0x1e1c 0 0 4294967295 mmDCP3_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0 0x401c 0 0 4294967295 mmDCP4_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0 0x421c 0 0 4294967295 mmDCP5_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0 0x441c 0 0 4294967295 mmPRESCALE_GRPH_CONTROL 0 0x1a2d 5 0 4294967295 GRPH_PRESCALE_SELECT 0 0 GRPH_PRESCALE_R_SIGN 1 1 GRPH_PRESCALE_G_SIGN 2 2 GRPH_PRESCALE_B_SIGN 3 3 GRPH_PRESCALE_BYPASS 4 4 mmDCP0_PRESCALE_GRPH_CONTROL 0 0x1a2d 0 0 4294967295 mmDCP1_PRESCALE_GRPH_CONTROL 0 0x1c2d 0 0 4294967295 mmDCP2_PRESCALE_GRPH_CONTROL 0 0x1e2d 0 0 4294967295 mmDCP3_PRESCALE_GRPH_CONTROL 0 0x402d 0 0 4294967295 mmDCP4_PRESCALE_GRPH_CONTROL 0 0x422d 0 0 4294967295 mmDCP5_PRESCALE_GRPH_CONTROL 0 0x442d 0 0 4294967295 mmPRESCALE_VALUES_GRPH_R 0 0x1a2e 2 0 4294967295 GRPH_PRESCALE_BIAS_R 0 15 GRPH_PRESCALE_SCALE_R 16 31 mmDCP0_PRESCALE_VALUES_GRPH_R 0 0x1a2e 0 0 4294967295 mmDCP1_PRESCALE_VALUES_GRPH_R 0 0x1c2e 0 0 4294967295 mmDCP2_PRESCALE_VALUES_GRPH_R 0 0x1e2e 0 0 4294967295 mmDCP3_PRESCALE_VALUES_GRPH_R 0 0x402e 0 0 4294967295 mmDCP4_PRESCALE_VALUES_GRPH_R 0 0x422e 0 0 4294967295 mmDCP5_PRESCALE_VALUES_GRPH_R 0 0x442e 0 0 4294967295 mmPRESCALE_VALUES_GRPH_G 0 0x1a2f 2 0 4294967295 GRPH_PRESCALE_BIAS_G 0 15 GRPH_PRESCALE_SCALE_G 16 31 mmDCP0_PRESCALE_VALUES_GRPH_G 0 0x1a2f 0 0 4294967295 mmDCP1_PRESCALE_VALUES_GRPH_G 0 0x1c2f 0 0 4294967295 mmDCP2_PRESCALE_VALUES_GRPH_G 0 0x1e2f 0 0 4294967295 mmDCP3_PRESCALE_VALUES_GRPH_G 0 0x402f 0 0 4294967295 mmDCP4_PRESCALE_VALUES_GRPH_G 0 0x422f 0 0 4294967295 mmDCP5_PRESCALE_VALUES_GRPH_G 0 0x442f 0 0 4294967295 mmPRESCALE_VALUES_GRPH_B 0 0x1a30 2 0 4294967295 GRPH_PRESCALE_BIAS_B 0 15 GRPH_PRESCALE_SCALE_B 16 31 mmDCP0_PRESCALE_VALUES_GRPH_B 0 0x1a30 0 0 4294967295 mmDCP1_PRESCALE_VALUES_GRPH_B 0 0x1c30 0 0 4294967295 mmDCP2_PRESCALE_VALUES_GRPH_B 0 0x1e30 0 0 4294967295 mmDCP3_PRESCALE_VALUES_GRPH_B 0 0x4030 0 0 4294967295 mmDCP4_PRESCALE_VALUES_GRPH_B 0 0x4230 0 0 4294967295 mmDCP5_PRESCALE_VALUES_GRPH_B 0 0x4430 0 0 4294967295 mmINPUT_CSC_CONTROL 0 0x1a35 1 0 4294967295 INPUT_CSC_GRPH_MODE 0 1 mmDCP0_INPUT_CSC_CONTROL 0 0x1a35 0 0 4294967295 mmDCP1_INPUT_CSC_CONTROL 0 0x1c35 0 0 4294967295 mmDCP2_INPUT_CSC_CONTROL 0 0x1e35 0 0 4294967295 mmDCP3_INPUT_CSC_CONTROL 0 0x4035 0 0 4294967295 mmDCP4_INPUT_CSC_CONTROL 0 0x4235 0 0 4294967295 mmDCP5_INPUT_CSC_CONTROL 0 0x4435 0 0 4294967295 mmINPUT_CSC_C11_C12 0 0x1a36 2 0 4294967295 INPUT_CSC_C11 0 15 INPUT_CSC_C12 16 31 mmDCP0_INPUT_CSC_C11_C12 0 0x1a36 0 0 4294967295 mmDCP1_INPUT_CSC_C11_C12 0 0x1c36 0 0 4294967295 mmDCP2_INPUT_CSC_C11_C12 0 0x1e36 0 0 4294967295 mmDCP3_INPUT_CSC_C11_C12 0 0x4036 0 0 4294967295 mmDCP4_INPUT_CSC_C11_C12 0 0x4236 0 0 4294967295 mmDCP5_INPUT_CSC_C11_C12 0 0x4436 0 0 4294967295 mmINPUT_CSC_C13_C14 0 0x1a37 2 0 4294967295 INPUT_CSC_C13 0 15 INPUT_CSC_C14 16 31 mmDCP0_INPUT_CSC_C13_C14 0 0x1a37 0 0 4294967295 mmDCP1_INPUT_CSC_C13_C14 0 0x1c37 0 0 4294967295 mmDCP2_INPUT_CSC_C13_C14 0 0x1e37 0 0 4294967295 mmDCP3_INPUT_CSC_C13_C14 0 0x4037 0 0 4294967295 mmDCP4_INPUT_CSC_C13_C14 0 0x4237 0 0 4294967295 mmDCP5_INPUT_CSC_C13_C14 0 0x4437 0 0 4294967295 mmINPUT_CSC_C21_C22 0 0x1a38 2 0 4294967295 INPUT_CSC_C21 0 15 INPUT_CSC_C22 16 31 mmDCP0_INPUT_CSC_C21_C22 0 0x1a38 0 0 4294967295 mmDCP1_INPUT_CSC_C21_C22 0 0x1c38 0 0 4294967295 mmDCP2_INPUT_CSC_C21_C22 0 0x1e38 0 0 4294967295 mmDCP3_INPUT_CSC_C21_C22 0 0x4038 0 0 4294967295 mmDCP4_INPUT_CSC_C21_C22 0 0x4238 0 0 4294967295 mmDCP5_INPUT_CSC_C21_C22 0 0x4438 0 0 4294967295 mmINPUT_CSC_C23_C24 0 0x1a39 2 0 4294967295 INPUT_CSC_C23 0 15 INPUT_CSC_C24 16 31 mmDCP0_INPUT_CSC_C23_C24 0 0x1a39 0 0 4294967295 mmDCP1_INPUT_CSC_C23_C24 0 0x1c39 0 0 4294967295 mmDCP2_INPUT_CSC_C23_C24 0 0x1e39 0 0 4294967295 mmDCP3_INPUT_CSC_C23_C24 0 0x4039 0 0 4294967295 mmDCP4_INPUT_CSC_C23_C24 0 0x4239 0 0 4294967295 mmDCP5_INPUT_CSC_C23_C24 0 0x4439 0 0 4294967295 mmINPUT_CSC_C31_C32 0 0x1a3a 2 0 4294967295 INPUT_CSC_C31 0 15 INPUT_CSC_C32 16 31 mmDCP0_INPUT_CSC_C31_C32 0 0x1a3a 0 0 4294967295 mmDCP1_INPUT_CSC_C31_C32 0 0x1c3a 0 0 4294967295 mmDCP2_INPUT_CSC_C31_C32 0 0x1e3a 0 0 4294967295 mmDCP3_INPUT_CSC_C31_C32 0 0x403a 0 0 4294967295 mmDCP4_INPUT_CSC_C31_C32 0 0x423a 0 0 4294967295 mmDCP5_INPUT_CSC_C31_C32 0 0x443a 0 0 4294967295 mmINPUT_CSC_C33_C34 0 0x1a3b 2 0 4294967295 INPUT_CSC_C33 0 15 INPUT_CSC_C34 16 31 mmDCP0_INPUT_CSC_C33_C34 0 0x1a3b 0 0 4294967295 mmDCP1_INPUT_CSC_C33_C34 0 0x1c3b 0 0 4294967295 mmDCP2_INPUT_CSC_C33_C34 0 0x1e3b 0 0 4294967295 mmDCP3_INPUT_CSC_C33_C34 0 0x403b 0 0 4294967295 mmDCP4_INPUT_CSC_C33_C34 0 0x423b 0 0 4294967295 mmDCP5_INPUT_CSC_C33_C34 0 0x443b 0 0 4294967295 mmOUTPUT_CSC_CONTROL 0 0x1a3c 1 0 4294967295 OUTPUT_CSC_GRPH_MODE 0 2 mmDCP0_OUTPUT_CSC_CONTROL 0 0x1a3c 0 0 4294967295 mmDCP1_OUTPUT_CSC_CONTROL 0 0x1c3c 0 0 4294967295 mmDCP2_OUTPUT_CSC_CONTROL 0 0x1e3c 0 0 4294967295 mmDCP3_OUTPUT_CSC_CONTROL 0 0x403c 0 0 4294967295 mmDCP4_OUTPUT_CSC_CONTROL 0 0x423c 0 0 4294967295 mmDCP5_OUTPUT_CSC_CONTROL 0 0x443c 0 0 4294967295 mmOUTPUT_CSC_C11_C12 0 0x1a3d 2 0 4294967295 OUTPUT_CSC_C11 0 15 OUTPUT_CSC_C12 16 31 mmDCP0_OUTPUT_CSC_C11_C12 0 0x1a3d 0 0 4294967295 mmDCP1_OUTPUT_CSC_C11_C12 0 0x1c3d 0 0 4294967295 mmDCP2_OUTPUT_CSC_C11_C12 0 0x1e3d 0 0 4294967295 mmDCP3_OUTPUT_CSC_C11_C12 0 0x403d 0 0 4294967295 mmDCP4_OUTPUT_CSC_C11_C12 0 0x423d 0 0 4294967295 mmDCP5_OUTPUT_CSC_C11_C12 0 0x443d 0 0 4294967295 mmOUTPUT_CSC_C13_C14 0 0x1a3e 2 0 4294967295 OUTPUT_CSC_C13 0 15 OUTPUT_CSC_C14 16 31 mmDCP0_OUTPUT_CSC_C13_C14 0 0x1a3e 0 0 4294967295 mmDCP1_OUTPUT_CSC_C13_C14 0 0x1c3e 0 0 4294967295 mmDCP2_OUTPUT_CSC_C13_C14 0 0x1e3e 0 0 4294967295 mmDCP3_OUTPUT_CSC_C13_C14 0 0x403e 0 0 4294967295 mmDCP4_OUTPUT_CSC_C13_C14 0 0x423e 0 0 4294967295 mmDCP5_OUTPUT_CSC_C13_C14 0 0x443e 0 0 4294967295 mmOUTPUT_CSC_C21_C22 0 0x1a3f 2 0 4294967295 OUTPUT_CSC_C21 0 15 OUTPUT_CSC_C22 16 31 mmDCP0_OUTPUT_CSC_C21_C22 0 0x1a3f 0 0 4294967295 mmDCP1_OUTPUT_CSC_C21_C22 0 0x1c3f 0 0 4294967295 mmDCP2_OUTPUT_CSC_C21_C22 0 0x1e3f 0 0 4294967295 mmDCP3_OUTPUT_CSC_C21_C22 0 0x403f 0 0 4294967295 mmDCP4_OUTPUT_CSC_C21_C22 0 0x423f 0 0 4294967295 mmDCP5_OUTPUT_CSC_C21_C22 0 0x443f 0 0 4294967295 mmOUTPUT_CSC_C23_C24 0 0x1a40 2 0 4294967295 OUTPUT_CSC_C23 0 15 OUTPUT_CSC_C24 16 31 mmDCP0_OUTPUT_CSC_C23_C24 0 0x1a40 0 0 4294967295 mmDCP1_OUTPUT_CSC_C23_C24 0 0x1c40 0 0 4294967295 mmDCP2_OUTPUT_CSC_C23_C24 0 0x1e40 0 0 4294967295 mmDCP3_OUTPUT_CSC_C23_C24 0 0x4040 0 0 4294967295 mmDCP4_OUTPUT_CSC_C23_C24 0 0x4240 0 0 4294967295 mmDCP5_OUTPUT_CSC_C23_C24 0 0x4440 0 0 4294967295 mmOUTPUT_CSC_C31_C32 0 0x1a41 2 0 4294967295 OUTPUT_CSC_C31 0 15 OUTPUT_CSC_C32 16 31 mmDCP0_OUTPUT_CSC_C31_C32 0 0x1a41 0 0 4294967295 mmDCP1_OUTPUT_CSC_C31_C32 0 0x1c41 0 0 4294967295 mmDCP2_OUTPUT_CSC_C31_C32 0 0x1e41 0 0 4294967295 mmDCP3_OUTPUT_CSC_C31_C32 0 0x4041 0 0 4294967295 mmDCP4_OUTPUT_CSC_C31_C32 0 0x4241 0 0 4294967295 mmDCP5_OUTPUT_CSC_C31_C32 0 0x4441 0 0 4294967295 mmOUTPUT_CSC_C33_C34 0 0x1a42 2 0 4294967295 OUTPUT_CSC_C33 0 15 OUTPUT_CSC_C34 16 31 mmDCP0_OUTPUT_CSC_C33_C34 0 0x1a42 0 0 4294967295 mmDCP1_OUTPUT_CSC_C33_C34 0 0x1c42 0 0 4294967295 mmDCP2_OUTPUT_CSC_C33_C34 0 0x1e42 0 0 4294967295 mmDCP3_OUTPUT_CSC_C33_C34 0 0x4042 0 0 4294967295 mmDCP4_OUTPUT_CSC_C33_C34 0 0x4242 0 0 4294967295 mmDCP5_OUTPUT_CSC_C33_C34 0 0x4442 0 0 4294967295 mmCOMM_MATRIXA_TRANS_C11_C12 0 0x1a43 2 0 4294967295 COMM_MATRIXA_TRANS_C11 0 15 COMM_MATRIXA_TRANS_C12 16 31 mmDCP0_COMM_MATRIXA_TRANS_C11_C12 0 0x1a43 0 0 4294967295 mmDCP1_COMM_MATRIXA_TRANS_C11_C12 0 0x1c43 0 0 4294967295 mmDCP2_COMM_MATRIXA_TRANS_C11_C12 0 0x1e43 0 0 4294967295 mmDCP3_COMM_MATRIXA_TRANS_C11_C12 0 0x4043 0 0 4294967295 mmDCP4_COMM_MATRIXA_TRANS_C11_C12 0 0x4243 0 0 4294967295 mmDCP5_COMM_MATRIXA_TRANS_C11_C12 0 0x4443 0 0 4294967295 mmCOMM_MATRIXA_TRANS_C13_C14 0 0x1a44 2 0 4294967295 COMM_MATRIXA_TRANS_C13 0 15 COMM_MATRIXA_TRANS_C14 16 31 mmDCP0_COMM_MATRIXA_TRANS_C13_C14 0 0x1a44 0 0 4294967295 mmDCP1_COMM_MATRIXA_TRANS_C13_C14 0 0x1c44 0 0 4294967295 mmDCP2_COMM_MATRIXA_TRANS_C13_C14 0 0x1e44 0 0 4294967295 mmDCP3_COMM_MATRIXA_TRANS_C13_C14 0 0x4044 0 0 4294967295 mmDCP4_COMM_MATRIXA_TRANS_C13_C14 0 0x4244 0 0 4294967295 mmDCP5_COMM_MATRIXA_TRANS_C13_C14 0 0x4444 0 0 4294967295 mmCOMM_MATRIXA_TRANS_C21_C22 0 0x1a45 2 0 4294967295 COMM_MATRIXA_TRANS_C21 0 15 COMM_MATRIXA_TRANS_C22 16 31 mmDCP0_COMM_MATRIXA_TRANS_C21_C22 0 0x1a45 0 0 4294967295 mmDCP1_COMM_MATRIXA_TRANS_C21_C22 0 0x1c45 0 0 4294967295 mmDCP2_COMM_MATRIXA_TRANS_C21_C22 0 0x1e45 0 0 4294967295 mmDCP3_COMM_MATRIXA_TRANS_C21_C22 0 0x4045 0 0 4294967295 mmDCP4_COMM_MATRIXA_TRANS_C21_C22 0 0x4245 0 0 4294967295 mmDCP5_COMM_MATRIXA_TRANS_C21_C22 0 0x4445 0 0 4294967295 mmCOMM_MATRIXA_TRANS_C23_C24 0 0x1a46 2 0 4294967295 COMM_MATRIXA_TRANS_C23 0 15 COMM_MATRIXA_TRANS_C24 16 31 mmDCP0_COMM_MATRIXA_TRANS_C23_C24 0 0x1a46 0 0 4294967295 mmDCP1_COMM_MATRIXA_TRANS_C23_C24 0 0x1c46 0 0 4294967295 mmDCP2_COMM_MATRIXA_TRANS_C23_C24 0 0x1e46 0 0 4294967295 mmDCP3_COMM_MATRIXA_TRANS_C23_C24 0 0x4046 0 0 4294967295 mmDCP4_COMM_MATRIXA_TRANS_C23_C24 0 0x4246 0 0 4294967295 mmDCP5_COMM_MATRIXA_TRANS_C23_C24 0 0x4446 0 0 4294967295 mmCOMM_MATRIXA_TRANS_C31_C32 0 0x1a47 2 0 4294967295 COMM_MATRIXA_TRANS_C31 0 15 COMM_MATRIXA_TRANS_C32 16 31 mmDCP0_COMM_MATRIXA_TRANS_C31_C32 0 0x1a47 0 0 4294967295 mmDCP1_COMM_MATRIXA_TRANS_C31_C32 0 0x1c47 0 0 4294967295 mmDCP2_COMM_MATRIXA_TRANS_C31_C32 0 0x1e47 0 0 4294967295 mmDCP3_COMM_MATRIXA_TRANS_C31_C32 0 0x4047 0 0 4294967295 mmDCP4_COMM_MATRIXA_TRANS_C31_C32 0 0x4247 0 0 4294967295 mmDCP5_COMM_MATRIXA_TRANS_C31_C32 0 0x4447 0 0 4294967295 mmCOMM_MATRIXA_TRANS_C33_C34 0 0x1a48 2 0 4294967295 COMM_MATRIXA_TRANS_C33 0 15 COMM_MATRIXA_TRANS_C34 16 31 mmDCP0_COMM_MATRIXA_TRANS_C33_C34 0 0x1a48 0 0 4294967295 mmDCP1_COMM_MATRIXA_TRANS_C33_C34 0 0x1c48 0 0 4294967295 mmDCP2_COMM_MATRIXA_TRANS_C33_C34 0 0x1e48 0 0 4294967295 mmDCP3_COMM_MATRIXA_TRANS_C33_C34 0 0x4048 0 0 4294967295 mmDCP4_COMM_MATRIXA_TRANS_C33_C34 0 0x4248 0 0 4294967295 mmDCP5_COMM_MATRIXA_TRANS_C33_C34 0 0x4448 0 0 4294967295 mmCOMM_MATRIXB_TRANS_C11_C12 0 0x1a49 2 0 4294967295 COMM_MATRIXB_TRANS_C11 0 15 COMM_MATRIXB_TRANS_C12 16 31 mmDCP0_COMM_MATRIXB_TRANS_C11_C12 0 0x1a49 0 0 4294967295 mmDCP1_COMM_MATRIXB_TRANS_C11_C12 0 0x1c49 0 0 4294967295 mmDCP2_COMM_MATRIXB_TRANS_C11_C12 0 0x1e49 0 0 4294967295 mmDCP3_COMM_MATRIXB_TRANS_C11_C12 0 0x4049 0 0 4294967295 mmDCP4_COMM_MATRIXB_TRANS_C11_C12 0 0x4249 0 0 4294967295 mmDCP5_COMM_MATRIXB_TRANS_C11_C12 0 0x4449 0 0 4294967295 mmCOMM_MATRIXB_TRANS_C13_C14 0 0x1a4a 2 0 4294967295 COMM_MATRIXB_TRANS_C13 0 15 COMM_MATRIXB_TRANS_C14 16 31 mmDCP0_COMM_MATRIXB_TRANS_C13_C14 0 0x1a4a 0 0 4294967295 mmDCP1_COMM_MATRIXB_TRANS_C13_C14 0 0x1c4a 0 0 4294967295 mmDCP2_COMM_MATRIXB_TRANS_C13_C14 0 0x1e4a 0 0 4294967295 mmDCP3_COMM_MATRIXB_TRANS_C13_C14 0 0x404a 0 0 4294967295 mmDCP4_COMM_MATRIXB_TRANS_C13_C14 0 0x424a 0 0 4294967295 mmDCP5_COMM_MATRIXB_TRANS_C13_C14 0 0x444a 0 0 4294967295 mmCOMM_MATRIXB_TRANS_C21_C22 0 0x1a4b 2 0 4294967295 COMM_MATRIXB_TRANS_C21 0 15 COMM_MATRIXB_TRANS_C22 16 31 mmDCP0_COMM_MATRIXB_TRANS_C21_C22 0 0x1a4b 0 0 4294967295 mmDCP1_COMM_MATRIXB_TRANS_C21_C22 0 0x1c4b 0 0 4294967295 mmDCP2_COMM_MATRIXB_TRANS_C21_C22 0 0x1e4b 0 0 4294967295 mmDCP3_COMM_MATRIXB_TRANS_C21_C22 0 0x404b 0 0 4294967295 mmDCP4_COMM_MATRIXB_TRANS_C21_C22 0 0x424b 0 0 4294967295 mmDCP5_COMM_MATRIXB_TRANS_C21_C22 0 0x444b 0 0 4294967295 mmCOMM_MATRIXB_TRANS_C23_C24 0 0x1a4c 2 0 4294967295 COMM_MATRIXB_TRANS_C23 0 15 COMM_MATRIXB_TRANS_C24 16 31 mmDCP0_COMM_MATRIXB_TRANS_C23_C24 0 0x1a4c 0 0 4294967295 mmDCP1_COMM_MATRIXB_TRANS_C23_C24 0 0x1c4c 0 0 4294967295 mmDCP2_COMM_MATRIXB_TRANS_C23_C24 0 0x1e4c 0 0 4294967295 mmDCP3_COMM_MATRIXB_TRANS_C23_C24 0 0x404c 0 0 4294967295 mmDCP4_COMM_MATRIXB_TRANS_C23_C24 0 0x424c 0 0 4294967295 mmDCP5_COMM_MATRIXB_TRANS_C23_C24 0 0x444c 0 0 4294967295 mmCOMM_MATRIXB_TRANS_C31_C32 0 0x1a4d 2 0 4294967295 COMM_MATRIXB_TRANS_C31 0 15 COMM_MATRIXB_TRANS_C32 16 31 mmDCP0_COMM_MATRIXB_TRANS_C31_C32 0 0x1a4d 0 0 4294967295 mmDCP1_COMM_MATRIXB_TRANS_C31_C32 0 0x1c4d 0 0 4294967295 mmDCP2_COMM_MATRIXB_TRANS_C31_C32 0 0x1e4d 0 0 4294967295 mmDCP3_COMM_MATRIXB_TRANS_C31_C32 0 0x404d 0 0 4294967295 mmDCP4_COMM_MATRIXB_TRANS_C31_C32 0 0x424d 0 0 4294967295 mmDCP5_COMM_MATRIXB_TRANS_C31_C32 0 0x444d 0 0 4294967295 mmCOMM_MATRIXB_TRANS_C33_C34 0 0x1a4e 2 0 4294967295 COMM_MATRIXB_TRANS_C33 0 15 COMM_MATRIXB_TRANS_C34 16 31 mmDCP0_COMM_MATRIXB_TRANS_C33_C34 0 0x1a4e 0 0 4294967295 mmDCP1_COMM_MATRIXB_TRANS_C33_C34 0 0x1c4e 0 0 4294967295 mmDCP2_COMM_MATRIXB_TRANS_C33_C34 0 0x1e4e 0 0 4294967295 mmDCP3_COMM_MATRIXB_TRANS_C33_C34 0 0x404e 0 0 4294967295 mmDCP4_COMM_MATRIXB_TRANS_C33_C34 0 0x424e 0 0 4294967295 mmDCP5_COMM_MATRIXB_TRANS_C33_C34 0 0x444e 0 0 4294967295 mmDENORM_CONTROL 0 0x1a50 2 0 4294967295 DENORM_MODE 0 2 DENORM_14BIT_OUT 4 4 mmDCP0_DENORM_CONTROL 0 0x1a50 0 0 4294967295 mmDCP1_DENORM_CONTROL 0 0x1c50 0 0 4294967295 mmDCP2_DENORM_CONTROL 0 0x1e50 0 0 4294967295 mmDCP3_DENORM_CONTROL 0 0x4050 0 0 4294967295 mmDCP4_DENORM_CONTROL 0 0x4250 0 0 4294967295 mmDCP5_DENORM_CONTROL 0 0x4450 0 0 4294967295 mmOUT_ROUND_CONTROL 0 0x1a51 1 0 4294967295 OUT_ROUND_TRUNC_MODE 0 3 mmDCP0_OUT_ROUND_CONTROL 0 0x1a51 0 0 4294967295 mmDCP1_OUT_ROUND_CONTROL 0 0x1c51 0 0 4294967295 mmDCP2_OUT_ROUND_CONTROL 0 0x1e51 0 0 4294967295 mmDCP3_OUT_ROUND_CONTROL 0 0x4051 0 0 4294967295 mmDCP4_OUT_ROUND_CONTROL 0 0x4251 0 0 4294967295 mmDCP5_OUT_ROUND_CONTROL 0 0x4451 0 0 4294967295 mmOUT_CLAMP_CONTROL_R_CR 0 0x1a52 2 0 4294967295 OUT_CLAMP_MAX_R_CR 0 13 OUT_CLAMP_MIN_R_CR 16 29 mmDCP0_OUT_CLAMP_CONTROL_R_CR 0 0x1a52 0 0 4294967295 mmDCP1_OUT_CLAMP_CONTROL_R_CR 0 0x1c52 0 0 4294967295 mmDCP2_OUT_CLAMP_CONTROL_R_CR 0 0x1e52 0 0 4294967295 mmDCP3_OUT_CLAMP_CONTROL_R_CR 0 0x4052 0 0 4294967295 mmDCP4_OUT_CLAMP_CONTROL_R_CR 0 0x4252 0 0 4294967295 mmDCP5_OUT_CLAMP_CONTROL_R_CR 0 0x4452 0 0 4294967295 mmOUT_CLAMP_CONTROL_G_Y 0 0x1a9c 2 0 4294967295 OUT_CLAMP_MAX_G_Y 0 13 OUT_CLAMP_MIN_G_Y 16 29 mmDCP0_OUT_CLAMP_CONTROL_G_Y 0 0x1a9c 0 0 4294967295 mmDCP1_OUT_CLAMP_CONTROL_G_Y 0 0x1c9c 0 0 4294967295 mmDCP2_OUT_CLAMP_CONTROL_G_Y 0 0x1e9c 0 0 4294967295 mmDCP3_OUT_CLAMP_CONTROL_G_Y 0 0x409c 0 0 4294967295 mmDCP4_OUT_CLAMP_CONTROL_G_Y 0 0x429c 0 0 4294967295 mmDCP5_OUT_CLAMP_CONTROL_G_Y 0 0x449c 0 0 4294967295 mmOUT_CLAMP_CONTROL_B_CB 0 0x1a9d 2 0 4294967295 OUT_CLAMP_MAX_B_CB 0 13 OUT_CLAMP_MIN_B_CB 16 29 mmDCP0_OUT_CLAMP_CONTROL_B_CB 0 0x1a9d 0 0 4294967295 mmDCP1_OUT_CLAMP_CONTROL_B_CB 0 0x1c9d 0 0 4294967295 mmDCP2_OUT_CLAMP_CONTROL_B_CB 0 0x1e9d 0 0 4294967295 mmDCP3_OUT_CLAMP_CONTROL_B_CB 0 0x409d 0 0 4294967295 mmDCP4_OUT_CLAMP_CONTROL_B_CB 0 0x429d 0 0 4294967295 mmDCP5_OUT_CLAMP_CONTROL_B_CB 0 0x449d 0 0 4294967295 mmKEY_CONTROL 0 0x1a53 1 0 4294967295 KEY_MODE 1 2 mmDCP0_KEY_CONTROL 0 0x1a53 0 0 4294967295 mmDCP1_KEY_CONTROL 0 0x1c53 0 0 4294967295 mmDCP2_KEY_CONTROL 0 0x1e53 0 0 4294967295 mmDCP3_KEY_CONTROL 0 0x4053 0 0 4294967295 mmDCP4_KEY_CONTROL 0 0x4253 0 0 4294967295 mmDCP5_KEY_CONTROL 0 0x4453 0 0 4294967295 mmKEY_RANGE_ALPHA 0 0x1a54 2 0 4294967295 KEY_ALPHA_LOW 0 15 KEY_ALPHA_HIGH 16 31 mmDCP0_KEY_RANGE_ALPHA 0 0x1a54 0 0 4294967295 mmDCP1_KEY_RANGE_ALPHA 0 0x1c54 0 0 4294967295 mmDCP2_KEY_RANGE_ALPHA 0 0x1e54 0 0 4294967295 mmDCP3_KEY_RANGE_ALPHA 0 0x4054 0 0 4294967295 mmDCP4_KEY_RANGE_ALPHA 0 0x4254 0 0 4294967295 mmDCP5_KEY_RANGE_ALPHA 0 0x4454 0 0 4294967295 mmKEY_RANGE_RED 0 0x1a55 2 0 4294967295 KEY_RED_LOW 0 15 KEY_RED_HIGH 16 31 mmDCP0_KEY_RANGE_RED 0 0x1a55 0 0 4294967295 mmDCP1_KEY_RANGE_RED 0 0x1c55 0 0 4294967295 mmDCP2_KEY_RANGE_RED 0 0x1e55 0 0 4294967295 mmDCP3_KEY_RANGE_RED 0 0x4055 0 0 4294967295 mmDCP4_KEY_RANGE_RED 0 0x4255 0 0 4294967295 mmDCP5_KEY_RANGE_RED 0 0x4455 0 0 4294967295 mmKEY_RANGE_GREEN 0 0x1a56 2 0 4294967295 KEY_GREEN_LOW 0 15 KEY_GREEN_HIGH 16 31 mmDCP0_KEY_RANGE_GREEN 0 0x1a56 0 0 4294967295 mmDCP1_KEY_RANGE_GREEN 0 0x1c56 0 0 4294967295 mmDCP2_KEY_RANGE_GREEN 0 0x1e56 0 0 4294967295 mmDCP3_KEY_RANGE_GREEN 0 0x4056 0 0 4294967295 mmDCP4_KEY_RANGE_GREEN 0 0x4256 0 0 4294967295 mmDCP5_KEY_RANGE_GREEN 0 0x4456 0 0 4294967295 mmKEY_RANGE_BLUE 0 0x1a57 2 0 4294967295 KEY_BLUE_LOW 0 15 KEY_BLUE_HIGH 16 31 mmDCP0_KEY_RANGE_BLUE 0 0x1a57 0 0 4294967295 mmDCP1_KEY_RANGE_BLUE 0 0x1c57 0 0 4294967295 mmDCP2_KEY_RANGE_BLUE 0 0x1e57 0 0 4294967295 mmDCP3_KEY_RANGE_BLUE 0 0x4057 0 0 4294967295 mmDCP4_KEY_RANGE_BLUE 0 0x4257 0 0 4294967295 mmDCP5_KEY_RANGE_BLUE 0 0x4457 0 0 4294967295 mmDEGAMMA_CONTROL 0 0x1a58 3 0 4294967295 GRPH_DEGAMMA_MODE 0 1 CURSOR2_DEGAMMA_MODE 8 9 CURSOR_DEGAMMA_MODE 12 13 mmDCP0_DEGAMMA_CONTROL 0 0x1a58 0 0 4294967295 mmDCP1_DEGAMMA_CONTROL 0 0x1c58 0 0 4294967295 mmDCP2_DEGAMMA_CONTROL 0 0x1e58 0 0 4294967295 mmDCP3_DEGAMMA_CONTROL 0 0x4058 0 0 4294967295 mmDCP4_DEGAMMA_CONTROL 0 0x4258 0 0 4294967295 mmDCP5_DEGAMMA_CONTROL 0 0x4458 0 0 4294967295 mmGAMUT_REMAP_CONTROL 0 0x1a59 1 0 4294967295 GRPH_GAMUT_REMAP_MODE 0 1 mmDCP0_GAMUT_REMAP_CONTROL 0 0x1a59 0 0 4294967295 mmDCP1_GAMUT_REMAP_CONTROL 0 0x1c59 0 0 4294967295 mmDCP2_GAMUT_REMAP_CONTROL 0 0x1e59 0 0 4294967295 mmDCP3_GAMUT_REMAP_CONTROL 0 0x4059 0 0 4294967295 mmDCP4_GAMUT_REMAP_CONTROL 0 0x4259 0 0 4294967295 mmDCP5_GAMUT_REMAP_CONTROL 0 0x4459 0 0 4294967295 mmGAMUT_REMAP_C11_C12 0 0x1a5a 2 0 4294967295 GAMUT_REMAP_C11 0 15 GAMUT_REMAP_C12 16 31 mmDCP0_GAMUT_REMAP_C11_C12 0 0x1a5a 0 0 4294967295 mmDCP1_GAMUT_REMAP_C11_C12 0 0x1c5a 0 0 4294967295 mmDCP2_GAMUT_REMAP_C11_C12 0 0x1e5a 0 0 4294967295 mmDCP3_GAMUT_REMAP_C11_C12 0 0x405a 0 0 4294967295 mmDCP4_GAMUT_REMAP_C11_C12 0 0x425a 0 0 4294967295 mmDCP5_GAMUT_REMAP_C11_C12 0 0x445a 0 0 4294967295 mmGAMUT_REMAP_C13_C14 0 0x1a5b 2 0 4294967295 GAMUT_REMAP_C13 0 15 GAMUT_REMAP_C14 16 31 mmDCP0_GAMUT_REMAP_C13_C14 0 0x1a5b 0 0 4294967295 mmDCP1_GAMUT_REMAP_C13_C14 0 0x1c5b 0 0 4294967295 mmDCP2_GAMUT_REMAP_C13_C14 0 0x1e5b 0 0 4294967295 mmDCP3_GAMUT_REMAP_C13_C14 0 0x405b 0 0 4294967295 mmDCP4_GAMUT_REMAP_C13_C14 0 0x425b 0 0 4294967295 mmDCP5_GAMUT_REMAP_C13_C14 0 0x445b 0 0 4294967295 mmGAMUT_REMAP_C21_C22 0 0x1a5c 2 0 4294967295 GAMUT_REMAP_C21 0 15 GAMUT_REMAP_C22 16 31 mmDCP0_GAMUT_REMAP_C21_C22 0 0x1a5c 0 0 4294967295 mmDCP1_GAMUT_REMAP_C21_C22 0 0x1c5c 0 0 4294967295 mmDCP2_GAMUT_REMAP_C21_C22 0 0x1e5c 0 0 4294967295 mmDCP3_GAMUT_REMAP_C21_C22 0 0x405c 0 0 4294967295 mmDCP4_GAMUT_REMAP_C21_C22 0 0x425c 0 0 4294967295 mmDCP5_GAMUT_REMAP_C21_C22 0 0x445c 0 0 4294967295 mmGAMUT_REMAP_C23_C24 0 0x1a5d 2 0 4294967295 GAMUT_REMAP_C23 0 15 GAMUT_REMAP_C24 16 31 mmDCP0_GAMUT_REMAP_C23_C24 0 0x1a5d 0 0 4294967295 mmDCP1_GAMUT_REMAP_C23_C24 0 0x1c5d 0 0 4294967295 mmDCP2_GAMUT_REMAP_C23_C24 0 0x1e5d 0 0 4294967295 mmDCP3_GAMUT_REMAP_C23_C24 0 0x405d 0 0 4294967295 mmDCP4_GAMUT_REMAP_C23_C24 0 0x425d 0 0 4294967295 mmDCP5_GAMUT_REMAP_C23_C24 0 0x445d 0 0 4294967295 mmGAMUT_REMAP_C31_C32 0 0x1a5e 2 0 4294967295 GAMUT_REMAP_C31 0 15 GAMUT_REMAP_C32 16 31 mmDCP0_GAMUT_REMAP_C31_C32 0 0x1a5e 0 0 4294967295 mmDCP1_GAMUT_REMAP_C31_C32 0 0x1c5e 0 0 4294967295 mmDCP2_GAMUT_REMAP_C31_C32 0 0x1e5e 0 0 4294967295 mmDCP3_GAMUT_REMAP_C31_C32 0 0x405e 0 0 4294967295 mmDCP4_GAMUT_REMAP_C31_C32 0 0x425e 0 0 4294967295 mmDCP5_GAMUT_REMAP_C31_C32 0 0x445e 0 0 4294967295 mmGAMUT_REMAP_C33_C34 0 0x1a5f 2 0 4294967295 GAMUT_REMAP_C33 0 15 GAMUT_REMAP_C34 16 31 mmDCP0_GAMUT_REMAP_C33_C34 0 0x1a5f 0 0 4294967295 mmDCP1_GAMUT_REMAP_C33_C34 0 0x1c5f 0 0 4294967295 mmDCP2_GAMUT_REMAP_C33_C34 0 0x1e5f 0 0 4294967295 mmDCP3_GAMUT_REMAP_C33_C34 0 0x405f 0 0 4294967295 mmDCP4_GAMUT_REMAP_C33_C34 0 0x425f 0 0 4294967295 mmDCP5_GAMUT_REMAP_C33_C34 0 0x445f 0 0 4294967295 mmDCP_SPATIAL_DITHER_CNTL 0 0x1a60 6 0 4294967295 DCP_SPATIAL_DITHER_EN 0 0 DCP_SPATIAL_DITHER_MODE 4 5 DCP_SPATIAL_DITHER_DEPTH 6 7 DCP_FRAME_RANDOM_ENABLE 8 8 DCP_RGB_RANDOM_ENABLE 9 9 DCP_HIGHPASS_RANDOM_ENABLE 10 10 mmDCP0_DCP_SPATIAL_DITHER_CNTL 0 0x1a60 0 0 4294967295 mmDCP1_DCP_SPATIAL_DITHER_CNTL 0 0x1c60 0 0 4294967295 mmDCP2_DCP_SPATIAL_DITHER_CNTL 0 0x1e60 0 0 4294967295 mmDCP3_DCP_SPATIAL_DITHER_CNTL 0 0x4060 0 0 4294967295 mmDCP4_DCP_SPATIAL_DITHER_CNTL 0 0x4260 0 0 4294967295 mmDCP5_DCP_SPATIAL_DITHER_CNTL 0 0x4460 0 0 4294967295 mmDCP_RANDOM_SEEDS 0 0x1a61 3 0 4294967295 DCP_RAND_R_SEED 0 7 DCP_RAND_G_SEED 8 15 DCP_RAND_B_SEED 16 23 mmDCP0_DCP_RANDOM_SEEDS 0 0x1a61 0 0 4294967295 mmDCP1_DCP_RANDOM_SEEDS 0 0x1c61 0 0 4294967295 mmDCP2_DCP_RANDOM_SEEDS 0 0x1e61 0 0 4294967295 mmDCP3_DCP_RANDOM_SEEDS 0 0x4061 0 0 4294967295 mmDCP4_DCP_RANDOM_SEEDS 0 0x4261 0 0 4294967295 mmDCP5_DCP_RANDOM_SEEDS 0 0x4461 0 0 4294967295 mmDCP_FP_CONVERTED_FIELD 0 0x1a65 2 0 4294967295 DCP_FP_CONVERTED_FIELD_DATA 0 17 DCP_FP_CONVERTED_FIELD_INDEX 20 26 mmDCP0_DCP_FP_CONVERTED_FIELD 0 0x1a65 0 0 4294967295 mmDCP1_DCP_FP_CONVERTED_FIELD 0 0x1c65 0 0 4294967295 mmDCP2_DCP_FP_CONVERTED_FIELD 0 0x1e65 0 0 4294967295 mmDCP3_DCP_FP_CONVERTED_FIELD 0 0x4065 0 0 4294967295 mmDCP4_DCP_FP_CONVERTED_FIELD 0 0x4265 0 0 4294967295 mmDCP5_DCP_FP_CONVERTED_FIELD 0 0x4465 0 0 4294967295 mmCUR_CONTROL 0 0x1a66 7 0 4294967295 CURSOR_EN 0 0 CUR_INV_TRANS_CLAMP 4 4 CURSOR_MODE 8 9 CURSOR_BUSY_START_LINE_POSITION 12 15 CURSOR_2X_MAGNIFY 16 16 CURSOR_FORCE_MC_ON 20 20 CURSOR_URGENT_CONTROL 24 26 mmDCP0_CUR_CONTROL 0 0x1a66 0 0 4294967295 mmDCP1_CUR_CONTROL 0 0x1c66 0 0 4294967295 mmDCP2_CUR_CONTROL 0 0x1e66 0 0 4294967295 mmDCP3_CUR_CONTROL 0 0x4066 0 0 4294967295 mmDCP4_CUR_CONTROL 0 0x4266 0 0 4294967295 mmDCP5_CUR_CONTROL 0 0x4466 0 0 4294967295 mmCUR_SURFACE_ADDRESS 0 0x1a67 1 0 4294967295 CURSOR_SURFACE_ADDRESS 0 31 mmDCP0_CUR_SURFACE_ADDRESS 0 0x1a67 0 0 4294967295 mmDCP1_CUR_SURFACE_ADDRESS 0 0x1c67 0 0 4294967295 mmDCP2_CUR_SURFACE_ADDRESS 0 0x1e67 0 0 4294967295 mmDCP3_CUR_SURFACE_ADDRESS 0 0x4067 0 0 4294967295 mmDCP4_CUR_SURFACE_ADDRESS 0 0x4267 0 0 4294967295 mmDCP5_CUR_SURFACE_ADDRESS 0 0x4467 0 0 4294967295 mmCUR_SIZE 0 0x1a68 2 0 4294967295 CURSOR_HEIGHT 0 6 CURSOR_WIDTH 16 22 mmDCP0_CUR_SIZE 0 0x1a68 0 0 4294967295 mmDCP1_CUR_SIZE 0 0x1c68 0 0 4294967295 mmDCP2_CUR_SIZE 0 0x1e68 0 0 4294967295 mmDCP3_CUR_SIZE 0 0x4068 0 0 4294967295 mmDCP4_CUR_SIZE 0 0x4268 0 0 4294967295 mmDCP5_CUR_SIZE 0 0x4468 0 0 4294967295 mmCUR_SURFACE_ADDRESS_HIGH 0 0x1a69 1 0 4294967295 CURSOR_SURFACE_ADDRESS_HIGH 0 7 mmDCP0_CUR_SURFACE_ADDRESS_HIGH 0 0x1a69 0 0 4294967295 mmDCP1_CUR_SURFACE_ADDRESS_HIGH 0 0x1c69 0 0 4294967295 mmDCP2_CUR_SURFACE_ADDRESS_HIGH 0 0x1e69 0 0 4294967295 mmDCP3_CUR_SURFACE_ADDRESS_HIGH 0 0x4069 0 0 4294967295 mmDCP4_CUR_SURFACE_ADDRESS_HIGH 0 0x4269 0 0 4294967295 mmDCP5_CUR_SURFACE_ADDRESS_HIGH 0 0x4469 0 0 4294967295 mmCUR_POSITION 0 0x1a6a 2 0 4294967295 CURSOR_Y_POSITION 0 13 CURSOR_X_POSITION 16 29 mmDCP0_CUR_POSITION 0 0x1a6a 0 0 4294967295 mmDCP1_CUR_POSITION 0 0x1c6a 0 0 4294967295 mmDCP2_CUR_POSITION 0 0x1e6a 0 0 4294967295 mmDCP3_CUR_POSITION 0 0x406a 0 0 4294967295 mmDCP4_CUR_POSITION 0 0x426a 0 0 4294967295 mmDCP5_CUR_POSITION 0 0x446a 0 0 4294967295 mmCUR_HOT_SPOT 0 0x1a6b 2 0 4294967295 CURSOR_HOT_SPOT_Y 0 6 CURSOR_HOT_SPOT_X 16 22 mmDCP0_CUR_HOT_SPOT 0 0x1a6b 0 0 4294967295 mmDCP1_CUR_HOT_SPOT 0 0x1c6b 0 0 4294967295 mmDCP2_CUR_HOT_SPOT 0 0x1e6b 0 0 4294967295 mmDCP3_CUR_HOT_SPOT 0 0x406b 0 0 4294967295 mmDCP4_CUR_HOT_SPOT 0 0x426b 0 0 4294967295 mmDCP5_CUR_HOT_SPOT 0 0x446b 0 0 4294967295 mmCUR_COLOR1 0 0x1a6c 3 0 4294967295 CUR_COLOR1_BLUE 0 7 CUR_COLOR1_GREEN 8 15 CUR_COLOR1_RED 16 23 mmDCP0_CUR_COLOR1 0 0x1a6c 0 0 4294967295 mmDCP1_CUR_COLOR1 0 0x1c6c 0 0 4294967295 mmDCP2_CUR_COLOR1 0 0x1e6c 0 0 4294967295 mmDCP3_CUR_COLOR1 0 0x406c 0 0 4294967295 mmDCP4_CUR_COLOR1 0 0x426c 0 0 4294967295 mmDCP5_CUR_COLOR1 0 0x446c 0 0 4294967295 mmCUR_COLOR2 0 0x1a6d 3 0 4294967295 CUR_COLOR2_BLUE 0 7 CUR_COLOR2_GREEN 8 15 CUR_COLOR2_RED 16 23 mmDCP0_CUR_COLOR2 0 0x1a6d 0 0 4294967295 mmDCP1_CUR_COLOR2 0 0x1c6d 0 0 4294967295 mmDCP2_CUR_COLOR2 0 0x1e6d 0 0 4294967295 mmDCP3_CUR_COLOR2 0 0x406d 0 0 4294967295 mmDCP4_CUR_COLOR2 0 0x426d 0 0 4294967295 mmDCP5_CUR_COLOR2 0 0x446d 0 0 4294967295 mmCUR_UPDATE 0 0x1a6e 5 0 4294967295 CURSOR_UPDATE_PENDING 0 0 CURSOR_UPDATE_TAKEN 1 1 CURSOR_UPDATE_LOCK 16 16 CURSOR_DISABLE_MULTIPLE_UPDATE 24 24 CURSOR_UPDATE_STEREO_MODE 25 26 mmDCP0_CUR_UPDATE 0 0x1a6e 0 0 4294967295 mmDCP1_CUR_UPDATE 0 0x1c6e 0 0 4294967295 mmDCP2_CUR_UPDATE 0 0x1e6e 0 0 4294967295 mmDCP3_CUR_UPDATE 0 0x406e 0 0 4294967295 mmDCP4_CUR_UPDATE 0 0x426e 0 0 4294967295 mmDCP5_CUR_UPDATE 0 0x446e 0 0 4294967295 mmCUR_REQUEST_FILTER_CNTL 0 0x1a99 1 0 4294967295 CUR_REQUEST_FILTER_DIS 0 0 mmDCP0_CUR_REQUEST_FILTER_CNTL 0 0x1a99 0 0 4294967295 mmDCP1_CUR_REQUEST_FILTER_CNTL 0 0x1c99 0 0 4294967295 mmDCP2_CUR_REQUEST_FILTER_CNTL 0 0x1e99 0 0 4294967295 mmDCP3_CUR_REQUEST_FILTER_CNTL 0 0x4099 0 0 4294967295 mmDCP4_CUR_REQUEST_FILTER_CNTL 0 0x4299 0 0 4294967295 mmDCP5_CUR_REQUEST_FILTER_CNTL 0 0x4499 0 0 4294967295 mmCUR_STEREO_CONTROL 0 0x1a9a 4 0 4294967295 CURSOR_STEREO_EN 0 0 CURSOR_STEREO_OFFSET_YNX 1 1 CURSOR_PRIMARY_OFFSET 4 13 CURSOR_SECONDARY_OFFSET 16 25 mmDCP0_CUR_STEREO_CONTROL 0 0x1a9a 0 0 4294967295 mmDCP1_CUR_STEREO_CONTROL 0 0x1c9a 0 0 4294967295 mmDCP2_CUR_STEREO_CONTROL 0 0x1e9a 0 0 4294967295 mmDCP3_CUR_STEREO_CONTROL 0 0x409a 0 0 4294967295 mmDCP4_CUR_STEREO_CONTROL 0 0x429a 0 0 4294967295 mmDCP5_CUR_STEREO_CONTROL 0 0x449a 0 0 4294967295 mmDC_LUT_RW_MODE 0 0x1a78 3 0 4294967295 DC_LUT_RW_MODE 0 0 DC_LUT_ERROR 16 16 DC_LUT_ERROR_RST 17 17 mmDCP0_DC_LUT_RW_MODE 0 0x1a78 0 0 4294967295 mmDCP1_DC_LUT_RW_MODE 0 0x1c78 0 0 4294967295 mmDCP2_DC_LUT_RW_MODE 0 0x1e78 0 0 4294967295 mmDCP3_DC_LUT_RW_MODE 0 0x4078 0 0 4294967295 mmDCP4_DC_LUT_RW_MODE 0 0x4278 0 0 4294967295 mmDCP5_DC_LUT_RW_MODE 0 0x4478 0 0 4294967295 mmDC_LUT_RW_INDEX 0 0x1a79 1 0 4294967295 DC_LUT_RW_INDEX 0 7 mmDCP0_DC_LUT_RW_INDEX 0 0x1a79 0 0 4294967295 mmDCP1_DC_LUT_RW_INDEX 0 0x1c79 0 0 4294967295 mmDCP2_DC_LUT_RW_INDEX 0 0x1e79 0 0 4294967295 mmDCP3_DC_LUT_RW_INDEX 0 0x4079 0 0 4294967295 mmDCP4_DC_LUT_RW_INDEX 0 0x4279 0 0 4294967295 mmDCP5_DC_LUT_RW_INDEX 0 0x4479 0 0 4294967295 mmDC_LUT_SEQ_COLOR 0 0x1a7a 1 0 4294967295 DC_LUT_SEQ_COLOR 0 15 mmDCP0_DC_LUT_SEQ_COLOR 0 0x1a7a 0 0 4294967295 mmDCP1_DC_LUT_SEQ_COLOR 0 0x1c7a 0 0 4294967295 mmDCP2_DC_LUT_SEQ_COLOR 0 0x1e7a 0 0 4294967295 mmDCP3_DC_LUT_SEQ_COLOR 0 0x407a 0 0 4294967295 mmDCP4_DC_LUT_SEQ_COLOR 0 0x427a 0 0 4294967295 mmDCP5_DC_LUT_SEQ_COLOR 0 0x447a 0 0 4294967295 mmDC_LUT_PWL_DATA 0 0x1a7b 2 0 4294967295 DC_LUT_BASE 0 15 DC_LUT_DELTA 16 31 mmDCP0_DC_LUT_PWL_DATA 0 0x1a7b 0 0 4294967295 mmDCP1_DC_LUT_PWL_DATA 0 0x1c7b 0 0 4294967295 mmDCP2_DC_LUT_PWL_DATA 0 0x1e7b 0 0 4294967295 mmDCP3_DC_LUT_PWL_DATA 0 0x407b 0 0 4294967295 mmDCP4_DC_LUT_PWL_DATA 0 0x427b 0 0 4294967295 mmDCP5_DC_LUT_PWL_DATA 0 0x447b 0 0 4294967295 mmDC_LUT_30_COLOR 0 0x1a7c 3 0 4294967295 DC_LUT_COLOR_10_BLUE 0 9 DC_LUT_COLOR_10_GREEN 10 19 DC_LUT_COLOR_10_RED 20 29 mmDCP0_DC_LUT_30_COLOR 0 0x1a7c 0 0 4294967295 mmDCP1_DC_LUT_30_COLOR 0 0x1c7c 0 0 4294967295 mmDCP2_DC_LUT_30_COLOR 0 0x1e7c 0 0 4294967295 mmDCP3_DC_LUT_30_COLOR 0 0x407c 0 0 4294967295 mmDCP4_DC_LUT_30_COLOR 0 0x427c 0 0 4294967295 mmDCP5_DC_LUT_30_COLOR 0 0x447c 0 0 4294967295 mmDC_LUT_VGA_ACCESS_ENABLE 0 0x1a7d 1 0 4294967295 DC_LUT_VGA_ACCESS_ENABLE 0 0 mmDCP0_DC_LUT_VGA_ACCESS_ENABLE 0 0x1a7d 0 0 4294967295 mmDCP1_DC_LUT_VGA_ACCESS_ENABLE 0 0x1c7d 0 0 4294967295 mmDCP2_DC_LUT_VGA_ACCESS_ENABLE 0 0x1e7d 0 0 4294967295 mmDCP3_DC_LUT_VGA_ACCESS_ENABLE 0 0x407d 0 0 4294967295 mmDCP4_DC_LUT_VGA_ACCESS_ENABLE 0 0x427d 0 0 4294967295 mmDCP5_DC_LUT_VGA_ACCESS_ENABLE 0 0x447d 0 0 4294967295 mmDC_LUT_WRITE_EN_MASK 0 0x1a7e 1 0 4294967295 DC_LUT_WRITE_EN_MASK 0 2 mmDCP0_DC_LUT_WRITE_EN_MASK 0 0x1a7e 0 0 4294967295 mmDCP1_DC_LUT_WRITE_EN_MASK 0 0x1c7e 0 0 4294967295 mmDCP2_DC_LUT_WRITE_EN_MASK 0 0x1e7e 0 0 4294967295 mmDCP3_DC_LUT_WRITE_EN_MASK 0 0x407e 0 0 4294967295 mmDCP4_DC_LUT_WRITE_EN_MASK 0 0x427e 0 0 4294967295 mmDCP5_DC_LUT_WRITE_EN_MASK 0 0x447e 0 0 4294967295 mmDC_LUT_AUTOFILL 0 0x1a7f 2 0 4294967295 DC_LUT_AUTOFILL 0 0 DC_LUT_AUTOFILL_DONE 1 1 mmDCP0_DC_LUT_AUTOFILL 0 0x1a7f 0 0 4294967295 mmDCP1_DC_LUT_AUTOFILL 0 0x1c7f 0 0 4294967295 mmDCP2_DC_LUT_AUTOFILL 0 0x1e7f 0 0 4294967295 mmDCP3_DC_LUT_AUTOFILL 0 0x407f 0 0 4294967295 mmDCP4_DC_LUT_AUTOFILL 0 0x427f 0 0 4294967295 mmDCP5_DC_LUT_AUTOFILL 0 0x447f 0 0 4294967295 mmDC_LUT_CONTROL 0 0x1a80 12 0 4294967295 DC_LUT_INC_B 0 3 DC_LUT_DATA_B_SIGNED_EN 4 4 DC_LUT_DATA_B_FLOAT_POINT_EN 5 5 DC_LUT_DATA_B_FORMAT 6 7 DC_LUT_INC_G 8 11 DC_LUT_DATA_G_SIGNED_EN 12 12 DC_LUT_DATA_G_FLOAT_POINT_EN 13 13 DC_LUT_DATA_G_FORMAT 14 15 DC_LUT_INC_R 16 19 DC_LUT_DATA_R_SIGNED_EN 20 20 DC_LUT_DATA_R_FLOAT_POINT_EN 21 21 DC_LUT_DATA_R_FORMAT 22 23 mmDCP0_DC_LUT_CONTROL 0 0x1a80 0 0 4294967295 mmDCP1_DC_LUT_CONTROL 0 0x1c80 0 0 4294967295 mmDCP2_DC_LUT_CONTROL 0 0x1e80 0 0 4294967295 mmDCP3_DC_LUT_CONTROL 0 0x4080 0 0 4294967295 mmDCP4_DC_LUT_CONTROL 0 0x4280 0 0 4294967295 mmDCP5_DC_LUT_CONTROL 0 0x4480 0 0 4294967295 mmDC_LUT_BLACK_OFFSET_BLUE 0 0x1a81 1 0 4294967295 DC_LUT_BLACK_OFFSET_BLUE 0 15 mmDCP0_DC_LUT_BLACK_OFFSET_BLUE 0 0x1a81 0 0 4294967295 mmDCP1_DC_LUT_BLACK_OFFSET_BLUE 0 0x1c81 0 0 4294967295 mmDCP2_DC_LUT_BLACK_OFFSET_BLUE 0 0x1e81 0 0 4294967295 mmDCP3_DC_LUT_BLACK_OFFSET_BLUE 0 0x4081 0 0 4294967295 mmDCP4_DC_LUT_BLACK_OFFSET_BLUE 0 0x4281 0 0 4294967295 mmDCP5_DC_LUT_BLACK_OFFSET_BLUE 0 0x4481 0 0 4294967295 mmDC_LUT_BLACK_OFFSET_GREEN 0 0x1a82 1 0 4294967295 DC_LUT_BLACK_OFFSET_GREEN 0 15 mmDCP0_DC_LUT_BLACK_OFFSET_GREEN 0 0x1a82 0 0 4294967295 mmDCP1_DC_LUT_BLACK_OFFSET_GREEN 0 0x1c82 0 0 4294967295 mmDCP2_DC_LUT_BLACK_OFFSET_GREEN 0 0x1e82 0 0 4294967295 mmDCP3_DC_LUT_BLACK_OFFSET_GREEN 0 0x4082 0 0 4294967295 mmDCP4_DC_LUT_BLACK_OFFSET_GREEN 0 0x4282 0 0 4294967295 mmDCP5_DC_LUT_BLACK_OFFSET_GREEN 0 0x4482 0 0 4294967295 mmDC_LUT_BLACK_OFFSET_RED 0 0x1a83 1 0 4294967295 DC_LUT_BLACK_OFFSET_RED 0 15 mmDCP0_DC_LUT_BLACK_OFFSET_RED 0 0x1a83 0 0 4294967295 mmDCP1_DC_LUT_BLACK_OFFSET_RED 0 0x1c83 0 0 4294967295 mmDCP2_DC_LUT_BLACK_OFFSET_RED 0 0x1e83 0 0 4294967295 mmDCP3_DC_LUT_BLACK_OFFSET_RED 0 0x4083 0 0 4294967295 mmDCP4_DC_LUT_BLACK_OFFSET_RED 0 0x4283 0 0 4294967295 mmDCP5_DC_LUT_BLACK_OFFSET_RED 0 0x4483 0 0 4294967295 mmDC_LUT_WHITE_OFFSET_BLUE 0 0x1a84 1 0 4294967295 DC_LUT_WHITE_OFFSET_BLUE 0 15 mmDCP0_DC_LUT_WHITE_OFFSET_BLUE 0 0x1a84 0 0 4294967295 mmDCP1_DC_LUT_WHITE_OFFSET_BLUE 0 0x1c84 0 0 4294967295 mmDCP2_DC_LUT_WHITE_OFFSET_BLUE 0 0x1e84 0 0 4294967295 mmDCP3_DC_LUT_WHITE_OFFSET_BLUE 0 0x4084 0 0 4294967295 mmDCP4_DC_LUT_WHITE_OFFSET_BLUE 0 0x4284 0 0 4294967295 mmDCP5_DC_LUT_WHITE_OFFSET_BLUE 0 0x4484 0 0 4294967295 mmDC_LUT_WHITE_OFFSET_GREEN 0 0x1a85 1 0 4294967295 DC_LUT_WHITE_OFFSET_GREEN 0 15 mmDCP0_DC_LUT_WHITE_OFFSET_GREEN 0 0x1a85 0 0 4294967295 mmDCP1_DC_LUT_WHITE_OFFSET_GREEN 0 0x1c85 0 0 4294967295 mmDCP2_DC_LUT_WHITE_OFFSET_GREEN 0 0x1e85 0 0 4294967295 mmDCP3_DC_LUT_WHITE_OFFSET_GREEN 0 0x4085 0 0 4294967295 mmDCP4_DC_LUT_WHITE_OFFSET_GREEN 0 0x4285 0 0 4294967295 mmDCP5_DC_LUT_WHITE_OFFSET_GREEN 0 0x4485 0 0 4294967295 mmDC_LUT_WHITE_OFFSET_RED 0 0x1a86 1 0 4294967295 DC_LUT_WHITE_OFFSET_RED 0 15 mmDCP0_DC_LUT_WHITE_OFFSET_RED 0 0x1a86 0 0 4294967295 mmDCP1_DC_LUT_WHITE_OFFSET_RED 0 0x1c86 0 0 4294967295 mmDCP2_DC_LUT_WHITE_OFFSET_RED 0 0x1e86 0 0 4294967295 mmDCP3_DC_LUT_WHITE_OFFSET_RED 0 0x4086 0 0 4294967295 mmDCP4_DC_LUT_WHITE_OFFSET_RED 0 0x4286 0 0 4294967295 mmDCP5_DC_LUT_WHITE_OFFSET_RED 0 0x4486 0 0 4294967295 mmDCP_CRC_CONTROL 0 0x1a87 3 0 4294967295 DCP_CRC_ENABLE 0 0 DCP_CRC_SOURCE_SEL 2 4 DCP_CRC_LINE_SEL 8 9 mmDCP0_DCP_CRC_CONTROL 0 0x1a87 0 0 4294967295 mmDCP1_DCP_CRC_CONTROL 0 0x1c87 0 0 4294967295 mmDCP2_DCP_CRC_CONTROL 0 0x1e87 0 0 4294967295 mmDCP3_DCP_CRC_CONTROL 0 0x4087 0 0 4294967295 mmDCP4_DCP_CRC_CONTROL 0 0x4287 0 0 4294967295 mmDCP5_DCP_CRC_CONTROL 0 0x4487 0 0 4294967295 mmDCP_CRC_MASK 0 0x1a88 1 0 4294967295 DCP_CRC_MASK 0 31 mmDCP0_DCP_CRC_MASK 0 0x1a88 0 0 4294967295 mmDCP1_DCP_CRC_MASK 0 0x1c88 0 0 4294967295 mmDCP2_DCP_CRC_MASK 0 0x1e88 0 0 4294967295 mmDCP3_DCP_CRC_MASK 0 0x4088 0 0 4294967295 mmDCP4_DCP_CRC_MASK 0 0x4288 0 0 4294967295 mmDCP5_DCP_CRC_MASK 0 0x4488 0 0 4294967295 mmDCP_CRC_CURRENT 0 0x1a89 1 0 4294967295 DCP_CRC_CURRENT 0 31 mmDCP0_DCP_CRC_CURRENT 0 0x1a89 0 0 4294967295 mmDCP1_DCP_CRC_CURRENT 0 0x1c89 0 0 4294967295 mmDCP2_DCP_CRC_CURRENT 0 0x1e89 0 0 4294967295 mmDCP3_DCP_CRC_CURRENT 0 0x4089 0 0 4294967295 mmDCP4_DCP_CRC_CURRENT 0 0x4289 0 0 4294967295 mmDCP5_DCP_CRC_CURRENT 0 0x4489 0 0 4294967295 mmDVMM_PTE_CONTROL 0 0x1a8a 6 0 4294967295 DVMM_USE_SINGLE_PTE 0 0 DVMM_PAGE_WIDTH 1 4 DVMM_PAGE_HEIGHT 5 8 DVMM_MIN_PTE_BEFORE_FLIP 9 18 DVMM_PTE_BUFFER_MODE0 20 20 DVMM_PTE_BUFFER_MODE1 21 21 mmDCP0_DVMM_PTE_CONTROL 0 0x1a8a 0 0 4294967295 mmDCP1_DVMM_PTE_CONTROL 0 0x1c8a 0 0 4294967295 mmDCP2_DVMM_PTE_CONTROL 0 0x1e8a 0 0 4294967295 mmDCP3_DVMM_PTE_CONTROL 0 0x408a 0 0 4294967295 mmDCP4_DVMM_PTE_CONTROL 0 0x428a 0 0 4294967295 mmDCP5_DVMM_PTE_CONTROL 0 0x448a 0 0 4294967295 mmDCP_CRC_LAST 0 0x1a8b 1 0 4294967295 DCP_CRC_LAST 0 31 mmDCP0_DCP_CRC_LAST 0 0x1a8b 0 0 4294967295 mmDCP1_DCP_CRC_LAST 0 0x1c8b 0 0 4294967295 mmDCP2_DCP_CRC_LAST 0 0x1e8b 0 0 4294967295 mmDCP3_DCP_CRC_LAST 0 0x408b 0 0 4294967295 mmDCP4_DCP_CRC_LAST 0 0x428b 0 0 4294967295 mmDCP5_DCP_CRC_LAST 0 0x448b 0 0 4294967295 mmDCP_DEBUG 0 0x1a8d 1 0 4294967295 DCP_DEBUG 0 31 mmDCP0_DCP_DEBUG 0 0x1a8d 0 0 4294967295 mmDCP1_DCP_DEBUG 0 0x1c8d 0 0 4294967295 mmDCP2_DCP_DEBUG 0 0x1e8d 0 0 4294967295 mmDCP3_DCP_DEBUG 0 0x408d 0 0 4294967295 mmDCP4_DCP_DEBUG 0 0x428d 0 0 4294967295 mmDCP5_DCP_DEBUG 0 0x448d 0 0 4294967295 mmGRPH_FLIP_RATE_CNTL 0 0x1a8e 2 0 4294967295 GRPH_FLIP_RATE 0 2 GRPH_FLIP_RATE_ENABLE 3 3 mmDCP0_GRPH_FLIP_RATE_CNTL 0 0x1a8e 0 0 4294967295 mmDCP1_GRPH_FLIP_RATE_CNTL 0 0x1c8e 0 0 4294967295 mmDCP2_GRPH_FLIP_RATE_CNTL 0 0x1e8e 0 0 4294967295 mmDCP3_GRPH_FLIP_RATE_CNTL 0 0x408e 0 0 4294967295 mmDCP4_GRPH_FLIP_RATE_CNTL 0 0x428e 0 0 4294967295 mmDCP5_GRPH_FLIP_RATE_CNTL 0 0x448e 0 0 4294967295 mmDCP_GSL_CONTROL 0 0x1a90 10 0 4294967295 DCP_GSL0_EN 0 0 DCP_GSL1_EN 1 1 DCP_GSL2_EN 2 2 DCP_GSL_HSYNC_FLIP_FORCE_DELAY 12 15 DCP_GSL_MASTER_EN 16 16 DCP_GSL_XDMA_GROUP 17 18 DCP_GSL_XDMA_GROUP_UNDERFLOW_EN 19 19 DCP_GSL_SYNC_SOURCE 24 25 DCP_GSL_DELAY_SURFACE_UPDATE_PENDING 27 27 DCP_GSL_HSYNC_FLIP_CHECK_DELAY 28 31 mmDCP0_DCP_GSL_CONTROL 0 0x1a90 0 0 4294967295 mmDCP1_DCP_GSL_CONTROL 0 0x1c90 0 0 4294967295 mmDCP2_DCP_GSL_CONTROL 0 0x1e90 0 0 4294967295 mmDCP3_DCP_GSL_CONTROL 0 0x4090 0 0 4294967295 mmDCP4_DCP_GSL_CONTROL 0 0x4290 0 0 4294967295 mmDCP5_DCP_GSL_CONTROL 0 0x4490 0 0 4294967295 mmDCP_LB_DATA_GAP_BETWEEN_CHUNK 0 0x1a91 2 0 4294967295 DCP_LB_GAP_BETWEEN_CHUNK_20BPP 0 3 DCP_LB_GAP_BETWEEN_CHUNK_30BPP 4 8 mmDCP0_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0 0x1a91 0 0 4294967295 mmDCP1_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0 0x1c91 0 0 4294967295 mmDCP2_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0 0x1e91 0 0 4294967295 mmDCP3_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0 0x4091 0 0 4294967295 mmDCP4_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0 0x4291 0 0 4294967295 mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0 0x4491 0 0 4294967295 mmDCP_DEBUG_SG 0 0x1a92 1 0 4294967295 DCP_DEBUG_SG 0 31 mmDCP0_DCP_DEBUG_SG 0 0x1a92 0 0 4294967295 mmDCP1_DCP_DEBUG_SG 0 0x1c92 0 0 4294967295 mmDCP2_DCP_DEBUG_SG 0 0x1e92 0 0 4294967295 mmDCP3_DCP_DEBUG_SG 0 0x4092 0 0 4294967295 mmDCP4_DCP_DEBUG_SG 0 0x4292 0 0 4294967295 mmDCP5_DCP_DEBUG_SG 0 0x4492 0 0 4294967295 mmDCP_DEBUG_SG2 0 0x1a94 1 0 4294967295 DCP_DEBUG_SG2 0 31 mmDCP0_DCP_DEBUG_SG2 0 0x1a94 0 0 4294967295 mmDCP1_DCP_DEBUG_SG2 0 0x1c94 0 0 4294967295 mmDCP2_DCP_DEBUG_SG2 0 0x1e94 0 0 4294967295 mmDCP3_DCP_DEBUG_SG2 0 0x4094 0 0 4294967295 mmDCP4_DCP_DEBUG_SG2 0 0x4294 0 0 4294967295 mmDCP5_DCP_DEBUG_SG2 0 0x4494 0 0 4294967295 mmDCP_DVMM_DEBUG 0 0x1a93 1 0 4294967295 DCP_DVMM_DEBUG 0 31 mmDCP0_DCP_DVMM_DEBUG 0 0x1a93 0 0 4294967295 mmDCP1_DCP_DVMM_DEBUG 0 0x1c93 0 0 4294967295 mmDCP2_DCP_DVMM_DEBUG 0 0x1e93 0 0 4294967295 mmDCP3_DCP_DVMM_DEBUG 0 0x4093 0 0 4294967295 mmDCP4_DCP_DVMM_DEBUG 0 0x4293 0 0 4294967295 mmDCP5_DCP_DVMM_DEBUG 0 0x4493 0 0 4294967295 mmDCP_TEST_DEBUG_INDEX 0 0x1a95 2 0 4294967295 DCP_TEST_DEBUG_INDEX 0 7 DCP_TEST_DEBUG_WRITE_EN 8 8 mmDCP0_DCP_TEST_DEBUG_INDEX 0 0x1a95 0 0 4294967295 mmDCP1_DCP_TEST_DEBUG_INDEX 0 0x1c95 0 0 4294967295 mmDCP2_DCP_TEST_DEBUG_INDEX 0 0x1e95 0 0 4294967295 mmDCP3_DCP_TEST_DEBUG_INDEX 0 0x4095 0 0 4294967295 mmDCP4_DCP_TEST_DEBUG_INDEX 0 0x4295 0 0 4294967295 mmDCP5_DCP_TEST_DEBUG_INDEX 0 0x4495 0 0 4294967295 mmDCP_TEST_DEBUG_DATA 0 0x1a96 1 0 4294967295 DCP_TEST_DEBUG_DATA 0 31 mmDCP0_DCP_TEST_DEBUG_DATA 0 0x1a96 0 0 4294967295 mmDCP1_DCP_TEST_DEBUG_DATA 0 0x1c96 0 0 4294967295 mmDCP2_DCP_TEST_DEBUG_DATA 0 0x1e96 0 0 4294967295 mmDCP3_DCP_TEST_DEBUG_DATA 0 0x4096 0 0 4294967295 mmDCP4_DCP_TEST_DEBUG_DATA 0 0x4296 0 0 4294967295 mmDCP5_DCP_TEST_DEBUG_DATA 0 0x4496 0 0 4294967295 mmGRPH_STEREOSYNC_FLIP 0 0x1a97 5 0 4294967295 GRPH_STEREOSYNC_FLIP_EN 0 0 GRPH_STEREOSYNC_FLIP_MODE 8 9 GRPH_PRIMARY_SURFACE_PENDING 16 16 GRPH_SECONDARY_SURFACE_PENDING 17 17 GRPH_STEREOSYNC_SELECT_DISABLE 28 28 mmDCP0_GRPH_STEREOSYNC_FLIP 0 0x1a97 0 0 4294967295 mmDCP1_GRPH_STEREOSYNC_FLIP 0 0x1c97 0 0 4294967295 mmDCP2_GRPH_STEREOSYNC_FLIP 0 0x1e97 0 0 4294967295 mmDCP3_GRPH_STEREOSYNC_FLIP 0 0x4097 0 0 4294967295 mmDCP4_GRPH_STEREOSYNC_FLIP 0 0x4297 0 0 4294967295 mmDCP5_GRPH_STEREOSYNC_FLIP 0 0x4497 0 0 4294967295 mmDCP_DEBUG2 0 0x1a98 1 0 4294967295 DCP_DEBUG2 0 31 mmDCP0_DCP_DEBUG2 0 0x1a98 0 0 4294967295 mmDCP1_DCP_DEBUG2 0 0x1c98 0 0 4294967295 mmDCP2_DCP_DEBUG2 0 0x1e98 0 0 4294967295 mmDCP3_DCP_DEBUG2 0 0x4098 0 0 4294967295 mmDCP4_DCP_DEBUG2 0 0x4298 0 0 4294967295 mmDCP5_DCP_DEBUG2 0 0x4498 0 0 4294967295 mmHW_ROTATION 0 0x1a9e 1 0 4294967295 GRPH_ROTATION_ANGLE 0 2 mmDCP0_HW_ROTATION 0 0x1a9e 0 0 4294967295 mmDCP1_HW_ROTATION 0 0x1c9e 0 0 4294967295 mmDCP2_HW_ROTATION 0 0x1e9e 0 0 4294967295 mmDCP3_HW_ROTATION 0 0x409e 0 0 4294967295 mmDCP4_HW_ROTATION 0 0x429e 0 0 4294967295 mmDCP5_HW_ROTATION 0 0x449e 0 0 4294967295 mmGRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0 0x1a9f 3 0 4294967295 GRPH_XDMA_CACHE_UNDERFLOW_CNT_EN 0 0 GRPH_XDMA_CACHE_UNDERFLOW_CNT_MODE 1 1 GRPH_XDMA_CACHE_UNDERFLOW_FRAME_CNT 4 16 mmDCP0_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0 0x1a9f 0 0 4294967295 mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0 0x1c9f 0 0 4294967295 mmDCP2_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0 0x1e9f 0 0 4294967295 mmDCP3_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0 0x409f 0 0 4294967295 mmDCP4_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0 0x429f 0 0 4294967295 mmDCP5_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0 0x449f 0 0 4294967295 mmREGAMMA_CONTROL 0 0x1aa0 1 0 4294967295 GRPH_REGAMMA_MODE 0 2 mmDCP0_REGAMMA_CONTROL 0 0x1aa0 0 0 4294967295 mmDCP1_REGAMMA_CONTROL 0 0x1ca0 0 0 4294967295 mmDCP2_REGAMMA_CONTROL 0 0x1ea0 0 0 4294967295 mmDCP3_REGAMMA_CONTROL 0 0x40a0 0 0 4294967295 mmDCP4_REGAMMA_CONTROL 0 0x42a0 0 0 4294967295 mmDCP5_REGAMMA_CONTROL 0 0x44a0 0 0 4294967295 mmREGAMMA_LUT_INDEX 0 0x1aa1 1 0 4294967295 REGAMMA_LUT_INDEX 0 8 mmDCP0_REGAMMA_LUT_INDEX 0 0x1aa1 0 0 4294967295 mmDCP1_REGAMMA_LUT_INDEX 0 0x1ca1 0 0 4294967295 mmDCP2_REGAMMA_LUT_INDEX 0 0x1ea1 0 0 4294967295 mmDCP3_REGAMMA_LUT_INDEX 0 0x40a1 0 0 4294967295 mmDCP4_REGAMMA_LUT_INDEX 0 0x42a1 0 0 4294967295 mmDCP5_REGAMMA_LUT_INDEX 0 0x44a1 0 0 4294967295 mmREGAMMA_LUT_DATA 0 0x1aa2 1 0 4294967295 REGAMMA_LUT_DATA 0 18 mmDCP0_REGAMMA_LUT_DATA 0 0x1aa2 0 0 4294967295 mmDCP1_REGAMMA_LUT_DATA 0 0x1ca2 0 0 4294967295 mmDCP2_REGAMMA_LUT_DATA 0 0x1ea2 0 0 4294967295 mmDCP3_REGAMMA_LUT_DATA 0 0x40a2 0 0 4294967295 mmDCP4_REGAMMA_LUT_DATA 0 0x42a2 0 0 4294967295 mmDCP5_REGAMMA_LUT_DATA 0 0x44a2 0 0 4294967295 mmREGAMMA_LUT_WRITE_EN_MASK 0 0x1aa3 1 0 4294967295 REGAMMA_LUT_WRITE_EN_MASK 0 2 mmDCP0_REGAMMA_LUT_WRITE_EN_MASK 0 0x1aa3 0 0 4294967295 mmDCP1_REGAMMA_LUT_WRITE_EN_MASK 0 0x1ca3 0 0 4294967295 mmDCP2_REGAMMA_LUT_WRITE_EN_MASK 0 0x1ea3 0 0 4294967295 mmDCP3_REGAMMA_LUT_WRITE_EN_MASK 0 0x40a3 0 0 4294967295 mmDCP4_REGAMMA_LUT_WRITE_EN_MASK 0 0x42a3 0 0 4294967295 mmDCP5_REGAMMA_LUT_WRITE_EN_MASK 0 0x44a3 0 0 4294967295 mmREGAMMA_CNTLA_START_CNTL 0 0x1aa4 2 0 4294967295 REGAMMA_CNTLA_EXP_REGION_START 0 17 REGAMMA_CNTLA_EXP_REGION_START_SEGMENT 20 26 mmDCP0_REGAMMA_CNTLA_START_CNTL 0 0x1aa4 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_START_CNTL 0 0x1ca4 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_START_CNTL 0 0x1ea4 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_START_CNTL 0 0x40a4 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_START_CNTL 0 0x42a4 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_START_CNTL 0 0x44a4 0 0 4294967295 mmREGAMMA_CNTLA_SLOPE_CNTL 0 0x1aa5 1 0 4294967295 REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE 0 17 mmDCP0_REGAMMA_CNTLA_SLOPE_CNTL 0 0x1aa5 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_SLOPE_CNTL 0 0x1ca5 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_SLOPE_CNTL 0 0x1ea5 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_SLOPE_CNTL 0 0x40a5 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_SLOPE_CNTL 0 0x42a5 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_SLOPE_CNTL 0 0x44a5 0 0 4294967295 mmREGAMMA_CNTLA_END_CNTL1 0 0x1aa6 1 0 4294967295 REGAMMA_CNTLA_EXP_REGION_END 0 15 mmDCP0_REGAMMA_CNTLA_END_CNTL1 0 0x1aa6 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_END_CNTL1 0 0x1ca6 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_END_CNTL1 0 0x1ea6 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_END_CNTL1 0 0x40a6 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_END_CNTL1 0 0x42a6 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_END_CNTL1 0 0x44a6 0 0 4294967295 mmREGAMMA_CNTLA_END_CNTL2 0 0x1aa7 2 0 4294967295 REGAMMA_CNTLA_EXP_REGION_END_SLOPE 0 15 REGAMMA_CNTLA_EXP_REGION_END_BASE 16 31 mmDCP0_REGAMMA_CNTLA_END_CNTL2 0 0x1aa7 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_END_CNTL2 0 0x1ca7 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_END_CNTL2 0 0x1ea7 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_END_CNTL2 0 0x40a7 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_END_CNTL2 0 0x42a7 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_END_CNTL2 0 0x44a7 0 0 4294967295 mmREGAMMA_CNTLA_REGION_0_1 0 0x1aa8 4 0 4294967295 REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET 0 8 REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS 12 14 REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET 16 24 REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLA_REGION_0_1 0 0x1aa8 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_REGION_0_1 0 0x1ca8 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_REGION_0_1 0 0x1ea8 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_REGION_0_1 0 0x40a8 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_REGION_0_1 0 0x42a8 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_REGION_0_1 0 0x44a8 0 0 4294967295 mmREGAMMA_CNTLA_REGION_2_3 0 0x1aa9 4 0 4294967295 REGAMMA_CNTLA_EXP_REGION2_LUT_OFFSET 0 8 REGAMMA_CNTLA_EXP_REGION2_NUM_SEGMENTS 12 14 REGAMMA_CNTLA_EXP_REGION3_LUT_OFFSET 16 24 REGAMMA_CNTLA_EXP_REGION3_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLA_REGION_2_3 0 0x1aa9 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_REGION_2_3 0 0x1ca9 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_REGION_2_3 0 0x1ea9 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_REGION_2_3 0 0x40a9 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_REGION_2_3 0 0x42a9 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_REGION_2_3 0 0x44a9 0 0 4294967295 mmREGAMMA_CNTLA_REGION_4_5 0 0x1aaa 4 0 4294967295 REGAMMA_CNTLA_EXP_REGION4_LUT_OFFSET 0 8 REGAMMA_CNTLA_EXP_REGION4_NUM_SEGMENTS 12 14 REGAMMA_CNTLA_EXP_REGION5_LUT_OFFSET 16 24 REGAMMA_CNTLA_EXP_REGION5_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLA_REGION_4_5 0 0x1aaa 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_REGION_4_5 0 0x1caa 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_REGION_4_5 0 0x1eaa 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_REGION_4_5 0 0x40aa 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_REGION_4_5 0 0x42aa 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_REGION_4_5 0 0x44aa 0 0 4294967295 mmREGAMMA_CNTLA_REGION_6_7 0 0x1aab 4 0 4294967295 REGAMMA_CNTLA_EXP_REGION6_LUT_OFFSET 0 8 REGAMMA_CNTLA_EXP_REGION6_NUM_SEGMENTS 12 14 REGAMMA_CNTLA_EXP_REGION7_LUT_OFFSET 16 24 REGAMMA_CNTLA_EXP_REGION7_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLA_REGION_6_7 0 0x1aab 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_REGION_6_7 0 0x1cab 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_REGION_6_7 0 0x1eab 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_REGION_6_7 0 0x40ab 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_REGION_6_7 0 0x42ab 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_REGION_6_7 0 0x44ab 0 0 4294967295 mmREGAMMA_CNTLA_REGION_8_9 0 0x1aac 4 0 4294967295 REGAMMA_CNTLA_EXP_REGION8_LUT_OFFSET 0 8 REGAMMA_CNTLA_EXP_REGION8_NUM_SEGMENTS 12 14 REGAMMA_CNTLA_EXP_REGION9_LUT_OFFSET 16 24 REGAMMA_CNTLA_EXP_REGION9_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLA_REGION_8_9 0 0x1aac 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_REGION_8_9 0 0x1cac 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_REGION_8_9 0 0x1eac 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_REGION_8_9 0 0x40ac 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_REGION_8_9 0 0x42ac 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_REGION_8_9 0 0x44ac 0 0 4294967295 mmREGAMMA_CNTLA_REGION_10_11 0 0x1aad 4 0 4294967295 REGAMMA_CNTLA_EXP_REGION10_LUT_OFFSET 0 8 REGAMMA_CNTLA_EXP_REGION10_NUM_SEGMENTS 12 14 REGAMMA_CNTLA_EXP_REGION11_LUT_OFFSET 16 24 REGAMMA_CNTLA_EXP_REGION11_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLA_REGION_10_11 0 0x1aad 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_REGION_10_11 0 0x1cad 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_REGION_10_11 0 0x1ead 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_REGION_10_11 0 0x40ad 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_REGION_10_11 0 0x42ad 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_REGION_10_11 0 0x44ad 0 0 4294967295 mmREGAMMA_CNTLA_REGION_12_13 0 0x1aae 4 0 4294967295 REGAMMA_CNTLA_EXP_REGION12_LUT_OFFSET 0 8 REGAMMA_CNTLA_EXP_REGION12_NUM_SEGMENTS 12 14 REGAMMA_CNTLA_EXP_REGION13_LUT_OFFSET 16 24 REGAMMA_CNTLA_EXP_REGION13_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLA_REGION_12_13 0 0x1aae 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_REGION_12_13 0 0x1cae 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_REGION_12_13 0 0x1eae 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_REGION_12_13 0 0x40ae 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_REGION_12_13 0 0x42ae 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_REGION_12_13 0 0x44ae 0 0 4294967295 mmREGAMMA_CNTLA_REGION_14_15 0 0x1aaf 4 0 4294967295 REGAMMA_CNTLA_EXP_REGION14_LUT_OFFSET 0 8 REGAMMA_CNTLA_EXP_REGION14_NUM_SEGMENTS 12 14 REGAMMA_CNTLA_EXP_REGION15_LUT_OFFSET 16 24 REGAMMA_CNTLA_EXP_REGION15_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLA_REGION_14_15 0 0x1aaf 0 0 4294967295 mmDCP1_REGAMMA_CNTLA_REGION_14_15 0 0x1caf 0 0 4294967295 mmDCP2_REGAMMA_CNTLA_REGION_14_15 0 0x1eaf 0 0 4294967295 mmDCP3_REGAMMA_CNTLA_REGION_14_15 0 0x40af 0 0 4294967295 mmDCP4_REGAMMA_CNTLA_REGION_14_15 0 0x42af 0 0 4294967295 mmDCP5_REGAMMA_CNTLA_REGION_14_15 0 0x44af 0 0 4294967295 mmREGAMMA_CNTLB_START_CNTL 0 0x1ab0 2 0 4294967295 REGAMMA_CNTLB_EXP_REGION_START 0 17 REGAMMA_CNTLB_EXP_REGION_START_SEGMENT 20 26 mmDCP0_REGAMMA_CNTLB_START_CNTL 0 0x1ab0 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_START_CNTL 0 0x1cb0 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_START_CNTL 0 0x1eb0 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_START_CNTL 0 0x40b0 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_START_CNTL 0 0x42b0 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_START_CNTL 0 0x44b0 0 0 4294967295 mmREGAMMA_CNTLB_SLOPE_CNTL 0 0x1ab1 1 0 4294967295 REGAMMA_CNTLB_EXP_REGION_LINEAR_SLOPE 0 17 mmDCP0_REGAMMA_CNTLB_SLOPE_CNTL 0 0x1ab1 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_SLOPE_CNTL 0 0x1cb1 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_SLOPE_CNTL 0 0x1eb1 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_SLOPE_CNTL 0 0x40b1 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_SLOPE_CNTL 0 0x42b1 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_SLOPE_CNTL 0 0x44b1 0 0 4294967295 mmREGAMMA_CNTLB_END_CNTL1 0 0x1ab2 1 0 4294967295 REGAMMA_CNTLB_EXP_REGION_END 0 15 mmDCP0_REGAMMA_CNTLB_END_CNTL1 0 0x1ab2 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_END_CNTL1 0 0x1cb2 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_END_CNTL1 0 0x1eb2 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_END_CNTL1 0 0x40b2 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_END_CNTL1 0 0x42b2 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_END_CNTL1 0 0x44b2 0 0 4294967295 mmREGAMMA_CNTLB_END_CNTL2 0 0x1ab3 2 0 4294967295 REGAMMA_CNTLB_EXP_REGION_END_SLOPE 0 15 REGAMMA_CNTLB_EXP_REGION_END_BASE 16 31 mmDCP0_REGAMMA_CNTLB_END_CNTL2 0 0x1ab3 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_END_CNTL2 0 0x1cb3 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_END_CNTL2 0 0x1eb3 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_END_CNTL2 0 0x40b3 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_END_CNTL2 0 0x42b3 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_END_CNTL2 0 0x44b3 0 0 4294967295 mmREGAMMA_CNTLB_REGION_0_1 0 0x1ab4 4 0 4294967295 REGAMMA_CNTLB_EXP_REGION0_LUT_OFFSET 0 8 REGAMMA_CNTLB_EXP_REGION0_NUM_SEGMENTS 12 14 REGAMMA_CNTLB_EXP_REGION1_LUT_OFFSET 16 24 REGAMMA_CNTLB_EXP_REGION1_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLB_REGION_0_1 0 0x1ab4 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_REGION_0_1 0 0x1cb4 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_REGION_0_1 0 0x1eb4 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_REGION_0_1 0 0x40b4 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_REGION_0_1 0 0x42b4 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_REGION_0_1 0 0x44b4 0 0 4294967295 mmREGAMMA_CNTLB_REGION_2_3 0 0x1ab5 4 0 4294967295 REGAMMA_CNTLB_EXP_REGION2_LUT_OFFSET 0 8 REGAMMA_CNTLB_EXP_REGION2_NUM_SEGMENTS 12 14 REGAMMA_CNTLB_EXP_REGION3_LUT_OFFSET 16 24 REGAMMA_CNTLB_EXP_REGION3_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLB_REGION_2_3 0 0x1ab5 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_REGION_2_3 0 0x1cb5 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_REGION_2_3 0 0x1eb5 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_REGION_2_3 0 0x40b5 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_REGION_2_3 0 0x42b5 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_REGION_2_3 0 0x44b5 0 0 4294967295 mmREGAMMA_CNTLB_REGION_4_5 0 0x1ab6 4 0 4294967295 REGAMMA_CNTLB_EXP_REGION4_LUT_OFFSET 0 8 REGAMMA_CNTLB_EXP_REGION4_NUM_SEGMENTS 12 14 REGAMMA_CNTLB_EXP_REGION5_LUT_OFFSET 16 24 REGAMMA_CNTLB_EXP_REGION5_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLB_REGION_4_5 0 0x1ab6 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_REGION_4_5 0 0x1cb6 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_REGION_4_5 0 0x1eb6 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_REGION_4_5 0 0x40b6 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_REGION_4_5 0 0x42b6 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_REGION_4_5 0 0x44b6 0 0 4294967295 mmREGAMMA_CNTLB_REGION_6_7 0 0x1ab7 4 0 4294967295 REGAMMA_CNTLB_EXP_REGION6_LUT_OFFSET 0 8 REGAMMA_CNTLB_EXP_REGION6_NUM_SEGMENTS 12 14 REGAMMA_CNTLB_EXP_REGION7_LUT_OFFSET 16 24 REGAMMA_CNTLB_EXP_REGION7_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLB_REGION_6_7 0 0x1ab7 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_REGION_6_7 0 0x1cb7 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_REGION_6_7 0 0x1eb7 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_REGION_6_7 0 0x40b7 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_REGION_6_7 0 0x42b7 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_REGION_6_7 0 0x44b7 0 0 4294967295 mmREGAMMA_CNTLB_REGION_8_9 0 0x1ab8 4 0 4294967295 REGAMMA_CNTLB_EXP_REGION8_LUT_OFFSET 0 8 REGAMMA_CNTLB_EXP_REGION8_NUM_SEGMENTS 12 14 REGAMMA_CNTLB_EXP_REGION9_LUT_OFFSET 16 24 REGAMMA_CNTLB_EXP_REGION9_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLB_REGION_8_9 0 0x1ab8 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_REGION_8_9 0 0x1cb8 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_REGION_8_9 0 0x1eb8 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_REGION_8_9 0 0x40b8 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_REGION_8_9 0 0x42b8 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_REGION_8_9 0 0x44b8 0 0 4294967295 mmREGAMMA_CNTLB_REGION_10_11 0 0x1ab9 4 0 4294967295 REGAMMA_CNTLB_EXP_REGION10_LUT_OFFSET 0 8 REGAMMA_CNTLB_EXP_REGION10_NUM_SEGMENTS 12 14 REGAMMA_CNTLB_EXP_REGION11_LUT_OFFSET 16 24 REGAMMA_CNTLB_EXP_REGION11_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLB_REGION_10_11 0 0x1ab9 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_REGION_10_11 0 0x1cb9 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_REGION_10_11 0 0x1eb9 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_REGION_10_11 0 0x40b9 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_REGION_10_11 0 0x42b9 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_REGION_10_11 0 0x44b9 0 0 4294967295 mmREGAMMA_CNTLB_REGION_12_13 0 0x1aba 4 0 4294967295 REGAMMA_CNTLB_EXP_REGION12_LUT_OFFSET 0 8 REGAMMA_CNTLB_EXP_REGION12_NUM_SEGMENTS 12 14 REGAMMA_CNTLB_EXP_REGION13_LUT_OFFSET 16 24 REGAMMA_CNTLB_EXP_REGION13_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLB_REGION_12_13 0 0x1aba 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_REGION_12_13 0 0x1cba 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_REGION_12_13 0 0x1eba 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_REGION_12_13 0 0x40ba 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_REGION_12_13 0 0x42ba 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_REGION_12_13 0 0x44ba 0 0 4294967295 mmREGAMMA_CNTLB_REGION_14_15 0 0x1abb 4 0 4294967295 REGAMMA_CNTLB_EXP_REGION14_LUT_OFFSET 0 8 REGAMMA_CNTLB_EXP_REGION14_NUM_SEGMENTS 12 14 REGAMMA_CNTLB_EXP_REGION15_LUT_OFFSET 16 24 REGAMMA_CNTLB_EXP_REGION15_NUM_SEGMENTS 28 30 mmDCP0_REGAMMA_CNTLB_REGION_14_15 0 0x1abb 0 0 4294967295 mmDCP1_REGAMMA_CNTLB_REGION_14_15 0 0x1cbb 0 0 4294967295 mmDCP2_REGAMMA_CNTLB_REGION_14_15 0 0x1ebb 0 0 4294967295 mmDCP3_REGAMMA_CNTLB_REGION_14_15 0 0x40bb 0 0 4294967295 mmDCP4_REGAMMA_CNTLB_REGION_14_15 0 0x42bb 0 0 4294967295 mmDCP5_REGAMMA_CNTLB_REGION_14_15 0 0x44bb 0 0 4294967295 mmALPHA_CONTROL 0 0x1abc 2 0 4294967295 ALPHA_ROUND_TRUNC_MODE 0 0 CURSOR_ALPHA_BLND_ENA 1 1 mmDCP0_ALPHA_CONTROL 0 0x1abc 0 0 4294967295 mmDCP1_ALPHA_CONTROL 0 0x1cbc 0 0 4294967295 mmDCP2_ALPHA_CONTROL 0 0x1ebc 0 0 4294967295 mmDCP3_ALPHA_CONTROL 0 0x40bc 0 0 4294967295 mmDCP4_ALPHA_CONTROL 0 0x42bc 0 0 4294967295 mmDCP5_ALPHA_CONTROL 0 0x44bc 0 0 4294967295 mmGRPH_XDMA_RECOVERY_SURFACE_ADDRESS 0 0x1abd 1 0 4294967295 GRPH_XDMA_RECOVERY_SURFACE_ADDRESS 8 31 mmDCP0_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS 0 0x1abd 0 0 4294967295 mmDCP1_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS 0 0x1cbd 0 0 4294967295 mmDCP2_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS 0 0x1ebd 0 0 4294967295 mmDCP3_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS 0 0x40bd 0 0 4294967295 mmDCP4_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS 0 0x42bd 0 0 4294967295 mmDCP5_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS 0 0x44bd 0 0 4294967295 mmGRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH 0 0x1abe 1 0 4294967295 GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH 0 7 mmDCP0_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH 0 0x1abe 0 0 4294967295 mmDCP1_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH 0 0x1cbe 0 0 4294967295 mmDCP2_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH 0 0x1ebe 0 0 4294967295 mmDCP3_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH 0 0x40be 0 0 4294967295 mmDCP4_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH 0 0x42be 0 0 4294967295 mmDCP5_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH 0 0x44be 0 0 4294967295 mmGRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS 0 0x1abf 7 0 4294967295 GRPH_XDMA_CACHE_UNDERFLOW_CNT 0 19 GRPH_XDMA_CACHE_UNDERFLOW_CNT_STATUS 24 24 GRPH_XDMA_CACHE_UNDERFLOW_FRAME_MASK 25 25 GRPH_XDMA_CACHE_UNDERFLOW_FRAME_ACK 26 26 GRPH_XDMA_CACHE_UNDERFLOW_INT 28 28 GRPH_XDMA_CACHE_UNDERFLOW_INT_MASK 29 29 GRPH_XDMA_CACHE_UNDERFLOW_INT_ACK 30 30 mmDCP0_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS 0 0x1abf 0 0 4294967295 mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS 0 0x1cbf 0 0 4294967295 mmDCP2_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS 0 0x1ebf 0 0 4294967295 mmDCP3_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS 0 0x40bf 0 0 4294967295 mmDCP4_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS 0 0x42bf 0 0 4294967295 mmDCP5_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS 0 0x44bf 0 0 4294967295 mmGRPH_SURFACE_COUNTER_CONTROL 0 0x1a0f 3 0 4294967295 GRPH_SURFACE_COUNTER_EN 0 0 GRPH_SURFACE_COUNTER_EVENT_SELECT 1 4 GRPH_SURFACE_COUNTER_ERR_WRAP_OCCURED 9 9 mmDCP0_GRPH_SURFACE_COUNTER_CONTROL 0 0x1a0f 0 0 4294967295 mmDCP1_GRPH_SURFACE_COUNTER_CONTROL 0 0x1c0f 0 0 4294967295 mmDCP2_GRPH_SURFACE_COUNTER_CONTROL 0 0x1e0f 0 0 4294967295 mmDCP3_GRPH_SURFACE_COUNTER_CONTROL 0 0x400f 0 0 4294967295 mmDCP4_GRPH_SURFACE_COUNTER_CONTROL 0 0x420f 0 0 4294967295 mmDCP5_GRPH_SURFACE_COUNTER_CONTROL 0 0x440f 0 0 4294967295 mmGRPH_SURFACE_COUNTER_OUTPUT 0 0x1a1d 2 0 4294967295 GRPH_SURFACE_COUNTER_MIN 0 15 GRPH_SURFACE_COUNTER_MAX 16 31 mmDCP0_GRPH_SURFACE_COUNTER_OUTPUT 0 0x1a1d 0 0 4294967295 mmDCP1_GRPH_SURFACE_COUNTER_OUTPUT 0 0x1c1d 0 0 4294967295 mmDCP2_GRPH_SURFACE_COUNTER_OUTPUT 0 0x1e1d 0 0 4294967295 mmDCP3_GRPH_SURFACE_COUNTER_OUTPUT 0 0x401d 0 0 4294967295 mmDCP4_GRPH_SURFACE_COUNTER_OUTPUT 0 0x421d 0 0 4294967295 mmDCP5_GRPH_SURFACE_COUNTER_OUTPUT 0 0x441d 0 0 4294967295 mmDIG_FE_CNTL 0 0x4a00 7 0 4294967295 DIG_SOURCE_SELECT 0 2 DIG_STEREOSYNC_SELECT 4 6 DIG_STEREOSYNC_GATE_EN 8 8 DIG_START 10 10 DIG_SYMCLK_FE_ON 24 24 TMDS_PIXEL_ENCODING 28 28 TMDS_COLOR_FORMAT 30 31 mmDIG0_DIG_FE_CNTL 0 0x4a00 0 0 4294967295 mmDIG1_DIG_FE_CNTL 0 0x4b00 0 0 4294967295 mmDIG2_DIG_FE_CNTL 0 0x4c00 0 0 4294967295 mmDIG3_DIG_FE_CNTL 0 0x4d00 0 0 4294967295 mmDIG4_DIG_FE_CNTL 0 0x4e00 0 0 4294967295 mmDIG5_DIG_FE_CNTL 0 0x4f00 0 0 4294967295 mmDIG6_DIG_FE_CNTL 0 0x5400 0 0 4294967295 mmDIG7_DIG_FE_CNTL 0 0x5600 0 0 4294967295 mmDIG8_DIG_FE_CNTL 0 0x5700 0 0 4294967295 mmDIG_OUTPUT_CRC_CNTL 0 0x4a01 3 0 4294967295 DIG_OUTPUT_CRC_EN 0 0 DIG_OUTPUT_CRC_LINK_SEL 4 4 DIG_OUTPUT_CRC_DATA_SEL 8 9 mmDIG0_DIG_OUTPUT_CRC_CNTL 0 0x4a01 0 0 4294967295 mmDIG1_DIG_OUTPUT_CRC_CNTL 0 0x4b01 0 0 4294967295 mmDIG2_DIG_OUTPUT_CRC_CNTL 0 0x4c01 0 0 4294967295 mmDIG3_DIG_OUTPUT_CRC_CNTL 0 0x4d01 0 0 4294967295 mmDIG4_DIG_OUTPUT_CRC_CNTL 0 0x4e01 0 0 4294967295 mmDIG5_DIG_OUTPUT_CRC_CNTL 0 0x4f01 0 0 4294967295 mmDIG6_DIG_OUTPUT_CRC_CNTL 0 0x5401 0 0 4294967295 mmDIG7_DIG_OUTPUT_CRC_CNTL 0 0x5601 0 0 4294967295 mmDIG8_DIG_OUTPUT_CRC_CNTL 0 0x5701 0 0 4294967295 mmDIG_OUTPUT_CRC_RESULT 0 0x4a02 1 0 4294967295 DIG_OUTPUT_CRC_RESULT 0 29 mmDIG0_DIG_OUTPUT_CRC_RESULT 0 0x4a02 0 0 4294967295 mmDIG1_DIG_OUTPUT_CRC_RESULT 0 0x4b02 0 0 4294967295 mmDIG2_DIG_OUTPUT_CRC_RESULT 0 0x4c02 0 0 4294967295 mmDIG3_DIG_OUTPUT_CRC_RESULT 0 0x4d02 0 0 4294967295 mmDIG4_DIG_OUTPUT_CRC_RESULT 0 0x4e02 0 0 4294967295 mmDIG5_DIG_OUTPUT_CRC_RESULT 0 0x4f02 0 0 4294967295 mmDIG6_DIG_OUTPUT_CRC_RESULT 0 0x5402 0 0 4294967295 mmDIG7_DIG_OUTPUT_CRC_RESULT 0 0x5602 0 0 4294967295 mmDIG8_DIG_OUTPUT_CRC_RESULT 0 0x5702 0 0 4294967295 mmDIG_CLOCK_PATTERN 0 0x4a03 1 0 4294967295 DIG_CLOCK_PATTERN 0 9 mmDIG0_DIG_CLOCK_PATTERN 0 0x4a03 0 0 4294967295 mmDIG1_DIG_CLOCK_PATTERN 0 0x4b03 0 0 4294967295 mmDIG2_DIG_CLOCK_PATTERN 0 0x4c03 0 0 4294967295 mmDIG3_DIG_CLOCK_PATTERN 0 0x4d03 0 0 4294967295 mmDIG4_DIG_CLOCK_PATTERN 0 0x4e03 0 0 4294967295 mmDIG5_DIG_CLOCK_PATTERN 0 0x4f03 0 0 4294967295 mmDIG6_DIG_CLOCK_PATTERN 0 0x5403 0 0 4294967295 mmDIG7_DIG_CLOCK_PATTERN 0 0x5603 0 0 4294967295 mmDIG8_DIG_CLOCK_PATTERN 0 0x5703 0 0 4294967295 mmDIG_TEST_PATTERN 0 0x4a04 6 0 4294967295 DIG_TEST_PATTERN_OUT_EN 0 0 DIG_HALF_CLOCK_PATTERN_SEL 1 1 DIG_RANDOM_PATTERN_OUT_EN 4 4 DIG_RANDOM_PATTERN_RESET 5 5 DIG_TEST_PATTERN_EXTERNAL_RESET_EN 6 6 DIG_STATIC_TEST_PATTERN 16 25 mmDIG0_DIG_TEST_PATTERN 0 0x4a04 0 0 4294967295 mmDIG1_DIG_TEST_PATTERN 0 0x4b04 0 0 4294967295 mmDIG2_DIG_TEST_PATTERN 0 0x4c04 0 0 4294967295 mmDIG3_DIG_TEST_PATTERN 0 0x4d04 0 0 4294967295 mmDIG4_DIG_TEST_PATTERN 0 0x4e04 0 0 4294967295 mmDIG5_DIG_TEST_PATTERN 0 0x4f04 0 0 4294967295 mmDIG6_DIG_TEST_PATTERN 0 0x5404 0 0 4294967295 mmDIG7_DIG_TEST_PATTERN 0 0x5604 0 0 4294967295 mmDIG8_DIG_TEST_PATTERN 0 0x5704 0 0 4294967295 mmDIG_RANDOM_PATTERN_SEED 0 0x4a05 2 0 4294967295 DIG_RANDOM_PATTERN_SEED 0 23 DIG_RAN_PAT_DURING_DE_ONLY 24 24 mmDIG0_DIG_RANDOM_PATTERN_SEED 0 0x4a05 0 0 4294967295 mmDIG1_DIG_RANDOM_PATTERN_SEED 0 0x4b05 0 0 4294967295 mmDIG2_DIG_RANDOM_PATTERN_SEED 0 0x4c05 0 0 4294967295 mmDIG3_DIG_RANDOM_PATTERN_SEED 0 0x4d05 0 0 4294967295 mmDIG4_DIG_RANDOM_PATTERN_SEED 0 0x4e05 0 0 4294967295 mmDIG5_DIG_RANDOM_PATTERN_SEED 0 0x4f05 0 0 4294967295 mmDIG6_DIG_RANDOM_PATTERN_SEED 0 0x5405 0 0 4294967295 mmDIG7_DIG_RANDOM_PATTERN_SEED 0 0x5605 0 0 4294967295 mmDIG8_DIG_RANDOM_PATTERN_SEED 0 0x5705 0 0 4294967295 mmDIG_FIFO_STATUS 0 0x4a06 11 0 4294967295 DIG_FIFO_LEVEL_ERROR 0 0 DIG_FIFO_USE_OVERWRITE_LEVEL 1 1 DIG_FIFO_OVERWRITE_LEVEL 2 7 DIG_FIFO_ERROR_ACK 8 8 DIG_FIFO_CAL_AVERAGE_LEVEL 10 15 DIG_FIFO_MAXIMUM_LEVEL 16 20 DIG_FIFO_MINIMUM_LEVEL 22 25 DIG_FIFO_READ_CLOCK_SRC 26 26 DIG_FIFO_CALIBRATED 29 29 DIG_FIFO_FORCE_RECAL_AVERAGE 30 30 DIG_FIFO_FORCE_RECOMP_MINMAX 31 31 mmDIG0_DIG_FIFO_STATUS 0 0x4a06 0 0 4294967295 mmDIG1_DIG_FIFO_STATUS 0 0x4b06 0 0 4294967295 mmDIG2_DIG_FIFO_STATUS 0 0x4c06 0 0 4294967295 mmDIG3_DIG_FIFO_STATUS 0 0x4d06 0 0 4294967295 mmDIG4_DIG_FIFO_STATUS 0 0x4e06 0 0 4294967295 mmDIG5_DIG_FIFO_STATUS 0 0x4f06 0 0 4294967295 mmDIG6_DIG_FIFO_STATUS 0 0x5406 0 0 4294967295 mmDIG7_DIG_FIFO_STATUS 0 0x5606 0 0 4294967295 mmDIG8_DIG_FIFO_STATUS 0 0x5706 0 0 4294967295 mmDIG_DISPCLK_SWITCH_CNTL 0 0x4a07 1 0 4294967295 DIG_DISPCLK_SWITCH_POINT 0 0 mmDIG0_DIG_DISPCLK_SWITCH_CNTL 0 0x4a07 0 0 4294967295 mmDIG1_DIG_DISPCLK_SWITCH_CNTL 0 0x4b07 0 0 4294967295 mmDIG2_DIG_DISPCLK_SWITCH_CNTL 0 0x4c07 0 0 4294967295 mmDIG3_DIG_DISPCLK_SWITCH_CNTL 0 0x4d07 0 0 4294967295 mmDIG4_DIG_DISPCLK_SWITCH_CNTL 0 0x4e07 0 0 4294967295 mmDIG5_DIG_DISPCLK_SWITCH_CNTL 0 0x4f07 0 0 4294967295 mmDIG6_DIG_DISPCLK_SWITCH_CNTL 0 0x5407 0 0 4294967295 mmDIG7_DIG_DISPCLK_SWITCH_CNTL 0 0x5607 0 0 4294967295 mmDIG8_DIG_DISPCLK_SWITCH_CNTL 0 0x5707 0 0 4294967295 mmDIG_DISPCLK_SWITCH_STATUS 0 0x4a08 4 0 4294967295 DIG_DISPCLK_SWITCH_ALLOWED 0 0 DIG_DISPCLK_SWITCH_ALLOWED_INT 4 4 DIG_DISPCLK_SWITCH_ALLOWED_INT_ACK 8 8 DIG_DISPCLK_SWITCH_ALLOWED_INT_MASK 12 12 mmDIG0_DIG_DISPCLK_SWITCH_STATUS 0 0x4a08 0 0 4294967295 mmDIG1_DIG_DISPCLK_SWITCH_STATUS 0 0x4b08 0 0 4294967295 mmDIG2_DIG_DISPCLK_SWITCH_STATUS 0 0x4c08 0 0 4294967295 mmDIG3_DIG_DISPCLK_SWITCH_STATUS 0 0x4d08 0 0 4294967295 mmDIG4_DIG_DISPCLK_SWITCH_STATUS 0 0x4e08 0 0 4294967295 mmDIG5_DIG_DISPCLK_SWITCH_STATUS 0 0x4f08 0 0 4294967295 mmDIG6_DIG_DISPCLK_SWITCH_STATUS 0 0x5408 0 0 4294967295 mmDIG7_DIG_DISPCLK_SWITCH_STATUS 0 0x5608 0 0 4294967295 mmDIG8_DIG_DISPCLK_SWITCH_STATUS 0 0x5708 0 0 4294967295 mmHDMI_CONTROL 0 0x4a09 9 0 4294967295 HDMI_KEEPOUT_MODE 0 0 HDMI_DATA_SCRAMBLE_EN 1 1 HDMI_CLOCK_CHANNEL_RATE 2 2 HDMI_NO_EXTRA_NULL_PACKET_FILLED 3 3 HDMI_PACKET_GEN_VERSION 4 4 HDMI_ERROR_ACK 8 8 HDMI_ERROR_MASK 9 9 HDMI_DEEP_COLOR_ENABLE 24 24 HDMI_DEEP_COLOR_DEPTH 28 29 mmDIG0_HDMI_CONTROL 0 0x4a09 0 0 4294967295 mmDIG1_HDMI_CONTROL 0 0x4b09 0 0 4294967295 mmDIG2_HDMI_CONTROL 0 0x4c09 0 0 4294967295 mmDIG3_HDMI_CONTROL 0 0x4d09 0 0 4294967295 mmDIG4_HDMI_CONTROL 0 0x4e09 0 0 4294967295 mmDIG5_HDMI_CONTROL 0 0x4f09 0 0 4294967295 mmDIG6_HDMI_CONTROL 0 0x5409 0 0 4294967295 mmDIG7_HDMI_CONTROL 0 0x5609 0 0 4294967295 mmDIG8_HDMI_CONTROL 0 0x5709 0 0 4294967295 mmHDMI_STATUS 0 0x4a0a 4 0 4294967295 HDMI_ACTIVE_AVMUTE 0 0 HDMI_AUDIO_PACKET_ERROR 16 16 HDMI_VBI_PACKET_ERROR 20 20 HDMI_ERROR_INT 27 27 mmDIG0_HDMI_STATUS 0 0x4a0a 0 0 4294967295 mmDIG1_HDMI_STATUS 0 0x4b0a 0 0 4294967295 mmDIG2_HDMI_STATUS 0 0x4c0a 0 0 4294967295 mmDIG3_HDMI_STATUS 0 0x4d0a 0 0 4294967295 mmDIG4_HDMI_STATUS 0 0x4e0a 0 0 4294967295 mmDIG5_HDMI_STATUS 0 0x4f0a 0 0 4294967295 mmDIG6_HDMI_STATUS 0 0x540a 0 0 4294967295 mmDIG7_HDMI_STATUS 0 0x560a 0 0 4294967295 mmDIG8_HDMI_STATUS 0 0x570a 0 0 4294967295 mmHDMI_AUDIO_PACKET_CONTROL 0 0x4a0b 3 0 4294967295 HDMI_AUDIO_DELAY_EN 4 5 HDMI_AUDIO_SEND_MAX_PACKETS 8 8 HDMI_AUDIO_PACKETS_PER_LINE 16 20 mmDIG0_HDMI_AUDIO_PACKET_CONTROL 0 0x4a0b 0 0 4294967295 mmDIG1_HDMI_AUDIO_PACKET_CONTROL 0 0x4b0b 0 0 4294967295 mmDIG2_HDMI_AUDIO_PACKET_CONTROL 0 0x4c0b 0 0 4294967295 mmDIG3_HDMI_AUDIO_PACKET_CONTROL 0 0x4d0b 0 0 4294967295 mmDIG4_HDMI_AUDIO_PACKET_CONTROL 0 0x4e0b 0 0 4294967295 mmDIG5_HDMI_AUDIO_PACKET_CONTROL 0 0x4f0b 0 0 4294967295 mmDIG6_HDMI_AUDIO_PACKET_CONTROL 0 0x540b 0 0 4294967295 mmDIG7_HDMI_AUDIO_PACKET_CONTROL 0 0x560b 0 0 4294967295 mmDIG8_HDMI_AUDIO_PACKET_CONTROL 0 0x570b 0 0 4294967295 mmHDMI_ACR_PACKET_CONTROL 0 0x4a0c 7 0 4294967295 HDMI_ACR_SEND 0 0 HDMI_ACR_CONT 1 1 HDMI_ACR_SELECT 4 5 HDMI_ACR_SOURCE 8 8 HDMI_ACR_AUTO_SEND 12 12 HDMI_ACR_N_MULTIPLE 16 18 HDMI_ACR_AUDIO_PRIORITY 31 31 mmDIG0_HDMI_ACR_PACKET_CONTROL 0 0x4a0c 0 0 4294967295 mmDIG1_HDMI_ACR_PACKET_CONTROL 0 0x4b0c 0 0 4294967295 mmDIG2_HDMI_ACR_PACKET_CONTROL 0 0x4c0c 0 0 4294967295 mmDIG3_HDMI_ACR_PACKET_CONTROL 0 0x4d0c 0 0 4294967295 mmDIG4_HDMI_ACR_PACKET_CONTROL 0 0x4e0c 0 0 4294967295 mmDIG5_HDMI_ACR_PACKET_CONTROL 0 0x4f0c 0 0 4294967295 mmDIG6_HDMI_ACR_PACKET_CONTROL 0 0x540c 0 0 4294967295 mmDIG7_HDMI_ACR_PACKET_CONTROL 0 0x560c 0 0 4294967295 mmDIG8_HDMI_ACR_PACKET_CONTROL 0 0x570c 0 0 4294967295 mmHDMI_VBI_PACKET_CONTROL 0 0x4a0d 6 0 4294967295 HDMI_NULL_SEND 0 0 HDMI_GC_SEND 4 4 HDMI_GC_CONT 5 5 HDMI_ISRC_SEND 8 8 HDMI_ISRC_CONT 9 9 HDMI_ISRC_LINE 16 21 mmDIG0_HDMI_VBI_PACKET_CONTROL 0 0x4a0d 0 0 4294967295 mmDIG1_HDMI_VBI_PACKET_CONTROL 0 0x4b0d 0 0 4294967295 mmDIG2_HDMI_VBI_PACKET_CONTROL 0 0x4c0d 0 0 4294967295 mmDIG3_HDMI_VBI_PACKET_CONTROL 0 0x4d0d 0 0 4294967295 mmDIG4_HDMI_VBI_PACKET_CONTROL 0 0x4e0d 0 0 4294967295 mmDIG5_HDMI_VBI_PACKET_CONTROL 0 0x4f0d 0 0 4294967295 mmDIG6_HDMI_VBI_PACKET_CONTROL 0 0x540d 0 0 4294967295 mmDIG7_HDMI_VBI_PACKET_CONTROL 0 0x560d 0 0 4294967295 mmDIG8_HDMI_VBI_PACKET_CONTROL 0 0x570d 0 0 4294967295 mmHDMI_INFOFRAME_CONTROL0 0 0x4a0e 6 0 4294967295 HDMI_AVI_INFO_SEND 0 0 HDMI_AVI_INFO_CONT 1 1 HDMI_AUDIO_INFO_SEND 4 4 HDMI_AUDIO_INFO_CONT 5 5 HDMI_MPEG_INFO_SEND 8 8 HDMI_MPEG_INFO_CONT 9 9 mmDIG0_HDMI_INFOFRAME_CONTROL0 0 0x4a0e 0 0 4294967295 mmDIG1_HDMI_INFOFRAME_CONTROL0 0 0x4b0e 0 0 4294967295 mmDIG2_HDMI_INFOFRAME_CONTROL0 0 0x4c0e 0 0 4294967295 mmDIG3_HDMI_INFOFRAME_CONTROL0 0 0x4d0e 0 0 4294967295 mmDIG4_HDMI_INFOFRAME_CONTROL0 0 0x4e0e 0 0 4294967295 mmDIG5_HDMI_INFOFRAME_CONTROL0 0 0x4f0e 0 0 4294967295 mmDIG6_HDMI_INFOFRAME_CONTROL0 0 0x540e 0 0 4294967295 mmDIG7_HDMI_INFOFRAME_CONTROL0 0 0x560e 0 0 4294967295 mmDIG8_HDMI_INFOFRAME_CONTROL0 0 0x570e 0 0 4294967295 mmHDMI_INFOFRAME_CONTROL1 0 0x4a0f 3 0 4294967295 HDMI_AVI_INFO_LINE 0 5 HDMI_AUDIO_INFO_LINE 8 13 HDMI_MPEG_INFO_LINE 16 21 mmDIG0_HDMI_INFOFRAME_CONTROL1 0 0x4a0f 0 0 4294967295 mmDIG1_HDMI_INFOFRAME_CONTROL1 0 0x4b0f 0 0 4294967295 mmDIG2_HDMI_INFOFRAME_CONTROL1 0 0x4c0f 0 0 4294967295 mmDIG3_HDMI_INFOFRAME_CONTROL1 0 0x4d0f 0 0 4294967295 mmDIG4_HDMI_INFOFRAME_CONTROL1 0 0x4e0f 0 0 4294967295 mmDIG5_HDMI_INFOFRAME_CONTROL1 0 0x4f0f 0 0 4294967295 mmDIG6_HDMI_INFOFRAME_CONTROL1 0 0x540f 0 0 4294967295 mmDIG7_HDMI_INFOFRAME_CONTROL1 0 0x560f 0 0 4294967295 mmDIG8_HDMI_INFOFRAME_CONTROL1 0 0x570f 0 0 4294967295 mmHDMI_GENERIC_PACKET_CONTROL0 0 0x4a10 6 0 4294967295 HDMI_GENERIC0_SEND 0 0 HDMI_GENERIC0_CONT 1 1 HDMI_GENERIC1_SEND 4 4 HDMI_GENERIC1_CONT 5 5 HDMI_GENERIC0_LINE 16 21 HDMI_GENERIC1_LINE 24 29 mmDIG0_HDMI_GENERIC_PACKET_CONTROL0 0 0x4a10 0 0 4294967295 mmDIG1_HDMI_GENERIC_PACKET_CONTROL0 0 0x4b10 0 0 4294967295 mmDIG2_HDMI_GENERIC_PACKET_CONTROL0 0 0x4c10 0 0 4294967295 mmDIG3_HDMI_GENERIC_PACKET_CONTROL0 0 0x4d10 0 0 4294967295 mmDIG4_HDMI_GENERIC_PACKET_CONTROL0 0 0x4e10 0 0 4294967295 mmDIG5_HDMI_GENERIC_PACKET_CONTROL0 0 0x4f10 0 0 4294967295 mmDIG6_HDMI_GENERIC_PACKET_CONTROL0 0 0x5410 0 0 4294967295 mmDIG7_HDMI_GENERIC_PACKET_CONTROL0 0 0x5610 0 0 4294967295 mmDIG8_HDMI_GENERIC_PACKET_CONTROL0 0 0x5710 0 0 4294967295 mmAFMT_INTERRUPT_STATUS 0 0x4a11 0 0 4294967295 mmDIG0_AFMT_INTERRUPT_STATUS 0 0x4a11 0 0 4294967295 mmDIG1_AFMT_INTERRUPT_STATUS 0 0x4b11 0 0 4294967295 mmDIG2_AFMT_INTERRUPT_STATUS 0 0x4c11 0 0 4294967295 mmDIG3_AFMT_INTERRUPT_STATUS 0 0x4d11 0 0 4294967295 mmDIG4_AFMT_INTERRUPT_STATUS 0 0x4e11 0 0 4294967295 mmDIG5_AFMT_INTERRUPT_STATUS 0 0x4f11 0 0 4294967295 mmDIG6_AFMT_INTERRUPT_STATUS 0 0x5411 0 0 4294967295 mmDIG7_AFMT_INTERRUPT_STATUS 0 0x5611 0 0 4294967295 mmDIG8_AFMT_INTERRUPT_STATUS 0 0x5711 0 0 4294967295 mmHDMI_GC 0 0x4a13 5 0 4294967295 HDMI_GC_AVMUTE 0 0 HDMI_GC_AVMUTE_CONT 2 2 HDMI_DEFAULT_PHASE 4 4 HDMI_PACKING_PHASE 8 11 HDMI_PACKING_PHASE_OVERRIDE 12 12 mmDIG0_HDMI_GC 0 0x4a13 0 0 4294967295 mmDIG1_HDMI_GC 0 0x4b13 0 0 4294967295 mmDIG2_HDMI_GC 0 0x4c13 0 0 4294967295 mmDIG3_HDMI_GC 0 0x4d13 0 0 4294967295 mmDIG4_HDMI_GC 0 0x4e13 0 0 4294967295 mmDIG5_HDMI_GC 0 0x4f13 0 0 4294967295 mmDIG6_HDMI_GC 0 0x5413 0 0 4294967295 mmDIG7_HDMI_GC 0 0x5613 0 0 4294967295 mmDIG8_HDMI_GC 0 0x5713 0 0 4294967295 mmAFMT_AUDIO_PACKET_CONTROL2 0 0x4a14 6 0 4294967295 AFMT_AUDIO_LAYOUT_OVRD 0 0 AFMT_AUDIO_LAYOUT_SELECT 1 1 AFMT_AUDIO_CHANNEL_ENABLE 8 15 AFMT_DP_AUDIO_STREAM_ID 16 23 AFMT_HBR_ENABLE_OVRD 24 24 AFMT_60958_OSF_OVRD 28 28 mmDIG0_AFMT_AUDIO_PACKET_CONTROL2 0 0x4a14 0 0 4294967295 mmDIG1_AFMT_AUDIO_PACKET_CONTROL2 0 0x4b14 0 0 4294967295 mmDIG2_AFMT_AUDIO_PACKET_CONTROL2 0 0x4c14 0 0 4294967295 mmDIG3_AFMT_AUDIO_PACKET_CONTROL2 0 0x4d14 0 0 4294967295 mmDIG4_AFMT_AUDIO_PACKET_CONTROL2 0 0x4e14 0 0 4294967295 mmDIG5_AFMT_AUDIO_PACKET_CONTROL2 0 0x4f14 0 0 4294967295 mmDIG6_AFMT_AUDIO_PACKET_CONTROL2 0 0x5414 0 0 4294967295 mmDIG7_AFMT_AUDIO_PACKET_CONTROL2 0 0x5614 0 0 4294967295 mmDIG8_AFMT_AUDIO_PACKET_CONTROL2 0 0x5714 0 0 4294967295 mmAFMT_ISRC1_0 0 0x4a15 3 0 4294967295 AFMT_ISRC_STATUS 0 2 AFMT_ISRC_CONTINUE 6 6 AFMT_ISRC_VALID 7 7 mmDIG0_AFMT_ISRC1_0 0 0x4a15 0 0 4294967295 mmDIG1_AFMT_ISRC1_0 0 0x4b15 0 0 4294967295 mmDIG2_AFMT_ISRC1_0 0 0x4c15 0 0 4294967295 mmDIG3_AFMT_ISRC1_0 0 0x4d15 0 0 4294967295 mmDIG4_AFMT_ISRC1_0 0 0x4e15 0 0 4294967295 mmDIG5_AFMT_ISRC1_0 0 0x4f15 0 0 4294967295 mmDIG6_AFMT_ISRC1_0 0 0x5415 0 0 4294967295 mmDIG7_AFMT_ISRC1_0 0 0x5615 0 0 4294967295 mmDIG8_AFMT_ISRC1_0 0 0x5715 0 0 4294967295 mmAFMT_ISRC1_1 0 0x4a16 4 0 4294967295 AFMT_UPC_EAN_ISRC0 0 7 AFMT_UPC_EAN_ISRC1 8 15 AFMT_UPC_EAN_ISRC2 16 23 AFMT_UPC_EAN_ISRC3 24 31 mmDIG0_AFMT_ISRC1_1 0 0x4a16 0 0 4294967295 mmDIG1_AFMT_ISRC1_1 0 0x4b16 0 0 4294967295 mmDIG2_AFMT_ISRC1_1 0 0x4c16 0 0 4294967295 mmDIG3_AFMT_ISRC1_1 0 0x4d16 0 0 4294967295 mmDIG4_AFMT_ISRC1_1 0 0x4e16 0 0 4294967295 mmDIG5_AFMT_ISRC1_1 0 0x4f16 0 0 4294967295 mmDIG6_AFMT_ISRC1_1 0 0x5416 0 0 4294967295 mmDIG7_AFMT_ISRC1_1 0 0x5616 0 0 4294967295 mmDIG8_AFMT_ISRC1_1 0 0x5716 0 0 4294967295 mmAFMT_ISRC1_2 0 0x4a17 4 0 4294967295 AFMT_UPC_EAN_ISRC4 0 7 AFMT_UPC_EAN_ISRC5 8 15 AFMT_UPC_EAN_ISRC6 16 23 AFMT_UPC_EAN_ISRC7 24 31 mmDIG0_AFMT_ISRC1_2 0 0x4a17 0 0 4294967295 mmDIG1_AFMT_ISRC1_2 0 0x4b17 0 0 4294967295 mmDIG2_AFMT_ISRC1_2 0 0x4c17 0 0 4294967295 mmDIG3_AFMT_ISRC1_2 0 0x4d17 0 0 4294967295 mmDIG4_AFMT_ISRC1_2 0 0x4e17 0 0 4294967295 mmDIG5_AFMT_ISRC1_2 0 0x4f17 0 0 4294967295 mmDIG6_AFMT_ISRC1_2 0 0x5417 0 0 4294967295 mmDIG7_AFMT_ISRC1_2 0 0x5617 0 0 4294967295 mmDIG8_AFMT_ISRC1_2 0 0x5717 0 0 4294967295 mmAFMT_ISRC1_3 0 0x4a18 4 0 4294967295 AFMT_UPC_EAN_ISRC8 0 7 AFMT_UPC_EAN_ISRC9 8 15 AFMT_UPC_EAN_ISRC10 16 23 AFMT_UPC_EAN_ISRC11 24 31 mmDIG0_AFMT_ISRC1_3 0 0x4a18 0 0 4294967295 mmDIG1_AFMT_ISRC1_3 0 0x4b18 0 0 4294967295 mmDIG2_AFMT_ISRC1_3 0 0x4c18 0 0 4294967295 mmDIG3_AFMT_ISRC1_3 0 0x4d18 0 0 4294967295 mmDIG4_AFMT_ISRC1_3 0 0x4e18 0 0 4294967295 mmDIG5_AFMT_ISRC1_3 0 0x4f18 0 0 4294967295 mmDIG6_AFMT_ISRC1_3 0 0x5418 0 0 4294967295 mmDIG7_AFMT_ISRC1_3 0 0x5618 0 0 4294967295 mmDIG8_AFMT_ISRC1_3 0 0x5718 0 0 4294967295 mmAFMT_ISRC1_4 0 0x4a19 4 0 4294967295 AFMT_UPC_EAN_ISRC12 0 7 AFMT_UPC_EAN_ISRC13 8 15 AFMT_UPC_EAN_ISRC14 16 23 AFMT_UPC_EAN_ISRC15 24 31 mmDIG0_AFMT_ISRC1_4 0 0x4a19 0 0 4294967295 mmDIG1_AFMT_ISRC1_4 0 0x4b19 0 0 4294967295 mmDIG2_AFMT_ISRC1_4 0 0x4c19 0 0 4294967295 mmDIG3_AFMT_ISRC1_4 0 0x4d19 0 0 4294967295 mmDIG4_AFMT_ISRC1_4 0 0x4e19 0 0 4294967295 mmDIG5_AFMT_ISRC1_4 0 0x4f19 0 0 4294967295 mmDIG6_AFMT_ISRC1_4 0 0x5419 0 0 4294967295 mmDIG7_AFMT_ISRC1_4 0 0x5619 0 0 4294967295 mmDIG8_AFMT_ISRC1_4 0 0x5719 0 0 4294967295 mmAFMT_ISRC2_0 0 0x4a1a 4 0 4294967295 AFMT_UPC_EAN_ISRC16 0 7 AFMT_UPC_EAN_ISRC17 8 15 AFMT_UPC_EAN_ISRC18 16 23 AFMT_UPC_EAN_ISRC19 24 31 mmDIG0_AFMT_ISRC2_0 0 0x4a1a 0 0 4294967295 mmDIG1_AFMT_ISRC2_0 0 0x4b1a 0 0 4294967295 mmDIG2_AFMT_ISRC2_0 0 0x4c1a 0 0 4294967295 mmDIG3_AFMT_ISRC2_0 0 0x4d1a 0 0 4294967295 mmDIG4_AFMT_ISRC2_0 0 0x4e1a 0 0 4294967295 mmDIG5_AFMT_ISRC2_0 0 0x4f1a 0 0 4294967295 mmDIG6_AFMT_ISRC2_0 0 0x541a 0 0 4294967295 mmDIG7_AFMT_ISRC2_0 0 0x561a 0 0 4294967295 mmDIG8_AFMT_ISRC2_0 0 0x571a 0 0 4294967295 mmAFMT_ISRC2_1 0 0x4a1b 4 0 4294967295 AFMT_UPC_EAN_ISRC20 0 7 AFMT_UPC_EAN_ISRC21 8 15 AFMT_UPC_EAN_ISRC22 16 23 AFMT_UPC_EAN_ISRC23 24 31 mmDIG0_AFMT_ISRC2_1 0 0x4a1b 0 0 4294967295 mmDIG1_AFMT_ISRC2_1 0 0x4b1b 0 0 4294967295 mmDIG2_AFMT_ISRC2_1 0 0x4c1b 0 0 4294967295 mmDIG3_AFMT_ISRC2_1 0 0x4d1b 0 0 4294967295 mmDIG4_AFMT_ISRC2_1 0 0x4e1b 0 0 4294967295 mmDIG5_AFMT_ISRC2_1 0 0x4f1b 0 0 4294967295 mmDIG6_AFMT_ISRC2_1 0 0x541b 0 0 4294967295 mmDIG7_AFMT_ISRC2_1 0 0x561b 0 0 4294967295 mmDIG8_AFMT_ISRC2_1 0 0x571b 0 0 4294967295 mmAFMT_ISRC2_2 0 0x4a1c 4 0 4294967295 AFMT_UPC_EAN_ISRC24 0 7 AFMT_UPC_EAN_ISRC25 8 15 AFMT_UPC_EAN_ISRC26 16 23 AFMT_UPC_EAN_ISRC27 24 31 mmDIG0_AFMT_ISRC2_2 0 0x4a1c 0 0 4294967295 mmDIG1_AFMT_ISRC2_2 0 0x4b1c 0 0 4294967295 mmDIG2_AFMT_ISRC2_2 0 0x4c1c 0 0 4294967295 mmDIG3_AFMT_ISRC2_2 0 0x4d1c 0 0 4294967295 mmDIG4_AFMT_ISRC2_2 0 0x4e1c 0 0 4294967295 mmDIG5_AFMT_ISRC2_2 0 0x4f1c 0 0 4294967295 mmDIG6_AFMT_ISRC2_2 0 0x541c 0 0 4294967295 mmDIG7_AFMT_ISRC2_2 0 0x561c 0 0 4294967295 mmDIG8_AFMT_ISRC2_2 0 0x571c 0 0 4294967295 mmAFMT_ISRC2_3 0 0x4a1d 4 0 4294967295 AFMT_UPC_EAN_ISRC28 0 7 AFMT_UPC_EAN_ISRC29 8 15 AFMT_UPC_EAN_ISRC30 16 23 AFMT_UPC_EAN_ISRC31 24 31 mmDIG0_AFMT_ISRC2_3 0 0x4a1d 0 0 4294967295 mmDIG1_AFMT_ISRC2_3 0 0x4b1d 0 0 4294967295 mmDIG2_AFMT_ISRC2_3 0 0x4c1d 0 0 4294967295 mmDIG3_AFMT_ISRC2_3 0 0x4d1d 0 0 4294967295 mmDIG4_AFMT_ISRC2_3 0 0x4e1d 0 0 4294967295 mmDIG5_AFMT_ISRC2_3 0 0x4f1d 0 0 4294967295 mmDIG6_AFMT_ISRC2_3 0 0x541d 0 0 4294967295 mmDIG7_AFMT_ISRC2_3 0 0x561d 0 0 4294967295 mmDIG8_AFMT_ISRC2_3 0 0x571d 0 0 4294967295 mmAFMT_AVI_INFO0 0 0x4a1e 12 0 4294967295 AFMT_AVI_INFO_CHECKSUM 0 7 AFMT_AVI_INFO_S 8 9 AFMT_AVI_INFO_B 10 11 AFMT_AVI_INFO_A 12 12 AFMT_AVI_INFO_Y 13 15 AFMT_AVI_INFO_R 16 19 AFMT_AVI_INFO_M 20 21 AFMT_AVI_INFO_C 22 23 AFMT_AVI_INFO_SC 24 25 AFMT_AVI_INFO_Q 26 27 AFMT_AVI_INFO_EC 28 30 AFMT_AVI_INFO_ITC 31 31 mmDIG0_AFMT_AVI_INFO0 0 0x4a1e 0 0 4294967295 mmDIG1_AFMT_AVI_INFO0 0 0x4b1e 0 0 4294967295 mmDIG2_AFMT_AVI_INFO0 0 0x4c1e 0 0 4294967295 mmDIG3_AFMT_AVI_INFO0 0 0x4d1e 0 0 4294967295 mmDIG4_AFMT_AVI_INFO0 0 0x4e1e 0 0 4294967295 mmDIG5_AFMT_AVI_INFO0 0 0x4f1e 0 0 4294967295 mmDIG6_AFMT_AVI_INFO0 0 0x541e 0 0 4294967295 mmDIG7_AFMT_AVI_INFO0 0 0x561e 0 0 4294967295 mmDIG8_AFMT_AVI_INFO0 0 0x571e 0 0 4294967295 mmAFMT_AVI_INFO1 0 0x4a1f 5 0 4294967295 AFMT_AVI_INFO_VIC 0 7 AFMT_AVI_INFO_PR 8 11 AFMT_AVI_INFO_CN 12 13 AFMT_AVI_INFO_YQ 14 15 AFMT_AVI_INFO_TOP 16 31 mmDIG0_AFMT_AVI_INFO1 0 0x4a1f 0 0 4294967295 mmDIG1_AFMT_AVI_INFO1 0 0x4b1f 0 0 4294967295 mmDIG2_AFMT_AVI_INFO1 0 0x4c1f 0 0 4294967295 mmDIG3_AFMT_AVI_INFO1 0 0x4d1f 0 0 4294967295 mmDIG4_AFMT_AVI_INFO1 0 0x4e1f 0 0 4294967295 mmDIG5_AFMT_AVI_INFO1 0 0x4f1f 0 0 4294967295 mmDIG6_AFMT_AVI_INFO1 0 0x541f 0 0 4294967295 mmDIG7_AFMT_AVI_INFO1 0 0x561f 0 0 4294967295 mmDIG8_AFMT_AVI_INFO1 0 0x571f 0 0 4294967295 mmAFMT_AVI_INFO2 0 0x4a20 2 0 4294967295 AFMT_AVI_INFO_BOTTOM 0 15 AFMT_AVI_INFO_LEFT 16 31 mmDIG0_AFMT_AVI_INFO2 0 0x4a20 0 0 4294967295 mmDIG1_AFMT_AVI_INFO2 0 0x4b20 0 0 4294967295 mmDIG2_AFMT_AVI_INFO2 0 0x4c20 0 0 4294967295 mmDIG3_AFMT_AVI_INFO2 0 0x4d20 0 0 4294967295 mmDIG4_AFMT_AVI_INFO2 0 0x4e20 0 0 4294967295 mmDIG5_AFMT_AVI_INFO2 0 0x4f20 0 0 4294967295 mmDIG6_AFMT_AVI_INFO2 0 0x5420 0 0 4294967295 mmDIG7_AFMT_AVI_INFO2 0 0x5620 0 0 4294967295 mmDIG8_AFMT_AVI_INFO2 0 0x5720 0 0 4294967295 mmAFMT_AVI_INFO3 0 0x4a21 2 0 4294967295 AFMT_AVI_INFO_RIGHT 0 15 AFMT_AVI_INFO_VERSION 24 31 mmDIG0_AFMT_AVI_INFO3 0 0x4a21 0 0 4294967295 mmDIG1_AFMT_AVI_INFO3 0 0x4b21 0 0 4294967295 mmDIG2_AFMT_AVI_INFO3 0 0x4c21 0 0 4294967295 mmDIG3_AFMT_AVI_INFO3 0 0x4d21 0 0 4294967295 mmDIG4_AFMT_AVI_INFO3 0 0x4e21 0 0 4294967295 mmDIG5_AFMT_AVI_INFO3 0 0x4f21 0 0 4294967295 mmDIG6_AFMT_AVI_INFO3 0 0x5421 0 0 4294967295 mmDIG7_AFMT_AVI_INFO3 0 0x5621 0 0 4294967295 mmDIG8_AFMT_AVI_INFO3 0 0x5721 0 0 4294967295 mmAFMT_MPEG_INFO0 0 0x4a22 4 0 4294967295 AFMT_MPEG_INFO_CHECKSUM 0 7 AFMT_MPEG_INFO_MB0 8 15 AFMT_MPEG_INFO_MB1 16 23 AFMT_MPEG_INFO_MB2 24 31 mmDIG0_AFMT_MPEG_INFO0 0 0x4a22 0 0 4294967295 mmDIG1_AFMT_MPEG_INFO0 0 0x4b22 0 0 4294967295 mmDIG2_AFMT_MPEG_INFO0 0 0x4c22 0 0 4294967295 mmDIG3_AFMT_MPEG_INFO0 0 0x4d22 0 0 4294967295 mmDIG4_AFMT_MPEG_INFO0 0 0x4e22 0 0 4294967295 mmDIG5_AFMT_MPEG_INFO0 0 0x4f22 0 0 4294967295 mmDIG6_AFMT_MPEG_INFO0 0 0x5422 0 0 4294967295 mmDIG7_AFMT_MPEG_INFO0 0 0x5622 0 0 4294967295 mmDIG8_AFMT_MPEG_INFO0 0 0x5722 0 0 4294967295 mmAFMT_MPEG_INFO1 0 0x4a23 3 0 4294967295 AFMT_MPEG_INFO_MB3 0 7 AFMT_MPEG_INFO_MF 8 9 AFMT_MPEG_INFO_FR 12 12 mmDIG0_AFMT_MPEG_INFO1 0 0x4a23 0 0 4294967295 mmDIG1_AFMT_MPEG_INFO1 0 0x4b23 0 0 4294967295 mmDIG2_AFMT_MPEG_INFO1 0 0x4c23 0 0 4294967295 mmDIG3_AFMT_MPEG_INFO1 0 0x4d23 0 0 4294967295 mmDIG4_AFMT_MPEG_INFO1 0 0x4e23 0 0 4294967295 mmDIG5_AFMT_MPEG_INFO1 0 0x4f23 0 0 4294967295 mmDIG6_AFMT_MPEG_INFO1 0 0x5423 0 0 4294967295 mmDIG7_AFMT_MPEG_INFO1 0 0x5623 0 0 4294967295 mmDIG8_AFMT_MPEG_INFO1 0 0x5723 0 0 4294967295 mmAFMT_GENERIC_HDR 0 0x4a24 4 0 4294967295 AFMT_GENERIC_HB0 0 7 AFMT_GENERIC_HB1 8 15 AFMT_GENERIC_HB2 16 23 AFMT_GENERIC_HB3 24 31 mmDIG0_AFMT_GENERIC_HDR 0 0x4a24 0 0 4294967295 mmDIG1_AFMT_GENERIC_HDR 0 0x4b24 0 0 4294967295 mmDIG2_AFMT_GENERIC_HDR 0 0x4c24 0 0 4294967295 mmDIG3_AFMT_GENERIC_HDR 0 0x4d24 0 0 4294967295 mmDIG4_AFMT_GENERIC_HDR 0 0x4e24 0 0 4294967295 mmDIG5_AFMT_GENERIC_HDR 0 0x4f24 0 0 4294967295 mmDIG6_AFMT_GENERIC_HDR 0 0x5424 0 0 4294967295 mmDIG7_AFMT_GENERIC_HDR 0 0x5624 0 0 4294967295 mmDIG8_AFMT_GENERIC_HDR 0 0x5724 0 0 4294967295 mmAFMT_GENERIC_0 0 0x4a25 4 0 4294967295 AFMT_GENERIC_BYTE0 0 7 AFMT_GENERIC_BYTE1 8 15 AFMT_GENERIC_BYTE2 16 23 AFMT_GENERIC_BYTE3 24 31 mmDIG0_AFMT_GENERIC_0 0 0x4a25 0 0 4294967295 mmDIG1_AFMT_GENERIC_0 0 0x4b25 0 0 4294967295 mmDIG2_AFMT_GENERIC_0 0 0x4c25 0 0 4294967295 mmDIG3_AFMT_GENERIC_0 0 0x4d25 0 0 4294967295 mmDIG4_AFMT_GENERIC_0 0 0x4e25 0 0 4294967295 mmDIG5_AFMT_GENERIC_0 0 0x4f25 0 0 4294967295 mmDIG6_AFMT_GENERIC_0 0 0x5425 0 0 4294967295 mmDIG7_AFMT_GENERIC_0 0 0x5625 0 0 4294967295 mmDIG8_AFMT_GENERIC_0 0 0x5725 0 0 4294967295 mmAFMT_GENERIC_1 0 0x4a26 4 0 4294967295 AFMT_GENERIC_BYTE4 0 7 AFMT_GENERIC_BYTE5 8 15 AFMT_GENERIC_BYTE6 16 23 AFMT_GENERIC_BYTE7 24 31 mmDIG0_AFMT_GENERIC_1 0 0x4a26 0 0 4294967295 mmDIG1_AFMT_GENERIC_1 0 0x4b26 0 0 4294967295 mmDIG2_AFMT_GENERIC_1 0 0x4c26 0 0 4294967295 mmDIG3_AFMT_GENERIC_1 0 0x4d26 0 0 4294967295 mmDIG4_AFMT_GENERIC_1 0 0x4e26 0 0 4294967295 mmDIG5_AFMT_GENERIC_1 0 0x4f26 0 0 4294967295 mmDIG6_AFMT_GENERIC_1 0 0x5426 0 0 4294967295 mmDIG7_AFMT_GENERIC_1 0 0x5626 0 0 4294967295 mmDIG8_AFMT_GENERIC_1 0 0x5726 0 0 4294967295 mmAFMT_GENERIC_2 0 0x4a27 4 0 4294967295 AFMT_GENERIC_BYTE8 0 7 AFMT_GENERIC_BYTE9 8 15 AFMT_GENERIC_BYTE10 16 23 AFMT_GENERIC_BYTE11 24 31 mmDIG0_AFMT_GENERIC_2 0 0x4a27 0 0 4294967295 mmDIG1_AFMT_GENERIC_2 0 0x4b27 0 0 4294967295 mmDIG2_AFMT_GENERIC_2 0 0x4c27 0 0 4294967295 mmDIG3_AFMT_GENERIC_2 0 0x4d27 0 0 4294967295 mmDIG4_AFMT_GENERIC_2 0 0x4e27 0 0 4294967295 mmDIG5_AFMT_GENERIC_2 0 0x4f27 0 0 4294967295 mmDIG6_AFMT_GENERIC_2 0 0x5427 0 0 4294967295 mmDIG7_AFMT_GENERIC_2 0 0x5627 0 0 4294967295 mmDIG8_AFMT_GENERIC_2 0 0x5727 0 0 4294967295 mmAFMT_GENERIC_3 0 0x4a28 4 0 4294967295 AFMT_GENERIC_BYTE12 0 7 AFMT_GENERIC_BYTE13 8 15 AFMT_GENERIC_BYTE14 16 23 AFMT_GENERIC_BYTE15 24 31 mmDIG0_AFMT_GENERIC_3 0 0x4a28 0 0 4294967295 mmDIG1_AFMT_GENERIC_3 0 0x4b28 0 0 4294967295 mmDIG2_AFMT_GENERIC_3 0 0x4c28 0 0 4294967295 mmDIG3_AFMT_GENERIC_3 0 0x4d28 0 0 4294967295 mmDIG4_AFMT_GENERIC_3 0 0x4e28 0 0 4294967295 mmDIG5_AFMT_GENERIC_3 0 0x4f28 0 0 4294967295 mmDIG6_AFMT_GENERIC_3 0 0x5428 0 0 4294967295 mmDIG7_AFMT_GENERIC_3 0 0x5628 0 0 4294967295 mmDIG8_AFMT_GENERIC_3 0 0x5728 0 0 4294967295 mmAFMT_GENERIC_4 0 0x4a29 4 0 4294967295 AFMT_GENERIC_BYTE16 0 7 AFMT_GENERIC_BYTE17 8 15 AFMT_GENERIC_BYTE18 16 23 AFMT_GENERIC_BYTE19 24 31 mmDIG0_AFMT_GENERIC_4 0 0x4a29 0 0 4294967295 mmDIG1_AFMT_GENERIC_4 0 0x4b29 0 0 4294967295 mmDIG2_AFMT_GENERIC_4 0 0x4c29 0 0 4294967295 mmDIG3_AFMT_GENERIC_4 0 0x4d29 0 0 4294967295 mmDIG4_AFMT_GENERIC_4 0 0x4e29 0 0 4294967295 mmDIG5_AFMT_GENERIC_4 0 0x4f29 0 0 4294967295 mmDIG6_AFMT_GENERIC_4 0 0x5429 0 0 4294967295 mmDIG7_AFMT_GENERIC_4 0 0x5629 0 0 4294967295 mmDIG8_AFMT_GENERIC_4 0 0x5729 0 0 4294967295 mmAFMT_GENERIC_5 0 0x4a2a 4 0 4294967295 AFMT_GENERIC_BYTE20 0 7 AFMT_GENERIC_BYTE21 8 15 AFMT_GENERIC_BYTE22 16 23 AFMT_GENERIC_BYTE23 24 31 mmDIG0_AFMT_GENERIC_5 0 0x4a2a 0 0 4294967295 mmDIG1_AFMT_GENERIC_5 0 0x4b2a 0 0 4294967295 mmDIG2_AFMT_GENERIC_5 0 0x4c2a 0 0 4294967295 mmDIG3_AFMT_GENERIC_5 0 0x4d2a 0 0 4294967295 mmDIG4_AFMT_GENERIC_5 0 0x4e2a 0 0 4294967295 mmDIG5_AFMT_GENERIC_5 0 0x4f2a 0 0 4294967295 mmDIG6_AFMT_GENERIC_5 0 0x542a 0 0 4294967295 mmDIG7_AFMT_GENERIC_5 0 0x562a 0 0 4294967295 mmDIG8_AFMT_GENERIC_5 0 0x572a 0 0 4294967295 mmAFMT_GENERIC_6 0 0x4a2b 4 0 4294967295 AFMT_GENERIC_BYTE24 0 7 AFMT_GENERIC_BYTE25 8 15 AFMT_GENERIC_BYTE26 16 23 AFMT_GENERIC_BYTE27 24 31 mmDIG0_AFMT_GENERIC_6 0 0x4a2b 0 0 4294967295 mmDIG1_AFMT_GENERIC_6 0 0x4b2b 0 0 4294967295 mmDIG2_AFMT_GENERIC_6 0 0x4c2b 0 0 4294967295 mmDIG3_AFMT_GENERIC_6 0 0x4d2b 0 0 4294967295 mmDIG4_AFMT_GENERIC_6 0 0x4e2b 0 0 4294967295 mmDIG5_AFMT_GENERIC_6 0 0x4f2b 0 0 4294967295 mmDIG6_AFMT_GENERIC_6 0 0x542b 0 0 4294967295 mmDIG7_AFMT_GENERIC_6 0 0x562b 0 0 4294967295 mmDIG8_AFMT_GENERIC_6 0 0x572b 0 0 4294967295 mmAFMT_GENERIC_7 0 0x4a2c 4 0 4294967295 AFMT_GENERIC_BYTE28 0 7 AFMT_GENERIC_BYTE29 8 15 AFMT_GENERIC_BYTE30 16 23 AFMT_GENERIC_BYTE31 24 31 mmDIG0_AFMT_GENERIC_7 0 0x4a2c 0 0 4294967295 mmDIG1_AFMT_GENERIC_7 0 0x4b2c 0 0 4294967295 mmDIG2_AFMT_GENERIC_7 0 0x4c2c 0 0 4294967295 mmDIG3_AFMT_GENERIC_7 0 0x4d2c 0 0 4294967295 mmDIG4_AFMT_GENERIC_7 0 0x4e2c 0 0 4294967295 mmDIG5_AFMT_GENERIC_7 0 0x4f2c 0 0 4294967295 mmDIG6_AFMT_GENERIC_7 0 0x542c 0 0 4294967295 mmDIG7_AFMT_GENERIC_7 0 0x562c 0 0 4294967295 mmDIG8_AFMT_GENERIC_7 0 0x572c 0 0 4294967295 mmHDMI_GENERIC_PACKET_CONTROL1 0 0x4a2d 6 0 4294967295 HDMI_GENERIC2_SEND 0 0 HDMI_GENERIC2_CONT 1 1 HDMI_GENERIC3_SEND 4 4 HDMI_GENERIC3_CONT 5 5 HDMI_GENERIC2_LINE 16 21 HDMI_GENERIC3_LINE 24 29 mmDIG0_HDMI_GENERIC_PACKET_CONTROL1 0 0x4a2d 0 0 4294967295 mmDIG1_HDMI_GENERIC_PACKET_CONTROL1 0 0x4b2d 0 0 4294967295 mmDIG2_HDMI_GENERIC_PACKET_CONTROL1 0 0x4c2d 0 0 4294967295 mmDIG3_HDMI_GENERIC_PACKET_CONTROL1 0 0x4d2d 0 0 4294967295 mmDIG4_HDMI_GENERIC_PACKET_CONTROL1 0 0x4e2d 0 0 4294967295 mmDIG5_HDMI_GENERIC_PACKET_CONTROL1 0 0x4f2d 0 0 4294967295 mmDIG6_HDMI_GENERIC_PACKET_CONTROL1 0 0x542d 0 0 4294967295 mmDIG7_HDMI_GENERIC_PACKET_CONTROL1 0 0x562d 0 0 4294967295 mmDIG8_HDMI_GENERIC_PACKET_CONTROL1 0 0x572d 0 0 4294967295 mmHDMI_ACR_32_0 0 0x4a2e 1 0 4294967295 HDMI_ACR_CTS_32 12 31 mmDIG0_HDMI_ACR_32_0 0 0x4a2e 0 0 4294967295 mmDIG1_HDMI_ACR_32_0 0 0x4b2e 0 0 4294967295 mmDIG2_HDMI_ACR_32_0 0 0x4c2e 0 0 4294967295 mmDIG3_HDMI_ACR_32_0 0 0x4d2e 0 0 4294967295 mmDIG4_HDMI_ACR_32_0 0 0x4e2e 0 0 4294967295 mmDIG5_HDMI_ACR_32_0 0 0x4f2e 0 0 4294967295 mmDIG6_HDMI_ACR_32_0 0 0x542e 0 0 4294967295 mmDIG7_HDMI_ACR_32_0 0 0x562e 0 0 4294967295 mmDIG8_HDMI_ACR_32_0 0 0x572e 0 0 4294967295 mmHDMI_ACR_32_1 0 0x4a2f 1 0 4294967295 HDMI_ACR_N_32 0 19 mmDIG0_HDMI_ACR_32_1 0 0x4a2f 0 0 4294967295 mmDIG1_HDMI_ACR_32_1 0 0x4b2f 0 0 4294967295 mmDIG2_HDMI_ACR_32_1 0 0x4c2f 0 0 4294967295 mmDIG3_HDMI_ACR_32_1 0 0x4d2f 0 0 4294967295 mmDIG4_HDMI_ACR_32_1 0 0x4e2f 0 0 4294967295 mmDIG5_HDMI_ACR_32_1 0 0x4f2f 0 0 4294967295 mmDIG6_HDMI_ACR_32_1 0 0x542f 0 0 4294967295 mmDIG7_HDMI_ACR_32_1 0 0x562f 0 0 4294967295 mmDIG8_HDMI_ACR_32_1 0 0x572f 0 0 4294967295 mmHDMI_ACR_44_0 0 0x4a30 1 0 4294967295 HDMI_ACR_CTS_44 12 31 mmDIG0_HDMI_ACR_44_0 0 0x4a30 0 0 4294967295 mmDIG1_HDMI_ACR_44_0 0 0x4b30 0 0 4294967295 mmDIG2_HDMI_ACR_44_0 0 0x4c30 0 0 4294967295 mmDIG3_HDMI_ACR_44_0 0 0x4d30 0 0 4294967295 mmDIG4_HDMI_ACR_44_0 0 0x4e30 0 0 4294967295 mmDIG5_HDMI_ACR_44_0 0 0x4f30 0 0 4294967295 mmDIG6_HDMI_ACR_44_0 0 0x5430 0 0 4294967295 mmDIG7_HDMI_ACR_44_0 0 0x5630 0 0 4294967295 mmDIG8_HDMI_ACR_44_0 0 0x5730 0 0 4294967295 mmHDMI_ACR_44_1 0 0x4a31 1 0 4294967295 HDMI_ACR_N_44 0 19 mmDIG0_HDMI_ACR_44_1 0 0x4a31 0 0 4294967295 mmDIG1_HDMI_ACR_44_1 0 0x4b31 0 0 4294967295 mmDIG2_HDMI_ACR_44_1 0 0x4c31 0 0 4294967295 mmDIG3_HDMI_ACR_44_1 0 0x4d31 0 0 4294967295 mmDIG4_HDMI_ACR_44_1 0 0x4e31 0 0 4294967295 mmDIG5_HDMI_ACR_44_1 0 0x4f31 0 0 4294967295 mmDIG6_HDMI_ACR_44_1 0 0x5431 0 0 4294967295 mmDIG7_HDMI_ACR_44_1 0 0x5631 0 0 4294967295 mmDIG8_HDMI_ACR_44_1 0 0x5731 0 0 4294967295 mmHDMI_ACR_48_0 0 0x4a32 1 0 4294967295 HDMI_ACR_CTS_48 12 31 mmDIG0_HDMI_ACR_48_0 0 0x4a32 0 0 4294967295 mmDIG1_HDMI_ACR_48_0 0 0x4b32 0 0 4294967295 mmDIG2_HDMI_ACR_48_0 0 0x4c32 0 0 4294967295 mmDIG3_HDMI_ACR_48_0 0 0x4d32 0 0 4294967295 mmDIG4_HDMI_ACR_48_0 0 0x4e32 0 0 4294967295 mmDIG5_HDMI_ACR_48_0 0 0x4f32 0 0 4294967295 mmDIG6_HDMI_ACR_48_0 0 0x5432 0 0 4294967295 mmDIG7_HDMI_ACR_48_0 0 0x5632 0 0 4294967295 mmDIG8_HDMI_ACR_48_0 0 0x5732 0 0 4294967295 mmHDMI_ACR_48_1 0 0x4a33 1 0 4294967295 HDMI_ACR_N_48 0 19 mmDIG0_HDMI_ACR_48_1 0 0x4a33 0 0 4294967295 mmDIG1_HDMI_ACR_48_1 0 0x4b33 0 0 4294967295 mmDIG2_HDMI_ACR_48_1 0 0x4c33 0 0 4294967295 mmDIG3_HDMI_ACR_48_1 0 0x4d33 0 0 4294967295 mmDIG4_HDMI_ACR_48_1 0 0x4e33 0 0 4294967295 mmDIG5_HDMI_ACR_48_1 0 0x4f33 0 0 4294967295 mmDIG6_HDMI_ACR_48_1 0 0x5433 0 0 4294967295 mmDIG7_HDMI_ACR_48_1 0 0x5633 0 0 4294967295 mmDIG8_HDMI_ACR_48_1 0 0x5733 0 0 4294967295 mmHDMI_ACR_STATUS_0 0 0x4a34 1 0 4294967295 HDMI_ACR_CTS 12 31 mmDIG0_HDMI_ACR_STATUS_0 0 0x4a34 0 0 4294967295 mmDIG1_HDMI_ACR_STATUS_0 0 0x4b34 0 0 4294967295 mmDIG2_HDMI_ACR_STATUS_0 0 0x4c34 0 0 4294967295 mmDIG3_HDMI_ACR_STATUS_0 0 0x4d34 0 0 4294967295 mmDIG4_HDMI_ACR_STATUS_0 0 0x4e34 0 0 4294967295 mmDIG5_HDMI_ACR_STATUS_0 0 0x4f34 0 0 4294967295 mmDIG6_HDMI_ACR_STATUS_0 0 0x5434 0 0 4294967295 mmDIG7_HDMI_ACR_STATUS_0 0 0x5634 0 0 4294967295 mmDIG8_HDMI_ACR_STATUS_0 0 0x5734 0 0 4294967295 mmHDMI_ACR_STATUS_1 0 0x4a35 1 0 4294967295 HDMI_ACR_N 0 19 mmDIG0_HDMI_ACR_STATUS_1 0 0x4a35 0 0 4294967295 mmDIG1_HDMI_ACR_STATUS_1 0 0x4b35 0 0 4294967295 mmDIG2_HDMI_ACR_STATUS_1 0 0x4c35 0 0 4294967295 mmDIG3_HDMI_ACR_STATUS_1 0 0x4d35 0 0 4294967295 mmDIG4_HDMI_ACR_STATUS_1 0 0x4e35 0 0 4294967295 mmDIG5_HDMI_ACR_STATUS_1 0 0x4f35 0 0 4294967295 mmDIG6_HDMI_ACR_STATUS_1 0 0x5435 0 0 4294967295 mmDIG7_HDMI_ACR_STATUS_1 0 0x5635 0 0 4294967295 mmDIG8_HDMI_ACR_STATUS_1 0 0x5735 0 0 4294967295 mmAFMT_AUDIO_INFO0 0 0x4a36 5 0 4294967295 AFMT_AUDIO_INFO_CHECKSUM 0 7 AFMT_AUDIO_INFO_CC 8 10 AFMT_AUDIO_INFO_CT 11 14 AFMT_AUDIO_INFO_CHECKSUM_OFFSET 16 23 AFMT_AUDIO_INFO_CXT 24 28 mmDIG0_AFMT_AUDIO_INFO0 0 0x4a36 0 0 4294967295 mmDIG1_AFMT_AUDIO_INFO0 0 0x4b36 0 0 4294967295 mmDIG2_AFMT_AUDIO_INFO0 0 0x4c36 0 0 4294967295 mmDIG3_AFMT_AUDIO_INFO0 0 0x4d36 0 0 4294967295 mmDIG4_AFMT_AUDIO_INFO0 0 0x4e36 0 0 4294967295 mmDIG5_AFMT_AUDIO_INFO0 0 0x4f36 0 0 4294967295 mmDIG6_AFMT_AUDIO_INFO0 0 0x5436 0 0 4294967295 mmDIG7_AFMT_AUDIO_INFO0 0 0x5636 0 0 4294967295 mmDIG8_AFMT_AUDIO_INFO0 0 0x5736 0 0 4294967295 mmAFMT_AUDIO_INFO1 0 0x4a37 4 0 4294967295 AFMT_AUDIO_INFO_CA 0 7 AFMT_AUDIO_INFO_LSV 11 14 AFMT_AUDIO_INFO_DM_INH 15 15 AFMT_AUDIO_INFO_LFEPBL 16 17 mmDIG0_AFMT_AUDIO_INFO1 0 0x4a37 0 0 4294967295 mmDIG1_AFMT_AUDIO_INFO1 0 0x4b37 0 0 4294967295 mmDIG2_AFMT_AUDIO_INFO1 0 0x4c37 0 0 4294967295 mmDIG3_AFMT_AUDIO_INFO1 0 0x4d37 0 0 4294967295 mmDIG4_AFMT_AUDIO_INFO1 0 0x4e37 0 0 4294967295 mmDIG5_AFMT_AUDIO_INFO1 0 0x4f37 0 0 4294967295 mmDIG6_AFMT_AUDIO_INFO1 0 0x5437 0 0 4294967295 mmDIG7_AFMT_AUDIO_INFO1 0 0x5637 0 0 4294967295 mmDIG8_AFMT_AUDIO_INFO1 0 0x5737 0 0 4294967295 mmAFMT_60958_0 0 0x4a38 10 0 4294967295 AFMT_60958_CS_A 0 0 AFMT_60958_CS_B 1 1 AFMT_60958_CS_C 2 2 AFMT_60958_CS_D 3 5 AFMT_60958_CS_MODE 6 7 AFMT_60958_CS_CATEGORY_CODE 8 15 AFMT_60958_CS_SOURCE_NUMBER 16 19 AFMT_60958_CS_CHANNEL_NUMBER_L 20 23 AFMT_60958_CS_SAMPLING_FREQUENCY 24 27 AFMT_60958_CS_CLOCK_ACCURACY 28 29 mmDIG0_AFMT_60958_0 0 0x4a38 0 0 4294967295 mmDIG1_AFMT_60958_0 0 0x4b38 0 0 4294967295 mmDIG2_AFMT_60958_0 0 0x4c38 0 0 4294967295 mmDIG3_AFMT_60958_0 0 0x4d38 0 0 4294967295 mmDIG4_AFMT_60958_0 0 0x4e38 0 0 4294967295 mmDIG5_AFMT_60958_0 0 0x4f38 0 0 4294967295 mmDIG6_AFMT_60958_0 0 0x5438 0 0 4294967295 mmDIG7_AFMT_60958_0 0 0x5638 0 0 4294967295 mmDIG8_AFMT_60958_0 0 0x5738 0 0 4294967295 mmAFMT_60958_1 0 0x4a39 5 0 4294967295 AFMT_60958_CS_WORD_LENGTH 0 3 AFMT_60958_CS_ORIGINAL_SAMPLING_FREQUENCY 4 7 AFMT_60958_VALID_L 16 16 AFMT_60958_VALID_R 18 18 AFMT_60958_CS_CHANNEL_NUMBER_R 20 23 mmDIG0_AFMT_60958_1 0 0x4a39 0 0 4294967295 mmDIG1_AFMT_60958_1 0 0x4b39 0 0 4294967295 mmDIG2_AFMT_60958_1 0 0x4c39 0 0 4294967295 mmDIG3_AFMT_60958_1 0 0x4d39 0 0 4294967295 mmDIG4_AFMT_60958_1 0 0x4e39 0 0 4294967295 mmDIG5_AFMT_60958_1 0 0x4f39 0 0 4294967295 mmDIG6_AFMT_60958_1 0 0x5439 0 0 4294967295 mmDIG7_AFMT_60958_1 0 0x5639 0 0 4294967295 mmDIG8_AFMT_60958_1 0 0x5739 0 0 4294967295 mmAFMT_AUDIO_CRC_CONTROL 0 0x4a3a 5 0 4294967295 AFMT_AUDIO_CRC_EN 0 0 AFMT_AUDIO_CRC_CONT 4 4 AFMT_AUDIO_CRC_SOURCE 8 8 AFMT_AUDIO_CRC_CH_SEL 12 15 AFMT_AUDIO_CRC_COUNT 16 31 mmDIG0_AFMT_AUDIO_CRC_CONTROL 0 0x4a3a 0 0 4294967295 mmDIG1_AFMT_AUDIO_CRC_CONTROL 0 0x4b3a 0 0 4294967295 mmDIG2_AFMT_AUDIO_CRC_CONTROL 0 0x4c3a 0 0 4294967295 mmDIG3_AFMT_AUDIO_CRC_CONTROL 0 0x4d3a 0 0 4294967295 mmDIG4_AFMT_AUDIO_CRC_CONTROL 0 0x4e3a 0 0 4294967295 mmDIG5_AFMT_AUDIO_CRC_CONTROL 0 0x4f3a 0 0 4294967295 mmDIG6_AFMT_AUDIO_CRC_CONTROL 0 0x543a 0 0 4294967295 mmDIG7_AFMT_AUDIO_CRC_CONTROL 0 0x563a 0 0 4294967295 mmDIG8_AFMT_AUDIO_CRC_CONTROL 0 0x573a 0 0 4294967295 mmAFMT_RAMP_CONTROL0 0 0x4a3b 2 0 4294967295 AFMT_RAMP_MAX_COUNT 0 23 AFMT_RAMP_DATA_SIGN 31 31 mmDIG0_AFMT_RAMP_CONTROL0 0 0x4a3b 0 0 4294967295 mmDIG1_AFMT_RAMP_CONTROL0 0 0x4b3b 0 0 4294967295 mmDIG2_AFMT_RAMP_CONTROL0 0 0x4c3b 0 0 4294967295 mmDIG3_AFMT_RAMP_CONTROL0 0 0x4d3b 0 0 4294967295 mmDIG4_AFMT_RAMP_CONTROL0 0 0x4e3b 0 0 4294967295 mmDIG5_AFMT_RAMP_CONTROL0 0 0x4f3b 0 0 4294967295 mmDIG6_AFMT_RAMP_CONTROL0 0 0x543b 0 0 4294967295 mmDIG7_AFMT_RAMP_CONTROL0 0 0x563b 0 0 4294967295 mmDIG8_AFMT_RAMP_CONTROL0 0 0x573b 0 0 4294967295 mmAFMT_RAMP_CONTROL1 0 0x4a3c 2 0 4294967295 AFMT_RAMP_MIN_COUNT 0 23 AFMT_AUDIO_TEST_CH_DISABLE 24 31 mmDIG0_AFMT_RAMP_CONTROL1 0 0x4a3c 0 0 4294967295 mmDIG1_AFMT_RAMP_CONTROL1 0 0x4b3c 0 0 4294967295 mmDIG2_AFMT_RAMP_CONTROL1 0 0x4c3c 0 0 4294967295 mmDIG3_AFMT_RAMP_CONTROL1 0 0x4d3c 0 0 4294967295 mmDIG4_AFMT_RAMP_CONTROL1 0 0x4e3c 0 0 4294967295 mmDIG5_AFMT_RAMP_CONTROL1 0 0x4f3c 0 0 4294967295 mmDIG6_AFMT_RAMP_CONTROL1 0 0x543c 0 0 4294967295 mmDIG7_AFMT_RAMP_CONTROL1 0 0x563c 0 0 4294967295 mmDIG8_AFMT_RAMP_CONTROL1 0 0x573c 0 0 4294967295 mmAFMT_RAMP_CONTROL2 0 0x4a3d 1 0 4294967295 AFMT_RAMP_INC_COUNT 0 23 mmDIG0_AFMT_RAMP_CONTROL2 0 0x4a3d 0 0 4294967295 mmDIG1_AFMT_RAMP_CONTROL2 0 0x4b3d 0 0 4294967295 mmDIG2_AFMT_RAMP_CONTROL2 0 0x4c3d 0 0 4294967295 mmDIG3_AFMT_RAMP_CONTROL2 0 0x4d3d 0 0 4294967295 mmDIG4_AFMT_RAMP_CONTROL2 0 0x4e3d 0 0 4294967295 mmDIG5_AFMT_RAMP_CONTROL2 0 0x4f3d 0 0 4294967295 mmDIG6_AFMT_RAMP_CONTROL2 0 0x543d 0 0 4294967295 mmDIG7_AFMT_RAMP_CONTROL2 0 0x563d 0 0 4294967295 mmDIG8_AFMT_RAMP_CONTROL2 0 0x573d 0 0 4294967295 mmAFMT_RAMP_CONTROL3 0 0x4a3e 1 0 4294967295 AFMT_RAMP_DEC_COUNT 0 23 mmDIG0_AFMT_RAMP_CONTROL3 0 0x4a3e 0 0 4294967295 mmDIG1_AFMT_RAMP_CONTROL3 0 0x4b3e 0 0 4294967295 mmDIG2_AFMT_RAMP_CONTROL3 0 0x4c3e 0 0 4294967295 mmDIG3_AFMT_RAMP_CONTROL3 0 0x4d3e 0 0 4294967295 mmDIG4_AFMT_RAMP_CONTROL3 0 0x4e3e 0 0 4294967295 mmDIG5_AFMT_RAMP_CONTROL3 0 0x4f3e 0 0 4294967295 mmDIG6_AFMT_RAMP_CONTROL3 0 0x543e 0 0 4294967295 mmDIG7_AFMT_RAMP_CONTROL3 0 0x563e 0 0 4294967295 mmDIG8_AFMT_RAMP_CONTROL3 0 0x573e 0 0 4294967295 mmAFMT_60958_2 0 0x4a3f 6 0 4294967295 AFMT_60958_CS_CHANNEL_NUMBER_2 0 3 AFMT_60958_CS_CHANNEL_NUMBER_3 4 7 AFMT_60958_CS_CHANNEL_NUMBER_4 8 11 AFMT_60958_CS_CHANNEL_NUMBER_5 12 15 AFMT_60958_CS_CHANNEL_NUMBER_6 16 19 AFMT_60958_CS_CHANNEL_NUMBER_7 20 23 mmDIG0_AFMT_60958_2 0 0x4a3f 0 0 4294967295 mmDIG1_AFMT_60958_2 0 0x4b3f 0 0 4294967295 mmDIG2_AFMT_60958_2 0 0x4c3f 0 0 4294967295 mmDIG3_AFMT_60958_2 0 0x4d3f 0 0 4294967295 mmDIG4_AFMT_60958_2 0 0x4e3f 0 0 4294967295 mmDIG5_AFMT_60958_2 0 0x4f3f 0 0 4294967295 mmDIG6_AFMT_60958_2 0 0x543f 0 0 4294967295 mmDIG7_AFMT_60958_2 0 0x563f 0 0 4294967295 mmDIG8_AFMT_60958_2 0 0x573f 0 0 4294967295 mmAFMT_AUDIO_CRC_RESULT 0 0x4a40 2 0 4294967295 AFMT_AUDIO_CRC_DONE 0 0 AFMT_AUDIO_CRC 8 31 mmDIG0_AFMT_AUDIO_CRC_RESULT 0 0x4a40 0 0 4294967295 mmDIG1_AFMT_AUDIO_CRC_RESULT 0 0x4b40 0 0 4294967295 mmDIG2_AFMT_AUDIO_CRC_RESULT 0 0x4c40 0 0 4294967295 mmDIG3_AFMT_AUDIO_CRC_RESULT 0 0x4d40 0 0 4294967295 mmDIG4_AFMT_AUDIO_CRC_RESULT 0 0x4e40 0 0 4294967295 mmDIG5_AFMT_AUDIO_CRC_RESULT 0 0x4f40 0 0 4294967295 mmDIG6_AFMT_AUDIO_CRC_RESULT 0 0x5440 0 0 4294967295 mmDIG7_AFMT_AUDIO_CRC_RESULT 0 0x5640 0 0 4294967295 mmDIG8_AFMT_AUDIO_CRC_RESULT 0 0x5740 0 0 4294967295 mmAFMT_STATUS 0 0x4a41 4 0 4294967295 AFMT_AUDIO_ENABLE 4 4 AFMT_AZ_HBR_ENABLE 8 8 AFMT_AUDIO_FIFO_OVERFLOW 24 24 AFMT_AZ_AUDIO_ENABLE_CHG 30 30 mmDIG0_AFMT_STATUS 0 0x4a41 0 0 4294967295 mmDIG1_AFMT_STATUS 0 0x4b41 0 0 4294967295 mmDIG2_AFMT_STATUS 0 0x4c41 0 0 4294967295 mmDIG3_AFMT_STATUS 0 0x4d41 0 0 4294967295 mmDIG4_AFMT_STATUS 0 0x4e41 0 0 4294967295 mmDIG5_AFMT_STATUS 0 0x4f41 0 0 4294967295 mmDIG6_AFMT_STATUS 0 0x5441 0 0 4294967295 mmDIG7_AFMT_STATUS 0 0x5641 0 0 4294967295 mmDIG8_AFMT_STATUS 0 0x5741 0 0 4294967295 mmAFMT_AUDIO_PACKET_CONTROL 0 0x4a42 9 0 4294967295 AFMT_AUDIO_SAMPLE_SEND 0 0 AFMT_RESET_FIFO_WHEN_AUDIO_DIS 11 11 AFMT_AUDIO_TEST_EN 12 12 AFMT_AUDIO_TEST_MODE 14 14 AFMT_AUDIO_FIFO_OVERFLOW_ACK 23 23 AFMT_AUDIO_CHANNEL_SWAP 24 24 AFMT_60958_CS_UPDATE 26 26 AFMT_AZ_AUDIO_ENABLE_CHG_ACK 30 30 AFMT_BLANK_TEST_DATA_ON_ENC_ENB 31 31 mmDIG0_AFMT_AUDIO_PACKET_CONTROL 0 0x4a42 0 0 4294967295 mmDIG1_AFMT_AUDIO_PACKET_CONTROL 0 0x4b42 0 0 4294967295 mmDIG2_AFMT_AUDIO_PACKET_CONTROL 0 0x4c42 0 0 4294967295 mmDIG3_AFMT_AUDIO_PACKET_CONTROL 0 0x4d42 0 0 4294967295 mmDIG4_AFMT_AUDIO_PACKET_CONTROL 0 0x4e42 0 0 4294967295 mmDIG5_AFMT_AUDIO_PACKET_CONTROL 0 0x4f42 0 0 4294967295 mmDIG6_AFMT_AUDIO_PACKET_CONTROL 0 0x5442 0 0 4294967295 mmDIG7_AFMT_AUDIO_PACKET_CONTROL 0 0x5642 0 0 4294967295 mmDIG8_AFMT_AUDIO_PACKET_CONTROL 0 0x5742 0 0 4294967295 mmAFMT_VBI_PACKET_CONTROL 0 0x4a43 3 0 4294967295 AFMT_GENERIC0_UPDATE 2 2 AFMT_GENERIC2_UPDATE 3 3 AFMT_GENERIC_INDEX 30 31 mmDIG0_AFMT_VBI_PACKET_CONTROL 0 0x4a43 0 0 4294967295 mmDIG1_AFMT_VBI_PACKET_CONTROL 0 0x4b43 0 0 4294967295 mmDIG2_AFMT_VBI_PACKET_CONTROL 0 0x4c43 0 0 4294967295 mmDIG3_AFMT_VBI_PACKET_CONTROL 0 0x4d43 0 0 4294967295 mmDIG4_AFMT_VBI_PACKET_CONTROL 0 0x4e43 0 0 4294967295 mmDIG5_AFMT_VBI_PACKET_CONTROL 0 0x4f43 0 0 4294967295 mmDIG6_AFMT_VBI_PACKET_CONTROL 0 0x5443 0 0 4294967295 mmDIG7_AFMT_VBI_PACKET_CONTROL 0 0x5643 0 0 4294967295 mmDIG8_AFMT_VBI_PACKET_CONTROL 0 0x5743 0 0 4294967295 mmAFMT_INFOFRAME_CONTROL0 0 0x4a44 3 0 4294967295 AFMT_AUDIO_INFO_SOURCE 6 6 AFMT_AUDIO_INFO_UPDATE 7 7 AFMT_MPEG_INFO_UPDATE 10 10 mmDIG0_AFMT_INFOFRAME_CONTROL0 0 0x4a44 0 0 4294967295 mmDIG1_AFMT_INFOFRAME_CONTROL0 0 0x4b44 0 0 4294967295 mmDIG2_AFMT_INFOFRAME_CONTROL0 0 0x4c44 0 0 4294967295 mmDIG3_AFMT_INFOFRAME_CONTROL0 0 0x4d44 0 0 4294967295 mmDIG4_AFMT_INFOFRAME_CONTROL0 0 0x4e44 0 0 4294967295 mmDIG5_AFMT_INFOFRAME_CONTROL0 0 0x4f44 0 0 4294967295 mmDIG6_AFMT_INFOFRAME_CONTROL0 0 0x5444 0 0 4294967295 mmDIG7_AFMT_INFOFRAME_CONTROL0 0 0x5644 0 0 4294967295 mmDIG8_AFMT_INFOFRAME_CONTROL0 0 0x5744 0 0 4294967295 mmAFMT_AUDIO_SRC_CONTROL 0 0x4a45 1 0 4294967295 AFMT_AUDIO_SRC_SELECT 0 2 mmDIG0_AFMT_AUDIO_SRC_CONTROL 0 0x4a45 0 0 4294967295 mmDIG1_AFMT_AUDIO_SRC_CONTROL 0 0x4b45 0 0 4294967295 mmDIG2_AFMT_AUDIO_SRC_CONTROL 0 0x4c45 0 0 4294967295 mmDIG3_AFMT_AUDIO_SRC_CONTROL 0 0x4d45 0 0 4294967295 mmDIG4_AFMT_AUDIO_SRC_CONTROL 0 0x4e45 0 0 4294967295 mmDIG5_AFMT_AUDIO_SRC_CONTROL 0 0x4f45 0 0 4294967295 mmDIG6_AFMT_AUDIO_SRC_CONTROL 0 0x5445 0 0 4294967295 mmDIG7_AFMT_AUDIO_SRC_CONTROL 0 0x5645 0 0 4294967295 mmDIG8_AFMT_AUDIO_SRC_CONTROL 0 0x5745 0 0 4294967295 mmAFMT_AUDIO_DBG_DTO_CNTL 0 0x4a46 4 0 4294967295 AFMT_AUDIO_DTO_FS_DIV_SEL 0 2 AFMT_AUDIO_DTO_DBG_BASE 8 8 AFMT_AUDIO_DTO_DBG_MULTI 12 14 AFMT_AUDIO_DTO_DBG_DIV 16 18 mmDIG0_AFMT_AUDIO_DBG_DTO_CNTL 0 0x4a46 0 0 4294967295 mmDIG1_AFMT_AUDIO_DBG_DTO_CNTL 0 0x4b46 0 0 4294967295 mmDIG2_AFMT_AUDIO_DBG_DTO_CNTL 0 0x4c46 0 0 4294967295 mmDIG3_AFMT_AUDIO_DBG_DTO_CNTL 0 0x4d46 0 0 4294967295 mmDIG4_AFMT_AUDIO_DBG_DTO_CNTL 0 0x4e46 0 0 4294967295 mmDIG5_AFMT_AUDIO_DBG_DTO_CNTL 0 0x4f46 0 0 4294967295 mmDIG6_AFMT_AUDIO_DBG_DTO_CNTL 0 0x5446 0 0 4294967295 mmDIG7_AFMT_AUDIO_DBG_DTO_CNTL 0 0x5646 0 0 4294967295 mmDIG8_AFMT_AUDIO_DBG_DTO_CNTL 0 0x5746 0 0 4294967295 mmAFMT_CNTL 0 0x4a7e 2 0 4294967295 AFMT_AUDIO_CLOCK_EN 0 0 AFMT_AUDIO_CLOCK_ON 8 8 mmDIG0_AFMT_CNTL 0 0x4a7e 0 0 4294967295 mmDIG1_AFMT_CNTL 0 0x4b7e 0 0 4294967295 mmDIG2_AFMT_CNTL 0 0x4c7e 0 0 4294967295 mmDIG3_AFMT_CNTL 0 0x4d7e 0 0 4294967295 mmDIG4_AFMT_CNTL 0 0x4e7e 0 0 4294967295 mmDIG5_AFMT_CNTL 0 0x4f7e 0 0 4294967295 mmDIG6_AFMT_CNTL 0 0x547e 0 0 4294967295 mmDIG7_AFMT_CNTL 0 0x567e 0 0 4294967295 mmDIG8_AFMT_CNTL 0 0x577e 0 0 4294967295 mmDIG_BE_CNTL 0 0x4a47 6 0 4294967295 DIG_DUAL_LINK_ENABLE 0 0 DIG_SWAP 1 1 DIG_RB_SWITCH_EN 2 2 DIG_FE_SOURCE_SELECT 8 14 DIG_MODE 16 18 DIG_HPD_SELECT 28 30 mmDIG0_DIG_BE_CNTL 0 0x4a47 0 0 4294967295 mmDIG1_DIG_BE_CNTL 0 0x4b47 0 0 4294967295 mmDIG2_DIG_BE_CNTL 0 0x4c47 0 0 4294967295 mmDIG3_DIG_BE_CNTL 0 0x4d47 0 0 4294967295 mmDIG4_DIG_BE_CNTL 0 0x4e47 0 0 4294967295 mmDIG5_DIG_BE_CNTL 0 0x4f47 0 0 4294967295 mmDIG6_DIG_BE_CNTL 0 0x5447 0 0 4294967295 mmDIG7_DIG_BE_CNTL 0 0x5647 0 0 4294967295 mmDIG8_DIG_BE_CNTL 0 0x5747 0 0 4294967295 mmDIG_BE_EN_CNTL 0 0x4a48 2 0 4294967295 DIG_ENABLE 0 0 DIG_SYMCLK_BE_ON 8 8 mmDIG0_DIG_BE_EN_CNTL 0 0x4a48 0 0 4294967295 mmDIG1_DIG_BE_EN_CNTL 0 0x4b48 0 0 4294967295 mmDIG2_DIG_BE_EN_CNTL 0 0x4c48 0 0 4294967295 mmDIG3_DIG_BE_EN_CNTL 0 0x4d48 0 0 4294967295 mmDIG4_DIG_BE_EN_CNTL 0 0x4e48 0 0 4294967295 mmDIG5_DIG_BE_EN_CNTL 0 0x4f48 0 0 4294967295 mmDIG6_DIG_BE_EN_CNTL 0 0x5448 0 0 4294967295 mmDIG7_DIG_BE_EN_CNTL 0 0x5648 0 0 4294967295 mmDIG8_DIG_BE_EN_CNTL 0 0x5748 0 0 4294967295 mmTMDS_CNTL 0 0x4a6b 1 0 4294967295 TMDS_SYNC_PHASE 0 0 mmDIG0_TMDS_CNTL 0 0x4a6b 0 0 4294967295 mmDIG1_TMDS_CNTL 0 0x4b6b 0 0 4294967295 mmDIG2_TMDS_CNTL 0 0x4c6b 0 0 4294967295 mmDIG3_TMDS_CNTL 0 0x4d6b 0 0 4294967295 mmDIG4_TMDS_CNTL 0 0x4e6b 0 0 4294967295 mmDIG5_TMDS_CNTL 0 0x4f6b 0 0 4294967295 mmDIG6_TMDS_CNTL 0 0x546b 0 0 4294967295 mmDIG7_TMDS_CNTL 0 0x566b 0 0 4294967295 mmDIG8_TMDS_CNTL 0 0x576b 0 0 4294967295 mmTMDS_CONTROL_CHAR 0 0x4a6c 4 0 4294967295 TMDS_CONTROL_CHAR0_OUT_EN 0 0 TMDS_CONTROL_CHAR1_OUT_EN 1 1 TMDS_CONTROL_CHAR2_OUT_EN 2 2 TMDS_CONTROL_CHAR3_OUT_EN 3 3 mmDIG0_TMDS_CONTROL_CHAR 0 0x4a6c 0 0 4294967295 mmDIG1_TMDS_CONTROL_CHAR 0 0x4b6c 0 0 4294967295 mmDIG2_TMDS_CONTROL_CHAR 0 0x4c6c 0 0 4294967295 mmDIG3_TMDS_CONTROL_CHAR 0 0x4d6c 0 0 4294967295 mmDIG4_TMDS_CONTROL_CHAR 0 0x4e6c 0 0 4294967295 mmDIG5_TMDS_CONTROL_CHAR 0 0x4f6c 0 0 4294967295 mmDIG6_TMDS_CONTROL_CHAR 0 0x546c 0 0 4294967295 mmDIG7_TMDS_CONTROL_CHAR 0 0x566c 0 0 4294967295 mmDIG8_TMDS_CONTROL_CHAR 0 0x576c 0 0 4294967295 mmTMDS_CONTROL0_FEEDBACK 0 0x4a6d 2 0 4294967295 TMDS_CONTROL0_FEEDBACK_SELECT 0 1 TMDS_CONTROL0_FEEDBACK_DELAY 8 9 mmDIG0_TMDS_CONTROL0_FEEDBACK 0 0x4a6d 0 0 4294967295 mmDIG1_TMDS_CONTROL0_FEEDBACK 0 0x4b6d 0 0 4294967295 mmDIG2_TMDS_CONTROL0_FEEDBACK 0 0x4c6d 0 0 4294967295 mmDIG3_TMDS_CONTROL0_FEEDBACK 0 0x4d6d 0 0 4294967295 mmDIG4_TMDS_CONTROL0_FEEDBACK 0 0x4e6d 0 0 4294967295 mmDIG5_TMDS_CONTROL0_FEEDBACK 0 0x4f6d 0 0 4294967295 mmDIG6_TMDS_CONTROL0_FEEDBACK 0 0x546d 0 0 4294967295 mmDIG7_TMDS_CONTROL0_FEEDBACK 0 0x566d 0 0 4294967295 mmDIG8_TMDS_CONTROL0_FEEDBACK 0 0x576d 0 0 4294967295 mmTMDS_STEREOSYNC_CTL_SEL 0 0x4a6e 1 0 4294967295 TMDS_STEREOSYNC_CTL_SEL 0 1 mmDIG0_TMDS_STEREOSYNC_CTL_SEL 0 0x4a6e 0 0 4294967295 mmDIG1_TMDS_STEREOSYNC_CTL_SEL 0 0x4b6e 0 0 4294967295 mmDIG2_TMDS_STEREOSYNC_CTL_SEL 0 0x4c6e 0 0 4294967295 mmDIG3_TMDS_STEREOSYNC_CTL_SEL 0 0x4d6e 0 0 4294967295 mmDIG4_TMDS_STEREOSYNC_CTL_SEL 0 0x4e6e 0 0 4294967295 mmDIG5_TMDS_STEREOSYNC_CTL_SEL 0 0x4f6e 0 0 4294967295 mmDIG6_TMDS_STEREOSYNC_CTL_SEL 0 0x546e 0 0 4294967295 mmDIG7_TMDS_STEREOSYNC_CTL_SEL 0 0x566e 0 0 4294967295 mmDIG8_TMDS_STEREOSYNC_CTL_SEL 0 0x576e 0 0 4294967295 mmTMDS_SYNC_CHAR_PATTERN_0_1 0 0x4a6f 2 0 4294967295 TMDS_SYNC_CHAR_PATTERN0 0 9 TMDS_SYNC_CHAR_PATTERN1 16 25 mmDIG0_TMDS_SYNC_CHAR_PATTERN_0_1 0 0x4a6f 0 0 4294967295 mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 0 0x4b6f 0 0 4294967295 mmDIG2_TMDS_SYNC_CHAR_PATTERN_0_1 0 0x4c6f 0 0 4294967295 mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 0 0x4d6f 0 0 4294967295 mmDIG4_TMDS_SYNC_CHAR_PATTERN_0_1 0 0x4e6f 0 0 4294967295 mmDIG5_TMDS_SYNC_CHAR_PATTERN_0_1 0 0x4f6f 0 0 4294967295 mmDIG6_TMDS_SYNC_CHAR_PATTERN_0_1 0 0x546f 0 0 4294967295 mmDIG7_TMDS_SYNC_CHAR_PATTERN_0_1 0 0x566f 0 0 4294967295 mmDIG8_TMDS_SYNC_CHAR_PATTERN_0_1 0 0x576f 0 0 4294967295 mmTMDS_SYNC_CHAR_PATTERN_2_3 0 0x4a70 2 0 4294967295 TMDS_SYNC_CHAR_PATTERN2 0 9 TMDS_SYNC_CHAR_PATTERN3 16 25 mmDIG0_TMDS_SYNC_CHAR_PATTERN_2_3 0 0x4a70 0 0 4294967295 mmDIG1_TMDS_SYNC_CHAR_PATTERN_2_3 0 0x4b70 0 0 4294967295 mmDIG2_TMDS_SYNC_CHAR_PATTERN_2_3 0 0x4c70 0 0 4294967295 mmDIG3_TMDS_SYNC_CHAR_PATTERN_2_3 0 0x4d70 0 0 4294967295 mmDIG4_TMDS_SYNC_CHAR_PATTERN_2_3 0 0x4e70 0 0 4294967295 mmDIG5_TMDS_SYNC_CHAR_PATTERN_2_3 0 0x4f70 0 0 4294967295 mmDIG6_TMDS_SYNC_CHAR_PATTERN_2_3 0 0x5470 0 0 4294967295 mmDIG7_TMDS_SYNC_CHAR_PATTERN_2_3 0 0x5670 0 0 4294967295 mmDIG8_TMDS_SYNC_CHAR_PATTERN_2_3 0 0x5770 0 0 4294967295 mmTMDS_DEBUG 0 0x4a71 7 0 4294967295 TMDS_DEBUG_EN 0 0 TMDS_DEBUG_HSYNC 8 8 TMDS_DEBUG_HSYNC_EN 9 9 TMDS_DEBUG_VSYNC 16 16 TMDS_DEBUG_VSYNC_EN 17 17 TMDS_DEBUG_DE 24 24 TMDS_DEBUG_DE_EN 25 25 mmDIG0_TMDS_DEBUG 0 0x4a71 0 0 4294967295 mmDIG1_TMDS_DEBUG 0 0x4b71 0 0 4294967295 mmDIG2_TMDS_DEBUG 0 0x4c71 0 0 4294967295 mmDIG3_TMDS_DEBUG 0 0x4d71 0 0 4294967295 mmDIG4_TMDS_DEBUG 0 0x4e71 0 0 4294967295 mmDIG5_TMDS_DEBUG 0 0x4f71 0 0 4294967295 mmDIG6_TMDS_DEBUG 0 0x5471 0 0 4294967295 mmDIG7_TMDS_DEBUG 0 0x5671 0 0 4294967295 mmDIG8_TMDS_DEBUG 0 0x5771 0 0 4294967295 mmTMDS_CTL_BITS 0 0x4a72 4 0 4294967295 TMDS_CTL0 0 0 TMDS_CTL1 8 8 TMDS_CTL2 16 16 TMDS_CTL3 24 24 mmDIG0_TMDS_CTL_BITS 0 0x4a72 0 0 4294967295 mmDIG1_TMDS_CTL_BITS 0 0x4b72 0 0 4294967295 mmDIG2_TMDS_CTL_BITS 0 0x4c72 0 0 4294967295 mmDIG3_TMDS_CTL_BITS 0 0x4d72 0 0 4294967295 mmDIG4_TMDS_CTL_BITS 0 0x4e72 0 0 4294967295 mmDIG5_TMDS_CTL_BITS 0 0x4f72 0 0 4294967295 mmDIG6_TMDS_CTL_BITS 0 0x5472 0 0 4294967295 mmDIG7_TMDS_CTL_BITS 0 0x5672 0 0 4294967295 mmDIG8_TMDS_CTL_BITS 0 0x5772 0 0 4294967295 mmTMDS_DCBALANCER_CONTROL 0 0x4a73 5 0 4294967295 TMDS_DCBALANCER_EN 0 0 TMDS_SYNC_DCBAL_EN 4 6 TMDS_DCBALANCER_TEST_EN 8 8 TMDS_DCBALANCER_TEST_IN 16 19 TMDS_DCBALANCER_FORCE 24 24 mmDIG0_TMDS_DCBALANCER_CONTROL 0 0x4a73 0 0 4294967295 mmDIG1_TMDS_DCBALANCER_CONTROL 0 0x4b73 0 0 4294967295 mmDIG2_TMDS_DCBALANCER_CONTROL 0 0x4c73 0 0 4294967295 mmDIG3_TMDS_DCBALANCER_CONTROL 0 0x4d73 0 0 4294967295 mmDIG4_TMDS_DCBALANCER_CONTROL 0 0x4e73 0 0 4294967295 mmDIG5_TMDS_DCBALANCER_CONTROL 0 0x4f73 0 0 4294967295 mmDIG6_TMDS_DCBALANCER_CONTROL 0 0x5473 0 0 4294967295 mmDIG7_TMDS_DCBALANCER_CONTROL 0 0x5673 0 0 4294967295 mmDIG8_TMDS_DCBALANCER_CONTROL 0 0x5773 0 0 4294967295 mmTMDS_CTL0_1_GEN_CNTL 0 0x4a75 15 0 4294967295 TMDS_CTL0_DATA_SEL 0 3 TMDS_CTL0_DATA_DELAY 4 6 TMDS_CTL0_DATA_INVERT 7 7 TMDS_CTL0_DATA_MODULATION 8 9 TMDS_CTL0_USE_FEEDBACK_PATH 10 10 TMDS_CTL0_FB_SYNC_CONT 11 11 TMDS_CTL0_PATTERN_OUT_EN 12 12 TMDS_CTL1_DATA_SEL 16 19 TMDS_CTL1_DATA_DELAY 20 22 TMDS_CTL1_DATA_INVERT 23 23 TMDS_CTL1_DATA_MODULATION 24 25 TMDS_CTL1_USE_FEEDBACK_PATH 26 26 TMDS_CTL1_FB_SYNC_CONT 27 27 TMDS_CTL1_PATTERN_OUT_EN 28 28 TMDS_2BIT_COUNTER_EN 31 31 mmDIG0_TMDS_CTL0_1_GEN_CNTL 0 0x4a75 0 0 4294967295 mmDIG1_TMDS_CTL0_1_GEN_CNTL 0 0x4b75 0 0 4294967295 mmDIG2_TMDS_CTL0_1_GEN_CNTL 0 0x4c75 0 0 4294967295 mmDIG3_TMDS_CTL0_1_GEN_CNTL 0 0x4d75 0 0 4294967295 mmDIG4_TMDS_CTL0_1_GEN_CNTL 0 0x4e75 0 0 4294967295 mmDIG5_TMDS_CTL0_1_GEN_CNTL 0 0x4f75 0 0 4294967295 mmDIG6_TMDS_CTL0_1_GEN_CNTL 0 0x5475 0 0 4294967295 mmDIG7_TMDS_CTL0_1_GEN_CNTL 0 0x5675 0 0 4294967295 mmDIG8_TMDS_CTL0_1_GEN_CNTL 0 0x5775 0 0 4294967295 mmTMDS_CTL2_3_GEN_CNTL 0 0x4a76 14 0 4294967295 TMDS_CTL2_DATA_SEL 0 3 TMDS_CTL2_DATA_DELAY 4 6 TMDS_CTL2_DATA_INVERT 7 7 TMDS_CTL2_DATA_MODULATION 8 9 TMDS_CTL2_USE_FEEDBACK_PATH 10 10 TMDS_CTL2_FB_SYNC_CONT 11 11 TMDS_CTL2_PATTERN_OUT_EN 12 12 TMDS_CTL3_DATA_SEL 16 19 TMDS_CTL3_DATA_DELAY 20 22 TMDS_CTL3_DATA_INVERT 23 23 TMDS_CTL3_DATA_MODULATION 24 25 TMDS_CTL3_USE_FEEDBACK_PATH 26 26 TMDS_CTL3_FB_SYNC_CONT 27 27 TMDS_CTL3_PATTERN_OUT_EN 28 28 mmDIG0_TMDS_CTL2_3_GEN_CNTL 0 0x4a76 0 0 4294967295 mmDIG1_TMDS_CTL2_3_GEN_CNTL 0 0x4b76 0 0 4294967295 mmDIG2_TMDS_CTL2_3_GEN_CNTL 0 0x4c76 0 0 4294967295 mmDIG3_TMDS_CTL2_3_GEN_CNTL 0 0x4d76 0 0 4294967295 mmDIG4_TMDS_CTL2_3_GEN_CNTL 0 0x4e76 0 0 4294967295 mmDIG5_TMDS_CTL2_3_GEN_CNTL 0 0x4f76 0 0 4294967295 mmDIG6_TMDS_CTL2_3_GEN_CNTL 0 0x5476 0 0 4294967295 mmDIG7_TMDS_CTL2_3_GEN_CNTL 0 0x5676 0 0 4294967295 mmDIG8_TMDS_CTL2_3_GEN_CNTL 0 0x5776 0 0 4294967295 mmDIG_VERSION 0 0x4a78 1 0 4294967295 DIG_TYPE 0 0 mmDIG0_DIG_VERSION 0 0x4a78 0 0 4294967295 mmDIG1_DIG_VERSION 0 0x4b78 0 0 4294967295 mmDIG2_DIG_VERSION 0 0x4c78 0 0 4294967295 mmDIG3_DIG_VERSION 0 0x4d78 0 0 4294967295 mmDIG4_DIG_VERSION 0 0x4e78 0 0 4294967295 mmDIG5_DIG_VERSION 0 0x4f78 0 0 4294967295 mmDIG6_DIG_VERSION 0 0x5478 0 0 4294967295 mmDIG7_DIG_VERSION 0 0x5678 0 0 4294967295 mmDIG8_DIG_VERSION 0 0x5778 0 0 4294967295 mmDIG_LANE_ENABLE 0 0x4a79 5 0 4294967295 DIG_LANE0EN 0 0 DIG_LANE1EN 1 1 DIG_LANE2EN 2 2 DIG_LANE3EN 3 3 DIG_CLK_EN 8 8 mmDIG0_DIG_LANE_ENABLE 0 0x4a79 0 0 4294967295 mmDIG1_DIG_LANE_ENABLE 0 0x4b79 0 0 4294967295 mmDIG2_DIG_LANE_ENABLE 0 0x4c79 0 0 4294967295 mmDIG3_DIG_LANE_ENABLE 0 0x4d79 0 0 4294967295 mmDIG4_DIG_LANE_ENABLE 0 0x4e79 0 0 4294967295 mmDIG5_DIG_LANE_ENABLE 0 0x4f79 0 0 4294967295 mmDIG6_DIG_LANE_ENABLE 0 0x5479 0 0 4294967295 mmDIG7_DIG_LANE_ENABLE 0 0x5679 0 0 4294967295 mmDIG8_DIG_LANE_ENABLE 0 0x5779 0 0 4294967295 mmDIG_TEST_DEBUG_INDEX 0 0x4a7a 2 0 4294967295 DIG_TEST_DEBUG_INDEX 0 7 DIG_TEST_DEBUG_WRITE_EN 8 8 mmDIG0_DIG_TEST_DEBUG_INDEX 0 0x4a7a 0 0 4294967295 mmDIG1_DIG_TEST_DEBUG_INDEX 0 0x4b7a 0 0 4294967295 mmDIG2_DIG_TEST_DEBUG_INDEX 0 0x4c7a 0 0 4294967295 mmDIG3_DIG_TEST_DEBUG_INDEX 0 0x4d7a 0 0 4294967295 mmDIG4_DIG_TEST_DEBUG_INDEX 0 0x4e7a 0 0 4294967295 mmDIG5_DIG_TEST_DEBUG_INDEX 0 0x4f7a 0 0 4294967295 mmDIG6_DIG_TEST_DEBUG_INDEX 0 0x547a 0 0 4294967295 mmDIG7_DIG_TEST_DEBUG_INDEX 0 0x567a 0 0 4294967295 mmDIG8_DIG_TEST_DEBUG_INDEX 0 0x577a 0 0 4294967295 mmDIG_TEST_DEBUG_DATA 0 0x4a7b 1 0 4294967295 DIG_TEST_DEBUG_DATA 0 31 mmDIG0_DIG_TEST_DEBUG_DATA 0 0x4a7b 0 0 4294967295 mmDIG1_DIG_TEST_DEBUG_DATA 0 0x4b7b 0 0 4294967295 mmDIG2_DIG_TEST_DEBUG_DATA 0 0x4c7b 0 0 4294967295 mmDIG3_DIG_TEST_DEBUG_DATA 0 0x4d7b 0 0 4294967295 mmDIG4_DIG_TEST_DEBUG_DATA 0 0x4e7b 0 0 4294967295 mmDIG5_DIG_TEST_DEBUG_DATA 0 0x4f7b 0 0 4294967295 mmDIG6_DIG_TEST_DEBUG_DATA 0 0x547b 0 0 4294967295 mmDIG7_DIG_TEST_DEBUG_DATA 0 0x567b 0 0 4294967295 mmDIG8_DIG_TEST_DEBUG_DATA 0 0x577b 0 0 4294967295 mmDIG_FE_TEST_DEBUG_INDEX 0 0x4a7c 2 0 4294967295 DIG_FE_TEST_DEBUG_INDEX 0 7 DIG_FE_TEST_DEBUG_WRITE_EN 8 8 mmDIG0_DIG_FE_TEST_DEBUG_INDEX 0 0x4a7c 0 0 4294967295 mmDIG1_DIG_FE_TEST_DEBUG_INDEX 0 0x4b7c 0 0 4294967295 mmDIG2_DIG_FE_TEST_DEBUG_INDEX 0 0x4c7c 0 0 4294967295 mmDIG3_DIG_FE_TEST_DEBUG_INDEX 0 0x4d7c 0 0 4294967295 mmDIG4_DIG_FE_TEST_DEBUG_INDEX 0 0x4e7c 0 0 4294967295 mmDIG5_DIG_FE_TEST_DEBUG_INDEX 0 0x4f7c 0 0 4294967295 mmDIG6_DIG_FE_TEST_DEBUG_INDEX 0 0x547c 0 0 4294967295 mmDIG7_DIG_FE_TEST_DEBUG_INDEX 0 0x567c 0 0 4294967295 mmDIG8_DIG_FE_TEST_DEBUG_INDEX 0 0x577c 0 0 4294967295 mmDIG_FE_TEST_DEBUG_DATA 0 0x4a7d 1 0 4294967295 DIG_FE_TEST_DEBUG_DATA 0 31 mmDIG0_DIG_FE_TEST_DEBUG_DATA 0 0x4a7d 0 0 4294967295 mmDIG1_DIG_FE_TEST_DEBUG_DATA 0 0x4b7d 0 0 4294967295 mmDIG2_DIG_FE_TEST_DEBUG_DATA 0 0x4c7d 0 0 4294967295 mmDIG3_DIG_FE_TEST_DEBUG_DATA 0 0x4d7d 0 0 4294967295 mmDIG4_DIG_FE_TEST_DEBUG_DATA 0 0x4e7d 0 0 4294967295 mmDIG5_DIG_FE_TEST_DEBUG_DATA 0 0x4f7d 0 0 4294967295 mmDIG6_DIG_FE_TEST_DEBUG_DATA 0 0x547d 0 0 4294967295 mmDIG7_DIG_FE_TEST_DEBUG_DATA 0 0x567d 0 0 4294967295 mmDIG8_DIG_FE_TEST_DEBUG_DATA 0 0x577d 0 0 4294967295 mmDMCU_CTRL 0 0x1600 7 0 4294967295 RESET_UC 0 0 IGNORE_PWRMGT 1 1 DISABLE_IRQ_TO_UC 2 2 DISABLE_XIRQ_TO_UC 3 3 DMCU_ENABLE 4 4 DMCU_DYN_CLK_GATING_EN 8 8 UC_REG_RD_TIMEOUT 16 31 mmDMCU_STATUS 0 0x1601 3 0 4294967295 UC_IN_RESET 0 0 UC_IN_WAIT_MODE 1 1 UC_IN_STOP_MODE 2 2 mmDMCU_PC_START_ADDR 0 0x1602 2 0 4294967295 PC_START_ADDR_LSB 0 7 PC_START_ADDR_MSB 8 15 mmDMCU_FW_START_ADDR 0 0x1603 2 0 4294967295 FW_START_ADDR_LSB 0 7 FW_START_ADDR_MSB 8 15 mmDMCU_FW_END_ADDR 0 0x1604 2 0 4294967295 FW_END_ADDR_LSB 0 7 FW_END_ADDR_MSB 8 15 mmDMCU_FW_ISR_START_ADDR 0 0x1605 2 0 4294967295 FW_ISR_START_ADDR_LSB 0 7 FW_ISR_START_ADDR_MSB 8 15 mmDMCU_FW_CS_HI 0 0x1606 1 0 4294967295 FW_CHECKSUM_HI 0 31 mmDMCU_FW_CS_LO 0 0x1607 1 0 4294967295 FW_CHECKSUM_LO 0 31 mmDMCU_RAM_ACCESS_CTRL 0 0x1608 6 0 4294967295 ERAM_WR_ADDR_AUTO_INC 0 0 ERAM_RD_ADDR_AUTO_INC 1 1 IRAM_WR_ADDR_AUTO_INC 2 2 IRAM_RD_ADDR_AUTO_INC 3 3 ERAM_HOST_ACCESS_EN 4 4 IRAM_HOST_ACCESS_EN 5 5 mmDMCU_ERAM_WR_CTRL 0 0x1609 3 0 4294967295 ERAM_WR_ADDR 0 15 ERAM_WR_BE 16 19 ERAM_WR_BYTE_MODE 20 20 mmDMCU_ERAM_WR_DATA 0 0x160a 1 0 4294967295 ERAM_WR_DATA 0 31 mmDMCU_ERAM_RD_CTRL 0 0x160b 3 0 4294967295 ERAM_RD_ADDR 0 15 ERAM_RD_BE 16 19 ERAM_RD_BYTE_MODE 20 20 mmDMCU_ERAM_RD_DATA 0 0x160c 1 0 4294967295 ERAM_RD_DATA 0 31 mmDMCU_IRAM_WR_CTRL 0 0x160d 1 0 4294967295 IRAM_WR_ADDR 0 9 mmDMCU_IRAM_WR_DATA 0 0x160e 1 0 4294967295 IRAM_WR_DATA 0 7 mmDMCU_IRAM_RD_CTRL 0 0x160f 1 0 4294967295 IRAM_RD_ADDR 0 9 mmDMCU_IRAM_RD_DATA 0 0x1610 1 0 4294967295 IRAM_RD_DATA 0 7 mmDMCU_EVENT_TRIGGER 0 0x1611 3 0 4294967295 GEN_SW_INT_TO_UC 0 0 UC_INTERNAL_INT_CODE 16 22 GEN_UC_INTERNAL_INT_TO_HOST 23 23 mmDMCU_UC_INTERNAL_INT_STATUS 0 0x1612 16 0 4294967295 UC_INT_IRQ_N_PIN 0 0 UC_INT_XIRQ_N_PIN 1 1 UC_INT_SOFTWARE_INTERRUPT 2 2 UC_INT_ILLEGAL_OPCODE_TRAP 3 3 UC_INT_TIMER_OUTPUT_COMPARE_4 4 4 UC_INT_TIMER_OUTPUT_COMPARE_3 5 5 UC_INT_TIMER_OUTPUT_COMPARE_2 6 6 UC_INT_TIMER_OUTPUT_COMPARE_1 7 7 UC_INT_TIMER_OVERFLOW 8 8 UC_INT_REAL_TIME_INTERRUPT 9 9 UC_INT_TIMER_INPUT_CAPTURE_4_OUTPUT_COMPARE_5 10 10 UC_INT_TIMER_INPUT_CAPTURE_3 11 11 UC_INT_TIMER_INPUT_CAPTURE_2 12 12 UC_INT_TIMER_INPUT_CAPTURE_1 13 13 UC_INT_PULSE_ACCUMULATOR_INPUT_EDGE 14 14 UC_INT_PULSE_ACCUMULATOR_OVERFLOW 15 15 mmDMCU_SS_INTERRUPT_CNTL_STATUS 0 0x1613 18 0 4294967295 STATIC_SCREEN1_INT_STATUS 13 13 STATIC_SCREEN1_INT_OCCURRED 14 14 STATIC_SCREEN1_INT_CLEAR 14 14 STATIC_SCREEN2_INT_STATUS 15 15 STATIC_SCREEN2_INT_OCCURRED 16 16 STATIC_SCREEN2_INT_CLEAR 16 16 STATIC_SCREEN3_INT_STATUS 17 17 STATIC_SCREEN3_INT_OCCURRED 18 18 STATIC_SCREEN3_INT_CLEAR 18 18 STATIC_SCREEN4_INT_STATUS 19 19 STATIC_SCREEN4_INT_OCCURRED 20 20 STATIC_SCREEN4_INT_CLEAR 20 20 STATIC_SCREEN5_INT_STATUS 21 21 STATIC_SCREEN5_INT_OCCURRED 22 22 STATIC_SCREEN5_INT_CLEAR 22 22 STATIC_SCREEN6_INT_STATUS 23 23 STATIC_SCREEN6_INT_OCCURRED 24 24 STATIC_SCREEN6_INT_CLEAR 24 24 mmDMCU_INTERRUPT_STATUS 0 0x1614 54 0 4294967295 ABM1_HG_READY_INT_OCCURRED 0 0 ABM1_HG_READY_INT_CLEAR 0 0 ABM1_LS_READY_INT_OCCURRED 1 1 ABM1_LS_READY_INT_CLEAR 1 1 ABM1_BL_UPDATE_INT_OCCURRED 2 2 ABM1_BL_UPDATE_INT_CLEAR 2 2 MCP_INT_OCCURRED 3 3 DCPG_IHC_DSI_POWER_UP_INT_OCCURRED 4 4 DCPG_IHC_DSI_POWER_UP_INT_CLEAR 4 4 DCPG_IHC_DSI_POWER_DOWN_INT_OCCURRED 5 5 DCPG_IHC_DSI_POWER_DOWN_INT_CLEAR 5 5 EXTERNAL_SW_INT_OCCURRED 8 8 EXTERNAL_SW_INT_CLEAR 8 8 SCP_INT_OCCURRED 9 9 UC_INTERNAL_INT_OCCURRED 10 10 UC_INTERNAL_INT_CLEAR 10 10 UC_REG_RD_TIMEOUT_INT_OCCURRED 11 11 UC_REG_RD_TIMEOUT_INT_CLEAR 11 11 DCPG_IHC_DCFE0_POWER_UP_INT_OCCURRED 12 12 DCPG_IHC_DCFE0_POWER_UP_INT_CLEAR 12 12 DCPG_IHC_DCFE1_POWER_UP_INT_OCCURRED 13 13 DCPG_IHC_DCFE1_POWER_UP_INT_CLEAR 13 13 DCPG_IHC_DCFE2_POWER_UP_INT_OCCURRED 14 14 DCPG_IHC_DCFE2_POWER_UP_INT_CLEAR 14 14 DCPG_IHC_DCFE3_POWER_UP_INT_OCCURRED 15 15 DCPG_IHC_DCFE3_POWER_UP_INT_CLEAR 15 15 DCPG_IHC_DCFE4_POWER_UP_INT_OCCURRED 16 16 DCPG_IHC_DCFE4_POWER_UP_INT_CLEAR 16 16 DCPG_IHC_DCFE5_POWER_UP_INT_OCCURRED 17 17 DCPG_IHC_DCFE5_POWER_UP_INT_CLEAR 17 17 DCPG_IHC_DCFE0_POWER_DOWN_INT_OCCURRED 18 18 DCPG_IHC_DCFE0_POWER_DOWN_INT_CLEAR 18 18 DCPG_IHC_DCFE1_POWER_DOWN_INT_OCCURRED 19 19 DCPG_IHC_DCFE1_POWER_DOWN_INT_CLEAR 19 19 DCPG_IHC_DCFE2_POWER_DOWN_INT_OCCURRED 20 20 DCPG_IHC_DCFE2_POWER_DOWN_INT_CLEAR 20 20 DCPG_IHC_DCFE3_POWER_DOWN_INT_OCCURRED 21 21 DCPG_IHC_DCFE3_POWER_DOWN_INT_CLEAR 21 21 DCPG_IHC_DCFE4_POWER_DOWN_INT_OCCURRED 22 22 DCPG_IHC_DCFE4_POWER_DOWN_INT_CLEAR 22 22 DCPG_IHC_DCFE5_POWER_DOWN_INT_OCCURRED 23 23 DCPG_IHC_DCFE5_POWER_DOWN_INT_CLEAR 23 23 VBLANK1_INT_OCCURRED 24 24 VBLANK1_INT_CLEAR 24 24 VBLANK2_INT_OCCURRED 25 25 VBLANK2_INT_CLEAR 25 25 VBLANK3_INT_OCCURRED 26 26 VBLANK3_INT_CLEAR 26 26 VBLANK4_INT_OCCURRED 27 27 VBLANK4_INT_CLEAR 27 27 VBLANK5_INT_OCCURRED 28 28 VBLANK5_INT_CLEAR 28 28 VBLANK6_INT_OCCURRED 29 29 VBLANK6_INT_CLEAR 29 29 mmDMCU_INTERRUPT_STATUS_1 0 0x1633 14 0 4294967295 DCPG_IHC_DCFEV0_POWER_UP_INT_OCCURRED 0 0 DCPG_IHC_DCFEV0_POWER_UP_INT_CLEAR 0 0 DCPG_IHC_DCFEV1_POWER_UP_INT_OCCURRED 1 1 DCPG_IHC_DCFEV1_POWER_UP_INT_CLEAR 1 1 DCPG_IHC_DCFEV0_POWER_DOWN_INT_OCCURRED 2 2 DCPG_IHC_DCFEV0_POWER_DOWN_INT_CLEAR 2 2 DCPG_IHC_DCFEV1_POWER_DOWN_INT_OCCURRED 3 3 DCPG_IHC_DCFEV1_POWER_DOWN_INT_CLEAR 3 3 DCFEV0_VBLANK_INT_OCCURRED 4 4 DCFEV0_VBLANK_INT_CLEAR 4 4 DCFEV1_VBLANK_INT_OCCURRED 5 5 DCFEV1_VBLANK_INT_CLEAR 5 5 DMCU_GENERIC_INTERRUPT_OCCURRED 13 13 DMCU_GENERIC_INTERRUPT_CLEAR 13 13 mmDMCU_INTERRUPT_TO_HOST_EN_MASK 0 0x1615 6 0 4294967295 ABM1_HG_READY_INT_MASK 0 0 ABM1_LS_READY_INT_MASK 1 1 ABM1_BL_UPDATE_INT_MASK 2 2 SCP_INT_MASK 9 9 UC_INTERNAL_INT_MASK 10 10 UC_REG_RD_TIMEOUT_INT_MASK 11 11 mmDMCU_INTERRUPT_TO_UC_EN_MASK 0 0x1616 31 0 4294967295 ABM1_HG_READY_INT_TO_UC_EN 0 0 ABM1_LS_READY_INT_TO_UC_EN 1 1 ABM1_BL_UPDATE_INT_TO_UC_EN 2 2 MCP_INT_TO_UC_EN 3 3 DCPG_IHC_DSI_POWER_UP_INT_TO_UC_EN 4 4 DCPG_IHC_DSI_POWER_DOWN_INT_TO_UC_EN 5 5 STATIC_SCREEN1_INT_TO_UC_EN 6 6 STATIC_SCREEN2_INT_TO_UC_EN 7 7 EXTERNAL_SW_INT_TO_UC_EN 8 8 STATIC_SCREEN3_INT_TO_UC_EN 9 9 STATIC_SCREEN4_INT_TO_UC_EN 10 10 STATIC_SCREEN5_INT_TO_UC_EN 11 11 DCPG_IHC_DCFE0_POWER_UP_INT_TO_UC_EN 12 12 DCPG_IHC_DCFE1_POWER_UP_INT_TO_UC_EN 13 13 DCPG_IHC_DCFE2_POWER_UP_INT_TO_UC_EN 14 14 DCPG_IHC_DCFE3_POWER_UP_INT_TO_UC_EN 15 15 DCPG_IHC_DCFE4_POWER_UP_INT_TO_UC_EN 16 16 DCPG_IHC_DCFE5_POWER_UP_INT_TO_UC_EN 17 17 DCPG_IHC_DCFE0_POWER_DOWN_INT_TO_UC_EN 18 18 DCPG_IHC_DCFE1_POWER_DOWN_INT_TO_UC_EN 19 19 DCPG_IHC_DCFE2_POWER_DOWN_INT_TO_UC_EN 20 20 DCPG_IHC_DCFE3_POWER_DOWN_INT_TO_UC_EN 21 21 DCPG_IHC_DCFE4_POWER_DOWN_INT_TO_UC_EN 22 22 DCPG_IHC_DCFE5_POWER_DOWN_INT_TO_UC_EN 23 23 VBLANK1_INT_TO_UC_EN 24 24 VBLANK2_INT_TO_UC_EN 25 25 VBLANK3_INT_TO_UC_EN 26 26 VBLANK4_INT_TO_UC_EN 27 27 VBLANK5_INT_TO_UC_EN 28 28 VBLANK6_INT_TO_UC_EN 29 29 STATIC_SCREEN6_INT_TO_UC_EN 30 30 mmDMCU_INTERRUPT_TO_UC_EN_MASK_1 0 0x1631 7 0 4294967295 DCPG_IHC_DCFEV0_POWER_UP_INT_TO_UC_EN 0 0 DCPG_IHC_DCFEV0_POWER_DOWN_INT_TO_UC_EN 1 1 DCFEV0_VBLANK_INT_TO_UC_EN 2 2 DCPG_IHC_DCFEV1_POWER_UP_INT_TO_UC_EN 3 3 DCPG_IHC_DCFEV1_POWER_DOWN_INT_TO_UC_EN 4 4 DCFEV1_VBLANK_INT_TO_UC_EN 5 5 DMCU_GENERIC_INT_TO_UC_EN 13 13 mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL 0 0x1617 31 0 4294967295 ABM1_HG_READY_INT_XIRQ_IRQ_SEL 0 0 ABM1_LS_READY_INT_XIRQ_IRQ_SEL 1 1 ABM1_BL_UPDATE_INT_XIRQ_IRQ_SEL 2 2 MCP_INT_XIRQ_IRQ_SEL 3 3 DCPG_IHC_DSI_POWER_UP_INT_XIRQ_IRQ_SEL 4 4 DCPG_IHC_DSI_POWER_DOWN_INT_XIRQ_IRQ_SEL 5 5 STATIC_SCREEN1_INT_XIRQ_IRQ_SEL 6 6 STATIC_SCREEN2_INT_XIRQ_IRQ_SEL 7 7 EXTERNAL_SW_INT_XIRQ_IRQ_SEL 8 8 STATIC_SCREEN3_INT_XIRQ_IRQ_SEL 9 9 STATIC_SCREEN4_INT_XIRQ_IRQ_SEL 10 10 STATIC_SCREEN5_INT_XIRQ_IRQ_SEL 11 11 DCPG_IHC_DCFE0_POWER_UP_INT_XIRQ_IRQ_SEL 12 12 DCPG_IHC_DCFE1_POWER_UP_INT_XIRQ_IRQ_SEL 13 13 DCPG_IHC_DCFE2_POWER_UP_INT_XIRQ_IRQ_SEL 14 14 DCPG_IHC_DCFE3_POWER_UP_INT_XIRQ_IRQ_SEL 15 15 DCPG_IHC_DCFE4_POWER_UP_INT_XIRQ_IRQ_SEL 16 16 DCPG_IHC_DCFE5_POWER_UP_INT_XIRQ_IRQ_SEL 17 17 DCPG_IHC_DCFE0_POWER_DOWN_INT_XIRQ_IRQ_SEL 18 18 DCPG_IHC_DCFE1_POWER_DOWN_INT_XIRQ_IRQ_SEL 19 19 DCPG_IHC_DCFE2_POWER_DOWN_INT_XIRQ_IRQ_SEL 20 20 DCPG_IHC_DCFE3_POWER_DOWN_INT_XIRQ_IRQ_SEL 21 21 DCPG_IHC_DCFE4_POWER_DOWN_INT_XIRQ_IRQ_SEL 22 22 DCPG_IHC_DCFE5_POWER_DOWN_INT_XIRQ_IRQ_SEL 23 23 VBLANK1_INT_XIRQ_IRQ_SEL 24 24 VBLANK2_INT_XIRQ_IRQ_SEL 25 25 VBLANK3_INT_XIRQ_IRQ_SEL 26 26 VBLANK4_INT_XIRQ_IRQ_SEL 27 27 VBLANK5_INT_XIRQ_IRQ_SEL 28 28 VBLANK6_INT_XIRQ_IRQ_SEL 29 29 STATIC_SCREEN6_INT_XIRQ_IRQ_SEL 30 30 mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL_1 0 0x1632 7 0 4294967295 DCPG_IHC_DCFEV0_POWER_UP_INT_XIRQ_IRQ_SEL 0 0 DCPG_IHC_DCFEV0_POWER_DOWN_INT_XIRQ_IRQ_SEL 1 1 DCFEV0_VBLANK_INT_XIRQ_IRQ_SEL 2 2 DCPG_IHC_DCFEV1_POWER_UP_INT_XIRQ_IRQ_SEL 3 3 DCPG_IHC_DCFEV1_POWER_DOWN_INT_XIRQ_IRQ_SEL 4 4 DCFEV1_VBLANK_INT_XIRQ_IRQ_SEL 5 5 DMCU_GENERIC_INT_XIRQ_IRQ_SEL 13 13 mmDC_DMCU_SCRATCH 0 0x1618 1 0 4294967295 DMCU_SCRATCH 0 31 mmDMCU_INT_CNT 0 0x1619 3 0 4294967295 DMCU_ABM1_HG_READY_INT_CNT 0 7 DMCU_ABM1_LS_READY_INT_CNT 8 15 DMCU_ABM1_BL_UPDATE_INT_CNT 16 23 mmDMCU_FW_CHECKSUM_SMPL_BYTE_POS 0 0x161a 2 0 4294967295 DMCU_FW_CHECKSUM_LO_SMPL_BYTE_POS 0 1 DMCU_FW_CHECKSUM_HI_SMPL_BYTE_POS 2 3 mmDMCU_UC_CLK_GATING_CNTL 0 0x161b 3 0 4294967295 UC_IRAM_RD_DELAY 0 2 UC_ERAM_RD_DELAY 8 10 UC_RBBM_RD_CLK_GATING_EN 16 16 mmMASTER_COMM_DATA_REG1 0 0x161c 4 0 4294967295 MASTER_COMM_DATA_REG1_BYTE0 0 7 MASTER_COMM_DATA_REG1_BYTE1 8 15 MASTER_COMM_DATA_REG1_BYTE2 16 23 MASTER_COMM_DATA_REG1_BYTE3 24 31 mmMASTER_COMM_DATA_REG2 0 0x161d 4 0 4294967295 MASTER_COMM_DATA_REG2_BYTE0 0 7 MASTER_COMM_DATA_REG2_BYTE1 8 15 MASTER_COMM_DATA_REG2_BYTE2 16 23 MASTER_COMM_DATA_REG2_BYTE3 24 31 mmMASTER_COMM_DATA_REG3 0 0x161e 4 0 4294967295 MASTER_COMM_DATA_REG3_BYTE0 0 7 MASTER_COMM_DATA_REG3_BYTE1 8 15 MASTER_COMM_DATA_REG3_BYTE2 16 23 MASTER_COMM_DATA_REG3_BYTE3 24 31 mmMASTER_COMM_CMD_REG 0 0x161f 4 0 4294967295 MASTER_COMM_CMD_REG_BYTE0 0 7 MASTER_COMM_CMD_REG_BYTE1 8 15 MASTER_COMM_CMD_REG_BYTE2 16 23 MASTER_COMM_CMD_REG_BYTE3 24 31 mmMASTER_COMM_CNTL_REG 0 0x1620 1 0 4294967295 MASTER_COMM_INTERRUPT 0 0 mmSLAVE_COMM_DATA_REG1 0 0x1621 4 0 4294967295 SLAVE_COMM_DATA_REG1_BYTE0 0 7 SLAVE_COMM_DATA_REG1_BYTE1 8 15 SLAVE_COMM_DATA_REG1_BYTE2 16 23 SLAVE_COMM_DATA_REG1_BYTE3 24 31 mmSLAVE_COMM_DATA_REG2 0 0x1622 4 0 4294967295 SLAVE_COMM_DATA_REG2_BYTE0 0 7 SLAVE_COMM_DATA_REG2_BYTE1 8 15 SLAVE_COMM_DATA_REG2_BYTE2 16 23 SLAVE_COMM_DATA_REG2_BYTE3 24 31 mmSLAVE_COMM_DATA_REG3 0 0x1623 4 0 4294967295 SLAVE_COMM_DATA_REG3_BYTE0 0 7 SLAVE_COMM_DATA_REG3_BYTE1 8 15 SLAVE_COMM_DATA_REG3_BYTE2 16 23 SLAVE_COMM_DATA_REG3_BYTE3 24 31 mmSLAVE_COMM_CMD_REG 0 0x1624 4 0 4294967295 SLAVE_COMM_CMD_REG_BYTE0 0 7 SLAVE_COMM_CMD_REG_BYTE1 8 15 SLAVE_COMM_CMD_REG_BYTE2 16 23 SLAVE_COMM_CMD_REG_BYTE3 24 31 mmSLAVE_COMM_CNTL_REG 0 0x1625 2 0 4294967295 SLAVE_COMM_INTERRUPT 0 0 COMM_PORT_MSG_TO_HOST_IN_PROGRESS 8 8 mmDMCU_TEST_DEBUG_INDEX 0 0x1626 2 0 4294967295 DMCU_TEST_DEBUG_INDEX 0 7 DMCU_TEST_DEBUG_WRITE_EN 8 8 mmDMCU_TEST_DEBUG_DATA 0 0x1627 1 0 4294967295 DMCU_TEST_DEBUG_DATA 0 31 mmDMCU_PERFMON_INTERRUPT_STATUS1 0 0x1644 54 0 4294967295 DCI_PERFMON_COUNTER0_INT_OCCURRED 0 0 DCI_PERFMON_COUNTER0_INT_CLEAR 0 0 DCI_PERFMON_COUNTER1_INT_OCCURRED 1 1 DCI_PERFMON_COUNTER1_INT_CLEAR 1 1 DCI_PERFMON_COUNTER2_INT_OCCURRED 2 2 DCI_PERFMON_COUNTER2_INT_CLEAR 2 2 DCI_PERFMON_COUNTER3_INT_OCCURRED 3 3 DCI_PERFMON_COUNTER3_INT_CLEAR 3 3 DCI_PERFMON_COUNTER4_INT_OCCURRED 4 4 DCI_PERFMON_COUNTER4_INT_CLEAR 4 4 DCI_PERFMON_COUNTER5_INT_OCCURRED 5 5 DCI_PERFMON_COUNTER5_INT_CLEAR 5 5 DCI_PERFMON_COUNTER6_INT_OCCURRED 6 6 DCI_PERFMON_COUNTER6_INT_CLEAR 6 6 DCI_PERFMON_COUNTER7_INT_OCCURRED 7 7 DCI_PERFMON_COUNTER7_INT_CLEAR 7 7 DCO_PERFMON_COUNTER0_INT_OCCURRED 8 8 DCO_PERFMON_COUNTER0_INT_CLEAR 8 8 DCO_PERFMON_COUNTER1_INT_OCCURRED 9 9 DCO_PERFMON_COUNTER1_INT_CLEAR 9 9 DCO_PERFMON_COUNTER2_INT_OCCURRED 10 10 DCO_PERFMON_COUNTER2_INT_CLEAR 10 10 DCO_PERFMON_COUNTER3_INT_OCCURRED 11 11 DCO_PERFMON_COUNTER3_INT_CLEAR 11 11 DCO_PERFMON_COUNTER4_INT_OCCURRED 12 12 DCO_PERFMON_COUNTER4_INT_CLEAR 12 12 DCO_PERFMON_COUNTER5_INT_OCCURRED 13 13 DCO_PERFMON_COUNTER5_INT_CLEAR 13 13 DCO_PERFMON_COUNTER6_INT_OCCURRED 14 14 DCO_PERFMON_COUNTER6_INT_CLEAR 14 14 DCO_PERFMON_COUNTER7_INT_OCCURRED 15 15 DCO_PERFMON_COUNTER7_INT_CLEAR 15 15 DCCG_PERFMON_COUNTER0_INT_OCCURRED 16 16 DCCG_PERFMON_COUNTER0_INT_CLEAR 16 16 DCCG_PERFMON_COUNTER1_INT_OCCURRED 17 17 DCCG_PERFMON_COUNTER1_INT_CLEAR 17 17 DCCG_PERFMON_COUNTER2_INT_OCCURRED 18 18 DCCG_PERFMON_COUNTER2_INT_CLEAR 18 18 DCCG_PERFMON_COUNTER3_INT_OCCURRED 19 19 DCCG_PERFMON_COUNTER3_INT_CLEAR 19 19 DCCG_PERFMON_COUNTER4_INT_OCCURRED 20 20 DCCG_PERFMON_COUNTER4_INT_CLEAR 20 20 DCCG_PERFMON_COUNTER5_INT_OCCURRED 21 21 DCCG_PERFMON_COUNTER5_INT_CLEAR 21 21 DCCG_PERFMON_COUNTER6_INT_OCCURRED 22 22 DCCG_PERFMON_COUNTER6_INT_CLEAR 22 22 DCCG_PERFMON_COUNTER7_INT_OCCURRED 23 23 DCCG_PERFMON_COUNTER7_INT_CLEAR 23 23 DCI_PERFMON_COUNTER_OFF_INT_OCCURRED 24 24 DCI_PERFMON_COUNTER_OFF_INT_CLEAR 24 24 DCO_PERFMON_COUNTER_OFF_INT_OCCURRED 25 25 DCO_PERFMON_COUNTER_OFF_INT_CLEAR 25 25 DCCG_PERFMON_COUNTER_OFF_INT_OCCURRED 26 26 DCCG_PERFMON_COUNTER_OFF_INT_CLEAR 26 26 mmDMCU_PERFMON_INTERRUPT_STATUS2 0 0x1645 54 0 4294967295 DCFE0_PERFMON_COUNTER0_INT_OCCURRED 0 0 DCFE0_PERFMON_COUNTER0_INT_CLEAR 0 0 DCFE0_PERFMON_COUNTER1_INT_OCCURRED 1 1 DCFE0_PERFMON_COUNTER1_INT_CLEAR 1 1 DCFE0_PERFMON_COUNTER2_INT_OCCURRED 2 2 DCFE0_PERFMON_COUNTER2_INT_CLEAR 2 2 DCFE0_PERFMON_COUNTER3_INT_OCCURRED 3 3 DCFE0_PERFMON_COUNTER3_INT_CLEAR 3 3 DCFE0_PERFMON_COUNTER4_INT_OCCURRED 4 4 DCFE0_PERFMON_COUNTER4_INT_CLEAR 4 4 DCFE0_PERFMON_COUNTER5_INT_OCCURRED 5 5 DCFE0_PERFMON_COUNTER5_INT_CLEAR 5 5 DCFE0_PERFMON_COUNTER6_INT_OCCURRED 6 6 DCFE0_PERFMON_COUNTER6_INT_CLEAR 6 6 DCFE0_PERFMON_COUNTER7_INT_OCCURRED 7 7 DCFE0_PERFMON_COUNTER7_INT_CLEAR 7 7 DCFE1_PERFMON_COUNTER0_INT_OCCURRED 8 8 DCFE1_PERFMON_COUNTER0_INT_CLEAR 8 8 DCFE1_PERFMON_COUNTER1_INT_OCCURRED 9 9 DCFE1_PERFMON_COUNTER1_INT_CLEAR 9 9 DCFE1_PERFMON_COUNTER2_INT_OCCURRED 10 10 DCFE1_PERFMON_COUNTER2_INT_CLEAR 10 10 DCFE1_PERFMON_COUNTER3_INT_OCCURRED 11 11 DCFE1_PERFMON_COUNTER3_INT_CLEAR 11 11 DCFE1_PERFMON_COUNTER4_INT_OCCURRED 12 12 DCFE1_PERFMON_COUNTER4_INT_CLEAR 12 12 DCFE1_PERFMON_COUNTER5_INT_OCCURRED 13 13 DCFE1_PERFMON_COUNTER5_INT_CLEAR 13 13 DCFE1_PERFMON_COUNTER6_INT_OCCURRED 14 14 DCFE1_PERFMON_COUNTER6_INT_CLEAR 14 14 DCFE1_PERFMON_COUNTER7_INT_OCCURRED 15 15 DCFE1_PERFMON_COUNTER7_INT_CLEAR 15 15 DCFE2_PERFMON_COUNTER0_INT_OCCURRED 16 16 DCFE2_PERFMON_COUNTER0_INT_CLEAR 16 16 DCFE2_PERFMON_COUNTER1_INT_OCCURRED 17 17 DCFE2_PERFMON_COUNTER1_INT_CLEAR 17 17 DCFE2_PERFMON_COUNTER2_INT_OCCURRED 18 18 DCFE2_PERFMON_COUNTER2_INT_CLEAR 18 18 DCFE2_PERFMON_COUNTER3_INT_OCCURRED 19 19 DCFE2_PERFMON_COUNTER3_INT_CLEAR 19 19 DCFE2_PERFMON_COUNTER4_INT_OCCURRED 20 20 DCFE2_PERFMON_COUNTER4_INT_CLEAR 20 20 DCFE2_PERFMON_COUNTER5_INT_OCCURRED 21 21 DCFE2_PERFMON_COUNTER5_INT_CLEAR 21 21 DCFE2_PERFMON_COUNTER6_INT_OCCURRED 22 22 DCFE2_PERFMON_COUNTER6_INT_CLEAR 22 22 DCFE2_PERFMON_COUNTER7_INT_OCCURRED 23 23 DCFE2_PERFMON_COUNTER7_INT_CLEAR 23 23 DCFE0_PERFMON_COUNTER_OFF_INT_OCCURRED 24 24 DCFE0_PERFMON_COUNTER_OFF_INT_CLEAR 24 24 DCFE1_PERFMON_COUNTER_OFF_INT_OCCURRED 25 25 DCFE1_PERFMON_COUNTER_OFF_INT_CLEAR 25 25 DCFE2_PERFMON_COUNTER_OFF_INT_OCCURRED 26 26 DCFE2_PERFMON_COUNTER_OFF_INT_CLEAR 26 26 mmDMCU_PERFMON_INTERRUPT_STATUS3 0 0x1646 54 0 4294967295 DCFE3_PERFMON_COUNTER0_INT_OCCURRED 0 0 DCFE3_PERFMON_COUNTER0_INT_CLEAR 0 0 DCFE3_PERFMON_COUNTER1_INT_OCCURRED 1 1 DCFE3_PERFMON_COUNTER1_INT_CLEAR 1 1 DCFE3_PERFMON_COUNTER2_INT_OCCURRED 2 2 DCFE3_PERFMON_COUNTER2_INT_CLEAR 2 2 DCFE3_PERFMON_COUNTER3_INT_OCCURRED 3 3 DCFE3_PERFMON_COUNTER3_INT_CLEAR 3 3 DCFE3_PERFMON_COUNTER4_INT_OCCURRED 4 4 DCFE3_PERFMON_COUNTER4_INT_CLEAR 4 4 DCFE3_PERFMON_COUNTER5_INT_OCCURRED 5 5 DCFE3_PERFMON_COUNTER5_INT_CLEAR 5 5 DCFE3_PERFMON_COUNTER6_INT_OCCURRED 6 6 DCFE3_PERFMON_COUNTER6_INT_CLEAR 6 6 DCFE3_PERFMON_COUNTER7_INT_OCCURRED 7 7 DCFE3_PERFMON_COUNTER7_INT_CLEAR 7 7 DCFE4_PERFMON_COUNTER0_INT_OCCURRED 8 8 DCFE4_PERFMON_COUNTER0_INT_CLEAR 8 8 DCFE4_PERFMON_COUNTER1_INT_OCCURRED 9 9 DCFE4_PERFMON_COUNTER1_INT_CLEAR 9 9 DCFE4_PERFMON_COUNTER2_INT_OCCURRED 10 10 DCFE4_PERFMON_COUNTER2_INT_CLEAR 10 10 DCFE4_PERFMON_COUNTER3_INT_OCCURRED 11 11 DCFE4_PERFMON_COUNTER3_INT_CLEAR 11 11 DCFE4_PERFMON_COUNTER4_INT_OCCURRED 12 12 DCFE4_PERFMON_COUNTER4_INT_CLEAR 12 12 DCFE4_PERFMON_COUNTER5_INT_OCCURRED 13 13 DCFE4_PERFMON_COUNTER5_INT_CLEAR 13 13 DCFE4_PERFMON_COUNTER6_INT_OCCURRED 14 14 DCFE4_PERFMON_COUNTER6_INT_CLEAR 14 14 DCFE4_PERFMON_COUNTER7_INT_OCCURRED 15 15 DCFE4_PERFMON_COUNTER7_INT_CLEAR 15 15 DCFE5_PERFMON_COUNTER0_INT_OCCURRED 16 16 DCFE5_PERFMON_COUNTER0_INT_CLEAR 16 16 DCFE5_PERFMON_COUNTER1_INT_OCCURRED 17 17 DCFE5_PERFMON_COUNTER1_INT_CLEAR 17 17 DCFE5_PERFMON_COUNTER2_INT_OCCURRED 18 18 DCFE5_PERFMON_COUNTER2_INT_CLEAR 18 18 DCFE5_PERFMON_COUNTER3_INT_OCCURRED 19 19 DCFE5_PERFMON_COUNTER3_INT_CLEAR 19 19 DCFE5_PERFMON_COUNTER4_INT_OCCURRED 20 20 DCFE5_PERFMON_COUNTER4_INT_CLEAR 20 20 DCFE5_PERFMON_COUNTER5_INT_OCCURRED 21 21 DCFE5_PERFMON_COUNTER5_INT_CLEAR 21 21 DCFE5_PERFMON_COUNTER6_INT_OCCURRED 22 22 DCFE5_PERFMON_COUNTER6_INT_CLEAR 22 22 DCFE5_PERFMON_COUNTER7_INT_OCCURRED 23 23 DCFE5_PERFMON_COUNTER7_INT_CLEAR 23 23 DCFE3_PERFMON_COUNTER_OFF_INT_OCCURRED 24 24 DCFE3_PERFMON_COUNTER_OFF_INT_CLEAR 24 24 DCFE4_PERFMON_COUNTER_OFF_INT_OCCURRED 25 25 DCFE4_PERFMON_COUNTER_OFF_INT_CLEAR 25 25 DCFE5_PERFMON_COUNTER_OFF_INT_OCCURRED 26 26 DCFE5_PERFMON_COUNTER_OFF_INT_CLEAR 26 26 mmDMCU_PERFMON_INTERRUPT_STATUS4 0 0x1647 54 0 4294967295 WB_PERFMON_COUNTER0_INT_OCCURRED 0 0 WB_PERFMON_COUNTER0_INT_CLEAR 0 0 WB_PERFMON_COUNTER1_INT_OCCURRED 1 1 WB_PERFMON_COUNTER1_INT_CLEAR 1 1 WB_PERFMON_COUNTER2_INT_OCCURRED 2 2 WB_PERFMON_COUNTER2_INT_CLEAR 2 2 WB_PERFMON_COUNTER3_INT_OCCURRED 3 3 WB_PERFMON_COUNTER3_INT_CLEAR 3 3 WB_PERFMON_COUNTER4_INT_OCCURRED 4 4 WB_PERFMON_COUNTER4_INT_CLEAR 4 4 WB_PERFMON_COUNTER5_INT_OCCURRED 5 5 WB_PERFMON_COUNTER5_INT_CLEAR 5 5 WB_PERFMON_COUNTER6_INT_OCCURRED 6 6 WB_PERFMON_COUNTER6_INT_CLEAR 6 6 WB_PERFMON_COUNTER7_INT_OCCURRED 7 7 WB_PERFMON_COUNTER7_INT_CLEAR 7 7 DCRX_PERFMON_COUNTER0_INT_OCCURRED 8 8 DCRX_PERFMON_COUNTER0_INT_CLEAR 8 8 DCRX_PERFMON_COUNTER1_INT_OCCURRED 9 9 DCRX_PERFMON_COUNTER1_INT_CLEAR 9 9 DCRX_PERFMON_COUNTER2_INT_OCCURRED 10 10 DCRX_PERFMON_COUNTER2_INT_CLEAR 10 10 DCRX_PERFMON_COUNTER3_INT_OCCURRED 11 11 DCRX_PERFMON_COUNTER3_INT_CLEAR 11 11 DCRX_PERFMON_COUNTER4_INT_OCCURRED 12 12 DCRX_PERFMON_COUNTER4_INT_CLEAR 12 12 DCRX_PERFMON_COUNTER5_INT_OCCURRED 13 13 DCRX_PERFMON_COUNTER5_INT_CLEAR 13 13 DCRX_PERFMON_COUNTER6_INT_OCCURRED 14 14 DCRX_PERFMON_COUNTER6_INT_CLEAR 14 14 DCRX_PERFMON_COUNTER7_INT_OCCURRED 15 15 DCRX_PERFMON_COUNTER7_INT_CLEAR 15 15 DCCG_PERFMON2_COUNTER0_INT_OCCURRED 16 16 DCCG_PERFMON2_COUNTER0_INT_CLEAR 16 16 DCCG_PERFMON2_COUNTER1_INT_OCCURRED 17 17 DCCG_PERFMON2_COUNTER1_INT_CLEAR 17 17 DCCG_PERFMON2_COUNTER2_INT_OCCURRED 18 18 DCCG_PERFMON2_COUNTER2_INT_CLEAR 18 18 DCCG_PERFMON2_COUNTER3_INT_OCCURRED 19 19 DCCG_PERFMON2_COUNTER3_INT_CLEAR 19 19 DCCG_PERFMON2_COUNTER4_INT_OCCURRED 20 20 DCCG_PERFMON2_COUNTER4_INT_CLEAR 20 20 DCCG_PERFMON2_COUNTER5_INT_OCCURRED 21 21 DCCG_PERFMON2_COUNTER5_INT_CLEAR 21 21 DCCG_PERFMON2_COUNTER6_INT_OCCURRED 22 22 DCCG_PERFMON2_COUNTER6_INT_CLEAR 22 22 DCCG_PERFMON2_COUNTER7_INT_OCCURRED 23 23 DCCG_PERFMON2_COUNTER7_INT_CLEAR 23 23 WB_PERFMON_COUNTER_OFF_INT_OCCURRED 24 24 WB_PERFMON_COUNTER_OFF_INT_CLEAR 24 24 DCRX_PERFMON_COUNTER_OFF_INT_OCCURRED 25 25 DCRX_PERFMON_COUNTER_OFF_INT_CLEAR 25 25 DCCG_PERFMON2_COUNTER_OFF_INT_OCCURRED 26 26 DCCG_PERFMON2_COUNTER_OFF_INT_CLEAR 26 26 mmDMCU_PERFMON_INTERRUPT_STATUS5 0 0x1642 36 0 4294967295 DCFEV0_PERFMON_COUNTER0_INT_OCCURRED 0 0 DCFEV0_PERFMON_COUNTER0_INT_CLEAR 0 0 DCFEV0_PERFMON_COUNTER1_INT_OCCURRED 1 1 DCFEV0_PERFMON_COUNTER1_INT_CLEAR 1 1 DCFEV0_PERFMON_COUNTER2_INT_OCCURRED 2 2 DCFEV0_PERFMON_COUNTER2_INT_CLEAR 2 2 DCFEV0_PERFMON_COUNTER3_INT_OCCURRED 3 3 DCFEV0_PERFMON_COUNTER3_INT_CLEAR 3 3 DCFEV0_PERFMON_COUNTER4_INT_OCCURRED 4 4 DCFEV0_PERFMON_COUNTER4_INT_CLEAR 4 4 DCFEV0_PERFMON_COUNTER5_INT_OCCURRED 5 5 DCFEV0_PERFMON_COUNTER5_INT_CLEAR 5 5 DCFEV0_PERFMON_COUNTER6_INT_OCCURRED 6 6 DCFEV0_PERFMON_COUNTER6_INT_CLEAR 6 6 DCFEV0_PERFMON_COUNTER7_INT_OCCURRED 7 7 DCFEV0_PERFMON_COUNTER7_INT_CLEAR 7 7 DCFEV1_PERFMON_COUNTER0_INT_OCCURRED 8 8 DCFEV1_PERFMON_COUNTER0_INT_CLEAR 8 8 DCFEV1_PERFMON_COUNTER1_INT_OCCURRED 9 9 DCFEV1_PERFMON_COUNTER1_INT_CLEAR 9 9 DCFEV1_PERFMON_COUNTER2_INT_OCCURRED 10 10 DCFEV1_PERFMON_COUNTER2_INT_CLEAR 10 10 DCFEV1_PERFMON_COUNTER3_INT_OCCURRED 11 11 DCFEV1_PERFMON_COUNTER3_INT_CLEAR 11 11 DCFEV1_PERFMON_COUNTER4_INT_OCCURRED 12 12 DCFEV1_PERFMON_COUNTER4_INT_CLEAR 12 12 DCFEV1_PERFMON_COUNTER5_INT_OCCURRED 13 13 DCFEV1_PERFMON_COUNTER5_INT_CLEAR 13 13 DCFEV1_PERFMON_COUNTER6_INT_OCCURRED 14 14 DCFEV1_PERFMON_COUNTER6_INT_CLEAR 14 14 DCFEV1_PERFMON_COUNTER7_INT_OCCURRED 15 15 DCFEV1_PERFMON_COUNTER7_INT_CLEAR 15 15 DCFEV0_PERFMON_COUNTER_OFF_INT_OCCURRED 16 16 DCFEV0_PERFMON_COUNTER_OFF_INT_CLEAR 16 16 DCFEV1_PERFMON_COUNTER_OFF_INT_OCCURRED 17 17 DCFEV1_PERFMON_COUNTER_OFF_INT_CLEAR 17 17 mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 0 0x1674 27 0 4294967295 DCI_PERFMON_COUNTER0_INT_TO_UC_EN 0 0 DCI_PERFMON_COUNTER1_INT_TO_UC_EN 1 1 DCI_PERFMON_COUNTER2_INT_TO_UC_EN 2 2 DCI_PERFMON_COUNTER3_INT_TO_UC_EN 3 3 DCI_PERFMON_COUNTER4_INT_TO_UC_EN 4 4 DCI_PERFMON_COUNTER5_INT_TO_UC_EN 5 5 DCI_PERFMON_COUNTER6_INT_TO_UC_EN 6 6 DCI_PERFMON_COUNTER7_INT_TO_UC_EN 7 7 DCO_PERFMON_COUNTER0_INT_TO_UC_EN 8 8 DCO_PERFMON_COUNTER1_INT_TO_UC_EN 9 9 DCO_PERFMON_COUNTER2_INT_TO_UC_EN 10 10 DCO_PERFMON_COUNTER3_INT_TO_UC_EN 11 11 DCO_PERFMON_COUNTER4_INT_TO_UC_EN 12 12 DCO_PERFMON_COUNTER5_INT_TO_UC_EN 13 13 DCO_PERFMON_COUNTER6_INT_TO_UC_EN 14 14 DCO_PERFMON_COUNTER7_INT_TO_UC_EN 15 15 DCCG_PERFMON_COUNTER0_INT_TO_UC_EN 16 16 DCCG_PERFMON_COUNTER1_INT_TO_UC_EN 17 17 DCCG_PERFMON_COUNTER2_INT_TO_UC_EN 18 18 DCCG_PERFMON_COUNTER3_INT_TO_UC_EN 19 19 DCCG_PERFMON_COUNTER4_INT_TO_UC_EN 20 20 DCCG_PERFMON_COUNTER5_INT_TO_UC_EN 21 21 DCCG_PERFMON_COUNTER6_INT_TO_UC_EN 22 22 DCCG_PERFMON_COUNTER7_INT_TO_UC_EN 23 23 DCI_PERFMON_COUNTER_OFF_INT_TO_UC_EN 24 24 DCO_PERFMON_COUNTER_OFF_INT_TO_UC_EN 25 25 DCCG_PERFMON_COUNTER_OFF_INT_TO_UC_EN 26 26 mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK2 0 0x1675 27 0 4294967295 DCFE0_PERFMON_COUNTER0_INT_TO_UC_EN 0 0 DCFE0_PERFMON_COUNTER1_INT_TO_UC_EN 1 1 DCFE0_PERFMON_COUNTER2_INT_TO_UC_EN 2 2 DCFE0_PERFMON_COUNTER3_INT_TO_UC_EN 3 3 DCFE0_PERFMON_COUNTER4_INT_TO_UC_EN 4 4 DCFE0_PERFMON_COUNTER5_INT_TO_UC_EN 5 5 DCFE0_PERFMON_COUNTER6_INT_TO_UC_EN 6 6 DCFE0_PERFMON_COUNTER7_INT_TO_UC_EN 7 7 DCFE1_PERFMON_COUNTER0_INT_TO_UC_EN 8 8 DCFE1_PERFMON_COUNTER1_INT_TO_UC_EN 9 9 DCFE1_PERFMON_COUNTER2_INT_TO_UC_EN 10 10 DCFE1_PERFMON_COUNTER3_INT_TO_UC_EN 11 11 DCFE1_PERFMON_COUNTER4_INT_TO_UC_EN 12 12 DCFE1_PERFMON_COUNTER5_INT_TO_UC_EN 13 13 DCFE1_PERFMON_COUNTER6_INT_TO_UC_EN 14 14 DCFE1_PERFMON_COUNTER7_INT_TO_UC_EN 15 15 DCFE2_PERFMON_COUNTER0_INT_TO_UC_EN 16 16 DCFE2_PERFMON_COUNTER1_INT_TO_UC_EN 17 17 DCFE2_PERFMON_COUNTER2_INT_TO_UC_EN 18 18 DCFE2_PERFMON_COUNTER3_INT_TO_UC_EN 19 19 DCFE2_PERFMON_COUNTER4_INT_TO_UC_EN 20 20 DCFE2_PERFMON_COUNTER5_INT_TO_UC_EN 21 21 DCFE2_PERFMON_COUNTER6_INT_TO_UC_EN 22 22 DCFE2_PERFMON_COUNTER7_INT_TO_UC_EN 23 23 DCFE0_PERFMON_COUNTER_OFF_INT_TO_UC_EN 24 24 DCFE1_PERFMON_COUNTER_OFF_INT_TO_UC_EN 25 25 DCFE2_PERFMON_COUNTER_OFF_INT_TO_UC_EN 26 26 mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK3 0 0x1676 27 0 4294967295 DCFE3_PERFMON_COUNTER0_INT_TO_UC_EN 0 0 DCFE3_PERFMON_COUNTER1_INT_TO_UC_EN 1 1 DCFE3_PERFMON_COUNTER2_INT_TO_UC_EN 2 2 DCFE3_PERFMON_COUNTER3_INT_TO_UC_EN 3 3 DCFE3_PERFMON_COUNTER4_INT_TO_UC_EN 4 4 DCFE3_PERFMON_COUNTER5_INT_TO_UC_EN 5 5 DCFE3_PERFMON_COUNTER6_INT_TO_UC_EN 6 6 DCFE3_PERFMON_COUNTER7_INT_TO_UC_EN 7 7 DCFE4_PERFMON_COUNTER0_INT_TO_UC_EN 8 8 DCFE4_PERFMON_COUNTER1_INT_TO_UC_EN 9 9 DCFE4_PERFMON_COUNTER2_INT_TO_UC_EN 10 10 DCFE4_PERFMON_COUNTER3_INT_TO_UC_EN 11 11 DCFE4_PERFMON_COUNTER4_INT_TO_UC_EN 12 12 DCFE4_PERFMON_COUNTER5_INT_TO_UC_EN 13 13 DCFE4_PERFMON_COUNTER6_INT_TO_UC_EN 14 14 DCFE4_PERFMON_COUNTER7_INT_TO_UC_EN 15 15 DCFE5_PERFMON_COUNTER0_INT_TO_UC_EN 16 16 DCFE5_PERFMON_COUNTER1_INT_TO_UC_EN 17 17 DCFE5_PERFMON_COUNTER2_INT_TO_UC_EN 18 18 DCFE5_PERFMON_COUNTER3_INT_TO_UC_EN 19 19 DCFE5_PERFMON_COUNTER4_INT_TO_UC_EN 20 20 DCFE5_PERFMON_COUNTER5_INT_TO_UC_EN 21 21 DCFE5_PERFMON_COUNTER6_INT_TO_UC_EN 22 22 DCFE5_PERFMON_COUNTER7_INT_TO_UC_EN 23 23 DCFE3_PERFMON_COUNTER_OFF_INT_TO_UC_EN 24 24 DCFE4_PERFMON_COUNTER_OFF_INT_TO_UC_EN 25 25 DCFE5_PERFMON_COUNTER_OFF_INT_TO_UC_EN 26 26 mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0 0x1677 27 0 4294967295 WB_PERFMON_COUNTER0_INT_TO_UC_EN 0 0 WB_PERFMON_COUNTER1_INT_TO_UC_EN 1 1 WB_PERFMON_COUNTER2_INT_TO_UC_EN 2 2 WB_PERFMON_COUNTER3_INT_TO_UC_EN 3 3 WB_PERFMON_COUNTER4_INT_TO_UC_EN 4 4 WB_PERFMON_COUNTER5_INT_TO_UC_EN 5 5 WB_PERFMON_COUNTER6_INT_TO_UC_EN 6 6 WB_PERFMON_COUNTER7_INT_TO_UC_EN 7 7 DCRX_PERFMON_COUNTER0_INT_TO_UC_EN 8 8 DCRX_PERFMON_COUNTER1_INT_TO_UC_EN 9 9 DCRX_PERFMON_COUNTER2_INT_TO_UC_EN 10 10 DCRX_PERFMON_COUNTER3_INT_TO_UC_EN 11 11 DCRX_PERFMON_COUNTER4_INT_TO_UC_EN 12 12 DCRX_PERFMON_COUNTER5_INT_TO_UC_EN 13 13 DCRX_PERFMON_COUNTER6_INT_TO_UC_EN 14 14 DCRX_PERFMON_COUNTER7_INT_TO_UC_EN 15 15 DCCG_PERFMON2_COUNTER0_INT_TO_UC_EN 16 16 DCCG_PERFMON2_COUNTER1_INT_TO_UC_EN 17 17 DCCG_PERFMON2_COUNTER2_INT_TO_UC_EN 18 18 DCCG_PERFMON2_COUNTER3_INT_TO_UC_EN 19 19 DCCG_PERFMON2_COUNTER4_INT_TO_UC_EN 20 20 DCCG_PERFMON2_COUNTER5_INT_TO_UC_EN 21 21 DCCG_PERFMON2_COUNTER6_INT_TO_UC_EN 22 22 DCCG_PERFMON2_COUNTER7_INT_TO_UC_EN 23 23 WB_PERFMON_COUNTER_OFF_INT_TO_UC_EN 24 24 DCRX_PERFMON_COUNTER_OFF_INT_TO_UC_EN 25 25 DCCG_PERFMON2_COUNTER_OFF_INT_TO_UC_EN 26 26 mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 0 0x1643 18 0 4294967295 DCFEV0_PERFMON_COUNTER0_INT_TO_UC_EN 0 0 DCFEV0_PERFMON_COUNTER1_INT_TO_UC_EN 1 1 DCFEV0_PERFMON_COUNTER2_INT_TO_UC_EN 2 2 DCFEV0_PERFMON_COUNTER3_INT_TO_UC_EN 3 3 DCFEV0_PERFMON_COUNTER4_INT_TO_UC_EN 4 4 DCFEV0_PERFMON_COUNTER5_INT_TO_UC_EN 5 5 DCFEV0_PERFMON_COUNTER6_INT_TO_UC_EN 6 6 DCFEV0_PERFMON_COUNTER7_INT_TO_UC_EN 7 7 DCFEV0_PERFMON_COUNTER_OFF_INT_TO_UC_EN 8 8 DCFEV1_PERFMON_COUNTER0_INT_TO_UC_EN 9 9 DCFEV1_PERFMON_COUNTER1_INT_TO_UC_EN 10 10 DCFEV1_PERFMON_COUNTER2_INT_TO_UC_EN 11 11 DCFEV1_PERFMON_COUNTER3_INT_TO_UC_EN 12 12 DCFEV1_PERFMON_COUNTER4_INT_TO_UC_EN 13 13 DCFEV1_PERFMON_COUNTER5_INT_TO_UC_EN 14 14 DCFEV1_PERFMON_COUNTER6_INT_TO_UC_EN 15 15 DCFEV1_PERFMON_COUNTER7_INT_TO_UC_EN 16 16 DCFEV1_PERFMON_COUNTER_OFF_INT_TO_UC_EN 17 17 mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL1 0 0x1678 27 0 4294967295 DCI_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 0 0 DCI_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 1 1 DCI_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 2 2 DCI_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 3 3 DCI_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 4 4 DCI_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 5 5 DCI_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 6 6 DCI_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 7 7 DCO_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 8 8 DCO_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 9 9 DCO_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 10 10 DCO_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 11 11 DCO_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 12 12 DCO_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 13 13 DCO_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 14 14 DCO_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 15 15 DCCG_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 16 16 DCCG_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 17 17 DCCG_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 18 18 DCCG_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 19 19 DCCG_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 20 20 DCCG_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 21 21 DCCG_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 22 22 DCCG_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 23 23 DCI_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 24 24 DCO_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 25 25 DCCG_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 26 26 mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL2 0 0x1679 27 0 4294967295 DCFE0_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 0 0 DCFE0_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 1 1 DCFE0_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 2 2 DCFE0_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 3 3 DCFE0_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 4 4 DCFE0_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 5 5 DCFE0_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 6 6 DCFE0_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 7 7 DCFE1_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 8 8 DCFE1_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 9 9 DCFE1_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 10 10 DCFE1_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 11 11 DCFE1_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 12 12 DCFE1_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 13 13 DCFE1_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 14 14 DCFE1_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 15 15 DCFE2_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 16 16 DCFE2_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 17 17 DCFE2_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 18 18 DCFE2_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 19 19 DCFE2_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 20 20 DCFE2_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 21 21 DCFE2_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 22 22 DCFE2_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 23 23 DCFE0_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 24 24 DCFE1_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 25 25 DCFE2_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 26 26 mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL3 0 0x167a 27 0 4294967295 DCFE3_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 0 0 DCFE3_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 1 1 DCFE3_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 2 2 DCFE3_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 3 3 DCFE3_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 4 4 DCFE3_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 5 5 DCFE3_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 6 6 DCFE3_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 7 7 DCFE4_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 8 8 DCFE4_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 9 9 DCFE4_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 10 10 DCFE4_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 11 11 DCFE4_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 12 12 DCFE4_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 13 13 DCFE4_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 14 14 DCFE4_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 15 15 DCFE5_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 16 16 DCFE5_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 17 17 DCFE5_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 18 18 DCFE5_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 19 19 DCFE5_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 20 20 DCFE5_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 21 21 DCFE5_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 22 22 DCFE5_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 23 23 DCFE3_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 24 24 DCFE4_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 25 25 DCFE5_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 26 26 mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 0 0x167b 27 0 4294967295 WB_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 0 0 WB_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 1 1 WB_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 2 2 WB_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 3 3 WB_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 4 4 WB_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 5 5 WB_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 6 6 WB_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 7 7 DCRX_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 8 8 DCRX_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 9 9 DCRX_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 10 10 DCRX_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 11 11 DCRX_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 12 12 DCRX_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 13 13 DCRX_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 14 14 DCRX_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 15 15 DCCG_PERFMON2_COUNTER0_INT_XIRQ_IRQ_SEL 16 16 DCCG_PERFMON2_COUNTER1_INT_XIRQ_IRQ_SEL 17 17 DCCG_PERFMON2_COUNTER2_INT_XIRQ_IRQ_SEL 18 18 DCCG_PERFMON2_COUNTER3_INT_XIRQ_IRQ_SEL 19 19 DCCG_PERFMON2_COUNTER4_INT_XIRQ_IRQ_SEL 20 20 DCCG_PERFMON2_COUNTER5_INT_XIRQ_IRQ_SEL 21 21 DCCG_PERFMON2_COUNTER6_INT_XIRQ_IRQ_SEL 22 22 DCCG_PERFMON2_COUNTER7_INT_XIRQ_IRQ_SEL 23 23 WB_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 24 24 DCRX_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 25 25 DCCG_PERFMON2_COUNTER_OFF_INT_XIRQ_IRQ_SEL 26 26 mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL5 0 0x1673 18 0 4294967295 DCFEV0_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 0 0 DCFEV0_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 1 1 DCFEV0_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 2 2 DCFEV0_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 3 3 DCFEV0_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 4 4 DCFEV0_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 5 5 DCFEV0_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 6 6 DCFEV0_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 7 7 DCFEV0_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 8 8 DCFEV1_PERFMON_COUNTER0_INT_XIRQ_IRQ_SEL 9 9 DCFEV1_PERFMON_COUNTER1_INT_XIRQ_IRQ_SEL 10 10 DCFEV1_PERFMON_COUNTER2_INT_XIRQ_IRQ_SEL 11 11 DCFEV1_PERFMON_COUNTER3_INT_XIRQ_IRQ_SEL 12 12 DCFEV1_PERFMON_COUNTER4_INT_XIRQ_IRQ_SEL 13 13 DCFEV1_PERFMON_COUNTER5_INT_XIRQ_IRQ_SEL 14 14 DCFEV1_PERFMON_COUNTER6_INT_XIRQ_IRQ_SEL 15 15 DCFEV1_PERFMON_COUNTER7_INT_XIRQ_IRQ_SEL 16 16 DCFEV1_PERFMON_COUNTER_OFF_INT_XIRQ_IRQ_SEL 17 17 mmDMCU_DPRX_INTERRUPT_STATUS1 0 0x1634 58 0 4294967295 DPRX_SD0P0_MSA_RECEIVED_INT_OCCURRED 0 0 DPRX_SD0P0_MSA_RECEIVED_INT_CLEAR 0 0 DPRX_SD0P0_VBID_VID_STREAM_STATUS_TOGGLED_INT_OCCURRED 1 1 DPRX_SD0P0_VBID_VID_STREAM_STATUS_TOGGLED_INT_CLEAR 1 1 DPRX_SD0P0_VERTICAL_INT0_OCCURRED 2 2 DPRX_SD0P0_VERTICAL_INT0_CLEAR 2 2 DPRX_SD0P0_VERTICAL_INT1_OCCURRED 3 3 DPRX_SD0P0_VERTICAL_INT1_CLEAR 3 3 DPRX_SD0P0_SDP_RECEIVED_INT_OCCURRED 4 4 DPRX_SD0P0_SDP_RECEIVED_INT_CLEAR 4 4 DPRX_SD1P0_MSA_RECEIVED_INT_OCCURRED 5 5 DPRX_SD1P0_MSA_RECEIVED_INT_CLEAR 5 5 DPRX_SD1P0_VBID_VID_STREAM_STATUS_TOGGLED_INT_OCCURRED 6 6 DPRX_SD1P0_VBID_VID_STREAM_STATUS_TOGGLED_INT_CLEAR 6 6 DPRX_SD1P0_VERTICAL_INT0_OCCURRED 7 7 DPRX_SD1P0_VERTICAL_INT0_CLEAR 7 7 DPRX_SD1P0_VERTICAL_INT1_OCCURRED 8 8 DPRX_SD1P0_VERTICAL_INT1_CLEAR 8 8 DPRX_SD1P0_SDP_RECEIVED_INT_OCCURRED 9 9 DPRX_SD1P0_SDP_RECEIVED_INT_CLEAR 9 9 DPRX_DPHY_P0_BS_INTERVAL_ERROR_THRESH_EXCEEDED_INT_OCCURRED 10 10 DPRX_DPHY_P0_BS_INTERVAL_ERROR_THRESH_EXCEEDED_INT_CLEAR 10 10 DPRX_DPHY_P0_SR_INTERVAL_ERROR_THRESH_EXCEEDED_INT_OCCURRED 11 11 DPRX_DPHY_P0_SR_INTERVAL_ERROR_THRESH_EXCEEDED_INT_CLEAR 11 11 DPRX_DPHY_P0_SYMBOL_ERROR_THRESH_EXCEEDED_INT_OCCURRED 12 12 DPRX_DPHY_P0_SYMBOL_ERROR_THRESH_EXCEEDED_INT_CLEAR 12 12 DPRX_DPHY_P0_DISPARITY_ERROR_THRESH_EXCEEDED_INT_OCCURRED 13 13 DPRX_DPHY_P0_DISPARITY_ERROR_THRESH_EXCEEDED_INT_CLEAR 13 13 DPRX_DPHY_P0_TRAINING_ERROR_THRESH_EXCEEDED_INT_OCCURRED 14 14 DPRX_DPHY_P0_TRAINING_ERROR_THRESH_EXCEEDED_INT_CLEAR 14 14 DPRX_DPHY_P0_TEST_PATTERN_ERROR_THRESH_EXCEEDED_INT_OCCURRED 15 15 DPRX_DPHY_P0_TEST_PATTERN_ERROR_THRESH_EXCEEDED_INT_CLEAR 15 15 DPRX_DPHY_P0_ECF_ERROR_THRESH_EXCEEDED_INT_OCCURRED 16 16 DPRX_DPHY_P0_ECF_ERROR_THRESH_EXCEEDED_INT_CLEAR 16 16 DPRX_DPHY_P0_DETECT_SR_LOCK_INT_OCCURRED 17 17 DPRX_DPHY_P0_DETECT_SR_LOCK_INT_CLEAR 17 17 DPRX_DPHY_P0_LOSS_OF_ALIGN_INT_OCCURRED 18 18 DPRX_DPHY_P0_LOSS_OF_ALIGN_INT_CLEAR 18 18 DPRX_DPHY_P0_LOSS_OF_DESKEW_INT_OCCURRED 19 19 DPRX_DPHY_P0_LOSS_OF_DESKEW_INT_CLEAR 19 19 DPRX_DPHY_P0_EXCESSIVE_ERROR_INT_OCCURRED 20 20 DPRX_DPHY_P0_EXCESSIVE_ERROR_INT_CLEAR 20 20 DPRX_DPHY_P0_DESKEW_FIFO_OVERFLOW_INT_OCCURRED 21 21 DPRX_DPHY_P0_DESKEW_FIFO_OVERFLOW_INT_CLEAR 21 21 DPRX_AUX_P0_AUX_INT_OCCURRED 22 22 DPRX_AUX_P0_AUX_INT_CLEAR 22 22 DPRX_AUX_P0_I2C_INT_OCCURRED 23 23 DPRX_AUX_P0_I2C_INT_CLEAR 23 23 DPRX_AUX_P0_CPU_INT_OCCURRED 24 24 DPRX_AUX_P0_CPU_INT_CLEAR 24 24 DPRX_AUX_P0_MSG1_TIMEOUT_INT_OCCURRED 25 25 DPRX_AUX_P0_MSG1_TIMEOUT_INT_CLEAR 25 25 DPRX_AUX_P0_MSG2_TIMEOUT_INT_OCCURRED 26 26 DPRX_AUX_P0_MSG2_TIMEOUT_INT_CLEAR 26 26 DPRX_AUX_P0_MSG3_TIMEOUT_INT_OCCURRED 27 27 DPRX_AUX_P0_MSG3_TIMEOUT_INT_CLEAR 27 27 DPRX_AUX_P0_MSG4_TIMEOUT_INT_OCCURRED 28 28 DPRX_AUX_P0_MSG4_TIMEOUT_INT_CLEAR 28 28 mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 0 0x1635 29 0 4294967295 DPRX_SD0P0_MSA_RECEIVED_INT_TO_UC_EN 0 0 DPRX_SD0P0_VBID_VID_STREAM_STATUS_TOGGLED_INT_TO_UC_EN 1 1 DPRX_SD0P0_VERTICAL_INT0_TO_UC_EN 2 2 DPRX_SD0P0_VERTICAL_INT1_TO_UC_EN 3 3 DPRX_SD0P0_SDP_RECEIVED_INT_TO_UC_EN 4 4 DPRX_SD1P0_MSA_RECEIVED_INT_TO_UC_EN 5 5 DPRX_SD1P0_VBID_VID_STREAM_STATUS_TOGGLED_INT_TO_UC_EN 6 6 DPRX_SD1P0_VERTICAL_INT0_TO_UC_EN 7 7 DPRX_SD1P0_VERTICAL_INT1_TO_UC_EN 8 8 DPRX_SD1P0_SDP_RECEIVED_INT_TO_UC_EN 9 9 DPRX_DPHY_P0_BS_INTERVAL_ERROR_THRESH_EXCEEDED_INT_TO_UC_EN 10 10 DPRX_DPHY_P0_SR_INTERVAL_ERROR_THRESH_EXCEEDED_INT_TO_UC_EN 11 11 DPRX_DPHY_P0_SYMBOL_ERROR_THRESH_EXCEEDED_INT_TO_UC_EN 12 12 DPRX_DPHY_P0_DISPARITY_ERROR_THRESH_EXCEEDED_INT_TO_UC_EN 13 13 DPRX_DPHY_P0_TRAINING_ERROR_THRESH_EXCEEDED_INT_TO_UC_EN 14 14 DPRX_DPHY_P0_TEST_PATTERN_ERROR_THRESH_EXCEEDED_INT_TO_UC_EN 15 15 DPRX_DPHY_P0_ECF_ERROR_THRESH_EXCEEDED_INT_TO_UC_EN 16 16 DPRX_DPHY_P0_DETECT_SR_LOCK_INT_TO_UC_EN 17 17 DPRX_DPHY_P0_LOSS_OF_ALIGN_INT_TO_UC_EN 18 18 DPRX_DPHY_P0_LOSS_OF_DESKEW_INT_TO_UC_EN 19 19 DPRX_DPHY_P0_EXCESSIVE_ERROR_INT_TO_UC_EN 20 20 DPRX_DPHY_P0_DESKEW_FIFO_OVERFLOW_INT_TO_UC_EN 21 21 DPRX_AUX_P0_AUX_INT_TO_UC_EN 22 22 DPRX_AUX_P0_I2C_INT_TO_UC_EN 23 23 DPRX_AUX_P0_CPU_INT_TO_UC_EN 24 24 DPRX_AUX_P0_MSG1_TIMEOUT_INT_TO_UC_EN 25 25 DPRX_AUX_P0_MSG2_TIMEOUT_INT_TO_UC_EN 26 26 DPRX_AUX_P0_MSG3_TIMEOUT_INT_TO_UC_EN 27 27 DPRX_AUX_P0_MSG4_TIMEOUT_INT_TO_UC_EN 28 28 mmDMCU_DPRX_INTERRUPT_TO_UC_XIRQ_IRQ_SEL1 0 0x1636 29 0 4294967295 DPRX_SD0P0_MSA_RECEIVED_INT_XIRQ_IRQ_SEL 0 0 DPRX_SD0P0_VBID_VID_STREAM_STATUS_TOGGLED_INT_XIRQ_IRQ_SEL 1 1 DPRX_SD0P0_VERTICAL_INT0_XIRQ_IRQ_SEL 2 2 DPRX_SD0P0_VERTICAL_INT1_XIRQ_IRQ_SEL 3 3 DPRX_SD0P0_SDP_RECEIVED_INT_XIRQ_IRQ_SEL 4 4 DPRX_SD1P0_MSA_RECEIVED_INT_XIRQ_IRQ_SEL 5 5 DPRX_SD1P0_VBID_VID_STREAM_STATUS_TOGGLED_INT_XIRQ_IRQ_SEL 6 6 DPRX_SD1P0_VERTICAL_INT0_XIRQ_IRQ_SEL 7 7 DPRX_SD1P0_VERTICAL_INT1_XIRQ_IRQ_SEL 8 8 DPRX_SD1P0_SDP_RECEIVED_INT_XIRQ_IRQ_SEL 9 9 DPRX_DPHY_P0_BS_INTERVAL_ERROR_THRESH_EXCEEDED_INT_XIRQ_IRQ_SEL 10 10 DPRX_DPHY_P0_SR_INTERVAL_ERROR_THRESH_EXCEEDED_INT_XIRQ_IRQ_SEL 11 11 DPRX_DPHY_P0_SYMBOL_ERROR_THRESH_EXCEEDED_INT_XIRQ_IRQ_SEL 12 12 DPRX_DPHY_P0_DISPARITY_ERROR_THRESH_EXCEEDED_INT_XIRQ_IRQ_SEL 13 13 DPRX_DPHY_P0_TRAINING_ERROR_THRESH_EXCEEDED_INT_XIRQ_IRQ_SEL 14 14 DPRX_DPHY_P0_TEST_PATTERN_ERROR_THRESH_EXCEEDED_INT_XIRQ_IRQ_SEL 15 15 DPRX_DPHY_P0_ECF_ERROR_THRESH_EXCEEDED_INT_XIRQ_IRQ_SEL 16 16 DPRX_DPHY_P0_DETECT_SR_LOCK_INT_XIRQ_IRQ_SEL 17 17 DPRX_DPHY_P0_LOSS_OF_ALIGN_INT_XIRQ_IRQ_SEL 18 18 DPRX_DPHY_P0_LOSS_OF_DESKEW_INT_XIRQ_IRQ_SEL 19 19 DPRX_DPHY_P0_EXCESSIVE_ERROR_INT_XIRQ_IRQ_SEL 20 20 DPRX_DPHY_P0_DESKEW_FIFO_OVERFLOW_INT_XIRQ_IRQ_SEL 21 21 DPRX_AUX_P0_AUX_INT_XIRQ_IRQ_SEL 22 22 DPRX_AUX_P0_I2C_INT_XIRQ_IRQ_SEL 23 23 DPRX_AUX_P0_CPU_INT_XIRQ_IRQ_SEL 24 24 DPRX_AUX_P0_MSG1_TIMEOUT_INT_XIRQ_IRQ_SEL 25 25 DPRX_AUX_P0_MSG2_TIMEOUT_INT_XIRQ_IRQ_SEL 26 26 DPRX_AUX_P0_MSG3_TIMEOUT_INT_XIRQ_IRQ_SEL 27 27 DPRX_AUX_P0_MSG4_TIMEOUT_INT_XIRQ_IRQ_SEL 28 28 mmDP_LINK_CNTL 0 0x4aa0 3 0 4294967295 DP_LINK_TRAINING_COMPLETE 4 4 DP_LINK_STATUS 8 8 DP_EMBEDDED_PANEL_MODE 17 17 mmDP0_DP_LINK_CNTL 0 0x4aa0 0 0 4294967295 mmDP1_DP_LINK_CNTL 0 0x4ba0 0 0 4294967295 mmDP2_DP_LINK_CNTL 0 0x4ca0 0 0 4294967295 mmDP3_DP_LINK_CNTL 0 0x4da0 0 0 4294967295 mmDP4_DP_LINK_CNTL 0 0x4ea0 0 0 4294967295 mmDP5_DP_LINK_CNTL 0 0x4fa0 0 0 4294967295 mmDP6_DP_LINK_CNTL 0 0x54a0 0 0 4294967295 mmDP7_DP_LINK_CNTL 0 0x56a0 0 0 4294967295 mmDP8_DP_LINK_CNTL 0 0x57a0 0 0 4294967295 mmDP_PIXEL_FORMAT 0 0x4aa1 4 0 4294967295 DP_PIXEL_ENCODING 0 2 DP_DYN_RANGE 8 8 DP_YCBCR_RANGE 16 16 DP_COMPONENT_DEPTH 24 26 mmDP0_DP_PIXEL_FORMAT 0 0x4aa1 0 0 4294967295 mmDP1_DP_PIXEL_FORMAT 0 0x4ba1 0 0 4294967295 mmDP2_DP_PIXEL_FORMAT 0 0x4ca1 0 0 4294967295 mmDP3_DP_PIXEL_FORMAT 0 0x4da1 0 0 4294967295 mmDP4_DP_PIXEL_FORMAT 0 0x4ea1 0 0 4294967295 mmDP5_DP_PIXEL_FORMAT 0 0x4fa1 0 0 4294967295 mmDP6_DP_PIXEL_FORMAT 0 0x54a1 0 0 4294967295 mmDP7_DP_PIXEL_FORMAT 0 0x56a1 0 0 4294967295 mmDP8_DP_PIXEL_FORMAT 0 0x57a1 0 0 4294967295 mmDP_MSA_COLORIMETRY 0 0x4aa2 4 0 4294967295 DP_MSA_MISC0_OVERRIDE 0 7 DP_MSA_MISC0_OVERRIDE_ENABLE 8 8 DP_MSA_MISC1_BIT7_OVERRIDE 9 9 DP_MSA_MISC1_BIT7_OVERRIDE_ENABLE 17 17 mmDP0_DP_MSA_COLORIMETRY 0 0x4aa2 0 0 4294967295 mmDP1_DP_MSA_COLORIMETRY 0 0x4ba2 0 0 4294967295 mmDP2_DP_MSA_COLORIMETRY 0 0x4ca2 0 0 4294967295 mmDP3_DP_MSA_COLORIMETRY 0 0x4da2 0 0 4294967295 mmDP4_DP_MSA_COLORIMETRY 0 0x4ea2 0 0 4294967295 mmDP5_DP_MSA_COLORIMETRY 0 0x4fa2 0 0 4294967295 mmDP6_DP_MSA_COLORIMETRY 0 0x54a2 0 0 4294967295 mmDP7_DP_MSA_COLORIMETRY 0 0x56a2 0 0 4294967295 mmDP8_DP_MSA_COLORIMETRY 0 0x57a2 0 0 4294967295 mmDP_CONFIG 0 0x4aa3 1 0 4294967295 DP_UDI_LANES 0 1 mmDP0_DP_CONFIG 0 0x4aa3 0 0 4294967295 mmDP1_DP_CONFIG 0 0x4ba3 0 0 4294967295 mmDP2_DP_CONFIG 0 0x4ca3 0 0 4294967295 mmDP3_DP_CONFIG 0 0x4da3 0 0 4294967295 mmDP4_DP_CONFIG 0 0x4ea3 0 0 4294967295 mmDP5_DP_CONFIG 0 0x4fa3 0 0 4294967295 mmDP6_DP_CONFIG 0 0x54a3 0 0 4294967295 mmDP7_DP_CONFIG 0 0x56a3 0 0 4294967295 mmDP8_DP_CONFIG 0 0x57a3 0 0 4294967295 mmDP_VID_STREAM_CNTL 0 0x4aa4 4 0 4294967295 DP_VID_STREAM_ENABLE 0 0 DP_VID_STREAM_DIS_DEFER 8 9 DP_VID_STREAM_STATUS 16 16 DP_VID_STREAM_CHANGE_KEEPOUT 20 20 mmDP0_DP_VID_STREAM_CNTL 0 0x4aa4 0 0 4294967295 mmDP1_DP_VID_STREAM_CNTL 0 0x4ba4 0 0 4294967295 mmDP2_DP_VID_STREAM_CNTL 0 0x4ca4 0 0 4294967295 mmDP3_DP_VID_STREAM_CNTL 0 0x4da4 0 0 4294967295 mmDP4_DP_VID_STREAM_CNTL 0 0x4ea4 0 0 4294967295 mmDP5_DP_VID_STREAM_CNTL 0 0x4fa4 0 0 4294967295 mmDP6_DP_VID_STREAM_CNTL 0 0x54a4 0 0 4294967295 mmDP7_DP_VID_STREAM_CNTL 0 0x56a4 0 0 4294967295 mmDP8_DP_VID_STREAM_CNTL 0 0x57a4 0 0 4294967295 mmDP_STEER_FIFO 0 0x4aa5 7 0 4294967295 DP_STEER_FIFO_RESET 0 0 DP_STEER_OVERFLOW_FLAG 4 4 DP_STEER_OVERFLOW_INT 5 5 DP_STEER_OVERFLOW_ACK 6 6 DP_STEER_OVERFLOW_MASK 7 7 DP_TU_OVERFLOW_FLAG 8 8 DP_TU_OVERFLOW_ACK 12 12 mmDP0_DP_STEER_FIFO 0 0x4aa5 0 0 4294967295 mmDP1_DP_STEER_FIFO 0 0x4ba5 0 0 4294967295 mmDP2_DP_STEER_FIFO 0 0x4ca5 0 0 4294967295 mmDP3_DP_STEER_FIFO 0 0x4da5 0 0 4294967295 mmDP4_DP_STEER_FIFO 0 0x4ea5 0 0 4294967295 mmDP5_DP_STEER_FIFO 0 0x4fa5 0 0 4294967295 mmDP6_DP_STEER_FIFO 0 0x54a5 0 0 4294967295 mmDP7_DP_STEER_FIFO 0 0x56a5 0 0 4294967295 mmDP8_DP_STEER_FIFO 0 0x57a5 0 0 4294967295 mmDP_MSA_MISC 0 0x4aa6 4 0 4294967295 DP_MSA_MISC1 3 6 DP_MSA_MISC2 8 15 DP_MSA_MISC3 16 23 DP_MSA_MISC4 24 31 mmDP0_DP_MSA_MISC 0 0x4aa6 0 0 4294967295 mmDP1_DP_MSA_MISC 0 0x4ba6 0 0 4294967295 mmDP2_DP_MSA_MISC 0 0x4ca6 0 0 4294967295 mmDP3_DP_MSA_MISC 0 0x4da6 0 0 4294967295 mmDP4_DP_MSA_MISC 0 0x4ea6 0 0 4294967295 mmDP5_DP_MSA_MISC 0 0x4fa6 0 0 4294967295 mmDP6_DP_MSA_MISC 0 0x54a6 0 0 4294967295 mmDP7_DP_MSA_MISC 0 0x56a6 0 0 4294967295 mmDP8_DP_MSA_MISC 0 0x57a6 0 0 4294967295 mmDP_VID_TIMING 0 0x4aa8 5 0 4294967295 DP_VID_TIMING_MODE 0 0 DP_VID_M_N_DOUBLE_BUFFER_MODE 4 4 DP_VID_M_N_GEN_EN 8 8 DP_VID_M_DOUBLE_VALUE_EN 9 9 DP_VID_N_DIV 24 31 mmDP0_DP_VID_TIMING 0 0x4aa8 0 0 4294967295 mmDP1_DP_VID_TIMING 0 0x4ba8 0 0 4294967295 mmDP2_DP_VID_TIMING 0 0x4ca8 0 0 4294967295 mmDP3_DP_VID_TIMING 0 0x4da8 0 0 4294967295 mmDP4_DP_VID_TIMING 0 0x4ea8 0 0 4294967295 mmDP5_DP_VID_TIMING 0 0x4fa8 0 0 4294967295 mmDP6_DP_VID_TIMING 0 0x54a8 0 0 4294967295 mmDP7_DP_VID_TIMING 0 0x56a8 0 0 4294967295 mmDP8_DP_VID_TIMING 0 0x57a8 0 0 4294967295 mmDP_VID_N 0 0x4aa9 1 0 4294967295 DP_VID_N 0 23 mmDP0_DP_VID_N 0 0x4aa9 0 0 4294967295 mmDP1_DP_VID_N 0 0x4ba9 0 0 4294967295 mmDP2_DP_VID_N 0 0x4ca9 0 0 4294967295 mmDP3_DP_VID_N 0 0x4da9 0 0 4294967295 mmDP4_DP_VID_N 0 0x4ea9 0 0 4294967295 mmDP5_DP_VID_N 0 0x4fa9 0 0 4294967295 mmDP6_DP_VID_N 0 0x54a9 0 0 4294967295 mmDP7_DP_VID_N 0 0x56a9 0 0 4294967295 mmDP8_DP_VID_N 0 0x57a9 0 0 4294967295 mmDP_VID_M 0 0x4aaa 1 0 4294967295 DP_VID_M 0 23 mmDP0_DP_VID_M 0 0x4aaa 0 0 4294967295 mmDP1_DP_VID_M 0 0x4baa 0 0 4294967295 mmDP2_DP_VID_M 0 0x4caa 0 0 4294967295 mmDP3_DP_VID_M 0 0x4daa 0 0 4294967295 mmDP4_DP_VID_M 0 0x4eaa 0 0 4294967295 mmDP5_DP_VID_M 0 0x4faa 0 0 4294967295 mmDP6_DP_VID_M 0 0x54aa 0 0 4294967295 mmDP7_DP_VID_M 0 0x56aa 0 0 4294967295 mmDP8_DP_VID_M 0 0x57aa 0 0 4294967295 mmDP_LINK_FRAMING_CNTL 0 0x4aab 3 0 4294967295 DP_IDLE_BS_INTERVAL 0 17 DP_VBID_DISABLE 24 24 DP_VID_ENHANCED_FRAME_MODE 28 28 mmDP0_DP_LINK_FRAMING_CNTL 0 0x4aab 0 0 4294967295 mmDP1_DP_LINK_FRAMING_CNTL 0 0x4bab 0 0 4294967295 mmDP2_DP_LINK_FRAMING_CNTL 0 0x4cab 0 0 4294967295 mmDP3_DP_LINK_FRAMING_CNTL 0 0x4dab 0 0 4294967295 mmDP4_DP_LINK_FRAMING_CNTL 0 0x4eab 0 0 4294967295 mmDP5_DP_LINK_FRAMING_CNTL 0 0x4fab 0 0 4294967295 mmDP6_DP_LINK_FRAMING_CNTL 0 0x54ab 0 0 4294967295 mmDP7_DP_LINK_FRAMING_CNTL 0 0x56ab 0 0 4294967295 mmDP8_DP_LINK_FRAMING_CNTL 0 0x57ab 0 0 4294967295 mmDP_HBR2_EYE_PATTERN 0 0x4aac 1 0 4294967295 DP_HBR2_EYE_PATTERN_ENABLE 0 0 mmDP0_DP_HBR2_EYE_PATTERN 0 0x4aac 0 0 4294967295 mmDP1_DP_HBR2_EYE_PATTERN 0 0x4bac 0 0 4294967295 mmDP2_DP_HBR2_EYE_PATTERN 0 0x4cac 0 0 4294967295 mmDP3_DP_HBR2_EYE_PATTERN 0 0x4dac 0 0 4294967295 mmDP4_DP_HBR2_EYE_PATTERN 0 0x4eac 0 0 4294967295 mmDP5_DP_HBR2_EYE_PATTERN 0 0x4fac 0 0 4294967295 mmDP6_DP_HBR2_EYE_PATTERN 0 0x54ac 0 0 4294967295 mmDP7_DP_HBR2_EYE_PATTERN 0 0x56ac 0 0 4294967295 mmDP8_DP_HBR2_EYE_PATTERN 0 0x57ac 0 0 4294967295 mmDP_VID_MSA_VBID 0 0x4aad 3 0 4294967295 DP_VID_MSA_LOCATION 0 11 DP_VID_MSA_TOP_FIELD_MODE 16 16 DP_VID_VBID_FIELD_POL 24 24 mmDP0_DP_VID_MSA_VBID 0 0x4aad 0 0 4294967295 mmDP1_DP_VID_MSA_VBID 0 0x4bad 0 0 4294967295 mmDP2_DP_VID_MSA_VBID 0 0x4cad 0 0 4294967295 mmDP3_DP_VID_MSA_VBID 0 0x4dad 0 0 4294967295 mmDP4_DP_VID_MSA_VBID 0 0x4ead 0 0 4294967295 mmDP5_DP_VID_MSA_VBID 0 0x4fad 0 0 4294967295 mmDP6_DP_VID_MSA_VBID 0 0x54ad 0 0 4294967295 mmDP7_DP_VID_MSA_VBID 0 0x56ad 0 0 4294967295 mmDP8_DP_VID_MSA_VBID 0 0x57ad 0 0 4294967295 mmDP_VID_INTERRUPT_CNTL 0 0x4aae 3 0 4294967295 DP_VID_STREAM_DISABLE_INT 0 0 DP_VID_STREAM_DISABLE_ACK 1 1 DP_VID_STREAM_DISABLE_MASK 2 2 mmDP0_DP_VID_INTERRUPT_CNTL 0 0x4aae 0 0 4294967295 mmDP1_DP_VID_INTERRUPT_CNTL 0 0x4bae 0 0 4294967295 mmDP2_DP_VID_INTERRUPT_CNTL 0 0x4cae 0 0 4294967295 mmDP3_DP_VID_INTERRUPT_CNTL 0 0x4dae 0 0 4294967295 mmDP4_DP_VID_INTERRUPT_CNTL 0 0x4eae 0 0 4294967295 mmDP5_DP_VID_INTERRUPT_CNTL 0 0x4fae 0 0 4294967295 mmDP6_DP_VID_INTERRUPT_CNTL 0 0x54ae 0 0 4294967295 mmDP7_DP_VID_INTERRUPT_CNTL 0 0x56ae 0 0 4294967295 mmDP8_DP_VID_INTERRUPT_CNTL 0 0x57ae 0 0 4294967295 mmDP_DPHY_CNTL 0 0x4aaf 6 0 4294967295 DPHY_ATEST_SEL_LANE0 0 0 DPHY_ATEST_SEL_LANE1 1 1 DPHY_ATEST_SEL_LANE2 2 2 DPHY_ATEST_SEL_LANE3 3 3 DPHY_BYPASS 16 16 DPHY_SKEW_BYPASS 24 24 mmDP0_DP_DPHY_CNTL 0 0x4aaf 0 0 4294967295 mmDP1_DP_DPHY_CNTL 0 0x4baf 0 0 4294967295 mmDP2_DP_DPHY_CNTL 0 0x4caf 0 0 4294967295 mmDP3_DP_DPHY_CNTL 0 0x4daf 0 0 4294967295 mmDP4_DP_DPHY_CNTL 0 0x4eaf 0 0 4294967295 mmDP5_DP_DPHY_CNTL 0 0x4faf 0 0 4294967295 mmDP6_DP_DPHY_CNTL 0 0x54af 0 0 4294967295 mmDP7_DP_DPHY_CNTL 0 0x56af 0 0 4294967295 mmDP8_DP_DPHY_CNTL 0 0x57af 0 0 4294967295 mmDP_DPHY_TRAINING_PATTERN_SEL 0 0x4ab0 1 0 4294967295 DPHY_TRAINING_PATTERN_SEL 0 1 mmDP0_DP_DPHY_TRAINING_PATTERN_SEL 0 0x4ab0 0 0 4294967295 mmDP1_DP_DPHY_TRAINING_PATTERN_SEL 0 0x4bb0 0 0 4294967295 mmDP2_DP_DPHY_TRAINING_PATTERN_SEL 0 0x4cb0 0 0 4294967295 mmDP3_DP_DPHY_TRAINING_PATTERN_SEL 0 0x4db0 0 0 4294967295 mmDP4_DP_DPHY_TRAINING_PATTERN_SEL 0 0x4eb0 0 0 4294967295 mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0 0x4fb0 0 0 4294967295 mmDP6_DP_DPHY_TRAINING_PATTERN_SEL 0 0x54b0 0 0 4294967295 mmDP7_DP_DPHY_TRAINING_PATTERN_SEL 0 0x56b0 0 0 4294967295 mmDP8_DP_DPHY_TRAINING_PATTERN_SEL 0 0x57b0 0 0 4294967295 mmDP_DPHY_SYM0 0 0x4ab1 3 0 4294967295 DPHY_SYM1 0 9 DPHY_SYM2 10 19 DPHY_SYM3 20 29 mmDP0_DP_DPHY_SYM0 0 0x4ab1 0 0 4294967295 mmDP1_DP_DPHY_SYM0 0 0x4bb1 0 0 4294967295 mmDP2_DP_DPHY_SYM0 0 0x4cb1 0 0 4294967295 mmDP3_DP_DPHY_SYM0 0 0x4db1 0 0 4294967295 mmDP4_DP_DPHY_SYM0 0 0x4eb1 0 0 4294967295 mmDP5_DP_DPHY_SYM0 0 0x4fb1 0 0 4294967295 mmDP6_DP_DPHY_SYM0 0 0x54b1 0 0 4294967295 mmDP7_DP_DPHY_SYM0 0 0x56b1 0 0 4294967295 mmDP8_DP_DPHY_SYM0 0 0x57b1 0 0 4294967295 mmDP_DPHY_SYM1 0 0x4ab2 3 0 4294967295 DPHY_SYM4 0 9 DPHY_SYM5 10 19 DPHY_SYM6 20 29 mmDP0_DP_DPHY_SYM1 0 0x4ab2 0 0 4294967295 mmDP1_DP_DPHY_SYM1 0 0x4bb2 0 0 4294967295 mmDP2_DP_DPHY_SYM1 0 0x4cb2 0 0 4294967295 mmDP3_DP_DPHY_SYM1 0 0x4db2 0 0 4294967295 mmDP4_DP_DPHY_SYM1 0 0x4eb2 0 0 4294967295 mmDP5_DP_DPHY_SYM1 0 0x4fb2 0 0 4294967295 mmDP6_DP_DPHY_SYM1 0 0x54b2 0 0 4294967295 mmDP7_DP_DPHY_SYM1 0 0x56b2 0 0 4294967295 mmDP8_DP_DPHY_SYM1 0 0x57b2 0 0 4294967295 mmDP_DPHY_SYM2 0 0x4ab3 2 0 4294967295 DPHY_SYM7 0 9 DPHY_SYM8 10 19 mmDP0_DP_DPHY_SYM2 0 0x4ab3 0 0 4294967295 mmDP1_DP_DPHY_SYM2 0 0x4bb3 0 0 4294967295 mmDP2_DP_DPHY_SYM2 0 0x4cb3 0 0 4294967295 mmDP3_DP_DPHY_SYM2 0 0x4db3 0 0 4294967295 mmDP4_DP_DPHY_SYM2 0 0x4eb3 0 0 4294967295 mmDP5_DP_DPHY_SYM2 0 0x4fb3 0 0 4294967295 mmDP6_DP_DPHY_SYM2 0 0x54b3 0 0 4294967295 mmDP7_DP_DPHY_SYM2 0 0x56b3 0 0 4294967295 mmDP8_DP_DPHY_SYM2 0 0x57b3 0 0 4294967295 mmDP_DPHY_8B10B_CNTL 0 0x4ab4 3 0 4294967295 DPHY_8B10B_RESET 8 8 DPHY_8B10B_EXT_DISP 16 16 DPHY_8B10B_CUR_DISP 24 24 mmDP0_DP_DPHY_8B10B_CNTL 0 0x4ab4 0 0 4294967295 mmDP1_DP_DPHY_8B10B_CNTL 0 0x4bb4 0 0 4294967295 mmDP2_DP_DPHY_8B10B_CNTL 0 0x4cb4 0 0 4294967295 mmDP3_DP_DPHY_8B10B_CNTL 0 0x4db4 0 0 4294967295 mmDP4_DP_DPHY_8B10B_CNTL 0 0x4eb4 0 0 4294967295 mmDP5_DP_DPHY_8B10B_CNTL 0 0x4fb4 0 0 4294967295 mmDP6_DP_DPHY_8B10B_CNTL 0 0x54b4 0 0 4294967295 mmDP7_DP_DPHY_8B10B_CNTL 0 0x56b4 0 0 4294967295 mmDP8_DP_DPHY_8B10B_CNTL 0 0x57b4 0 0 4294967295 mmDP_DPHY_PRBS_CNTL 0 0x4ab5 3 0 4294967295 DPHY_PRBS_EN 0 0 DPHY_PRBS_SEL 4 5 DPHY_PRBS_SEED 8 30 mmDP0_DP_DPHY_PRBS_CNTL 0 0x4ab5 0 0 4294967295 mmDP1_DP_DPHY_PRBS_CNTL 0 0x4bb5 0 0 4294967295 mmDP2_DP_DPHY_PRBS_CNTL 0 0x4cb5 0 0 4294967295 mmDP3_DP_DPHY_PRBS_CNTL 0 0x4db5 0 0 4294967295 mmDP4_DP_DPHY_PRBS_CNTL 0 0x4eb5 0 0 4294967295 mmDP5_DP_DPHY_PRBS_CNTL 0 0x4fb5 0 0 4294967295 mmDP6_DP_DPHY_PRBS_CNTL 0 0x54b5 0 0 4294967295 mmDP7_DP_DPHY_PRBS_CNTL 0 0x56b5 0 0 4294967295 mmDP8_DP_DPHY_PRBS_CNTL 0 0x57b5 0 0 4294967295 mmDP_DPHY_SCRAM_CNTL 0 0x4ab6 2 0 4294967295 DPHY_SCRAMBLER_ADVANCE 4 4 DPHY_SCRAMBLER_BS_COUNT 8 17 mmDP0_DP_DPHY_SCRAM_CNTL 0 0x4ab6 0 0 4294967295 mmDP1_DP_DPHY_SCRAM_CNTL 0 0x4bb6 0 0 4294967295 mmDP2_DP_DPHY_SCRAM_CNTL 0 0x4cb6 0 0 4294967295 mmDP3_DP_DPHY_SCRAM_CNTL 0 0x4db6 0 0 4294967295 mmDP4_DP_DPHY_SCRAM_CNTL 0 0x4eb6 0 0 4294967295 mmDP5_DP_DPHY_SCRAM_CNTL 0 0x4fb6 0 0 4294967295 mmDP6_DP_DPHY_SCRAM_CNTL 0 0x54b6 0 0 4294967295 mmDP8_DP_DPHY_SCRAM_CNTL 0 0x56b6 0 0 4294967295 mmDP_DPHY_BS_SR_SWAP_CNTL 0 0x4adc 3 0 4294967295 DPHY_LOAD_BS_COUNT 0 9 DPHY_BS_SR_SWAP_DONE 15 15 DPHY_LOAD_BS_COUNT_START 16 16 mmDP0_DP_DPHY_BS_SR_SWAP_CNTL 0 0x4adc 0 0 4294967295 mmDP1_DP_DPHY_BS_SR_SWAP_CNTL 0 0x4bdc 0 0 4294967295 mmDP2_DP_DPHY_BS_SR_SWAP_CNTL 0 0x4cdc 0 0 4294967295 mmDP3_DP_DPHY_BS_SR_SWAP_CNTL 0 0x4ddc 0 0 4294967295 mmDP4_DP_DPHY_BS_SR_SWAP_CNTL 0 0x4edc 0 0 4294967295 mmDP5_DP_DPHY_BS_SR_SWAP_CNTL 0 0x4fdc 0 0 4294967295 mmDP6_DP_DPHY_BS_SR_SWAP_CNTL 0 0x54dc 0 0 4294967295 mmDP7_DP_DPHY_BS_SR_SWAP_CNTL 0 0x56dc 0 0 4294967295 mmDP8_DP_DPHY_BS_SR_SWAP_CNTL 0 0x57dc 0 0 4294967295 mmDP_DPHY_CRC_EN 0 0x4ab7 3 0 4294967295 DPHY_CRC_EN 0 0 DPHY_CRC_CONT_EN 4 4 DPHY_CRC_RESULT_VALID 8 8 mmDP0_DP_DPHY_CRC_EN 0 0x4ab7 0 0 4294967295 mmDP1_DP_DPHY_CRC_EN 0 0x4bb7 0 0 4294967295 mmDP2_DP_DPHY_CRC_EN 0 0x4cb7 0 0 4294967295 mmDP3_DP_DPHY_CRC_EN 0 0x4db7 0 0 4294967295 mmDP4_DP_DPHY_CRC_EN 0 0x4eb7 0 0 4294967295 mmDP5_DP_DPHY_CRC_EN 0 0x4fb7 0 0 4294967295 mmDP6_DP_DPHY_CRC_EN 0 0x54b7 0 0 4294967295 mmDP7_DP_DPHY_CRC_EN 0 0x56b7 0 0 4294967295 mmDP8_DP_DPHY_CRC_EN 0 0x57b7 0 0 4294967295 mmDP_DPHY_CRC_CNTL 0 0x4ab8 3 0 4294967295 DPHY_CRC_FIELD 0 0 DPHY_CRC_SEL 4 5 DPHY_CRC_MASK 16 23 mmDP0_DP_DPHY_CRC_CNTL 0 0x4ab8 0 0 4294967295 mmDP1_DP_DPHY_CRC_CNTL 0 0x4bb8 0 0 4294967295 mmDP2_DP_DPHY_CRC_CNTL 0 0x4cb8 0 0 4294967295 mmDP3_DP_DPHY_CRC_CNTL 0 0x4db8 0 0 4294967295 mmDP4_DP_DPHY_CRC_CNTL 0 0x4eb8 0 0 4294967295 mmDP5_DP_DPHY_CRC_CNTL 0 0x4fb8 0 0 4294967295 mmDP6_DP_DPHY_CRC_CNTL 0 0x54b8 0 0 4294967295 mmDP7_DP_DPHY_CRC_CNTL 0 0x56b8 0 0 4294967295 mmDP8_DP_DPHY_CRC_CNTL 0 0x57b8 0 0 4294967295 mmDP_DPHY_CRC_RESULT 0 0x4ab9 4 0 4294967295 DPHY_CRC_RESULT 0 7 DPHY_CRC_RESULT1 8 15 DPHY_CRC_RESULT2 16 23 DPHY_CRC_RESULT3 24 31 mmDP0_DP_DPHY_CRC_RESULT 0 0x4ab9 0 0 4294967295 mmDP1_DP_DPHY_CRC_RESULT 0 0x4bb9 0 0 4294967295 mmDP2_DP_DPHY_CRC_RESULT 0 0x4cb9 0 0 4294967295 mmDP3_DP_DPHY_CRC_RESULT 0 0x4db9 0 0 4294967295 mmDP4_DP_DPHY_CRC_RESULT 0 0x4eb9 0 0 4294967295 mmDP5_DP_DPHY_CRC_RESULT 0 0x4fb9 0 0 4294967295 mmDP6_DP_DPHY_CRC_RESULT 0 0x54b9 0 0 4294967295 mmDP7_DP_DPHY_CRC_RESULT 0 0x56b9 0 0 4294967295 mmDP8_DP_DPHY_CRC_RESULT 0 0x57b9 0 0 4294967295 mmDP_DPHY_CRC_MST_CNTL 0 0x4aba 2 0 4294967295 DPHY_CRC_MST_FIRST_SLOT 0 5 DPHY_CRC_MST_LAST_SLOT 8 13 mmDP0_DP_DPHY_CRC_MST_CNTL 0 0x4aba 0 0 4294967295 mmDP1_DP_DPHY_CRC_MST_CNTL 0 0x4bba 0 0 4294967295 mmDP2_DP_DPHY_CRC_MST_CNTL 0 0x4cba 0 0 4294967295 mmDP3_DP_DPHY_CRC_MST_CNTL 0 0x4dba 0 0 4294967295 mmDP4_DP_DPHY_CRC_MST_CNTL 0 0x4eba 0 0 4294967295 mmDP5_DP_DPHY_CRC_MST_CNTL 0 0x4fba 0 0 4294967295 mmDP6_DP_DPHY_CRC_MST_CNTL 0 0x54ba 0 0 4294967295 mmDP7_DP_DPHY_CRC_MST_CNTL 0 0x56ba 0 0 4294967295 mmDP8_DP_DPHY_CRC_MST_CNTL 0 0x57ba 0 0 4294967295 mmDP_DPHY_CRC_MST_STATUS 0 0x4abb 3 0 4294967295 DPHY_CRC_MST_PHASE_LOCK 0 0 DPHY_CRC_MST_PHASE_ERROR 8 8 DPHY_CRC_MST_PHASE_ERROR_ACK 16 16 mmDP0_DP_DPHY_CRC_MST_STATUS 0 0x4abb 0 0 4294967295 mmDP1_DP_DPHY_CRC_MST_STATUS 0 0x4bbb 0 0 4294967295 mmDP2_DP_DPHY_CRC_MST_STATUS 0 0x4cbb 0 0 4294967295 mmDP3_DP_DPHY_CRC_MST_STATUS 0 0x4dbb 0 0 4294967295 mmDP4_DP_DPHY_CRC_MST_STATUS 0 0x4ebb 0 0 4294967295 mmDP5_DP_DPHY_CRC_MST_STATUS 0 0x4fbb 0 0 4294967295 mmDP6_DP_DPHY_CRC_MST_STATUS 0 0x54bb 0 0 4294967295 mmDP7_DP_DPHY_CRC_MST_STATUS 0 0x56bb 0 0 4294967295 mmDP8_DP_DPHY_CRC_MST_STATUS 0 0x57bb 0 0 4294967295 mmDP_DPHY_FAST_TRAINING 0 0x4abc 5 0 4294967295 DPHY_RX_FAST_TRAINING_CAPABLE 0 0 DPHY_SW_FAST_TRAINING_START 1 1 DPHY_FAST_TRAINING_VBLANK_EDGE_DETECT_EN 2 2 DPHY_FAST_TRAINING_TP1_TIME 8 19 DPHY_FAST_TRAINING_TP2_TIME 20 31 mmDP0_DP_DPHY_FAST_TRAINING 0 0x4abc 0 0 4294967295 mmDP1_DP_DPHY_FAST_TRAINING 0 0x4bbc 0 0 4294967295 mmDP2_DP_DPHY_FAST_TRAINING 0 0x4cbc 0 0 4294967295 mmDP3_DP_DPHY_FAST_TRAINING 0 0x4dbc 0 0 4294967295 mmDP4_DP_DPHY_FAST_TRAINING 0 0x4ebc 0 0 4294967295 mmDP5_DP_DPHY_FAST_TRAINING 0 0x4fbc 0 0 4294967295 mmDP6_DP_DPHY_FAST_TRAINING 0 0x54bc 0 0 4294967295 mmDP7_DP_DPHY_FAST_TRAINING 0 0x56bc 0 0 4294967295 mmDP8_DP_DPHY_FAST_TRAINING 0 0x57bc 0 0 4294967295 mmDP_DPHY_FAST_TRAINING_STATUS 0 0x4abd 4 0 4294967295 DPHY_FAST_TRAINING_STATE 0 2 DPHY_FAST_TRAINING_COMPLETE_OCCURRED 4 4 DPHY_FAST_TRAINING_COMPLETE_MASK 8 8 DPHY_FAST_TRAINING_COMPLETE_ACK 12 12 mmDP0_DP_DPHY_FAST_TRAINING_STATUS 0 0x4abd 0 0 4294967295 mmDP1_DP_DPHY_FAST_TRAINING_STATUS 0 0x4bbd 0 0 4294967295 mmDP2_DP_DPHY_FAST_TRAINING_STATUS 0 0x4cbd 0 0 4294967295 mmDP3_DP_DPHY_FAST_TRAINING_STATUS 0 0x4dbd 0 0 4294967295 mmDP4_DP_DPHY_FAST_TRAINING_STATUS 0 0x4ebd 0 0 4294967295 mmDP5_DP_DPHY_FAST_TRAINING_STATUS 0 0x4fbd 0 0 4294967295 mmDP6_DP_DPHY_FAST_TRAINING_STATUS 0 0x54bd 0 0 4294967295 mmDP7_DP_DPHY_FAST_TRAINING_STATUS 0 0x56bd 0 0 4294967295 mmDP8_DP_DPHY_FAST_TRAINING_STATUS 0 0x57bd 0 0 4294967295 mmDP_DPHY_HBR2_PATTERN_CONTROL 0 0x4add 1 0 4294967295 DP_DPHY_HBR2_PATTERN_CONTROL 0 2 mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL 0 0x4add 0 0 4294967295 mmDP1_DP_DPHY_HBR2_PATTERN_CONTROL 0 0x4bdd 0 0 4294967295 mmDP2_DP_DPHY_HBR2_PATTERN_CONTROL 0 0x4cdd 0 0 4294967295 mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL 0 0x4ddd 0 0 4294967295 mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL 0 0x4edd 0 0 4294967295 mmDP5_DP_DPHY_HBR2_PATTERN_CONTROL 0 0x4fdd 0 0 4294967295 mmDP6_DP_DPHY_HBR2_PATTERN_CONTROL 0 0x54dd 0 0 4294967295 mmDP7_DP_DPHY_HBR2_PATTERN_CONTROL 0 0x56dd 0 0 4294967295 mmDP8_DP_DPHY_HBR2_PATTERN_CONTROL 0 0x57dd 0 0 4294967295 mmDP_MSA_V_TIMING_OVERRIDE1 0 0x4abe 2 0 4294967295 DP_MSA_V_TIMING_OVERRIDE_EN 0 0 DP_MSA_V_TOTAL_OVERRIDE 4 17 mmDP0_DP_MSA_V_TIMING_OVERRIDE1 0 0x4abe 0 0 4294967295 mmDP1_DP_MSA_V_TIMING_OVERRIDE1 0 0x4bbe 0 0 4294967295 mmDP2_DP_MSA_V_TIMING_OVERRIDE1 0 0x4cbe 0 0 4294967295 mmDP3_DP_MSA_V_TIMING_OVERRIDE1 0 0x4dbe 0 0 4294967295 mmDP4_DP_MSA_V_TIMING_OVERRIDE1 0 0x4ebe 0 0 4294967295 mmDP5_DP_MSA_V_TIMING_OVERRIDE1 0 0x4fbe 0 0 4294967295 mmDP6_DP_MSA_V_TIMING_OVERRIDE1 0 0x54be 0 0 4294967295 mmDP7_DP_MSA_V_TIMING_OVERRIDE1 0 0x56be 0 0 4294967295 mmDP8_DP_MSA_V_TIMING_OVERRIDE1 0 0x57be 0 0 4294967295 mmDP_MSA_V_TIMING_OVERRIDE2 0 0x4abf 2 0 4294967295 DP_MSA_V_BLANK_START_OVERRIDE 0 13 DP_MSA_V_BLANK_END_OVERRIDE 16 29 mmDP0_DP_MSA_V_TIMING_OVERRIDE2 0 0x4abf 0 0 4294967295 mmDP1_DP_MSA_V_TIMING_OVERRIDE2 0 0x4bbf 0 0 4294967295 mmDP2_DP_MSA_V_TIMING_OVERRIDE2 0 0x4cbf 0 0 4294967295 mmDP3_DP_MSA_V_TIMING_OVERRIDE2 0 0x4dbf 0 0 4294967295 mmDP4_DP_MSA_V_TIMING_OVERRIDE2 0 0x4ebf 0 0 4294967295 mmDP5_DP_MSA_V_TIMING_OVERRIDE2 0 0x4fbf 0 0 4294967295 mmDP6_DP_MSA_V_TIMING_OVERRIDE2 0 0x54bf 0 0 4294967295 mmDP7_DP_MSA_V_TIMING_OVERRIDE2 0 0x56bf 0 0 4294967295 mmDP8_DP_MSA_V_TIMING_OVERRIDE2 0 0x57bf 0 0 4294967295 mmDP_SEC_CNTL 0 0x4ac3 11 0 4294967295 DP_SEC_STREAM_ENABLE 0 0 DP_SEC_ASP_ENABLE 4 4 DP_SEC_ATP_ENABLE 8 8 DP_SEC_AIP_ENABLE 12 12 DP_SEC_ACM_ENABLE 16 16 DP_SEC_GSP0_ENABLE 20 20 DP_SEC_GSP1_ENABLE 21 21 DP_SEC_GSP2_ENABLE 22 22 DP_SEC_GSP3_ENABLE 23 23 DP_SEC_AVI_ENABLE 24 24 DP_SEC_MPG_ENABLE 28 28 mmDP0_DP_SEC_CNTL 0 0x4ac3 0 0 4294967295 mmDP1_DP_SEC_CNTL 0 0x4bc3 0 0 4294967295 mmDP2_DP_SEC_CNTL 0 0x4cc3 0 0 4294967295 mmDP3_DP_SEC_CNTL 0 0x4dc3 0 0 4294967295 mmDP4_DP_SEC_CNTL 0 0x4ec3 0 0 4294967295 mmDP5_DP_SEC_CNTL 0 0x4fc3 0 0 4294967295 mmDP6_DP_SEC_CNTL 0 0x54c3 0 0 4294967295 mmDP7_DP_SEC_CNTL 0 0x56c3 0 0 4294967295 mmDP8_DP_SEC_CNTL 0 0x57c3 0 0 4294967295 mmDP_SEC_CNTL1 0 0x4ac4 6 0 4294967295 DP_SEC_ISRC_ENABLE 0 0 DP_SEC_GSP0_PRIORITY 4 4 DP_SEC_GSP0_SEND 5 5 DP_SEC_GSP0_SEND_PENDING 6 6 DP_SEC_GSP0_SEND_DEADLINE_MISSED 7 7 DP_SEC_GSP0_LINE_NUM 16 31 mmDP0_DP_SEC_CNTL1 0 0x4ac4 0 0 4294967295 mmDP1_DP_SEC_CNTL1 0 0x4bc4 0 0 4294967295 mmDP2_DP_SEC_CNTL1 0 0x4cc4 0 0 4294967295 mmDP3_DP_SEC_CNTL1 0 0x4dc4 0 0 4294967295 mmDP4_DP_SEC_CNTL1 0 0x4ec4 0 0 4294967295 mmDP5_DP_SEC_CNTL1 0 0x4fc4 0 0 4294967295 mmDP6_DP_SEC_CNTL1 0 0x54c4 0 0 4294967295 mmDP7_DP_SEC_CNTL1 0 0x56c4 0 0 4294967295 mmDP8_DP_SEC_CNTL1 0 0x57c4 0 0 4294967295 mmDP_SEC_FRAMING1 0 0x4ac5 2 0 4294967295 DP_SEC_FRAME_START_LOCATION 0 11 DP_SEC_VBLANK_TRANSMIT_WIDTH 16 31 mmDP0_DP_SEC_FRAMING1 0 0x4ac5 0 0 4294967295 mmDP1_DP_SEC_FRAMING1 0 0x4bc5 0 0 4294967295 mmDP2_DP_SEC_FRAMING1 0 0x4cc5 0 0 4294967295 mmDP3_DP_SEC_FRAMING1 0 0x4dc5 0 0 4294967295 mmDP4_DP_SEC_FRAMING1 0 0x4ec5 0 0 4294967295 mmDP5_DP_SEC_FRAMING1 0 0x4fc5 0 0 4294967295 mmDP6_DP_SEC_FRAMING1 0 0x54c5 0 0 4294967295 mmDP7_DP_SEC_FRAMING1 0 0x56c5 0 0 4294967295 mmDP8_DP_SEC_FRAMING1 0 0x57c5 0 0 4294967295 mmDP_SEC_FRAMING2 0 0x4ac6 2 0 4294967295 DP_SEC_START_POSITION 0 15 DP_SEC_HBLANK_TRANSMIT_WIDTH 16 31 mmDP0_DP_SEC_FRAMING2 0 0x4ac6 0 0 4294967295 mmDP1_DP_SEC_FRAMING2 0 0x4bc6 0 0 4294967295 mmDP2_DP_SEC_FRAMING2 0 0x4cc6 0 0 4294967295 mmDP3_DP_SEC_FRAMING2 0 0x4dc6 0 0 4294967295 mmDP4_DP_SEC_FRAMING2 0 0x4ec6 0 0 4294967295 mmDP5_DP_SEC_FRAMING2 0 0x4fc6 0 0 4294967295 mmDP6_DP_SEC_FRAMING2 0 0x54c6 0 0 4294967295 mmDP7_DP_SEC_FRAMING2 0 0x56c6 0 0 4294967295 mmDP8_DP_SEC_FRAMING2 0 0x57c6 0 0 4294967295 mmDP_SEC_FRAMING3 0 0x4ac7 2 0 4294967295 DP_SEC_IDLE_FRAME_SIZE 0 13 DP_SEC_IDLE_TRANSMIT_WIDTH 16 31 mmDP0_DP_SEC_FRAMING3 0 0x4ac7 0 0 4294967295 mmDP1_DP_SEC_FRAMING3 0 0x4bc7 0 0 4294967295 mmDP2_DP_SEC_FRAMING3 0 0x4cc7 0 0 4294967295 mmDP3_DP_SEC_FRAMING3 0 0x4dc7 0 0 4294967295 mmDP4_DP_SEC_FRAMING3 0 0x4ec7 0 0 4294967295 mmDP5_DP_SEC_FRAMING3 0 0x4fc7 0 0 4294967295 mmDP6_DP_SEC_FRAMING3 0 0x54c7 0 0 4294967295 mmDP7_DP_SEC_FRAMING3 0 0x56c7 0 0 4294967295 mmDP8_DP_SEC_FRAMING3 0 0x57c7 0 0 4294967295 mmDP_SEC_FRAMING4 0 0x4ac8 4 0 4294967295 DP_SEC_COLLISION_STATUS 20 20 DP_SEC_COLLISION_ACK 24 24 DP_SEC_AUDIO_MUTE 28 28 DP_SEC_AUDIO_MUTE_STATUS 29 29 mmDP0_DP_SEC_FRAMING4 0 0x4ac8 0 0 4294967295 mmDP1_DP_SEC_FRAMING4 0 0x4bc8 0 0 4294967295 mmDP2_DP_SEC_FRAMING4 0 0x4cc8 0 0 4294967295 mmDP3_DP_SEC_FRAMING4 0 0x4dc8 0 0 4294967295 mmDP4_DP_SEC_FRAMING4 0 0x4ec8 0 0 4294967295 mmDP5_DP_SEC_FRAMING4 0 0x4fc8 0 0 4294967295 mmDP6_DP_SEC_FRAMING4 0 0x54c8 0 0 4294967295 mmDP7_DP_SEC_FRAMING4 0 0x56c8 0 0 4294967295 mmDP8_DP_SEC_FRAMING4 0 0x57c8 0 0 4294967295 mmDP_SEC_AUD_N 0 0x4ac9 1 0 4294967295 DP_SEC_AUD_N 0 23 mmDP0_DP_SEC_AUD_N 0 0x4ac9 0 0 4294967295 mmDP1_DP_SEC_AUD_N 0 0x4bc9 0 0 4294967295 mmDP2_DP_SEC_AUD_N 0 0x4cc9 0 0 4294967295 mmDP3_DP_SEC_AUD_N 0 0x4dc9 0 0 4294967295 mmDP4_DP_SEC_AUD_N 0 0x4ec9 0 0 4294967295 mmDP5_DP_SEC_AUD_N 0 0x4fc9 0 0 4294967295 mmDP6_DP_SEC_AUD_N 0 0x54c9 0 0 4294967295 mmDP7_DP_SEC_AUD_N 0 0x56c9 0 0 4294967295 mmDP8_DP_SEC_AUD_N 0 0x57c9 0 0 4294967295 mmDP_SEC_AUD_N_READBACK 0 0x4aca 1 0 4294967295 DP_SEC_AUD_N_READBACK 0 23 mmDP0_DP_SEC_AUD_N_READBACK 0 0x4aca 0 0 4294967295 mmDP1_DP_SEC_AUD_N_READBACK 0 0x4bca 0 0 4294967295 mmDP2_DP_SEC_AUD_N_READBACK 0 0x4cca 0 0 4294967295 mmDP3_DP_SEC_AUD_N_READBACK 0 0x4dca 0 0 4294967295 mmDP4_DP_SEC_AUD_N_READBACK 0 0x4eca 0 0 4294967295 mmDP5_DP_SEC_AUD_N_READBACK 0 0x4fca 0 0 4294967295 mmDP6_DP_SEC_AUD_N_READBACK 0 0x54ca 0 0 4294967295 mmDP7_DP_SEC_AUD_N_READBACK 0 0x56ca 0 0 4294967295 mmDP8_DP_SEC_AUD_N_READBACK 0 0x57ca 0 0 4294967295 mmDP_SEC_AUD_M 0 0x4acb 1 0 4294967295 DP_SEC_AUD_M 0 23 mmDP0_DP_SEC_AUD_M 0 0x4acb 0 0 4294967295 mmDP1_DP_SEC_AUD_M 0 0x4bcb 0 0 4294967295 mmDP2_DP_SEC_AUD_M 0 0x4ccb 0 0 4294967295 mmDP3_DP_SEC_AUD_M 0 0x4dcb 0 0 4294967295 mmDP4_DP_SEC_AUD_M 0 0x4ecb 0 0 4294967295 mmDP5_DP_SEC_AUD_M 0 0x4fcb 0 0 4294967295 mmDP6_DP_SEC_AUD_M 0 0x54cb 0 0 4294967295 mmDP7_DP_SEC_AUD_M 0 0x56cb 0 0 4294967295 mmDP8_DP_SEC_AUD_M 0 0x57cb 0 0 4294967295 mmDP_SEC_AUD_M_READBACK 0 0x4acc 1 0 4294967295 DP_SEC_AUD_M_READBACK 0 23 mmDP0_DP_SEC_AUD_M_READBACK 0 0x4acc 0 0 4294967295 mmDP1_DP_SEC_AUD_M_READBACK 0 0x4bcc 0 0 4294967295 mmDP2_DP_SEC_AUD_M_READBACK 0 0x4ccc 0 0 4294967295 mmDP3_DP_SEC_AUD_M_READBACK 0 0x4dcc 0 0 4294967295 mmDP4_DP_SEC_AUD_M_READBACK 0 0x4ecc 0 0 4294967295 mmDP5_DP_SEC_AUD_M_READBACK 0 0x4fcc 0 0 4294967295 mmDP6_DP_SEC_AUD_M_READBACK 0 0x54cc 0 0 4294967295 mmDP7_DP_SEC_AUD_M_READBACK 0 0x56cc 0 0 4294967295 mmDP8_DP_SEC_AUD_M_READBACK 0 0x57cc 0 0 4294967295 mmDP_SEC_TIMESTAMP 0 0x4acd 1 0 4294967295 DP_SEC_TIMESTAMP_MODE 0 0 mmDP0_DP_SEC_TIMESTAMP 0 0x4acd 0 0 4294967295 mmDP1_DP_SEC_TIMESTAMP 0 0x4bcd 0 0 4294967295 mmDP2_DP_SEC_TIMESTAMP 0 0x4ccd 0 0 4294967295 mmDP3_DP_SEC_TIMESTAMP 0 0x4dcd 0 0 4294967295 mmDP4_DP_SEC_TIMESTAMP 0 0x4ecd 0 0 4294967295 mmDP5_DP_SEC_TIMESTAMP 0 0x4fcd 0 0 4294967295 mmDP6_DP_SEC_TIMESTAMP 0 0x54cd 0 0 4294967295 mmDP7_DP_SEC_TIMESTAMP 0 0x56cd 0 0 4294967295 mmDP8_DP_SEC_TIMESTAMP 0 0x57cd 0 0 4294967295 mmDP_SEC_PACKET_CNTL 0 0x4ace 4 0 4294967295 DP_SEC_ASP_CODING_TYPE 1 3 DP_SEC_ASP_PRIORITY 4 4 DP_SEC_VERSION 8 13 DP_SEC_ASP_CHANNEL_COUNT_OVERRIDE 16 16 mmDP0_DP_SEC_PACKET_CNTL 0 0x4ace 0 0 4294967295 mmDP1_DP_SEC_PACKET_CNTL 0 0x4bce 0 0 4294967295 mmDP2_DP_SEC_PACKET_CNTL 0 0x4cce 0 0 4294967295 mmDP3_DP_SEC_PACKET_CNTL 0 0x4dce 0 0 4294967295 mmDP4_DP_SEC_PACKET_CNTL 0 0x4ece 0 0 4294967295 mmDP5_DP_SEC_PACKET_CNTL 0 0x4fce 0 0 4294967295 mmDP6_DP_SEC_PACKET_CNTL 0 0x54ce 0 0 4294967295 mmDP7_DP_SEC_PACKET_CNTL 0 0x56ce 0 0 4294967295 mmDP8_DP_SEC_PACKET_CNTL 0 0x57ce 0 0 4294967295 mmDP_MSE_RATE_CNTL 0 0x4acf 2 0 4294967295 DP_MSE_RATE_Y 0 25 DP_MSE_RATE_X 26 31 mmDP0_DP_MSE_RATE_CNTL 0 0x4acf 0 0 4294967295 mmDP1_DP_MSE_RATE_CNTL 0 0x4bcf 0 0 4294967295 mmDP2_DP_MSE_RATE_CNTL 0 0x4ccf 0 0 4294967295 mmDP3_DP_MSE_RATE_CNTL 0 0x4dcf 0 0 4294967295 mmDP4_DP_MSE_RATE_CNTL 0 0x4ecf 0 0 4294967295 mmDP5_DP_MSE_RATE_CNTL 0 0x4fcf 0 0 4294967295 mmDP6_DP_MSE_RATE_CNTL 0 0x54cf 0 0 4294967295 mmDP7_DP_MSE_RATE_CNTL 0 0x56cf 0 0 4294967295 mmDP8_DP_MSE_RATE_CNTL 0 0x57cf 0 0 4294967295 mmDP_MSE_RATE_UPDATE 0 0x4ad1 1 0 4294967295 DP_MSE_RATE_UPDATE_PENDING 0 0 mmDP0_DP_MSE_RATE_UPDATE 0 0x4ad1 0 0 4294967295 mmDP1_DP_MSE_RATE_UPDATE 0 0x4bd1 0 0 4294967295 mmDP2_DP_MSE_RATE_UPDATE 0 0x4cd1 0 0 4294967295 mmDP3_DP_MSE_RATE_UPDATE 0 0x4dd1 0 0 4294967295 mmDP4_DP_MSE_RATE_UPDATE 0 0x4ed1 0 0 4294967295 mmDP5_DP_MSE_RATE_UPDATE 0 0x4fd1 0 0 4294967295 mmDP6_DP_MSE_RATE_UPDATE 0 0x54d1 0 0 4294967295 mmDP7_DP_MSE_RATE_UPDATE 0 0x56d1 0 0 4294967295 mmDP8_DP_MSE_RATE_UPDATE 0 0x57d1 0 0 4294967295 mmDP_MSE_SAT0 0 0x4ad2 4 0 4294967295 DP_MSE_SAT_SRC0 0 2 DP_MSE_SAT_SLOT_COUNT0 8 13 DP_MSE_SAT_SRC1 16 18 DP_MSE_SAT_SLOT_COUNT1 24 29 mmDP0_DP_MSE_SAT0 0 0x4ad2 0 0 4294967295 mmDP1_DP_MSE_SAT0 0 0x4bd2 0 0 4294967295 mmDP2_DP_MSE_SAT0 0 0x4cd2 0 0 4294967295 mmDP3_DP_MSE_SAT0 0 0x4dd2 0 0 4294967295 mmDP4_DP_MSE_SAT0 0 0x4ed2 0 0 4294967295 mmDP5_DP_MSE_SAT0 0 0x4fd2 0 0 4294967295 mmDP6_DP_MSE_SAT0 0 0x54d2 0 0 4294967295 mmDP7_DP_MSE_SAT0 0 0x56d2 0 0 4294967295 mmDP8_DP_MSE_SAT0 0 0x57d2 0 0 4294967295 mmDP_MSE_SAT1 0 0x4ad3 4 0 4294967295 DP_MSE_SAT_SRC2 0 2 DP_MSE_SAT_SLOT_COUNT2 8 13 DP_MSE_SAT_SRC3 16 18 DP_MSE_SAT_SLOT_COUNT3 24 29 mmDP0_DP_MSE_SAT1 0 0x4ad3 0 0 4294967295 mmDP1_DP_MSE_SAT1 0 0x4bd3 0 0 4294967295 mmDP2_DP_MSE_SAT1 0 0x4cd3 0 0 4294967295 mmDP3_DP_MSE_SAT1 0 0x4dd3 0 0 4294967295 mmDP4_DP_MSE_SAT1 0 0x4ed3 0 0 4294967295 mmDP5_DP_MSE_SAT1 0 0x4fd3 0 0 4294967295 mmDP6_DP_MSE_SAT1 0 0x54d3 0 0 4294967295 mmDP7_DP_MSE_SAT1 0 0x56d3 0 0 4294967295 mmDP8_DP_MSE_SAT1 0 0x57d3 0 0 4294967295 mmDP_MSE_SAT2 0 0x4ad4 4 0 4294967295 DP_MSE_SAT_SRC4 0 2 DP_MSE_SAT_SLOT_COUNT4 8 13 DP_MSE_SAT_SRC5 16 18 DP_MSE_SAT_SLOT_COUNT5 24 29 mmDP0_DP_MSE_SAT2 0 0x4ad4 0 0 4294967295 mmDP1_DP_MSE_SAT2 0 0x4bd4 0 0 4294967295 mmDP2_DP_MSE_SAT2 0 0x4cd4 0 0 4294967295 mmDP3_DP_MSE_SAT2 0 0x4dd4 0 0 4294967295 mmDP4_DP_MSE_SAT2 0 0x4ed4 0 0 4294967295 mmDP5_DP_MSE_SAT2 0 0x4fd4 0 0 4294967295 mmDP6_DP_MSE_SAT2 0 0x54d4 0 0 4294967295 mmDP7_DP_MSE_SAT2 0 0x56d4 0 0 4294967295 mmDP8_DP_MSE_SAT2 0 0x57d4 0 0 4294967295 mmDP_MSE_SAT_UPDATE 0 0x4ad5 2 0 4294967295 DP_MSE_SAT_UPDATE 0 1 DP_MSE_16_MTP_KEEPOUT 8 8 mmDP0_DP_MSE_SAT_UPDATE 0 0x4ad5 0 0 4294967295 mmDP1_DP_MSE_SAT_UPDATE 0 0x4bd5 0 0 4294967295 mmDP2_DP_MSE_SAT_UPDATE 0 0x4cd5 0 0 4294967295 mmDP3_DP_MSE_SAT_UPDATE 0 0x4dd5 0 0 4294967295 mmDP4_DP_MSE_SAT_UPDATE 0 0x4ed5 0 0 4294967295 mmDP5_DP_MSE_SAT_UPDATE 0 0x4fd5 0 0 4294967295 mmDP6_DP_MSE_SAT_UPDATE 0 0x54d5 0 0 4294967295 mmDP7_DP_MSE_SAT_UPDATE 0 0x56d5 0 0 4294967295 mmDP8_DP_MSE_SAT_UPDATE 0 0x57d5 0 0 4294967295 mmDP_MSE_LINK_TIMING 0 0x4ad6 2 0 4294967295 DP_MSE_LINK_FRAME 0 9 DP_MSE_LINK_LINE 16 17 mmDP0_DP_MSE_LINK_TIMING 0 0x4ad6 0 0 4294967295 mmDP1_DP_MSE_LINK_TIMING 0 0x4bd6 0 0 4294967295 mmDP2_DP_MSE_LINK_TIMING 0 0x4cd6 0 0 4294967295 mmDP3_DP_MSE_LINK_TIMING 0 0x4dd6 0 0 4294967295 mmDP4_DP_MSE_LINK_TIMING 0 0x4ed6 0 0 4294967295 mmDP5_DP_MSE_LINK_TIMING 0 0x4fd6 0 0 4294967295 mmDP6_DP_MSE_LINK_TIMING 0 0x54d6 0 0 4294967295 mmDP7_DP_MSE_LINK_TIMING 0 0x56d6 0 0 4294967295 mmDP8_DP_MSE_LINK_TIMING 0 0x57d6 0 0 4294967295 mmDP_MSE_MISC_CNTL 0 0x4ad7 4 0 4294967295 DP_MSE_BLANK_CODE 0 0 DP_MSE_TIMESTAMP_MODE 4 4 DP_MSE_ZERO_ENCODER 8 8 DP_MSE_OUTPUT_DPDBG_DATA 16 16 mmDP0_DP_MSE_MISC_CNTL 0 0x4ad7 0 0 4294967295 mmDP1_DP_MSE_MISC_CNTL 0 0x4bd7 0 0 4294967295 mmDP2_DP_MSE_MISC_CNTL 0 0x4cd7 0 0 4294967295 mmDP3_DP_MSE_MISC_CNTL 0 0x4dd7 0 0 4294967295 mmDP4_DP_MSE_MISC_CNTL 0 0x4ed7 0 0 4294967295 mmDP5_DP_MSE_MISC_CNTL 0 0x4fd7 0 0 4294967295 mmDP6_DP_MSE_MISC_CNTL 0 0x54d7 0 0 4294967295 mmDP7_DP_MSE_MISC_CNTL 0 0x56d7 0 0 4294967295 mmDP8_DP_MSE_MISC_CNTL 0 0x57d7 0 0 4294967295 mmDP_MSE_SAT0_STATUS 0 0x4adf 4 0 4294967295 DP_MSE_SAT_SRC0_STATUS 0 2 DP_MSE_SAT_SLOT_COUNT0_STATUS 8 13 DP_MSE_SAT_SRC1_STATUS 16 18 DP_MSE_SAT_SLOT_COUNT1_STATUS 24 29 mmDP0_DP_MSE_SAT0_STATUS 0 0x4adf 0 0 4294967295 mmDP1_DP_MSE_SAT0_STATUS 0 0x4bdf 0 0 4294967295 mmDP2_DP_MSE_SAT0_STATUS 0 0x4cdf 0 0 4294967295 mmDP3_DP_MSE_SAT0_STATUS 0 0x4ddf 0 0 4294967295 mmDP4_DP_MSE_SAT0_STATUS 0 0x4edf 0 0 4294967295 mmDP5_DP_MSE_SAT0_STATUS 0 0x4fdf 0 0 4294967295 mmDP6_DP_MSE_SAT0_STATUS 0 0x54df 0 0 4294967295 mmDP7_DP_MSE_SAT0_STATUS 0 0x56df 0 0 4294967295 mmDP8_DP_MSE_SAT0_STATUS 0 0x57df 0 0 4294967295 mmDP_MSE_SAT1_STATUS 0 0x4ae0 4 0 4294967295 DP_MSE_SAT_SRC2_STATUS 0 2 DP_MSE_SAT_SLOT_COUNT2_STATUS 8 13 DP_MSE_SAT_SRC3_STATUS 16 18 DP_MSE_SAT_SLOT_COUNT3_STATUS 24 29 mmDP0_DP_MSE_SAT1_STATUS 0 0x4ae0 0 0 4294967295 mmDP1_DP_MSE_SAT1_STATUS 0 0x4be0 0 0 4294967295 mmDP2_DP_MSE_SAT1_STATUS 0 0x4ce0 0 0 4294967295 mmDP3_DP_MSE_SAT1_STATUS 0 0x4de0 0 0 4294967295 mmDP4_DP_MSE_SAT1_STATUS 0 0x4ee0 0 0 4294967295 mmDP5_DP_MSE_SAT1_STATUS 0 0x4fe0 0 0 4294967295 mmDP6_DP_MSE_SAT1_STATUS 0 0x54e0 0 0 4294967295 mmDP7_DP_MSE_SAT1_STATUS 0 0x56e0 0 0 4294967295 mmDP8_DP_MSE_SAT1_STATUS 0 0x57e0 0 0 4294967295 mmDP_MSE_SAT2_STATUS 0 0x4ae1 4 0 4294967295 DP_MSE_SAT_SRC4_STATUS 0 2 DP_MSE_SAT_SLOT_COUNT4_STATUS 8 13 DP_MSE_SAT_SRC5_STATUS 16 18 DP_MSE_SAT_SLOT_COUNT5_STATUS 24 29 mmDP0_DP_MSE_SAT2_STATUS 0 0x4ae1 0 0 4294967295 mmDP1_DP_MSE_SAT2_STATUS 0 0x4be1 0 0 4294967295 mmDP2_DP_MSE_SAT2_STATUS 0 0x4ce1 0 0 4294967295 mmDP3_DP_MSE_SAT2_STATUS 0 0x4de1 0 0 4294967295 mmDP4_DP_MSE_SAT2_STATUS 0 0x4ee1 0 0 4294967295 mmDP5_DP_MSE_SAT2_STATUS 0 0x4fe1 0 0 4294967295 mmDP6_DP_MSE_SAT2_STATUS 0 0x54e1 0 0 4294967295 mmDP7_DP_MSE_SAT2_STATUS 0 0x56e1 0 0 4294967295 mmDP8_DP_MSE_SAT2_STATUS 0 0x57e1 0 0 4294967295 mmDP_TEST_DEBUG_INDEX 0 0x4ad8 2 0 4294967295 DP_TEST_DEBUG_INDEX 0 7 DP_TEST_DEBUG_WRITE_EN 8 8 mmDP0_DP_TEST_DEBUG_INDEX 0 0x4ad8 0 0 4294967295 mmDP1_DP_TEST_DEBUG_INDEX 0 0x4bd8 0 0 4294967295 mmDP2_DP_TEST_DEBUG_INDEX 0 0x4cd8 0 0 4294967295 mmDP3_DP_TEST_DEBUG_INDEX 0 0x4dd8 0 0 4294967295 mmDP4_DP_TEST_DEBUG_INDEX 0 0x4ed8 0 0 4294967295 mmDP5_DP_TEST_DEBUG_INDEX 0 0x4fd8 0 0 4294967295 mmDP6_DP_TEST_DEBUG_INDEX 0 0x54d8 0 0 4294967295 mmDP7_DP_TEST_DEBUG_INDEX 0 0x56d8 0 0 4294967295 mmDP8_DP_TEST_DEBUG_INDEX 0 0x57d8 0 0 4294967295 mmDP_TEST_DEBUG_DATA 0 0x4ad9 1 0 4294967295 DP_TEST_DEBUG_DATA 0 31 mmDP0_DP_TEST_DEBUG_DATA 0 0x4ad9 0 0 4294967295 mmDP1_DP_TEST_DEBUG_DATA 0 0x4bd9 0 0 4294967295 mmDP2_DP_TEST_DEBUG_DATA 0 0x4cd9 0 0 4294967295 mmDP3_DP_TEST_DEBUG_DATA 0 0x4dd9 0 0 4294967295 mmDP4_DP_TEST_DEBUG_DATA 0 0x4ed9 0 0 4294967295 mmDP5_DP_TEST_DEBUG_DATA 0 0x4fd9 0 0 4294967295 mmDP6_DP_TEST_DEBUG_DATA 0 0x54d9 0 0 4294967295 mmDP7_DP_TEST_DEBUG_DATA 0 0x56d9 0 0 4294967295 mmDP8_DP_TEST_DEBUG_DATA 0 0x57d9 0 0 4294967295 mmDP_FE_TEST_DEBUG_INDEX 0 0x4ada 2 0 4294967295 DP_FE_TEST_DEBUG_INDEX 0 7 DP_FE_TEST_DEBUG_WRITE_EN 8 8 mmDP0_DP_FE_TEST_DEBUG_INDEX 0 0x4ada 0 0 4294967295 mmDP1_DP_FE_TEST_DEBUG_INDEX 0 0x4bda 0 0 4294967295 mmDP2_DP_FE_TEST_DEBUG_INDEX 0 0x4cda 0 0 4294967295 mmDP3_DP_FE_TEST_DEBUG_INDEX 0 0x4dda 0 0 4294967295 mmDP4_DP_FE_TEST_DEBUG_INDEX 0 0x4eda 0 0 4294967295 mmDP5_DP_FE_TEST_DEBUG_INDEX 0 0x4fda 0 0 4294967295 mmDP6_DP_FE_TEST_DEBUG_INDEX 0 0x54da 0 0 4294967295 mmDP7_DP_FE_TEST_DEBUG_INDEX 0 0x56da 0 0 4294967295 mmDP8_DP_FE_TEST_DEBUG_INDEX 0 0x57da 0 0 4294967295 mmDP_FE_TEST_DEBUG_DATA 0 0x4adb 1 0 4294967295 DP_FE_TEST_DEBUG_DATA 0 31 mmDP0_DP_FE_TEST_DEBUG_DATA 0 0x4adb 0 0 4294967295 mmDP1_DP_FE_TEST_DEBUG_DATA 0 0x4bdb 0 0 4294967295 mmDP2_DP_FE_TEST_DEBUG_DATA 0 0x4cdb 0 0 4294967295 mmDP3_DP_FE_TEST_DEBUG_DATA 0 0x4ddb 0 0 4294967295 mmDP4_DP_FE_TEST_DEBUG_DATA 0 0x4edb 0 0 4294967295 mmDP5_DP_FE_TEST_DEBUG_DATA 0 0x4fdb 0 0 4294967295 mmDP6_DP_FE_TEST_DEBUG_DATA 0 0x54db 0 0 4294967295 mmDP7_DP_FE_TEST_DEBUG_DATA 0 0x56db 0 0 4294967295 mmDP8_DP_FE_TEST_DEBUG_DATA 0 0x57db 0 0 4294967295 mmAUX_CONTROL 0 0x5c00 13 0 4294967295 AUX_EN 0 0 AUX_RESET 4 4 AUX_RESET_DONE 5 5 AUX_LS_READ_EN 8 8 AUX_LS_UPDATE_DISABLE 12 12 AUX_IGNORE_HPD_DISCON 16 16 AUX_MODE_DET_EN 18 18 AUX_HPD_SEL 20 22 AUX_IMPCAL_REQ_EN 24 24 AUX_TEST_MODE 28 28 AUX_DEGLITCH_EN 29 29 SPARE_0 30 30 SPARE_1 31 31 mmDP_AUX0_AUX_CONTROL 0 0x5c00 0 0 4294967295 mmDP_AUX1_AUX_CONTROL 0 0x5c1c 0 0 4294967295 mmDP_AUX2_AUX_CONTROL 0 0x5c38 0 0 4294967295 mmDP_AUX3_AUX_CONTROL 0 0x5c54 0 0 4294967295 mmDP_AUX4_AUX_CONTROL 0 0x5c70 0 0 4294967295 mmDP_AUX5_AUX_CONTROL 0 0x5c8c 0 0 4294967295 mmAUX_SW_CONTROL 0 0x5c01 4 0 4294967295 AUX_SW_GO 0 0 AUX_LS_READ_TRIG 2 2 AUX_SW_START_DELAY 4 7 AUX_SW_WR_BYTES 16 20 mmDP_AUX0_AUX_SW_CONTROL 0 0x5c01 0 0 4294967295 mmDP_AUX1_AUX_SW_CONTROL 0 0x5c1d 0 0 4294967295 mmDP_AUX2_AUX_SW_CONTROL 0 0x5c39 0 0 4294967295 mmDP_AUX3_AUX_SW_CONTROL 0 0x5c55 0 0 4294967295 mmDP_AUX4_AUX_SW_CONTROL 0 0x5c71 0 0 4294967295 mmDP_AUX5_AUX_SW_CONTROL 0 0x5c8d 0 0 4294967295 mmAUX_ARB_CONTROL 0 0x5c02 10 0 4294967295 AUX_ARB_PRIORITY 0 1 AUX_REG_RW_CNTL_STATUS 2 3 AUX_NO_QUEUED_SW_GO 8 8 AUX_NO_QUEUED_LS_GO 10 10 AUX_SW_USE_AUX_REG_REQ 16 16 AUX_SW_PENDING_USE_AUX_REG_REQ 16 16 AUX_SW_DONE_USING_AUX_REG 17 17 AUX_DMCU_USE_AUX_REG_REQ 24 24 AUX_DMCU_PENDING_USE_AUX_REG_REQ 24 24 AUX_DMCU_DONE_USING_AUX_REG 25 25 mmDP_AUX0_AUX_ARB_CONTROL 0 0x5c02 0 0 4294967295 mmDP_AUX1_AUX_ARB_CONTROL 0 0x5c1e 0 0 4294967295 mmDP_AUX2_AUX_ARB_CONTROL 0 0x5c3a 0 0 4294967295 mmDP_AUX3_AUX_ARB_CONTROL 0 0x5c56 0 0 4294967295 mmDP_AUX4_AUX_ARB_CONTROL 0 0x5c72 0 0 4294967295 mmDP_AUX5_AUX_ARB_CONTROL 0 0x5c8e 0 0 4294967295 mmAUX_INTERRUPT_CONTROL 0 0x5c03 12 0 4294967295 AUX_SW_DONE_INT 0 0 AUX_SW_DONE_ACK 1 1 AUX_SW_DONE_MASK 2 2 AUX_LS_DONE_INT 4 4 AUX_LS_DONE_ACK 5 5 AUX_LS_DONE_MASK 6 6 AUX_GTC_SYNC_LOCK_DONE_INT 8 8 AUX_GTC_SYNC_LOCK_DONE_ACK 9 9 AUX_GTC_SYNC_LOCK_DONE_INT_MASK 10 10 AUX_GTC_SYNC_ERROR_INT 12 12 AUX_GTC_SYNC_ERROR_ACK 13 13 AUX_GTC_SYNC_ERROR_INT_MASK 14 14 mmDP_AUX0_AUX_INTERRUPT_CONTROL 0 0x5c03 0 0 4294967295 mmDP_AUX1_AUX_INTERRUPT_CONTROL 0 0x5c1f 0 0 4294967295 mmDP_AUX2_AUX_INTERRUPT_CONTROL 0 0x5c3b 0 0 4294967295 mmDP_AUX3_AUX_INTERRUPT_CONTROL 0 0x5c57 0 0 4294967295 mmDP_AUX4_AUX_INTERRUPT_CONTROL 0 0x5c73 0 0 4294967295 mmDP_AUX5_AUX_INTERRUPT_CONTROL 0 0x5c8f 0 0 4294967295 mmAUX_SW_STATUS 0 0x5c04 18 0 4294967295 AUX_SW_DONE 0 0 AUX_SW_REQ 1 1 AUX_SW_RX_TIMEOUT_STATE 4 6 AUX_SW_RX_TIMEOUT 7 7 AUX_SW_RX_OVERFLOW 8 8 AUX_SW_HPD_DISCON 9 9 AUX_SW_RX_PARTIAL_BYTE 10 10 AUX_SW_NON_AUX_MODE 11 11 AUX_SW_RX_MIN_COUNT_VIOL 12 12 AUX_SW_RX_INVALID_STOP 14 14 AUX_SW_RX_SYNC_INVALID_L 17 17 AUX_SW_RX_SYNC_INVALID_H 18 18 AUX_SW_RX_INVALID_START 19 19 AUX_SW_RX_RECV_NO_DET 20 20 AUX_SW_RX_RECV_INVALID_H 22 22 AUX_SW_RX_RECV_INVALID_L 23 23 AUX_SW_REPLY_BYTE_COUNT 24 28 AUX_ARB_STATUS 30 31 mmDP_AUX0_AUX_SW_STATUS 0 0x5c04 0 0 4294967295 mmDP_AUX1_AUX_SW_STATUS 0 0x5c20 0 0 4294967295 mmDP_AUX2_AUX_SW_STATUS 0 0x5c3c 0 0 4294967295 mmDP_AUX3_AUX_SW_STATUS 0 0x5c58 0 0 4294967295 mmDP_AUX4_AUX_SW_STATUS 0 0x5c74 0 0 4294967295 mmDP_AUX5_AUX_SW_STATUS 0 0x5c90 0 0 4294967295 mmAUX_LS_STATUS 0 0x5c05 20 0 4294967295 AUX_LS_DONE 0 0 AUX_LS_REQ 1 1 AUX_LS_RX_TIMEOUT_STATE 4 6 AUX_LS_RX_TIMEOUT 7 7 AUX_LS_RX_OVERFLOW 8 8 AUX_LS_HPD_DISCON 9 9 AUX_LS_RX_PARTIAL_BYTE 10 10 AUX_LS_NON_AUX_MODE 11 11 AUX_LS_RX_MIN_COUNT_VIOL 12 12 AUX_LS_RX_INVALID_STOP 14 14 AUX_LS_RX_SYNC_INVALID_L 17 17 AUX_LS_RX_SYNC_INVALID_H 18 18 AUX_LS_RX_INVALID_START 19 19 AUX_LS_RX_RECV_NO_DET 20 20 AUX_LS_RX_RECV_INVALID_H 22 22 AUX_LS_RX_RECV_INVALID_L 23 23 AUX_LS_REPLY_BYTE_COUNT 24 28 AUX_LS_CP_IRQ 29 29 AUX_LS_UPDATED 30 30 AUX_LS_UPDATED_ACK 31 31 mmDP_AUX0_AUX_LS_STATUS 0 0x5c05 0 0 4294967295 mmDP_AUX1_AUX_LS_STATUS 0 0x5c21 0 0 4294967295 mmDP_AUX2_AUX_LS_STATUS 0 0x5c3d 0 0 4294967295 mmDP_AUX3_AUX_LS_STATUS 0 0x5c59 0 0 4294967295 mmDP_AUX4_AUX_LS_STATUS 0 0x5c75 0 0 4294967295 mmDP_AUX5_AUX_LS_STATUS 0 0x5c91 0 0 4294967295 mmAUX_SW_DATA 0 0x5c06 4 0 4294967295 AUX_SW_DATA_RW 0 0 AUX_SW_DATA 8 15 AUX_SW_INDEX 16 20 AUX_SW_AUTOINCREMENT_DISABLE 31 31 mmDP_AUX0_AUX_SW_DATA 0 0x5c06 0 0 4294967295 mmDP_AUX1_AUX_SW_DATA 0 0x5c22 0 0 4294967295 mmDP_AUX2_AUX_SW_DATA 0 0x5c3e 0 0 4294967295 mmDP_AUX3_AUX_SW_DATA 0 0x5c5a 0 0 4294967295 mmDP_AUX4_AUX_SW_DATA 0 0x5c76 0 0 4294967295 mmDP_AUX5_AUX_SW_DATA 0 0x5c92 0 0 4294967295 mmAUX_LS_DATA 0 0x5c07 2 0 4294967295 AUX_LS_DATA 8 15 AUX_LS_INDEX 16 20 mmDP_AUX0_AUX_LS_DATA 0 0x5c07 0 0 4294967295 mmDP_AUX1_AUX_LS_DATA 0 0x5c23 0 0 4294967295 mmDP_AUX2_AUX_LS_DATA 0 0x5c3f 0 0 4294967295 mmDP_AUX3_AUX_LS_DATA 0 0x5c5b 0 0 4294967295 mmDP_AUX4_AUX_LS_DATA 0 0x5c77 0 0 4294967295 mmDP_AUX5_AUX_LS_DATA 0 0x5c93 0 0 4294967295 mmAUX_DPHY_TX_REF_CONTROL 0 0x5c08 3 0 4294967295 AUX_TX_REF_SEL 0 0 AUX_TX_RATE 4 5 AUX_TX_REF_DIV 16 24 mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL 0 0x5c08 0 0 4294967295 mmDP_AUX1_AUX_DPHY_TX_REF_CONTROL 0 0x5c24 0 0 4294967295 mmDP_AUX2_AUX_DPHY_TX_REF_CONTROL 0 0x5c40 0 0 4294967295 mmDP_AUX3_AUX_DPHY_TX_REF_CONTROL 0 0x5c5c 0 0 4294967295 mmDP_AUX4_AUX_DPHY_TX_REF_CONTROL 0 0x5c78 0 0 4294967295 mmDP_AUX5_AUX_DPHY_TX_REF_CONTROL 0 0x5c94 0 0 4294967295 mmAUX_DPHY_TX_CONTROL 0 0x5c09 3 0 4294967295 AUX_TX_PRECHARGE_LEN 0 2 AUX_TX_PRECHARGE_SYMBOLS 8 13 AUX_MODE_DET_CHECK_DELAY 16 18 mmDP_AUX0_AUX_DPHY_TX_CONTROL 0 0x5c09 0 0 4294967295 mmDP_AUX1_AUX_DPHY_TX_CONTROL 0 0x5c25 0 0 4294967295 mmDP_AUX2_AUX_DPHY_TX_CONTROL 0 0x5c41 0 0 4294967295 mmDP_AUX3_AUX_DPHY_TX_CONTROL 0 0x5c5d 0 0 4294967295 mmDP_AUX4_AUX_DPHY_TX_CONTROL 0 0x5c79 0 0 4294967295 mmDP_AUX5_AUX_DPHY_TX_CONTROL 0 0x5c95 0 0 4294967295 mmAUX_DPHY_RX_CONTROL0 0 0x5c0a 10 0 4294967295 AUX_RX_START_WINDOW 4 6 AUX_RX_RECEIVE_WINDOW 8 10 AUX_RX_HALF_SYM_DETECT_LEN 12 13 AUX_RX_TRANSITION_FILTER_EN 16 16 AUX_RX_ALLOW_BELOW_THRESHOLD_PHASE_DETECT 17 17 AUX_RX_ALLOW_BELOW_THRESHOLD_START 18 18 AUX_RX_ALLOW_BELOW_THRESHOLD_STOP 19 19 AUX_RX_PHASE_DETECT_LEN 20 21 AUX_RX_TIMEOUT_LEN 24 26 AUX_RX_DETECTION_THRESHOLD 28 30 mmDP_AUX0_AUX_DPHY_RX_CONTROL0 0 0x5c0a 0 0 4294967295 mmDP_AUX1_AUX_DPHY_RX_CONTROL0 0 0x5c26 0 0 4294967295 mmDP_AUX2_AUX_DPHY_RX_CONTROL0 0 0x5c42 0 0 4294967295 mmDP_AUX3_AUX_DPHY_RX_CONTROL0 0 0x5c5e 0 0 4294967295 mmDP_AUX4_AUX_DPHY_RX_CONTROL0 0 0x5c7a 0 0 4294967295 mmDP_AUX5_AUX_DPHY_RX_CONTROL0 0 0x5c96 0 0 4294967295 mmAUX_DPHY_RX_CONTROL1 0 0x5c0b 1 0 4294967295 AUX_RX_PRECHARGE_SKIP 0 7 mmDP_AUX0_AUX_DPHY_RX_CONTROL1 0 0x5c0b 0 0 4294967295 mmDP_AUX1_AUX_DPHY_RX_CONTROL1 0 0x5c27 0 0 4294967295 mmDP_AUX2_AUX_DPHY_RX_CONTROL1 0 0x5c43 0 0 4294967295 mmDP_AUX3_AUX_DPHY_RX_CONTROL1 0 0x5c5f 0 0 4294967295 mmDP_AUX4_AUX_DPHY_RX_CONTROL1 0 0x5c7b 0 0 4294967295 mmDP_AUX5_AUX_DPHY_RX_CONTROL1 0 0x5c97 0 0 4294967295 mmAUX_DPHY_TX_STATUS 0 0x5c0c 3 0 4294967295 AUX_TX_ACTIVE 0 0 AUX_TX_STATE 4 6 AUX_TX_HALF_SYM_PERIOD 16 24 mmDP_AUX0_AUX_DPHY_TX_STATUS 0 0x5c0c 0 0 4294967295 mmDP_AUX1_AUX_DPHY_TX_STATUS 0 0x5c28 0 0 4294967295 mmDP_AUX2_AUX_DPHY_TX_STATUS 0 0x5c44 0 0 4294967295 mmDP_AUX3_AUX_DPHY_TX_STATUS 0 0x5c60 0 0 4294967295 mmDP_AUX4_AUX_DPHY_TX_STATUS 0 0x5c7c 0 0 4294967295 mmDP_AUX5_AUX_DPHY_TX_STATUS 0 0x5c98 0 0 4294967295 mmAUX_DPHY_RX_STATUS 0 0x5c0d 4 0 4294967295 AUX_RX_STATE 0 2 AUX_RX_SYNC_VALID_COUNT 8 12 AUX_RX_HALF_SYM_PERIOD_FRACT 16 20 AUX_RX_HALF_SYM_PERIOD 21 29 mmDP_AUX0_AUX_DPHY_RX_STATUS 0 0x5c0d 0 0 4294967295 mmDP_AUX1_AUX_DPHY_RX_STATUS 0 0x5c29 0 0 4294967295 mmDP_AUX2_AUX_DPHY_RX_STATUS 0 0x5c45 0 0 4294967295 mmDP_AUX3_AUX_DPHY_RX_STATUS 0 0x5c61 0 0 4294967295 mmDP_AUX4_AUX_DPHY_RX_STATUS 0 0x5c7d 0 0 4294967295 mmDP_AUX5_AUX_DPHY_RX_STATUS 0 0x5c99 0 0 4294967295 mmAUX_GTC_SYNC_ERROR_CONTROL 0 0x5c0f 4 0 4294967295 AUX_GTC_POTENTIAL_ERROR_THRESHOLD 0 4 AUX_GTC_DEFINITE_ERROR_THRESHOLD 8 12 AUX_GTC_SYNC_LOCK_ACQ_TIMEOUT_LEN 16 17 AUX_GTC_SYNC_NUM_RETRY_FOR_LOCK_MAINT 20 21 mmDP_AUX0_AUX_GTC_SYNC_ERROR_CONTROL 0 0x5c0f 0 0 4294967295 mmDP_AUX1_AUX_GTC_SYNC_ERROR_CONTROL 0 0x5c2b 0 0 4294967295 mmDP_AUX2_AUX_GTC_SYNC_ERROR_CONTROL 0 0x5c47 0 0 4294967295 mmDP_AUX3_AUX_GTC_SYNC_ERROR_CONTROL 0 0x5c63 0 0 4294967295 mmDP_AUX4_AUX_GTC_SYNC_ERROR_CONTROL 0 0x5c7f 0 0 4294967295 mmDP_AUX5_AUX_GTC_SYNC_ERROR_CONTROL 0 0x5c9b 0 0 4294967295 mmAUX_GTC_SYNC_CONTROLLER_STATUS 0 0x5c10 12 0 4294967295 AUX_GTC_SYNC_LOCK_ACQ_COMPLETE 0 0 AUX_GTC_SYNC_LOCK_LOST 4 4 AUX_GTC_SYNC_LOCK_ACQ_TIMEOUT_OCCURRED 8 8 AUX_GTC_SYNC_LOCK_ACQ_TIMEOUT_STATE 9 12 AUX_GTC_SYNC_PHASE_ADJUST_TIME_VIOL 16 16 AUX_GTC_SYNC_CRITICAL_ERR_OCCURRED 20 20 AUX_GTC_SYNC_CRITICAL_ERR_OCCURRED_ACK 21 21 AUX_GTC_SYNC_MAX_POTENTIAL_ERR_REACHED 22 22 AUX_GTC_SYNC_MAX_POTENTIAL_ERR_REACHED_ACK 23 23 AUX_GTC_SYNC_MAX_DEFINITE_ERR_REACHED 24 24 AUX_GTC_SYNC_MAX_DEFINITE_ERR_REACHED_ACK 25 25 AUX_GTC_SYNC_CTRL_STATE 28 31 mmDP_AUX0_AUX_GTC_SYNC_CONTROLLER_STATUS 0 0x5c10 0 0 4294967295 mmDP_AUX1_AUX_GTC_SYNC_CONTROLLER_STATUS 0 0x5c2c 0 0 4294967295 mmDP_AUX2_AUX_GTC_SYNC_CONTROLLER_STATUS 0 0x5c48 0 0 4294967295 mmDP_AUX3_AUX_GTC_SYNC_CONTROLLER_STATUS 0 0x5c64 0 0 4294967295 mmDP_AUX4_AUX_GTC_SYNC_CONTROLLER_STATUS 0 0x5c80 0 0 4294967295 mmDP_AUX5_AUX_GTC_SYNC_CONTROLLER_STATUS 0 0x5c9c 0 0 4294967295 mmAUX_GTC_SYNC_STATUS 0 0x5c11 19 0 4294967295 AUX_GTC_SYNC_DONE 0 0 AUX_GTC_SYNC_REQ 1 1 AUX_GTC_SYNC_RX_TIMEOUT_STATE 4 6 AUX_GTC_SYNC_TIMEOUT 7 7 AUX_GTC_SYNC_RX_OVERFLOW 8 8 AUX_GTC_SYNC_HPD_DISCON 9 9 AUX_GTC_SYNC_RX_PARTIAL_BYTE 10 10 AUX_GTC_SYNC_NON_AUX_MODE 11 11 AUX_GTC_SYNC_RX_MIN_COUNT_VIOL 12 12 AUX_GTC_SYNC_RX_INVALID_STOP 14 14 AUX_GTC_SYNC_RX_SYNC_INVALID_L 17 17 AUX_GTC_SYNC_RX_SYNC_INVALID_H 18 18 AUX_GTC_SYNC_RX_INVALID_START 19 19 AUX_GTC_SYNC_RX_RECV_NO_DET 20 20 AUX_GTC_SYNC_RX_RECV_INVALID_H 22 22 AUX_GTC_SYNC_RX_RECV_INVALID_L 23 23 AUX_GTC_SYNC_REPLY_BYTE_COUNT 24 28 AUX_GTC_SYNC_NACKED 29 29 AUX_GTC_MASTER_REQ_BY_RX 30 30 mmDP_AUX0_AUX_GTC_SYNC_STATUS 0 0x5c11 0 0 4294967295 mmDP_AUX1_AUX_GTC_SYNC_STATUS 0 0x5c2d 0 0 4294967295 mmDP_AUX2_AUX_GTC_SYNC_STATUS 0 0x5c49 0 0 4294967295 mmDP_AUX3_AUX_GTC_SYNC_STATUS 0 0x5c65 0 0 4294967295 mmDP_AUX4_AUX_GTC_SYNC_STATUS 0 0x5c81 0 0 4294967295 mmDP_AUX5_AUX_GTC_SYNC_STATUS 0 0x5c9d 0 0 4294967295 mmAUX_TEST_DEBUG_INDEX 0 0x5c14 2 0 4294967295 AUX_TEST_DEBUG_INDEX 0 7 AUX_TEST_DEBUG_WRITE_EN 8 8 mmDP_AUX0_AUX_TEST_DEBUG_INDEX 0 0x5c14 0 0 4294967295 mmDP_AUX1_AUX_TEST_DEBUG_INDEX 0 0x5c30 0 0 4294967295 mmDP_AUX2_AUX_TEST_DEBUG_INDEX 0 0x5c4c 0 0 4294967295 mmDP_AUX3_AUX_TEST_DEBUG_INDEX 0 0x5c68 0 0 4294967295 mmDP_AUX4_AUX_TEST_DEBUG_INDEX 0 0x5c84 0 0 4294967295 mmDP_AUX5_AUX_TEST_DEBUG_INDEX 0 0x5ca0 0 0 4294967295 mmAUX_TEST_DEBUG_DATA 0 0x5c15 1 0 4294967295 AUX_TEST_DEBUG_DATA 0 31 mmDP_AUX0_AUX_TEST_DEBUG_DATA 0 0x5c15 0 0 4294967295 mmDP_AUX1_AUX_TEST_DEBUG_DATA 0 0x5c31 0 0 4294967295 mmDP_AUX2_AUX_TEST_DEBUG_DATA 0 0x5c4d 0 0 4294967295 mmDP_AUX3_AUX_TEST_DEBUG_DATA 0 0x5c69 0 0 4294967295 mmDP_AUX4_AUX_TEST_DEBUG_DATA 0 0x5c85 0 0 4294967295 mmDP_AUX5_AUX_TEST_DEBUG_DATA 0 0x5ca1 0 0 4294967295 ixDP_AUX_DEBUG_A 2 0x10 1 0 4294967295 DP_AUX_DEBUG_A 0 31 ixDP_AUX_DEBUG_B 2 0x11 1 0 4294967295 DP_AUX_DEBUG_B 0 31 ixDP_AUX_DEBUG_C 2 0x12 1 0 4294967295 DP_AUX_DEBUG_C 0 31 ixDP_AUX_DEBUG_D 2 0x13 1 0 4294967295 DP_AUX_DEBUG_D 0 31 ixDP_AUX_DEBUG_E 2 0x14 1 0 4294967295 DP_AUX_DEBUG_E 0 31 ixDP_AUX_DEBUG_F 2 0x15 1 0 4294967295 DP_AUX_DEBUG_F 0 31 ixDP_AUX_DEBUG_G 2 0x16 1 0 4294967295 DP_AUX_DEBUG_G 0 31 ixDP_AUX_DEBUG_H 2 0x17 1 0 4294967295 DP_AUX_DEBUG_H 0 31 ixDP_AUX_DEBUG_I 2 0x18 1 0 4294967295 DP_AUX_DEBUG_I 0 31 ixDP_AUX_DEBUG_J 2 0x19 1 0 4294967295 DP_AUX_DEBUG_J 0 31 ixDP_AUX_DEBUG_K 2 0x1a 1 0 4294967295 DP_AUX_DEBUG_K 0 31 ixDP_AUX_DEBUG_L 2 0x1b 1 0 4294967295 DP_AUX_DEBUG_L 0 31 ixDP_AUX_DEBUG_M 2 0x1c 1 0 4294967295 DP_AUX_DEBUG_M 0 31 ixDP_AUX_DEBUG_N 2 0x1d 1 0 4294967295 DP_AUX_DEBUG_N 0 31 ixDP_AUX_DEBUG_O 2 0x1e 1 0 4294967295 DP_AUX_DEBUG_O 0 31 ixDP_AUX_DEBUG_P 2 0x1f 1 0 4294967295 DP_AUX_DEBUG_P 0 31 ixDP_AUX_DEBUG_Q 2 0x20 1 0 4294967295 DP_AUX_DEBUG_Q 0 31 mmDVO_ENABLE 0 0x16a0 2 0 4294967295 DVO_ENABLE 0 0 DVO_PIXEL_WIDTH 4 5 mmDVO_SOURCE_SELECT 0 0x16a1 2 0 4294967295 DVO_SOURCE_SELECT 0 2 DVO_STEREOSYNC_SELECT 16 18 mmDVO_OUTPUT 0 0x16a2 2 0 4294967295 DVO_OUTPUT_ENABLE_MODE 0 1 DVO_CLOCK_MODE 8 8 mmDVO_CONTROL 0 0x16a3 12 0 4294967295 DVO_RATE_SELECT 0 0 DVO_SDRCLK_SEL 1 1 DVO_DVPDATA_WIDTH 4 5 DVO_DUAL_CHANNEL_EN 8 8 DVO_RESET_FIFO 16 16 DVO_SYNC_PHASE 17 17 DVO_INVERT_DVOCLK 18 18 DVO_HSYNC_POLARITY 20 20 DVO_VSYNC_POLARITY 21 21 DVO_DE_POLARITY 22 22 DVO_COLOR_FORMAT 24 25 DVO_CTL3 31 31 mmDVO_CRC_EN 0 0x16a4 1 0 4294967295 DVO_CRC2_EN 16 16 mmDVO_CRC2_SIG_MASK 0 0x16a5 1 0 4294967295 DVO_CRC2_SIG_MASK 0 26 mmDVO_CRC2_SIG_RESULT 0 0x16a6 1 0 4294967295 DVO_CRC2_SIG_RESULT 0 26 mmDVO_FIFO_ERROR_STATUS 0 0x16a7 10 0 4294967295 DVO_FIFO_LEVEL_ERROR 0 0 DVO_FIFO_USE_OVERWRITE_LEVEL 1 1 DVO_FIFO_OVERWRITE_LEVEL 2 7 DVO_FIFO_ERROR_ACK 8 8 DVO_FIFO_CAL_AVERAGE_LEVEL 10 15 DVO_FIFO_MAXIMUM_LEVEL 16 19 DVO_FIFO_MINIMUM_LEVEL 22 25 DVO_FIFO_CALIBRATED 29 29 DVO_FIFO_FORCE_RECAL_AVERAGE 30 30 DVO_FIFO_FORCE_RECOMP_MINMAX 31 31 mmDVO_TEST_DEBUG_INDEX 0 0x16a8 2 0 4294967295 DVO_TEST_DEBUG_INDEX 0 7 DVO_TEST_DEBUG_WRITE_EN 8 8 mmDVO_TEST_DEBUG_DATA 0 0x16a9 1 0 4294967295 DVO_TEST_DEBUG_DATA 0 31 mmFBC_CNTL 0 0x280 7 0 4294967295 FBC_GRPH_COMP_EN 0 0 FBC_SRC_SEL 1 3 FBC_COMP_CLK_GATE_EN 8 8 FBC_DECOMP_CLK_GATE_EN 10 10 FBC_COHERENCY_MODE 16 17 FBC_SOFT_COMPRESS_EN 25 25 FBC_EN 31 31 mmFBC_IDLE_FORCE_CLEAR_MASK 0 0x282 1 0 4294967295 FBC_IDLE_FORCE_CLEAR_MASK 0 31 mmFBC_START_STOP_DELAY 0 0x283 3 0 4294967295 FBC_DECOMP_START_DELAY 0 4 FBC_DECOMP_STOP_DELAY 7 7 FBC_COMP_START_DELAY 8 12 mmFBC_COMP_CNTL 0 0x284 6 0 4294967295 FBC_MIN_COMPRESSION 0 3 FBC_DEPTH_MONO08_EN 16 16 FBC_DEPTH_MONO16_EN 17 17 FBC_DEPTH_RGB04_EN 18 18 FBC_DEPTH_RGB08_EN 19 19 FBC_DEPTH_RGB16_EN 20 20 mmFBC_COMP_MODE 0 0x285 6 0 4294967295 FBC_RLE_EN 0 0 FBC_DPCM4_RGB_EN 8 8 FBC_DPCM8_RGB_EN 9 9 FBC_DPCM4_YUV_EN 10 10 FBC_DPCM8_YUV_EN 11 11 FBC_IND_EN 16 16 mmFBC_DEBUG0 0 0x286 5 0 4294967295 FBC_PERF_MUX0 0 7 FBC_PERF_MUX1 8 15 FBC_COMP_WAKE_DIS 16 16 FBC_DEBUG0 17 23 FBC_DEBUG_MUX 24 31 mmFBC_DEBUG1 0 0x287 1 0 4294967295 FBC_DEBUG1 0 31 mmFBC_DEBUG2 0 0x288 1 0 4294967295 FBC_DEBUG2 0 31 mmFBC_IND_LUT0 0 0x289 1 0 4294967295 FBC_IND_LUT0 0 31 mmFBC_IND_LUT1 0 0x28a 1 0 4294967295 FBC_IND_LUT1 0 31 mmFBC_IND_LUT2 0 0x28b 1 0 4294967295 FBC_IND_LUT2 0 31 mmFBC_IND_LUT3 0 0x28c 1 0 4294967295 FBC_IND_LUT3 0 31 mmFBC_IND_LUT4 0 0x28d 1 0 4294967295 FBC_IND_LUT4 0 31 mmFBC_IND_LUT5 0 0x28e 1 0 4294967295 FBC_IND_LUT5 0 31 mmFBC_IND_LUT6 0 0x28f 1 0 4294967295 FBC_IND_LUT6 0 31 mmFBC_IND_LUT7 0 0x290 1 0 4294967295 FBC_IND_LUT7 0 31 mmFBC_IND_LUT8 0 0x291 1 0 4294967295 FBC_IND_LUT8 0 31 mmFBC_IND_LUT9 0 0x292 1 0 4294967295 FBC_IND_LUT9 0 31 mmFBC_IND_LUT10 0 0x293 1 0 4294967295 FBC_IND_LUT10 0 31 mmFBC_IND_LUT11 0 0x294 1 0 4294967295 FBC_IND_LUT11 0 31 mmFBC_IND_LUT12 0 0x295 1 0 4294967295 FBC_IND_LUT12 0 31 mmFBC_IND_LUT13 0 0x296 1 0 4294967295 FBC_IND_LUT13 0 31 mmFBC_IND_LUT14 0 0x297 1 0 4294967295 FBC_IND_LUT14 0 31 mmFBC_IND_LUT15 0 0x298 1 0 4294967295 FBC_IND_LUT15 0 31 mmFBC_CSM_REGION_OFFSET_01 0 0x299 2 0 4294967295 FBC_CSM_REGION_OFFSET_0 0 11 FBC_CSM_REGION_OFFSET_1 16 27 mmFBC_CSM_REGION_OFFSET_23 0 0x29a 2 0 4294967295 FBC_CSM_REGION_OFFSET_2 0 11 FBC_CSM_REGION_OFFSET_3 16 27 mmFBC_CLIENT_REGION_MASK 0 0x29b 1 0 4294967295 FBC_MEMORY_REGION_MASK 16 19 mmFBC_DEBUG_COMP 0 0x29c 6 0 4294967295 FBC_COMP_SWAP 0 1 FBC_COMP_RSIZE 3 3 FBC_COMP_BUSY_HYSTERESIS 4 7 FBC_COMP_CLK_CNTL 8 9 FBC_COMP_PRIVILEGED_ACCESS_ENABLE 10 10 FBC_COMP_ADDRESS_TRANSLATION_ENABLE 11 11 mmFBC_DEBUG_CSR 0 0x29d 4 0 4294967295 FBC_DEBUG_CSR_ADDR 0 11 FBC_DEBUG_CSR_WR_DATA 16 16 FBC_DEBUG_CSR_RD_DATA 17 17 FBC_DEBUG_CSR_EN 31 31 mmFBC_DEBUG_CSR_RDATA 0 0x29e 1 0 4294967295 FBC_DEBUG_CSR_RDATA 0 31 mmFBC_DEBUG_CSR_WDATA 0 0x29f 1 0 4294967295 FBC_DEBUG_CSR_WDATA 0 31 mmFBC_DEBUG_CSR_RDATA_HI 0 0x2a0 1 0 4294967295 FBC_DEBUG_CSR_RDATA_HI 0 7 mmFBC_DEBUG_CSR_WDATA_HI 0 0x2a1 1 0 4294967295 FBC_DEBUG_CSR_WDATA_HI 0 7 mmFBC_MISC 0 0x2a2 14 0 4294967295 FBC_DECOMPRESS_ERROR 0 1 FBC_STOP_ON_ERROR 2 2 FBC_INVALIDATE_ON_ERROR 3 3 FBC_ERROR_PIXEL 4 7 FBC_DIVIDE_X 8 9 FBC_DIVIDE_Y 10 10 FBC_RSM_WRITE_VALUE 11 11 FBC_RSM_UNCOMP_DATA_IMMEDIATELY 12 12 FBC_STOP_ON_HFLIP_EVENT 13 13 FBC_DECOMPRESS_ERROR_CLEAR 16 16 FBC_RESET_AT_ENABLE 20 20 FBC_RESET_AT_DISABLE 21 21 FBC_SLOW_REQ_INTERVAL 24 28 FBC_FORCE_DECOMPRESSOR_EN 31 31 mmFBC_STATUS 0 0x2a3 1 0 4294967295 FBC_ENABLE_STATUS 0 0 mmFBC_ALPHA_CNTL 0 0x2a6 3 0 4294967295 FBC_ALPHA_COMP_EN 0 0 FBC_FORCE_COPY_TO_COMP_BUF 4 4 FBC_ZERO_ALPHA_CHUNK_SKIP_EN 8 8 mmFBC_ALPHA_RGB_OVERRIDE 0 0x2a7 3 0 4294967295 FBC_ZERO_ALPHA_R_VAL 0 7 FBC_ZERO_ALPHA_G_VAL 12 19 FBC_ZERO_ALPHA_B_VAL 24 31 mmFBC_TEST_DEBUG_INDEX 0 0x2a4 2 0 4294967295 FBC_TEST_DEBUG_INDEX 0 7 FBC_TEST_DEBUG_WRITE_EN 8 8 mmFBC_TEST_DEBUG_DATA 0 0x2a5 1 0 4294967295 FBC_TEST_DEBUG_DATA 0 31 mmFMT_CLAMP_COMPONENT_R 0 0x1be8 2 0 4294967295 FMT_CLAMP_LOWER_R 0 15 FMT_CLAMP_UPPER_R 16 31 mmFMT0_FMT_CLAMP_COMPONENT_R 0 0x1be8 0 0 4294967295 mmFMT1_FMT_CLAMP_COMPONENT_R 0 0x1de8 0 0 4294967295 mmFMT2_FMT_CLAMP_COMPONENT_R 0 0x1fe8 0 0 4294967295 mmFMT3_FMT_CLAMP_COMPONENT_R 0 0x41e8 0 0 4294967295 mmFMT4_FMT_CLAMP_COMPONENT_R 0 0x43e8 0 0 4294967295 mmFMT5_FMT_CLAMP_COMPONENT_R 0 0x45e8 0 0 4294967295 mmFMT_CLAMP_COMPONENT_G 0 0x1be9 2 0 4294967295 FMT_CLAMP_LOWER_G 0 15 FMT_CLAMP_UPPER_G 16 31 mmFMT0_FMT_CLAMP_COMPONENT_G 0 0x1be9 0 0 4294967295 mmFMT1_FMT_CLAMP_COMPONENT_G 0 0x1de9 0 0 4294967295 mmFMT2_FMT_CLAMP_COMPONENT_G 0 0x1fe9 0 0 4294967295 mmFMT3_FMT_CLAMP_COMPONENT_G 0 0x41e9 0 0 4294967295 mmFMT4_FMT_CLAMP_COMPONENT_G 0 0x43e9 0 0 4294967295 mmFMT5_FMT_CLAMP_COMPONENT_G 0 0x45e9 0 0 4294967295 mmFMT_CLAMP_COMPONENT_B 0 0x1bea 2 0 4294967295 FMT_CLAMP_LOWER_B 0 15 FMT_CLAMP_UPPER_B 16 31 mmFMT0_FMT_CLAMP_COMPONENT_B 0 0x1bea 0 0 4294967295 mmFMT1_FMT_CLAMP_COMPONENT_B 0 0x1dea 0 0 4294967295 mmFMT2_FMT_CLAMP_COMPONENT_B 0 0x1fea 0 0 4294967295 mmFMT3_FMT_CLAMP_COMPONENT_B 0 0x41ea 0 0 4294967295 mmFMT4_FMT_CLAMP_COMPONENT_B 0 0x43ea 0 0 4294967295 mmFMT5_FMT_CLAMP_COMPONENT_B 0 0x45ea 0 0 4294967295 mmFMT_DYNAMIC_EXP_CNTL 0 0x1bed 2 0 4294967295 FMT_DYNAMIC_EXP_EN 0 0 FMT_DYNAMIC_EXP_MODE 4 4 mmFMT0_FMT_DYNAMIC_EXP_CNTL 0 0x1bed 0 0 4294967295 mmFMT1_FMT_DYNAMIC_EXP_CNTL 0 0x1ded 0 0 4294967295 mmFMT2_FMT_DYNAMIC_EXP_CNTL 0 0x1fed 0 0 4294967295 mmFMT3_FMT_DYNAMIC_EXP_CNTL 0 0x41ed 0 0 4294967295 mmFMT4_FMT_DYNAMIC_EXP_CNTL 0 0x43ed 0 0 4294967295 mmFMT5_FMT_DYNAMIC_EXP_CNTL 0 0x45ed 0 0 4294967295 mmFMT_CONTROL 0 0x1bee 11 0 4294967295 FMT_STEREOSYNC_OVERRIDE 0 0 FMT_STEREOSYNC_OVR_POL 4 4 FMT_SPATIAL_DITHER_FRAME_COUNTER_MAX 8 11 FMT_SPATIAL_DITHER_FRAME_COUNTER_BIT_SWAP 12 13 FMT_PIXEL_ENCODING 16 17 FMT_SUBSAMPLING_MODE 18 19 FMT_SUBSAMPLING_ORDER 20 20 FMT_CBCR_BIT_REDUCTION_BYPASS 21 21 FMT_SRC_SELECT 24 26 FMT_420_PIXEL_PHASE_LOCKED 30 30 FMT_420_PIXEL_PHASE_LOCKED_CLEAR 31 31 mmFMT0_FMT_CONTROL 0 0x1bee 0 0 4294967295 mmFMT1_FMT_CONTROL 0 0x1dee 0 0 4294967295 mmFMT2_FMT_CONTROL 0 0x1fee 0 0 4294967295 mmFMT3_FMT_CONTROL 0 0x41ee 0 0 4294967295 mmFMT4_FMT_CONTROL 0 0x43ee 0 0 4294967295 mmFMT5_FMT_CONTROL 0 0x45ee 0 0 4294967295 mmFMT_BIT_DEPTH_CONTROL 0 0x1bf2 17 0 4294967295 FMT_TRUNCATE_EN 0 0 FMT_TRUNCATE_MODE 1 1 FMT_TRUNCATE_DEPTH 4 5 FMT_SPATIAL_DITHER_EN 8 8 FMT_SPATIAL_DITHER_MODE 9 10 FMT_SPATIAL_DITHER_DEPTH 11 12 FMT_FRAME_RANDOM_ENABLE 13 13 FMT_RGB_RANDOM_ENABLE 14 14 FMT_HIGHPASS_RANDOM_ENABLE 15 15 FMT_TEMPORAL_DITHER_EN 16 16 FMT_TEMPORAL_DITHER_DEPTH 17 18 FMT_TEMPORAL_DITHER_OFFSET 21 22 FMT_TEMPORAL_LEVEL 24 24 FMT_TEMPORAL_DITHER_RESET 25 25 FMT_25FRC_SEL 26 27 FMT_50FRC_SEL 28 29 FMT_75FRC_SEL 30 31 mmFMT0_FMT_BIT_DEPTH_CONTROL 0 0x1bf2 0 0 4294967295 mmFMT1_FMT_BIT_DEPTH_CONTROL 0 0x1df2 0 0 4294967295 mmFMT2_FMT_BIT_DEPTH_CONTROL 0 0x1ff2 0 0 4294967295 mmFMT3_FMT_BIT_DEPTH_CONTROL 0 0x41f2 0 0 4294967295 mmFMT4_FMT_BIT_DEPTH_CONTROL 0 0x43f2 0 0 4294967295 mmFMT5_FMT_BIT_DEPTH_CONTROL 0 0x45f2 0 0 4294967295 mmFMT_DITHER_RAND_R_SEED 0 0x1bf3 2 0 4294967295 FMT_RAND_R_SEED 0 7 FMT_OFFSET_R_CR 16 31 mmFMT0_FMT_DITHER_RAND_R_SEED 0 0x1bf3 0 0 4294967295 mmFMT1_FMT_DITHER_RAND_R_SEED 0 0x1df3 0 0 4294967295 mmFMT2_FMT_DITHER_RAND_R_SEED 0 0x1ff3 0 0 4294967295 mmFMT3_FMT_DITHER_RAND_R_SEED 0 0x41f3 0 0 4294967295 mmFMT4_FMT_DITHER_RAND_R_SEED 0 0x43f3 0 0 4294967295 mmFMT5_FMT_DITHER_RAND_R_SEED 0 0x45f3 0 0 4294967295 mmFMT_DITHER_RAND_G_SEED 0 0x1bf4 2 0 4294967295 FMT_RAND_G_SEED 0 7 FMT_OFFSET_G_Y 16 31 mmFMT0_FMT_DITHER_RAND_G_SEED 0 0x1bf4 0 0 4294967295 mmFMT1_FMT_DITHER_RAND_G_SEED 0 0x1df4 0 0 4294967295 mmFMT2_FMT_DITHER_RAND_G_SEED 0 0x1ff4 0 0 4294967295 mmFMT3_FMT_DITHER_RAND_G_SEED 0 0x41f4 0 0 4294967295 mmFMT4_FMT_DITHER_RAND_G_SEED 0 0x43f4 0 0 4294967295 mmFMT5_FMT_DITHER_RAND_G_SEED 0 0x45f4 0 0 4294967295 mmFMT_DITHER_RAND_B_SEED 0 0x1bf5 2 0 4294967295 FMT_RAND_B_SEED 0 7 FMT_OFFSET_B_CB 16 31 mmFMT0_FMT_DITHER_RAND_B_SEED 0 0x1bf5 0 0 4294967295 mmFMT1_FMT_DITHER_RAND_B_SEED 0 0x1df5 0 0 4294967295 mmFMT2_FMT_DITHER_RAND_B_SEED 0 0x1ff5 0 0 4294967295 mmFMT3_FMT_DITHER_RAND_B_SEED 0 0x41f5 0 0 4294967295 mmFMT4_FMT_DITHER_RAND_B_SEED 0 0x43f5 0 0 4294967295 mmFMT5_FMT_DITHER_RAND_B_SEED 0 0x45f5 0 0 4294967295 mmFMT_TEMPORAL_DITHER_PATTERN_CONTROL 0 0x1bf6 0 0 4294967295 mmFMT0_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0 0x1bf6 0 0 4294967295 mmFMT1_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0 0x1df6 0 0 4294967295 mmFMT2_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0 0x1ff6 0 0 4294967295 mmFMT3_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0 0x41f6 0 0 4294967295 mmFMT4_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0 0x43f6 0 0 4294967295 mmFMT5_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0 0x45f6 0 0 4294967295 mmFMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0 0x1bf7 0 0 4294967295 mmFMT0_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0 0x1bf7 0 0 4294967295 mmFMT1_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0 0x1df7 0 0 4294967295 mmFMT2_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0 0x1ff7 0 0 4294967295 mmFMT3_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0 0x41f7 0 0 4294967295 mmFMT4_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0 0x43f7 0 0 4294967295 mmFMT5_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0 0x45f7 0 0 4294967295 mmFMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0 0x1bf8 0 0 4294967295 mmFMT0_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0 0x1bf8 0 0 4294967295 mmFMT1_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0 0x1df8 0 0 4294967295 mmFMT2_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0 0x1ff8 0 0 4294967295 mmFMT3_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0 0x41f8 0 0 4294967295 mmFMT4_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0 0x43f8 0 0 4294967295 mmFMT5_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0 0x45f8 0 0 4294967295 mmFMT_CLAMP_CNTL 0 0x1bf9 2 0 4294967295 FMT_CLAMP_DATA_EN 0 0 FMT_CLAMP_COLOR_FORMAT 16 18 mmFMT0_FMT_CLAMP_CNTL 0 0x1bf9 0 0 4294967295 mmFMT1_FMT_CLAMP_CNTL 0 0x1df9 0 0 4294967295 mmFMT2_FMT_CLAMP_CNTL 0 0x1ff9 0 0 4294967295 mmFMT3_FMT_CLAMP_CNTL 0 0x41f9 0 0 4294967295 mmFMT4_FMT_CLAMP_CNTL 0 0x43f9 0 0 4294967295 mmFMT5_FMT_CLAMP_CNTL 0 0x45f9 0 0 4294967295 mmFMT_CRC_CNTL 0 0x1bfa 11 0 4294967295 FMT_CRC_EN 0 0 FMT_DTMTEST_CRC_EN 1 1 FMT_CRC_CONT_EN 4 4 FMT_ONE_SHOT_CRC_PENDING 5 5 FMT_CRC_INCLUDE_OVERSCAN 6 6 FMT_CRC_ONLY_BLANKB 8 8 FMT_CRC_PSR_MODE_ENABLE 9 9 FMT_CRC_INTERLACE_MODE 12 13 FMT_CRC_USE_NEW_AND_REPEATED_PIXELS 16 16 FMT_CRC_EVEN_ODD_PIX_ENABLE 20 20 FMT_CRC_EVEN_ODD_PIX_SELECT 24 24 mmFMT0_FMT_CRC_CNTL 0 0x1bfa 0 0 4294967295 mmFMT1_FMT_CRC_CNTL 0 0x1dfa 0 0 4294967295 mmFMT2_FMT_CRC_CNTL 0 0x1ffa 0 0 4294967295 mmFMT3_FMT_CRC_CNTL 0 0x41fa 0 0 4294967295 mmFMT4_FMT_CRC_CNTL 0 0x43fa 0 0 4294967295 mmFMT5_FMT_CRC_CNTL 0 0x45fa 0 0 4294967295 mmFMT_CRC_SIG_RED_GREEN_MASK 0 0x1bfb 2 0 4294967295 FMT_CRC_SIG_RED_MASK 0 15 FMT_CRC_SIG_GREEN_MASK 16 31 mmFMT0_FMT_CRC_SIG_RED_GREEN_MASK 0 0x1bfb 0 0 4294967295 mmFMT1_FMT_CRC_SIG_RED_GREEN_MASK 0 0x1dfb 0 0 4294967295 mmFMT2_FMT_CRC_SIG_RED_GREEN_MASK 0 0x1ffb 0 0 4294967295 mmFMT3_FMT_CRC_SIG_RED_GREEN_MASK 0 0x41fb 0 0 4294967295 mmFMT4_FMT_CRC_SIG_RED_GREEN_MASK 0 0x43fb 0 0 4294967295 mmFMT5_FMT_CRC_SIG_RED_GREEN_MASK 0 0x45fb 0 0 4294967295 mmFMT_CRC_SIG_BLUE_CONTROL_MASK 0 0x1bfc 2 0 4294967295 FMT_CRC_SIG_BLUE_MASK 0 15 FMT_CRC_SIG_CONTROL_MASK 16 31 mmFMT0_FMT_CRC_SIG_BLUE_CONTROL_MASK 0 0x1bfc 0 0 4294967295 mmFMT1_FMT_CRC_SIG_BLUE_CONTROL_MASK 0 0x1dfc 0 0 4294967295 mmFMT2_FMT_CRC_SIG_BLUE_CONTROL_MASK 0 0x1ffc 0 0 4294967295 mmFMT3_FMT_CRC_SIG_BLUE_CONTROL_MASK 0 0x41fc 0 0 4294967295 mmFMT4_FMT_CRC_SIG_BLUE_CONTROL_MASK 0 0x43fc 0 0 4294967295 mmFMT5_FMT_CRC_SIG_BLUE_CONTROL_MASK 0 0x45fc 0 0 4294967295 mmFMT_CRC_SIG_RED_GREEN 0 0x1bfd 2 0 4294967295 FMT_CRC_SIG_RED 0 15 FMT_CRC_SIG_GREEN 16 31 mmFMT0_FMT_CRC_SIG_RED_GREEN 0 0x1bfd 0 0 4294967295 mmFMT1_FMT_CRC_SIG_RED_GREEN 0 0x1dfd 0 0 4294967295 mmFMT2_FMT_CRC_SIG_RED_GREEN 0 0x1ffd 0 0 4294967295 mmFMT3_FMT_CRC_SIG_RED_GREEN 0 0x41fd 0 0 4294967295 mmFMT4_FMT_CRC_SIG_RED_GREEN 0 0x43fd 0 0 4294967295 mmFMT5_FMT_CRC_SIG_RED_GREEN 0 0x45fd 0 0 4294967295 mmFMT_CRC_SIG_BLUE_CONTROL 0 0x1bfe 2 0 4294967295 FMT_CRC_SIG_BLUE 0 15 FMT_CRC_SIG_CONTROL 16 31 mmFMT0_FMT_CRC_SIG_BLUE_CONTROL 0 0x1bfe 0 0 4294967295 mmFMT1_FMT_CRC_SIG_BLUE_CONTROL 0 0x1dfe 0 0 4294967295 mmFMT2_FMT_CRC_SIG_BLUE_CONTROL 0 0x1ffe 0 0 4294967295 mmFMT3_FMT_CRC_SIG_BLUE_CONTROL 0 0x41fe 0 0 4294967295 mmFMT4_FMT_CRC_SIG_BLUE_CONTROL 0 0x43fe 0 0 4294967295 mmFMT5_FMT_CRC_SIG_BLUE_CONTROL 0 0x45fe 0 0 4294967295 mmFMT_DEBUG_CNTL 0 0x1bff 1 0 4294967295 FMT_DEBUG_COLOR_SELECT 0 1 mmFMT0_FMT_DEBUG_CNTL 0 0x1bff 0 0 4294967295 mmFMT1_FMT_DEBUG_CNTL 0 0x1dff 0 0 4294967295 mmFMT2_FMT_DEBUG_CNTL 0 0x1fff 0 0 4294967295 mmFMT3_FMT_DEBUG_CNTL 0 0x41ff 0 0 4294967295 mmFMT4_FMT_DEBUG_CNTL 0 0x43ff 0 0 4294967295 mmFMT5_FMT_DEBUG_CNTL 0 0x45ff 0 0 4294967295 mmFMT_SIDE_BY_SIDE_STEREO_CONTROL 0 0x1bf0 1 0 4294967295 FMT_SIDE_BY_SIDE_STEREO_ACTIVE_WIDTH 0 12 mmFMT0_FMT_SIDE_BY_SIDE_STEREO_CONTROL 0 0x1bf0 0 0 4294967295 mmFMT1_FMT_SIDE_BY_SIDE_STEREO_CONTROL 0 0x1df0 0 0 4294967295 mmFMT2_FMT_SIDE_BY_SIDE_STEREO_CONTROL 0 0x1ff0 0 0 4294967295 mmFMT3_FMT_SIDE_BY_SIDE_STEREO_CONTROL 0 0x41f0 0 0 4294967295 mmFMT4_FMT_SIDE_BY_SIDE_STEREO_CONTROL 0 0x43f0 0 0 4294967295 mmFMT5_FMT_SIDE_BY_SIDE_STEREO_CONTROL 0 0x45f0 0 0 4294967295 mmFMT_420_HBLANK_EARLY_START 0 0x1bf1 1 0 4294967295 FMT_420_HBLANK_EARLY_START 0 11 mmFMT0_FMT_420_HBLANK_EARLY_START 0 0x1bf1 0 0 4294967295 mmFMT1_FMT_420_HBLANK_EARLY_START 0 0x1df1 0 0 4294967295 mmFMT2_FMT_420_HBLANK_EARLY_START 0 0x1ff1 0 0 4294967295 mmFMT3_FMT_420_HBLANK_EARLY_START 0 0x41f1 0 0 4294967295 mmFMT4_FMT_420_HBLANK_EARLY_START 0 0x43f1 0 0 4294967295 mmFMT5_FMT_420_HBLANK_EARLY_START 0 0x45f1 0 0 4294967295 mmFMT_TEST_DEBUG_INDEX 0 0x1beb 2 0 4294967295 FMT_TEST_DEBUG_INDEX 0 7 FMT_TEST_DEBUG_WRITE_EN 8 8 mmFMT0_FMT_TEST_DEBUG_INDEX 0 0x1beb 0 0 4294967295 mmFMT1_FMT_TEST_DEBUG_INDEX 0 0x1deb 0 0 4294967295 mmFMT2_FMT_TEST_DEBUG_INDEX 0 0x1feb 0 0 4294967295 mmFMT3_FMT_TEST_DEBUG_INDEX 0 0x41eb 0 0 4294967295 mmFMT4_FMT_TEST_DEBUG_INDEX 0 0x43eb 0 0 4294967295 mmFMT5_FMT_TEST_DEBUG_INDEX 0 0x45eb 0 0 4294967295 mmFMT_TEST_DEBUG_DATA 0 0x1bec 1 0 4294967295 FMT_TEST_DEBUG_DATA 0 31 mmFMT0_FMT_TEST_DEBUG_DATA 0 0x1bec 0 0 4294967295 mmFMT1_FMT_TEST_DEBUG_DATA 0 0x1dec 0 0 4294967295 mmFMT2_FMT_TEST_DEBUG_DATA 0 0x1fec 0 0 4294967295 mmFMT3_FMT_TEST_DEBUG_DATA 0 0x41ec 0 0 4294967295 mmFMT4_FMT_TEST_DEBUG_DATA 0 0x43ec 0 0 4294967295 mmFMT5_FMT_TEST_DEBUG_DATA 0 0x45ec 0 0 4294967295 ixFMT_DEBUG0 2 0x1 1 0 4294967295 FMT_DEBUG0 0 31 ixFMT_DEBUG1 2 0x2 1 0 4294967295 FMT_DEBUG1 0 31 ixFMT_DEBUG2 2 0x3 1 0 4294967295 FMT_DEBUG2 0 31 ixFMT_DEBUG3 2 0x4 1 0 4294967295 FMT_DEBUG3 0 31 ixFMT_DEBUG_ID 2 0x0 1 0 4294967295 FMT_DEBUG_ID 0 31 mmLB_DATA_FORMAT 0 0x1ac0 9 0 4294967295 PIXEL_DEPTH 0 1 PIXEL_EXPAN_MODE 2 2 INTERLEAVE_EN 3 3 PIXEL_REDUCE_MODE 4 4 DYNAMIC_PIXEL_DEPTH 5 5 PREFILL_EN 8 8 PREFETCH 12 12 REQUEST_MODE 24 24 ALPHA_EN 31 31 mmLB0_LB_DATA_FORMAT 0 0x1ac0 0 0 4294967295 mmLB1_LB_DATA_FORMAT 0 0x1cc0 0 0 4294967295 mmLB2_LB_DATA_FORMAT 0 0x1ec0 0 0 4294967295 mmLB3_LB_DATA_FORMAT 0 0x40c0 0 0 4294967295 mmLB4_LB_DATA_FORMAT 0 0x42c0 0 0 4294967295 mmLB5_LB_DATA_FORMAT 0 0x44c0 0 0 4294967295 mmLB_MEMORY_CTRL 0 0x1ac1 3 0 4294967295 LB_MEMORY_SIZE 0 12 LB_NUM_PARTITIONS 16 19 LB_MEMORY_CONFIG 20 21 mmLB0_LB_MEMORY_CTRL 0 0x1ac1 0 0 4294967295 mmLB1_LB_MEMORY_CTRL 0 0x1cc1 0 0 4294967295 mmLB2_LB_MEMORY_CTRL 0 0x1ec1 0 0 4294967295 mmLB3_LB_MEMORY_CTRL 0 0x40c1 0 0 4294967295 mmLB4_LB_MEMORY_CTRL 0 0x42c1 0 0 4294967295 mmLB5_LB_MEMORY_CTRL 0 0x44c1 0 0 4294967295 mmLB_MEMORY_SIZE_STATUS 0 0x1ac2 1 0 4294967295 LB_MEMORY_SIZE_STATUS 0 12 mmLB0_LB_MEMORY_SIZE_STATUS 0 0x1ac2 0 0 4294967295 mmLB1_LB_MEMORY_SIZE_STATUS 0 0x1cc2 0 0 4294967295 mmLB2_LB_MEMORY_SIZE_STATUS 0 0x1ec2 0 0 4294967295 mmLB3_LB_MEMORY_SIZE_STATUS 0 0x40c2 0 0 4294967295 mmLB4_LB_MEMORY_SIZE_STATUS 0 0x42c2 0 0 4294967295 mmLB5_LB_MEMORY_SIZE_STATUS 0 0x44c2 0 0 4294967295 mmLB_DESKTOP_HEIGHT 0 0x1ac3 1 0 4294967295 DESKTOP_HEIGHT 0 14 mmLB0_LB_DESKTOP_HEIGHT 0 0x1ac3 0 0 4294967295 mmLB1_LB_DESKTOP_HEIGHT 0 0x1cc3 0 0 4294967295 mmLB2_LB_DESKTOP_HEIGHT 0 0x1ec3 0 0 4294967295 mmLB3_LB_DESKTOP_HEIGHT 0 0x40c3 0 0 4294967295 mmLB4_LB_DESKTOP_HEIGHT 0 0x42c3 0 0 4294967295 mmLB5_LB_DESKTOP_HEIGHT 0 0x44c3 0 0 4294967295 mmLB_VLINE_START_END 0 0x1ac4 3 0 4294967295 VLINE_START 0 13 VLINE_END 16 30 VLINE_INV 31 31 mmLB0_LB_VLINE_START_END 0 0x1ac4 0 0 4294967295 mmLB1_LB_VLINE_START_END 0 0x1cc4 0 0 4294967295 mmLB2_LB_VLINE_START_END 0 0x1ec4 0 0 4294967295 mmLB3_LB_VLINE_START_END 0 0x40c4 0 0 4294967295 mmLB4_LB_VLINE_START_END 0 0x42c4 0 0 4294967295 mmLB5_LB_VLINE_START_END 0 0x44c4 0 0 4294967295 mmLB_VLINE2_START_END 0 0x1ac5 3 0 4294967295 VLINE2_START 0 13 VLINE2_END 16 30 VLINE2_INV 31 31 mmLB0_LB_VLINE2_START_END 0 0x1ac5 0 0 4294967295 mmLB1_LB_VLINE2_START_END 0 0x1cc5 0 0 4294967295 mmLB2_LB_VLINE2_START_END 0 0x1ec5 0 0 4294967295 mmLB3_LB_VLINE2_START_END 0 0x40c5 0 0 4294967295 mmLB4_LB_VLINE2_START_END 0 0x42c5 0 0 4294967295 mmLB5_LB_VLINE2_START_END 0 0x44c5 0 0 4294967295 mmLB_V_COUNTER 0 0x1ac6 1 0 4294967295 V_COUNTER 0 14 mmLB0_LB_V_COUNTER 0 0x1ac6 0 0 4294967295 mmLB1_LB_V_COUNTER 0 0x1cc6 0 0 4294967295 mmLB2_LB_V_COUNTER 0 0x1ec6 0 0 4294967295 mmLB3_LB_V_COUNTER 0 0x40c6 0 0 4294967295 mmLB4_LB_V_COUNTER 0 0x42c6 0 0 4294967295 mmLB5_LB_V_COUNTER 0 0x44c6 0 0 4294967295 mmLB_SNAPSHOT_V_COUNTER 0 0x1ac7 1 0 4294967295 SNAPSHOT_V_COUNTER 0 14 mmLB0_LB_SNAPSHOT_V_COUNTER 0 0x1ac7 0 0 4294967295 mmLB1_LB_SNAPSHOT_V_COUNTER 0 0x1cc7 0 0 4294967295 mmLB2_LB_SNAPSHOT_V_COUNTER 0 0x1ec7 0 0 4294967295 mmLB3_LB_SNAPSHOT_V_COUNTER 0 0x40c7 0 0 4294967295 mmLB4_LB_SNAPSHOT_V_COUNTER 0 0x42c7 0 0 4294967295 mmLB5_LB_SNAPSHOT_V_COUNTER 0 0x44c7 0 0 4294967295 mmLB_INTERRUPT_MASK 0 0x1ac8 3 0 4294967295 VBLANK_INTERRUPT_MASK 0 0 VLINE_INTERRUPT_MASK 4 4 VLINE2_INTERRUPT_MASK 8 8 mmLB0_LB_INTERRUPT_MASK 0 0x1ac8 0 0 4294967295 mmLB1_LB_INTERRUPT_MASK 0 0x1cc8 0 0 4294967295 mmLB2_LB_INTERRUPT_MASK 0 0x1ec8 0 0 4294967295 mmLB3_LB_INTERRUPT_MASK 0 0x40c8 0 0 4294967295 mmLB4_LB_INTERRUPT_MASK 0 0x42c8 0 0 4294967295 mmLB5_LB_INTERRUPT_MASK 0 0x44c8 0 0 4294967295 mmLB_VLINE_STATUS 0 0x1ac9 5 0 4294967295 VLINE_OCCURRED 0 0 VLINE_ACK 4 4 VLINE_STAT 12 12 VLINE_INTERRUPT 16 16 VLINE_INTERRUPT_TYPE 17 17 mmLB0_LB_VLINE_STATUS 0 0x1ac9 0 0 4294967295 mmLB1_LB_VLINE_STATUS 0 0x1cc9 0 0 4294967295 mmLB2_LB_VLINE_STATUS 0 0x1ec9 0 0 4294967295 mmLB3_LB_VLINE_STATUS 0 0x40c9 0 0 4294967295 mmLB4_LB_VLINE_STATUS 0 0x42c9 0 0 4294967295 mmLB5_LB_VLINE_STATUS 0 0x44c9 0 0 4294967295 mmLB_VLINE2_STATUS 0 0x1aca 5 0 4294967295 VLINE2_OCCURRED 0 0 VLINE2_ACK 4 4 VLINE2_STAT 12 12 VLINE2_INTERRUPT 16 16 VLINE2_INTERRUPT_TYPE 17 17 mmLB0_LB_VLINE2_STATUS 0 0x1aca 0 0 4294967295 mmLB1_LB_VLINE2_STATUS 0 0x1cca 0 0 4294967295 mmLB2_LB_VLINE2_STATUS 0 0x1eca 0 0 4294967295 mmLB3_LB_VLINE2_STATUS 0 0x40ca 0 0 4294967295 mmLB4_LB_VLINE2_STATUS 0 0x42ca 0 0 4294967295 mmLB5_LB_VLINE2_STATUS 0 0x44ca 0 0 4294967295 mmLB_VBLANK_STATUS 0 0x1acb 5 0 4294967295 VBLANK_OCCURRED 0 0 VBLANK_ACK 4 4 VBLANK_STAT 12 12 VBLANK_INTERRUPT 16 16 VBLANK_INTERRUPT_TYPE 17 17 mmLB0_LB_VBLANK_STATUS 0 0x1acb 0 0 4294967295 mmLB1_LB_VBLANK_STATUS 0 0x1ccb 0 0 4294967295 mmLB2_LB_VBLANK_STATUS 0 0x1ecb 0 0 4294967295 mmLB3_LB_VBLANK_STATUS 0 0x40cb 0 0 4294967295 mmLB4_LB_VBLANK_STATUS 0 0x42cb 0 0 4294967295 mmLB5_LB_VBLANK_STATUS 0 0x44cb 0 0 4294967295 mmLB_SYNC_RESET_SEL 0 0x1acc 4 0 4294967295 LB_SYNC_RESET_SEL 0 1 LB_SYNC_RESET_SEL2 4 4 LB_SYNC_RESET_DELAY 8 15 LB_SYNC_DURATION 22 23 mmLB0_LB_SYNC_RESET_SEL 0 0x1acc 0 0 4294967295 mmLB1_LB_SYNC_RESET_SEL 0 0x1ccc 0 0 4294967295 mmLB2_LB_SYNC_RESET_SEL 0 0x1ecc 0 0 4294967295 mmLB3_LB_SYNC_RESET_SEL 0 0x40cc 0 0 4294967295 mmLB4_LB_SYNC_RESET_SEL 0 0x42cc 0 0 4294967295 mmLB5_LB_SYNC_RESET_SEL 0 0x44cc 0 0 4294967295 mmLB_BLACK_KEYER_R_CR 0 0x1acd 1 0 4294967295 LB_BLACK_KEYER_R_CR 4 15 mmLB0_LB_BLACK_KEYER_R_CR 0 0x1acd 0 0 4294967295 mmLB1_LB_BLACK_KEYER_R_CR 0 0x1ccd 0 0 4294967295 mmLB2_LB_BLACK_KEYER_R_CR 0 0x1ecd 0 0 4294967295 mmLB3_LB_BLACK_KEYER_R_CR 0 0x40cd 0 0 4294967295 mmLB4_LB_BLACK_KEYER_R_CR 0 0x42cd 0 0 4294967295 mmLB5_LB_BLACK_KEYER_R_CR 0 0x44cd 0 0 4294967295 mmLB_BLACK_KEYER_G_Y 0 0x1ace 1 0 4294967295 LB_BLACK_KEYER_G_Y 4 15 mmLB0_LB_BLACK_KEYER_G_Y 0 0x1ace 0 0 4294967295 mmLB1_LB_BLACK_KEYER_G_Y 0 0x1cce 0 0 4294967295 mmLB2_LB_BLACK_KEYER_G_Y 0 0x1ece 0 0 4294967295 mmLB3_LB_BLACK_KEYER_G_Y 0 0x40ce 0 0 4294967295 mmLB4_LB_BLACK_KEYER_G_Y 0 0x42ce 0 0 4294967295 mmLB5_LB_BLACK_KEYER_G_Y 0 0x44ce 0 0 4294967295 mmLB_BLACK_KEYER_B_CB 0 0x1acf 1 0 4294967295 LB_BLACK_KEYER_B_CB 4 15 mmLB0_LB_BLACK_KEYER_B_CB 0 0x1acf 0 0 4294967295 mmLB1_LB_BLACK_KEYER_B_CB 0 0x1ccf 0 0 4294967295 mmLB2_LB_BLACK_KEYER_B_CB 0 0x1ecf 0 0 4294967295 mmLB3_LB_BLACK_KEYER_B_CB 0 0x40cf 0 0 4294967295 mmLB4_LB_BLACK_KEYER_B_CB 0 0x42cf 0 0 4294967295 mmLB5_LB_BLACK_KEYER_B_CB 0 0x44cf 0 0 4294967295 mmLB_KEYER_COLOR_CTRL 0 0x1ad0 2 0 4294967295 LB_KEYER_COLOR_EN 0 0 LB_KEYER_COLOR_REP_EN 8 8 mmLB0_LB_KEYER_COLOR_CTRL 0 0x1ad0 0 0 4294967295 mmLB1_LB_KEYER_COLOR_CTRL 0 0x1cd0 0 0 4294967295 mmLB2_LB_KEYER_COLOR_CTRL 0 0x1ed0 0 0 4294967295 mmLB3_LB_KEYER_COLOR_CTRL 0 0x40d0 0 0 4294967295 mmLB4_LB_KEYER_COLOR_CTRL 0 0x42d0 0 0 4294967295 mmLB5_LB_KEYER_COLOR_CTRL 0 0x44d0 0 0 4294967295 mmLB_KEYER_COLOR_R_CR 0 0x1ad1 1 0 4294967295 LB_KEYER_COLOR_R_CR 4 15 mmLB0_LB_KEYER_COLOR_R_CR 0 0x1ad1 0 0 4294967295 mmLB1_LB_KEYER_COLOR_R_CR 0 0x1cd1 0 0 4294967295 mmLB2_LB_KEYER_COLOR_R_CR 0 0x1ed1 0 0 4294967295 mmLB3_LB_KEYER_COLOR_R_CR 0 0x40d1 0 0 4294967295 mmLB4_LB_KEYER_COLOR_R_CR 0 0x42d1 0 0 4294967295 mmLB5_LB_KEYER_COLOR_R_CR 0 0x44d1 0 0 4294967295 mmLB_KEYER_COLOR_G_Y 0 0x1ad2 1 0 4294967295 LB_KEYER_COLOR_G_Y 4 15 mmLB0_LB_KEYER_COLOR_G_Y 0 0x1ad2 0 0 4294967295 mmLB1_LB_KEYER_COLOR_G_Y 0 0x1cd2 0 0 4294967295 mmLB2_LB_KEYER_COLOR_G_Y 0 0x1ed2 0 0 4294967295 mmLB3_LB_KEYER_COLOR_G_Y 0 0x40d2 0 0 4294967295 mmLB4_LB_KEYER_COLOR_G_Y 0 0x42d2 0 0 4294967295 mmLB5_LB_KEYER_COLOR_G_Y 0 0x44d2 0 0 4294967295 mmLB_KEYER_COLOR_B_CB 0 0x1ad3 1 0 4294967295 LB_KEYER_COLOR_B_CB 4 15 mmLB0_LB_KEYER_COLOR_B_CB 0 0x1ad3 0 0 4294967295 mmLB1_LB_KEYER_COLOR_B_CB 0 0x1cd3 0 0 4294967295 mmLB2_LB_KEYER_COLOR_B_CB 0 0x1ed3 0 0 4294967295 mmLB3_LB_KEYER_COLOR_B_CB 0 0x40d3 0 0 4294967295 mmLB4_LB_KEYER_COLOR_B_CB 0 0x42d3 0 0 4294967295 mmLB5_LB_KEYER_COLOR_B_CB 0 0x44d3 0 0 4294967295 mmLB_KEYER_COLOR_REP_R_CR 0 0x1ad4 1 0 4294967295 LB_KEYER_COLOR_REP_R_CR 4 15 mmLB0_LB_KEYER_COLOR_REP_R_CR 0 0x1ad4 0 0 4294967295 mmLB1_LB_KEYER_COLOR_REP_R_CR 0 0x1cd4 0 0 4294967295 mmLB2_LB_KEYER_COLOR_REP_R_CR 0 0x1ed4 0 0 4294967295 mmLB3_LB_KEYER_COLOR_REP_R_CR 0 0x40d4 0 0 4294967295 mmLB4_LB_KEYER_COLOR_REP_R_CR 0 0x42d4 0 0 4294967295 mmLB5_LB_KEYER_COLOR_REP_R_CR 0 0x44d4 0 0 4294967295 mmLB_KEYER_COLOR_REP_G_Y 0 0x1ad5 1 0 4294967295 LB_KEYER_COLOR_REP_G_Y 4 15 mmLB0_LB_KEYER_COLOR_REP_G_Y 0 0x1ad5 0 0 4294967295 mmLB1_LB_KEYER_COLOR_REP_G_Y 0 0x1cd5 0 0 4294967295 mmLB2_LB_KEYER_COLOR_REP_G_Y 0 0x1ed5 0 0 4294967295 mmLB3_LB_KEYER_COLOR_REP_G_Y 0 0x40d5 0 0 4294967295 mmLB4_LB_KEYER_COLOR_REP_G_Y 0 0x42d5 0 0 4294967295 mmLB5_LB_KEYER_COLOR_REP_G_Y 0 0x44d5 0 0 4294967295 mmLB_KEYER_COLOR_REP_B_CB 0 0x1ad6 1 0 4294967295 LB_KEYER_COLOR_REP_B_CB 4 15 mmLB0_LB_KEYER_COLOR_REP_B_CB 0 0x1ad6 0 0 4294967295 mmLB1_LB_KEYER_COLOR_REP_B_CB 0 0x1cd6 0 0 4294967295 mmLB2_LB_KEYER_COLOR_REP_B_CB 0 0x1ed6 0 0 4294967295 mmLB3_LB_KEYER_COLOR_REP_B_CB 0 0x40d6 0 0 4294967295 mmLB4_LB_KEYER_COLOR_REP_B_CB 0 0x42d6 0 0 4294967295 mmLB5_LB_KEYER_COLOR_REP_B_CB 0 0x44d6 0 0 4294967295 mmLB_BUFFER_LEVEL_STATUS 0 0x1ad7 4 0 4294967295 REQ_FIFO_LEVEL 0 5 REQ_FIFO_FULL_CNTL 10 15 DATA_BUFFER_LEVEL 16 27 DATA_FIFO_FULL_CNTL 28 31 mmLB0_LB_BUFFER_LEVEL_STATUS 0 0x1ad7 0 0 4294967295 mmLB1_LB_BUFFER_LEVEL_STATUS 0 0x1cd7 0 0 4294967295 mmLB2_LB_BUFFER_LEVEL_STATUS 0 0x1ed7 0 0 4294967295 mmLB3_LB_BUFFER_LEVEL_STATUS 0 0x40d7 0 0 4294967295 mmLB4_LB_BUFFER_LEVEL_STATUS 0 0x42d7 0 0 4294967295 mmLB5_LB_BUFFER_LEVEL_STATUS 0 0x44d7 0 0 4294967295 mmLB_BUFFER_URGENCY_CTRL 0 0x1ad8 2 0 4294967295 LB_BUFFER_URGENCY_MARK_ON 0 11 LB_BUFFER_URGENCY_MARK_OFF 16 27 mmLB0_LB_BUFFER_URGENCY_CTRL 0 0x1ad8 0 0 4294967295 mmLB1_LB_BUFFER_URGENCY_CTRL 0 0x1cd8 0 0 4294967295 mmLB2_LB_BUFFER_URGENCY_CTRL 0 0x1ed8 0 0 4294967295 mmLB3_LB_BUFFER_URGENCY_CTRL 0 0x40d8 0 0 4294967295 mmLB4_LB_BUFFER_URGENCY_CTRL 0 0x42d8 0 0 4294967295 mmLB5_LB_BUFFER_URGENCY_CTRL 0 0x44d8 0 0 4294967295 mmLB_BUFFER_URGENCY_STATUS 0 0x1ad9 2 0 4294967295 LB_BUFFER_URGENCY_LEVEL 0 11 LB_BUFFER_URGENCY_STAT 16 16 mmLB0_LB_BUFFER_URGENCY_STATUS 0 0x1ad9 0 0 4294967295 mmLB1_LB_BUFFER_URGENCY_STATUS 0 0x1cd9 0 0 4294967295 mmLB2_LB_BUFFER_URGENCY_STATUS 0 0x1ed9 0 0 4294967295 mmLB3_LB_BUFFER_URGENCY_STATUS 0 0x40d9 0 0 4294967295 mmLB4_LB_BUFFER_URGENCY_STATUS 0 0x42d9 0 0 4294967295 mmLB5_LB_BUFFER_URGENCY_STATUS 0 0x44d9 0 0 4294967295 mmLB_BUFFER_STATUS 0 0x1ada 7 0 4294967295 LB_BUFFER_EMPTY_MARGIN 0 3 LB_BUFFER_EMPTY_STAT 4 4 LB_BUFFER_EMPTY_OCCURRED 8 8 LB_BUFFER_EMPTY_ACK 12 12 LB_BUFFER_FULL_STAT 16 16 LB_BUFFER_FULL_OCCURRED 20 20 LB_BUFFER_FULL_ACK 24 24 mmLB0_LB_BUFFER_STATUS 0 0x1ada 0 0 4294967295 mmLB1_LB_BUFFER_STATUS 0 0x1cda 0 0 4294967295 mmLB2_LB_BUFFER_STATUS 0 0x1eda 0 0 4294967295 mmLB3_LB_BUFFER_STATUS 0 0x40da 0 0 4294967295 mmLB4_LB_BUFFER_STATUS 0 0x42da 0 0 4294967295 mmLB5_LB_BUFFER_STATUS 0 0x44da 0 0 4294967295 mmLB_NO_OUTSTANDING_REQ_STATUS 0 0x1adc 1 0 4294967295 LB_NO_OUTSTANDING_REQ_STAT 0 0 mmLB0_LB_NO_OUTSTANDING_REQ_STATUS 0 0x1adc 0 0 4294967295 mmLB1_LB_NO_OUTSTANDING_REQ_STATUS 0 0x1cdc 0 0 4294967295 mmLB2_LB_NO_OUTSTANDING_REQ_STATUS 0 0x1edc 0 0 4294967295 mmLB3_LB_NO_OUTSTANDING_REQ_STATUS 0 0x40dc 0 0 4294967295 mmLB4_LB_NO_OUTSTANDING_REQ_STATUS 0 0x42dc 0 0 4294967295 mmLB5_LB_NO_OUTSTANDING_REQ_STATUS 0 0x44dc 0 0 4294967295 mmMVP_AFR_FLIP_MODE 0 0x1ae0 1 0 4294967295 MVP_AFR_FLIP_MODE 0 1 mmLB0_MVP_AFR_FLIP_MODE 0 0x1ae0 0 0 4294967295 mmLB1_MVP_AFR_FLIP_MODE 0 0x1ce0 0 0 4294967295 mmLB2_MVP_AFR_FLIP_MODE 0 0x1ee0 0 0 4294967295 mmLB3_MVP_AFR_FLIP_MODE 0 0x40e0 0 0 4294967295 mmLB4_MVP_AFR_FLIP_MODE 0 0x42e0 0 0 4294967295 mmLB5_MVP_AFR_FLIP_MODE 0 0x44e0 0 0 4294967295 mmMVP_AFR_FLIP_FIFO_CNTL 0 0x1ae1 4 0 4294967295 MVP_AFR_FLIP_FIFO_NUM_ENTRIES 0 3 MVP_AFR_FLIP_FIFO_RESET 4 4 MVP_AFR_FLIP_FIFO_RESET_FLAG 8 8 MVP_AFR_FLIP_FIFO_RESET_ACK 12 12 mmLB0_MVP_AFR_FLIP_FIFO_CNTL 0 0x1ae1 0 0 4294967295 mmLB1_MVP_AFR_FLIP_FIFO_CNTL 0 0x1ce1 0 0 4294967295 mmLB2_MVP_AFR_FLIP_FIFO_CNTL 0 0x1ee1 0 0 4294967295 mmLB3_MVP_AFR_FLIP_FIFO_CNTL 0 0x40e1 0 0 4294967295 mmLB4_MVP_AFR_FLIP_FIFO_CNTL 0 0x42e1 0 0 4294967295 mmLB5_MVP_AFR_FLIP_FIFO_CNTL 0 0x44e1 0 0 4294967295 mmMVP_FLIP_LINE_NUM_INSERT 0 0x1ae2 4 0 4294967295 MVP_FLIP_LINE_NUM_INSERT_MODE 0 1 MVP_FLIP_LINE_NUM_INSERT 8 22 MVP_FLIP_LINE_NUM_OFFSET 24 29 MVP_FLIP_AUTO_ENABLE 30 30 mmLB0_MVP_FLIP_LINE_NUM_INSERT 0 0x1ae2 0 0 4294967295 mmLB1_MVP_FLIP_LINE_NUM_INSERT 0 0x1ce2 0 0 4294967295 mmLB2_MVP_FLIP_LINE_NUM_INSERT 0 0x1ee2 0 0 4294967295 mmLB3_MVP_FLIP_LINE_NUM_INSERT 0 0x40e2 0 0 4294967295 mmLB4_MVP_FLIP_LINE_NUM_INSERT 0 0x42e2 0 0 4294967295 mmLB5_MVP_FLIP_LINE_NUM_INSERT 0 0x44e2 0 0 4294967295 mmDC_MVP_LB_CONTROL 0 0x1ae3 7 0 4294967295 MVP_SWAP_LOCK_IN_MODE 0 1 DC_MVP_SWAP_LOCK_OUT_SEL 8 8 DC_MVP_SWAP_LOCK_OUT_FORCE_ONE 12 12 DC_MVP_SWAP_LOCK_OUT_FORCE_ZERO 16 16 DC_MVP_SWAP_LOCK_STATUS 20 20 DC_MVP_SWAP_LOCK_IN_CAP 28 28 DC_MVP_SPARE_FLOPS 31 31 mmLB0_DC_MVP_LB_CONTROL 0 0x1ae3 0 0 4294967295 mmLB1_DC_MVP_LB_CONTROL 0 0x1ce3 0 0 4294967295 mmLB2_DC_MVP_LB_CONTROL 0 0x1ee3 0 0 4294967295 mmLB3_DC_MVP_LB_CONTROL 0 0x40e3 0 0 4294967295 mmLB4_DC_MVP_LB_CONTROL 0 0x42e3 0 0 4294967295 mmLB5_DC_MVP_LB_CONTROL 0 0x44e3 0 0 4294967295 mmLB_DEBUG 0 0x1ae4 1 0 4294967295 LB_DEBUG 0 31 mmLB0_LB_DEBUG 0 0x1ae4 0 0 4294967295 mmLB1_LB_DEBUG 0 0x1ce4 0 0 4294967295 mmLB2_LB_DEBUG 0 0x1ee4 0 0 4294967295 mmLB3_LB_DEBUG 0 0x40e4 0 0 4294967295 mmLB4_LB_DEBUG 0 0x42e4 0 0 4294967295 mmLB5_LB_DEBUG 0 0x44e4 0 0 4294967295 mmLB_DEBUG2 0 0x1ae5 1 0 4294967295 LB_DEBUG2 0 31 mmLB0_LB_DEBUG2 0 0x1ae5 0 0 4294967295 mmLB1_LB_DEBUG2 0 0x1ce5 0 0 4294967295 mmLB2_LB_DEBUG2 0 0x1ee5 0 0 4294967295 mmLB3_LB_DEBUG2 0 0x40e5 0 0 4294967295 mmLB4_LB_DEBUG2 0 0x42e5 0 0 4294967295 mmLB5_LB_DEBUG2 0 0x44e5 0 0 4294967295 mmLB_DEBUG3 0 0x1ae6 1 0 4294967295 LB_DEBUG3 0 31 mmLB0_LB_DEBUG3 0 0x1ae6 0 0 4294967295 mmLB1_LB_DEBUG3 0 0x1ce6 0 0 4294967295 mmLB2_LB_DEBUG3 0 0x1ee6 0 0 4294967295 mmLB3_LB_DEBUG3 0 0x40e6 0 0 4294967295 mmLB4_LB_DEBUG3 0 0x42e6 0 0 4294967295 mmLB5_LB_DEBUG3 0 0x44e6 0 0 4294967295 mmLB_TEST_DEBUG_INDEX 0 0x1afe 2 0 4294967295 LB_TEST_DEBUG_INDEX 0 7 LB_TEST_DEBUG_WRITE_EN 8 8 mmLB0_LB_TEST_DEBUG_INDEX 0 0x1afe 0 0 4294967295 mmLB1_LB_TEST_DEBUG_INDEX 0 0x1cfe 0 0 4294967295 mmLB2_LB_TEST_DEBUG_INDEX 0 0x1efe 0 0 4294967295 mmLB3_LB_TEST_DEBUG_INDEX 0 0x40fe 0 0 4294967295 mmLB4_LB_TEST_DEBUG_INDEX 0 0x42fe 0 0 4294967295 mmLB5_LB_TEST_DEBUG_INDEX 0 0x44fe 0 0 4294967295 mmLB_TEST_DEBUG_DATA 0 0x1aff 1 0 4294967295 LB_TEST_DEBUG_DATA 0 31 mmLB0_LB_TEST_DEBUG_DATA 0 0x1aff 0 0 4294967295 mmLB1_LB_TEST_DEBUG_DATA 0 0x1cff 0 0 4294967295 mmLB2_LB_TEST_DEBUG_DATA 0 0x1eff 0 0 4294967295 mmLB3_LB_TEST_DEBUG_DATA 0 0x40ff 0 0 4294967295 mmLB4_LB_TEST_DEBUG_DATA 0 0x42ff 0 0 4294967295 mmLB5_LB_TEST_DEBUG_DATA 0 0x44ff 0 0 4294967295 mmLBV_DATA_FORMAT 0 0x463c 10 0 4294967295 PIXEL_DEPTH 0 1 PIXEL_EXPAN_MODE 2 2 INTERLEAVE_EN 3 3 PIXEL_REDUCE_MODE 4 4 DYNAMIC_PIXEL_DEPTH 5 5 DITHER_EN 6 6 DOWNSCALE_PREFETCH_EN 7 7 PREFETCH 12 12 REQUEST_MODE 24 24 ALPHA_EN 31 31 mmLBV0_LBV_DATA_FORMAT 0 0x463c 0 0 4294967295 mmLBV1_LBV_DATA_FORMAT 0 0x983c 0 0 4294967295 mmLBV_MEMORY_CTRL 0 0x463d 3 0 4294967295 LB_MEMORY_SIZE 0 11 LB_NUM_PARTITIONS 16 19 LB_MEMORY_CONFIG 20 21 mmLBV0_LBV_MEMORY_CTRL 0 0x463d 0 0 4294967295 mmLBV1_LBV_MEMORY_CTRL 0 0x983d 0 0 4294967295 mmLBV_MEMORY_SIZE_STATUS 0 0x463e 1 0 4294967295 LB_MEMORY_SIZE_STATUS 0 11 mmLBV0_LBV_MEMORY_SIZE_STATUS 0 0x463e 0 0 4294967295 mmLBV1_LBV_MEMORY_SIZE_STATUS 0 0x983e 0 0 4294967295 mmLBV_DESKTOP_HEIGHT 0 0x463f 1 0 4294967295 DESKTOP_HEIGHT 0 14 mmLBV0_LBV_DESKTOP_HEIGHT 0 0x463f 0 0 4294967295 mmLBV1_LBV_DESKTOP_HEIGHT 0 0x983f 0 0 4294967295 mmLBV_VLINE_START_END 0 0x4640 3 0 4294967295 VLINE_START 0 13 VLINE_END 16 30 VLINE_INV 31 31 mmLBV0_LBV_VLINE_START_END 0 0x4640 0 0 4294967295 mmLBV1_LBV_VLINE_START_END 0 0x9840 0 0 4294967295 mmLBV_VLINE2_START_END 0 0x4641 3 0 4294967295 VLINE2_START 0 13 VLINE2_END 16 30 VLINE2_INV 31 31 mmLBV0_LBV_VLINE2_START_END 0 0x4641 0 0 4294967295 mmLBV1_LBV_VLINE2_START_END 0 0x9841 0 0 4294967295 mmLBV_V_COUNTER 0 0x4642 1 0 4294967295 V_COUNTER 0 14 mmLBV0_LBV_V_COUNTER 0 0x4642 0 0 4294967295 mmLBV1_LBV_V_COUNTER 0 0x9842 0 0 4294967295 mmLBV_SNAPSHOT_V_COUNTER 0 0x4643 1 0 4294967295 SNAPSHOT_V_COUNTER 0 14 mmLBV0_LBV_SNAPSHOT_V_COUNTER 0 0x4643 0 0 4294967295 mmLBV1_LBV_SNAPSHOT_V_COUNTER 0 0x9843 0 0 4294967295 mmLBV_V_COUNTER_CHROMA 0 0x4644 1 0 4294967295 V_COUNTER_CHROMA 0 14 mmLBV0_LBV_V_COUNTER_CHROMA 0 0x4644 0 0 4294967295 mmLBV1_LBV_V_COUNTER_CHROMA 0 0x9844 0 0 4294967295 mmLBV_SNAPSHOT_V_COUNTER_CHROMA 0 0x4645 1 0 4294967295 SNAPSHOT_V_COUNTER_CHROMA 0 14 mmLBV0_LBV_SNAPSHOT_V_COUNTER_CHROMA 0 0x4645 0 0 4294967295 mmLBV1_LBV_SNAPSHOT_V_COUNTER_CHROMA 0 0x9845 0 0 4294967295 mmLBV_INTERRUPT_MASK 0 0x4646 3 0 4294967295 VBLANK_INTERRUPT_MASK 0 0 VLINE_INTERRUPT_MASK 4 4 VLINE2_INTERRUPT_MASK 8 8 mmLBV0_LBV_INTERRUPT_MASK 0 0x4646 0 0 4294967295 mmLBV1_LBV_INTERRUPT_MASK 0 0x9846 0 0 4294967295 mmLBV_VLINE_STATUS 0 0x4647 5 0 4294967295 VLINE_OCCURRED 0 0 VLINE_ACK 4 4 VLINE_STAT 12 12 VLINE_INTERRUPT 16 16 VLINE_INTERRUPT_TYPE 17 17 mmLBV0_LBV_VLINE_STATUS 0 0x4647 0 0 4294967295 mmLBV1_LBV_VLINE_STATUS 0 0x9847 0 0 4294967295 mmLBV_VLINE2_STATUS 0 0x4648 5 0 4294967295 VLINE2_OCCURRED 0 0 VLINE2_ACK 4 4 VLINE2_STAT 12 12 VLINE2_INTERRUPT 16 16 VLINE2_INTERRUPT_TYPE 17 17 mmLBV0_LBV_VLINE2_STATUS 0 0x4648 0 0 4294967295 mmLBV1_LBV_VLINE2_STATUS 0 0x9848 0 0 4294967295 mmLBV_VBLANK_STATUS 0 0x4649 5 0 4294967295 VBLANK_OCCURRED 0 0 VBLANK_ACK 4 4 VBLANK_STAT 12 12 VBLANK_INTERRUPT 16 16 VBLANK_INTERRUPT_TYPE 17 17 mmLBV0_LBV_VBLANK_STATUS 0 0x4649 0 0 4294967295 mmLBV1_LBV_VBLANK_STATUS 0 0x9849 0 0 4294967295 mmLBV_SYNC_RESET_SEL 0 0x464a 4 0 4294967295 LB_SYNC_RESET_SEL 0 1 LB_SYNC_RESET_SEL2 4 4 LB_SYNC_RESET_DELAY 8 15 LB_SYNC_DURATION 22 23 mmLBV0_LBV_SYNC_RESET_SEL 0 0x464a 0 0 4294967295 mmLBV1_LBV_SYNC_RESET_SEL 0 0x984a 0 0 4294967295 mmLBV_BLACK_KEYER_R_CR 0 0x464b 1 0 4294967295 LB_BLACK_KEYER_R_CR 4 15 mmLBV0_LBV_BLACK_KEYER_R_CR 0 0x464b 0 0 4294967295 mmLBV1_LBV_BLACK_KEYER_R_CR 0 0x984b 0 0 4294967295 mmLBV_BLACK_KEYER_G_Y 0 0x464c 1 0 4294967295 LB_BLACK_KEYER_G_Y 4 15 mmLBV0_LBV_BLACK_KEYER_G_Y 0 0x464c 0 0 4294967295 mmLBV1_LBV_BLACK_KEYER_G_Y 0 0x984c 0 0 4294967295 mmLBV_BLACK_KEYER_B_CB 0 0x464d 1 0 4294967295 LB_BLACK_KEYER_B_CB 4 15 mmLBV0_LBV_BLACK_KEYER_B_CB 0 0x464d 0 0 4294967295 mmLBV1_LBV_BLACK_KEYER_B_CB 0 0x984d 0 0 4294967295 mmLBV_KEYER_COLOR_CTRL 0 0x464e 2 0 4294967295 LB_KEYER_COLOR_EN 0 0 LB_KEYER_COLOR_REP_EN 8 8 mmLBV0_LBV_KEYER_COLOR_CTRL 0 0x464e 0 0 4294967295 mmLBV1_LBV_KEYER_COLOR_CTRL 0 0x984e 0 0 4294967295 mmLBV_KEYER_COLOR_R_CR 0 0x464f 1 0 4294967295 LB_KEYER_COLOR_R_CR 4 15 mmLBV0_LBV_KEYER_COLOR_R_CR 0 0x464f 0 0 4294967295 mmLBV1_LBV_KEYER_COLOR_R_CR 0 0x984f 0 0 4294967295 mmLBV_KEYER_COLOR_G_Y 0 0x4650 1 0 4294967295 LB_KEYER_COLOR_G_Y 4 15 mmLBV0_LBV_KEYER_COLOR_G_Y 0 0x4650 0 0 4294967295 mmLBV1_LBV_KEYER_COLOR_G_Y 0 0x9850 0 0 4294967295 mmLBV_KEYER_COLOR_B_CB 0 0x4651 1 0 4294967295 LB_KEYER_COLOR_B_CB 4 15 mmLBV0_LBV_KEYER_COLOR_B_CB 0 0x4651 0 0 4294967295 mmLBV1_LBV_KEYER_COLOR_B_CB 0 0x9851 0 0 4294967295 mmLBV_KEYER_COLOR_REP_R_CR 0 0x4652 1 0 4294967295 LB_KEYER_COLOR_REP_R_CR 4 15 mmLBV0_LBV_KEYER_COLOR_REP_R_CR 0 0x4652 0 0 4294967295 mmLBV1_LBV_KEYER_COLOR_REP_R_CR 0 0x9852 0 0 4294967295 mmLBV_KEYER_COLOR_REP_G_Y 0 0x4653 1 0 4294967295 LB_KEYER_COLOR_REP_G_Y 4 15 mmLBV0_LBV_KEYER_COLOR_REP_G_Y 0 0x4653 0 0 4294967295 mmLBV1_LBV_KEYER_COLOR_REP_G_Y 0 0x9853 0 0 4294967295 mmLBV_KEYER_COLOR_REP_B_CB 0 0x4654 1 0 4294967295 LB_KEYER_COLOR_REP_B_CB 4 15 mmLBV0_LBV_KEYER_COLOR_REP_B_CB 0 0x4654 0 0 4294967295 mmLBV1_LBV_KEYER_COLOR_REP_B_CB 0 0x9854 0 0 4294967295 mmLBV_BUFFER_LEVEL_STATUS 0 0x4655 4 0 4294967295 REQ_FIFO_LEVEL 0 5 REQ_FIFO_FULL_CNTL 10 15 DATA_BUFFER_LEVEL 16 27 DATA_FIFO_FULL_CNTL 28 31 mmLBV0_LBV_BUFFER_LEVEL_STATUS 0 0x4655 0 0 4294967295 mmLBV1_LBV_BUFFER_LEVEL_STATUS 0 0x9855 0 0 4294967295 mmLBV_BUFFER_URGENCY_CTRL 0 0x4656 2 0 4294967295 LB_BUFFER_URGENCY_MARK_ON 0 11 LB_BUFFER_URGENCY_MARK_OFF 16 27 mmLBV0_LBV_BUFFER_URGENCY_CTRL 0 0x4656 0 0 4294967295 mmLBV1_LBV_BUFFER_URGENCY_CTRL 0 0x9856 0 0 4294967295 mmLBV_BUFFER_URGENCY_STATUS 0 0x4657 2 0 4294967295 LB_BUFFER_URGENCY_LEVEL 0 11 LB_BUFFER_URGENCY_STAT 16 16 mmLBV0_LBV_BUFFER_URGENCY_STATUS 0 0x4657 0 0 4294967295 mmLBV1_LBV_BUFFER_URGENCY_STATUS 0 0x9857 0 0 4294967295 mmLBV_BUFFER_STATUS 0 0x4658 9 0 4294967295 LB_BUFFER_EMPTY_MARGIN 0 3 LB_BUFFER_EMPTY_STAT 4 4 LB_BUFFER_EMPTY_OCCURRED 8 8 LB_BUFFER_EMPTY_ACK 12 12 LB_BUFFER_FULL_STAT 16 16 LB_BUFFER_FULL_OCCURRED 20 20 LB_BUFFER_FULL_ACK 24 24 LB_ENABLE_HIGH_THROUGHPUT 25 25 LB_HIGH_THROUGHPUT_CNTL 26 28 mmLBV0_LBV_BUFFER_STATUS 0 0x4658 0 0 4294967295 mmLBV1_LBV_BUFFER_STATUS 0 0x9858 0 0 4294967295 mmLBV_NO_OUTSTANDING_REQ_STATUS 0 0x4659 1 0 4294967295 LB_NO_OUTSTANDING_REQ_STAT 0 0 mmLBV0_LBV_NO_OUTSTANDING_REQ_STATUS 0 0x4659 0 0 4294967295 mmLBV1_LBV_NO_OUTSTANDING_REQ_STATUS 0 0x9859 0 0 4294967295 mmLBV_DEBUG 0 0x465a 1 0 4294967295 LB_DEBUG 0 31 mmLBV0_LBV_DEBUG 0 0x465a 0 0 4294967295 mmLBV1_LBV_DEBUG 0 0x985a 0 0 4294967295 mmLBV_DEBUG2 0 0x465b 1 0 4294967295 LB_DEBUG2 0 31 mmLBV0_LBV_DEBUG2 0 0x465b 0 0 4294967295 mmLBV1_LBV_DEBUG2 0 0x985b 0 0 4294967295 mmLBV_DEBUG3 0 0x465c 1 0 4294967295 LB_DEBUG3 0 31 mmLBV0_LBV_DEBUG3 0 0x465c 0 0 4294967295 mmLBV1_LBV_DEBUG3 0 0x985c 0 0 4294967295 mmLBV_TEST_DEBUG_INDEX 0 0x4666 2 0 4294967295 LB_TEST_DEBUG_INDEX 0 7 LB_TEST_DEBUG_WRITE_EN 8 8 mmLBV0_LBV_TEST_DEBUG_INDEX 0 0x4666 0 0 4294967295 mmLBV1_LBV_TEST_DEBUG_INDEX 0 0x9866 0 0 4294967295 mmLBV_TEST_DEBUG_DATA 0 0x4667 1 0 4294967295 LB_TEST_DEBUG_DATA 0 31 mmLBV0_LBV_TEST_DEBUG_DATA 0 0x4667 0 0 4294967295 mmLBV1_LBV_TEST_DEBUG_DATA 0 0x9867 0 0 4294967295 mmMVP_CONTROL1 0 0x2ac 12 0 4294967295 MVP_EN 0 0 MVP_MIXER_MODE 4 6 MVP_MIXER_SLAVE_SEL 8 8 MVP_MIXER_SLAVE_SEL_DELAY_UNTIL_END_OF_BLANK 9 9 MVP_ARBITRATION_MODE_FOR_AFR_MANUAL_SWITCH_MODE 10 10 MVP_RATE_CONTROL 12 12 MVP_CHANNEL_CONTROL 16 16 MVP_GPU_CHAIN_LOCATION 20 21 MVP_DISABLE_MSB_EXPAND 24 24 MVP_30BPP_EN 28 28 MVP_TERMINATION_CNTL_A 30 30 MVP_TERMINATION_CNTL_B 31 31 mmMVP_CONTROL2 0 0x2ad 8 0 4294967295 MVP_MUX_DE_DVOCNTL0_SEL 0 0 MVP_MUX_DE_DVOCNTL2_SEL 4 4 MVP_MUXA_CLK_SEL 8 8 MVP_MUXB_CLK_SEL 12 12 MVP_DVOCNTL_MUX 16 16 MVP_FLOW_CONTROL_OUT_EN 20 20 MVP_SWAP_LOCK_OUT_EN 24 24 MVP_SWAP_AB_IN_DC_DDR 28 28 mmMVP_FIFO_CONTROL 0 0x2ae 3 0 4294967295 MVP_STOP_SLAVE_WM 0 7 MVP_PAUSE_SLAVE_WM 8 15 MVP_PAUSE_SLAVE_CNT 16 23 mmMVP_FIFO_STATUS 0 0x2af 9 0 4294967295 MVP_FIFO_LEVEL 0 7 MVP_FIFO_OVERFLOW 8 8 MVP_FIFO_OVERFLOW_OCCURRED 12 12 MVP_FIFO_OVERFLOW_ACK 16 16 MVP_FIFO_UNDERFLOW 20 20 MVP_FIFO_UNDERFLOW_OCCURRED 24 24 MVP_FIFO_UNDERFLOW_ACK 28 28 MVP_FIFO_ERROR_MASK 30 30 MVP_FIFO_ERROR_INT_STATUS 31 31 mmMVP_SLAVE_STATUS 0 0x2b0 2 0 4294967295 MVP_SLAVE_PIXELS_PER_LINE_RCVED 0 12 MVP_SLAVE_LINES_PER_FRAME_RCVED 16 28 mmMVP_INBAND_CNTL_CAP 0 0x2b1 3 0 4294967295 MVP_IGNOR_INBAND_CNTL 0 0 MVP_PASSING_INBAND_CNTL_EN 4 4 MVP_INBAND_CNTL_CHAR_CAP 8 31 mmMVP_BLACK_KEYER 0 0x2b2 3 0 4294967295 MVP_BLACK_KEYER_R 0 9 MVP_BLACK_KEYER_G 10 19 MVP_BLACK_KEYER_B 20 29 mmMVP_CRC_CNTL 0 0x2b3 6 0 4294967295 MVP_CRC_BLUE_MASK 0 7 MVP_CRC_GREEN_MASK 8 15 MVP_CRC_RED_MASK 16 23 MVP_CRC_EN 28 28 MVP_CRC_CONT_EN 29 29 MVP_DC_DDR_CRC_EVEN_ODD_PIX_SEL 30 30 mmMVP_CRC_RESULT_BLUE_GREEN 0 0x2b4 2 0 4294967295 MVP_CRC_BLUE_RESULT 0 15 MVP_CRC_GREEN_RESULT 16 31 mmMVP_CRC_RESULT_RED 0 0x2b5 1 0 4294967295 MVP_CRC_RED_RESULT 0 15 mmMVP_CONTROL3 0 0x2b6 8 0 4294967295 MVP_RESET_IN_BETWEEN_FRAMES 0 0 MVP_DDR_SC_AB_SEL 4 4 MVP_DDR_SC_B_START_MODE 8 8 MVP_FLOW_CONTROL_OUT_FORCE_ONE 12 12 MVP_FLOW_CONTROL_OUT_FORCE_ZERO 16 16 MVP_FLOW_CONTROL_CASCADE_EN 20 20 MVP_SWAP_48BIT_EN 24 24 MVP_FLOW_CONTROL_IN_CAP 28 28 mmMVP_RECEIVE_CNT_CNTL1 0 0x2b7 3 0 4294967295 MVP_SLAVE_PIXEL_ERROR_CNT 0 12 MVP_SLAVE_LINE_ERROR_CNT 16 28 MVP_SLAVE_DATA_CHK_EN 31 31 mmMVP_RECEIVE_CNT_CNTL2 0 0x2b8 2 0 4294967295 MVP_SLAVE_FRAME_ERROR_CNT 0 12 MVP_SLAVE_FRAME_ERROR_CNT_RESET 31 31 mmMVP_DEBUG 0 0x2bb 9 0 4294967295 MVP_SWAP_LOCK_IN_EN 0 0 MVP_FLOW_CONTROL_IN_EN 1 1 MVP_SWAP_LOCK_IN_SEL 2 2 MVP_FLOW_CONTROL_IN_SEL 3 3 MVP_DIS_FIX_AFR_MANUAL_HSYNC_FLIP 4 4 MVP_DIS_FIX_AFR_AUTO_VSYNC_FLIP 5 5 MVP_EN_FIX_AFR_MANUAL_SWITCH_IN_SFR 6 6 MVP_DIS_READ_POINTER_RESET_DELAY 7 7 MVP_DEBUG_BITS 8 31 mmMVP_TEST_DEBUG_INDEX 0 0x2b9 2 0 4294967295 MVP_TEST_DEBUG_INDEX 0 7 MVP_TEST_DEBUG_WRITE_EN 8 8 mmMVP_TEST_DEBUG_DATA 0 0x2ba 1 0 4294967295 MVP_TEST_DEBUG_DATA 0 31 ixMVP_DEBUG_12 2 0xc 2 0 4294967295 IDEC_MVP_DATA_A_H 0 0 IDEC_MVP_DATA_A 1 24 ixMVP_DEBUG_13 2 0xd 5 0 4294967295 IDED_MVP_DATA_B_H 0 0 IDED_MVP_DATA_B 1 24 IDED_START_READ_B 25 25 IDED_READ_FIFO_ENTRY_DE_B 26 26 IDED_WRITE_ADD_B 27 29 ixMVP_DEBUG_14 2 0xe 15 0 4294967295 IDEE_READ_ADD 0 2 IDEE_WRITE_ADD_A 3 5 IDEE_WRITE_ADD_B 6 8 IDEE_START_READ 9 9 IDEE_START_READ_B 10 10 IDEE_START_INCR_WR_A 11 11 IDEE_START_INCR_WR_B 12 12 IDEE_WRITE2FIFO 13 13 IDEE_READ_FIFO_ENTRY_DE 14 14 IDEE_READ_FIFO_ENTRY_DE_B 15 15 IDEE_READ_FIFO_DE 16 16 IDEE_READ_FIFO_DE_B 17 17 IDEE_READ_FIFO_ENABLE 18 18 IDEE_CRTC1_CNTL_CAPTURE_START_A 19 19 IDEE_CRC_PHASE 20 20 ixMVP_DEBUG_15 2 0xf 2 0 4294967295 IDEF_MVP_ASYNC_FIFO_WEN 0 0 IDEF_MVP_ASYNC_FIFO_WDATA 4 31 ixMVP_DEBUG_16 2 0x10 9 0 4294967295 IDCC_MVP_ASYNC_FIFO_READ 0 0 IDCC_MVP_ASYNC_FIFO_EXCEED_STOP_LEVEL 1 1 IDCC_MVP_ASYNC_FIFO_EXCEED_PAUSE_LEVEL 2 2 IDCC_FLOW_CONTROL_OUT 3 3 IDCC_MVP_ASYNC_FIFO_NUM_ENTRIES 4 11 IDCC_MVP_ASYNC_FIFO_OVERFLOW 12 12 IDCC_MVP_ASYNC_FIFO_UNDERFLOW 13 13 IDCC_MVP_ASYNC_READ_ADDR 16 23 IDCC_MVP_ASYNC_WRITE_ADDR 24 31 ixMVP_DEBUG_17 2 0x11 3 0 4294967295 IDCD_MVP_ASYNC_FIFO_READ 0 0 IDCD_MVP_ASYNC_FIFO_PHASE 1 1 IDCD_MVP_ASYNC_FIFO_READ_DATA 2 31 mmSCL_COEF_RAM_SELECT 0 0x1b40 3 0 4294967295 SCL_C_RAM_TAP_PAIR_IDX 0 3 SCL_C_RAM_PHASE 8 11 SCL_C_RAM_FILTER_TYPE 16 18 mmSCL0_SCL_COEF_RAM_SELECT 0 0x1b40 0 0 4294967295 mmSCL1_SCL_COEF_RAM_SELECT 0 0x1d40 0 0 4294967295 mmSCL2_SCL_COEF_RAM_SELECT 0 0x1f40 0 0 4294967295 mmSCL3_SCL_COEF_RAM_SELECT 0 0x4140 0 0 4294967295 mmSCL4_SCL_COEF_RAM_SELECT 0 0x4340 0 0 4294967295 mmSCL5_SCL_COEF_RAM_SELECT 0 0x4540 0 0 4294967295 mmSCL_COEF_RAM_TAP_DATA 0 0x1b41 4 0 4294967295 SCL_C_RAM_EVEN_TAP_COEF 0 13 SCL_C_RAM_EVEN_TAP_COEF_EN 15 15 SCL_C_RAM_ODD_TAP_COEF 16 29 SCL_C_RAM_ODD_TAP_COEF_EN 31 31 mmSCL0_SCL_COEF_RAM_TAP_DATA 0 0x1b41 0 0 4294967295 mmSCL1_SCL_COEF_RAM_TAP_DATA 0 0x1d41 0 0 4294967295 mmSCL2_SCL_COEF_RAM_TAP_DATA 0 0x1f41 0 0 4294967295 mmSCL3_SCL_COEF_RAM_TAP_DATA 0 0x4141 0 0 4294967295 mmSCL4_SCL_COEF_RAM_TAP_DATA 0 0x4341 0 0 4294967295 mmSCL5_SCL_COEF_RAM_TAP_DATA 0 0x4541 0 0 4294967295 mmSCL_MODE 0 0x1b42 2 0 4294967295 SCL_MODE 0 1 SCL_PSCL_EN 4 4 mmSCL0_SCL_MODE 0 0x1b42 0 0 4294967295 mmSCL1_SCL_MODE 0 0x1d42 0 0 4294967295 mmSCL2_SCL_MODE 0 0x1f42 0 0 4294967295 mmSCL3_SCL_MODE 0 0x4142 0 0 4294967295 mmSCL4_SCL_MODE 0 0x4342 0 0 4294967295 mmSCL5_SCL_MODE 0 0x4542 0 0 4294967295 mmSCL_TAP_CONTROL 0 0x1b43 2 0 4294967295 SCL_V_NUM_OF_TAPS 0 2 SCL_H_NUM_OF_TAPS 8 11 mmSCL0_SCL_TAP_CONTROL 0 0x1b43 0 0 4294967295 mmSCL1_SCL_TAP_CONTROL 0 0x1d43 0 0 4294967295 mmSCL2_SCL_TAP_CONTROL 0 0x1f43 0 0 4294967295 mmSCL3_SCL_TAP_CONTROL 0 0x4143 0 0 4294967295 mmSCL4_SCL_TAP_CONTROL 0 0x4343 0 0 4294967295 mmSCL5_SCL_TAP_CONTROL 0 0x4543 0 0 4294967295 mmSCL_CONTROL 0 0x1b44 2 0 4294967295 SCL_BOUNDARY_MODE 0 0 SCL_EARLY_EOL_MODE 4 4 mmSCL0_SCL_CONTROL 0 0x1b44 0 0 4294967295 mmSCL1_SCL_CONTROL 0 0x1d44 0 0 4294967295 mmSCL2_SCL_CONTROL 0 0x1f44 0 0 4294967295 mmSCL3_SCL_CONTROL 0 0x4144 0 0 4294967295 mmSCL4_SCL_CONTROL 0 0x4344 0 0 4294967295 mmSCL5_SCL_CONTROL 0 0x4544 0 0 4294967295 mmSCL_BYPASS_CONTROL 0 0x1b45 1 0 4294967295 SCL_BYPASS_MODE 0 1 mmSCL0_SCL_BYPASS_CONTROL 0 0x1b45 0 0 4294967295 mmSCL1_SCL_BYPASS_CONTROL 0 0x1d45 0 0 4294967295 mmSCL2_SCL_BYPASS_CONTROL 0 0x1f45 0 0 4294967295 mmSCL3_SCL_BYPASS_CONTROL 0 0x4145 0 0 4294967295 mmSCL4_SCL_BYPASS_CONTROL 0 0x4345 0 0 4294967295 mmSCL5_SCL_BYPASS_CONTROL 0 0x4545 0 0 4294967295 mmSCL_MANUAL_REPLICATE_CONTROL 0 0x1b46 2 0 4294967295 SCL_V_MANUAL_REPLICATE_FACTOR 0 3 SCL_H_MANUAL_REPLICATE_FACTOR 8 11 mmSCL0_SCL_MANUAL_REPLICATE_CONTROL 0 0x1b46 0 0 4294967295 mmSCL1_SCL_MANUAL_REPLICATE_CONTROL 0 0x1d46 0 0 4294967295 mmSCL2_SCL_MANUAL_REPLICATE_CONTROL 0 0x1f46 0 0 4294967295 mmSCL3_SCL_MANUAL_REPLICATE_CONTROL 0 0x4146 0 0 4294967295 mmSCL4_SCL_MANUAL_REPLICATE_CONTROL 0 0x4346 0 0 4294967295 mmSCL5_SCL_MANUAL_REPLICATE_CONTROL 0 0x4546 0 0 4294967295 mmSCL_AUTOMATIC_MODE_CONTROL 0 0x1b47 2 0 4294967295 SCL_V_CALC_AUTO_RATIO_EN 0 0 SCL_H_CALC_AUTO_RATIO_EN 16 16 mmSCL0_SCL_AUTOMATIC_MODE_CONTROL 0 0x1b47 0 0 4294967295 mmSCL1_SCL_AUTOMATIC_MODE_CONTROL 0 0x1d47 0 0 4294967295 mmSCL2_SCL_AUTOMATIC_MODE_CONTROL 0 0x1f47 0 0 4294967295 mmSCL3_SCL_AUTOMATIC_MODE_CONTROL 0 0x4147 0 0 4294967295 mmSCL4_SCL_AUTOMATIC_MODE_CONTROL 0 0x4347 0 0 4294967295 mmSCL5_SCL_AUTOMATIC_MODE_CONTROL 0 0x4547 0 0 4294967295 mmSCL_HORZ_FILTER_CONTROL 0 0x1b48 2 0 4294967295 SCL_H_FILTER_PICK_NEAREST 0 0 SCL_H_2TAP_HARDCODE_COEF_EN 8 8 mmSCL0_SCL_HORZ_FILTER_CONTROL 0 0x1b48 0 0 4294967295 mmSCL1_SCL_HORZ_FILTER_CONTROL 0 0x1d48 0 0 4294967295 mmSCL2_SCL_HORZ_FILTER_CONTROL 0 0x1f48 0 0 4294967295 mmSCL3_SCL_HORZ_FILTER_CONTROL 0 0x4148 0 0 4294967295 mmSCL4_SCL_HORZ_FILTER_CONTROL 0 0x4348 0 0 4294967295 mmSCL5_SCL_HORZ_FILTER_CONTROL 0 0x4548 0 0 4294967295 mmSCL_HORZ_FILTER_SCALE_RATIO 0 0x1b49 1 0 4294967295 SCL_H_SCALE_RATIO 0 25 mmSCL0_SCL_HORZ_FILTER_SCALE_RATIO 0 0x1b49 0 0 4294967295 mmSCL1_SCL_HORZ_FILTER_SCALE_RATIO 0 0x1d49 0 0 4294967295 mmSCL2_SCL_HORZ_FILTER_SCALE_RATIO 0 0x1f49 0 0 4294967295 mmSCL3_SCL_HORZ_FILTER_SCALE_RATIO 0 0x4149 0 0 4294967295 mmSCL4_SCL_HORZ_FILTER_SCALE_RATIO 0 0x4349 0 0 4294967295 mmSCL5_SCL_HORZ_FILTER_SCALE_RATIO 0 0x4549 0 0 4294967295 mmSCL_HORZ_FILTER_INIT 0 0x1b4a 2 0 4294967295 SCL_H_INIT_FRAC 0 23 SCL_H_INIT_INT 24 27 mmSCL0_SCL_HORZ_FILTER_INIT 0 0x1b4a 0 0 4294967295 mmSCL1_SCL_HORZ_FILTER_INIT 0 0x1d4a 0 0 4294967295 mmSCL2_SCL_HORZ_FILTER_INIT 0 0x1f4a 0 0 4294967295 mmSCL3_SCL_HORZ_FILTER_INIT 0 0x414a 0 0 4294967295 mmSCL4_SCL_HORZ_FILTER_INIT 0 0x434a 0 0 4294967295 mmSCL5_SCL_HORZ_FILTER_INIT 0 0x454a 0 0 4294967295 mmSCL_VERT_FILTER_CONTROL 0 0x1b4b 2 0 4294967295 SCL_V_FILTER_PICK_NEAREST 0 0 SCL_V_2TAP_HARDCODE_COEF_EN 8 8 mmSCL0_SCL_VERT_FILTER_CONTROL 0 0x1b4b 0 0 4294967295 mmSCL1_SCL_VERT_FILTER_CONTROL 0 0x1d4b 0 0 4294967295 mmSCL2_SCL_VERT_FILTER_CONTROL 0 0x1f4b 0 0 4294967295 mmSCL3_SCL_VERT_FILTER_CONTROL 0 0x414b 0 0 4294967295 mmSCL4_SCL_VERT_FILTER_CONTROL 0 0x434b 0 0 4294967295 mmSCL5_SCL_VERT_FILTER_CONTROL 0 0x454b 0 0 4294967295 mmSCL_VERT_FILTER_SCALE_RATIO 0 0x1b4c 1 0 4294967295 SCL_V_SCALE_RATIO 0 25 mmSCL0_SCL_VERT_FILTER_SCALE_RATIO 0 0x1b4c 0 0 4294967295 mmSCL1_SCL_VERT_FILTER_SCALE_RATIO 0 0x1d4c 0 0 4294967295 mmSCL2_SCL_VERT_FILTER_SCALE_RATIO 0 0x1f4c 0 0 4294967295 mmSCL3_SCL_VERT_FILTER_SCALE_RATIO 0 0x414c 0 0 4294967295 mmSCL4_SCL_VERT_FILTER_SCALE_RATIO 0 0x434c 0 0 4294967295 mmSCL5_SCL_VERT_FILTER_SCALE_RATIO 0 0x454c 0 0 4294967295 mmSCL_VERT_FILTER_INIT 0 0x1b4d 2 0 4294967295 SCL_V_INIT_FRAC 0 23 SCL_V_INIT_INT 24 26 mmSCL0_SCL_VERT_FILTER_INIT 0 0x1b4d 0 0 4294967295 mmSCL1_SCL_VERT_FILTER_INIT 0 0x1d4d 0 0 4294967295 mmSCL2_SCL_VERT_FILTER_INIT 0 0x1f4d 0 0 4294967295 mmSCL3_SCL_VERT_FILTER_INIT 0 0x414d 0 0 4294967295 mmSCL4_SCL_VERT_FILTER_INIT 0 0x434d 0 0 4294967295 mmSCL5_SCL_VERT_FILTER_INIT 0 0x454d 0 0 4294967295 mmSCL_VERT_FILTER_INIT_BOT 0 0x1b4e 2 0 4294967295 SCL_V_INIT_FRAC_BOT 0 23 SCL_V_INIT_INT_BOT 24 26 mmSCL0_SCL_VERT_FILTER_INIT_BOT 0 0x1b4e 0 0 4294967295 mmSCL1_SCL_VERT_FILTER_INIT_BOT 0 0x1d4e 0 0 4294967295 mmSCL2_SCL_VERT_FILTER_INIT_BOT 0 0x1f4e 0 0 4294967295 mmSCL3_SCL_VERT_FILTER_INIT_BOT 0 0x414e 0 0 4294967295 mmSCL4_SCL_VERT_FILTER_INIT_BOT 0 0x434e 0 0 4294967295 mmSCL5_SCL_VERT_FILTER_INIT_BOT 0 0x454e 0 0 4294967295 mmSCL_ROUND_OFFSET 0 0x1b4f 2 0 4294967295 SCL_ROUND_OFFSET_RGB_Y 0 15 SCL_ROUND_OFFSET_CBCR 16 31 mmSCL0_SCL_ROUND_OFFSET 0 0x1b4f 0 0 4294967295 mmSCL1_SCL_ROUND_OFFSET 0 0x1d4f 0 0 4294967295 mmSCL2_SCL_ROUND_OFFSET 0 0x1f4f 0 0 4294967295 mmSCL3_SCL_ROUND_OFFSET 0 0x414f 0 0 4294967295 mmSCL4_SCL_ROUND_OFFSET 0 0x434f 0 0 4294967295 mmSCL5_SCL_ROUND_OFFSET 0 0x454f 0 0 4294967295 mmSCL_UPDATE 0 0x1b51 4 0 4294967295 SCL_UPDATE_PENDING 0 0 SCL_UPDATE_TAKEN 8 8 SCL_UPDATE_LOCK 16 16 SCL_COEF_UPDATE_COMPLETE 24 24 mmSCL0_SCL_UPDATE 0 0x1b51 0 0 4294967295 mmSCL1_SCL_UPDATE 0 0x1d51 0 0 4294967295 mmSCL2_SCL_UPDATE 0 0x1f51 0 0 4294967295 mmSCL3_SCL_UPDATE 0 0x4151 0 0 4294967295 mmSCL4_SCL_UPDATE 0 0x4351 0 0 4294967295 mmSCL5_SCL_UPDATE 0 0x4551 0 0 4294967295 mmSCL_F_SHARP_CONTROL 0 0x1b53 4 0 4294967295 SCL_HF_SHARP_SCALE_FACTOR 0 2 SCL_HF_SHARP_EN 4 4 SCL_VF_SHARP_SCALE_FACTOR 8 10 SCL_VF_SHARP_EN 12 12 mmSCL0_SCL_F_SHARP_CONTROL 0 0x1b53 0 0 4294967295 mmSCL1_SCL_F_SHARP_CONTROL 0 0x1d53 0 0 4294967295 mmSCL2_SCL_F_SHARP_CONTROL 0 0x1f53 0 0 4294967295 mmSCL3_SCL_F_SHARP_CONTROL 0 0x4153 0 0 4294967295 mmSCL4_SCL_F_SHARP_CONTROL 0 0x4353 0 0 4294967295 mmSCL5_SCL_F_SHARP_CONTROL 0 0x4553 0 0 4294967295 mmSCL_ALU_CONTROL 0 0x1b54 1 0 4294967295 SCL_ALU_DISABLE 0 0 mmSCL0_SCL_ALU_CONTROL 0 0x1b54 0 0 4294967295 mmSCL1_SCL_ALU_CONTROL 0 0x1d54 0 0 4294967295 mmSCL2_SCL_ALU_CONTROL 0 0x1f54 0 0 4294967295 mmSCL3_SCL_ALU_CONTROL 0 0x4154 0 0 4294967295 mmSCL4_SCL_ALU_CONTROL 0 0x4354 0 0 4294967295 mmSCL5_SCL_ALU_CONTROL 0 0x4554 0 0 4294967295 mmSCL_COEF_RAM_CONFLICT_STATUS 0 0x1b55 4 0 4294967295 SCL_HOST_CONFLICT_FLAG 0 0 SCL_HOST_CONFLICT_ACK 8 8 SCL_HOST_CONFLICT_MASK 12 12 SCL_HOST_CONFLICT_INT_STATUS 16 16 mmSCL0_SCL_COEF_RAM_CONFLICT_STATUS 0 0x1b55 0 0 4294967295 mmSCL1_SCL_COEF_RAM_CONFLICT_STATUS 0 0x1d55 0 0 4294967295 mmSCL2_SCL_COEF_RAM_CONFLICT_STATUS 0 0x1f55 0 0 4294967295 mmSCL3_SCL_COEF_RAM_CONFLICT_STATUS 0 0x4155 0 0 4294967295 mmSCL4_SCL_COEF_RAM_CONFLICT_STATUS 0 0x4355 0 0 4294967295 mmSCL5_SCL_COEF_RAM_CONFLICT_STATUS 0 0x4555 0 0 4294967295 mmVIEWPORT_START_SECONDARY 0 0x1b5b 2 0 4294967295 VIEWPORT_Y_START_SECONDARY 0 13 VIEWPORT_X_START_SECONDARY 16 29 mmSCL0_VIEWPORT_START_SECONDARY 0 0x1b5b 0 0 4294967295 mmSCL1_VIEWPORT_START_SECONDARY 0 0x1d5b 0 0 4294967295 mmSCL2_VIEWPORT_START_SECONDARY 0 0x1f5b 0 0 4294967295 mmSCL3_VIEWPORT_START_SECONDARY 0 0x415b 0 0 4294967295 mmSCL4_VIEWPORT_START_SECONDARY 0 0x435b 0 0 4294967295 mmSCL5_VIEWPORT_START_SECONDARY 0 0x455b 0 0 4294967295 mmVIEWPORT_START 0 0x1b5c 2 0 4294967295 VIEWPORT_Y_START 0 13 VIEWPORT_X_START 16 29 mmSCL0_VIEWPORT_START 0 0x1b5c 0 0 4294967295 mmSCL1_VIEWPORT_START 0 0x1d5c 0 0 4294967295 mmSCL2_VIEWPORT_START 0 0x1f5c 0 0 4294967295 mmSCL3_VIEWPORT_START 0 0x415c 0 0 4294967295 mmSCL4_VIEWPORT_START 0 0x435c 0 0 4294967295 mmSCL5_VIEWPORT_START 0 0x455c 0 0 4294967295 mmVIEWPORT_SIZE 0 0x1b5d 2 0 4294967295 VIEWPORT_HEIGHT 0 13 VIEWPORT_WIDTH 16 29 mmSCL0_VIEWPORT_SIZE 0 0x1b5d 0 0 4294967295 mmSCL1_VIEWPORT_SIZE 0 0x1d5d 0 0 4294967295 mmSCL2_VIEWPORT_SIZE 0 0x1f5d 0 0 4294967295 mmSCL3_VIEWPORT_SIZE 0 0x415d 0 0 4294967295 mmSCL4_VIEWPORT_SIZE 0 0x435d 0 0 4294967295 mmSCL5_VIEWPORT_SIZE 0 0x455d 0 0 4294967295 mmEXT_OVERSCAN_LEFT_RIGHT 0 0x1b5e 2 0 4294967295 EXT_OVERSCAN_RIGHT 0 12 EXT_OVERSCAN_LEFT 16 28 mmSCL0_EXT_OVERSCAN_LEFT_RIGHT 0 0x1b5e 0 0 4294967295 mmSCL1_EXT_OVERSCAN_LEFT_RIGHT 0 0x1d5e 0 0 4294967295 mmSCL2_EXT_OVERSCAN_LEFT_RIGHT 0 0x1f5e 0 0 4294967295 mmSCL3_EXT_OVERSCAN_LEFT_RIGHT 0 0x415e 0 0 4294967295 mmSCL4_EXT_OVERSCAN_LEFT_RIGHT 0 0x435e 0 0 4294967295 mmSCL5_EXT_OVERSCAN_LEFT_RIGHT 0 0x455e 0 0 4294967295 mmEXT_OVERSCAN_TOP_BOTTOM 0 0x1b5f 2 0 4294967295 EXT_OVERSCAN_BOTTOM 0 12 EXT_OVERSCAN_TOP 16 28 mmSCL0_EXT_OVERSCAN_TOP_BOTTOM 0 0x1b5f 0 0 4294967295 mmSCL1_EXT_OVERSCAN_TOP_BOTTOM 0 0x1d5f 0 0 4294967295 mmSCL2_EXT_OVERSCAN_TOP_BOTTOM 0 0x1f5f 0 0 4294967295 mmSCL3_EXT_OVERSCAN_TOP_BOTTOM 0 0x415f 0 0 4294967295 mmSCL4_EXT_OVERSCAN_TOP_BOTTOM 0 0x435f 0 0 4294967295 mmSCL5_EXT_OVERSCAN_TOP_BOTTOM 0 0x455f 0 0 4294967295 mmSCL_MODE_CHANGE_DET1 0 0x1b60 3 0 4294967295 SCL_MODE_CHANGE 0 0 SCL_MODE_CHANGE_ACK 4 4 SCL_ALU_H_SCALE_RATIO 7 27 mmSCL0_SCL_MODE_CHANGE_DET1 0 0x1b60 0 0 4294967295 mmSCL1_SCL_MODE_CHANGE_DET1 0 0x1d60 0 0 4294967295 mmSCL2_SCL_MODE_CHANGE_DET1 0 0x1f60 0 0 4294967295 mmSCL3_SCL_MODE_CHANGE_DET1 0 0x4160 0 0 4294967295 mmSCL4_SCL_MODE_CHANGE_DET1 0 0x4360 0 0 4294967295 mmSCL5_SCL_MODE_CHANGE_DET1 0 0x4560 0 0 4294967295 mmSCL_MODE_CHANGE_DET2 0 0x1b61 1 0 4294967295 SCL_ALU_V_SCALE_RATIO 0 20 mmSCL0_SCL_MODE_CHANGE_DET2 0 0x1b61 0 0 4294967295 mmSCL1_SCL_MODE_CHANGE_DET2 0 0x1d61 0 0 4294967295 mmSCL2_SCL_MODE_CHANGE_DET2 0 0x1f61 0 0 4294967295 mmSCL3_SCL_MODE_CHANGE_DET2 0 0x4161 0 0 4294967295 mmSCL4_SCL_MODE_CHANGE_DET2 0 0x4361 0 0 4294967295 mmSCL5_SCL_MODE_CHANGE_DET2 0 0x4561 0 0 4294967295 mmSCL_MODE_CHANGE_DET3 0 0x1b62 2 0 4294967295 SCL_ALU_SOURCE_HEIGHT 0 13 SCL_ALU_SOURCE_WIDTH 16 29 mmSCL0_SCL_MODE_CHANGE_DET3 0 0x1b62 0 0 4294967295 mmSCL1_SCL_MODE_CHANGE_DET3 0 0x1d62 0 0 4294967295 mmSCL2_SCL_MODE_CHANGE_DET3 0 0x1f62 0 0 4294967295 mmSCL3_SCL_MODE_CHANGE_DET3 0 0x4162 0 0 4294967295 mmSCL4_SCL_MODE_CHANGE_DET3 0 0x4362 0 0 4294967295 mmSCL5_SCL_MODE_CHANGE_DET3 0 0x4562 0 0 4294967295 mmSCL_MODE_CHANGE_MASK 0 0x1b63 1 0 4294967295 SCL_MODE_CHANGE_MASK 0 0 mmSCL0_SCL_MODE_CHANGE_MASK 0 0x1b63 0 0 4294967295 mmSCL1_SCL_MODE_CHANGE_MASK 0 0x1d63 0 0 4294967295 mmSCL2_SCL_MODE_CHANGE_MASK 0 0x1f63 0 0 4294967295 mmSCL3_SCL_MODE_CHANGE_MASK 0 0x4163 0 0 4294967295 mmSCL4_SCL_MODE_CHANGE_MASK 0 0x4363 0 0 4294967295 mmSCL5_SCL_MODE_CHANGE_MASK 0 0x4563 0 0 4294967295 mmSCL_DEBUG2 0 0x1b69 3 0 4294967295 SCL_DEBUG_REQ_MODE 0 0 SCL_DEBUG_EOF_MODE 1 2 SCL_DEBUG2 3 31 mmSCL0_SCL_DEBUG2 0 0x1b69 0 0 4294967295 mmSCL1_SCL_DEBUG2 0 0x1d69 0 0 4294967295 mmSCL2_SCL_DEBUG2 0 0x1f69 0 0 4294967295 mmSCL3_SCL_DEBUG2 0 0x4169 0 0 4294967295 mmSCL4_SCL_DEBUG2 0 0x4369 0 0 4294967295 mmSCL5_SCL_DEBUG2 0 0x4569 0 0 4294967295 mmSCL_DEBUG 0 0x1b6a 1 0 4294967295 SCL_DEBUG 0 31 mmSCL0_SCL_DEBUG 0 0x1b6a 0 0 4294967295 mmSCL1_SCL_DEBUG 0 0x1d6a 0 0 4294967295 mmSCL2_SCL_DEBUG 0 0x1f6a 0 0 4294967295 mmSCL3_SCL_DEBUG 0 0x416a 0 0 4294967295 mmSCL4_SCL_DEBUG 0 0x436a 0 0 4294967295 mmSCL5_SCL_DEBUG 0 0x456a 0 0 4294967295 mmSCL_TEST_DEBUG_INDEX 0 0x1b6b 2 0 4294967295 SCL_TEST_DEBUG_INDEX 0 7 SCL_TEST_DEBUG_WRITE_EN 8 8 mmSCL0_SCL_TEST_DEBUG_INDEX 0 0x1b6b 0 0 4294967295 mmSCL1_SCL_TEST_DEBUG_INDEX 0 0x1d6b 0 0 4294967295 mmSCL2_SCL_TEST_DEBUG_INDEX 0 0x1f6b 0 0 4294967295 mmSCL3_SCL_TEST_DEBUG_INDEX 0 0x416b 0 0 4294967295 mmSCL4_SCL_TEST_DEBUG_INDEX 0 0x436b 0 0 4294967295 mmSCL5_SCL_TEST_DEBUG_INDEX 0 0x456b 0 0 4294967295 mmSCL_TEST_DEBUG_DATA 0 0x1b6c 1 0 4294967295 SCL_TEST_DEBUG_DATA 0 31 mmSCL0_SCL_TEST_DEBUG_DATA 0 0x1b6c 0 0 4294967295 mmSCL1_SCL_TEST_DEBUG_DATA 0 0x1d6c 0 0 4294967295 mmSCL2_SCL_TEST_DEBUG_DATA 0 0x1f6c 0 0 4294967295 mmSCL3_SCL_TEST_DEBUG_DATA 0 0x416c 0 0 4294967295 mmSCL4_SCL_TEST_DEBUG_DATA 0 0x436c 0 0 4294967295 mmSCL5_SCL_TEST_DEBUG_DATA 0 0x456c 0 0 4294967295 mmSCLV_COEF_RAM_SELECT 0 0x4670 3 0 4294967295 SCL_C_RAM_TAP_PAIR_IDX 0 1 SCL_C_RAM_PHASE 8 14 SCL_C_RAM_FILTER_TYPE 16 17 mmSCLV0_SCLV_COEF_RAM_SELECT 0 0x4670 0 0 4294967295 mmSCLV1_SCLV_COEF_RAM_SELECT 0 0x9870 0 0 4294967295 mmSCLV_COEF_RAM_TAP_DATA 0 0x4671 4 0 4294967295 SCL_C_RAM_EVEN_TAP_COEF 0 13 SCL_C_RAM_EVEN_TAP_COEF_EN 15 15 SCL_C_RAM_ODD_TAP_COEF 16 29 SCL_C_RAM_ODD_TAP_COEF_EN 31 31 mmSCLV0_SCLV_COEF_RAM_TAP_DATA 0 0x4671 0 0 4294967295 mmSCLV1_SCLV_COEF_RAM_TAP_DATA 0 0x9871 0 0 4294967295 mmSCLV_MODE 0 0x4672 5 0 4294967295 SCL_MODE 0 1 SCL_MODE_C 2 3 SCL_PSCL_EN 4 4 SCL_PSCL_EN_C 5 5 SCL_INTERLACE_SOURCE 8 9 mmSCLV0_SCLV_MODE 0 0x4672 0 0 4294967295 mmSCLV1_SCLV_MODE 0 0x9872 0 0 4294967295 mmSCLV_TAP_CONTROL 0 0x4673 4 0 4294967295 SCL_V_NUM_OF_TAPS 0 2 SCL_H_NUM_OF_TAPS 4 6 SCL_V_NUM_OF_TAPS_C 8 10 SCL_H_NUM_OF_TAPS_C 12 14 mmSCLV0_SCLV_TAP_CONTROL 0 0x4673 0 0 4294967295 mmSCLV1_SCLV_TAP_CONTROL 0 0x9873 0 0 4294967295 mmSCLV_CONTROL 0 0x4674 3 0 4294967295 SCL_BOUNDARY_MODE 0 0 SCL_EARLY_EOL_MODE 4 4 SCL_TOTAL_PHASE 8 8 mmSCLV0_SCLV_CONTROL 0 0x4674 0 0 4294967295 mmSCLV1_SCLV_CONTROL 0 0x9874 0 0 4294967295 mmSCLV_MANUAL_REPLICATE_CONTROL 0 0x4675 2 0 4294967295 SCL_V_MANUAL_REPLICATE_FACTOR 0 3 SCL_H_MANUAL_REPLICATE_FACTOR 8 11 mmSCLV0_SCLV_MANUAL_REPLICATE_CONTROL 0 0x4675 0 0 4294967295 mmSCLV1_SCLV_MANUAL_REPLICATE_CONTROL 0 0x9875 0 0 4294967295 mmSCLV_AUTOMATIC_MODE_CONTROL 0 0x4676 2 0 4294967295 SCL_V_CALC_AUTO_RATIO_EN 0 0 SCL_H_CALC_AUTO_RATIO_EN 16 16 mmSCLV0_SCLV_AUTOMATIC_MODE_CONTROL 0 0x4676 0 0 4294967295 mmSCLV1_SCLV_AUTOMATIC_MODE_CONTROL 0 0x9876 0 0 4294967295 mmSCLV_HORZ_FILTER_CONTROL 0 0x4677 1 0 4294967295 SCL_H_2TAP_HARDCODE_COEF_EN 8 8 mmSCLV0_SCLV_HORZ_FILTER_CONTROL 0 0x4677 0 0 4294967295 mmSCLV1_SCLV_HORZ_FILTER_CONTROL 0 0x9877 0 0 4294967295 mmSCLV_HORZ_FILTER_SCALE_RATIO 0 0x4678 1 0 4294967295 SCL_H_SCALE_RATIO 0 25 mmSCLV0_SCLV_HORZ_FILTER_SCALE_RATIO 0 0x4678 0 0 4294967295 mmSCLV1_SCLV_HORZ_FILTER_SCALE_RATIO 0 0x9878 0 0 4294967295 mmSCLV_HORZ_FILTER_INIT 0 0x4679 2 0 4294967295 SCL_H_INIT_FRAC 0 23 SCL_H_INIT_INT 24 27 mmSCLV0_SCLV_HORZ_FILTER_INIT 0 0x4679 0 0 4294967295 mmSCLV1_SCLV_HORZ_FILTER_INIT 0 0x9879 0 0 4294967295 mmSCLV_HORZ_FILTER_SCALE_RATIO_C 0 0x467a 1 0 4294967295 SCL_H_SCALE_RATIO_C 0 25 mmSCLV0_SCLV_HORZ_FILTER_SCALE_RATIO_C 0 0x467a 0 0 4294967295 mmSCLV1_SCLV_HORZ_FILTER_SCALE_RATIO_C 0 0x987a 0 0 4294967295 mmSCLV_HORZ_FILTER_INIT_C 0 0x467b 2 0 4294967295 SCL_H_INIT_FRAC_C 0 23 SCL_H_INIT_INT_C 24 27 mmSCLV0_SCLV_HORZ_FILTER_INIT_C 0 0x467b 0 0 4294967295 mmSCLV1_SCLV_HORZ_FILTER_INIT_C 0 0x987b 0 0 4294967295 mmSCLV_VERT_FILTER_CONTROL 0 0x467c 1 0 4294967295 SCL_V_2TAP_HARDCODE_COEF_EN 8 8 mmSCLV0_SCLV_VERT_FILTER_CONTROL 0 0x467c 0 0 4294967295 mmSCLV1_SCLV_VERT_FILTER_CONTROL 0 0x987c 0 0 4294967295 mmSCLV_VERT_FILTER_SCALE_RATIO 0 0x467d 1 0 4294967295 SCL_V_SCALE_RATIO 0 25 mmSCLV0_SCLV_VERT_FILTER_SCALE_RATIO 0 0x467d 0 0 4294967295 mmSCLV1_SCLV_VERT_FILTER_SCALE_RATIO 0 0x987d 0 0 4294967295 mmSCLV_VERT_FILTER_INIT 0 0x467e 2 0 4294967295 SCL_V_INIT_FRAC 0 23 SCL_V_INIT_INT 24 26 mmSCLV0_SCLV_VERT_FILTER_INIT 0 0x467e 0 0 4294967295 mmSCLV1_SCLV_VERT_FILTER_INIT 0 0x987e 0 0 4294967295 mmSCLV_VERT_FILTER_INIT_BOT 0 0x467f 2 0 4294967295 SCL_V_INIT_FRAC_BOT 0 23 SCL_V_INIT_INT_BOT 24 26 mmSCLV0_SCLV_VERT_FILTER_INIT_BOT 0 0x467f 0 0 4294967295 mmSCLV1_SCLV_VERT_FILTER_INIT_BOT 0 0x987f 0 0 4294967295 mmSCLV_VERT_FILTER_SCALE_RATIO_C 0 0x4680 1 0 4294967295 SCL_V_SCALE_RATIO_C 0 25 mmSCLV0_SCLV_VERT_FILTER_SCALE_RATIO_C 0 0x4680 0 0 4294967295 mmSCLV1_SCLV_VERT_FILTER_SCALE_RATIO_C 0 0x9880 0 0 4294967295 mmSCLV_VERT_FILTER_INIT_C 0 0x4681 2 0 4294967295 SCL_V_INIT_FRAC_C 0 23 SCL_V_INIT_INT_C 24 26 mmSCLV0_SCLV_VERT_FILTER_INIT_C 0 0x4681 0 0 4294967295 mmSCLV1_SCLV_VERT_FILTER_INIT_C 0 0x9881 0 0 4294967295 mmSCLV_VERT_FILTER_INIT_BOT_C 0 0x4682 2 0 4294967295 SCL_V_INIT_FRAC_BOT_C 0 23 SCL_V_INIT_INT_BOT_C 24 26 mmSCLV0_SCLV_VERT_FILTER_INIT_BOT_C 0 0x4682 0 0 4294967295 mmSCLV1_SCLV_VERT_FILTER_INIT_BOT_C 0 0x9882 0 0 4294967295 mmSCLV_ROUND_OFFSET 0 0x4683 2 0 4294967295 SCL_ROUND_OFFSET_RGB_Y 0 15 SCL_ROUND_OFFSET_CBCR 16 31 mmSCLV0_SCLV_ROUND_OFFSET 0 0x4683 0 0 4294967295 mmSCLV1_SCLV_ROUND_OFFSET 0 0x9883 0 0 4294967295 mmSCLV_UPDATE 0 0x4684 4 0 4294967295 SCL_UPDATE_PENDING 0 0 SCL_UPDATE_TAKEN 8 8 SCL_UPDATE_LOCK 16 16 SCL_COEF_UPDATE_COMPLETE 24 24 mmSCLV0_SCLV_UPDATE 0 0x4684 0 0 4294967295 mmSCLV1_SCLV_UPDATE 0 0x9884 0 0 4294967295 mmSCLV_ALU_CONTROL 0 0x4685 1 0 4294967295 SCL_ALU_DISABLE 0 0 mmSCLV0_SCLV_ALU_CONTROL 0 0x4685 0 0 4294967295 mmSCLV1_SCLV_ALU_CONTROL 0 0x9885 0 0 4294967295 mmSCLV_VIEWPORT_START 0 0x4686 2 0 4294967295 VIEWPORT_Y_START 0 13 VIEWPORT_X_START 16 29 mmSCLV0_SCLV_VIEWPORT_START 0 0x4686 0 0 4294967295 mmSCLV1_SCLV_VIEWPORT_START 0 0x9886 0 0 4294967295 mmSCLV_VIEWPORT_START_SECONDARY 0 0x4687 2 0 4294967295 VIEWPORT_Y_START_SECONDARY 0 13 VIEWPORT_X_START_SECONDARY 16 29 mmSCLV0_SCLV_VIEWPORT_START_SECONDARY 0 0x4687 0 0 4294967295 mmSCLV1_SCLV_VIEWPORT_START_SECONDARY 0 0x9887 0 0 4294967295 mmSCLV_VIEWPORT_SIZE 0 0x4688 2 0 4294967295 VIEWPORT_HEIGHT 0 12 VIEWPORT_WIDTH 16 28 mmSCLV0_SCLV_VIEWPORT_SIZE 0 0x4688 0 0 4294967295 mmSCLV1_SCLV_VIEWPORT_SIZE 0 0x9888 0 0 4294967295 mmSCLV_VIEWPORT_START_C 0 0x4689 2 0 4294967295 VIEWPORT_Y_START_C 0 13 VIEWPORT_X_START_C 16 29 mmSCLV0_SCLV_VIEWPORT_START_C 0 0x4689 0 0 4294967295 mmSCLV1_SCLV_VIEWPORT_START_C 0 0x9889 0 0 4294967295 mmSCLV_VIEWPORT_START_SECONDARY_C 0 0x468a 2 0 4294967295 VIEWPORT_Y_START_SECONDARY_C 0 13 VIEWPORT_X_START_SECONDARY_C 16 29 mmSCLV0_SCLV_VIEWPORT_START_SECONDARY_C 0 0x468a 0 0 4294967295 mmSCLV1_SCLV_VIEWPORT_START_SECONDARY_C 0 0x988a 0 0 4294967295 mmSCLV_VIEWPORT_SIZE_C 0 0x468b 2 0 4294967295 VIEWPORT_HEIGHT_C 0 12 VIEWPORT_WIDTH_C 16 28 mmSCLV0_SCLV_VIEWPORT_SIZE_C 0 0x468b 0 0 4294967295 mmSCLV1_SCLV_VIEWPORT_SIZE_C 0 0x988b 0 0 4294967295 mmSCLV_EXT_OVERSCAN_LEFT_RIGHT 0 0x468c 2 0 4294967295 EXT_OVERSCAN_RIGHT 0 12 EXT_OVERSCAN_LEFT 16 28 mmSCLV0_SCLV_EXT_OVERSCAN_LEFT_RIGHT 0 0x468c 0 0 4294967295 mmSCLV1_SCLV_EXT_OVERSCAN_LEFT_RIGHT 0 0x988c 0 0 4294967295 mmSCLV_EXT_OVERSCAN_TOP_BOTTOM 0 0x468d 2 0 4294967295 EXT_OVERSCAN_BOTTOM 0 12 EXT_OVERSCAN_TOP 16 28 mmSCLV0_SCLV_EXT_OVERSCAN_TOP_BOTTOM 0 0x468d 0 0 4294967295 mmSCLV1_SCLV_EXT_OVERSCAN_TOP_BOTTOM 0 0x988d 0 0 4294967295 mmSCLV_MODE_CHANGE_DET1 0 0x468e 3 0 4294967295 SCL_MODE_CHANGE 0 0 SCL_MODE_CHANGE_ACK 4 4 SCL_ALU_H_SCALE_RATIO 7 27 mmSCLV0_SCLV_MODE_CHANGE_DET1 0 0x468e 0 0 4294967295 mmSCLV1_SCLV_MODE_CHANGE_DET1 0 0x988e 0 0 4294967295 mmSCLV_MODE_CHANGE_DET2 0 0x468f 1 0 4294967295 SCL_ALU_V_SCALE_RATIO 0 20 mmSCLV0_SCLV_MODE_CHANGE_DET2 0 0x468f 0 0 4294967295 mmSCLV1_SCLV_MODE_CHANGE_DET2 0 0x988f 0 0 4294967295 mmSCLV_MODE_CHANGE_DET3 0 0x4690 2 0 4294967295 SCL_ALU_SOURCE_HEIGHT 0 13 SCL_ALU_SOURCE_WIDTH 16 29 mmSCLV0_SCLV_MODE_CHANGE_DET3 0 0x4690 0 0 4294967295 mmSCLV1_SCLV_MODE_CHANGE_DET3 0 0x9890 0 0 4294967295 mmSCLV_MODE_CHANGE_MASK 0 0x4691 1 0 4294967295 SCL_MODE_CHANGE_MASK 0 0 mmSCLV0_SCLV_MODE_CHANGE_MASK 0 0x4691 0 0 4294967295 mmSCLV1_SCLV_MODE_CHANGE_MASK 0 0x9891 0 0 4294967295 mmSCLV_HORZ_FILTER_INIT_BOT 0 0x4692 2 0 4294967295 SCL_H_INIT_FRAC_BOT 0 23 SCL_H_INIT_INT_BOT 24 27 mmSCLV0_SCLV_HORZ_FILTER_INIT_BOT 0 0x4692 0 0 4294967295 mmSCLV1_SCLV_HORZ_FILTER_INIT_BOT 0 0x9892 0 0 4294967295 mmSCLV_HORZ_FILTER_INIT_BOT_C 0 0x4693 2 0 4294967295 SCL_H_INIT_FRAC_BOT_C 0 23 SCL_H_INIT_INT_BOT_C 24 27 mmSCLV0_SCLV_HORZ_FILTER_INIT_BOT_C 0 0x4693 0 0 4294967295 mmSCLV1_SCLV_HORZ_FILTER_INIT_BOT_C 0 0x9893 0 0 4294967295 mmSCLV_DEBUG2 0 0x4694 3 0 4294967295 SCL_DEBUG_REQ_MODE 0 0 SCL_DEBUG_EOF_MODE 1 2 SCL_DEBUG2 3 31 mmSCLV0_SCLV_DEBUG2 0 0x4694 0 0 4294967295 mmSCLV1_SCLV_DEBUG2 0 0x9894 0 0 4294967295 mmSCLV_DEBUG 0 0x4695 1 0 4294967295 SCL_DEBUG 0 31 mmSCLV0_SCLV_DEBUG 0 0x4695 0 0 4294967295 mmSCLV1_SCLV_DEBUG 0 0x9895 0 0 4294967295 mmSCLV_TEST_DEBUG_INDEX 0 0x4696 2 0 4294967295 SCL_TEST_DEBUG_INDEX 0 7 SCL_TEST_DEBUG_WRITE_EN 8 8 mmSCLV0_SCLV_TEST_DEBUG_INDEX 0 0x4696 0 0 4294967295 mmSCLV1_SCLV_TEST_DEBUG_INDEX 0 0x9896 0 0 4294967295 mmSCLV_TEST_DEBUG_DATA 0 0x4697 1 0 4294967295 SCL_TEST_DEBUG_DATA 0 31 mmSCLV0_SCLV_TEST_DEBUG_DATA 0 0x4697 0 0 4294967295 mmSCLV1_SCLV_TEST_DEBUG_DATA 0 0x9897 0 0 4294967295 mmCOL_MAN_UPDATE 0 0x46a4 4 0 4294967295 COL_MAN_UPDATE_PENDING 0 0 COL_MAN_UPDATE_TAKEN 1 1 COL_MAN_UPDATE_LOCK 16 16 COL_MAN_DISABLE_MULTIPLE_UPDATE 24 24 mmCOL_MAN0_COL_MAN_UPDATE 0 0x46a4 0 0 4294967295 mmCOL_MAN1_COL_MAN_UPDATE 0 0x98a4 0 0 4294967295 mmCOL_MAN_INPUT_CSC_CONTROL 0 0x46a5 3 0 4294967295 INPUT_CSC_MODE 0 1 INPUT_CSC_INPUT_TYPE 8 9 INPUT_CSC_CONVERSION_MODE 16 16 mmCOL_MAN0_COL_MAN_INPUT_CSC_CONTROL 0 0x46a5 0 0 4294967295 mmCOL_MAN1_COL_MAN_INPUT_CSC_CONTROL 0 0x98a5 0 0 4294967295 mmINPUT_CSC_C11_C12_A 0 0x46a6 2 0 4294967295 INPUT_CSC_C11_A 0 15 INPUT_CSC_C12_A 16 31 mmCOL_MAN0_INPUT_CSC_C11_C12_A 0 0x46a6 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C11_C12_A 0 0x98a6 0 0 4294967295 mmINPUT_CSC_C13_C14_A 0 0x46a7 2 0 4294967295 INPUT_CSC_C13_A 0 15 INPUT_CSC_C14_A 16 31 mmCOL_MAN0_INPUT_CSC_C13_C14_A 0 0x46a7 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C13_C14_A 0 0x98a7 0 0 4294967295 mmINPUT_CSC_C21_C22_A 0 0x46a8 2 0 4294967295 INPUT_CSC_C21_A 0 15 INPUT_CSC_C22_A 16 31 mmCOL_MAN0_INPUT_CSC_C21_C22_A 0 0x46a8 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C21_C22_A 0 0x98a8 0 0 4294967295 mmINPUT_CSC_C23_C24_A 0 0x46a9 2 0 4294967295 INPUT_CSC_C23_A 0 15 INPUT_CSC_C24_A 16 31 mmCOL_MAN0_INPUT_CSC_C23_C24_A 0 0x46a9 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C23_C24_A 0 0x98a9 0 0 4294967295 mmINPUT_CSC_C31_C32_A 0 0x46aa 2 0 4294967295 INPUT_CSC_C31_A 0 15 INPUT_CSC_C32_A 16 31 mmCOL_MAN0_INPUT_CSC_C31_C32_A 0 0x46aa 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C31_C32_A 0 0x98aa 0 0 4294967295 mmINPUT_CSC_C33_C34_A 0 0x46ab 2 0 4294967295 INPUT_CSC_C33_A 0 15 INPUT_CSC_C34_A 16 31 mmCOL_MAN0_INPUT_CSC_C33_C34_A 0 0x46ab 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C33_C34_A 0 0x98ab 0 0 4294967295 mmINPUT_CSC_C11_C12_B 0 0x46ac 2 0 4294967295 INPUT_CSC_C11_B 0 15 INPUT_CSC_C12_B 16 31 mmCOL_MAN0_INPUT_CSC_C11_C12_B 0 0x46ac 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C11_C12_B 0 0x98ac 0 0 4294967295 mmINPUT_CSC_C13_C14_B 0 0x46ad 2 0 4294967295 INPUT_CSC_C13_B 0 15 INPUT_CSC_C14_B 16 31 mmCOL_MAN0_INPUT_CSC_C13_C14_B 0 0x46ad 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C13_C14_B 0 0x98ad 0 0 4294967295 mmINPUT_CSC_C21_C22_B 0 0x46ae 2 0 4294967295 INPUT_CSC_C21_B 0 15 INPUT_CSC_C22_B 16 31 mmCOL_MAN0_INPUT_CSC_C21_C22_B 0 0x46ae 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C21_C22_B 0 0x98ae 0 0 4294967295 mmINPUT_CSC_C23_C24_B 0 0x46af 2 0 4294967295 INPUT_CSC_C23_B 0 15 INPUT_CSC_C24_B 16 31 mmCOL_MAN0_INPUT_CSC_C23_C24_B 0 0x46af 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C23_C24_B 0 0x98af 0 0 4294967295 mmINPUT_CSC_C31_C32_B 0 0x46b0 2 0 4294967295 INPUT_CSC_C31_B 0 15 INPUT_CSC_C32_B 16 31 mmCOL_MAN0_INPUT_CSC_C31_C32_B 0 0x46b0 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C31_C32_B 0 0x98b0 0 0 4294967295 mmINPUT_CSC_C33_C34_B 0 0x46b1 2 0 4294967295 INPUT_CSC_C33_B 0 15 INPUT_CSC_C34_B 16 31 mmCOL_MAN0_INPUT_CSC_C33_C34_B 0 0x46b1 0 0 4294967295 mmCOL_MAN1_INPUT_CSC_C33_C34_B 0 0x98b1 0 0 4294967295 mmPRESCALE_CONTROL 0 0x46b2 1 0 4294967295 PRESCALE_MODE 0 1 mmCOL_MAN0_PRESCALE_CONTROL 0 0x46b2 0 0 4294967295 mmCOL_MAN1_PRESCALE_CONTROL 0 0x98b2 0 0 4294967295 mmPRESCALE_VALUES_R 0 0x46b3 2 0 4294967295 PRESCALE_BIAS_R 0 15 PRESCALE_SCALE_R 16 31 mmCOL_MAN0_PRESCALE_VALUES_R 0 0x46b3 0 0 4294967295 mmCOL_MAN1_PRESCALE_VALUES_R 0 0x98b3 0 0 4294967295 mmPRESCALE_VALUES_G 0 0x46b4 2 0 4294967295 PRESCALE_BIAS_G 0 15 PRESCALE_SCALE_G 16 31 mmCOL_MAN0_PRESCALE_VALUES_G 0 0x46b4 0 0 4294967295 mmCOL_MAN1_PRESCALE_VALUES_G 0 0x98b4 0 0 4294967295 mmPRESCALE_VALUES_B 0 0x46b5 2 0 4294967295 PRESCALE_BIAS_B 0 15 PRESCALE_SCALE_B 16 31 mmCOL_MAN0_PRESCALE_VALUES_B 0 0x46b5 0 0 4294967295 mmCOL_MAN1_PRESCALE_VALUES_B 0 0x98b5 0 0 4294967295 mmCOL_MAN_OUTPUT_CSC_CONTROL 0 0x46b6 1 0 4294967295 OUTPUT_CSC_MODE 0 2 mmCOL_MAN0_COL_MAN_OUTPUT_CSC_CONTROL 0 0x46b6 0 0 4294967295 mmCOL_MAN1_COL_MAN_OUTPUT_CSC_CONTROL 0 0x98b6 0 0 4294967295 mmOUTPUT_CSC_C11_C12_A 0 0x46b7 2 0 4294967295 OUTPUT_CSC_C11_A 0 15 OUTPUT_CSC_C12_A 16 31 mmCOL_MAN0_OUTPUT_CSC_C11_C12_A 0 0x46b7 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C11_C12_A 0 0x98b7 0 0 4294967295 mmOUTPUT_CSC_C13_C14_A 0 0x46b8 2 0 4294967295 OUTPUT_CSC_C13_A 0 15 OUTPUT_CSC_C14_A 16 31 mmCOL_MAN0_OUTPUT_CSC_C13_C14_A 0 0x46b8 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C13_C14_A 0 0x98b8 0 0 4294967295 mmOUTPUT_CSC_C21_C22_A 0 0x46b9 2 0 4294967295 OUTPUT_CSC_C21_A 0 15 OUTPUT_CSC_C22_A 16 31 mmCOL_MAN0_OUTPUT_CSC_C21_C22_A 0 0x46b9 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C21_C22_A 0 0x98b9 0 0 4294967295 mmOUTPUT_CSC_C23_C24_A 0 0x46ba 2 0 4294967295 OUTPUT_CSC_C23_A 0 15 OUTPUT_CSC_C24_A 16 31 mmCOL_MAN0_OUTPUT_CSC_C23_C24_A 0 0x46ba 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C23_C24_A 0 0x98ba 0 0 4294967295 mmOUTPUT_CSC_C31_C32_A 0 0x46bb 2 0 4294967295 OUTPUT_CSC_C31_A 0 15 OUTPUT_CSC_C32_A 16 31 mmCOL_MAN0_OUTPUT_CSC_C31_C32_A 0 0x46bb 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C31_C32_A 0 0x98bb 0 0 4294967295 mmOUTPUT_CSC_C33_C34_A 0 0x46bc 2 0 4294967295 OUTPUT_CSC_C33_A 0 15 OUTPUT_CSC_C34_A 16 31 mmCOL_MAN0_OUTPUT_CSC_C33_C34_A 0 0x46bc 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C33_C34_A 0 0x98bc 0 0 4294967295 mmOUTPUT_CSC_C11_C12_B 0 0x46bd 2 0 4294967295 OUTPUT_CSC_C11_B 0 15 OUTPUT_CSC_C12_B 16 31 mmCOL_MAN0_OUTPUT_CSC_C11_C12_B 0 0x46bd 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C11_C12_B 0 0x98bd 0 0 4294967295 mmOUTPUT_CSC_C13_C14_B 0 0x46be 2 0 4294967295 OUTPUT_CSC_C13_B 0 15 OUTPUT_CSC_C14_B 16 31 mmCOL_MAN0_OUTPUT_CSC_C13_C14_B 0 0x46be 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C13_C14_B 0 0x98be 0 0 4294967295 mmOUTPUT_CSC_C21_C22_B 0 0x46bf 2 0 4294967295 OUTPUT_CSC_C21_B 0 15 OUTPUT_CSC_C22_B 16 31 mmCOL_MAN0_OUTPUT_CSC_C21_C22_B 0 0x46bf 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C21_C22_B 0 0x98bf 0 0 4294967295 mmOUTPUT_CSC_C23_C24_B 0 0x46c0 2 0 4294967295 OUTPUT_CSC_C23_B 0 15 OUTPUT_CSC_C24_B 16 31 mmCOL_MAN0_OUTPUT_CSC_C23_C24_B 0 0x46c0 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C23_C24_B 0 0x98c0 0 0 4294967295 mmOUTPUT_CSC_C31_C32_B 0 0x46c1 2 0 4294967295 OUTPUT_CSC_C31_B 0 15 OUTPUT_CSC_C32_B 16 31 mmCOL_MAN0_OUTPUT_CSC_C31_C32_B 0 0x46c1 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C31_C32_B 0 0x98c1 0 0 4294967295 mmOUTPUT_CSC_C33_C34_B 0 0x46c2 2 0 4294967295 OUTPUT_CSC_C33_B 0 15 OUTPUT_CSC_C34_B 16 31 mmCOL_MAN0_OUTPUT_CSC_C33_C34_B 0 0x46c2 0 0 4294967295 mmCOL_MAN1_OUTPUT_CSC_C33_C34_B 0 0x98c2 0 0 4294967295 mmDENORM_CLAMP_CONTROL 0 0x46c3 2 0 4294967295 DENORM_MODE 0 1 DENORM_10BIT_OUT 8 8 mmCOL_MAN0_DENORM_CLAMP_CONTROL 0 0x46c3 0 0 4294967295 mmCOL_MAN1_DENORM_CLAMP_CONTROL 0 0x98c3 0 0 4294967295 mmDENORM_CLAMP_RANGE_R_CR 0 0x46c4 2 0 4294967295 RANGE_CLAMP_MAX_R_CR 0 11 RANGE_CLAMP_MIN_R_CR 12 23 mmCOL_MAN0_DENORM_CLAMP_RANGE_R_CR 0 0x46c4 0 0 4294967295 mmCOL_MAN1_DENORM_CLAMP_RANGE_R_CR 0 0x98c4 0 0 4294967295 mmDENORM_CLAMP_RANGE_G_Y 0 0x46c5 2 0 4294967295 RANGE_CLAMP_MAX_G_Y 0 11 RANGE_CLAMP_MIN_G_Y 12 23 mmCOL_MAN0_DENORM_CLAMP_RANGE_G_Y 0 0x46c5 0 0 4294967295 mmCOL_MAN1_DENORM_CLAMP_RANGE_G_Y 0 0x98c5 0 0 4294967295 mmDENORM_CLAMP_RANGE_B_CB 0 0x46c6 2 0 4294967295 RANGE_CLAMP_MAX_B_CB 0 11 RANGE_CLAMP_MIN_B_CB 12 23 mmCOL_MAN0_DENORM_CLAMP_RANGE_B_CB 0 0x46c6 0 0 4294967295 mmCOL_MAN1_DENORM_CLAMP_RANGE_B_CB 0 0x98c6 0 0 4294967295 mmCOL_MAN_FP_CONVERTED_FIELD 0 0x46c7 2 0 4294967295 COL_MAN_FP_CONVERTED_FIELD_DATA 0 17 COL_MAN_FP_CONVERTED_FIELD_INDEX 20 25 mmCOL_MAN0_COL_MAN_FP_CONVERTED_FIELD 0 0x46c7 0 0 4294967295 mmCOL_MAN1_COL_MAN_FP_CONVERTED_FIELD 0 0x98c7 0 0 4294967295 mmGAMMA_CORR_CONTROL 0 0x46c8 1 0 4294967295 GAMMA_CORR_MODE 0 1 mmCOL_MAN0_GAMMA_CORR_CONTROL 0 0x46c8 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CONTROL 0 0x98c8 0 0 4294967295 mmGAMMA_CORR_LUT_INDEX 0 0x46c9 1 0 4294967295 GAMMA_CORR_LUT_INDEX 0 7 mmCOL_MAN0_GAMMA_CORR_LUT_INDEX 0 0x46c9 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_LUT_INDEX 0 0x98c9 0 0 4294967295 mmGAMMA_CORR_LUT_DATA 0 0x46ca 1 0 4294967295 GAMMA_CORR_LUT_DATA 0 18 mmCOL_MAN0_GAMMA_CORR_LUT_DATA 0 0x46ca 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_LUT_DATA 0 0x98ca 0 0 4294967295 mmGAMMA_CORR_LUT_WRITE_EN_MASK 0 0x46cb 1 0 4294967295 GAMMA_CORR_LUT_WRITE_EN_MASK 0 2 mmCOL_MAN0_GAMMA_CORR_LUT_WRITE_EN_MASK 0 0x46cb 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_LUT_WRITE_EN_MASK 0 0x98cb 0 0 4294967295 mmGAMMA_CORR_CNTLA_START_CNTL 0 0x46cc 2 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION_START 0 17 GAMMA_CORR_CNTLA_EXP_REGION_START_SEGMENT 20 26 mmCOL_MAN0_GAMMA_CORR_CNTLA_START_CNTL 0 0x46cc 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_START_CNTL 0 0x98cc 0 0 4294967295 mmGAMMA_CORR_CNTLA_SLOPE_CNTL 0 0x46cd 1 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION_LINEAR_SLOPE 0 17 mmCOL_MAN0_GAMMA_CORR_CNTLA_SLOPE_CNTL 0 0x46cd 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_SLOPE_CNTL 0 0x98cd 0 0 4294967295 mmGAMMA_CORR_CNTLA_END_CNTL1 0 0x46ce 1 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION_END 0 15 mmCOL_MAN0_GAMMA_CORR_CNTLA_END_CNTL1 0 0x46ce 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_END_CNTL1 0 0x98ce 0 0 4294967295 mmGAMMA_CORR_CNTLA_END_CNTL2 0 0x46cf 2 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION_END_SLOPE 0 15 GAMMA_CORR_CNTLA_EXP_REGION_END_BASE 16 31 mmCOL_MAN0_GAMMA_CORR_CNTLA_END_CNTL2 0 0x46cf 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_END_CNTL2 0 0x98cf 0 0 4294967295 mmGAMMA_CORR_CNTLA_REGION_0_1 0 0x46d0 4 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION0_LUT_OFFSET 0 7 GAMMA_CORR_CNTLA_EXP_REGION0_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLA_EXP_REGION1_LUT_OFFSET 15 22 GAMMA_CORR_CNTLA_EXP_REGION1_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLA_REGION_0_1 0 0x46d0 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_REGION_0_1 0 0x98d0 0 0 4294967295 mmGAMMA_CORR_CNTLA_REGION_2_3 0 0x46d1 4 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION2_LUT_OFFSET 0 7 GAMMA_CORR_CNTLA_EXP_REGION2_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLA_EXP_REGION3_LUT_OFFSET 15 22 GAMMA_CORR_CNTLA_EXP_REGION3_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLA_REGION_2_3 0 0x46d1 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_REGION_2_3 0 0x98d1 0 0 4294967295 mmGAMMA_CORR_CNTLA_REGION_4_5 0 0x46d2 4 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION4_LUT_OFFSET 0 7 GAMMA_CORR_CNTLA_EXP_REGION4_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLA_EXP_REGION5_LUT_OFFSET 15 22 GAMMA_CORR_CNTLA_EXP_REGION5_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLA_REGION_4_5 0 0x46d2 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_REGION_4_5 0 0x98d2 0 0 4294967295 mmGAMMA_CORR_CNTLA_REGION_6_7 0 0x46d3 4 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION6_LUT_OFFSET 0 7 GAMMA_CORR_CNTLA_EXP_REGION6_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLA_EXP_REGION7_LUT_OFFSET 15 22 GAMMA_CORR_CNTLA_EXP_REGION7_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLA_REGION_6_7 0 0x46d3 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_REGION_6_7 0 0x98d3 0 0 4294967295 mmGAMMA_CORR_CNTLA_REGION_8_9 0 0x46d4 4 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION8_LUT_OFFSET 0 7 GAMMA_CORR_CNTLA_EXP_REGION8_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLA_EXP_REGION9_LUT_OFFSET 15 22 GAMMA_CORR_CNTLA_EXP_REGION9_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLA_REGION_8_9 0 0x46d4 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_REGION_8_9 0 0x98d4 0 0 4294967295 mmGAMMA_CORR_CNTLA_REGION_10_11 0 0x46d5 4 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION10_LUT_OFFSET 0 7 GAMMA_CORR_CNTLA_EXP_REGION10_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLA_EXP_REGION11_LUT_OFFSET 15 22 GAMMA_CORR_CNTLA_EXP_REGION11_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLA_REGION_10_11 0 0x46d5 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_REGION_10_11 0 0x98d5 0 0 4294967295 mmGAMMA_CORR_CNTLA_REGION_12_13 0 0x46d6 4 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION12_LUT_OFFSET 0 7 GAMMA_CORR_CNTLA_EXP_REGION12_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLA_EXP_REGION13_LUT_OFFSET 15 22 GAMMA_CORR_CNTLA_EXP_REGION13_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLA_REGION_12_13 0 0x46d6 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_REGION_12_13 0 0x98d6 0 0 4294967295 mmGAMMA_CORR_CNTLA_REGION_14_15 0 0x46d7 4 0 4294967295 GAMMA_CORR_CNTLA_EXP_REGION14_LUT_OFFSET 0 7 GAMMA_CORR_CNTLA_EXP_REGION14_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLA_EXP_REGION15_LUT_OFFSET 15 22 GAMMA_CORR_CNTLA_EXP_REGION15_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLA_REGION_14_15 0 0x46d7 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLA_REGION_14_15 0 0x98d7 0 0 4294967295 mmGAMMA_CORR_CNTLB_START_CNTL 0 0x46d8 2 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION_START 0 17 GAMMA_CORR_CNTLB_EXP_REGION_START_SEGMENT 20 26 mmCOL_MAN0_GAMMA_CORR_CNTLB_START_CNTL 0 0x46d8 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_START_CNTL 0 0x98d8 0 0 4294967295 mmGAMMA_CORR_CNTLB_SLOPE_CNTL 0 0x46d9 1 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION_LINEAR_SLOPE 0 17 mmCOL_MAN0_GAMMA_CORR_CNTLB_SLOPE_CNTL 0 0x46d9 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_SLOPE_CNTL 0 0x98d9 0 0 4294967295 mmGAMMA_CORR_CNTLB_END_CNTL1 0 0x46da 1 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION_END 0 15 mmCOL_MAN0_GAMMA_CORR_CNTLB_END_CNTL1 0 0x46da 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_END_CNTL1 0 0x98da 0 0 4294967295 mmGAMMA_CORR_CNTLB_END_CNTL2 0 0x46db 2 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION_END_SLOPE 0 15 GAMMA_CORR_CNTLB_EXP_REGION_END_BASE 16 31 mmCOL_MAN0_GAMMA_CORR_CNTLB_END_CNTL2 0 0x46db 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_END_CNTL2 0 0x98db 0 0 4294967295 mmGAMMA_CORR_CNTLB_REGION_0_1 0 0x46dc 4 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION0_LUT_OFFSET 0 7 GAMMA_CORR_CNTLB_EXP_REGION0_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLB_EXP_REGION1_LUT_OFFSET 15 22 GAMMA_CORR_CNTLB_EXP_REGION1_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLB_REGION_0_1 0 0x46dc 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_REGION_0_1 0 0x98dc 0 0 4294967295 mmGAMMA_CORR_CNTLB_REGION_2_3 0 0x46dd 4 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION2_LUT_OFFSET 0 7 GAMMA_CORR_CNTLB_EXP_REGION2_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLB_EXP_REGION3_LUT_OFFSET 15 22 GAMMA_CORR_CNTLB_EXP_REGION3_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLB_REGION_2_3 0 0x46dd 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_REGION_2_3 0 0x98dd 0 0 4294967295 mmGAMMA_CORR_CNTLB_REGION_4_5 0 0x46de 4 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION4_LUT_OFFSET 0 7 GAMMA_CORR_CNTLB_EXP_REGION4_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLB_EXP_REGION5_LUT_OFFSET 15 22 GAMMA_CORR_CNTLB_EXP_REGION5_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLB_REGION_4_5 0 0x46de 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_REGION_4_5 0 0x98de 0 0 4294967295 mmGAMMA_CORR_CNTLB_REGION_6_7 0 0x46df 4 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION6_LUT_OFFSET 0 7 GAMMA_CORR_CNTLB_EXP_REGION6_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLB_EXP_REGION7_LUT_OFFSET 15 22 GAMMA_CORR_CNTLB_EXP_REGION7_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLB_REGION_6_7 0 0x46df 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_REGION_6_7 0 0x98df 0 0 4294967295 mmGAMMA_CORR_CNTLB_REGION_8_9 0 0x46e0 4 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION8_LUT_OFFSET 0 7 GAMMA_CORR_CNTLB_EXP_REGION8_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLB_EXP_REGION9_LUT_OFFSET 15 22 GAMMA_CORR_CNTLB_EXP_REGION9_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLB_REGION_8_9 0 0x46e0 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_REGION_8_9 0 0x98e0 0 0 4294967295 mmGAMMA_CORR_CNTLB_REGION_10_11 0 0x46e1 4 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION10_LUT_OFFSET 0 7 GAMMA_CORR_CNTLB_EXP_REGION10_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLB_EXP_REGION11_LUT_OFFSET 15 22 GAMMA_CORR_CNTLB_EXP_REGION11_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLB_REGION_10_11 0 0x46e1 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_REGION_10_11 0 0x98e1 0 0 4294967295 mmGAMMA_CORR_CNTLB_REGION_12_13 0 0x46e2 4 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION12_LUT_OFFSET 0 7 GAMMA_CORR_CNTLB_EXP_REGION12_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLB_EXP_REGION13_LUT_OFFSET 15 22 GAMMA_CORR_CNTLB_EXP_REGION13_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLB_REGION_12_13 0 0x46e2 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_REGION_12_13 0 0x98e2 0 0 4294967295 mmGAMMA_CORR_CNTLB_REGION_14_15 0 0x46e3 4 0 4294967295 GAMMA_CORR_CNTLB_EXP_REGION14_LUT_OFFSET 0 7 GAMMA_CORR_CNTLB_EXP_REGION14_NUM_SEGMENTS 11 13 GAMMA_CORR_CNTLB_EXP_REGION15_LUT_OFFSET 15 22 GAMMA_CORR_CNTLB_EXP_REGION15_NUM_SEGMENTS 27 29 mmCOL_MAN0_GAMMA_CORR_CNTLB_REGION_14_15 0 0x46e3 0 0 4294967295 mmCOL_MAN1_GAMMA_CORR_CNTLB_REGION_14_15 0 0x98e3 0 0 4294967295 mmPACK_FIFO_ERROR 0 0x46e4 8 0 4294967295 PACK_FIFO_L_UNDERFLOW_OCCURED 0 0 PACK_FIFO_L_UNDERFLOW_ACK 1 1 PACK_FIFO_C_UNDERFLOW_OCCURED 8 8 PACK_FIFO_C_UNDERFLOW_ACK 9 9 PACK_FIFO_L_OVERFLOW_OCCURED 16 16 PACK_FIFO_L_OVERFLOW_ACK 17 17 PACK_FIFO_C_OVERFLOW_OCCURED 24 24 PACK_FIFO_C_OVERFLOW_ACK 25 25 mmCOL_MAN0_PACK_FIFO_ERROR 0 0x46e4 0 0 4294967295 mmCOL_MAN1_PACK_FIFO_ERROR 0 0x98e4 0 0 4294967295 mmOUTPUT_FIFO_ERROR 0 0x46e5 4 0 4294967295 OUTPUT_FIFO_UNDERFLOW_OCCURED 0 0 OUTPUT_FIFO_UNDERFLOW_ACK 1 1 OUTPUT_FIFO_OVERFLOW_OCCURED 8 8 OUTPUT_FIFO_OVERFLOW_ACK 9 9 mmCOL_MAN0_OUTPUT_FIFO_ERROR 0 0x46e5 0 0 4294967295 mmCOL_MAN1_OUTPUT_FIFO_ERROR 0 0x98e5 0 0 4294967295 mmINPUT_GAMMA_LUT_AUTOFILL 0 0x46e6 2 0 4294967295 INPUT_GAMMA_LUT_AUTOFILL 0 0 INPUT_GAMMA_LUT_AUTOFILL_DONE 1 1 mmCOL_MAN0_INPUT_GAMMA_LUT_AUTOFILL 0 0x46e6 0 0 4294967295 mmCOL_MAN1_INPUT_GAMMA_LUT_AUTOFILL 0 0x98e6 0 0 4294967295 mmINPUT_GAMMA_LUT_RW_INDEX 0 0x46e7 1 0 4294967295 INPUT_GAMMA_LUT_RW_INDEX 0 7 mmCOL_MAN0_INPUT_GAMMA_LUT_RW_INDEX 0 0x46e7 0 0 4294967295 mmCOL_MAN1_INPUT_GAMMA_LUT_RW_INDEX 0 0x98e7 0 0 4294967295 mmINPUT_GAMMA_LUT_SEQ_COLOR 0 0x46e8 1 0 4294967295 INPUT_GAMMA_LUT_SEQ_COLOR 0 15 mmCOL_MAN0_INPUT_GAMMA_LUT_SEQ_COLOR 0 0x46e8 0 0 4294967295 mmCOL_MAN1_INPUT_GAMMA_LUT_SEQ_COLOR 0 0x98e8 0 0 4294967295 mmINPUT_GAMMA_LUT_PWL_DATA 0 0x46e9 2 0 4294967295 INPUT_GAMMA_LUT_BASE 0 15 INPUT_GAMMA_LUT_DELTA 16 31 mmCOL_MAN0_INPUT_GAMMA_LUT_PWL_DATA 0 0x46e9 0 0 4294967295 mmCOL_MAN1_INPUT_GAMMA_LUT_PWL_DATA 0 0x98e9 0 0 4294967295 mmINPUT_GAMMA_LUT_30_COLOR 0 0x46ea 3 0 4294967295 INPUT_GAMMA_LUT_COLOR_10_BLUE 0 9 INPUT_GAMMA_LUT_COLOR_10_GREEN 10 19 INPUT_GAMMA_LUT_COLOR_10_RED 20 29 mmCOL_MAN0_INPUT_GAMMA_LUT_30_COLOR 0 0x46ea 0 0 4294967295 mmCOL_MAN1_INPUT_GAMMA_LUT_30_COLOR 0 0x98ea 0 0 4294967295 mmCOL_MAN_INPUT_GAMMA_CONTROL1 0 0x46eb 2 0 4294967295 INPUT_GAMMA_MODE 0 1 INPUT_GAMMA_LUT_10BIT_BYPASS_EN 26 26 mmCOL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL1 0 0x46eb 0 0 4294967295 mmCOL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL1 0 0x98eb 0 0 4294967295 mmCOL_MAN_INPUT_GAMMA_CONTROL2 0 0x46ec 13 0 4294967295 INPUT_GAMMA_INC_B 1 4 INPUT_GAMMA_DATA_B_SIGNED_EN 5 5 INPUT_GAMMA_DATA_B_FORMAT 6 7 INPUT_GAMMA_INC_G 8 11 INPUT_GAMMA_DATA_G_SIGNED_EN 12 12 INPUT_GAMMA_DATA_G_FORMAT 13 14 INPUT_GAMMA_INC_R 15 18 INPUT_GAMMA_DATA_R_SIGNED_EN 19 19 INPUT_GAMMA_DATA_R_FORMAT 20 21 INPUT_GAMMA_LUT_RW_MODE 22 22 INPUT_GAMMA_LUT_WRITE_EN_MASK 23 25 INPUT_GAMMA_LUT_VGA_ACCESS_ENABLE 26 26 INPUT_GAMMA_LUT_10BIT_BYPASS_DBL_BUF_EN 27 27 mmCOL_MAN0_COL_MAN_INPUT_GAMMA_CONTROL2 0 0x46ec 0 0 4294967295 mmCOL_MAN1_COL_MAN_INPUT_GAMMA_CONTROL2 0 0x98ec 0 0 4294967295 mmINPUT_GAMMA_BW_OFFSETS_B 0 0x46ed 2 0 4294967295 INPUT_GAMMA_BLACK_OFFSET_B 0 15 INPUT_GAMMA_WHITE_OFFSET_B 16 31 mmCOL_MAN0_INPUT_GAMMA_BW_OFFSETS_B 0 0x46ed 0 0 4294967295 mmCOL_MAN1_INPUT_GAMMA_BW_OFFSETS_B 0 0x98ed 0 0 4294967295 mmINPUT_GAMMA_BW_OFFSETS_G 0 0x46ee 2 0 4294967295 INPUT_GAMMA_BLACK_OFFSET_G 0 15 INPUT_GAMMA_WHITE_OFFSET_G 16 31 mmCOL_MAN0_INPUT_GAMMA_BW_OFFSETS_G 0 0x46ee 0 0 4294967295 mmCOL_MAN1_INPUT_GAMMA_BW_OFFSETS_G 0 0x98ee 0 0 4294967295 mmINPUT_GAMMA_BW_OFFSETS_R 0 0x46ef 2 0 4294967295 INPUT_GAMMA_BLACK_OFFSET_R 0 15 INPUT_GAMMA_WHITE_OFFSET_R 16 31 mmCOL_MAN0_INPUT_GAMMA_BW_OFFSETS_R 0 0x46ef 0 0 4294967295 mmCOL_MAN1_INPUT_GAMMA_BW_OFFSETS_R 0 0x98ef 0 0 4294967295 mmCOL_MAN_DEBUG_CONTROL 0 0x46f0 1 0 4294967295 COL_MAN_GLOBAL_PASSTHROUGH_ENABLE 0 0 mmCOL_MAN0_COL_MAN_DEBUG_CONTROL 0 0x46f0 0 0 4294967295 mmCOL_MAN1_COL_MAN_DEBUG_CONTROL 0 0x98f0 0 0 4294967295 mmCOL_MAN_TEST_DEBUG_INDEX 0 0x46f1 2 0 4294967295 COL_MAN_TEST_DEBUG_INDEX 0 7 COL_MAN_TEST_DEBUG_WRITE_EN 8 8 mmCOL_MAN0_COL_MAN_TEST_DEBUG_INDEX 0 0x46f1 0 0 4294967295 mmCOL_MAN1_COL_MAN_TEST_DEBUG_INDEX 0 0x98f1 0 0 4294967295 mmCOL_MAN_TEST_DEBUG_DATA 0 0x46f3 1 0 4294967295 COL_MAN_TEST_DEBUG_DATA 0 31 mmCOL_MAN0_COL_MAN_TEST_DEBUG_DATA 0 0x46f3 0 0 4294967295 mmCOL_MAN1_COL_MAN_TEST_DEBUG_DATA 0 0x98f3 0 0 4294967295 mmUNP_GRPH_ENABLE 0 0x4600 1 0 4294967295 GRPH_ENABLE 0 0 mmUNP0_UNP_GRPH_ENABLE 0 0x4600 0 0 4294967295 mmUNP1_UNP_GRPH_ENABLE 0 0x9800 0 0 4294967295 mmUNP_GRPH_CONTROL 0 0x4601 14 0 4294967295 GRPH_DEPTH 0 1 GRPH_NUM_BANKS 2 3 GRPH_Z 4 5 GRPH_BANK_WIDTH_L 6 7 GRPH_FORMAT 8 10 GRPH_BANK_HEIGHT_L 11 12 GRPH_TILE_SPLIT_L 13 15 GRPH_ADDRESS_TRANSLATION_ENABLE 16 16 GRPH_PRIVILEGED_ACCESS_ENABLE 17 17 GRPH_MACRO_TILE_ASPECT_L 18 19 GRPH_ARRAY_MODE 20 23 GRPH_PIPE_CONFIG 24 28 GRPH_MICRO_TILE_MODE_L 29 30 GRPH_COLOR_EXPANSION_MODE 31 31 mmUNP0_UNP_GRPH_CONTROL 0 0x4601 0 0 4294967295 mmUNP1_UNP_GRPH_CONTROL 0 0x9801 0 0 4294967295 mmUNP_GRPH_CONTROL_C 0 0x4602 5 0 4294967295 GRPH_BANK_WIDTH_C 6 7 GRPH_BANK_HEIGHT_C 11 12 GRPH_TILE_SPLIT_C 13 15 GRPH_MACRO_TILE_ASPECT_C 18 19 GRPH_MICRO_TILE_MODE_C 29 30 mmUNP0_UNP_GRPH_CONTROL_C 0 0x4602 0 0 4294967295 mmUNP1_UNP_GRPH_CONTROL_C 0 0x9802 0 0 4294967295 mmUNP_GRPH_CONTROL_EXP 0 0x4603 1 0 4294967295 VIDEO_FORMAT 0 2 mmUNP0_UNP_GRPH_CONTROL_EXP 0 0x4603 0 0 4294967295 mmUNP1_UNP_GRPH_CONTROL_EXP 0 0x9803 0 0 4294967295 mmUNP_GRPH_SWAP_CNTL 0 0x4605 4 0 4294967295 GRPH_ENDIAN_SWAP 0 1 GRPH_RED_CROSSBAR 4 5 GRPH_GREEN_CROSSBAR 6 7 GRPH_BLUE_CROSSBAR 8 9 mmUNP0_UNP_GRPH_SWAP_CNTL 0 0x4605 0 0 4294967295 mmUNP1_UNP_GRPH_SWAP_CNTL 0 0x9805 0 0 4294967295 mmUNP_GRPH_PRIMARY_SURFACE_ADDRESS_L 0 0x4606 1 0 4294967295 GRPH_PRIMARY_SURFACE_ADDRESS_L 8 31 mmUNP0_UNP_GRPH_PRIMARY_SURFACE_ADDRESS_L 0 0x4606 0 0 4294967295 mmUNP1_UNP_GRPH_PRIMARY_SURFACE_ADDRESS_L 0 0x9806 0 0 4294967295 mmUNP_GRPH_PRIMARY_SURFACE_ADDRESS_C 0 0x4607 1 0 4294967295 GRPH_PRIMARY_SURFACE_ADDRESS_C 8 31 mmUNP0_UNP_GRPH_PRIMARY_SURFACE_ADDRESS_C 0 0x4607 0 0 4294967295 mmUNP1_UNP_GRPH_PRIMARY_SURFACE_ADDRESS_C 0 0x9807 0 0 4294967295 mmUNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_L 0 0x4608 1 0 4294967295 GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_L 0 7 mmUNP0_UNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_L 0 0x4608 0 0 4294967295 mmUNP1_UNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_L 0 0x9808 0 0 4294967295 mmUNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_C 0 0x4609 1 0 4294967295 GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_C 0 7 mmUNP0_UNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_C 0 0x4609 0 0 4294967295 mmUNP1_UNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_C 0 0x9809 0 0 4294967295 mmUNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_L 0 0x460a 1 0 4294967295 GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_L 8 31 mmUNP0_UNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_L 0 0x460a 0 0 4294967295 mmUNP1_UNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_L 0 0x980a 0 0 4294967295 mmUNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_C 0 0x460b 1 0 4294967295 GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_C 8 31 mmUNP0_UNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_C 0 0x460b 0 0 4294967295 mmUNP1_UNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_C 0 0x980b 0 0 4294967295 mmUNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_HIGH_L 0 0x460c 1 0 4294967295 GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_HIGH_L 0 7 mmUNP0_UNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_HIGH_L 0 0x460c 0 0 4294967295 mmUNP1_UNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_HIGH_L 0 0x980c 0 0 4294967295 mmUNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_HIGH_C 0 0x460d 1 0 4294967295 GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_HIGH_C 0 7 mmUNP0_UNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_HIGH_C 0 0x460d 0 0 4294967295 mmUNP1_UNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_HIGH_C 0 0x980d 0 0 4294967295 mmUNP_GRPH_SECONDARY_SURFACE_ADDRESS_L 0 0x460e 1 0 4294967295 GRPH_SECONDARY_SURFACE_ADDRESS_L 8 31 mmUNP0_UNP_GRPH_SECONDARY_SURFACE_ADDRESS_L 0 0x460e 0 0 4294967295 mmUNP1_UNP_GRPH_SECONDARY_SURFACE_ADDRESS_L 0 0x980e 0 0 4294967295 mmUNP_GRPH_SECONDARY_SURFACE_ADDRESS_C 0 0x460f 1 0 4294967295 GRPH_SECONDARY_SURFACE_ADDRESS_C 8 31 mmUNP0_UNP_GRPH_SECONDARY_SURFACE_ADDRESS_C 0 0x460f 0 0 4294967295 mmUNP1_UNP_GRPH_SECONDARY_SURFACE_ADDRESS_C 0 0x980f 0 0 4294967295 mmUNP_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH_L 0 0x4610 1 0 4294967295 GRPH_SECONDARY_SURFACE_ADDRESS_HIGH_L 0 7 mmUNP0_UNP_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH_L 0 0x4610 0 0 4294967295 mmUNP1_UNP_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH_L 0 0x9810 0 0 4294967295 mmUNP_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH_C 0 0x4611 1 0 4294967295 GRPH_SECONDARY_SURFACE_ADDRESS_HIGH_C 0 7 mmUNP0_UNP_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH_C 0 0x4611 0 0 4294967295 mmUNP1_UNP_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH_C 0 0x9811 0 0 4294967295 mmUNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_L 0 0x4612 1 0 4294967295 GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_L 8 31 mmUNP0_UNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_L 0 0x4612 0 0 4294967295 mmUNP1_UNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_L 0 0x9812 0 0 4294967295 mmUNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_C 0 0x4613 1 0 4294967295 GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_C 8 31 mmUNP0_UNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_C 0 0x4613 0 0 4294967295 mmUNP1_UNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_C 0 0x9813 0 0 4294967295 mmUNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_HIGH_L 0 0x4614 1 0 4294967295 GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_HIGH_L 0 7 mmUNP0_UNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_HIGH_L 0 0x4614 0 0 4294967295 mmUNP1_UNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_HIGH_L 0 0x9814 0 0 4294967295 mmUNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_HIGH_C 0 0x4615 1 0 4294967295 GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_HIGH_C 0 7 mmUNP0_UNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_HIGH_C 0 0x4615 0 0 4294967295 mmUNP1_UNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_HIGH_C 0 0x9815 0 0 4294967295 mmUNP_GRPH_PITCH_L 0 0x4616 1 0 4294967295 GRPH_PITCH_L 0 14 mmUNP0_UNP_GRPH_PITCH_L 0 0x4616 0 0 4294967295 mmUNP1_UNP_GRPH_PITCH_L 0 0x9816 0 0 4294967295 mmUNP_GRPH_PITCH_C 0 0x4617 1 0 4294967295 GRPH_PITCH_C 0 14 mmUNP0_UNP_GRPH_PITCH_C 0 0x4617 0 0 4294967295 mmUNP1_UNP_GRPH_PITCH_C 0 0x9817 0 0 4294967295 mmUNP_GRPH_SURFACE_OFFSET_X_L 0 0x4618 1 0 4294967295 GRPH_SURFACE_OFFSET_X_L 0 13 mmUNP0_UNP_GRPH_SURFACE_OFFSET_X_L 0 0x4618 0 0 4294967295 mmUNP1_UNP_GRPH_SURFACE_OFFSET_X_L 0 0x9818 0 0 4294967295 mmUNP_GRPH_SURFACE_OFFSET_X_C 0 0x4619 1 0 4294967295 GRPH_SURFACE_OFFSET_X_C 0 13 mmUNP0_UNP_GRPH_SURFACE_OFFSET_X_C 0 0x4619 0 0 4294967295 mmUNP1_UNP_GRPH_SURFACE_OFFSET_X_C 0 0x9819 0 0 4294967295 mmUNP_GRPH_SURFACE_OFFSET_Y_L 0 0x461a 1 0 4294967295 GRPH_SURFACE_OFFSET_Y_L 0 13 mmUNP0_UNP_GRPH_SURFACE_OFFSET_Y_L 0 0x461a 0 0 4294967295 mmUNP1_UNP_GRPH_SURFACE_OFFSET_Y_L 0 0x981a 0 0 4294967295 mmUNP_GRPH_SURFACE_OFFSET_Y_C 0 0x461b 1 0 4294967295 GRPH_SURFACE_OFFSET_Y_C 0 13 mmUNP0_UNP_GRPH_SURFACE_OFFSET_Y_C 0 0x461b 0 0 4294967295 mmUNP1_UNP_GRPH_SURFACE_OFFSET_Y_C 0 0x981b 0 0 4294967295 mmUNP_GRPH_X_START_L 0 0x461c 1 0 4294967295 GRPH_X_START_L 0 13 mmUNP0_UNP_GRPH_X_START_L 0 0x461c 0 0 4294967295 mmUNP1_UNP_GRPH_X_START_L 0 0x981c 0 0 4294967295 mmUNP_GRPH_X_START_C 0 0x461d 1 0 4294967295 GRPH_X_START_C 0 13 mmUNP0_UNP_GRPH_X_START_C 0 0x461d 0 0 4294967295 mmUNP1_UNP_GRPH_X_START_C 0 0x981d 0 0 4294967295 mmUNP_GRPH_Y_START_L 0 0x461e 1 0 4294967295 GRPH_Y_START_L 0 13 mmUNP0_UNP_GRPH_Y_START_L 0 0x461e 0 0 4294967295 mmUNP1_UNP_GRPH_Y_START_L 0 0x981e 0 0 4294967295 mmUNP_GRPH_Y_START_C 0 0x461f 1 0 4294967295 GRPH_Y_START_C 0 13 mmUNP0_UNP_GRPH_Y_START_C 0 0x461f 0 0 4294967295 mmUNP1_UNP_GRPH_Y_START_C 0 0x981f 0 0 4294967295 mmUNP_GRPH_X_END_L 0 0x4620 1 0 4294967295 GRPH_X_END_L 0 14 mmUNP0_UNP_GRPH_X_END_L 0 0x4620 0 0 4294967295 mmUNP1_UNP_GRPH_X_END_L 0 0x9820 0 0 4294967295 mmUNP_GRPH_X_END_C 0 0x4621 1 0 4294967295 GRPH_X_END_C 0 14 mmUNP0_UNP_GRPH_X_END_C 0 0x4621 0 0 4294967295 mmUNP1_UNP_GRPH_X_END_C 0 0x9821 0 0 4294967295 mmUNP_GRPH_Y_END_L 0 0x4622 1 0 4294967295 GRPH_Y_END_L 0 14 mmUNP0_UNP_GRPH_Y_END_L 0 0x4622 0 0 4294967295 mmUNP1_UNP_GRPH_Y_END_L 0 0x9822 0 0 4294967295 mmUNP_GRPH_Y_END_C 0 0x4623 1 0 4294967295 GRPH_Y_END_C 0 14 mmUNP0_UNP_GRPH_Y_END_C 0 0x4623 0 0 4294967295 mmUNP1_UNP_GRPH_Y_END_C 0 0x9823 0 0 4294967295 mmUNP_GRPH_UPDATE 0 0x4624 8 0 4294967295 GRPH_MODE_UPDATE_PENDING 0 0 GRPH_MODE_UPDATE_TAKEN 1 1 GRPH_SURFACE_UPDATE_PENDING 2 2 GRPH_SURFACE_UPDATE_TAKEN 3 3 GRPH_UPDATE_LOCK 16 16 GRPH_SURFACE_IGNORE_UPDATE_LOCK 20 20 GRPH_MODE_DISABLE_MULTIPLE_UPDATE 24 24 GRPH_SURFACE_DISABLE_MULTIPLE_UPDATE 28 28 mmUNP0_UNP_GRPH_UPDATE 0 0x4624 0 0 4294967295 mmUNP1_UNP_GRPH_UPDATE 0 0x9824 0 0 4294967295 mmUNP_PIPE_OUTSTANDING_REQUEST_LIMIT 0 0x463a 2 0 4294967295 UNP_PIPE_OUTSTANDING_REQUEST_LIMIT_L 0 7 UNP_PIPE_OUTSTANDING_REQUEST_LIMIT_C 8 15 mmUNP0_UNP_PIPE_OUTSTANDING_REQUEST_LIMIT 0 0x463a 0 0 4294967295 mmUNP1_UNP_PIPE_OUTSTANDING_REQUEST_LIMIT 0 0x983a 0 0 4294967295 mmUNP_GRPH_SURFACE_ADDRESS_INUSE_L 0 0x4625 1 0 4294967295 GRPH_SURFACE_ADDRESS_INUSE_L 8 31 mmUNP0_UNP_GRPH_SURFACE_ADDRESS_INUSE_L 0 0x4625 0 0 4294967295 mmUNP1_UNP_GRPH_SURFACE_ADDRESS_INUSE_L 0 0x9825 0 0 4294967295 mmUNP_GRPH_SURFACE_ADDRESS_INUSE_C 0 0x4626 1 0 4294967295 GRPH_SURFACE_ADDRESS_INUSE_C 8 31 mmUNP0_UNP_GRPH_SURFACE_ADDRESS_INUSE_C 0 0x4626 0 0 4294967295 mmUNP1_UNP_GRPH_SURFACE_ADDRESS_INUSE_C 0 0x9826 0 0 4294967295 mmUNP_GRPH_SURFACE_ADDRESS_HIGH_INUSE_L 0 0x4627 1 0 4294967295 GRPH_SURFACE_ADDRESS_HIGH_INUSE_L 0 7 mmUNP0_UNP_GRPH_SURFACE_ADDRESS_HIGH_INUSE_L 0 0x4627 0 0 4294967295 mmUNP1_UNP_GRPH_SURFACE_ADDRESS_HIGH_INUSE_L 0 0x9827 0 0 4294967295 mmUNP_GRPH_SURFACE_ADDRESS_HIGH_INUSE_C 0 0x4628 1 0 4294967295 GRPH_SURFACE_ADDRESS_HIGH_INUSE_C 0 7 mmUNP0_UNP_GRPH_SURFACE_ADDRESS_HIGH_INUSE_C 0 0x4628 0 0 4294967295 mmUNP1_UNP_GRPH_SURFACE_ADDRESS_HIGH_INUSE_C 0 0x9828 0 0 4294967295 mmUNP_DVMM_PTE_CONTROL 0 0x4629 6 0 4294967295 DVMM_USE_SINGLE_PTE 0 0 DVMM_PAGE_WIDTH 1 4 DVMM_PAGE_HEIGHT 5 8 DVMM_MIN_PTE_BEFORE_FLIP 9 18 DVMM_PTE_BUFFER_MODE0 20 20 DVMM_PTE_BUFFER_MODE1 21 21 mmUNP_GRPH_INTERRUPT_STATUS 0 0x462b 2 0 4294967295 GRPH_PFLIP_INT_OCCURRED 0 0 GRPH_PFLIP_INT_CLEAR 8 8 mmUNP0_UNP_GRPH_INTERRUPT_STATUS 0 0x462b 0 0 4294967295 mmUNP1_UNP_GRPH_INTERRUPT_STATUS 0 0x982b 0 0 4294967295 mmUNP_GRPH_INTERRUPT_CONTROL 0 0x462c 2 0 4294967295 GRPH_PFLIP_INT_MASK 0 0 GRPH_PFLIP_INT_TYPE 8 8 mmUNP0_UNP_GRPH_INTERRUPT_CONTROL 0 0x462c 0 0 4294967295 mmUNP1_UNP_GRPH_INTERRUPT_CONTROL 0 0x982c 0 0 4294967295 mmUNP_GRPH_STEREOSYNC_FLIP 0 0x462e 9 0 4294967295 GRPH_STEREOSYNC_FLIP_EN 0 0 GRPH_STEREOSYNC_FLIP_MODE 4 5 GRPH_STACK_INTERLACE_FLIP_EN 8 8 GRPH_STACK_INTERLACE_FLIP_MODE 12 13 GRPH_PRIMARY_SURFACE_PENDING 16 16 GRPH_SECONDARY_SURFACE_PENDING 17 17 GRPH_PRIMARY_BOTTOM_SURFACE_PENDING 18 18 GRPH_SECONDARY_BOTTOM_SURFACE_PENDING 19 19 GRPH_STEREOSYNC_SELECT_DISABLE 28 28 mmUNP0_UNP_GRPH_STEREOSYNC_FLIP 0 0x462e 0 0 4294967295 mmUNP1_UNP_GRPH_STEREOSYNC_FLIP 0 0x982e 0 0 4294967295 mmUNP_FLIP_CONTROL 0 0x462f 2 0 4294967295 GRPH_SURFACE_UPDATE_PENDING_MODE 0 0 UNP_DEBUG_SG 2 31 mmUNP0_UNP_FLIP_CONTROL 0 0x462f 0 0 4294967295 mmUNP1_UNP_FLIP_CONTROL 0 0x982f 0 0 4294967295 mmUNP_CRC_CONTROL 0 0x4630 3 0 4294967295 UNP_CRC_ENABLE 0 0 UNP_CRC_SOURCE_SEL 2 4 UNP_CRC_LINE_SEL 8 9 mmUNP0_UNP_CRC_CONTROL 0 0x4630 0 0 4294967295 mmUNP1_UNP_CRC_CONTROL 0 0x9830 0 0 4294967295 mmUNP_CRC_MASK 0 0x4631 1 0 4294967295 UNP_CRC_MASK 0 31 mmUNP0_UNP_CRC_MASK 0 0x4631 0 0 4294967295 mmUNP1_UNP_CRC_MASK 0 0x9831 0 0 4294967295 mmUNP_CRC_CURRENT 0 0x4632 1 0 4294967295 UNP_CRC_CURRENT 0 31 mmUNP0_UNP_CRC_CURRENT 0 0x4632 0 0 4294967295 mmUNP1_UNP_CRC_CURRENT 0 0x9832 0 0 4294967295 mmUNP_CRC_LAST 0 0x4633 1 0 4294967295 UNP_CRC_LAST 0 31 mmUNP0_UNP_CRC_LAST 0 0x4633 0 0 4294967295 mmUNP1_UNP_CRC_LAST 0 0x9833 0 0 4294967295 mmUNP_LB_DATA_GAP_BETWEEN_CHUNK 0 0x4634 1 0 4294967295 UNP_LB_GAP_BETWEEN_CHUNK 4 8 mmUNP0_UNP_LB_DATA_GAP_BETWEEN_CHUNK 0 0x4634 0 0 4294967295 mmUNP1_UNP_LB_DATA_GAP_BETWEEN_CHUNK 0 0x9834 0 0 4294967295 mmUNP_HW_ROTATION 0 0x4635 3 0 4294967295 ROTATION_ANGLE 0 2 PIXEL_DROP 4 4 BUFFER_MODE 8 8 mmUNP0_UNP_HW_ROTATION 0 0x4635 0 0 4294967295 mmUNP1_UNP_HW_ROTATION 0 0x9835 0 0 4294967295 mmUNP_DEBUG 0 0x4636 1 0 4294967295 UNP_DEBUG 0 31 mmUNP0_UNP_DEBUG 0 0x4636 0 0 4294967295 mmUNP1_UNP_DEBUG 0 0x9836 0 0 4294967295 mmUNP_DEBUG2 0 0x4637 1 0 4294967295 UNP_DEBUG2 0 31 mmUNP0_UNP_DEBUG2 0 0x4637 0 0 4294967295 mmUNP1_UNP_DEBUG2 0 0x9837 0 0 4294967295 mmUNP_DVMM_DEBUG 0 0x463b 2 0 4294967295 UNP_L_DVMM_DEBUG 0 15 UNP_C_DVMM_DEBUG 16 31 mmUNP0_UNP_DVMM_DEBUG 0 0x463b 0 0 4294967295 mmUNP1_UNP_DVMM_DEBUG 0 0x983b 0 0 4294967295 mmUNP_TEST_DEBUG_INDEX 0 0x4638 2 0 4294967295 UNP_TEST_DEBUG_INDEX 0 7 UNP_TEST_DEBUG_WRITE_EN 8 8 mmUNP0_UNP_TEST_DEBUG_INDEX 0 0x4638 0 0 4294967295 mmUNP1_UNP_TEST_DEBUG_INDEX 0 0x9838 0 0 4294967295 mmUNP_TEST_DEBUG_DATA 0 0x4639 1 0 4294967295 UNP_TEST_DEBUG_DATA 0 31 mmUNP0_UNP_TEST_DEBUG_DATA 0 0x4639 0 0 4294967295 mmUNP1_UNP_TEST_DEBUG_DATA 0 0x9839 0 0 4294967295 mmGENMO_WT 0 0xf0 6 0 4294967295 GENMO_MONO_ADDRESS_B 0 0 VGA_RAM_EN 1 1 VGA_CKSEL 2 3 ODD_EVEN_MD_PGSEL 5 5 VGA_HSYNC_POL 6 6 VGA_VSYNC_POL 7 7 mmGENMO_RD 0 0xf3 6 0 4294967295 GENMO_MONO_ADDRESS_B 0 0 VGA_RAM_EN 1 1 VGA_CKSEL 2 3 ODD_EVEN_MD_PGSEL 5 5 VGA_HSYNC_POL 6 6 VGA_VSYNC_POL 7 7 mmGENENB 0 0xf0 1 0 4294967295 BLK_IO_BASE 0 7 mmGENFC_WT 0 0xee 1 0 4294967295 VSYNC_SEL_W 3 3 mmVGA0_GENFC_WT 0 0xee 0 0 4294967295 mmVGA1_GENFC_WT 0 0xf6 0 0 4294967295 mmGENFC_RD 0 0xf2 1 0 4294967295 VSYNC_SEL_R 3 3 mmGENS0 0 0xf0 2 0 4294967295 SENSE_SWITCH 4 4 CRT_INTR 7 7 mmGENS1 0 0xee 3 0 4294967295 NO_DISPLAY 0 0 VGA_VSTATUS 3 3 PIXEL_READ_BACK 4 5 mmVGA0_GENS1 0 0xee 0 0 4294967295 mmVGA1_GENS1 0 0xf6 0 0 4294967295 mmDAC_DATA 0 0xf2 1 0 4294967295 DAC_DATA 0 5 mmDAC_MASK 0 0xf1 1 0 4294967295 DAC_MASK 0 7 mmDAC_R_INDEX 0 0xf1 1 0 4294967295 DAC_R_INDEX 0 7 mmDAC_W_INDEX 0 0xf2 1 0 4294967295 DAC_W_INDEX 0 7 mmSEQ8_IDX 0 0xf1 1 0 4294967295 SEQ_IDX 0 2 mmSEQ8_DATA 0 0xf1 1 0 4294967295 SEQ_DATA 0 7 ixSEQ00 2 0x0 2 0 4294967295 SEQ_RST0B 0 0 SEQ_RST1B 1 1 ixSEQ01 2 0x1 5 0 4294967295 SEQ_DOT8 0 0 SEQ_SHIFT2 2 2 SEQ_PCLKBY2 3 3 SEQ_SHIFT4 4 4 SEQ_MAXBW 5 5 ixSEQ02 2 0x2 4 0 4294967295 SEQ_MAP0_EN 0 0 SEQ_MAP1_EN 1 1 SEQ_MAP2_EN 2 2 SEQ_MAP3_EN 3 3 ixSEQ03 2 0x3 6 0 4294967295 SEQ_FONT_B1 0 0 SEQ_FONT_B2 1 1 SEQ_FONT_A1 2 2 SEQ_FONT_A2 3 3 SEQ_FONT_B0 4 4 SEQ_FONT_A0 5 5 ixSEQ04 2 0x4 3 0 4294967295 SEQ_256K 1 1 SEQ_ODDEVEN 2 2 SEQ_CHAIN 3 3 mmCRTC8_IDX 0 0xed 1 0 4294967295 VCRTC_IDX 0 5 mmVGA0_CRTC8_IDX 0 0xed 0 0 4294967295 mmVGA1_CRTC8_IDX 0 0xf5 0 0 4294967295 mmCRTC8_DATA 0 0xed 1 0 4294967295 VCRTC_DATA 0 7 mmVGA0_CRTC8_DATA 0 0xed 0 0 4294967295 mmVGA1_CRTC8_DATA 0 0xf5 0 0 4294967295 ixCRT00 2 0x0 1 0 4294967295 H_TOTAL 0 7 ixCRT01 2 0x1 1 0 4294967295 H_DISP_END 0 7 ixCRT02 2 0x2 1 0 4294967295 H_BLANK_START 0 7 ixCRT03 2 0x3 3 0 4294967295 H_BLANK_END 0 4 H_DE_SKEW 5 6 CR10CR11_R_DIS_B 7 7 ixCRT04 2 0x4 1 0 4294967295 H_SYNC_START 0 7 ixCRT05 2 0x5 3 0 4294967295 H_SYNC_END 0 4 H_SYNC_SKEW 5 6 H_BLANK_END_B5 7 7 ixCRT06 2 0x6 1 0 4294967295 V_TOTAL 0 7 ixCRT07 2 0x7 8 0 4294967295 V_TOTAL_B8 0 0 V_DISP_END_B8 1 1 V_SYNC_START_B8 2 2 V_BLANK_START_B8 3 3 LINE_CMP_B8 4 4 V_TOTAL_B9 5 5 V_DISP_END_B9 6 6 V_SYNC_START_B9 7 7 ixCRT08 2 0x8 2 0 4294967295 ROW_SCAN_START 0 4 BYTE_PAN 5 6 ixCRT09 2 0x9 4 0 4294967295 MAX_ROW_SCAN 0 4 V_BLANK_START_B9 5 5 LINE_CMP_B9 6 6 DOUBLE_CHAR_HEIGHT 7 7 ixCRT0A 2 0xa 2 0 4294967295 CURSOR_START 0 4 CURSOR_DISABLE 5 5 ixCRT0B 2 0xb 2 0 4294967295 CURSOR_END 0 4 CURSOR_SKEW 5 6 ixCRT0C 2 0xc 1 0 4294967295 DISP_START 0 7 ixCRT0D 2 0xd 1 0 4294967295 DISP_START 0 7 ixCRT0E 2 0xe 1 0 4294967295 CURSOR_LOC_HI 0 7 ixCRT0F 2 0xf 1 0 4294967295 CURSOR_LOC_LO 0 7 ixCRT10 2 0x10 1 0 4294967295 V_SYNC_START 0 7 ixCRT11 2 0x11 5 0 4294967295 V_SYNC_END 0 3 V_INTR_CLR 4 4 V_INTR_EN 5 5 SEL5_REFRESH_CYC 6 6 C0T7_WR_ONLY 7 7 ixCRT12 2 0x12 1 0 4294967295 V_DISP_END 0 7 ixCRT13 2 0x13 1 0 4294967295 DISP_PITCH 0 7 ixCRT14 2 0x14 3 0 4294967295 UNDRLN_LOC 0 4 ADDR_CNT_BY4 5 5 DOUBLE_WORD 6 6 ixCRT15 2 0x15 1 0 4294967295 V_BLANK_START 0 7 ixCRT16 2 0x16 1 0 4294967295 V_BLANK_END 0 7 ixCRT17 2 0x17 7 0 4294967295 RA0_AS_A13B 0 0 RA1_AS_A14B 1 1 VCOUNT_BY2 2 2 ADDR_CNT_BY2 3 3 WRAP_A15TOA0 5 5 BYTE_MODE 6 6 CRTC_SYNC_EN 7 7 ixCRT18 2 0x18 1 0 4294967295 LINE_CMP 0 7 ixCRT1E 2 0x1e 1 0 4294967295 GRPH_DEC_RD1 1 1 ixCRT1F 2 0x1f 1 0 4294967295 GRPH_DEC_RD0 0 7 ixCRT22 2 0x22 1 0 4294967295 GRPH_LATCH_DATA 0 7 mmGRPH8_IDX 0 0xf3 1 0 4294967295 GRPH_IDX 0 3 mmGRPH8_DATA 0 0xf3 1 0 4294967295 GRPH_DATA 0 7 ixGRA00 2 0x0 4 0 4294967295 GRPH_SET_RESET0 0 0 GRPH_SET_RESET1 1 1 GRPH_SET_RESET2 2 2 GRPH_SET_RESET3 3 3 ixGRA01 2 0x1 4 0 4294967295 GRPH_SET_RESET_ENA0 0 0 GRPH_SET_RESET_ENA1 1 1 GRPH_SET_RESET_ENA2 2 2 GRPH_SET_RESET_ENA3 3 3 ixGRA02 2 0x2 1 0 4294967295 GRPH_CCOMP 0 3 ixGRA03 2 0x3 2 0 4294967295 GRPH_ROTATE 0 2 GRPH_FN_SEL 3 4 ixGRA04 2 0x4 1 0 4294967295 GRPH_RMAP 0 1 ixGRA05 2 0x5 5 0 4294967295 GRPH_WRITE_MODE 0 1 GRPH_READ1 3 3 CGA_ODDEVEN 4 4 GRPH_OES 5 5 GRPH_PACK 6 6 ixGRA06 2 0x6 3 0 4294967295 GRPH_GRAPHICS 0 0 GRPH_ODDEVEN 1 1 GRPH_ADRSEL 2 3 ixGRA07 2 0x7 4 0 4294967295 GRPH_XCARE0 0 0 GRPH_XCARE1 1 1 GRPH_XCARE2 2 2 GRPH_XCARE3 3 3 ixGRA08 2 0x8 1 0 4294967295 GRPH_BMSK 0 7 mmATTRX 0 0xf0 2 0 4294967295 ATTR_IDX 0 4 ATTR_PAL_RW_ENB 5 5 mmATTRDW 0 0xf0 1 0 4294967295 ATTR_DATA 0 7 mmATTRDR 0 0xf0 1 0 4294967295 ATTR_DATA 0 7 ixATTR00 2 0x0 1 0 4294967295 ATTR_PAL 0 5 ixATTR01 2 0x1 1 0 4294967295 ATTR_PAL 0 5 ixATTR02 2 0x2 1 0 4294967295 ATTR_PAL 0 5 ixATTR03 2 0x3 1 0 4294967295 ATTR_PAL 0 5 ixATTR04 2 0x4 1 0 4294967295 ATTR_PAL 0 5 ixATTR05 2 0x5 1 0 4294967295 ATTR_PAL 0 5 ixATTR06 2 0x6 1 0 4294967295 ATTR_PAL 0 5 ixATTR07 2 0x7 1 0 4294967295 ATTR_PAL 0 5 ixATTR08 2 0x8 1 0 4294967295 ATTR_PAL 0 5 ixATTR09 2 0x9 1 0 4294967295 ATTR_PAL 0 5 ixATTR0A 2 0xa 1 0 4294967295 ATTR_PAL 0 5 ixATTR0B 2 0xb 1 0 4294967295 ATTR_PAL 0 5 ixATTR0C 2 0xc 1 0 4294967295 ATTR_PAL 0 5 ixATTR0D 2 0xd 1 0 4294967295 ATTR_PAL 0 5 ixATTR0E 2 0xe 1 0 4294967295 ATTR_PAL 0 5 ixATTR0F 2 0xf 1 0 4294967295 ATTR_PAL 0 5 ixATTR10 2 0x10 7 0 4294967295 ATTR_GRPH_MODE 0 0 ATTR_MONO_EN 1 1 ATTR_LGRPH_EN 2 2 ATTR_BLINK_EN 3 3 ATTR_PANTOPONLY 5 5 ATTR_PCLKBY2 6 6 ATTR_CSEL_EN 7 7 ixATTR11 2 0x11 1 0 4294967295 ATTR_OVSC 0 7 ixATTR12 2 0x12 2 0 4294967295 ATTR_MAP_EN 0 3 ATTR_VSMUX 4 5 ixATTR13 2 0x13 1 0 4294967295 ATTR_PPAN 0 3 ixATTR14 2 0x14 2 0 4294967295 ATTR_CSEL1 0 1 ATTR_CSEL2 2 3 mmVGA_RENDER_CONTROL 0 0xc0 7 0 4294967295 VGA_BLINK_RATE 0 4 VGA_BLINK_MODE 5 6 VGA_CURSOR_BLINK_INVERT 7 7 VGA_EXTD_ADDR_COUNT_ENABLE 8 8 VGA_VSTATUS_CNTL 16 17 VGA_LOCK_8DOT 24 24 VGAREG_LINECMP_COMPATIBILITY_SEL 25 25 mmVGA_SOURCE_SELECT 0 0xfc 2 0 4294967295 VGA_SOURCE_SEL_A 0 2 VGA_SOURCE_SEL_B 8 10 mmVGA_SEQUENCER_RESET_CONTROL 0 0xc1 15 0 4294967295 D1_BLANK_DISPLAY_WHEN_SEQUENCER_RESET 0 0 D2_BLANK_DISPLAY_WHEN_SEQUENCER_RESET 1 1 D3_BLANK_DISPLAY_WHEN_SEQUENCER_RESET 2 2 D4_BLANK_DISPLAY_WHEN_SEQUENCER_RESET 3 3 D5_BLANK_DISPLAY_WHEN_SEQUENCER_RESET 4 4 D6_BLANK_DISPLAY_WHEN_SEQUENCER_RESET 5 5 D1_DISABLE_SYNCS_AND_DE_WHEN_SEQUENCER_RESET 8 8 D2_DISABLE_SYNCS_AND_DE_WHEN_SEQUENCER_RESET 9 9 D3_DISABLE_SYNCS_AND_DE_WHEN_SEQUENCER_RESET 10 10 D4_DISABLE_SYNCS_AND_DE_WHEN_SEQUENCER_RESET 11 11 D5_DISABLE_SYNCS_AND_DE_WHEN_SEQUENCER_RESET 12 12 D6_DISABLE_SYNCS_AND_DE_WHEN_SEQUENCER_RESET 13 13 VGA_MODE_AUTO_TRIGGER_ENABLE 16 16 VGA_MODE_AUTO_TRIGGER_REGISTER_SELECT 17 17 VGA_MODE_AUTO_TRIGGER_INDEX_SELECT 18 23 mmVGA_MODE_CONTROL 0 0xc2 4 0 4294967295 VGA_ATI_LINEAR 0 0 VGA_LUT_PALETTE_UPDATE_MODE 4 5 VGA_128K_APERTURE_PAGING 8 8 VGA_TEXT_132_COLUMNS_EN 16 16 mmVGA_SURFACE_PITCH_SELECT 0 0xc3 2 0 4294967295 VGA_SURFACE_PITCH_SELECT 0 1 VGA_SURFACE_HEIGHT_SELECT 8 9 mmVGA_MEMORY_BASE_ADDRESS 0 0xc4 1 0 4294967295 VGA_MEMORY_BASE_ADDRESS 0 31 mmVGA_MEMORY_BASE_ADDRESS_HIGH 0 0xc9 1 0 4294967295 VGA_MEMORY_BASE_ADDRESS_HIGH 0 7 mmVGA_DISPBUF1_SURFACE_ADDR 0 0xc6 1 0 4294967295 VGA_DISPBUF1_SURFACE_ADDR 0 24 mmVGA_DISPBUF2_SURFACE_ADDR 0 0xc8 1 0 4294967295 VGA_DISPBUF2_SURFACE_ADDR 0 24 mmVGA_HDP_CONTROL 0 0xca 5 0 4294967295 VGA_MEM_PAGE_SELECT_EN 0 0 VGA_MEMORY_DISABLE 4 4 VGA_RBBM_LOCK_DISABLE 8 8 VGA_SOFT_RESET 16 16 VGA_TEST_RESET_CONTROL 24 24 mmVGA_CACHE_CONTROL 0 0xcb 5 0 4294967295 VGA_WRITE_THROUGH_CACHE_DIS 0 0 VGA_READ_CACHE_DISABLE 8 8 VGA_READ_BUFFER_INVALIDATE 16 16 VGA_DCCIF_W256ONLY 20 20 VGA_DCCIF_WC_TIMEOUT 24 29 mmD1VGA_CONTROL 0 0xcc 5 0 4294967295 D1VGA_MODE_ENABLE 0 0 D1VGA_TIMING_SELECT 8 8 D1VGA_SYNC_POLARITY_SELECT 9 9 D1VGA_OVERSCAN_COLOR_EN 16 16 D1VGA_ROTATE 24 25 mmD2VGA_CONTROL 0 0xce 5 0 4294967295 D2VGA_MODE_ENABLE 0 0 D2VGA_TIMING_SELECT 8 8 D2VGA_SYNC_POLARITY_SELECT 9 9 D2VGA_OVERSCAN_COLOR_EN 16 16 D2VGA_ROTATE 24 25 mmD3VGA_CONTROL 0 0xf8 5 0 4294967295 D3VGA_MODE_ENABLE 0 0 D3VGA_TIMING_SELECT 8 8 D3VGA_SYNC_POLARITY_SELECT 9 9 D3VGA_OVERSCAN_COLOR_EN 16 16 D3VGA_ROTATE 24 25 mmD4VGA_CONTROL 0 0xf9 5 0 4294967295 D4VGA_MODE_ENABLE 0 0 D4VGA_TIMING_SELECT 8 8 D4VGA_SYNC_POLARITY_SELECT 9 9 D4VGA_OVERSCAN_COLOR_EN 16 16 D4VGA_ROTATE 24 25 mmD5VGA_CONTROL 0 0xfa 5 0 4294967295 D5VGA_MODE_ENABLE 0 0 D5VGA_TIMING_SELECT 8 8 D5VGA_SYNC_POLARITY_SELECT 9 9 D5VGA_OVERSCAN_COLOR_EN 16 16 D5VGA_ROTATE 24 25 mmD6VGA_CONTROL 0 0xfb 5 0 4294967295 D6VGA_MODE_ENABLE 0 0 D6VGA_TIMING_SELECT 8 8 D6VGA_SYNC_POLARITY_SELECT 9 9 D6VGA_OVERSCAN_COLOR_EN 16 16 D6VGA_ROTATE 24 25 mmVGA_HW_DEBUG 0 0xcf 1 0 4294967295 VGA_HW_DEBUG 0 31 mmVGA_STATUS 0 0xd0 4 0 4294967295 VGA_MEM_ACCESS_STATUS 0 0 VGA_REG_ACCESS_STATUS 1 1 VGA_DISPLAY_SWITCH_STATUS 2 2 VGA_MODE_AUTO_TRIGGER_STATUS 3 3 mmVGA_INTERRUPT_CONTROL 0 0xd1 4 0 4294967295 VGA_MEM_ACCESS_INT_MASK 0 0 VGA_REG_ACCESS_INT_MASK 8 8 VGA_DISPLAY_SWITCH_INT_MASK 16 16 VGA_MODE_AUTO_TRIGGER_INT_MASK 24 24 mmVGA_STATUS_CLEAR 0 0xd2 4 0 4294967295 VGA_MEM_ACCESS_INT_CLEAR 0 0 VGA_REG_ACCESS_INT_CLEAR 8 8 VGA_DISPLAY_SWITCH_INT_CLEAR 16 16 VGA_MODE_AUTO_TRIGGER_INT_CLEAR 24 24 mmVGA_INTERRUPT_STATUS 0 0xd3 4 0 4294967295 VGA_MEM_ACCESS_INT_STATUS 0 0 VGA_REG_ACCESS_INT_STATUS 1 1 VGA_DISPLAY_SWITCH_INT_STATUS 2 2 VGA_MODE_AUTO_TRIGGER_INT_STATUS 3 3 mmVGA_MAIN_CONTROL 0 0xd4 12 0 4294967295 VGA_CRTC_TIMEOUT 0 1 VGA_RENDER_TIMEOUT_COUNT 3 4 VGA_VIRTUAL_VERTICAL_RETRACE_DURATION 5 7 VGA_READBACK_VGA_VSTATUS_SOURCE_SELECT 8 9 VGA_MC_WRITE_CLEAN_WAIT_DELAY 12 15 VGA_READBACK_NO_DISPLAY_SOURCE_SELECT 16 17 VGA_READBACK_CRT_INTR_SOURCE_SELECT 24 25 VGA_READBACK_SENSE_SWITCH_SELECT 26 26 VGA_READ_URGENT_ENABLE 27 27 VGA_WRITES_URGENT_ENABLE 28 28 VGA_EXTERNAL_DAC_SENSE 29 29 VGA_MAIN_TEST_VSTATUS_NO_DISPLAY_CRTC_TIMEOUT 31 31 mmVGA_TEST_CONTROL 0 0xd5 4 0 4294967295 VGA_TEST_ENABLE 0 0 VGA_TEST_RENDER_START 8 8 VGA_TEST_RENDER_DONE 16 16 VGA_TEST_RENDER_DISPBUF_SELECT 24 24 mmVGA_DEBUG_READBACK_INDEX 0 0xd6 1 0 4294967295 VGA_DEBUG_READBACK_INDEX 0 7 mmVGA_DEBUG_READBACK_DATA 0 0xd7 1 0 4294967295 VGA_DEBUG_READBACK_DATA 0 31 mmVGA_MEM_WRITE_PAGE_ADDR 0 0x12 2 0 4294967295 VGA_MEM_WRITE_PAGE0_ADDR 0 9 VGA_MEM_WRITE_PAGE1_ADDR 16 25 mmVGA_MEM_READ_PAGE_ADDR 0 0x13 2 0 4294967295 VGA_MEM_READ_PAGE0_ADDR 0 9 VGA_MEM_READ_PAGE1_ADDR 16 25 mmVGA_TEST_DEBUG_INDEX 0 0xc5 2 0 4294967295 VGA_TEST_DEBUG_INDEX 0 7 VGA_TEST_DEBUG_WRITE_EN 8 8 mmVGA_TEST_DEBUG_DATA 0 0xc7 1 0 4294967295 VGA_TEST_DEBUG_DATA 0 31 ixVGADCC_DBG_DCCIF_C 2 0x7e 1 0 4294967295 DBG_DCCIF_C 0 31 mmBPHYC_DAC_MACRO_CNTL 0 0x48b9 5 0 4294967295 BPHYC_DAC_WHITE_LEVEL 0 1 BPHYC_DAC_WHITE_FINE_CONTROL 8 13 BPHYC_DAC_BANDGAP_ADJUSTMENT 16 21 BPHYC_DAC_ANALOG_MONITOR 24 27 BPHYC_DAC_COREMON 28 28 mmBPHYC_DAC_AUTO_CALIB_CONTROL 0 0x48ba 6 0 4294967295 BPHYC_DAC_CAL_INITB 0 0 BPHYC_DAC_CAL_EN 1 1 BPHYC_DAC_CAL_DACADJ_EN 2 2 BPHYC_DAC_CAL_WAIT_ADJUST 4 13 BPHYC_DAC_CAL_MASK 20 22 BPHYC_DAC_CAL_COMPLETE 28 28 mmDPG_PIPE_ARBITRATION_CONTROL1 0 0x1b30 2 0 4294967295 PIXEL_DURATION 0 15 BASE_WEIGHT 16 31 mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL1 0 0x1b30 0 0 4294967295 mmDMIF_PG1_DPG_PIPE_ARBITRATION_CONTROL1 0 0x1d30 0 0 4294967295 mmDMIF_PG2_DPG_PIPE_ARBITRATION_CONTROL1 0 0x1f30 0 0 4294967295 mmDMIF_PG3_DPG_PIPE_ARBITRATION_CONTROL1 0 0x4130 0 0 4294967295 mmDMIF_PG4_DPG_PIPE_ARBITRATION_CONTROL1 0 0x4330 0 0 4294967295 mmDMIF_PG5_DPG_PIPE_ARBITRATION_CONTROL1 0 0x4530 0 0 4294967295 mmDPG_PIPE_ARBITRATION_CONTROL2 0 0x1b31 2 0 4294967295 TIME_WEIGHT 0 15 URGENCY_WEIGHT 16 31 mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL2 0 0x1b31 0 0 4294967295 mmDMIF_PG1_DPG_PIPE_ARBITRATION_CONTROL2 0 0x1d31 0 0 4294967295 mmDMIF_PG2_DPG_PIPE_ARBITRATION_CONTROL2 0 0x1f31 0 0 4294967295 mmDMIF_PG3_DPG_PIPE_ARBITRATION_CONTROL2 0 0x4131 0 0 4294967295 mmDMIF_PG4_DPG_PIPE_ARBITRATION_CONTROL2 0 0x4331 0 0 4294967295 mmDMIF_PG5_DPG_PIPE_ARBITRATION_CONTROL2 0 0x4531 0 0 4294967295 mmDPG_WATERMARK_MASK_CONTROL 0 0x1b32 4 0 4294967295 STUTTER_EXIT_SELF_REFRESH_WATERMARK_MASK 0 2 URGENCY_WATERMARK_MASK 8 10 NB_PSTATE_CHANGE_WATERMARK_MASK 16 18 DISABLE_FLIP_URGENT 24 24 mmDMIF_PG0_DPG_WATERMARK_MASK_CONTROL 0 0x1b32 0 0 4294967295 mmDMIF_PG1_DPG_WATERMARK_MASK_CONTROL 0 0x1d32 0 0 4294967295 mmDMIF_PG2_DPG_WATERMARK_MASK_CONTROL 0 0x1f32 0 0 4294967295 mmDMIF_PG3_DPG_WATERMARK_MASK_CONTROL 0 0x4132 0 0 4294967295 mmDMIF_PG4_DPG_WATERMARK_MASK_CONTROL 0 0x4332 0 0 4294967295 mmDMIF_PG5_DPG_WATERMARK_MASK_CONTROL 0 0x4532 0 0 4294967295 mmDPG_PIPE_URGENCY_CONTROL 0 0x1b33 2 0 4294967295 URGENCY_LOW_WATERMARK 0 15 URGENCY_HIGH_WATERMARK 16 31 mmDMIF_PG0_DPG_PIPE_URGENCY_CONTROL 0 0x1b33 0 0 4294967295 mmDMIF_PG1_DPG_PIPE_URGENCY_CONTROL 0 0x1d33 0 0 4294967295 mmDMIF_PG2_DPG_PIPE_URGENCY_CONTROL 0 0x1f33 0 0 4294967295 mmDMIF_PG3_DPG_PIPE_URGENCY_CONTROL 0 0x4133 0 0 4294967295 mmDMIF_PG4_DPG_PIPE_URGENCY_CONTROL 0 0x4333 0 0 4294967295 mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL 0 0x4533 0 0 4294967295 mmDPG_PIPE_DPM_CONTROL 0 0x1b34 5 0 4294967295 DPM_ENABLE 0 0 MCLK_CHANGE_ENABLE 4 4 MCLK_CHANGE_FORCE_ON 8 8 MCLK_CHANGE_WATERMARK_MASK 12 13 MCLK_CHANGE_WATERMARK 16 31 mmDMIF_PG0_DPG_PIPE_DPM_CONTROL 0 0x1b34 0 0 4294967295 mmDMIF_PG1_DPG_PIPE_DPM_CONTROL 0 0x1d34 0 0 4294967295 mmDMIF_PG2_DPG_PIPE_DPM_CONTROL 0 0x1f34 0 0 4294967295 mmDMIF_PG3_DPG_PIPE_DPM_CONTROL 0 0x4134 0 0 4294967295 mmDMIF_PG4_DPG_PIPE_DPM_CONTROL 0 0x4334 0 0 4294967295 mmDMIF_PG5_DPG_PIPE_DPM_CONTROL 0 0x4534 0 0 4294967295 mmDPG_PIPE_STUTTER_CONTROL 0 0x1b35 10 0 4294967295 STUTTER_ENABLE 0 0 STUTTER_IGNORE_CURSOR 4 4 STUTTER_IGNORE_ICON 5 5 STUTTER_IGNORE_VGA 6 6 STUTTER_IGNORE_FBC 7 7 STUTTER_WM_HIGH_FORCE_ON 8 8 STUTTER_WM_HIGH_EXCLUDES_VBLANK 9 9 STUTTER_URGENT_IN_NOT_SELF_REFRESH 10 10 STUTTER_SELF_REFRESH_FORCE_ON 11 11 STUTTER_EXIT_SELF_REFRESH_WATERMARK 16 31 mmDMIF_PG0_DPG_PIPE_STUTTER_CONTROL 0 0x1b35 0 0 4294967295 mmDMIF_PG1_DPG_PIPE_STUTTER_CONTROL 0 0x1d35 0 0 4294967295 mmDMIF_PG2_DPG_PIPE_STUTTER_CONTROL 0 0x1f35 0 0 4294967295 mmDMIF_PG3_DPG_PIPE_STUTTER_CONTROL 0 0x4135 0 0 4294967295 mmDMIF_PG4_DPG_PIPE_STUTTER_CONTROL 0 0x4335 0 0 4294967295 mmDMIF_PG5_DPG_PIPE_STUTTER_CONTROL 0 0x4535 0 0 4294967295 mmDPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x1b36 6 0 4294967295 NB_PSTATE_CHANGE_ENABLE 0 0 NB_PSTATE_CHANGE_URGENT_DURING_REQUEST 4 4 NB_PSTATE_CHANGE_NOT_SELF_REFRESH_DURING_REQUEST 8 8 NB_PSTATE_CHANGE_FORCE_ON 9 9 NB_PSTATE_ALLOW_FOR_URGENT 10 10 NB_PSTATE_CHANGE_WATERMARK 15 31 mmDMIF_PG0_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x1b36 0 0 4294967295 mmDMIF_PG1_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x1d36 0 0 4294967295 mmDMIF_PG2_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x1f36 0 0 4294967295 mmDMIF_PG3_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x4136 0 0 4294967295 mmDMIF_PG4_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x4336 0 0 4294967295 mmDMIF_PG5_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x4536 0 0 4294967295 mmDPG_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x1b37 9 0 4294967295 STUTTER_ENABLE_NONLPTCH 0 0 STUTTER_IGNORE_CURSOR_NONLPTCH 4 4 STUTTER_IGNORE_ICON_NONLPTCH 5 5 STUTTER_IGNORE_VGA_NONLPTCH 6 6 STUTTER_IGNORE_FBC_NONLPTCH 7 7 STUTTER_WM_HIGH_FORCE_ON_NONLPTCH 8 8 STUTTER_WM_HIGH_EXCLUDES_VBLANK_NONLPTCH 9 9 STUTTER_URGENT_IN_NOT_SELF_REFRESH_NONLPTCH 10 10 STUTTER_SELF_REFRESH_FORCE_ON_NONLPTCH 11 11 mmDMIF_PG0_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x1b37 0 0 4294967295 mmDMIF_PG1_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x1d37 0 0 4294967295 mmDMIF_PG2_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x1f37 0 0 4294967295 mmDMIF_PG3_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x4137 0 0 4294967295 mmDMIF_PG4_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x4337 0 0 4294967295 mmDMIF_PG5_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x4537 0 0 4294967295 mmDPG_REPEATER_PROGRAM 0 0x1b3a 2 0 4294967295 REG_DPG_DMIFRC_REPEATER 0 2 REG_DMIFRC_DPG_REPEATER 4 6 mmDMIF_PG0_DPG_REPEATER_PROGRAM 0 0x1b3a 0 0 4294967295 mmDMIF_PG1_DPG_REPEATER_PROGRAM 0 0x1d3a 0 0 4294967295 mmDMIF_PG2_DPG_REPEATER_PROGRAM 0 0x1f3a 0 0 4294967295 mmDMIF_PG3_DPG_REPEATER_PROGRAM 0 0x413a 0 0 4294967295 mmDMIF_PG4_DPG_REPEATER_PROGRAM 0 0x433a 0 0 4294967295 mmDMIF_PG5_DPG_REPEATER_PROGRAM 0 0x453a 0 0 4294967295 mmDPG_HW_DEBUG_A 0 0x1b3b 1 0 4294967295 DPG_HW_DEBUG_A 0 31 mmDMIF_PG0_DPG_HW_DEBUG_A 0 0x1b3b 0 0 4294967295 mmDMIF_PG1_DPG_HW_DEBUG_A 0 0x1d3b 0 0 4294967295 mmDMIF_PG2_DPG_HW_DEBUG_A 0 0x1f3b 0 0 4294967295 mmDMIF_PG3_DPG_HW_DEBUG_A 0 0x413b 0 0 4294967295 mmDMIF_PG4_DPG_HW_DEBUG_A 0 0x433b 0 0 4294967295 mmDMIF_PG5_DPG_HW_DEBUG_A 0 0x453b 0 0 4294967295 mmDPG_HW_DEBUG_B 0 0x1b3c 1 0 4294967295 DPG_HW_DEBUG_B 0 31 mmDMIF_PG0_DPG_HW_DEBUG_B 0 0x1b3c 0 0 4294967295 mmDMIF_PG1_DPG_HW_DEBUG_B 0 0x1d3c 0 0 4294967295 mmDMIF_PG2_DPG_HW_DEBUG_B 0 0x1f3c 0 0 4294967295 mmDMIF_PG3_DPG_HW_DEBUG_B 0 0x413c 0 0 4294967295 mmDMIF_PG4_DPG_HW_DEBUG_B 0 0x433c 0 0 4294967295 mmDMIF_PG5_DPG_HW_DEBUG_B 0 0x453c 0 0 4294967295 mmDPG_HW_DEBUG_11 0 0x1b3d 1 0 4294967295 DPG_HW_DEBUG_11 0 0 mmDMIF_PG0_DPG_HW_DEBUG_11 0 0x1b3d 0 0 4294967295 mmDMIF_PG1_DPG_HW_DEBUG_11 0 0x1d3d 0 0 4294967295 mmDMIF_PG2_DPG_HW_DEBUG_11 0 0x1f3d 0 0 4294967295 mmDMIF_PG3_DPG_HW_DEBUG_11 0 0x413d 0 0 4294967295 mmDMIF_PG4_DPG_HW_DEBUG_11 0 0x433d 0 0 4294967295 mmDMIF_PG5_DPG_HW_DEBUG_11 0 0x453d 0 0 4294967295 mmDPG_CHK_PRE_PROC_CNTL 0 0x1b3e 1 0 4294967295 DPG_DISABLE_DMIF_BUF_CHK 0 0 mmDMIF_PG0_DPG_CHK_PRE_PROC_CNTL 0 0x1b3e 0 0 4294967295 mmDMIF_PG1_DPG_CHK_PRE_PROC_CNTL 0 0x1d3e 0 0 4294967295 mmDMIF_PG2_DPG_CHK_PRE_PROC_CNTL 0 0x1f3e 0 0 4294967295 mmDMIF_PG3_DPG_CHK_PRE_PROC_CNTL 0 0x413e 0 0 4294967295 mmDMIF_PG4_DPG_CHK_PRE_PROC_CNTL 0 0x433e 0 0 4294967295 mmDMIF_PG5_DPG_CHK_PRE_PROC_CNTL 0 0x453e 0 0 4294967295 mmDPG_DVMM_STATUS 0 0x1b3f 4 0 4294967295 DPG_DVMM_FORCED_FLIP_TO_UNMAPPED 0 0 DPG_DVMM_FORCED_FLIP_TO_MAPPED 1 1 DPG_DVMM_FORCED_FLIP_TO_UNMAPPED_CLR 4 4 DPG_DVMM_FORCED_FLIP_TO_MAPPED_CLR 5 5 mmDMIF_PG0_DPG_DVMM_STATUS 0 0x1b3f 0 0 4294967295 mmDMIF_PG1_DPG_DVMM_STATUS 0 0x1d3f 0 0 4294967295 mmDMIF_PG2_DPG_DVMM_STATUS 0 0x1f3f 0 0 4294967295 mmDMIF_PG3_DPG_DVMM_STATUS 0 0x413f 0 0 4294967295 mmDMIF_PG4_DPG_DVMM_STATUS 0 0x433f 0 0 4294967295 mmDMIF_PG5_DPG_DVMM_STATUS 0 0x453f 0 0 4294967295 mmDPG_TEST_DEBUG_INDEX 0 0x1b38 2 0 4294967295 DPG_TEST_DEBUG_INDEX 0 7 DPG_TEST_DEBUG_WRITE_EN 8 8 mmDMIF_PG0_DPG_TEST_DEBUG_INDEX 0 0x1b38 0 0 4294967295 mmDMIF_PG1_DPG_TEST_DEBUG_INDEX 0 0x1d38 0 0 4294967295 mmDMIF_PG2_DPG_TEST_DEBUG_INDEX 0 0x1f38 0 0 4294967295 mmDMIF_PG3_DPG_TEST_DEBUG_INDEX 0 0x4138 0 0 4294967295 mmDMIF_PG4_DPG_TEST_DEBUG_INDEX 0 0x4338 0 0 4294967295 mmDMIF_PG5_DPG_TEST_DEBUG_INDEX 0 0x4538 0 0 4294967295 mmDPG_TEST_DEBUG_DATA 0 0x1b39 1 0 4294967295 DPG_TEST_DEBUG_DATA 0 31 mmDMIF_PG0_DPG_TEST_DEBUG_DATA 0 0x1b39 0 0 4294967295 mmDMIF_PG1_DPG_TEST_DEBUG_DATA 0 0x1d39 0 0 4294967295 mmDMIF_PG2_DPG_TEST_DEBUG_DATA 0 0x1f39 0 0 4294967295 mmDMIF_PG3_DPG_TEST_DEBUG_DATA 0 0x4139 0 0 4294967295 mmDMIF_PG4_DPG_TEST_DEBUG_DATA 0 0x4339 0 0 4294967295 mmDMIF_PG5_DPG_TEST_DEBUG_DATA 0 0x4539 0 0 4294967295 mmDPGV0_PIPE_ARBITRATION_CONTROL1 0 0x4730 2 0 4294967295 PIXEL_DURATION 0 15 BASE_WEIGHT 16 31 mmDMIFV_PG0_DPGV0_PIPE_ARBITRATION_CONTROL1 0 0x4730 0 0 4294967295 mmDMIFV_PG1_DPGV0_PIPE_ARBITRATION_CONTROL1 0 0x9930 0 0 4294967295 mmDPGV1_PIPE_ARBITRATION_CONTROL1 0 0x473d 2 0 4294967295 PIXEL_DURATION 0 15 BASE_WEIGHT 16 31 mmDMIFV_PG0_DPGV1_PIPE_ARBITRATION_CONTROL1 0 0x473d 0 0 4294967295 mmDMIFV_PG1_DPGV1_PIPE_ARBITRATION_CONTROL1 0 0x993d 0 0 4294967295 mmDPGV0_PIPE_ARBITRATION_CONTROL2 0 0x4731 2 0 4294967295 TIME_WEIGHT 0 15 URGENCY_WEIGHT 16 31 mmDMIFV_PG0_DPGV0_PIPE_ARBITRATION_CONTROL2 0 0x4731 0 0 4294967295 mmDMIFV_PG1_DPGV0_PIPE_ARBITRATION_CONTROL2 0 0x9931 0 0 4294967295 mmDPGV1_PIPE_ARBITRATION_CONTROL2 0 0x473e 2 0 4294967295 TIME_WEIGHT 0 15 URGENCY_WEIGHT 16 31 mmDMIFV_PG0_DPGV1_PIPE_ARBITRATION_CONTROL2 0 0x473e 0 0 4294967295 mmDMIFV_PG1_DPGV1_PIPE_ARBITRATION_CONTROL2 0 0x993e 0 0 4294967295 mmDPGV0_WATERMARK_MASK_CONTROL 0 0x4732 4 0 4294967295 STUTTER_EXIT_SELF_REFRESH_WATERMARK_MASK 0 1 URGENCY_WATERMARK_MASK 8 9 NB_PSTATE_CHANGE_WATERMARK_MASK 16 17 DISABLE_FLIP_URGENT 24 24 mmDMIFV_PG0_DPGV0_WATERMARK_MASK_CONTROL 0 0x4732 0 0 4294967295 mmDMIFV_PG1_DPGV0_WATERMARK_MASK_CONTROL 0 0x9932 0 0 4294967295 mmDPGV1_WATERMARK_MASK_CONTROL 0 0x473f 4 0 4294967295 STUTTER_EXIT_SELF_REFRESH_WATERMARK_MASK 0 1 URGENCY_WATERMARK_MASK 8 9 NB_PSTATE_CHANGE_WATERMARK_MASK 16 17 DISABLE_FLIP_URGENT 24 24 mmDMIFV_PG0_DPGV1_WATERMARK_MASK_CONTROL 0 0x473f 0 0 4294967295 mmDMIFV_PG1_DPGV1_WATERMARK_MASK_CONTROL 0 0x993f 0 0 4294967295 mmDPGV0_PIPE_URGENCY_CONTROL 0 0x4733 2 0 4294967295 URGENCY_LOW_WATERMARK 0 15 URGENCY_HIGH_WATERMARK 16 31 mmDMIFV_PG0_DPGV0_PIPE_URGENCY_CONTROL 0 0x4733 0 0 4294967295 mmDMIFV_PG1_DPGV0_PIPE_URGENCY_CONTROL 0 0x9933 0 0 4294967295 mmDPGV1_PIPE_URGENCY_CONTROL 0 0x4740 2 0 4294967295 URGENCY_LOW_WATERMARK 0 15 URGENCY_HIGH_WATERMARK 16 31 mmDMIFV_PG0_DPGV1_PIPE_URGENCY_CONTROL 0 0x4740 0 0 4294967295 mmDMIFV_PG1_DPGV1_PIPE_URGENCY_CONTROL 0 0x9940 0 0 4294967295 mmDPGV0_PIPE_DPM_CONTROL 0 0x4734 5 0 4294967295 DPM_ENABLE 0 0 MCLK_CHANGE_ENABLE 4 4 MCLK_CHANGE_FORCE_ON 8 8 MCLK_CHANGE_WATERMARK_MASK 12 13 MCLK_CHANGE_WATERMARK 16 31 mmDMIFV_PG0_DPGV0_PIPE_DPM_CONTROL 0 0x4734 0 0 4294967295 mmDMIFV_PG1_DPGV0_PIPE_DPM_CONTROL 0 0x9934 0 0 4294967295 mmDPGV1_PIPE_DPM_CONTROL 0 0x4741 5 0 4294967295 DPM_ENABLE 0 0 MCLK_CHANGE_ENABLE 4 4 MCLK_CHANGE_FORCE_ON 8 8 MCLK_CHANGE_WATERMARK_MASK 12 13 MCLK_CHANGE_WATERMARK 16 31 mmDMIFV_PG0_DPGV1_PIPE_DPM_CONTROL 0 0x4741 0 0 4294967295 mmDMIFV_PG1_DPGV1_PIPE_DPM_CONTROL 0 0x9941 0 0 4294967295 mmDPGV0_PIPE_STUTTER_CONTROL 0 0x4735 10 0 4294967295 STUTTER_ENABLE 0 0 STUTTER_IGNORE_CURSOR 4 4 STUTTER_IGNORE_ICON 5 5 STUTTER_IGNORE_VGA 6 6 STUTTER_IGNORE_FBC 7 7 STUTTER_WM_HIGH_FORCE_ON 8 8 STUTTER_WM_HIGH_EXCLUDES_VBLANK 9 9 STUTTER_URGENT_IN_NOT_SELF_REFRESH 10 10 STUTTER_SELF_REFRESH_FORCE_ON 11 11 STUTTER_EXIT_SELF_REFRESH_WATERMARK 16 31 mmDMIFV_PG0_DPGV0_PIPE_STUTTER_CONTROL 0 0x4735 0 0 4294967295 mmDMIFV_PG1_DPGV0_PIPE_STUTTER_CONTROL 0 0x9935 0 0 4294967295 mmDPGV1_PIPE_STUTTER_CONTROL 0 0x4742 10 0 4294967295 STUTTER_ENABLE 0 0 STUTTER_IGNORE_CURSOR 4 4 STUTTER_IGNORE_ICON 5 5 STUTTER_IGNORE_VGA 6 6 STUTTER_IGNORE_FBC 7 7 STUTTER_WM_HIGH_FORCE_ON 8 8 STUTTER_WM_HIGH_EXCLUDES_VBLANK 9 9 STUTTER_URGENT_IN_NOT_SELF_REFRESH 10 10 STUTTER_SELF_REFRESH_FORCE_ON 11 11 STUTTER_EXIT_SELF_REFRESH_WATERMARK 16 31 mmDMIFV_PG0_DPGV1_PIPE_STUTTER_CONTROL 0 0x4742 0 0 4294967295 mmDMIFV_PG1_DPGV1_PIPE_STUTTER_CONTROL 0 0x9942 0 0 4294967295 mmDPGV0_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x4736 6 0 4294967295 NB_PSTATE_CHANGE_ENABLE 0 0 NB_PSTATE_CHANGE_URGENT_DURING_REQUEST 4 4 NB_PSTATE_CHANGE_NOT_SELF_REFRESH_DURING_REQUEST 8 8 NB_PSTATE_CHANGE_FORCE_ON 9 9 NB_PSTATE_ALLOW_FOR_URGENT 10 10 NB_PSTATE_CHANGE_WATERMARK 16 31 mmDMIFV_PG0_DPGV0_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x4736 0 0 4294967295 mmDMIFV_PG1_DPGV0_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x9936 0 0 4294967295 mmDPGV1_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x4743 6 0 4294967295 NB_PSTATE_CHANGE_ENABLE 0 0 NB_PSTATE_CHANGE_URGENT_DURING_REQUEST 4 4 NB_PSTATE_CHANGE_NOT_SELF_REFRESH_DURING_REQUEST 8 8 NB_PSTATE_CHANGE_FORCE_ON 9 9 NB_PSTATE_ALLOW_FOR_URGENT 10 10 NB_PSTATE_CHANGE_WATERMARK 16 31 mmDMIFV_PG0_DPGV1_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x4743 0 0 4294967295 mmDMIFV_PG1_DPGV1_PIPE_NB_PSTATE_CHANGE_CONTROL 0 0x9943 0 0 4294967295 mmDPGV0_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x4737 9 0 4294967295 STUTTER_ENABLE_NONLPTCH 0 0 STUTTER_IGNORE_CURSOR_NONLPTCH 4 4 STUTTER_IGNORE_ICON_NONLPTCH 5 5 STUTTER_IGNORE_VGA_NONLPTCH 6 6 STUTTER_IGNORE_FBC_NONLPTCH 7 7 STUTTER_WM_HIGH_FORCE_ON_NONLPTCH 8 8 STUTTER_WM_HIGH_EXCLUDES_VBLANK_NONLPTCH 9 9 STUTTER_URGENT_IN_NOT_SELF_REFRESH_NONLPTCH 10 10 STUTTER_SELF_REFRESH_FORCE_ON_NONLPTCH 11 11 mmDMIFV_PG0_DPGV0_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x4737 0 0 4294967295 mmDMIFV_PG1_DPGV0_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x9937 0 0 4294967295 mmDPGV1_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x4744 9 0 4294967295 STUTTER_ENABLE_NONLPTCH 0 0 STUTTER_IGNORE_CURSOR_NONLPTCH 4 4 STUTTER_IGNORE_ICON_NONLPTCH 5 5 STUTTER_IGNORE_VGA_NONLPTCH 6 6 STUTTER_IGNORE_FBC_NONLPTCH 7 7 STUTTER_WM_HIGH_FORCE_ON_NONLPTCH 8 8 STUTTER_WM_HIGH_EXCLUDES_VBLANK_NONLPTCH 9 9 STUTTER_URGENT_IN_NOT_SELF_REFRESH_NONLPTCH 10 10 STUTTER_SELF_REFRESH_FORCE_ON_NONLPTCH 11 11 mmDMIFV_PG0_DPGV1_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x4744 0 0 4294967295 mmDMIFV_PG1_DPGV1_PIPE_STUTTER_CONTROL_NONLPTCH 0 0x9944 0 0 4294967295 mmDPGV0_REPEATER_PROGRAM 0 0x4738 2 0 4294967295 REG_DPG_DMIFRC_REPEATER 0 2 REG_DMIFRC_DPG_REPEATER 4 6 mmDMIFV_PG0_DPGV0_REPEATER_PROGRAM 0 0x4738 0 0 4294967295 mmDMIFV_PG1_DPGV0_REPEATER_PROGRAM 0 0x9938 0 0 4294967295 mmDPGV1_REPEATER_PROGRAM 0 0x4745 2 0 4294967295 REG_DPG_DMIFRC_REPEATER 0 2 REG_DMIFRC_DPG_REPEATER 4 6 mmDMIFV_PG0_DPGV1_REPEATER_PROGRAM 0 0x4745 0 0 4294967295 mmDMIFV_PG1_DPGV1_REPEATER_PROGRAM 0 0x9945 0 0 4294967295 mmDPGV0_HW_DEBUG_A 0 0x4739 1 0 4294967295 DPG_HW_DEBUG_A 0 31 mmDMIFV_PG0_DPGV0_HW_DEBUG_A 0 0x4739 0 0 4294967295 mmDMIFV_PG1_DPGV0_HW_DEBUG_A 0 0x9939 0 0 4294967295 mmDPGV1_HW_DEBUG_A 0 0x4746 1 0 4294967295 DPG_HW_DEBUG_A 0 31 mmDMIFV_PG0_DPGV1_HW_DEBUG_A 0 0x4746 0 0 4294967295 mmDMIFV_PG1_DPGV1_HW_DEBUG_A 0 0x9946 0 0 4294967295 mmDPGV0_HW_DEBUG_B 0 0x473a 1 0 4294967295 DPG_HW_DEBUG_B 0 31 mmDMIFV_PG0_DPGV0_HW_DEBUG_B 0 0x473a 0 0 4294967295 mmDMIFV_PG1_DPGV0_HW_DEBUG_B 0 0x993a 0 0 4294967295 mmDPGV1_HW_DEBUG_B 0 0x4747 1 0 4294967295 DPG_HW_DEBUG_B 0 31 mmDMIFV_PG0_DPGV1_HW_DEBUG_B 0 0x4747 0 0 4294967295 mmDMIFV_PG1_DPGV1_HW_DEBUG_B 0 0x9947 0 0 4294967295 mmDPGV0_HW_DEBUG_11 0 0x473b 1 0 4294967295 DPG_HW_DEBUG_11 0 0 mmDMIFV_PG0_DPGV0_HW_DEBUG_11 0 0x473b 0 0 4294967295 mmDMIFV_PG1_DPGV0_HW_DEBUG_11 0 0x993b 0 0 4294967295 mmDPGV1_HW_DEBUG_11 0 0x4748 1 0 4294967295 DPG_HW_DEBUG_11 0 0 mmDMIFV_PG0_DPGV1_HW_DEBUG_11 0 0x4748 0 0 4294967295 mmDMIFV_PG1_DPGV1_HW_DEBUG_11 0 0x9948 0 0 4294967295 mmDPGV0_CHK_PRE_PROC_CNTL 0 0x473c 1 0 4294967295 DPG_DISABLE_DMIF_BUF_CHK 0 0 mmDMIFV_PG0_DPGV0_CHK_PRE_PROC_CNTL 0 0x473c 0 0 4294967295 mmDMIFV_PG1_DPGV0_CHK_PRE_PROC_CNTL 0 0x993c 0 0 4294967295 mmDPGV1_CHK_PRE_PROC_CNTL 0 0x4749 1 0 4294967295 DPG_DISABLE_DMIF_BUF_CHK 0 0 mmDMIFV_PG0_DPGV1_CHK_PRE_PROC_CNTL 0 0x4749 0 0 4294967295 mmDMIFV_PG1_DPGV1_CHK_PRE_PROC_CNTL 0 0x9949 0 0 4294967295 mmDPGV_TEST_DEBUG_INDEX 0 0x474e 2 0 4294967295 DPG_TEST_DEBUG_INDEX 0 7 DPG_TEST_DEBUG_WRITE_EN 8 8 mmDMIFV_PG0_DPGV_TEST_DEBUG_INDEX 0 0x474e 0 0 4294967295 mmDMIFV_PG1_DPGV_TEST_DEBUG_INDEX 0 0x994e 0 0 4294967295 mmDPGV_TEST_DEBUG_DATA 0 0x474f 1 0 4294967295 DPG_TEST_DEBUG_DATA 0 31 mmDMIFV_PG0_DPGV_TEST_DEBUG_DATA 0 0x474f 0 0 4294967295 mmDMIFV_PG1_DPGV_TEST_DEBUG_DATA 0 0x994f 0 0 4294967295 mmAZROOT_IMMEDIATE_COMMAND_OUTPUT_INTERFACE_INDEX 0 0x18 1 0 4294967295 IMMEDIATE_COMMAND_WRITE 0 16 mmAZROOT_IMMEDIATE_COMMAND_OUTPUT_INTERFACE_DATA 0 0x18 1 0 4294967295 IMMEDIATE_COMMAND_WRITE 0 31 ixAZALIA_F2_CODEC_ROOT_PARAMETER_VENDOR_AND_DEVICE_ID 2 0xf00 1 0 4294967295 AZALIA_CODEC_ROOT_PARAMETER_VENDOR_AND_DEVICE_ID 0 31 ixAZALIA_F2_CODEC_ROOT_PARAMETER_REVISION_ID 2 0xf02 1 0 4294967295 AZALIA_CODEC_ROOT_PARAMETER_REVISION_ID 0 31 ixAZALIA_F2_CODEC_ROOT_PARAMETER_SUBORDINATE_NODE_COUNT 2 0xf04 1 0 4294967295 AZALIA_CODEC_ROOT_PARAMETER_SUBORDINATE_NODE_COUNT 0 31 ixAZALIA_F2_CODEC_FUNCTION_PARAMETER_SUBORDINATE_NODE_COUNT 2 0x1f04 1 0 4294967295 AZALIA_CODEC_FUNCTION_PARAMETER_SUBORDINATE_NODE_COUNT 0 31 ixAZALIA_F2_CODEC_FUNCTION_PARAMETER_GROUP_TYPE 2 0x1f05 1 0 4294967295 AZALIA_CODEC_FUNCTION_PARAMETER_GROUP_TYPE 0 31 ixAZALIA_F2_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES 2 0x1f0a 2 0 4294967295 AUDIO_RATE_CAPABILITIES 0 11 AUDIO_BIT_CAPABILITIES 16 20 ixAZALIA_F2_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS 2 0x1f0b 1 0 4294967295 AZALIA_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS 0 31 ixAZALIA_F2_CODEC_FUNCTION_PARAMETER_POWER_STATES 2 0x1f0f 3 0 4294967295 AZALIA_CODEC_FUNCTION_PARAMETER_POWER_STATES 0 29 CLKSTOP 30 30 EPSS 31 31 ixAZALIA_F2_CODEC_FUNCTION_CONTROL_POWER_STATE 2 0x1705 4 0 4294967295 POWER_STATE_SET 0 3 POWER_STATE_ACT 4 7 CLKSTOPOK 9 9 POWER_STATE_SETTINGS_RESET 10 10 ixAZALIA_F2_CODEC_FUNCTION_CONTROL_RESET 2 0x17ff 1 0 4294967295 CODEC_RESET 0 0 ixAZALIA_F2_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID 2 0x1720 4 0 4294967295 SUBSYSTEM_ID_BYTE0 0 7 SUBSYSTEM_ID_BYTE1 8 15 SUBSYSTEM_ID_BYTE2 16 23 SUBSYSTEM_ID_BYTE3 24 31 ixAZALIA_F2_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID_2 2 0x1721 1 0 4294967295 SUBSYSTEM_ID_BYTE1 0 7 ixAZALIA_F2_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID_3 2 0x1722 1 0 4294967295 SUBSYSTEM_ID_BYTE2 0 7 ixAZALIA_F2_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID_4 2 0x1723 1 0 4294967295 SUBSYSTEM_ID_BYTE3 0 7 ixAZALIA_F2_CODEC_FUNCTION_CONTROL_CONVERTER_SYNCHRONIZATION 2 0x1770 1 0 4294967295 CONVERTER_SYNCHRONIZATION 0 6 mmAZALIA_F0_CODEC_ROOT_PARAMETER_VENDOR_AND_DEVICE_ID 0 0x1828 1 0 4294967295 AZALIA_CODEC_ROOT_PARAMETER_VENDOR_AND_DEVICE_ID 0 31 mmAZALIA_F0_CODEC_ROOT_PARAMETER_REVISION_ID 0 0x1829 1 0 4294967295 AZALIA_CODEC_ROOT_PARAMETER_REVISION_ID 0 31 mmAZALIA_F0_CODEC_CHANNEL_COUNT_CONTROL 0 0x182a 2 0 4294967295 HBR_CHANNEL_COUNT 0 2 COMPRESSED_CHANNEL_COUNT 4 6 mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL 0 0x182b 1 0 4294967295 RESYNC_FIFO_STARTUP_KEEPOUT_WINDOW 0 5 mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_GROUP_TYPE 0 0x182c 1 0 4294967295 AZALIA_CODEC_FUNCTION_PARAMETER_GROUP_TYPE 0 31 mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES 0 0x182d 2 0 4294967295 AUDIO_RATE_CAPABILITIES 0 11 AUDIO_BIT_CAPABILITIES 16 20 mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS 0 0x182e 1 0 4294967295 AZALIA_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS 0 31 mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES 0 0x182f 3 0 4294967295 AZALIA_CODEC_FUNCTION_PARAMETER_POWER_STATES 0 29 CLKSTOP 30 30 EPSS 31 31 mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE 0 0x1830 4 0 4294967295 POWER_STATE_SET 0 3 POWER_STATE_ACT 4 7 CLKSTOPOK 9 9 POWER_STATE_SETTINGS_RESET 10 10 mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET 0 0x1831 1 0 4294967295 CODEC_RESET 0 0 mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID 0 0x1832 4 0 4294967295 SUBSYSTEM_ID_BYTE0 0 7 SUBSYSTEM_ID_BYTE1 8 15 SUBSYSTEM_ID_BYTE2 16 23 SUBSYSTEM_ID_BYTE3 24 31 mmAZALIA_F0_CODEC_FUNCTION_CONTROL_CONVERTER_SYNCHRONIZATION 0 0x1833 1 0 4294967295 CONVERTER_SYNCHRONIZATION 0 6 mmCC_RCU_DC_AUDIO_PORT_CONNECTIVITY 0 0x1834 2 0 4294967295 PORT_CONNECTIVITY 0 2 PORT_CONNECTIVITY_OVERRIDE_ENABLE 4 4 mmCC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY 0 0x1835 2 0 4294967295 INPUT_PORT_CONNECTIVITY 0 2 INPUT_PORT_CONNECTIVITY_OVERRIDE_ENABLE 4 4 mmAZALIA_F0_CODEC_DEBUG 0 0x1836 2 0 4294967295 DISABLE_FORMAT_COMPARISON 0 5 CODEC_DEBUG 6 31 mmAZALIA_F0_GTC_GROUP_OFFSET0 0 0x1837 1 0 4294967295 GTC_GROUP_OFFSET0 0 31 mmAZALIA_F0_GTC_GROUP_OFFSET1 0 0x1838 1 0 4294967295 GTC_GROUP_OFFSET1 0 31 mmAZALIA_F0_GTC_GROUP_OFFSET2 0 0x1839 1 0 4294967295 GTC_GROUP_OFFSET2 0 31 mmAZALIA_F0_GTC_GROUP_OFFSET3 0 0x183a 1 0 4294967295 GTC_GROUP_OFFSET3 0 31 mmAZALIA_F0_GTC_GROUP_OFFSET4 0 0x183b 1 0 4294967295 GTC_GROUP_OFFSET4 0 31 mmAZALIA_F0_GTC_GROUP_OFFSET5 0 0x183c 1 0 4294967295 GTC_GROUP_OFFSET5 0 31 mmAZALIA_F0_GTC_GROUP_OFFSET6 0 0x183d 1 0 4294967295 GTC_GROUP_OFFSET6 0 31 mmGLOBAL_CAPABILITIES 0 0x0 5 0 4294967295 SIXTY_FOUR_BIT_ADDRESS_SUPPORTED 0 0 NUMBER_OF_SERIAL_DATA_OUTPUT_SIGNALS 1 2 NUMBER_OF_BIDIRECTIONAL_STREAMS_SUPPORTED 3 7 NUMBER_OF_INPUT_STREAMS_SUPPORTED 8 11 NUMBER_OF_OUTPUT_STREAMS_SUPPORTED 12 15 mmMINOR_VERSION 0 0x0 1 0 4294967295 MINOR_VERSION 0 7 mmMAJOR_VERSION 0 0x0 1 0 4294967295 MAJOR_VERSION 0 7 mmOUTPUT_PAYLOAD_CAPABILITY 0 0x1 1 0 4294967295 OUTPUT_PAYLOAD_CAPABILITY 0 15 mmINPUT_PAYLOAD_CAPABILITY 0 0x1 1 0 4294967295 INPUT_PAYLOAD_CAPABILITY 0 15 mmGLOBAL_CONTROL 0 0x2 3 0 4294967295 CONTROLLER_RESET 0 0 FLUSH_CONTROL 1 1 ACCEPT_UNSOLICITED_RESPONSE_ENABLE 8 8 mmWAKE_ENABLE 0 0x3 1 0 4294967295 SDIN_WAKE_ENABLE_FLAG 0 0 mmSTATE_CHANGE_STATUS 0 0x3 1 0 4294967295 STATE_CHANGE_STATUS 0 0 mmGLOBAL_STATUS 0 0x4 1 0 4294967295 FLUSH_STATUS 1 1 mmOUTPUT_STREAM_PAYLOAD_CAPABILITY 0 0x6 1 0 4294967295 OUTSTRMPAY 0 15 mmINPUT_STREAM_PAYLOAD_CAPABILITY 0 0x6 1 0 4294967295 INSTRMPAY 0 15 mmINTERRUPT_CONTROL 0 0x8 18 0 4294967295 STREAM_0_INTERRUPT_ENABLE 0 0 STREAM_1_INTERRUPT_ENABLE 1 1 STREAM_2_INTERRUPT_ENABLE 2 2 STREAM_3_INTERRUPT_ENABLE 3 3 STREAM_4_INTERRUPT_ENABLE 4 4 STREAM_5_INTERRUPT_ENABLE 5 5 STREAM_6_INTERRUPT_ENABLE 6 6 STREAM_7_INTERRUPT_ENABLE 7 7 STREAM_8_INTERRUPT_ENABLE 8 8 STREAM_9_INTERRUPT_ENABLE 9 9 STREAM_10_INTERRUPT_ENABLE 10 10 STREAM_11_INTERRUPT_ENABLE 11 11 STREAM_12_INTERRUPT_ENABLE 12 12 STREAM_13_INTERRUPT_ENABLE 13 13 STREAM_14_INTERRUPT_ENABLE 14 14 STREAM_15_INTERRUPT_ENABLE 15 15 CONTROLLER_INTERRUPT_ENABLE 30 30 GLOBAL_INTERRUPT_ENABLE 31 31 mmINTERRUPT_STATUS 0 0x9 18 0 4294967295 STREAM_0_INTERRUPT_STATUS 0 0 STREAM_1_INTERRUPT_STATUS 1 1 STREAM_2_INTERRUPT_STATUS 2 2 STREAM_3_INTERRUPT_STATUS 3 3 STREAM_4_INTERRUPT_STATUS 4 4 STREAM_5_INTERRUPT_STATUS 5 5 STREAM_6_INTERRUPT_STATUS 6 6 STREAM_7_INTERRUPT_STATUS 7 7 STREAM_8_INTERRUPT_STATUS 8 8 STREAM_9_INTERRUPT_STATUS 9 9 STREAM_10_INTERRUPT_STATUS 10 10 STREAM_11_INTERRUPT_STATUS 11 11 STREAM_12_INTERRUPT_STATUS 12 12 STREAM_13_INTERRUPT_STATUS 13 13 STREAM_14_INTERRUPT_STATUS 14 14 STREAM_15_INTERRUPT_STATUS 15 15 CONTROLLER_INTERRUPT_STATUS 30 30 GLOBAL_INTERRUPT_STATUS 31 31 mmWALL_CLOCK_COUNTER 0 0xc 1 0 4294967295 WALL_CLOCK_COUNTER 0 31 mmSTREAM_SYNCHRONIZATION 0 0xe 16 0 4294967295 STREAM_0_SYNCHRONIZATION 0 0 STREAM_1_SYNCHRONIZATION 1 1 STREAM_2_SYNCHRONIZATION 2 2 STREAM_3_SYNCHRONIZATION 3 3 STREAM_4_SYNCHRONIZATION 4 4 STREAM_5_SYNCHRONIZATION 5 5 STREAM_6_SYNCHRONIZATION 6 6 STREAM_7_SYNCHRONIZATION 7 7 STREAM_8_SYNCHRONIZATION 8 8 STREAM_9_SYNCHRONIZATION 9 9 STREAM_10_SYNCHRONIZATION 10 10 STREAM_11_SYNCHRONIZATION 11 11 STREAM_12_SYNCHRONIZATION 12 12 STREAM_13_SYNCHRONIZATION 13 13 STREAM_14_SYNCHRONIZATION 14 14 STREAM_15_SYNCHRONIZATION 15 15 mmCORB_LOWER_BASE_ADDRESS 0 0x10 2 0 4294967295 CORB_LOWER_BASE_UNIMPLEMENTED_BITS 0 6 CORB_LOWER_BASE_ADDRESS 7 31 mmCORB_UPPER_BASE_ADDRESS 0 0x11 1 0 4294967295 CORB_UPPER_BASE_ADDRESS 0 31 mmCORB_WRITE_POINTER 0 0x12 1 0 4294967295 CORB_WRITE_POINTER 0 7 mmCORB_READ_POINTER 0 0x12 2 0 4294967295 CORB_READ_POINTER 0 7 CORB_READ_POINTER_RESET 15 15 mmCORB_CONTROL 0 0x13 2 0 4294967295 CORB_MEMORY_ERROR_INTERRUPT_ENABLE 0 0 ENABLE_CORB_DMA_ENGINE 1 1 mmCORB_STATUS 0 0x13 1 0 4294967295 CORB_MEMORY_ERROR_INDICATION 0 0 mmCORB_SIZE 0 0x13 2 0 4294967295 CORB_SIZE 0 1 CORB_SIZE_CAPABILITY 4 7 mmRIRB_LOWER_BASE_ADDRESS 0 0x14 2 0 4294967295 RIRB_LOWER_BASE_UNIMPLEMENTED_BITS 0 6 RIRB_LOWER_BASE_ADDRESS 7 31 mmRIRB_UPPER_BASE_ADDRESS 0 0x15 1 0 4294967295 RIRB_UPPER_BASE_ADDRESS 0 31 mmRIRB_WRITE_POINTER 0 0x16 2 0 4294967295 RIRB_WRITE_POINTER 0 7 RIRB_WRITE_POINTER_RESET 15 15 mmRESPONSE_INTERRUPT_COUNT 0 0x16 1 0 4294967295 N_RESPONSE_INTERRUPT_COUNT 0 7 mmRIRB_CONTROL 0 0x17 3 0 4294967295 RESPONSE_INTERRUPT_CONTROL 0 0 RIRB_DMA_ENABLE 1 1 RESPONSE_OVERRUN_INTERRUPT_CONTROL 2 2 mmRIRB_STATUS 0 0x17 2 0 4294967295 RESPONSE_INTERRUPT 0 0 RESPONSE_OVERRUN_INTERRUPT_STATUS 2 2 mmRIRB_SIZE 0 0x17 2 0 4294967295 RIRB_SIZE 0 1 RIRB_SIZE_CAPABILITY 4 7 mmIMMEDIATE_COMMAND_OUTPUT_INTERFACE 0 0x18 2 0 4294967295 IMMEDIATE_COMMAND_WRITE_VERB_AND_PAYLOAD 0 27 IMMEDIATE_COMMAND_WRITE_CODEC_ADDRESS 28 31 mmIMMEDIATE_COMMAND_OUTPUT_INTERFACE_INDEX 0 0x18 1 0 4294967295 IMMEDIATE_COMMAND_WRITE 0 15 mmIMMEDIATE_COMMAND_OUTPUT_INTERFACE_DATA 0 0x18 1 0 4294967295 IMMEDIATE_COMMAND_WRITE 0 31 mmIMMEDIATE_RESPONSE_INPUT_INTERFACE 0 0x19 1 0 4294967295 IMMEDIATE_RESPONSE_READ 0 31 mmIMMEDIATE_COMMAND_STATUS 0 0x1a 2 0 4294967295 IMMEDIATE_COMMAND_BUSY 0 0 IMMEDIATE_RESULT_VALID 1 1 mmDMA_POSITION_LOWER_BASE_ADDRESS 0 0x1c 3 0 4294967295 DMA_POSITION_BUFFER_ENABLE 0 0 DMA_POSITION_LOWER_BASE_UNIMPLEMENTED_BITS 1 6 DMA_POSITION_LOWER_BASE_ADDRESS 7 31 mmDMA_POSITION_UPPER_BASE_ADDRESS 0 0x1d 1 0 4294967295 DMA_POSITION_UPPER_BASE_ADDRESS 0 31 mmWALL_CLOCK_COUNTER_ALIAS 0 0x80c 1 0 4294967295 WALL_CLOCK_COUNTER_ALIAS 0 31 mmOUTPUT_STREAM_DESCRIPTOR_CONTROL_AND_STATUS 0 0x20 12 0 4294967295 STREAM_RESET 0 0 STREAM_RUN 1 1 INTERRUPT_ON_COMPLETION_ENABLE 2 2 FIFO_ERROR_INTERRUPT_ENABLE 3 3 DESCRIPTOR_ERROR_INTERRUPT_ENABLE 4 4 STRIPE_CONTROL 16 17 TRAFFIC_PRIORITY 18 18 STREAM_NUMBER 20 23 BUFFER_COMPLETION_INTERRUPT_STATUS 26 26 FIFO_ERROR 27 27 DESCRIPTOR_ERROR 28 28 FIFO_READY 29 29 mmOUTPUT_STREAM_DESCRIPTOR_LINK_POSITION_IN_CURRENT_BUFFER 0 0x21 1 0 4294967295 LINK_POSITION_IN_BUFFER 0 31 mmOUTPUT_STREAM_DESCRIPTOR_CYCLIC_BUFFER_LENGTH 0 0x22 1 0 4294967295 CYCLIC_BUFFER_LENGTH 0 31 mmOUTPUT_STREAM_DESCRIPTOR_LAST_VALID_INDEX 0 0x23 1 0 4294967295 LAST_VALID_INDEX 0 7 mmOUTPUT_STREAM_DESCRIPTOR_FIFO_SIZE 0 0x24 1 0 4294967295 FIFO_SIZE 0 15 mmOUTPUT_STREAM_DESCRIPTOR_FORMAT 0 0x24 5 0 4294967295 NUMBER_OF_CHANNELS 0 3 BITS_PER_SAMPLE 4 6 SAMPLE_BASE_DIVISOR 8 10 SAMPLE_BASE_MULTIPLE 11 13 SAMPLE_BASE_RATE 14 14 mmOUTPUT_STREAM_DESCRIPTOR_BDL_POINTER_LOWER_BASE_ADDRESS 0 0x26 2 0 4294967295 BUFFER_DESCRIPTOR_LIST_LOWER_BASE_ADDRESS_UNIMPLEMENTED_BITS 0 6 BUFFER_DESCRIPTOR_LIST_LOWER_BASE_ADDRESS 7 31 mmOUTPUT_STREAM_DESCRIPTOR_BDL_POINTER_UPPER_BASE_ADDRESS 0 0x27 1 0 4294967295 BUFFER_DESCRIPTOR_LIST_UPPER_BASE_ADDRESS 0 31 mmOUTPUT_STREAM_DESCRIPTOR_LINK_POSITION_IN_CURRENT_BUFFER_ALIAS 0 0x821 1 0 4294967295 LINK_POSITION_IN_BUFFER_ALIAS 0 31 mmAZENDPOINT_IMMEDIATE_COMMAND_OUTPUT_INTERFACE_INDEX 0 0x18 1 0 4294967295 IMMEDIATE_COMMAND_WRITE 0 16 mmAZENDPOINT_IMMEDIATE_COMMAND_OUTPUT_INTERFACE_DATA 0 0x18 1 0 4294967295 IMMEDIATE_COMMAND_WRITE 0 31 ixAZALIA_F2_CODEC_CONVERTER_PARAMETER_AUDIO_WIDGET_CAPABILITIES 2 0x2f09 14 0 4294967295 AUDIO_CHANNEL_CAPABILITIES 0 0 INPUT_AMPLIFIER_PRESENT 1 1 OUTPUT_AMPLIFIER_PRESENT 2 2 AMPLIFIER_PARAMETER_OVERRIDE 3 3 FORMAT_OVERRIDE 4 4 STRIPE 5 5 PROCESSING_WIDGET 6 6 UNSOLICITED_RESPONSE_CAPABILITY 7 7 CONNECTION_LIST 8 8 DIGITAL 9 9 POWER_CONTROL 10 10 LR_SWAP 11 11 AUDIO_WIDGET_CAPABILITIES_DELAY 16 19 TYPE 20 23 ixAZALIA_F2_CODEC_CONVERTER_PARAMETER_SUPPORTED_SIZE_RATES 2 0x2f0a 2 0 4294967295 AUDIO_RATE_CAPABILITIES 0 11 AUDIO_BIT_CAPABILITIES 16 20 ixAZALIA_F2_CODEC_CONVERTER_PARAMETER_STREAM_FORMATS 2 0x2f0b 1 0 4294967295 STREAM_FORMATS 0 31 ixAZALIA_F2_CODEC_CONVERTER_CONTROL_CONVERTER_FORMAT 2 0x2200 7 0 4294967295 NUMBER_OF_CHANNELS 0 3 BITS_PER_SAMPLE 4 6 SAMPLE_BASE_DIVISOR 8 10 SAMPLE_BASE_MULTIPLE 11 13 SAMPLE_BASE_RATE 14 14 STREAM_TYPE 15 15 STREAM_TYPE_R 15 15 ixAZALIA_F2_CODEC_CONVERTER_CONTROL_CHANNEL_STREAM_ID 2 0x2706 2 0 4294967295 CHANNEL_ID 0 3 STREAM_ID 4 7 ixAZALIA_F2_CODEC_CONVERTER_CONTROL_DIGITAL_CONVERTER 2 0x270d 10 0 4294967295 DIGEN 0 0 V 1 1 VCFG 2 2 PRE 3 3 COPY 4 4 NON_AUDIO 5 5 PRO 6 6 L 7 7 CC 8 14 KEEPALIVE 23 23 ixAZALIA_F2_CODEC_CONVERTER_CONTROL_DIGITAL_CONVERTER_2 2 0x270e 1 0 4294967295 CC 0 6 ixAZALIA_F2_CODEC_CONVERTER_CONTROL_DIGITAL_CONVERTER_3 2 0x273e 1 0 4294967295 KEEPALIVE 7 7 ixAZALIA_F2_CODEC_CONVERTER_STRIPE_CONTROL 2 0x2724 2 0 4294967295 STRIPE_CONTROL 0 1 STRIPE_CAPABILITY 20 22 ixAZALIA_F2_CODEC_CONVERTER_CONTROL_RAMP_RATE 2 0x2770 1 0 4294967295 RAMP_RATE 0 7 ixAZALIA_F2_CODEC_CONVERTER_CONTROL_GTC_EMBEDDING 2 0x2771 3 0 4294967295 PRESENTATION_TIME_EMBEDDING_ENABLE 0 0 PRESENTATION_TIME_OFFSET_CHANGED 1 1 PRESENTATION_TIME_EMBEDDING_GROUP 4 6 ixAZALIA_F2_CODEC_PIN_PARAMETER_AUDIO_WIDGET_CAPABILITIES 2 0x3f09 13 0 4294967295 AUDIO_CHANNEL_CAPABILITIES 0 0 INPUT_AMPLIFIER_PRESENT 1 1 OUTPUT_AMPLIFIER_PRESENT 2 2 AMPLIFIER_PARAMETER_OVERRIDE 3 3 STRIPE 5 5 PROCESSING_WIDGET 6 6 UNSOLICITED_RESPONSE_CAPABILITY 7 7 CONNECTION_LIST 8 8 DIGITAL 9 9 POWER_CONTROL 10 10 LR_SWAP 11 11 AUDIO_WIDGET_CAPABILITIES_DELAY 16 19 TYPE 20 23 ixAZALIA_F2_CODEC_PIN_PARAMETER_CAPABILITIES 2 0x3f0c 11 0 4294967295 IMPEDANCE_SENSE_CAPABLE 0 0 TRIGGER_REQUIRED 1 1 JACK_DETECTION_CAPABILITY 2 2 HEADPHONE_DRIVE_CAPABLE 3 3 OUTPUT_CAPABLE 4 4 INPUT_CAPABLE 5 5 BALANCED_I_O_PINS 6 6 HDMI 7 7 VREF_CONTROL 8 15 EAPD_CAPABLE 16 16 DP 24 24 ixAZALIA_F2_CODEC_PIN_PARAMETER_CONNECTION_LIST_LENGTH 2 0x3f0e 1 0 4294967295 CONNECTION_LIST_LENGTH 0 31 ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_CONNECTION_LIST_ENTRY 2 0x3702 1 0 4294967295 CONNECTION_LIST_ENTRY 0 31 ixAZALIA_F2_CODEC_PIN_CONTROL_WIDGET_CONTROL 2 0x3707 1 0 4294967295 OUT_ENABLE 6 6 ixAZALIA_F2_CODEC_PIN_CONTROL_UNSOLICITED_RESPONSE 2 0x3708 2 0 4294967295 TAG 0 5 ENABLE 7 7 ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE 2 0x3709 2 0 4294967295 IMPEDANCE_SENSE 0 30 PRESENCE_DETECT 31 31 ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT 2 0x371c 8 0 4294967295 SEQUENCE 0 3 DEFAULT_ASSOCIATION 4 7 MISC 8 11 COLOR 12 15 CONNECTION_TYPE 16 19 DEFAULT_DEVICE 20 23 LOCATION 24 29 PORT_CONNECTIVITY 30 31 ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT_2 2 0x371d 2 0 4294967295 MISC 0 3 COLOR 4 7 ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT_3 2 0x371e 2 0 4294967295 CONNECTION_TYPE 0 3 DEFAULT_DEVICE 4 7 ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT_4 2 0x371f 2 0 4294967295 LOCATION 0 5 PORT_CONNECTIVITY 6 7 ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_SPEAKER_ALLOCATION 2 0x3770 4 0 4294967295 SPEAKER_ALLOCATION 0 6 HDMI_CONNECTION 8 8 DP_CONNECTION 9 9 EXTRA_CONNECTION_INFO 10 15 ixAZALIA_F2_CODEC_PIN_CONTROL_CHANNEL_ALLOCATION 2 0x3771 1 0 4294967295 CHANNEL_ALLOCATION 0 7 ixAZALIA_F2_CODEC_PIN_CONTROL_DOWN_MIX_INFO 2 0x3772 3 0 4294967295 LFE_PLAYBACK_LEVEL 0 1 LEVEL_SHIFT 3 6 DOWN_MIX_INHIBIT 7 7 ixAZALIA_F2_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR 2 0x3776 5 0 4294967295 MAX_CHANNELS 0 2 FORMAT_CODE 3 6 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAZALIA_F2_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR_DATA 2 0x3776 1 0 4294967295 DESCRIPTOR 0 31 ixAUDIO_DESCRIPTOR0 2 0x1 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR1 2 0x2 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR2 2 0x3 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR3 2 0x4 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR4 2 0x5 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR5 2 0x6 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR6 2 0x7 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR7 2 0x8 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR8 2 0x9 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR9 2 0xa 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR10 2 0xb 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR11 2 0xc 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR12 2 0xd 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAUDIO_DESCRIPTOR13 2 0xe 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL01_ENABLE 2 0x3777 3 0 4294967295 MULTICHANNEL01_ENABLE 0 0 MULTICHANNEL01_MUTE 1 1 MULTICHANNEL01_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL23_ENABLE 2 0x3778 3 0 4294967295 MULTICHANNEL23_ENABLE 0 0 MULTICHANNEL23_MUTE 1 1 MULTICHANNEL23_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE 2 0x3779 3 0 4294967295 MULTICHANNEL45_ENABLE 0 0 MULTICHANNEL45_MUTE 1 1 MULTICHANNEL45_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE 2 0x377a 3 0 4294967295 MULTICHANNEL67_ENABLE 0 0 MULTICHANNEL67_MUTE 1 1 MULTICHANNEL67_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_PIN_CONTROL_LIPSYNC 2 0x377b 2 0 4294967295 VIDEO_LIPSYNC 0 7 AUDIO_LIPSYNC 8 15 ixAZALIA_F2_CODEC_PIN_CONTROL_HBR 2 0x377c 2 0 4294967295 HBR_CAPABLE 0 0 HBR_ENABLE 4 4 ixAZALIA_F2_CODEC_PIN_CONTROL_AUDIO_SINK_INFO_INDEX 2 0x3780 1 0 4294967295 SINK_INFO_INDEX 0 7 ixAZALIA_F2_CODEC_PIN_CONTROL_AUDIO_SINK_INFO_DATA 2 0x3781 1 0 4294967295 SINK_DATA 0 31 ixAZALIA_F2_CODEC_PIN_CONTROL_MANUFACTURER_ID 2 0x0 1 0 4294967295 MANUFACTURER_ID 0 15 ixAZALIA_F2_CODEC_PIN_CONTROL_PRODUCT_ID 2 0x1 1 0 4294967295 PRODUCT_ID 0 15 ixAZALIA_F2_CODEC_PIN_CONTROL_SINK_DESCRIPTION_LEN 2 0x2 1 0 4294967295 SINK_DESCRIPTION_LEN 0 7 ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 2 0x3 1 0 4294967295 PORTID 0 31 ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 2 0x4 1 0 4294967295 PORTID 0 31 ixSINK_DESCRIPTION0 2 0x5 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION1 2 0x6 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION2 2 0x7 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION3 2 0x8 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION4 2 0x9 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION5 2 0xa 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION6 2 0xb 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION7 2 0xc 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION8 2 0xd 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION9 2 0xe 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION10 2 0xf 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION11 2 0x10 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION12 2 0x11 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION13 2 0x12 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION14 2 0x13 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION15 2 0x14 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION16 2 0x15 1 0 4294967295 DESCRIPTION 0 7 ixSINK_DESCRIPTION17 2 0x16 1 0 4294967295 DESCRIPTION 0 7 ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL1_ENABLE 2 0x3785 3 0 4294967295 MULTICHANNEL1_ENABLE 0 0 MULTICHANNEL1_MUTE 1 1 MULTICHANNEL1_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL3_ENABLE 2 0x3786 3 0 4294967295 MULTICHANNEL3_ENABLE 0 0 MULTICHANNEL3_MUTE 1 1 MULTICHANNEL3_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL5_ENABLE 2 0x3787 3 0 4294967295 MULTICHANNEL5_ENABLE 0 0 MULTICHANNEL5_MUTE 1 1 MULTICHANNEL5_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE 2 0x3788 3 0 4294967295 MULTICHANNEL7_ENABLE 0 0 MULTICHANNEL7_MUTE 1 1 MULTICHANNEL7_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL_MODE 2 0x3789 1 0 4294967295 MULTICHANNEL_MODE 0 0 ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_0 2 0x378a 2 0 4294967295 IEC_60958_CS_MODE 0 1 IEC_60958_CS_SOURCE_NUMBER 2 5 ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_1 2 0x378b 4 0 4294967295 IEC_60958_CS_CLOCK_ACCURACY 0 1 IEC_60958_CS_CLOCK_ACCURACY_OVRRD_EN 2 2 IEC_60958_CS_WORD_LENGTH 3 6 IEC_60958_CS_WORD_LENGTH_OVRRD_EN 7 7 ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_2 2 0x378c 2 0 4294967295 IEC_60958_CS_SAMPLING_FREQUENCY 0 5 IEC_60958_CS_SAMPLING_FREQUENCY_OVRRD_EN 6 6 ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_3 2 0x378d 2 0 4294967295 IEC_60958_CS_ORIGINAL_SAMPLING_FREQUENCY 0 3 IEC_60958_CS_ORIGINAL_SAMPLING_FREQUENCY_OVRRD_EN 4 4 ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_4 2 0x378e 4 0 4294967295 IEC_60958_CS_SAMPLING_FREQUENCY_COEFF 0 3 IEC_60958_CS_MPEG_SURROUND_INFO 4 4 IEC_60958_CS_CGMS_A 5 6 IEC_60958_CS_CGMS_A_VALID 7 7 ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_5 2 0x378f 2 0 4294967295 IEC_60958_CS_CHANNEL_NUMBER_L 0 3 IEC_60958_CS_CHANNEL_NUMBER_R 4 7 ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_6 2 0x3790 2 0 4294967295 IEC_60958_CS_CHANNEL_NUMBER_2 0 3 IEC_60958_CS_CHANNEL_NUMBER_3 4 7 ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_7 2 0x3791 2 0 4294967295 IEC_60958_CS_CHANNEL_NUMBER_4 0 3 IEC_60958_CS_CHANNEL_NUMBER_5 4 7 ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_8 2 0x3792 2 0 4294967295 IEC_60958_CS_CHANNEL_NUMBER_6 0 3 IEC_60958_CS_CHANNEL_NUMBER_7 4 7 ixAZALIA_F2_CODEC_PIN_ASSOCIATION_INFO 2 0x3793 1 0 4294967295 ASSOCIATION_INFO 0 31 ixAZALIA_F2_CODEC_PIN_CONTROL_DIGITAL_OUTPUT_STATUS 2 0x3797 1 0 4294967295 OUTPUT_ACTIVE 0 0 ixAZALIA_F2_CODEC_PIN_CONTROL_LPIB_SNAPSHOT_CONTROL 2 0x3798 2 0 4294967295 LPIB_SNAPSHOT_LOCK 0 0 CYCLIC_BUFFER_WRAP_COUNT 8 15 ixAZALIA_F2_CODEC_PIN_CONTROL_LPIB 2 0x3799 1 0 4294967295 LPIB 0 31 ixAZALIA_F2_CODEC_PIN_CONTROL_LPIB_TIMER_SNAPSHOT 2 0x379a 1 0 4294967295 LPIB_TIMER_SNAPSHOT 0 31 ixAZALIA_F2_CODEC_PIN_CONTROL_CODING_TYPE 2 0x379b 1 0 4294967295 CODING_TYPE 0 7 ixAZALIA_F2_CODEC_PIN_CONTROL_FORMAT_CHANGED 2 0x379c 4 0 4294967295 FORMAT_CHANGED 0 0 FORMAT_CHANGED_ACK_UR_ENABLE 1 1 FORMAT_CHANGE_REASON 8 15 FORMAT_CHANGE_RESPONSE 16 23 ixAZALIA_F2_CODEC_PIN_CONTROL_WIRELESS_DISPLAY_IDENTIFICATION 2 0x379d 1 0 4294967295 WIRELESS_DISPLAY_IDENTIFICATION 0 1 ixAZALIA_F2_CODEC_PIN_CONTROL_REMOTE_KEEPALIVE 2 0x379e 2 0 4294967295 REMOTE_KEEP_ALIVE_ENABLE 0 0 REMOTE_KEEP_ALIVE_CAPABILITY 4 4 mmAZALIA_CONTROLLER_CLOCK_GATING 0 0x17e4 2 0 4294967295 ENABLE_CLOCK_GATING 0 0 CLOCK_ON_STATE 4 4 mmAZALIA_AUDIO_DTO 0 0x17e5 2 0 4294967295 AZALIA_AUDIO_DTO_PHASE 0 15 AZALIA_AUDIO_DTO_MODULE 16 31 mmAZALIA_AUDIO_DTO_CONTROL 0 0x17e6 1 0 4294967295 AZALIA_AUDIO_FORCE_DTO 8 9 mmAZALIA_SCLK_CONTROL 0 0x17e7 1 0 4294967295 AUDIO_SCLK_CONTROL 4 5 mmAZALIA_UNDERFLOW_FILLER_SAMPLE 0 0x17e8 1 0 4294967295 AZALIA_UNDERFLOW_FILLER_SAMPLE 0 31 mmAZALIA_DATA_DMA_CONTROL 0 0x17e9 6 0 4294967295 DATA_DMA_NON_SNOOP 0 1 INPUT_DATA_DMA_NON_SNOOP 2 3 DATA_DMA_ISOCHRONOUS 4 5 INPUT_DATA_DMA_ISOCHRONOUS 6 7 AZALIA_IOC_GENERATION_METHOD 16 16 AZALIA_UNDERFLOW_CONTROL 17 17 mmAZALIA_BDL_DMA_CONTROL 0 0x17ea 4 0 4294967295 BDL_DMA_NON_SNOOP 0 1 INPUT_BDL_DMA_NON_SNOOP 2 3 BDL_DMA_ISOCHRONOUS 4 5 INPUT_BDL_DMA_ISOCHRONOUS 6 7 mmAZALIA_RIRB_AND_DP_CONTROL 0 0x17eb 3 0 4294967295 RIRB_NON_SNOOP 0 0 DP_DMA_NON_SNOOP 4 4 DP_UPDATE_FREQ_DIVIDER 5 8 mmAZALIA_CORB_DMA_CONTROL 0 0x17ec 2 0 4294967295 CORB_DMA_NON_SNOOP 0 0 CORB_DMA_ISOCHRONOUS 4 4 mmAZALIA_APPLICATION_POSITION_IN_CYCLIC_BUFFER 0 0x17f3 1 0 4294967295 APPLICATION_POSITION_IN_CYCLIC_BUFFER 0 31 mmAZALIA_CYCLIC_BUFFER_SYNC 0 0x17f4 1 0 4294967295 CYCLIC_BUFFER_SYNC_ENABLE 0 0 mmAZALIA_GLOBAL_CAPABILITIES 0 0x17f5 1 0 4294967295 NUMBER_OF_SERIAL_DATA_OUTPUT_SIGNALS 1 2 mmAZALIA_OUTPUT_PAYLOAD_CAPABILITY 0 0x17f6 2 0 4294967295 OUTPUT_PAYLOAD_CAPABILITY 0 15 OUTSTRMPAY 16 31 mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL 0 0x17f7 3 0 4294967295 LATENCY_HIDING_LEVEL 0 7 SYS_MEM_ACTIVE_ENABLE 8 8 INPUT_LATENCY_HIDING_LEVEL 16 23 mmAZALIA_INPUT_PAYLOAD_CAPABILITY 0 0x17f8 2 0 4294967295 INPUT_PAYLOAD_CAPABILITY 0 15 INSTRMPAY 16 31 mmAZALIA_CONTROLLER_DEBUG 0 0x17f9 1 0 4294967295 CONTROLLER_DEBUG 0 31 mmAZALIA_MEM_PWR_CTRL 0 0x1810 15 0 4294967295 AZ_MEM_PWR_FORCE 0 1 AZ_MEM_PWR_DIS 2 2 AZ_INPUT_STREAM0_MEM_PWR_FORCE 3 4 AZ_INPUT_STREAM0_MEM_PWR_DIS 5 5 AZ_INPUT_STREAM1_MEM_PWR_FORCE 6 7 AZ_INPUT_STREAM1_MEM_PWR_DIS 8 8 AZ_INPUT_STREAM2_MEM_PWR_FORCE 9 10 AZ_INPUT_STREAM2_MEM_PWR_DIS 11 11 AZ_INPUT_STREAM3_MEM_PWR_FORCE 12 13 AZ_INPUT_STREAM3_MEM_PWR_DIS 14 14 AZ_INPUT_STREAM4_MEM_PWR_FORCE 15 16 AZ_INPUT_STREAM4_MEM_PWR_DIS 17 17 AZ_INPUT_STREAM5_MEM_PWR_FORCE 18 19 AZ_INPUT_STREAM5_MEM_PWR_DIS 20 20 AZ_MEM_PWR_MODE_SEL 28 29 mmAZALIA_MEM_PWR_STATUS 0 0x1811 7 0 4294967295 AZ_MEM_PWR_STATE 0 1 AZ_INPUT_STREAM0_MEM_PWR_STATE 2 3 AZ_INPUT_STREAM1_MEM_PWR_STATE 4 5 AZ_INPUT_STREAM2_MEM_PWR_STATE 6 7 AZ_INPUT_STREAM3_MEM_PWR_STATE 8 9 AZ_INPUT_STREAM4_MEM_PWR_STATE 10 11 AZ_INPUT_STREAM5_MEM_PWR_STATE 12 13 mmDCI_PG_DEBUG_CONFIG 0 0x1812 1 0 4294967295 DCI_PG_DBG_EN 0 0 mmAZALIA_INPUT_CRC0_CONTROL0 0 0x17fb 3 0 4294967295 INPUT_CRC_EN 0 0 INPUT_CRC_BLOCK_MODE 4 4 INPUT_CRC_INSTANCE_SEL 8 10 mmAZALIA_INPUT_CRC0_CONTROL1 0 0x17fc 1 0 4294967295 INPUT_CRC_BLOCK_SIZE 0 31 mmAZALIA_INPUT_CRC0_CONTROL2 0 0x17fd 1 0 4294967295 INPUT_CRC_BLOCK_ITERATION 0 15 mmAZALIA_INPUT_CRC0_CONTROL3 0 0x17fe 3 0 4294967295 INPUT_CRC_COMPLETE 0 0 INPUT_CRC_BLOCK_COMPLETE_PHASE 4 4 INPUT_CRC_CHANNEL_RESULT_SEL 8 10 mmAZALIA_INPUT_CRC0_RESULT 0 0x17ff 1 0 4294967295 INPUT_CRC_RESULT 0 31 ixAZALIA_INPUT_CRC0_CHANNEL0 2 0x0 1 0 4294967295 INPUT_CRC_CHANNEL0 0 31 ixAZALIA_INPUT_CRC0_CHANNEL1 2 0x1 1 0 4294967295 INPUT_CRC_CHANNEL1 0 31 ixAZALIA_INPUT_CRC0_CHANNEL2 2 0x2 1 0 4294967295 INPUT_CRC_CHANNEL2 0 31 ixAZALIA_INPUT_CRC0_CHANNEL3 2 0x3 1 0 4294967295 INPUT_CRC_CHANNEL3 0 31 ixAZALIA_INPUT_CRC0_CHANNEL4 2 0x4 1 0 4294967295 INPUT_CRC_CHANNEL4 0 31 ixAZALIA_INPUT_CRC0_CHANNEL5 2 0x5 1 0 4294967295 INPUT_CRC_CHANNEL5 0 31 ixAZALIA_INPUT_CRC0_CHANNEL6 2 0x6 1 0 4294967295 INPUT_CRC_CHANNEL6 0 31 ixAZALIA_INPUT_CRC0_CHANNEL7 2 0x7 1 0 4294967295 INPUT_CRC_CHANNEL7 0 31 mmAZALIA_INPUT_CRC1_CONTROL0 0 0x1800 3 0 4294967295 INPUT_CRC_EN 0 0 INPUT_CRC_BLOCK_MODE 4 4 INPUT_CRC_INSTANCE_SEL 8 10 mmAZALIA_INPUT_CRC1_CONTROL1 0 0x1801 1 0 4294967295 INPUT_CRC_BLOCK_SIZE 0 31 mmAZALIA_INPUT_CRC1_CONTROL2 0 0x1802 1 0 4294967295 INPUT_CRC_BLOCK_ITERATION 0 15 mmAZALIA_INPUT_CRC1_CONTROL3 0 0x1803 3 0 4294967295 INPUT_CRC_COMPLETE 0 0 INPUT_CRC_BLOCK_COMPLETE_PHASE 4 4 INPUT_CRC_CHANNEL_RESULT_SEL 8 10 mmAZALIA_INPUT_CRC1_RESULT 0 0x1804 1 0 4294967295 INPUT_CRC_RESULT 0 31 ixAZALIA_INPUT_CRC1_CHANNEL0 2 0x0 1 0 4294967295 INPUT_CRC_CHANNEL0 0 31 ixAZALIA_INPUT_CRC1_CHANNEL1 2 0x1 1 0 4294967295 INPUT_CRC_CHANNEL1 0 31 ixAZALIA_INPUT_CRC1_CHANNEL2 2 0x2 1 0 4294967295 INPUT_CRC_CHANNEL2 0 31 ixAZALIA_INPUT_CRC1_CHANNEL3 2 0x3 1 0 4294967295 INPUT_CRC_CHANNEL3 0 31 ixAZALIA_INPUT_CRC1_CHANNEL4 2 0x4 1 0 4294967295 INPUT_CRC_CHANNEL4 0 31 ixAZALIA_INPUT_CRC1_CHANNEL5 2 0x5 1 0 4294967295 INPUT_CRC_CHANNEL5 0 31 ixAZALIA_INPUT_CRC1_CHANNEL6 2 0x6 1 0 4294967295 INPUT_CRC_CHANNEL6 0 31 ixAZALIA_INPUT_CRC1_CHANNEL7 2 0x7 1 0 4294967295 INPUT_CRC_CHANNEL7 0 31 mmAZALIA_CRC0_CONTROL0 0 0x1805 4 0 4294967295 CRC_EN 0 0 CRC_BLOCK_MODE 4 4 CRC_INSTANCE_SEL 8 10 CRC_SOURCE_SEL 12 12 mmAZALIA_CRC0_CONTROL1 0 0x1806 1 0 4294967295 CRC_BLOCK_SIZE 0 31 mmAZALIA_CRC0_CONTROL2 0 0x1807 1 0 4294967295 CRC_BLOCK_ITERATION 0 15 mmAZALIA_CRC0_CONTROL3 0 0x1808 3 0 4294967295 CRC_COMPLETE 0 0 CRC_BLOCK_COMPLETE_PHASE 4 4 CRC_CHANNEL_RESULT_SEL 8 10 mmAZALIA_CRC0_RESULT 0 0x1809 1 0 4294967295 CRC_RESULT 0 31 ixAZALIA_CRC0_CHANNEL0 2 0x0 1 0 4294967295 CRC_CHANNEL0 0 31 ixAZALIA_CRC0_CHANNEL1 2 0x1 1 0 4294967295 CRC_CHANNEL1 0 31 ixAZALIA_CRC0_CHANNEL2 2 0x2 1 0 4294967295 CRC_CHANNEL2 0 31 ixAZALIA_CRC0_CHANNEL3 2 0x3 1 0 4294967295 CRC_CHANNEL3 0 31 ixAZALIA_CRC0_CHANNEL4 2 0x4 1 0 4294967295 CRC_CHANNEL4 0 31 ixAZALIA_CRC0_CHANNEL5 2 0x5 1 0 4294967295 CRC_CHANNEL5 0 31 ixAZALIA_CRC0_CHANNEL6 2 0x6 1 0 4294967295 CRC_CHANNEL6 0 31 ixAZALIA_CRC0_CHANNEL7 2 0x7 1 0 4294967295 CRC_CHANNEL7 0 31 mmAZALIA_CRC1_CONTROL0 0 0x180a 4 0 4294967295 CRC_EN 0 0 CRC_BLOCK_MODE 4 4 CRC_INSTANCE_SEL 8 10 CRC_SOURCE_SEL 12 12 mmAZALIA_CRC1_CONTROL1 0 0x180b 1 0 4294967295 CRC_BLOCK_SIZE 0 31 mmAZALIA_CRC1_CONTROL2 0 0x180c 1 0 4294967295 CRC_BLOCK_ITERATION 0 15 mmAZALIA_CRC1_CONTROL3 0 0x180d 3 0 4294967295 CRC_COMPLETE 0 0 CRC_BLOCK_COMPLETE_PHASE 4 4 CRC_CHANNEL_RESULT_SEL 8 10 mmAZALIA_CRC1_RESULT 0 0x180e 1 0 4294967295 CRC_RESULT 0 31 ixAZALIA_CRC1_CHANNEL0 2 0x0 1 0 4294967295 CRC_CHANNEL0 0 31 ixAZALIA_CRC1_CHANNEL1 2 0x1 1 0 4294967295 CRC_CHANNEL1 0 31 ixAZALIA_CRC1_CHANNEL2 2 0x2 1 0 4294967295 CRC_CHANNEL2 0 31 ixAZALIA_CRC1_CHANNEL3 2 0x3 1 0 4294967295 CRC_CHANNEL3 0 31 ixAZALIA_CRC1_CHANNEL4 2 0x4 1 0 4294967295 CRC_CHANNEL4 0 31 ixAZALIA_CRC1_CHANNEL5 2 0x5 1 0 4294967295 CRC_CHANNEL5 0 31 ixAZALIA_CRC1_CHANNEL6 2 0x6 1 0 4294967295 CRC_CHANNEL6 0 31 ixAZALIA_CRC1_CHANNEL7 2 0x7 1 0 4294967295 CRC_CHANNEL7 0 31 mmAZ_TEST_DEBUG_INDEX 0 0x181f 2 0 4294967295 AZ_TEST_DEBUG_INDEX 0 7 AZ_TEST_DEBUG_WRITE_EN 8 8 mmAZ_TEST_DEBUG_DATA 0 0x1820 1 0 4294967295 AZ_TEST_DEBUG_DATA 0 31 mmAZALIA_STREAM_INDEX 0 0x1780 2 0 4294967295 AZALIA_STREAM_REG_INDEX 0 7 AZALIA_STREAM_REG_WRITE_EN 8 8 mmAZF0STREAM0_AZALIA_STREAM_INDEX 0 0x1780 0 0 4294967295 mmAZF0STREAM1_AZALIA_STREAM_INDEX 0 0x1782 0 0 4294967295 mmAZF0STREAM2_AZALIA_STREAM_INDEX 0 0x1784 0 0 4294967295 mmAZF0STREAM3_AZALIA_STREAM_INDEX 0 0x1786 0 0 4294967295 mmAZF0STREAM4_AZALIA_STREAM_INDEX 0 0x1788 0 0 4294967295 mmAZF0STREAM5_AZALIA_STREAM_INDEX 0 0x178a 0 0 4294967295 mmAZF0STREAM6_AZALIA_STREAM_INDEX 0 0x178c 0 0 4294967295 mmAZF0STREAM7_AZALIA_STREAM_INDEX 0 0x178e 0 0 4294967295 mmAZF0STREAM8_AZALIA_STREAM_INDEX 0 0x59c0 0 0 4294967295 mmAZF0STREAM9_AZALIA_STREAM_INDEX 0 0x59c2 0 0 4294967295 mmAZF0STREAM10_AZALIA_STREAM_INDEX 0 0x59c4 0 0 4294967295 mmAZF0STREAM11_AZALIA_STREAM_INDEX 0 0x59c6 0 0 4294967295 mmAZF0STREAM12_AZALIA_STREAM_INDEX 0 0x59c8 0 0 4294967295 mmAZF0STREAM13_AZALIA_STREAM_INDEX 0 0x59ca 0 0 4294967295 mmAZF0STREAM14_AZALIA_STREAM_INDEX 0 0x59cc 0 0 4294967295 mmAZF0STREAM15_AZALIA_STREAM_INDEX 0 0x59ce 0 0 4294967295 mmAZALIA_STREAM_DATA 0 0x1781 1 0 4294967295 AZALIA_STREAM_REG_DATA 0 31 mmAZF0STREAM0_AZALIA_STREAM_DATA 0 0x1781 0 0 4294967295 mmAZF0STREAM1_AZALIA_STREAM_DATA 0 0x1783 0 0 4294967295 mmAZF0STREAM2_AZALIA_STREAM_DATA 0 0x1785 0 0 4294967295 mmAZF0STREAM3_AZALIA_STREAM_DATA 0 0x1787 0 0 4294967295 mmAZF0STREAM4_AZALIA_STREAM_DATA 0 0x1789 0 0 4294967295 mmAZF0STREAM5_AZALIA_STREAM_DATA 0 0x178b 0 0 4294967295 mmAZF0STREAM6_AZALIA_STREAM_DATA 0 0x178d 0 0 4294967295 mmAZF0STREAM7_AZALIA_STREAM_DATA 0 0x178f 0 0 4294967295 mmAZF0STREAM8_AZALIA_STREAM_DATA 0 0x59c1 0 0 4294967295 mmAZF0STREAM9_AZALIA_STREAM_DATA 0 0x59c3 0 0 4294967295 mmAZF0STREAM10_AZALIA_STREAM_DATA 0 0x59c5 0 0 4294967295 mmAZF0STREAM11_AZALIA_STREAM_DATA 0 0x59c7 0 0 4294967295 mmAZF0STREAM12_AZALIA_STREAM_DATA 0 0x59c9 0 0 4294967295 mmAZF0STREAM13_AZALIA_STREAM_DATA 0 0x59cb 0 0 4294967295 mmAZF0STREAM14_AZALIA_STREAM_DATA 0 0x59cd 0 0 4294967295 mmAZF0STREAM15_AZALIA_STREAM_DATA 0 0x59cf 0 0 4294967295 ixAZALIA_FIFO_SIZE_CONTROL 2 0x0 3 0 4294967295 MIN_FIFO_SIZE 0 6 MAX_FIFO_SIZE 8 14 MAX_LATENCY_SUPPORT 16 23 ixAZALIA_LATENCY_COUNTER_CONTROL 2 0x1 1 0 4294967295 AZALIA_LATENCY_COUNTER_RESET 0 0 ixAZALIA_WORSTCASE_LATENCY_COUNT 2 0x2 1 0 4294967295 AZALIA_WORSTCASE_LATENCY_COUNT 0 31 ixAZALIA_CUMULATIVE_LATENCY_COUNT 2 0x3 1 0 4294967295 AZALIA_CUMULATIVE_LATENCY_COUNT 0 31 ixAZALIA_CUMULATIVE_REQUEST_COUNT 2 0x4 1 0 4294967295 AZALIA_CUMULATIVE_REQUEST_COUNT 0 31 ixAZALIA_STREAM_DEBUG 2 0x5 1 0 4294967295 STREAM_DEBUG_DATA 0 31 mmAZALIA_F0_CODEC_ENDPOINT_INDEX 0 0x17a8 1 0 4294967295 AZALIA_ENDPOINT_REG_INDEX 0 13 mmAZF0ENDPOINT0_AZALIA_F0_CODEC_ENDPOINT_INDEX 0 0x17a8 0 0 4294967295 mmAZF0ENDPOINT1_AZALIA_F0_CODEC_ENDPOINT_INDEX 0 0x17ac 0 0 4294967295 mmAZF0ENDPOINT2_AZALIA_F0_CODEC_ENDPOINT_INDEX 0 0x17b0 0 0 4294967295 mmAZF0ENDPOINT3_AZALIA_F0_CODEC_ENDPOINT_INDEX 0 0x17b4 0 0 4294967295 mmAZF0ENDPOINT4_AZALIA_F0_CODEC_ENDPOINT_INDEX 0 0x17b8 0 0 4294967295 mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX 0 0x17bc 0 0 4294967295 mmAZF0ENDPOINT6_AZALIA_F0_CODEC_ENDPOINT_INDEX 0 0x17c0 0 0 4294967295 mmAZF0ENDPOINT7_AZALIA_F0_CODEC_ENDPOINT_INDEX 0 0x17c4 0 0 4294967295 mmAZALIA_F0_CODEC_ENDPOINT_DATA 0 0x17a9 1 0 4294967295 AZALIA_ENDPOINT_REG_DATA 0 31 mmAZF0ENDPOINT0_AZALIA_F0_CODEC_ENDPOINT_DATA 0 0x17a9 0 0 4294967295 mmAZF0ENDPOINT1_AZALIA_F0_CODEC_ENDPOINT_DATA 0 0x17ad 0 0 4294967295 mmAZF0ENDPOINT2_AZALIA_F0_CODEC_ENDPOINT_DATA 0 0x17b1 0 0 4294967295 mmAZF0ENDPOINT3_AZALIA_F0_CODEC_ENDPOINT_DATA 0 0x17b5 0 0 4294967295 mmAZF0ENDPOINT4_AZALIA_F0_CODEC_ENDPOINT_DATA 0 0x17b9 0 0 4294967295 mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_DATA 0 0x17bd 0 0 4294967295 mmAZF0ENDPOINT6_AZALIA_F0_CODEC_ENDPOINT_DATA 0 0x17c1 0 0 4294967295 mmAZF0ENDPOINT7_AZALIA_F0_CODEC_ENDPOINT_DATA 0 0x17c5 0 0 4294967295 ixAZALIA_F0_CODEC_CONVERTER_PIN_DEBUG 2 0x0 1 0 4294967295 AZALIA_DEBUG 0 0 ixAZALIA_F0_CODEC_CONVERTER_PARAMETER_AUDIO_WIDGET_CAPABILITIES 2 0x1 14 0 4294967295 AUDIO_CHANNEL_CAPABILITIES 0 0 INPUT_AMPLIFIER_PRESENT 1 1 OUTPUT_AMPLIFIER_PRESENT 2 2 AMPLIFIER_PARAMETER_OVERRIDE 3 3 FORMAT_OVERRIDE 4 4 STRIPE 5 5 PROCESSING_WIDGET 6 6 UNSOLICITED_RESPONSE_CAPABILITY 7 7 CONNECTION_LIST 8 8 DIGITAL 9 9 POWER_CONTROL 10 10 LR_SWAP 11 11 AUDIO_WIDGET_CAPABILITIES_DELAY 16 19 TYPE 20 23 ixAZALIA_F0_CODEC_CONVERTER_CONTROL_CONVERTER_FORMAT 2 0x2 6 0 4294967295 NUMBER_OF_CHANNELS 0 3 BITS_PER_SAMPLE 4 6 SAMPLE_BASE_DIVISOR 8 10 SAMPLE_BASE_MULTIPLE 11 13 SAMPLE_BASE_RATE 14 14 STREAM_TYPE 15 15 ixAZALIA_F0_CODEC_CONVERTER_CONTROL_CHANNEL_STREAM_ID 2 0x3 2 0 4294967295 CHANNEL_ID 0 3 STREAM_ID 4 7 ixAZALIA_F0_CODEC_CONVERTER_CONTROL_DIGITAL_CONVERTER 2 0x4 10 0 4294967295 DIGEN 0 0 V 1 1 VCFG 2 2 PRE 3 3 COPY 4 4 NON_AUDIO 5 5 PRO 6 6 L 7 7 CC 8 14 KEEPALIVE 23 23 ixAZALIA_F0_CODEC_CONVERTER_PARAMETER_STREAM_FORMATS 2 0x5 1 0 4294967295 STREAM_FORMATS 0 31 ixAZALIA_F0_CODEC_CONVERTER_PARAMETER_SUPPORTED_SIZE_RATES 2 0x6 2 0 4294967295 AUDIO_RATE_CAPABILITIES 0 11 AUDIO_BIT_CAPABILITIES 16 20 ixAZALIA_F0_CODEC_CONVERTER_STRIPE_CONTROL 2 0x7 2 0 4294967295 STRIPE_CONTROL 0 1 STRIPE_CAPABILITY 20 22 ixAZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE 2 0x8 1 0 4294967295 RAMP_RATE 0 7 ixAZALIA_F0_CODEC_CONVERTER_CONTROL_GTC_EMBEDDING 2 0x9 4 0 4294967295 PRESENTATION_TIME_EMBEDDING_ENABLE 0 0 PRESENTATION_TIME_OFFSET_CHANGED 1 1 CLEAR_GTC_COUNTER_MIN_MAX_DELTA 2 2 PRESENTATION_TIME_EMBEDDING_GROUP 4 6 ixAZALIA_F0_CODEC_CONVERTER_CONTROL_GTC_OFFSET_DEBUG 2 0xa 1 0 4294967295 PRESENTATION_TIME_OFFSET_DEBUG 0 31 ixAZALIA_F0_CODEC_CONVERTER_GTC_COUNTER_DELTA 2 0xc 1 0 4294967295 GTC_COUNTER_DELTA 0 31 ixAZALIA_F0_CODEC_CONVERTER_GTC_COUNTER_DELTA_MIN 2 0xd 1 0 4294967295 GTC_COUNTER_DELTA_MIN 0 31 ixAZALIA_F0_CODEC_CONVERTER_GTC_COUNTER_DELTA_MAX 2 0xe 1 0 4294967295 GTC_COUNTER_DELTA_MAX 0 31 ixAZALIA_F0_CODEC_PIN_PARAMETER_AUDIO_WIDGET_CAPABILITIES 2 0x20 13 0 4294967295 AUDIO_CHANNEL_CAPABILITIES 0 0 INPUT_AMPLIFIER_PRESENT 1 1 OUTPUT_AMPLIFIER_PRESENT 2 2 AMPLIFIER_PARAMETER_OVERRIDE 3 3 STRIPE 5 5 PROCESSING_WIDGET 6 6 UNSOLICITED_RESPONSE_CAPABILITY 7 7 CONNECTION_LIST 8 8 DIGITAL 9 9 POWER_CONTROL 10 10 LR_SWAP 11 11 AUDIO_WIDGET_CAPABILITIES_DELAY 16 19 TYPE 20 23 ixAZALIA_F0_CODEC_PIN_PARAMETER_CAPABILITIES 2 0x21 11 0 4294967295 IMPEDANCE_SENSE_CAPABLE 0 0 TRIGGER_REQUIRED 1 1 JACK_DETECTION_CAPABILITY 2 2 HEADPHONE_DRIVE_CAPABLE 3 3 OUTPUT_CAPABLE 4 4 INPUT_CAPABLE 5 5 BALANCED_I_O_PINS 6 6 HDMI 7 7 VREF_CONTROL 8 15 EAPD_CAPABLE 16 16 DP 24 24 ixAZALIA_F0_CODEC_PIN_CONTROL_UNSOLICITED_RESPONSE 2 0x22 2 0 4294967295 TAG 0 5 ENABLE 7 7 ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE 2 0x23 1 0 4294967295 IMPEDANCE_SENSE 0 30 ixAZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL 2 0x24 1 0 4294967295 OUT_ENABLE 6 6 ixAZALIA_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER 2 0x25 8 0 4294967295 SPEAKER_ALLOCATION 0 6 CHANNEL_ALLOCATION 8 15 HDMI_CONNECTION 16 16 DP_CONNECTION 17 17 EXTRA_CONNECTION_INFO 18 23 LFE_PLAYBACK_LEVEL 24 25 LEVEL_SHIFT 27 30 DOWN_MIX_INHIBIT 31 31 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0 2 0x28 4 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 SUPPORTED_FREQUENCIES_STEREO 24 31 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR1 2 0x29 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR2 2 0x2a 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR3 2 0x2b 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR4 2 0x2c 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR5 2 0x2d 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR6 2 0x2e 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR7 2 0x2f 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR8 2 0x30 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR9 2 0x31 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR10 2 0x32 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR11 2 0x33 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR12 2 0x34 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13 2 0x35 3 0 4294967295 MAX_CHANNELS 0 2 SUPPORTED_FREQUENCIES 8 15 DESCRIPTOR_BYTE_2 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_MULTICHANNEL_ENABLE 2 0x36 12 0 4294967295 MULTICHANNEL01_ENABLE 0 0 MULTICHANNEL01_MUTE 1 1 MULTICHANNEL01_CHANNEL_ID 4 7 MULTICHANNEL23_ENABLE 8 8 MULTICHANNEL23_MUTE 9 9 MULTICHANNEL23_CHANNEL_ID 12 15 MULTICHANNEL45_ENABLE 16 16 MULTICHANNEL45_MUTE 17 17 MULTICHANNEL45_CHANNEL_ID 20 23 MULTICHANNEL67_ENABLE 24 24 MULTICHANNEL67_MUTE 25 25 MULTICHANNEL67_CHANNEL_ID 28 31 ixAZALIA_F0_CODEC_PIN_CONTROL_MULTICHANNEL_ENABLE2 2 0x57 12 0 4294967295 MULTICHANNEL1_ENABLE 0 0 MULTICHANNEL1_MUTE 1 1 MULTICHANNEL1_CHANNEL_ID 4 7 MULTICHANNEL3_ENABLE 8 8 MULTICHANNEL3_MUTE 9 9 MULTICHANNEL3_CHANNEL_ID 12 15 MULTICHANNEL5_ENABLE 16 16 MULTICHANNEL5_MUTE 17 17 MULTICHANNEL5_CHANNEL_ID 20 23 MULTICHANNEL7_ENABLE 24 24 MULTICHANNEL7_MUTE 25 25 MULTICHANNEL7_CHANNEL_ID 28 31 ixAZALIA_F0_CODEC_PIN_CONTROL_MULTICHANNEL_MODE 2 0x58 1 0 4294967295 MULTICHANNEL_MODE 0 0 ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC 2 0x37 2 0 4294967295 VIDEO_LIPSYNC 0 7 AUDIO_LIPSYNC 8 15 ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_HBR 2 0x38 2 0 4294967295 HBR_CAPABLE 0 0 HBR_ENABLE 4 4 ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO0 2 0x3a 2 0 4294967295 MANUFACTURER_ID 0 15 PRODUCT_ID 16 31 ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO1 2 0x3b 1 0 4294967295 SINK_DESCRIPTION_LEN 0 7 ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 2 0x3c 1 0 4294967295 PORT_ID0 0 31 ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO3 2 0x3d 1 0 4294967295 PORT_ID1 0 31 ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO4 2 0x3e 4 0 4294967295 DESCRIPTION0 0 7 DESCRIPTION1 8 15 DESCRIPTION2 16 23 DESCRIPTION3 24 31 ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5 2 0x3f 4 0 4294967295 DESCRIPTION4 0 7 DESCRIPTION5 8 15 DESCRIPTION6 16 23 DESCRIPTION7 24 31 ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO6 2 0x40 4 0 4294967295 DESCRIPTION8 0 7 DESCRIPTION9 8 15 DESCRIPTION10 16 23 DESCRIPTION11 24 31 ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO7 2 0x41 4 0 4294967295 DESCRIPTION12 0 7 DESCRIPTION13 8 15 DESCRIPTION14 16 23 DESCRIPTION15 24 31 ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO8 2 0x42 2 0 4294967295 DESCRIPTION16 0 7 DESCRIPTION17 8 15 ixAZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL 2 0x54 3 0 4294967295 CLOCK_GATING_DISABLE 0 0 CLOCK_ON_STATE 4 4 AUDIO_ENABLED 31 31 ixAZALIA_F0_CODEC_PIN_CONTROL_UNSOLICITED_RESPONSE_FORCE 2 0x55 2 0 4294967295 UNSOLICITED_RESPONSE_PAYLOAD 0 25 UNSOLICITED_RESPONSE_FORCE 28 28 ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT 2 0x56 8 0 4294967295 SEQUENCE 0 3 DEFAULT_ASSOCIATION 4 7 MISC 8 11 COLOR 12 15 CONNECTION_TYPE 16 19 DEFAULT_DEVICE 20 23 LOCATION 24 29 PORT_CONNECTIVITY 30 31 ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_0 2 0x59 2 0 4294967295 IEC_60958_CS_MODE 0 1 IEC_60958_CS_SOURCE_NUMBER 2 5 ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_1 2 0x5a 4 0 4294967295 IEC_60958_CS_CLOCK_ACCURACY 0 1 IEC_60958_CS_CLOCK_ACCURACY_OVRRD_EN 2 2 IEC_60958_CS_WORD_LENGTH 3 6 IEC_60958_CS_WORD_LENGTH_OVRRD_EN 7 7 ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_2 2 0x5b 2 0 4294967295 IEC_60958_CS_SAMPLING_FREQUENCY 0 5 IEC_60958_CS_SAMPLING_FREQUENCY_OVRRD_EN 6 6 ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_3 2 0x5c 2 0 4294967295 IEC_60958_CS_ORIGINAL_SAMPLING_FREQUENCY 0 3 IEC_60958_CS_ORIGINAL_SAMPLING_FREQUENCY_OVRRD_EN 4 4 ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_4 2 0x5d 4 0 4294967295 IEC_60958_CS_SAMPLING_FREQUENCY_COEFF 0 3 IEC_60958_CS_MPEG_SURROUND_INFO 4 4 IEC_60958_CS_CGMS_A 5 6 IEC_60958_CS_CGMS_A_VALID 7 7 ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 2 0x5e 2 0 4294967295 IEC_60958_CS_CHANNEL_NUMBER_L 0 3 IEC_60958_CS_CHANNEL_NUMBER_R 4 7 ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_6 2 0x5f 2 0 4294967295 IEC_60958_CS_CHANNEL_NUMBER_2 0 3 IEC_60958_CS_CHANNEL_NUMBER_3 4 7 ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_7 2 0x60 2 0 4294967295 IEC_60958_CS_CHANNEL_NUMBER_4 0 3 IEC_60958_CS_CHANNEL_NUMBER_5 4 7 ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_8 2 0x61 2 0 4294967295 IEC_60958_CS_CHANNEL_NUMBER_6 0 3 IEC_60958_CS_CHANNEL_NUMBER_7 4 7 ixAZALIA_F0_CODEC_PIN_ASSOCIATION_INFO 2 0x62 1 0 4294967295 ASSOCIATION_INFO 0 31 ixAZALIA_F0_CODEC_PIN_CONTROL_DIGITAL_OUTPUT_STATUS 2 0x63 1 0 4294967295 OUTPUT_ACTIVE 0 0 ixAZALIA_F0_CODEC_PIN_CONTROL_LPIB_SNAPSHOT_CONTROL 2 0x64 2 0 4294967295 LPIB_SNAPSHOT_LOCK 0 0 CYCLIC_BUFFER_WRAP_COUNT 8 15 ixAZALIA_F0_CODEC_PIN_CONTROL_LPIB 2 0x65 1 0 4294967295 LPIB 0 31 ixAZALIA_F0_CODEC_PIN_CONTROL_LPIB_TIMER_SNAPSHOT 2 0x66 1 0 4294967295 LPIB_TIMER_SNAPSHOT 0 31 ixAZALIA_F0_CODEC_PIN_CONTROL_CODING_TYPE 2 0x67 1 0 4294967295 CODING_TYPE 0 7 ixAZALIA_F0_CODEC_PIN_CONTROL_FORMAT_CHANGED 2 0x68 4 0 4294967295 FORMAT_CHANGED 0 0 FORMAT_CHANGED_ACK_UR_ENABLE 1 1 FORMAT_CHANGE_REASON 8 15 FORMAT_CHANGE_RESPONSE 16 23 ixAZALIA_F0_CODEC_PIN_CONTROL_WIRELESS_DISPLAY_IDENTIFICATION 2 0x69 1 0 4294967295 WIRELESS_DISPLAY_IDENTIFICATION 0 1 ixAZALIA_F0_CODEC_PIN_CONTROL_REMOTE_KEEPALIVE 2 0x6a 2 0 4294967295 REMOTE_KEEP_ALIVE_ENABLE 0 0 REMOTE_KEEP_ALIVE_CAPABILITY 4 4 ixAZALIA_F0_AUDIO_ENABLE_STATUS 2 0x6b 1 0 4294967295 AUDIO_ENABLE_STATUS 0 0 ixAZALIA_F0_AUDIO_ENABLED_INT_STATUS 2 0x6c 3 0 4294967295 AUDIO_ENABLED_FLAG 0 0 AUDIO_ENABLED_MASK 4 4 AUDIO_ENABLED_TYPE 8 8 ixAZALIA_F0_AUDIO_DISABLED_INT_STATUS 2 0x6d 3 0 4294967295 AUDIO_DISABLED_FLAG 0 0 AUDIO_DISABLED_MASK 4 4 AUDIO_DISABLED_TYPE 8 8 ixAZALIA_F0_AUDIO_FORMAT_CHANGED_INT_STATUS 2 0x6e 3 0 4294967295 AUDIO_FORMAT_CHANGED_FLAG 0 0 AUDIO_FORMAT_CHANGED_MASK 4 4 AUDIO_FORMAT_CHANGED_TYPE 8 8 mmAZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX 0 0x59d4 1 0 4294967295 AZALIA_INPUT_ENDPOINT_REG_INDEX 0 13 mmAZF0INPUTENDPOINT0_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX 0 0x59d4 0 0 4294967295 mmAZF0INPUTENDPOINT1_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX 0 0x59d8 0 0 4294967295 mmAZF0INPUTENDPOINT2_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX 0 0x59dc 0 0 4294967295 mmAZF0INPUTENDPOINT3_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX 0 0x59e0 0 0 4294967295 mmAZF0INPUTENDPOINT4_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX 0 0x59e4 0 0 4294967295 mmAZF0INPUTENDPOINT5_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX 0 0x59e8 0 0 4294967295 mmAZF0INPUTENDPOINT6_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX 0 0x59ec 0 0 4294967295 mmAZF0INPUTENDPOINT7_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX 0 0x59f0 0 0 4294967295 mmAZALIA_F0_CODEC_INPUT_ENDPOINT_DATA 0 0x59d5 1 0 4294967295 AZALIA_INPUT_ENDPOINT_REG_DATA 0 31 mmAZF0INPUTENDPOINT0_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA 0 0x59d5 0 0 4294967295 mmAZF0INPUTENDPOINT1_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA 0 0x59d9 0 0 4294967295 mmAZF0INPUTENDPOINT2_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA 0 0x59dd 0 0 4294967295 mmAZF0INPUTENDPOINT3_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA 0 0x59e1 0 0 4294967295 mmAZF0INPUTENDPOINT4_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA 0 0x59e5 0 0 4294967295 mmAZF0INPUTENDPOINT5_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA 0 0x59e9 0 0 4294967295 mmAZF0INPUTENDPOINT6_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA 0 0x59ed 0 0 4294967295 mmAZF0INPUTENDPOINT7_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA 0 0x59f1 0 0 4294967295 ixAZALIA_F0_CODEC_INPUT_CONVERTER_PIN_DEBUG 2 0x0 1 0 4294967295 AZALIA_INPUT_DEBUG 0 31 ixAZALIA_F0_CODEC_INPUT_CONVERTER_PARAMETER_AUDIO_WIDGET_CAPABILITIES 2 0x1 14 0 4294967295 AUDIO_CHANNEL_CAPABILITIES 0 0 INPUT_AMPLIFIER_PRESENT 1 1 OUTPUT_AMPLIFIER_PRESENT 2 2 AMPLIFIER_PARAMETER_OVERRIDE 3 3 FORMAT_OVERRIDE 4 4 STRIPE 5 5 PROCESSING_WIDGET 6 6 UNSOLICITED_RESPONSE_CAPABILITY 7 7 CONNECTION_LIST 8 8 DIGITAL 9 9 POWER_CONTROL 10 10 LR_SWAP 11 11 AUDIO_WIDGET_CAPABILITIES_DELAY 16 19 TYPE 20 23 ixAZALIA_F0_CODEC_INPUT_CONVERTER_CONTROL_CONVERTER_FORMAT 2 0x2 6 0 4294967295 NUMBER_OF_CHANNELS 0 3 BITS_PER_SAMPLE 4 6 SAMPLE_BASE_DIVISOR 8 10 SAMPLE_BASE_MULTIPLE 11 13 SAMPLE_BASE_RATE 14 14 STREAM_TYPE 15 15 ixAZALIA_F0_CODEC_INPUT_CONVERTER_CONTROL_CHANNEL_STREAM_ID 2 0x3 2 0 4294967295 CHANNEL_ID 0 3 STREAM_ID 4 7 ixAZALIA_F0_CODEC_INPUT_CONVERTER_CONTROL_DIGITAL_CONVERTER 2 0x4 10 0 4294967295 DIGEN 0 0 V 1 1 VCFG 2 2 PRE 3 3 COPY 4 4 NON_AUDIO 5 5 PRO 6 6 L 7 7 CC 8 14 KEEPALIVE 23 23 ixAZALIA_F0_CODEC_INPUT_CONVERTER_PARAMETER_STREAM_FORMATS 2 0x5 1 0 4294967295 STREAM_FORMATS 0 31 ixAZALIA_F0_CODEC_INPUT_CONVERTER_PARAMETER_SUPPORTED_SIZE_RATES 2 0x6 2 0 4294967295 AUDIO_RATE_CAPABILITIES 0 11 AUDIO_BIT_CAPABILITIES 16 20 ixAZALIA_F0_CODEC_INPUT_PIN_PARAMETER_AUDIO_WIDGET_CAPABILITIES 2 0x20 13 0 4294967295 AUDIO_CHANNEL_CAPABILITIES 0 0 INPUT_AMPLIFIER_PRESENT 1 1 OUTPUT_AMPLIFIER_PRESENT 2 2 AMPLIFIER_PARAMETER_OVERRIDE 3 3 STRIPE 5 5 PROCESSING_WIDGET 6 6 UNSOLICITED_RESPONSE_CAPABILITY 7 7 CONNECTION_LIST 8 8 DIGITAL 9 9 POWER_CONTROL 10 10 LR_SWAP 11 11 AUDIO_WIDGET_CAPABILITIES_DELAY 16 19 TYPE 20 23 ixAZALIA_F0_CODEC_INPUT_PIN_PARAMETER_CAPABILITIES 2 0x21 11 0 4294967295 IMPEDANCE_SENSE_CAPABLE 0 0 TRIGGER_REQUIRED 1 1 JACK_DETECTION_CAPABILITY 2 2 HEADPHONE_DRIVE_CAPABLE 3 3 OUTPUT_CAPABLE 4 4 INPUT_CAPABLE 5 5 BALANCED_I_O_PINS 6 6 HDMI 7 7 VREF_CONTROL 8 15 EAPD_CAPABLE 16 16 DP 24 24 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_UNSOLICITED_RESPONSE 2 0x22 2 0 4294967295 TAG 0 5 ENABLE 7 7 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_RESPONSE_INPUT_PIN_SENSE 2 0x23 2 0 4294967295 IMPEDANCE_SENSE 0 30 PRESENCE_DETECT 31 31 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_WIDGET_CONTROL 2 0x24 1 0 4294967295 IN_ENABLE 5 5 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_MULTICHANNEL_ENABLE 2 0x36 12 0 4294967295 MULTICHANNEL0_ENABLE 0 0 MULTICHANNEL0_MUTE 1 1 MULTICHANNEL0_CHANNEL_ID 4 7 MULTICHANNEL1_ENABLE 8 8 MULTICHANNEL1_MUTE 9 9 MULTICHANNEL1_CHANNEL_ID 12 15 MULTICHANNEL2_ENABLE 16 16 MULTICHANNEL2_MUTE 17 17 MULTICHANNEL2_CHANNEL_ID 20 23 MULTICHANNEL3_ENABLE 24 24 MULTICHANNEL3_MUTE 25 25 MULTICHANNEL3_CHANNEL_ID 28 31 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_MULTICHANNEL_ENABLE2 2 0x37 12 0 4294967295 MULTICHANNEL4_ENABLE 0 0 MULTICHANNEL4_MUTE 1 1 MULTICHANNEL4_CHANNEL_ID 4 7 MULTICHANNEL5_ENABLE 8 8 MULTICHANNEL5_MUTE 9 9 MULTICHANNEL5_CHANNEL_ID 12 15 MULTICHANNEL6_ENABLE 16 16 MULTICHANNEL6_MUTE 17 17 MULTICHANNEL6_CHANNEL_ID 20 23 MULTICHANNEL7_ENABLE 24 24 MULTICHANNEL7_MUTE 25 25 MULTICHANNEL7_CHANNEL_ID 28 31 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_RESPONSE_HBR 2 0x38 2 0 4294967295 HBR_CAPABLE 0 0 HBR_ENABLE 4 4 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_CHANNEL_ALLOCATION 2 0x53 1 0 4294967295 CHANNEL_ALLOCATION 0 7 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_HOT_PLUG_CONTROL 2 0x54 3 0 4294967295 CLOCK_GATING_DISABLE 0 0 CLOCK_ON_STATE 4 4 AUDIO_ENABLED 31 31 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_UNSOLICITED_RESPONSE_FORCE 2 0x55 2 0 4294967295 UNSOLICITED_RESPONSE_PAYLOAD 0 25 UNSOLICITED_RESPONSE_FORCE 28 28 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT 2 0x56 8 0 4294967295 SEQUENCE 0 3 DEFAULT_ASSOCIATION 4 7 MISC 8 11 COLOR 12 15 CONNECTION_TYPE 16 19 DEFAULT_DEVICE 20 23 LOCATION 24 29 PORT_CONNECTIVITY 30 31 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_INPUT_STATUS_CONTROL 2 0x67 4 0 4294967295 INPUT_ACTIVITY 0 0 CHANNEL_LAYOUT 1 2 INPUT_ACTIVITY_UR_ENABLE 4 4 INPUT_CL_CS_INFOFRAME_CHANGE_UR_ENABLE 5 5 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_INFOFRAME 2 0x68 4 0 4294967295 CHANNEL_COUNT 0 2 CHANNEL_ALLOCATION 8 15 INFOFRAME_BYTE_5 16 23 INFOFRAME_VALID 31 31 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_LPIB_SNAPSHOT_CONTROL 2 0x64 2 0 4294967295 LPIB_SNAPSHOT_LOCK 0 0 CYCLIC_BUFFER_WRAP_COUNT 8 15 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_LPIB 2 0x65 1 0 4294967295 LPIB 0 31 ixAZALIA_F0_CODEC_INPUT_PIN_CONTROL_LPIB_TIMER_SNAPSHOT 2 0x66 1 0 4294967295 LPIB_TIMER_SNAPSHOT 0 31 mmAZENDPOINT_IMMEDIATE_COMMAND_INPUT_INTERFACE_INDEX 0 0x18 1 0 4294967295 IMMEDIATE_COMMAND_WRITE 0 16 mmAZENDPOINT_IMMEDIATE_COMMAND_INPUT_INTERFACE_DATA 0 0x18 1 0 4294967295 IMMEDIATE_COMMAND_WRITE 0 31 ixAZALIA_F2_CODEC_INPUT_CONVERTER_PARAMETER_AUDIO_WIDGET_CAPABILITIES 2 0x6f09 14 0 4294967295 AUDIO_CHANNEL_CAPABILITIES 0 0 INPUT_AMPLIFIER_PRESENT 1 1 OUTPUT_AMPLIFIER_PRESENT 2 2 AMPLIFIER_PARAMETER_OVERRIDE 3 3 FORMAT_OVERRIDE 4 4 STRIPE 5 5 PROCESSING_WIDGET 6 6 UNSOLICITED_RESPONSE_CAPABILITY 7 7 CONNECTION_LIST 8 8 DIGITAL 9 9 POWER_CONTROL 10 10 LR_SWAP 11 11 AUDIO_WIDGET_CAPABILITIES_DELAY 16 19 TYPE 20 23 ixAZALIA_F2_CODEC_INPUT_CONVERTER_PARAMETER_SUPPORTED_SIZE_RATES 2 0x6f0a 2 0 4294967295 AUDIO_RATE_CAPABILITIES 0 11 AUDIO_BIT_CAPABILITIES 16 20 ixAZALIA_F2_CODEC_INPUT_CONVERTER_PARAMETER_STREAM_FORMATS 2 0x6f0b 1 0 4294967295 STREAM_FORMATS 0 31 ixAZALIA_F2_CODEC_INPUT_CONVERTER_CONTROL_CONVERTER_FORMAT 2 0x6200 6 0 4294967295 NUMBER_OF_CHANNELS 0 3 BITS_PER_SAMPLE 4 6 SAMPLE_BASE_DIVISOR 8 10 SAMPLE_BASE_MULTIPLE 11 13 SAMPLE_BASE_RATE 14 14 STREAM_TYPE 15 15 ixAZALIA_F2_CODEC_INPUT_CONVERTER_CONTROL_CHANNEL_STREAM_ID 2 0x6706 2 0 4294967295 CHANNEL_ID 0 3 STREAM_ID 4 7 ixAZALIA_F2_CODEC_INPUT_CONVERTER_CONTROL_DIGITAL_CONVERTER 2 0x670d 10 0 4294967295 DIGEN 0 0 V 1 1 VCFG 2 2 PRE 3 3 COPY 4 4 NON_AUDIO 5 5 PRO 6 6 L 7 7 CC 8 14 KEEPALIVE 23 23 ixAZALIA_F2_CODEC_INPUT_PIN_PARAMETER_AUDIO_WIDGET_CAPABILITIES 2 0x7f09 13 0 4294967295 AUDIO_CHANNEL_CAPABILITIES 0 0 INPUT_AMPLIFIER_PRESENT 1 1 OUTPUT_AMPLIFIER_PRESENT 2 2 AMPLIFIER_PARAMETER_OVERRIDE 3 3 STRIPE 5 5 PROCESSING_WIDGET 6 6 UNSOLICITED_RESPONSE_CAPABILITY 7 7 CONNECTION_LIST 8 8 DIGITAL 9 9 POWER_CONTROL 10 10 LR_SWAP 11 11 AUDIO_WIDGET_CAPABILITIES_DELAY 16 19 TYPE 20 23 ixAZALIA_F2_CODEC_INPUT_PIN_PARAMETER_CAPABILITIES 2 0x7f0c 11 0 4294967295 IMPEDANCE_SENSE_CAPABLE 0 0 TRIGGER_REQUIRED 1 1 JACK_DETECTION_CAPABILITY 2 2 HEADPHONE_DRIVE_CAPABLE 3 3 OUTPUT_CAPABLE 4 4 INPUT_CAPABLE 5 5 BALANCED_I_O_PINS 6 6 HDMI 7 7 VREF_CONTROL 8 15 EAPD_CAPABLE 16 16 DP 24 24 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_WIDGET_CONTROL 2 0x7707 1 0 4294967295 IN_ENABLE 5 5 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_UNSOLICITED_RESPONSE 2 0x7708 2 0 4294967295 TAG 0 5 ENABLE 7 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_RESPONSE_PIN_SENSE 2 0x7709 2 0 4294967295 IMPEDANCE_SENSE 0 30 PRESENCE_DETECT 31 31 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT 2 0x771c 8 0 4294967295 SEQUENCE 0 3 DEFAULT_ASSOCIATION 4 7 MISC 8 11 COLOR 12 15 CONNECTION_TYPE 16 19 DEFAULT_DEVICE 20 23 LOCATION 24 29 PORT_CONNECTIVITY 30 31 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT_2 2 0x771d 2 0 4294967295 MISC 0 3 COLOR 4 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT_3 2 0x771e 2 0 4294967295 CONNECTION_TYPE 0 3 DEFAULT_DEVICE 4 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT_4 2 0x771f 2 0 4294967295 LOCATION 0 5 PORT_CONNECTIVITY 6 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_MULTICHANNEL0_ENABLE 2 0x7777 3 0 4294967295 MULTICHANNEL0_ENABLE 0 0 MULTICHANNEL0_MUTE 1 1 MULTICHANNEL0_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_MULTICHANNEL1_ENABLE 2 0x7785 3 0 4294967295 MULTICHANNEL1_ENABLE 0 0 MULTICHANNEL1_MUTE 1 1 MULTICHANNEL1_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_MULTICHANNEL2_ENABLE 2 0x7778 3 0 4294967295 MULTICHANNEL2_ENABLE 0 0 MULTICHANNEL2_MUTE 1 1 MULTICHANNEL2_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_MULTICHANNEL3_ENABLE 2 0x7786 3 0 4294967295 MULTICHANNEL3_ENABLE 0 0 MULTICHANNEL3_MUTE 1 1 MULTICHANNEL3_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR 2 0x777c 2 0 4294967295 HBR_CAPABLE 0 0 HBR_ENABLE 4 4 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_MULTICHANNEL4_ENABLE 2 0x7779 3 0 4294967295 MULTICHANNEL4_ENABLE 0 0 MULTICHANNEL4_MUTE 1 1 MULTICHANNEL4_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_MULTICHANNEL5_ENABLE 2 0x7787 3 0 4294967295 MULTICHANNEL5_ENABLE 0 0 MULTICHANNEL5_MUTE 1 1 MULTICHANNEL5_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_MULTICHANNEL6_ENABLE 2 0x777a 3 0 4294967295 MULTICHANNEL6_ENABLE 0 0 MULTICHANNEL6_MUTE 1 1 MULTICHANNEL6_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_MULTICHANNEL7_ENABLE 2 0x7788 3 0 4294967295 MULTICHANNEL7_ENABLE 0 0 MULTICHANNEL7_MUTE 1 1 MULTICHANNEL7_CHANNEL_ID 4 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_CHANNEL_ALLOCATION 2 0x7771 1 0 4294967295 CHANNEL_ALLOCATION 0 7 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_INPUT_STATUS_CONTROL 2 0x779b 4 0 4294967295 INPUT_ACTIVITY 0 0 CHANNEL_LAYOUT 1 2 INPUT_ACTIVITY_UR_ENABLE 4 4 INPUT_CL_CS_INFOFRAME_CHANGE_UR_ENABLE 5 5 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_INFOFRAME 2 0x779c 4 0 4294967295 CHANNEL_COUNT 0 2 CHANNEL_ALLOCATION 8 15 INFOFRAME_BYTE_5 16 23 INFOFRAME_VALID 31 31 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_CHANNEL_STATUS_L 2 0x779d 1 0 4294967295 CHANNEL_STATUS_L 0 31 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_CHANNEL_STATUS_H 2 0x779e 1 0 4294967295 CHANNEL_STATUS_H 0 31 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_LPIB_SNAPSHOT_CONTROL 2 0x7798 2 0 4294967295 LPIB_SNAPSHOT_LOCK 0 0 CYCLIC_BUFFER_WRAP_COUNT 8 15 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_LPIB 2 0x7799 1 0 4294967295 LPIB 0 31 ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_LPIB_TIMER_SNAPSHOT 2 0x779a 1 0 4294967295 LPIB_TIMER_SNAPSHOT 0 31 mmBLND_CONTROL 0 0x1b6d 9 0 4294967295 BLND_GLOBAL_GAIN 0 7 BLND_MODE 8 9 BLND_STEREO_TYPE 10 11 BLND_STEREO_POLARITY 12 12 BLND_FEEDTHROUGH_EN 13 13 BLND_ALPHA_MODE 16 17 BLND_ACTIVE_OVERLAP_ONLY 18 18 BLND_MULTIPLIED_MODE 20 20 BLND_GLOBAL_ALPHA 24 31 mmBLND0_BLND_CONTROL 0 0x1b6d 0 0 4294967295 mmBLND1_BLND_CONTROL 0 0x1d6d 0 0 4294967295 mmBLND2_BLND_CONTROL 0 0x1f6d 0 0 4294967295 mmBLND3_BLND_CONTROL 0 0x416d 0 0 4294967295 mmBLND4_BLND_CONTROL 0 0x436d 0 0 4294967295 mmBLND5_BLND_CONTROL 0 0x456d 0 0 4294967295 mmBLND_SM_CONTROL2 0 0x1b6e 6 0 4294967295 SM_MODE 0 2 SM_FRAME_ALTERNATE 4 4 SM_FIELD_ALTERNATE 5 5 SM_FORCE_NEXT_FRAME_POL 8 9 SM_FORCE_NEXT_TOP_POL 16 17 SM_CURRENT_FRAME_POL 24 24 mmBLND0_BLND_SM_CONTROL2 0 0x1b6e 0 0 4294967295 mmBLND1_BLND_SM_CONTROL2 0 0x1d6e 0 0 4294967295 mmBLND2_BLND_SM_CONTROL2 0 0x1f6e 0 0 4294967295 mmBLND3_BLND_SM_CONTROL2 0 0x416e 0 0 4294967295 mmBLND4_BLND_SM_CONTROL2 0 0x436e 0 0 4294967295 mmBLND5_BLND_SM_CONTROL2 0 0x456e 0 0 4294967295 mmBLND_CONTROL2 0 0x1b6f 5 0 4294967295 PTI_ENABLE 0 0 PTI_NEW_PIXEL_GAP 4 5 BLND_NEW_PIXEL_MODE 6 6 BLND_SUPERAA_DEGAMMA_EN 7 7 BLND_SUPERAA_REGAMMA_EN 8 8 mmBLND0_BLND_CONTROL2 0 0x1b6f 0 0 4294967295 mmBLND1_BLND_CONTROL2 0 0x1d6f 0 0 4294967295 mmBLND2_BLND_CONTROL2 0 0x1f6f 0 0 4294967295 mmBLND3_BLND_CONTROL2 0 0x416f 0 0 4294967295 mmBLND4_BLND_CONTROL2 0 0x436f 0 0 4294967295 mmBLND5_BLND_CONTROL2 0 0x456f 0 0 4294967295 mmBLND_UPDATE 0 0x1b70 3 0 4294967295 BLND_UPDATE_PENDING 0 0 BLND_UPDATE_TAKEN 8 8 BLND_UPDATE_LOCK 16 16 mmBLND0_BLND_UPDATE 0 0x1b70 0 0 4294967295 mmBLND1_BLND_UPDATE 0 0x1d70 0 0 4294967295 mmBLND2_BLND_UPDATE 0 0x1f70 0 0 4294967295 mmBLND3_BLND_UPDATE 0 0x4170 0 0 4294967295 mmBLND4_BLND_UPDATE 0 0x4370 0 0 4294967295 mmBLND5_BLND_UPDATE 0 0x4570 0 0 4294967295 mmBLND_UNDERFLOW_INTERRUPT 0 0x1b71 4 0 4294967295 BLND_UNDERFLOW_INT_OCCURED 0 0 BLND_UNDERFLOW_INT_ACK 8 8 BLND_UNDERFLOW_INT_MASK 12 12 BLND_UNDERFLOW_INT_PIPE_INDEX 16 17 mmBLND0_BLND_UNDERFLOW_INTERRUPT 0 0x1b71 0 0 4294967295 mmBLND1_BLND_UNDERFLOW_INTERRUPT 0 0x1d71 0 0 4294967295 mmBLND2_BLND_UNDERFLOW_INTERRUPT 0 0x1f71 0 0 4294967295 mmBLND3_BLND_UNDERFLOW_INTERRUPT 0 0x4171 0 0 4294967295 mmBLND4_BLND_UNDERFLOW_INTERRUPT 0 0x4371 0 0 4294967295 mmBLND5_BLND_UNDERFLOW_INTERRUPT 0 0x4571 0 0 4294967295 mmBLND_V_UPDATE_LOCK 0 0x1b73 7 0 4294967295 BLND_DCP_GRPH_V_UPDATE_LOCK 0 0 BLND_DCP_GRPH_SURF_V_UPDATE_LOCK 1 1 BLND_DCP_CUR_V_UPDATE_LOCK 16 16 BLND_DCP_CUR2_V_UPDATE_LOCK 24 24 BLND_SCL_V_UPDATE_LOCK 28 28 BLND_BLND_V_UPDATE_LOCK 29 29 BLND_V_UPDATE_LOCK_MODE 31 31 mmBLND0_BLND_V_UPDATE_LOCK 0 0x1b73 0 0 4294967295 mmBLND1_BLND_V_UPDATE_LOCK 0 0x1d73 0 0 4294967295 mmBLND2_BLND_V_UPDATE_LOCK 0 0x1f73 0 0 4294967295 mmBLND3_BLND_V_UPDATE_LOCK 0 0x4173 0 0 4294967295 mmBLND4_BLND_V_UPDATE_LOCK 0 0x4373 0 0 4294967295 mmBLND5_BLND_V_UPDATE_LOCK 0 0x4573 0 0 4294967295 mmBLND_REG_UPDATE_STATUS 0 0x1b77 10 0 4294967295 DCP_BLNDC_GRPH_UPDATE_PENDING 0 0 DCP_BLNDO_GRPH_UPDATE_PENDING 1 1 DCP_BLNDC_GRPH_SURF_UPDATE_PENDING 2 2 DCP_BLNDO_GRPH_SURF_UPDATE_PENDING 3 3 DCP_BLNDC_CUR_UPDATE_PENDING 6 6 DCP_BLNDO_CUR_UPDATE_PENDING 7 7 SCL_BLNDC_UPDATE_PENDING 8 8 SCL_BLNDO_UPDATE_PENDING 9 9 BLND_BLNDC_UPDATE_PENDING 10 10 BLND_BLNDO_UPDATE_PENDING 11 11 mmBLND0_BLND_REG_UPDATE_STATUS 0 0x1b77 0 0 4294967295 mmBLND1_BLND_REG_UPDATE_STATUS 0 0x1d77 0 0 4294967295 mmBLND2_BLND_REG_UPDATE_STATUS 0 0x1f77 0 0 4294967295 mmBLND3_BLND_REG_UPDATE_STATUS 0 0x4177 0 0 4294967295 mmBLND4_BLND_REG_UPDATE_STATUS 0 0x4377 0 0 4294967295 mmBLND5_BLND_REG_UPDATE_STATUS 0 0x4577 0 0 4294967295 mmBLND_DEBUG 0 0x1b74 2 0 4294967295 BLND_CNV_MUX_SELECT 0 0 BLND_DEBUG 1 31 mmBLND0_BLND_DEBUG 0 0x1b74 0 0 4294967295 mmBLND1_BLND_DEBUG 0 0x1d74 0 0 4294967295 mmBLND2_BLND_DEBUG 0 0x1f74 0 0 4294967295 mmBLND3_BLND_DEBUG 0 0x4174 0 0 4294967295 mmBLND4_BLND_DEBUG 0 0x4374 0 0 4294967295 mmBLND5_BLND_DEBUG 0 0x4574 0 0 4294967295 mmBLND_TEST_DEBUG_INDEX 0 0x1b75 2 0 4294967295 BLND_TEST_DEBUG_INDEX 0 7 BLND_TEST_DEBUG_WRITE_EN 8 8 mmBLND0_BLND_TEST_DEBUG_INDEX 0 0x1b75 0 0 4294967295 mmBLND1_BLND_TEST_DEBUG_INDEX 0 0x1d75 0 0 4294967295 mmBLND2_BLND_TEST_DEBUG_INDEX 0 0x1f75 0 0 4294967295 mmBLND3_BLND_TEST_DEBUG_INDEX 0 0x4175 0 0 4294967295 mmBLND4_BLND_TEST_DEBUG_INDEX 0 0x4375 0 0 4294967295 mmBLND5_BLND_TEST_DEBUG_INDEX 0 0x4575 0 0 4294967295 mmBLND_TEST_DEBUG_DATA 0 0x1b76 1 0 4294967295 BLND_TEST_DEBUG_DATA 0 31 mmBLND0_BLND_TEST_DEBUG_DATA 0 0x1b76 0 0 4294967295 mmBLND1_BLND_TEST_DEBUG_DATA 0 0x1d76 0 0 4294967295 mmBLND2_BLND_TEST_DEBUG_DATA 0 0x1f76 0 0 4294967295 mmBLND3_BLND_TEST_DEBUG_DATA 0 0x4176 0 0 4294967295 mmBLND4_BLND_TEST_DEBUG_DATA 0 0x4376 0 0 4294967295 mmBLND5_BLND_TEST_DEBUG_DATA 0 0x4576 0 0 4294967295 mmWB_ENABLE 0 0x5e18 1 0 4294967295 WB_ENABLE 0 0 mmWB_EC_CONFIG 0 0x5e19 18 0 4294967295 DISPCLK_R_WB_GATE_DIS 0 0 DISPCLK_G_WB_GATE_DIS 1 1 DISPCLK_G_WBSCL_GATE_DIS 2 2 WB_TEST_CLK_SEL 3 6 WB_LB_LS_DIS 7 7 WB_LB_SD_DIS 8 8 WB_LUT_LS_DIS 9 9 WBSCL_LB_MEM_PWR_MODE_SEL 12 13 WBSCL_LB_MEM_PWR_DIS 14 14 WBSCL_LB_MEM_PWR_FORCE 15 16 WBSCL_LB_MEM_PWR_STATE_SM 17 18 WBSCL_LB_MEM_PWR_STATE_BG 19 20 WBSCL_LB_MEM_PWR_STATE 21 22 WB_RAM_PW_SAVE_MODE 23 23 LB_MEM_PWR_STATE_SM 24 25 LB_MEM_PWR_STATE_BG 26 27 LB_MEM_PWR_STATE 28 29 LUT_MEM_PWR_STATE 30 31 mmCNV_MODE 0 0x5e1a 10 0 4294967295 CNV_FRAME_CAPTURE_RATE 8 9 CNV_WINDOW_CROP_EN 12 12 CNV_STEREO_TYPE 13 14 CNV_INTERLACED_MODE 15 15 CNV_EYE_SELECTION 16 17 CNV_STEREO_POLARITY 18 18 CNV_INTERLACED_FIELD_ORDER 19 19 CNV_STEREO_SPLIT 20 20 CNV_NEW_CONTENT 24 24 CNV_FRAME_CAPTURE_EN 31 31 mmCNV_WINDOW_START 0 0x5e1b 2 0 4294967295 CNV_WINDOW_START_X 0 11 CNV_WINDOW_START_Y 16 27 mmCNV_WINDOW_SIZE 0 0x5e1c 2 0 4294967295 CNV_WINDOW_WIDTH 0 11 CNV_WINDOW_HEIGHT 16 27 mmCNV_UPDATE 0 0x5e1d 3 0 4294967295 CNV_UPDATE_PENDING 0 0 CNV_UPDATE_TAKEN 8 8 CNV_UPDATE_LOCK 16 16 mmCNV_SOURCE_SIZE 0 0x5e1e 2 0 4294967295 CNV_SOURCE_WIDTH 0 14 CNV_SOURCE_HEIGHT 16 30 mmCNV_CSC_CONTROL 0 0x5e1f 1 0 4294967295 CNV_CSC_BYPASS 0 0 mmCNV_CSC_C11_C12 0 0x5e20 2 0 4294967295 CNV_CSC_C11 0 12 CNV_CSC_C12 16 28 mmCNV_CSC_C13_C14 0 0x5e21 2 0 4294967295 CNV_CSC_C13 0 12 CNV_CSC_C14 16 30 mmCNV_CSC_C21_C22 0 0x5e22 2 0 4294967295 CNV_CSC_C21 0 12 CNV_CSC_C22 16 28 mmCNV_CSC_C23_C24 0 0x5e23 2 0 4294967295 CNV_CSC_C23 0 12 CNV_CSC_C24 16 30 mmCNV_CSC_C31_C32 0 0x5e24 2 0 4294967295 CNV_CSC_C31 0 12 CNV_CSC_C32 16 28 mmCNV_CSC_C33_C34 0 0x5e25 2 0 4294967295 CNV_CSC_C33 0 12 CNV_CSC_C34 16 30 mmCNV_CSC_ROUND_OFFSET_R 0 0x5e26 1 0 4294967295 CNV_CSC_ROUND_OFFSET_R 0 15 mmCNV_CSC_ROUND_OFFSET_G 0 0x5e27 1 0 4294967295 CNV_CSC_ROUND_OFFSET_G 0 15 mmCNV_CSC_ROUND_OFFSET_B 0 0x5e28 1 0 4294967295 CNV_CSC_ROUND_OFFSET_B 0 15 mmCNV_CSC_CLAMP_R 0 0x5e29 2 0 4294967295 CNV_CSC_CLAMP_UPPER_R 0 15 CNV_CSC_CLAMP_LOWER_R 16 31 mmCNV_CSC_CLAMP_G 0 0x5e2a 2 0 4294967295 CNV_CSC_CLAMP_UPPER_G 0 15 CNV_CSC_CLAMP_LOWER_G 16 31 mmCNV_CSC_CLAMP_B 0 0x5e2b 2 0 4294967295 CNV_CSC_CLAMP_UPPER_B 0 15 CNV_CSC_CLAMP_LOWER_B 16 31 mmCNV_TEST_CNTL 0 0x5e2c 3 0 4294967295 CNV_TEST_CRC_EN 4 4 CNV_TEST_CRC_CONT_EN 8 8 CNV_TEST_CRC_DE_ONLY 16 16 mmCNV_TEST_CRC_RED 0 0x5e2d 2 0 4294967295 CNV_TEST_CRC_RED_MASK 4 15 CNV_TEST_CRC_SIG_RED 16 31 mmCNV_TEST_CRC_GREEN 0 0x5e2e 2 0 4294967295 CNV_TEST_CRC_GREEN_MASK 4 15 CNV_TEST_CRC_SIG_GREEN 16 31 mmCNV_TEST_CRC_BLUE 0 0x5e2f 2 0 4294967295 CNV_TEST_CRC_BLUE_MASK 4 15 CNV_TEST_CRC_SIG_BLUE 16 31 mmWB_DEBUG_CTRL 0 0x5e30 2 0 4294967295 WB_DEBUG_EN 0 0 WB_DEBUG_SEL 6 7 mmWB_DBG_MODE 0 0x5e31 6 0 4294967295 WB_DBG_MODE_EN 0 0 WB_DBG_DIN_FMT 1 1 WB_DBG_36MODE 2 2 WB_DBG_CMAP 3 3 WB_DBG_PXLRATE_ERROR 8 8 WB_DBG_SOURCE_WIDTH 16 30 mmWB_HW_DEBUG 0 0x5e32 1 0 4294967295 WB_HW_DEBUG 0 31 mmCNV_INPUT_SELECT 0 0x5e33 2 0 4294967295 CNV_INPUT_SRC_SELECT 0 1 CNV_INPUT_PIPE_SELECT 2 4 mmWB_SOFT_RESET 0 0x5e36 1 0 4294967295 WB_SOFT_RESET 0 0 mmWB_WARM_UP_MODE_CTL1 0 0x5e37 3 0 4294967295 WIDTH_WARMUP 0 14 HEIGHT_WARMUP 16 30 GMC_WARM_UP_ENABLE 31 31 mmWB_WARM_UP_MODE_CTL2 0 0x5e38 2 0 4294967295 DATA_VALUE_WARMUP 0 7 MODE_WARMUP 8 8 mmCNV_TEST_DEBUG_INDEX 0 0x5e34 2 0 4294967295 CNV_TEST_DEBUG_INDEX 0 7 CNV_TEST_DEBUG_WRITE_EN 8 8 mmCNV_TEST_DEBUG_DATA 0 0x5e35 1 0 4294967295 CNV_TEST_DEBUG_DATA 0 31 mmDCFE_CLOCK_CONTROL 0 0x1b00 7 0 4294967295 DISPCLK_R_DCFE_GATE_DISABLE 4 4 DISPCLK_G_DCP_GATE_DISABLE 8 8 DISPCLK_G_SCL_GATE_DISABLE 12 12 DISPCLK_G_PSCL_GATE_DISABLE 15 15 DISPCLK_G_PIPE_REQUEST_DIS_GATE_DISABLE 17 17 DCFE_TEST_CLK_SEL 24 28 DCFE_CLOCK_ENABLE 31 31 mmDCFE0_DCFE_CLOCK_CONTROL 0 0x1b00 0 0 4294967295 mmDCFE1_DCFE_CLOCK_CONTROL 0 0x1d00 0 0 4294967295 mmDCFE2_DCFE_CLOCK_CONTROL 0 0x1f00 0 0 4294967295 mmDCFE3_DCFE_CLOCK_CONTROL 0 0x4100 0 0 4294967295 mmDCFE4_DCFE_CLOCK_CONTROL 0 0x4300 0 0 4294967295 mmDCFE5_DCFE_CLOCK_CONTROL 0 0x4500 0 0 4294967295 mmDCFE_SOFT_RESET 0 0x1b01 6 0 4294967295 DCP_PIXPIPE_SOFT_RESET 0 0 DCP_REQ_SOFT_RESET 1 1 SCL_ALU_SOFT_RESET 2 2 SCL_SOFT_RESET 3 3 CRTC_SOFT_RESET 4 4 PSCL_SOFT_RESET 5 5 mmDCFE0_DCFE_SOFT_RESET 0 0x1b01 0 0 4294967295 mmDCFE1_DCFE_SOFT_RESET 0 0x1d01 0 0 4294967295 mmDCFE2_DCFE_SOFT_RESET 0 0x1f01 0 0 4294967295 mmDCFE3_DCFE_SOFT_RESET 0 0x4101 0 0 4294967295 mmDCFE4_DCFE_SOFT_RESET 0 0x4301 0 0 4294967295 mmDCFE5_DCFE_SOFT_RESET 0 0x4501 0 0 4294967295 mmDCFE_DBG_CONFIG 0 0x1b02 2 0 4294967295 DCFE_DBG_EN 0 0 DCFE_DBG_SEL 4 7 mmDCFE0_DCFE_DBG_CONFIG 0 0x1b02 0 0 4294967295 mmDCFE1_DCFE_DBG_CONFIG 0 0x1d02 0 0 4294967295 mmDCFE2_DCFE_DBG_CONFIG 0 0x1f02 0 0 4294967295 mmDCFE3_DCFE_DBG_CONFIG 0 0x4102 0 0 4294967295 mmDCFE4_DCFE_DBG_CONFIG 0 0x4302 0 0 4294967295 mmDCFE5_DCFE_DBG_CONFIG 0 0x4502 0 0 4294967295 mmDCFE_MEM_PWR_CTRL 0 0x1b03 20 0 4294967295 DCP_LUT_MEM_PWR_FORCE 0 1 DCP_LUT_MEM_PWR_DIS 2 2 DCP_REGAMMA_MEM_PWR_FORCE 3 4 DCP_REGAMMA_MEM_PWR_DIS 5 5 SCL_COEFF_MEM_PWR_FORCE 6 7 SCL_COEFF_MEM_PWR_DIS 8 8 DCP_CURSOR_MEM_PWR_FORCE 9 10 DCP_CURSOR_MEM_PWR_DIS 11 11 LB0_ALPHA_MEM_PWR_FORCE 12 13 LB0_ALPHA_MEM_PWR_DIS 14 14 LB1_ALPHA_MEM_PWR_FORCE 15 16 LB1_ALPHA_MEM_PWR_DIS 17 17 LB2_ALPHA_MEM_PWR_FORCE 18 19 LB2_ALPHA_MEM_PWR_DIS 20 20 LB0_MEM_PWR_FORCE 21 22 LB0_MEM_PWR_DIS 23 23 LB1_MEM_PWR_FORCE 24 25 LB1_MEM_PWR_DIS 26 26 LB2_MEM_PWR_FORCE 27 28 LB2_MEM_PWR_DIS 29 29 mmDCFE0_DCFE_MEM_PWR_CTRL 0 0x1b03 0 0 4294967295 mmDCFE1_DCFE_MEM_PWR_CTRL 0 0x1d03 0 0 4294967295 mmDCFE2_DCFE_MEM_PWR_CTRL 0 0x1f03 0 0 4294967295 mmDCFE3_DCFE_MEM_PWR_CTRL 0 0x4103 0 0 4294967295 mmDCFE4_DCFE_MEM_PWR_CTRL 0 0x4303 0 0 4294967295 mmDCFE5_DCFE_MEM_PWR_CTRL 0 0x4503 0 0 4294967295 mmDCFE_MEM_PWR_CTRL2 0 0x1b04 12 0 4294967295 DCP_LUT_MEM_PWR_MODE_SEL 0 1 DCP_REGAMMA_MEM_PWR_MODE_SEL 2 3 SCL_COEFF_MEM_PWR_MODE_SEL 4 5 DCP_CURSOR_MEM_PWR_MODE_SEL 6 7 LB_ALPHA_MEM_PWR_MODE_SEL 8 9 LB_MEM_PWR_MODE_SEL 10 11 DCP_CURSOR2_MEM_PWR_MODE_SEL 12 13 BLND_MEM_PWR_MODE_SEL 14 15 BLND_MEM_PWR_FORCE 16 17 BLND_MEM_PWR_DIS 18 18 DCP_CURSOR2_MEM_PWR_FORCE 21 22 DCP_CURSOR2_MEM_PWR_DIS 23 23 mmDCFE0_DCFE_MEM_PWR_CTRL2 0 0x1b04 0 0 4294967295 mmDCFE1_DCFE_MEM_PWR_CTRL2 0 0x1d04 0 0 4294967295 mmDCFE2_DCFE_MEM_PWR_CTRL2 0 0x1f04 0 0 4294967295 mmDCFE3_DCFE_MEM_PWR_CTRL2 0 0x4104 0 0 4294967295 mmDCFE4_DCFE_MEM_PWR_CTRL2 0 0x4304 0 0 4294967295 mmDCFE5_DCFE_MEM_PWR_CTRL2 0 0x4504 0 0 4294967295 mmDCFE_MEM_PWR_STATUS 0 0x1b05 12 0 4294967295 DCP_LUT_MEM_PWR_STATE 0 1 DCP_REGAMMA_MEM_PWR_STATE 2 3 SCL_COEFF_MEM_PWR_STATE 4 5 DCP_CURSOR_MEM_PWR_STATE 6 7 DCP_CURSOR2_MEM_PWR_STATE 8 9 LB0_ALPHA_MEM_PWR_STATE 10 11 LB1_ALPHA_MEM_PWR_STATE 12 13 LB2_ALPHA_MEM_PWR_STATE 14 15 LB0_MEM_PWR_STATE 16 17 LB1_MEM_PWR_STATE 18 19 LB2_MEM_PWR_STATE 20 21 BLND_MEM_PWR_STATE 22 23 mmDCFE0_DCFE_MEM_PWR_STATUS 0 0x1b05 0 0 4294967295 mmDCFE1_DCFE_MEM_PWR_STATUS 0 0x1d05 0 0 4294967295 mmDCFE2_DCFE_MEM_PWR_STATUS 0 0x1f05 0 0 4294967295 mmDCFE3_DCFE_MEM_PWR_STATUS 0 0x4105 0 0 4294967295 mmDCFE4_DCFE_MEM_PWR_STATUS 0 0x4305 0 0 4294967295 mmDCFE5_DCFE_MEM_PWR_STATUS 0 0x4505 0 0 4294967295 mmDCFE_MISC 0 0x1b06 1 0 4294967295 DCFE_DPG_ALLOW_SR_ECO_EN 0 0 mmDCFE0_DCFE_MISC 0 0x1b06 0 0 4294967295 mmDCFE1_DCFE_MISC 0 0x1d06 0 0 4294967295 mmDCFE2_DCFE_MISC 0 0x1f06 0 0 4294967295 mmDCFE3_DCFE_MISC 0 0x4106 0 0 4294967295 mmDCFE4_DCFE_MISC 0 0x4306 0 0 4294967295 mmDCFE5_DCFE_MISC 0 0x4506 0 0 4294967295 mmDCFE_FLUSH 0 0x1b07 5 0 4294967295 FLUSH_OCCURED 0 0 CLEAR_FLUSH_OCCURED 1 1 FLUSH_DEEP 2 2 CLEAR_FLUSH_DEEP 3 3 ALL_MC_REQ_RET 4 4 mmDCFE0_DCFE_FLUSH 0 0x1b07 0 0 4294967295 mmDCFE1_DCFE_FLUSH 0 0x1d07 0 0 4294967295 mmDCFE2_DCFE_FLUSH 0 0x1f07 0 0 4294967295 mmDCFE3_DCFE_FLUSH 0 0x4107 0 0 4294967295 mmDCFE4_DCFE_FLUSH 0 0x4307 0 0 4294967295 mmDCFE5_DCFE_FLUSH 0 0x4507 0 0 4294967295 mmDCFEV_CLOCK_CONTROL 0 0x46f4 8 0 4294967295 DISPCLK_R_DCFEV_GATE_DISABLE 3 3 DISPCLK_G_UNP_GATE_DISABLE 7 7 DISPCLK_G_SCLV_GATE_DISABLE 9 9 DISPCLK_G_COL_MAN_GATE_DISABLE 11 11 DISPCLK_G_PSCLV_GATE_DISABLE 13 13 DISPCLK_G_CRTC_GATE_DISABLE 15 15 DCFEV_TEST_CLK_SEL 24 28 DCFEV_CLOCK_ENABLE 31 31 mmDCFEV0_DCFEV_CLOCK_CONTROL 0 0x46f4 0 0 4294967295 mmDCFEV1_DCFEV_CLOCK_CONTROL 0 0x98f4 0 0 4294967295 mmDCFEV_SOFT_RESET 0 0x46f5 7 0 4294967295 UNP_PIXPIPE_SOFT_RESET 0 0 UNP_REQ_SOFT_RESET 1 1 SCLV_ALU_SOFT_RESET 2 2 SCLV_SOFT_RESET 3 3 CRTC_SOFT_RESET 4 4 PSCLV_SOFT_RESET 5 5 COL_MAN_SOFT_RESET 6 6 mmDCFEV0_DCFEV_SOFT_RESET 0 0x46f5 0 0 4294967295 mmDCFEV1_DCFEV_SOFT_RESET 0 0x98f5 0 0 4294967295 mmDCFEV_DMIFV_CLOCK_CONTROL 0 0x46f6 6 0 4294967295 DMIFV_SCLK_G_DMIFTRK_GATE_DIS 3 3 DMIFV_DISPCLK_G_DMIFVL_GATE_DIS 4 4 DMIFV_DISPCLK_G_DMIFVC_GATE_DIS 5 5 DMIFV_SOFT_RESET 6 6 DMIFV_TEST_CLK_SEL 24 28 DMIFV_BUFFER_MODE 31 31 mmDCFEV0_DCFEV_DMIFV_CLOCK_CONTROL 0 0x46f6 0 0 4294967295 mmDCFEV1_DCFEV_DMIFV_CLOCK_CONTROL 0 0x98f6 0 0 4294967295 mmDCFEV_DBG_CONFIG 0 0x46f7 2 0 4294967295 DCFEV_DBG_EN 0 0 DCFEV_DBG_SEL 4 7 mmDCFEV0_DCFEV_DBG_CONFIG 0 0x46f7 0 0 4294967295 mmDCFEV1_DCFEV_DBG_CONFIG 0 0x98f7 0 0 4294967295 mmDCFEV_DMIFV_MEM_PWR_CTRL 0 0x46f8 11 0 4294967295 DMIFV_MEM_PWR_SEL 0 1 DMIFV_MEM_PWR_LUMA_0_FORCE 2 2 DMIFV_MEM_PWR_LUMA_1_FORCE 3 3 DMIFV_MEM_PWR_LUMA_2_FORCE 4 4 DMIFV_MEM_PWR_LUMA_3_FORCE 5 5 DMIFV_MEM_PWR_LUMA_4_FORCE 6 6 DMIFV_MEM_PWR_CHROMA_0_FORCE 7 7 DMIFV_MEM_PWR_CHROMA_1_FORCE 8 8 DMIFV_MEM_PWR_CHROMA_2_FORCE 9 9 DMIFV_MEM_PWR_CHROMA_3_FORCE 10 10 DMIFV_MEM_PWR_CHROMA_4_FORCE 11 11 mmDCFEV0_DCFEV_DMIFV_MEM_PWR_CTRL 0 0x46f8 0 0 4294967295 mmDCFEV1_DCFEV_DMIFV_MEM_PWR_CTRL 0 0x98f8 0 0 4294967295 mmDCFEV_DMIFV_MEM_PWR_STATUS 0 0x46f9 10 0 4294967295 DMIFV_MEM_PWR_LUMA_0_STATE 0 1 DMIFV_MEM_PWR_LUMA_1_STATE 2 3 DMIFV_MEM_PWR_LUMA_2_STATE 4 5 DMIFV_MEM_PWR_LUMA_3_STATE 6 7 DMIFV_MEM_PWR_LUMA_4_STATE 8 9 DMIFV_MEM_PWR_CHROMA_0_STATE 10 11 DMIFV_MEM_PWR_CHROMA_1_STATE 12 13 DMIFV_MEM_PWR_CHROMA_2_STATE 14 15 DMIFV_MEM_PWR_CHROMA_3_STATE 16 17 DMIFV_MEM_PWR_CHROMA_4_STATE 18 19 mmDCFEV0_DCFEV_DMIFV_MEM_PWR_STATUS 0 0x46f9 0 0 4294967295 mmDCFEV1_DCFEV_DMIFV_MEM_PWR_STATUS 0 0x98f9 0 0 4294967295 mmDCFEV_MEM_PWR_CTRL 0 0x46fa 12 0 4294967295 COL_MAN_GAMMA_CORR_MEM_PWR_FORCE 0 1 COL_MAN_GAMMA_CORR_MEM_PWR_DIS 2 2 COL_MAN_INPUT_GAMMA_MEM_PWR_FORCE 3 4 COL_MAN_INPUT_GAMMA_MEM_PWR_DIS 5 5 SCLV_COEFF_MEM_PWR_FORCE 6 7 SCLV_COEFF_MEM_PWR_DIS 8 8 LBV0_MEM_PWR_FORCE 9 10 LBV0_MEM_PWR_DIS 11 11 LBV1_MEM_PWR_FORCE 12 13 LBV1_MEM_PWR_DIS 14 14 LBV2_MEM_PWR_FORCE 15 16 LBV2_MEM_PWR_DIS 17 17 mmDCFEV0_DCFEV_MEM_PWR_CTRL 0 0x46fa 0 0 4294967295 mmDCFEV1_DCFEV_MEM_PWR_CTRL 0 0x98fa 0 0 4294967295 mmDCFEV_MEM_PWR_CTRL2 0 0x46fb 4 0 4294967295 COL_MAN_GAMMA_CORR_MEM_PWR_MODE_SEL 0 1 COL_MAN_INPUT_GAMMA_MEM_PWR_MODE_SEL 2 3 SCLV_COEFF_MEM_PWR_MODE_SEL 4 5 LBV_MEM_PWR_MODE_SEL 6 7 mmDCFEV0_DCFEV_MEM_PWR_CTRL2 0 0x46fb 0 0 4294967295 mmDCFEV1_DCFEV_MEM_PWR_CTRL2 0 0x98fb 0 0 4294967295 mmDCFEV_MEM_PWR_STATUS 0 0x46fc 7 0 4294967295 COL_MAN_GAMMA_CORR_MEM_PWR_STATE 0 1 COL_MAN_INPUT_GAMMA_MEM_PWR_STATE 2 3 SCLV_COEFF_MEM_PWR_STATE 4 5 LBV0_MEM_PWR_STATE 6 7 LBV1_MEM_PWR_STATE 8 9 LBV2_MEM_PWR_STATE 10 11 LBV3_MEM_PWR_STATE 12 13 mmDCFEV0_DCFEV_MEM_PWR_STATUS 0 0x46fc 0 0 4294967295 mmDCFEV1_DCFEV_MEM_PWR_STATUS 0 0x98fc 0 0 4294967295 mmDCFEV_L_FLUSH 0 0x46ff 5 0 4294967295 FLUSH_OCCURED 0 0 CLEAR_FLUSH_OCCURED 1 1 FLUSH_DEEP 2 2 CLEAR_FLUSH_DEEP 3 3 ALL_MC_REQ_RET 4 4 mmDCFEV0_DCFEV_L_FLUSH 0 0x46ff 0 0 4294967295 mmDCFEV1_DCFEV_L_FLUSH 0 0x98ff 0 0 4294967295 mmDCFEV_C_FLUSH 0 0x4700 5 0 4294967295 FLUSH_OCCURED 0 0 CLEAR_FLUSH_OCCURED 1 1 FLUSH_DEEP 2 2 CLEAR_FLUSH_DEEP 3 3 ALL_MC_REQ_RET 4 4 mmDCFEV0_DCFEV_C_FLUSH 0 0x4700 0 0 4294967295 mmDCFEV1_DCFEV_C_FLUSH 0 0x9900 0 0 4294967295 mmDCFEV_DMIFV_DEBUG 0 0x46fd 3 0 4294967295 DMIFV_DEBUG_BUS_SEL 0 3 DMIFV_DEBUG_LUMA_VS_CHROMA 4 4 DMIFV_DEBUG_LOWER_UPPER 5 5 mmDCFEV0_DCFEV_DMIFV_DEBUG 0 0x46fd 0 0 4294967295 mmDCFEV1_DCFEV_DMIFV_DEBUG 0 0x98fd 0 0 4294967295 mmDCFEV_MISC 0 0x46fe 1 0 4294967295 DCFEV_DPG_ALLOW_SR_ECO_EN 0 0 mmDCFEV0_DCFEV_MISC 0 0x46fe 0 0 4294967295 mmDCFEV1_DCFEV_MISC 0 0x98fe 0 0 4294967295 mmDC_HPD_INT_STATUS 0 0x1898 6 0 4294967295 DC_HPD_INT_STATUS 0 0 DC_HPD_SENSE 1 1 DC_HPD_SENSE_DELAYED 4 4 DC_HPD_RX_INT_STATUS 8 8 DC_HPD_TOGGLE_FILT_CON_TIMER_VAL 12 19 DC_HPD_TOGGLE_FILT_DISCON_TIMER_VAL 24 31 mmHPD0_DC_HPD_INT_STATUS 0 0x1898 0 0 4294967295 mmHPD1_DC_HPD_INT_STATUS 0 0x18a0 0 0 4294967295 mmHPD2_DC_HPD_INT_STATUS 0 0x18a8 0 0 4294967295 mmHPD3_DC_HPD_INT_STATUS 0 0x18b0 0 0 4294967295 mmHPD4_DC_HPD_INT_STATUS 0 0x18b8 0 0 4294967295 mmHPD5_DC_HPD_INT_STATUS 0 0x18c0 0 0 4294967295 mmDC_HPD_INT_CONTROL 0 0x1899 5 0 4294967295 DC_HPD_INT_ACK 0 0 DC_HPD_INT_POLARITY 8 8 DC_HPD_INT_EN 16 16 DC_HPD_RX_INT_ACK 20 20 DC_HPD_RX_INT_EN 24 24 mmHPD0_DC_HPD_INT_CONTROL 0 0x1899 0 0 4294967295 mmHPD1_DC_HPD_INT_CONTROL 0 0x18a1 0 0 4294967295 mmHPD2_DC_HPD_INT_CONTROL 0 0x18a9 0 0 4294967295 mmHPD3_DC_HPD_INT_CONTROL 0 0x18b1 0 0 4294967295 mmHPD4_DC_HPD_INT_CONTROL 0 0x18b9 0 0 4294967295 mmHPD5_DC_HPD_INT_CONTROL 0 0x18c1 0 0 4294967295 mmDC_HPD_CONTROL 0 0x189a 3 0 4294967295 DC_HPD_CONNECTION_TIMER 0 12 DC_HPD_RX_INT_TIMER 16 25 DC_HPD_EN 28 28 mmHPD0_DC_HPD_CONTROL 0 0x189a 0 0 4294967295 mmHPD1_DC_HPD_CONTROL 0 0x18a2 0 0 4294967295 mmHPD2_DC_HPD_CONTROL 0 0x18aa 0 0 4294967295 mmHPD3_DC_HPD_CONTROL 0 0x18b2 0 0 4294967295 mmHPD4_DC_HPD_CONTROL 0 0x18ba 0 0 4294967295 mmHPD5_DC_HPD_CONTROL 0 0x18c2 0 0 4294967295 mmDC_HPD_FAST_TRAIN_CNTL 0 0x189b 4 0 4294967295 DC_HPD_CONNECT_AUX_TX_DELAY 0 7 DC_HPD_CONNECT_FAST_TRAIN_DELAY 12 19 DC_HPD_CONNECT_AUX_TX_EN 24 24 DC_HPD_CONNECT_FAST_TRAIN_EN 28 28 mmHPD0_DC_HPD_FAST_TRAIN_CNTL 0 0x189b 0 0 4294967295 mmHPD1_DC_HPD_FAST_TRAIN_CNTL 0 0x18a3 0 0 4294967295 mmHPD2_DC_HPD_FAST_TRAIN_CNTL 0 0x18ab 0 0 4294967295 mmHPD3_DC_HPD_FAST_TRAIN_CNTL 0 0x18b3 0 0 4294967295 mmHPD4_DC_HPD_FAST_TRAIN_CNTL 0 0x18bb 0 0 4294967295 mmHPD5_DC_HPD_FAST_TRAIN_CNTL 0 0x18c3 0 0 4294967295 mmDC_HPD_TOGGLE_FILT_CNTL 0 0x189c 2 0 4294967295 DC_HPD_CONNECT_INT_DELAY 0 7 DC_HPD_DISCONNECT_INT_DELAY 20 27 mmHPD0_DC_HPD_TOGGLE_FILT_CNTL 0 0x189c 0 0 4294967295 mmHPD1_DC_HPD_TOGGLE_FILT_CNTL 0 0x18a4 0 0 4294967295 mmHPD2_DC_HPD_TOGGLE_FILT_CNTL 0 0x18ac 0 0 4294967295 mmHPD3_DC_HPD_TOGGLE_FILT_CNTL 0 0x18b4 0 0 4294967295 mmHPD4_DC_HPD_TOGGLE_FILT_CNTL 0 0x18bc 0 0 4294967295 mmHPD5_DC_HPD_TOGGLE_FILT_CNTL 0 0x18c4 0 0 4294967295 mmDCO_SCRATCH0 0 0x184e 1 0 4294967295 DCO_SCRATCH0 0 31 mmDCO_SCRATCH1 0 0x184f 1 0 4294967295 DCO_SCRATCH1 0 31 mmDCO_SCRATCH2 0 0x1850 1 0 4294967295 DCO_SCRATCH2 0 31 mmDCO_SCRATCH3 0 0x1851 1 0 4294967295 DCO_SCRATCH3 0 31 mmDCO_SCRATCH4 0 0x1852 1 0 4294967295 DCO_SCRATCH4 0 31 mmDCO_SCRATCH5 0 0x1853 1 0 4294967295 DCO_SCRATCH5 0 31 mmDCO_SCRATCH6 0 0x1854 1 0 4294967295 DCO_SCRATCH6 0 31 mmDCO_SCRATCH7 0 0x1855 1 0 4294967295 DCO_SCRATCH7 0 31 mmDCE_VCE_CONTROL 0 0x1856 2 0 4294967295 DC_VCE_VIDEO_PIPE_SELECT 0 2 DC_VCE_AUDIO_STREAM_SELECT 4 6 mmDISP_INTERRUPT_STATUS 0 0x1857 28 0 4294967295 SCL_DISP1_MODE_CHANGE_INTERRUPT 0 0 D1BLND_DATA_UNDERFLOW_INTERRUPT 1 1 LB_D1_VLINE_INTERRUPT 2 2 LB_D1_VBLANK_INTERRUPT 3 3 CRTC1_SNAPSHOT_INTERRUPT 4 4 CRTC1_FORCE_VSYNC_NEXT_LINE_INTERRUPT 5 5 CRTC1_FORCE_COUNT_NOW_INTERRUPT 6 6 CRTC1_TRIGA_INTERRUPT 7 7 CRTC1_TRIGB_INTERRUPT 8 8 CRTC1_VSYNC_NOM_INTERRUPT 9 9 CRTC1_SET_V_TOTAL_MIN_EVENT_OCCURED_INT 10 10 DIGA_DP_FAST_TRAINING_COMPLETE_INTERRUPT 15 15 DIGA_DP_VID_STREAM_DISABLE_INTERRUPT 16 16 DC_HPD1_INTERRUPT 17 17 DC_HPD1_RX_INTERRUPT 18 18 AUX1_SW_DONE_INTERRUPT 19 19 AUX1_LS_DONE_INTERRUPT 20 20 DIGA_DISPCLK_SWITCH_ALLOWED_INTERRUPT 21 21 DACA_AUTODETECT_INTERRUPT 22 22 DACB_AUTODETECT_INTERRUPT 23 23 DC_I2C_SW_DONE_INTERRUPT 24 24 DC_I2C_HW_DONE_INTERRUPT 25 25 DMCU_UC_INTERNAL_INT 26 26 DMCU_SCP_INT 27 27 ABM1_HG_READY_INT 28 28 ABM1_LS_READY_INT 29 29 ABM1_BL_UPDATE_INT 30 30 DISP_INTERRUPT_STATUS_CONTINUE 31 31 mmDISP_INTERRUPT_STATUS_CONTINUE 0 0x1858 27 0 4294967295 SCL_DISP2_MODE_CHANGE_INTERRUPT 0 0 D2BLND_DATA_UNDERFLOW_INTERRUPT 1 1 LB_D2_VLINE_INTERRUPT 2 2 LB_D2_VBLANK_INTERRUPT 3 3 CRTC2_SNAPSHOT_INTERRUPT 4 4 CRTC2_FORCE_VSYNC_NEXT_LINE_INTERRUPT 5 5 CRTC2_FORCE_COUNT_NOW_INTERRUPT 6 6 CRTC2_TRIGA_INTERRUPT 7 7 CRTC2_TRIGB_INTERRUPT 8 8 CRTC2_VSYNC_NOM_INTERRUPT 9 9 CRTC2_SET_V_TOTAL_MIN_EVENT_OCCURED_INT 10 10 DIGB_DP_FAST_TRAINING_COMPLETE_INTERRUPT 15 15 DIGB_DP_VID_STREAM_DISABLE_INTERRUPT 16 16 DC_HPD2_INTERRUPT 17 17 DC_HPD2_RX_INTERRUPT 18 18 AUX2_SW_DONE_INTERRUPT 19 19 AUX2_LS_DONE_INTERRUPT 20 20 LB_D1_VLINE2_INTERRUPT 21 21 LB_D2_VLINE2_INTERRUPT 22 22 LB_D3_VLINE2_INTERRUPT 23 23 CRTC1_EXT_TIMING_SYNC_LOSS_INTERRUPT 25 25 CRTC1_EXT_TIMING_SYNC_INTERRUPT 26 26 CRTC1_EXT_TIMING_SYNC_SIGNAL_INTERRUPT 27 27 CRTC1_VERTICAL_INTERRUPT0 28 28 CRTC1_VERTICAL_INTERRUPT1 29 29 CRTC1_VERTICAL_INTERRUPT2 30 30 DISP_INTERRUPT_STATUS_CONTINUE2 31 31 mmDISP_INTERRUPT_STATUS_CONTINUE2 0 0x1859 27 0 4294967295 SCL_DISP3_MODE_CHANGE_INTERRUPT 0 0 D3BLND_DATA_UNDERFLOW_INTERRUPT 1 1 LB_D3_VLINE_INTERRUPT 2 2 LB_D3_VBLANK_INTERRUPT 3 3 CRTC3_SNAPSHOT_INTERRUPT 4 4 CRTC3_FORCE_VSYNC_NEXT_LINE_INTERRUPT 5 5 CRTC3_FORCE_COUNT_NOW_INTERRUPT 6 6 CRTC3_TRIGA_INTERRUPT 7 7 CRTC3_TRIGB_INTERRUPT 8 8 CRTC3_VSYNC_NOM_INTERRUPT 9 9 CRTC3_SET_V_TOTAL_MIN_EVENT_OCCURED_INT 10 10 DIGC_DP_FAST_TRAINING_COMPLETE_INTERRUPT 15 15 DIGC_DP_VID_STREAM_DISABLE_INTERRUPT 16 16 DC_HPD3_INTERRUPT 17 17 DC_HPD3_RX_INTERRUPT 18 18 AUX3_SW_DONE_INTERRUPT 19 19 AUX3_LS_DONE_INTERRUPT 20 20 LB_D4_VLINE2_INTERRUPT 21 21 LB_D5_VLINE2_INTERRUPT 22 22 LB_D6_VLINE2_INTERRUPT 23 23 CRTC2_EXT_TIMING_SYNC_LOSS_INTERRUPT 25 25 CRTC2_EXT_TIMING_SYNC_INTERRUPT 26 26 CRTC2_EXT_TIMING_SYNC_SIGNAL_INTERRUPT 27 27 CRTC2_VERTICAL_INTERRUPT0 28 28 CRTC2_VERTICAL_INTERRUPT1 29 29 CRTC2_VERTICAL_INTERRUPT2 30 30 DISP_INTERRUPT_STATUS_CONTINUE3 31 31 mmDISP_INTERRUPT_STATUS_CONTINUE3 0 0x185a 27 0 4294967295 SCL_DISP4_MODE_CHANGE_INTERRUPT 0 0 D4BLND_DATA_UNDERFLOW_INTERRUPT 1 1 LB_D4_VLINE_INTERRUPT 2 2 LB_D4_VBLANK_INTERRUPT 3 3 CRTC4_SNAPSHOT_INTERRUPT 4 4 CRTC4_FORCE_VSYNC_NEXT_LINE_INTERRUPT 5 5 CRTC4_FORCE_COUNT_NOW_INTERRUPT 6 6 CRTC4_TRIGA_INTERRUPT 7 7 CRTC4_TRIGB_INTERRUPT 8 8 CRTC4_VSYNC_NOM_INTERRUPT 9 9 CRTC4_SET_V_TOTAL_MIN_EVENT_OCCURED_INT 10 10 DIGD_DP_FAST_TRAINING_COMPLETE_INTERRUPT 15 15 DIGD_DP_VID_STREAM_DISABLE_INTERRUPT 16 16 DC_HPD4_INTERRUPT 17 17 DC_HPD4_RX_INTERRUPT 18 18 AUX4_SW_DONE_INTERRUPT 19 19 AUX4_LS_DONE_INTERRUPT 20 20 BUFMGR_IHIF_INTERRUPT 21 21 WBSCL_HOST_CONFLICT_INTERRUPT 22 22 WBSCL_DATA_OVERFLOW_INTERRUPT 23 23 CRTC3_EXT_TIMING_SYNC_LOSS_INTERRUPT 25 25 CRTC3_EXT_TIMING_SYNC_INTERRUPT 26 26 CRTC3_EXT_TIMING_SYNC_SIGNAL_INTERRUPT 27 27 CRTC3_VERTICAL_INTERRUPT0 28 28 CRTC3_VERTICAL_INTERRUPT1 29 29 CRTC3_VERTICAL_INTERRUPT2 30 30 DISP_INTERRUPT_STATUS_CONTINUE4 31 31 mmDISP_INTERRUPT_STATUS_CONTINUE4 0 0x185b 27 0 4294967295 SCL_DISP5_MODE_CHANGE_INTERRUPT 0 0 D5BLND_DATA_UNDERFLOW_INTERRUPT 1 1 LB_D5_VLINE_INTERRUPT 2 2 LB_D5_VBLANK_INTERRUPT 3 3 CRTC5_SNAPSHOT_INTERRUPT 4 4 CRTC5_FORCE_VSYNC_NEXT_LINE_INTERRUPT 5 5 CRTC5_FORCE_COUNT_NOW_INTERRUPT 6 6 CRTC5_TRIGA_INTERRUPT 7 7 CRTC5_TRIGB_INTERRUPT 8 8 CRTC5_VSYNC_NOM_INTERRUPT 9 9 CRTC5_SET_V_TOTAL_MIN_EVENT_OCCURED_INT 10 10 DIGE_DP_FAST_TRAINING_COMPLETE_INTERRUPT 15 15 DIGE_DP_VID_STREAM_DISABLE_INTERRUPT 16 16 DC_HPD5_INTERRUPT 17 17 DC_HPD5_RX_INTERRUPT 18 18 AUX5_SW_DONE_INTERRUPT 19 19 AUX5_LS_DONE_INTERRUPT 20 20 CRTC4_EXT_TIMING_SYNC_LOSS_INTERRUPT 22 22 CRTC4_EXT_TIMING_SYNC_INTERRUPT 23 23 CRTC4_EXT_TIMING_SYNC_SIGNAL_INTERRUPT 24 24 CRTC5_EXT_TIMING_SYNC_LOSS_INTERRUPT 25 25 CRTC5_EXT_TIMING_SYNC_INTERRUPT 26 26 CRTC5_EXT_TIMING_SYNC_SIGNAL_INTERRUPT 27 27 CRTC4_VERTICAL_INTERRUPT0 28 28 CRTC4_VERTICAL_INTERRUPT1 29 29 CRTC4_VERTICAL_INTERRUPT2 30 30 DISP_INTERRUPT_STATUS_CONTINUE5 31 31 mmDISP_INTERRUPT_STATUS_CONTINUE5 0 0x185c 27 0 4294967295 SCL_DISP6_MODE_CHANGE_INTERRUPT 0 0 D6BLND_DATA_UNDERFLOW_INTERRUPT 1 1 LB_D6_VLINE_INTERRUPT 2 2 LB_D6_VBLANK_INTERRUPT 3 3 CRTC6_SNAPSHOT_INTERRUPT 4 4 CRTC6_FORCE_VSYNC_NEXT_LINE_INTERRUPT 5 5 CRTC6_FORCE_COUNT_NOW_INTERRUPT 6 6 CRTC6_TRIGA_INTERRUPT 7 7 CRTC6_TRIGB_INTERRUPT 8 8 CRTC6_VSYNC_NOM_INTERRUPT 9 9 CRTC6_SET_V_TOTAL_MIN_EVENT_OCCURED_INT 10 10 DIGF_DP_FAST_TRAINING_COMPLETE_INTERRUPT 15 15 DIGF_DP_VID_STREAM_DISABLE_INTERRUPT 16 16 DC_HPD6_INTERRUPT 17 17 DC_HPD6_RX_INTERRUPT 18 18 AUX6_SW_DONE_INTERRUPT 19 19 AUX6_LS_DONE_INTERRUPT 20 20 CRTC6_EXT_TIMING_SYNC_LOSS_INTERRUPT 22 22 CRTC6_EXT_TIMING_SYNC_INTERRUPT 23 23 CRTC6_EXT_TIMING_SYNC_SIGNAL_INTERRUPT 24 24 CRTC5_VERTICAL_INTERRUPT0 25 25 CRTC5_VERTICAL_INTERRUPT1 26 26 CRTC5_VERTICAL_INTERRUPT2 27 27 CRTC6_VERTICAL_INTERRUPT0 28 28 CRTC6_VERTICAL_INTERRUPT1 29 29 CRTC6_VERTICAL_INTERRUPT2 30 30 DISP_INTERRUPT_STATUS_CONTINUE6 31 31 mmDISP_INTERRUPT_STATUS_CONTINUE6 0 0x185d 26 0 4294967295 DCRX_PERFMON_COUNTER0_INTERRUPT 0 0 DCRX_PERFMON_COUNTER1_INTERRUPT 1 1 DCRX_PERFMON_COUNTER2_INTERRUPT 2 2 DCRX_PERFMON_COUNTER3_INTERRUPT 3 3 DCRX_PERFMON_COUNTER4_INTERRUPT 4 4 DCRX_PERFMON_COUNTER5_INTERRUPT 5 5 DCRX_PERFMON_COUNTER6_INTERRUPT 6 6 DCRX_PERFMON_COUNTER7_INTERRUPT 7 7 DCRX_PERFMON_COUNTER_OFF_INTERRUPT 8 8 BUFMGR_CWB0_IHIF_INTERRUPT 9 9 BUFMGR_CWB1_IHIF_INTERRUPT 10 10 DIGG_DP_FAST_TRAINING_COMPLETE_INTERRUPT 15 15 DIGG_DP_VID_STREAM_DISABLE_INTERRUPT 16 16 AUX1_GTC_SYNC_LOCK_DONE_INTERRUPT 17 17 AUX1_GTC_SYNC_ERROR_INTERRUPT 18 18 AUX2_GTC_SYNC_LOCK_DONE_INTERRUPT 19 19 AUX2_GTC_SYNC_ERROR_INTERRUPT 20 20 AUX3_GTC_SYNC_LOCK_DONE_INTERRUPT 21 21 AUX3_GTC_SYNC_ERROR_INTERRUPT 22 22 AUX4_GTC_SYNC_LOCK_DONE_INTERRUPT 23 23 AUX4_GTC_SYNC_ERROR_INTERRUPT 24 24 AUX5_GTC_SYNC_LOCK_DONE_INTERRUPT 25 25 AUX5_GTC_SYNC_ERROR_INTERRUPT 26 26 AUX6_GTC_SYNC_LOCK_DONE_INTERRUPT 27 27 AUX6_GTC_SYNC_ERROR_INTERRUPT 28 28 DISP_INTERRUPT_STATUS_CONTINUE7 31 31 mmDISP_INTERRUPT_STATUS_CONTINUE7 0 0x185e 32 0 4294967295 DCCG_PERFMON_COUNTER0_INTERRUPT 0 0 DCCG_PERFMON_COUNTER1_INTERRUPT 1 1 DCCG_PERFMON_COUNTER2_INTERRUPT 2 2 DCCG_PERFMON_COUNTER3_INTERRUPT 3 3 DCCG_PERFMON_COUNTER4_INTERRUPT 4 4 DCCG_PERFMON_COUNTER5_INTERRUPT 5 5 DCCG_PERFMON_COUNTER6_INTERRUPT 6 6 DCCG_PERFMON_COUNTER7_INTERRUPT 7 7 DCCG_PERFMON_COUNTER_OFF_INTERRUPT 8 8 DCI_PERFMON_COUNTER0_INTERRUPT 9 9 DCI_PERFMON_COUNTER1_INTERRUPT 10 10 DCI_PERFMON_COUNTER2_INTERRUPT 11 11 DCI_PERFMON_COUNTER3_INTERRUPT 12 12 DCI_PERFMON_COUNTER4_INTERRUPT 13 13 DCI_PERFMON_COUNTER5_INTERRUPT 14 14 DCI_PERFMON_COUNTER6_INTERRUPT 15 15 DCI_PERFMON_COUNTER7_INTERRUPT 16 16 DCI_PERFMON_COUNTER_OFF_INTERRUPT 17 17 DCO_PERFMON_COUNTER0_INTERRUPT 18 18 DCO_PERFMON_COUNTER1_INTERRUPT 19 19 DCO_PERFMON_COUNTER2_INTERRUPT 20 20 DCO_PERFMON_COUNTER3_INTERRUPT 21 21 DCO_PERFMON_COUNTER4_INTERRUPT 22 22 DCO_PERFMON_COUNTER5_INTERRUPT 23 23 DCO_PERFMON_COUNTER6_INTERRUPT 24 24 DCO_PERFMON_COUNTER7_INTERRUPT 25 25 DCO_PERFMON_COUNTER_OFF_INTERRUPT 26 26 WB_PERFMON_COUNTER0_INTERRUPT 27 27 WB_PERFMON_COUNTER1_INTERRUPT 28 28 WB_PERFMON_COUNTER2_INTERRUPT 29 29 WB_PERFMON_COUNTER3_INTERRUPT 30 30 DISP_INTERRUPT_STATUS_CONTINUE8 31 31 mmDISP_INTERRUPT_STATUS_CONTINUE8 0 0x185f 32 0 4294967295 DCFE0_PERFMON_COUNTER0_INTERRUPT 0 0 DCFE0_PERFMON_COUNTER1_INTERRUPT 1 1 DCFE0_PERFMON_COUNTER2_INTERRUPT 2 2 DCFE0_PERFMON_COUNTER3_INTERRUPT 3 3 DCFE0_PERFMON_COUNTER4_INTERRUPT 4 4 DCFE0_PERFMON_COUNTER5_INTERRUPT 5 5 DCFE0_PERFMON_COUNTER6_INTERRUPT 6 6 DCFE0_PERFMON_COUNTER7_INTERRUPT 7 7 DCFE0_PERFMON_COUNTER_OFF_INTERRUPT 8 8 DCFE1_PERFMON_COUNTER0_INTERRUPT 9 9 DCFE1_PERFMON_COUNTER1_INTERRUPT 10 10 DCFE1_PERFMON_COUNTER2_INTERRUPT 11 11 DCFE1_PERFMON_COUNTER3_INTERRUPT 12 12 DCFE1_PERFMON_COUNTER4_INTERRUPT 13 13 DCFE1_PERFMON_COUNTER5_INTERRUPT 14 14 DCFE1_PERFMON_COUNTER6_INTERRUPT 15 15 DCFE1_PERFMON_COUNTER7_INTERRUPT 16 16 DCFE1_PERFMON_COUNTER_OFF_INTERRUPT 17 17 DCFE2_PERFMON_COUNTER0_INTERRUPT 18 18 DCFE2_PERFMON_COUNTER1_INTERRUPT 19 19 DCFE2_PERFMON_COUNTER2_INTERRUPT 20 20 DCFE2_PERFMON_COUNTER3_INTERRUPT 21 21 DCFE2_PERFMON_COUNTER4_INTERRUPT 22 22 DCFE2_PERFMON_COUNTER5_INTERRUPT 23 23 DCFE2_PERFMON_COUNTER6_INTERRUPT 24 24 DCFE2_PERFMON_COUNTER7_INTERRUPT 25 25 DCFE2_PERFMON_COUNTER_OFF_INTERRUPT 26 26 WB_PERFMON_COUNTER4_INTERRUPT 27 27 WB_PERFMON_COUNTER5_INTERRUPT 28 28 WB_PERFMON_COUNTER6_INTERRUPT 29 29 WB_PERFMON_COUNTER7_INTERRUPT 30 30 DISP_INTERRUPT_STATUS_CONTINUE9 31 31 mmDISP_INTERRUPT_STATUS_CONTINUE9 0 0x1860 29 0 4294967295 DCFE3_PERFMON_COUNTER0_INTERRUPT 0 0 DCFE3_PERFMON_COUNTER1_INTERRUPT 1 1 DCFE3_PERFMON_COUNTER2_INTERRUPT 2 2 DCFE3_PERFMON_COUNTER3_INTERRUPT 3 3 DCFE3_PERFMON_COUNTER4_INTERRUPT 4 4 DCFE3_PERFMON_COUNTER5_INTERRUPT 5 5 DCFE3_PERFMON_COUNTER6_INTERRUPT 6 6 DCFE3_PERFMON_COUNTER7_INTERRUPT 7 7 DCFE3_PERFMON_COUNTER_OFF_INTERRUPT 8 8 DCFE4_PERFMON_COUNTER0_INTERRUPT 9 9 DCFE4_PERFMON_COUNTER1_INTERRUPT 10 10 DCFE4_PERFMON_COUNTER2_INTERRUPT 11 11 DCFE4_PERFMON_COUNTER3_INTERRUPT 12 12 DCFE4_PERFMON_COUNTER4_INTERRUPT 13 13 DCFE4_PERFMON_COUNTER5_INTERRUPT 14 14 DCFE4_PERFMON_COUNTER6_INTERRUPT 15 15 DCFE4_PERFMON_COUNTER7_INTERRUPT 16 16 DCFE4_PERFMON_COUNTER_OFF_INTERRUPT 17 17 DCFE5_PERFMON_COUNTER0_INTERRUPT 18 18 DCFE5_PERFMON_COUNTER1_INTERRUPT 19 19 DCFE5_PERFMON_COUNTER2_INTERRUPT 20 20 DCFE5_PERFMON_COUNTER3_INTERRUPT 21 21 DCFE5_PERFMON_COUNTER4_INTERRUPT 22 22 DCFE5_PERFMON_COUNTER5_INTERRUPT 23 23 DCFE5_PERFMON_COUNTER6_INTERRUPT 24 24 DCFE5_PERFMON_COUNTER7_INTERRUPT 25 25 DCFE5_PERFMON_COUNTER_OFF_INTERRUPT 26 26 WB_PERFMON_COUNTER_OFF_INTERRUPT 27 27 DISP_INTERRUPT_STATUS_CONTINUE10 31 31 mmDISP_INTERRUPT_STATUS_CONTINUE10 0 0x1875 13 0 4294967295 DIGLPA_DP_FAST_TRAINING_COMPLETE_INTERRUPT 4 4 DIGLPA_DP_VID_STREAM_DISABLE_INTERRUPT 5 5 DIGLPB_DP_FAST_TRAINING_COMPLETE_INTERRUPT 10 10 DIGLPB_DP_VID_STREAM_DISABLE_INTERRUPT 11 11 DCCG_PERFMON2_COUNTER0_INTERRUPT 12 12 DCCG_PERFMON2_COUNTER1_INTERRUPT 13 13 DCCG_PERFMON2_COUNTER2_INTERRUPT 14 14 DCCG_PERFMON2_COUNTER3_INTERRUPT 15 15 DCCG_PERFMON2_COUNTER4_INTERRUPT 16 16 DCCG_PERFMON2_COUNTER5_INTERRUPT 17 17 DCCG_PERFMON2_COUNTER6_INTERRUPT 18 18 DCCG_PERFMON2_COUNTER7_INTERRUPT 19 19 DCCG_PERFMON2_COUNTER_OFF_INTERRUPT 20 20 mmDCO_MEM_PWR_STATUS 0 0x1861 16 0 4294967295 I2C_MEM_PWR_STATE 0 0 MVP_MEM_PWR_STATE 2 2 DPA_MEM_PWR_STATE 3 3 DPB_MEM_PWR_STATE 4 4 DPC_MEM_PWR_STATE 5 5 DPD_MEM_PWR_STATE 6 6 DPE_MEM_PWR_STATE 7 7 DPF_MEM_PWR_STATE 8 8 DPG_MEM_PWR_STATE 9 9 HDMI0_MEM_PWR_STATE 10 11 HDMI1_MEM_PWR_STATE 12 13 HDMI2_MEM_PWR_STATE 14 15 HDMI3_MEM_PWR_STATE 16 17 HDMI4_MEM_PWR_STATE 18 19 HDMI5_MEM_PWR_STATE 20 21 HDMI6_MEM_PWR_STATE 22 23 mmDCO_MEM_PWR_STATUS1 0 0x1874 4 0 4294967295 DPLPA_MEM_PWR_STATE 0 0 DPLPB_MEM_PWR_STATE 1 1 HDMILP0_MEM_PWR_STATE 10 11 HDMILP1_MEM_PWR_STATE 12 13 mmDCO_MEM_PWR_CTRL 0 0x1862 24 0 4294967295 I2C_LIGHT_SLEEP_FORCE 0 0 I2C_LIGHT_SLEEP_DIS 1 1 MVP_LIGHT_SLEEP_DIS 3 3 DPA_LIGHT_SLEEP_DIS 4 4 DPB_LIGHT_SLEEP_DIS 5 5 DPC_LIGHT_SLEEP_DIS 6 6 DPD_LIGHT_SLEEP_DIS 7 7 DPE_LIGHT_SLEEP_DIS 8 8 DPF_LIGHT_SLEEP_DIS 9 9 DPG_LIGHT_SLEEP_DIS 10 10 HDMI0_MEM_PWR_FORCE 11 12 HDMI0_MEM_PWR_DIS 13 13 HDMI1_MEM_PWR_FORCE 14 15 HDMI1_MEM_PWR_DIS 16 16 HDMI2_MEM_PWR_FORCE 17 18 HDMI2_MEM_PWR_DIS 19 19 HDMI3_MEM_PWR_FORCE 20 21 HDMI3_MEM_PWR_DIS 22 22 HDMI4_MEM_PWR_FORCE 23 24 HDMI4_MEM_PWR_DIS 25 25 HDMI5_MEM_PWR_FORCE 26 27 HDMI5_MEM_PWR_DIS 28 28 HDMI6_MEM_PWR_FORCE 29 30 HDMI6_MEM_PWR_DIS 31 31 mmDCO_MEM_PWR_CTRL2 0 0x1863 7 0 4294967295 HDMI_MEM_PWR_MODE_SEL 0 1 DPLPA_LIGHT_SLEEP_DIS 2 2 DPLPB_LIGHT_SLEEP_DIS 3 3 HDMILP0_MEM_PWR_FORCE 16 17 HDMILP0_MEM_PWR_DIS 18 18 HDMILP1_MEM_PWR_FORCE 19 20 HDMILP1_MEM_PWR_DIS 21 21 mmFMT_MEMORY0_CONTROL 0 0x1888 4 0 4294967295 FMT420_MEM0_SOURCE_SEL 0 2 FMT420_MEM0_PWR_FORCE 4 5 FMT420_MEM0_PWR_DIS 8 8 FMT420_MEM0_PWR_STATE 12 13 mmFMT_MEMORY1_CONTROL 0 0x1889 4 0 4294967295 FMT420_MEM1_SOURCE_SEL 0 2 FMT420_MEM1_PWR_FORCE 4 5 FMT420_MEM1_PWR_DIS 8 8 FMT420_MEM1_PWR_STATE 12 13 mmFMT_MEMORY2_CONTROL 0 0x188a 4 0 4294967295 FMT420_MEM2_SOURCE_SEL 0 2 FMT420_MEM2_PWR_FORCE 4 5 FMT420_MEM2_PWR_DIS 8 8 FMT420_MEM2_PWR_STATE 12 13 mmFMT_MEMORY3_CONTROL 0 0x188b 4 0 4294967295 FMT420_MEM3_SOURCE_SEL 0 2 FMT420_MEM3_PWR_FORCE 4 5 FMT420_MEM3_PWR_DIS 8 8 FMT420_MEM3_PWR_STATE 12 13 mmFMT_MEMORY4_CONTROL 0 0x188c 4 0 4294967295 FMT420_MEM4_SOURCE_SEL 0 2 FMT420_MEM4_PWR_FORCE 4 5 FMT420_MEM4_PWR_DIS 8 8 FMT420_MEM4_PWR_STATE 12 13 mmFMT_MEMORY5_CONTROL 0 0x188d 4 0 4294967295 FMT420_MEM5_SOURCE_SEL 0 2 FMT420_MEM5_PWR_FORCE 4 5 FMT420_MEM5_PWR_DIS 8 8 FMT420_MEM5_PWR_STATE 12 13 mmDCO_CLK_CNTL 0 0x1864 21 0 4294967295 DISPCLK_R_DCO_GATE_DIS 5 5 DISPCLK_G_ABM_GATE_DIS 6 6 DISPCLK_G_DVO_GATE_DIS 7 7 DISPCLK_G_DACA_GATE_DIS 8 8 DISPCLK_G_DACB_GATE_DIS 9 9 REFCLK_R_DCO_GATE_DIS 10 10 DISPCLK_G_FMT0_GATE_DIS 16 16 DISPCLK_G_FMT1_GATE_DIS 17 17 DISPCLK_G_FMT2_GATE_DIS 18 18 DISPCLK_G_FMT3_GATE_DIS 19 19 DISPCLK_G_FMT4_GATE_DIS 20 20 DISPCLK_G_FMT5_GATE_DIS 21 21 DISPCLK_G_DIGLPA_GATE_DIS 22 22 DISPCLK_G_DIGLPB_GATE_DIS 23 23 DISPCLK_G_DIGA_GATE_DIS 24 24 DISPCLK_G_DIGB_GATE_DIS 25 25 DISPCLK_G_DIGC_GATE_DIS 26 26 DISPCLK_G_DIGD_GATE_DIS 27 27 DISPCLK_G_DIGE_GATE_DIS 28 28 DISPCLK_G_DIGF_GATE_DIS 29 29 DISPCLK_G_DIGG_GATE_DIS 30 30 mmDCO_CLK_CNTL2 0 0x1876 19 0 4294967295 DCO_TEST_CLK_SEL 0 6 SCLK_G_AFMTA_GATE_DIS 7 7 SCLK_G_AFMTB_GATE_DIS 8 8 SCLK_G_AFMTC_GATE_DIS 9 9 SCLK_G_AFMTD_GATE_DIS 10 10 SCLK_G_AFMTE_GATE_DIS 11 11 SCLK_G_AFMTF_GATE_DIS 12 12 SCLK_G_AFMTG_GATE_DIS 13 13 SCLK_G_AFMTLPA_GATE_DIS 15 15 SCLK_G_AFMTLPB_GATE_DIS 16 16 SYMCLKA_FE_G_AFMT_GATE_DIS 17 17 SYMCLKB_FE_G_AFMT_GATE_DIS 18 18 SYMCLKC_FE_G_AFMT_GATE_DIS 19 19 SYMCLKD_FE_G_AFMT_GATE_DIS 20 20 SYMCLKE_FE_G_AFMT_GATE_DIS 21 21 SYMCLKF_FE_G_AFMT_GATE_DIS 22 22 SYMCLKG_FE_G_AFMT_GATE_DIS 23 23 SYMCLKLPA_FE_G_AFMT_GATE_DIS 25 25 SYMCLKLPB_FE_G_AFMT_GATE_DIS 26 26 mmDCO_CLK_CNTL3 0 0x1877 18 0 4294967295 SYMCLKA_FE_G_TMDS_GATE_DIS 0 0 SYMCLKB_FE_G_TMDS_GATE_DIS 1 1 SYMCLKC_FE_G_TMDS_GATE_DIS 2 2 SYMCLKD_FE_G_TMDS_GATE_DIS 3 3 SYMCLKE_FE_G_TMDS_GATE_DIS 4 4 SYMCLKF_FE_G_TMDS_GATE_DIS 5 5 SYMCLKG_FE_G_TMDS_GATE_DIS 6 6 SYMCLKLPA_FE_G_TMDS_GATE_DIS 8 8 SYMCLKLPB_FE_G_TMDS_GATE_DIS 9 9 SYMCLKA_G_TMDS_GATE_DIS 10 10 SYMCLKB_G_TMDS_GATE_DIS 11 11 SYMCLKC_G_TMDS_GATE_DIS 12 12 SYMCLKD_G_TMDS_GATE_DIS 13 13 SYMCLKE_G_TMDS_GATE_DIS 14 14 SYMCLKF_G_TMDS_GATE_DIS 15 15 SYMCLKG_G_TMDS_GATE_DIS 16 16 SYMCLKLPA_G_TMDS_GATE_DIS 18 18 SYMCLKLPB_G_TMDS_GATE_DIS 19 19 mmDPDBG_CNTL 0 0x1866 5 0 4294967295 DPDBG_ENABLE 0 0 DPDBG_INPUT_ENABLE 1 1 DPDBG_SYMCLK_ON 4 4 DPDBG_ERROR_DETECTION_MODE 8 8 DPDBG_LINE_LENGTH 16 31 mmDPDBG_INTERRUPT 0 0x1867 5 0 4294967295 DPDBG_FIFO_OVERFLOW_INT_MASK 0 0 DPDBG_FIFO_OVERFLOW_INT_TYPE 1 1 DPDBG_FIFO_OVERFLOW_INT_ACK 8 8 DPDBG_FIFO_OVERFLOW_OCCURRED 16 16 DPDBG_FIFO_OVERFLOW_INT_STATUS 24 24 mmDCO_POWER_MANAGEMENT_CNTL 0 0x1868 2 0 4294967295 PM_ASSERT_RESET 0 0 PM_ALL_BUSY_OFF 8 8 mmDCO_SOFT_RESET 0 0x1871 14 0 4294967295 DACA_SOFT_RESET 0 0 I2S0_SPDIF0_SOFT_RESET 4 4 I2S1_SOFT_RESET 5 5 SPDIF1_SOFT_RESET 6 6 DB_CLK_SOFT_RESET 12 12 FMT0_SOFT_RESET 16 16 FMT1_SOFT_RESET 17 17 FMT2_SOFT_RESET 18 18 FMT3_SOFT_RESET 19 19 FMT4_SOFT_RESET 20 20 FMT5_SOFT_RESET 21 21 MVP_SOFT_RESET 24 24 ABM_SOFT_RESET 25 25 DVO_SOFT_RESET 27 27 mmDIG_SOFT_RESET 0 0x1872 15 0 4294967295 DIGA_FE_SOFT_RESET 0 0 DIGA_BE_SOFT_RESET 1 1 DIGB_FE_SOFT_RESET 4 4 DIGB_BE_SOFT_RESET 5 5 DIGC_FE_SOFT_RESET 8 8 DIGC_BE_SOFT_RESET 9 9 DIGD_FE_SOFT_RESET 12 12 DIGD_BE_SOFT_RESET 13 13 DIGE_FE_SOFT_RESET 16 16 DIGE_BE_SOFT_RESET 17 17 DIGF_FE_SOFT_RESET 20 20 DIGF_BE_SOFT_RESET 21 21 DIGG_FE_SOFT_RESET 24 24 DIGG_BE_SOFT_RESET 25 25 DPDBG_SOFT_RESET 31 31 mmDIG_SOFT_RESET_2 0 0x186a 4 0 4294967295 DIGLPA_FE_SOFT_RESET 0 0 DIGLPA_BE_SOFT_RESET 1 1 DIGLPB_FE_SOFT_RESET 4 4 DIGLPB_BE_SOFT_RESET 5 5 mmDCO_STEREOSYNC_SEL 0 0x186e 2 0 4294967295 GENERICA_STEREOSYNC_SEL 0 2 GENERICB_STEREOSYNC_SEL 16 18 mmDCO_HDMI_RXSTATUS_TIMER_CONTROL 0 0x1883 5 0 4294967295 DCO_HDMI_RXSTATUS_TIMER_ENABLE 0 0 DCO_HDMI_RXSTATUS_TIMER_TYPE 4 4 DCO_HDMI_RXSTATUS_TIMER_STATUS 8 8 DCO_HDMI_RXSTATUS_TIMER_MASK 12 12 DCO_HDMI_RXSTATUS_TIMER_INTERVAL 16 27 mmDCO_PSP_INTERRUPT_STATUS 0 0x1884 2 0 4294967295 DCO_PSP_INTERRUPT_STATUS 0 0 DCO_PSP_INTERRUPT_MESSAGE 1 31 mmDCO_PSP_INTERRUPT_CLEAR 0 0x1885 1 0 4294967295 DCO_PSP_INTERRUPT_CLEAR 0 0 mmDCO_GENERIC_INTERRUPT_MESSAGE 0 0x1886 2 0 4294967295 DCO_GENERIC_INTERRUPT_STATUS 0 0 DCO_GENERIC_INTERRUPT_MESSAGE 1 31 mmDCO_GENERIC_INTERRUPT_CLEAR 0 0x1887 1 0 4294967295 DCO_GENERIC_INTERRUPT_CLEAR 0 0 mmDCO_TEST_DEBUG_INDEX 0 0x186f 2 0 4294967295 DCO_TEST_DEBUG_INDEX 0 7 DCO_TEST_DEBUG_WRITE_EN 8 8 mmDCO_TEST_DEBUG_DATA 0 0x1870 1 0 4294967295 DCO_TEST_DEBUG_DATA 0 31 mmDC_I2C_CONTROL 0 0x16d4 7 0 4294967295 DC_I2C_GO 0 0 DC_I2C_SOFT_RESET 1 1 DC_I2C_SEND_RESET 2 2 DC_I2C_SW_STATUS_RESET 3 3 DC_I2C_DDC_SELECT 8 10 DC_I2C_TRANSACTION_COUNT 20 21 DC_I2C_DBG_REF_SEL 31 31 mmDC_I2C_ARBITRATION 0 0x16d5 9 0 4294967295 DC_I2C_SW_PRIORITY 0 1 DC_I2C_REG_RW_CNTL_STATUS 2 3 DC_I2C_NO_QUEUED_SW_GO 4 4 DC_I2C_ABORT_HW_XFER 8 8 DC_I2C_ABORT_SW_XFER 12 12 DC_I2C_SW_USE_I2C_REG_REQ 20 20 DC_I2C_SW_DONE_USING_I2C_REG 21 21 DC_I2C_DMCU_USE_I2C_REG_REQ 24 24 DC_I2C_DMCU_DONE_USING_I2C_REG 25 25 mmDC_I2C_INTERRUPT_CONTROL 0 0x16d6 24 0 4294967295 DC_I2C_SW_DONE_INT 0 0 DC_I2C_SW_DONE_ACK 1 1 DC_I2C_SW_DONE_MASK 2 2 DC_I2C_DDC1_HW_DONE_INT 4 4 DC_I2C_DDC1_HW_DONE_ACK 5 5 DC_I2C_DDC1_HW_DONE_MASK 6 6 DC_I2C_DDC2_HW_DONE_INT 8 8 DC_I2C_DDC2_HW_DONE_ACK 9 9 DC_I2C_DDC2_HW_DONE_MASK 10 10 DC_I2C_DDC3_HW_DONE_INT 12 12 DC_I2C_DDC3_HW_DONE_ACK 13 13 DC_I2C_DDC3_HW_DONE_MASK 14 14 DC_I2C_DDC4_HW_DONE_INT 16 16 DC_I2C_DDC4_HW_DONE_ACK 17 17 DC_I2C_DDC4_HW_DONE_MASK 18 18 DC_I2C_DDC5_HW_DONE_INT 20 20 DC_I2C_DDC5_HW_DONE_ACK 21 21 DC_I2C_DDC5_HW_DONE_MASK 22 22 DC_I2C_DDC6_HW_DONE_INT 24 24 DC_I2C_DDC6_HW_DONE_ACK 25 25 DC_I2C_DDC6_HW_DONE_MASK 26 26 DC_I2C_DDCVGA_HW_DONE_INT 27 27 DC_I2C_DDCVGA_HW_DONE_ACK 28 28 DC_I2C_DDCVGA_HW_DONE_MASK 29 29 mmDC_I2C_SW_STATUS 0 0x16d7 12 0 4294967295 DC_I2C_SW_STATUS 0 1 DC_I2C_SW_DONE 2 2 DC_I2C_SW_ABORTED 4 4 DC_I2C_SW_TIMEOUT 5 5 DC_I2C_SW_INTERRUPTED 6 6 DC_I2C_SW_BUFFER_OVERFLOW 7 7 DC_I2C_SW_STOPPED_ON_NACK 8 8 DC_I2C_SW_NACK0 12 12 DC_I2C_SW_NACK1 13 13 DC_I2C_SW_NACK2 14 14 DC_I2C_SW_NACK3 15 15 DC_I2C_SW_REQ 18 18 mmDC_I2C_DDC1_HW_STATUS 0 0x16d8 7 0 4294967295 DC_I2C_DDC1_HW_STATUS 0 1 DC_I2C_DDC1_HW_DONE 3 3 DC_I2C_DDC1_HW_REQ 16 16 DC_I2C_DDC1_HW_URG 17 17 DC_I2C_DDC1_EDID_DETECT_STATUS 20 20 DC_I2C_DDC1_EDID_DETECT_NUM_VALID_TRIES 24 27 DC_I2C_DDC1_EDID_DETECT_STATE 28 30 mmDC_I2C_DDC2_HW_STATUS 0 0x16d9 7 0 4294967295 DC_I2C_DDC2_HW_STATUS 0 1 DC_I2C_DDC2_HW_DONE 3 3 DC_I2C_DDC2_HW_REQ 16 16 DC_I2C_DDC2_HW_URG 17 17 DC_I2C_DDC2_EDID_DETECT_STATUS 20 20 DC_I2C_DDC2_EDID_DETECT_NUM_VALID_TRIES 24 27 DC_I2C_DDC2_EDID_DETECT_STATE 28 30 mmDC_I2C_DDC3_HW_STATUS 0 0x16da 7 0 4294967295 DC_I2C_DDC3_HW_STATUS 0 1 DC_I2C_DDC3_HW_DONE 3 3 DC_I2C_DDC3_HW_REQ 16 16 DC_I2C_DDC3_HW_URG 17 17 DC_I2C_DDC3_EDID_DETECT_STATUS 20 20 DC_I2C_DDC3_EDID_DETECT_NUM_VALID_TRIES 24 27 DC_I2C_DDC3_EDID_DETECT_STATE 28 30 mmDC_I2C_DDC4_HW_STATUS 0 0x16db 7 0 4294967295 DC_I2C_DDC4_HW_STATUS 0 1 DC_I2C_DDC4_HW_DONE 3 3 DC_I2C_DDC4_HW_REQ 16 16 DC_I2C_DDC4_HW_URG 17 17 DC_I2C_DDC4_EDID_DETECT_STATUS 20 20 DC_I2C_DDC4_EDID_DETECT_NUM_VALID_TRIES 24 27 DC_I2C_DDC4_EDID_DETECT_STATE 28 30 mmDC_I2C_DDC5_HW_STATUS 0 0x16dc 7 0 4294967295 DC_I2C_DDC5_HW_STATUS 0 1 DC_I2C_DDC5_HW_DONE 3 3 DC_I2C_DDC5_HW_REQ 16 16 DC_I2C_DDC5_HW_URG 17 17 DC_I2C_DDC5_EDID_DETECT_STATUS 20 20 DC_I2C_DDC5_EDID_DETECT_NUM_VALID_TRIES 24 27 DC_I2C_DDC5_EDID_DETECT_STATE 28 30 mmDC_I2C_DDC6_HW_STATUS 0 0x16dd 7 0 4294967295 DC_I2C_DDC6_HW_STATUS 0 1 DC_I2C_DDC6_HW_DONE 3 3 DC_I2C_DDC6_HW_REQ 16 16 DC_I2C_DDC6_HW_URG 17 17 DC_I2C_DDC6_EDID_DETECT_STATUS 20 20 DC_I2C_DDC6_EDID_DETECT_NUM_VALID_TRIES 24 27 DC_I2C_DDC6_EDID_DETECT_STATE 28 30 mmDC_I2C_DDC1_SPEED 0 0x16de 4 0 4294967295 DC_I2C_DDC1_THRESHOLD 0 1 DC_I2C_DDC1_DISABLE_FILTER_DURING_STALL 4 4 DC_I2C_DDC1_START_STOP_TIMING_CNTL 8 9 DC_I2C_DDC1_PRESCALE 16 31 mmDC_I2C_DDC1_SETUP 0 0x16df 9 0 4294967295 DC_I2C_DDC1_DATA_DRIVE_EN 0 0 DC_I2C_DDC1_DATA_DRIVE_SEL 1 1 DC_I2C_DDC1_EDID_DETECT_ENABLE 4 4 DC_I2C_DDC1_EDID_DETECT_MODE 5 5 DC_I2C_DDC1_ENABLE 6 6 DC_I2C_DDC1_CLK_DRIVE_EN 7 7 DC_I2C_DDC1_INTRA_BYTE_DELAY 8 15 DC_I2C_DDC1_INTRA_TRANSACTION_DELAY 16 23 DC_I2C_DDC1_TIME_LIMIT 24 31 mmDC_I2C_DDC2_SPEED 0 0x16e0 4 0 4294967295 DC_I2C_DDC2_THRESHOLD 0 1 DC_I2C_DDC2_DISABLE_FILTER_DURING_STALL 4 4 DC_I2C_DDC2_START_STOP_TIMING_CNTL 8 9 DC_I2C_DDC2_PRESCALE 16 31 mmDC_I2C_DDC2_SETUP 0 0x16e1 9 0 4294967295 DC_I2C_DDC2_DATA_DRIVE_EN 0 0 DC_I2C_DDC2_DATA_DRIVE_SEL 1 1 DC_I2C_DDC2_EDID_DETECT_ENABLE 4 4 DC_I2C_DDC2_EDID_DETECT_MODE 5 5 DC_I2C_DDC2_ENABLE 6 6 DC_I2C_DDC2_CLK_DRIVE_EN 7 7 DC_I2C_DDC2_INTRA_BYTE_DELAY 8 15 DC_I2C_DDC2_INTRA_TRANSACTION_DELAY 16 23 DC_I2C_DDC2_TIME_LIMIT 24 31 mmDC_I2C_DDC3_SPEED 0 0x16e2 4 0 4294967295 DC_I2C_DDC3_THRESHOLD 0 1 DC_I2C_DDC3_DISABLE_FILTER_DURING_STALL 4 4 DC_I2C_DDC3_START_STOP_TIMING_CNTL 8 9 DC_I2C_DDC3_PRESCALE 16 31 mmDC_I2C_DDC3_SETUP 0 0x16e3 9 0 4294967295 DC_I2C_DDC3_DATA_DRIVE_EN 0 0 DC_I2C_DDC3_DATA_DRIVE_SEL 1 1 DC_I2C_DDC3_EDID_DETECT_ENABLE 4 4 DC_I2C_DDC3_EDID_DETECT_MODE 5 5 DC_I2C_DDC3_ENABLE 6 6 DC_I2C_DDC3_CLK_DRIVE_EN 7 7 DC_I2C_DDC3_INTRA_BYTE_DELAY 8 15 DC_I2C_DDC3_INTRA_TRANSACTION_DELAY 16 23 DC_I2C_DDC3_TIME_LIMIT 24 31 mmDC_I2C_DDC4_SPEED 0 0x16e4 4 0 4294967295 DC_I2C_DDC4_THRESHOLD 0 1 DC_I2C_DDC4_DISABLE_FILTER_DURING_STALL 4 4 DC_I2C_DDC4_START_STOP_TIMING_CNTL 8 9 DC_I2C_DDC4_PRESCALE 16 31 mmDC_I2C_DDC4_SETUP 0 0x16e5 9 0 4294967295 DC_I2C_DDC4_DATA_DRIVE_EN 0 0 DC_I2C_DDC4_DATA_DRIVE_SEL 1 1 DC_I2C_DDC4_EDID_DETECT_ENABLE 4 4 DC_I2C_DDC4_EDID_DETECT_MODE 5 5 DC_I2C_DDC4_ENABLE 6 6 DC_I2C_DDC4_CLK_DRIVE_EN 7 7 DC_I2C_DDC4_INTRA_BYTE_DELAY 8 15 DC_I2C_DDC4_INTRA_TRANSACTION_DELAY 16 23 DC_I2C_DDC4_TIME_LIMIT 24 31 mmDC_I2C_DDC5_SPEED 0 0x16e6 4 0 4294967295 DC_I2C_DDC5_THRESHOLD 0 1 DC_I2C_DDC5_DISABLE_FILTER_DURING_STALL 4 4 DC_I2C_DDC5_START_STOP_TIMING_CNTL 8 9 DC_I2C_DDC5_PRESCALE 16 31 mmDC_I2C_DDC5_SETUP 0 0x16e7 9 0 4294967295 DC_I2C_DDC5_DATA_DRIVE_EN 0 0 DC_I2C_DDC5_DATA_DRIVE_SEL 1 1 DC_I2C_DDC5_EDID_DETECT_ENABLE 4 4 DC_I2C_DDC5_EDID_DETECT_MODE 5 5 DC_I2C_DDC5_ENABLE 6 6 DC_I2C_DDC5_CLK_DRIVE_EN 7 7 DC_I2C_DDC5_INTRA_BYTE_DELAY 8 15 DC_I2C_DDC5_INTRA_TRANSACTION_DELAY 16 23 DC_I2C_DDC5_TIME_LIMIT 24 31 mmDC_I2C_DDC6_SPEED 0 0x16e8 4 0 4294967295 DC_I2C_DDC6_THRESHOLD 0 1 DC_I2C_DDC6_DISABLE_FILTER_DURING_STALL 4 4 DC_I2C_DDC6_START_STOP_TIMING_CNTL 8 9 DC_I2C_DDC6_PRESCALE 16 31 mmDC_I2C_DDC6_SETUP 0 0x16e9 9 0 4294967295 DC_I2C_DDC6_DATA_DRIVE_EN 0 0 DC_I2C_DDC6_DATA_DRIVE_SEL 1 1 DC_I2C_DDC6_EDID_DETECT_ENABLE 4 4 DC_I2C_DDC6_EDID_DETECT_MODE 5 5 DC_I2C_DDC6_ENABLE 6 6 DC_I2C_DDC6_CLK_DRIVE_EN 7 7 DC_I2C_DDC6_INTRA_BYTE_DELAY 8 15 DC_I2C_DDC6_INTRA_TRANSACTION_DELAY 16 23 DC_I2C_DDC6_TIME_LIMIT 24 31 mmDC_I2C_TRANSACTION0 0 0x16ea 5 0 4294967295 DC_I2C_RW0 0 0 DC_I2C_STOP_ON_NACK0 8 8 DC_I2C_START0 12 12 DC_I2C_STOP0 13 13 DC_I2C_COUNT0 16 25 mmDC_I2C_TRANSACTION1 0 0x16eb 5 0 4294967295 DC_I2C_RW1 0 0 DC_I2C_STOP_ON_NACK1 8 8 DC_I2C_START1 12 12 DC_I2C_STOP1 13 13 DC_I2C_COUNT1 16 25 mmDC_I2C_TRANSACTION2 0 0x16ec 5 0 4294967295 DC_I2C_RW2 0 0 DC_I2C_STOP_ON_NACK2 8 8 DC_I2C_START2 12 12 DC_I2C_STOP2 13 13 DC_I2C_COUNT2 16 25 mmDC_I2C_TRANSACTION3 0 0x16ed 5 0 4294967295 DC_I2C_RW3 0 0 DC_I2C_STOP_ON_NACK3 8 8 DC_I2C_START3 12 12 DC_I2C_STOP3 13 13 DC_I2C_COUNT3 16 25 mmDC_I2C_DATA 0 0x16ee 4 0 4294967295 DC_I2C_DATA_RW 0 0 DC_I2C_DATA 8 15 DC_I2C_INDEX 16 25 DC_I2C_INDEX_WRITE 31 31 mmDC_I2C_DDCVGA_HW_STATUS 0 0x16ef 7 0 4294967295 DC_I2C_DDCVGA_HW_STATUS 0 1 DC_I2C_DDCVGA_HW_DONE 3 3 DC_I2C_DDCVGA_HW_REQ 16 16 DC_I2C_DDCVGA_HW_URG 17 17 DC_I2C_DDCVGA_EDID_DETECT_STATUS 20 20 DC_I2C_DDCVGA_EDID_DETECT_NUM_VALID_TRIES 24 27 DC_I2C_DDCVGA_EDID_DETECT_STATE 28 30 mmDC_I2C_DDCVGA_SPEED 0 0x16f0 4 0 4294967295 DC_I2C_DDCVGA_THRESHOLD 0 1 DC_I2C_DDCVGA_DISABLE_FILTER_DURING_STALL 4 4 DC_I2C_DDCVGA_START_STOP_TIMING_CNTL 8 9 DC_I2C_DDCVGA_PRESCALE 16 31 mmDC_I2C_DDCVGA_SETUP 0 0x16f1 9 0 4294967295 DC_I2C_DDCVGA_DATA_DRIVE_EN 0 0 DC_I2C_DDCVGA_DATA_DRIVE_SEL 1 1 DC_I2C_DDCVGA_EDID_DETECT_ENABLE 4 4 DC_I2C_DDCVGA_EDID_DETECT_MODE 5 5 DC_I2C_DDCVGA_ENABLE 6 6 DC_I2C_DDCVGA_CLK_DRIVE_EN 7 7 DC_I2C_DDCVGA_INTRA_BYTE_DELAY 8 15 DC_I2C_DDCVGA_INTRA_TRANSACTION_DELAY 16 23 DC_I2C_DDCVGA_TIME_LIMIT 24 31 mmDC_I2C_EDID_DETECT_CTRL 0 0x16f2 3 0 4294967295 DC_I2C_EDID_DETECT_WAIT_TIME 0 15 DC_I2C_EDID_DETECT_NUM_TRIES_UNTIL_VALID 20 23 DC_I2C_EDID_DETECT_SEND_RESET 28 28 mmDC_I2C_READ_REQUEST_INTERRUPT 0 0x16f3 30 0 4294967295 DC_I2C_DDC1_READ_REQUEST_OCCURRED 0 0 DC_I2C_DDC1_READ_REQUEST_INT 1 1 DC_I2C_DDC1_READ_REQUEST_ACK 2 2 DC_I2C_DDC1_READ_REQUEST_MASK 3 3 DC_I2C_DDC2_READ_REQUEST_OCCURRED 4 4 DC_I2C_DDC2_READ_REQUEST_INT 5 5 DC_I2C_DDC2_READ_REQUEST_ACK 6 6 DC_I2C_DDC2_READ_REQUEST_MASK 7 7 DC_I2C_DDC3_READ_REQUEST_OCCURRED 8 8 DC_I2C_DDC3_READ_REQUEST_INT 9 9 DC_I2C_DDC3_READ_REQUEST_ACK 10 10 DC_I2C_DDC3_READ_REQUEST_MASK 11 11 DC_I2C_DDC4_READ_REQUEST_OCCURRED 12 12 DC_I2C_DDC4_READ_REQUEST_INT 13 13 DC_I2C_DDC4_READ_REQUEST_ACK 14 14 DC_I2C_DDC4_READ_REQUEST_MASK 15 15 DC_I2C_DDC5_READ_REQUEST_OCCURRED 16 16 DC_I2C_DDC5_READ_REQUEST_INT 17 17 DC_I2C_DDC5_READ_REQUEST_ACK 18 18 DC_I2C_DDC5_READ_REQUEST_MASK 19 19 DC_I2C_DDC6_READ_REQUEST_OCCURRED 20 20 DC_I2C_DDC6_READ_REQUEST_INT 21 21 DC_I2C_DDC6_READ_REQUEST_ACK 22 22 DC_I2C_DDC6_READ_REQUEST_MASK 23 23 DC_I2C_DDCVGA_READ_REQUEST_OCCURRED 24 24 DC_I2C_DDCVGA_READ_REQUEST_INT 25 25 DC_I2C_DDCVGA_READ_REQUEST_ACK 26 26 DC_I2C_DDCVGA_READ_REQUEST_MASK 27 27 DC_I2C_DDC_READ_REQUEST_ACK_ENABLE 30 30 DC_I2C_DDC_READ_REQUEST_INT_TYPE 31 31 mmGENERIC_I2C_CONTROL 0 0x16f4 5 0 4294967295 GENERIC_I2C_GO 0 0 GENERIC_I2C_SOFT_RESET 1 1 GENERIC_I2C_SEND_RESET 2 2 GENERIC_I2C_ENABLE 3 3 GENERIC_I2C_DBG_REF_SEL 31 31 mmGENERIC_I2C_INTERRUPT_CONTROL 0 0x16f5 8 0 4294967295 GENERIC_I2C_DONE_INT 0 0 GENERIC_I2C_DONE_ACK 1 1 GENERIC_I2C_DONE_MASK 2 2 GENERIC_I2C_DDC_READ_REQUEST_OCCURRED 8 8 GENERIC_I2C_DDC_READ_REQUEST_INT 9 9 GENERIC_I2C_DDC_READ_REQUEST_ACK 10 10 GENERIC_I2C_DDC_READ_REQUEST_MASK 11 11 GENERIC_I2C_DDC_READ_REQUEST_INT_TYPE 12 12 mmGENERIC_I2C_STATUS 0 0x16f6 6 0 4294967295 GENERIC_I2C_STATUS 0 3 GENERIC_I2C_DONE 4 4 GENERIC_I2C_ABORTED 5 5 GENERIC_I2C_TIMEOUT 6 6 GENERIC_I2C_STOPPED_ON_NACK 9 9 GENERIC_I2C_NACK 10 10 mmGENERIC_I2C_SPEED 0 0x16f7 4 0 4294967295 GENERIC_I2C_THRESHOLD 0 1 GENERIC_I2C_DISABLE_FILTER_DURING_STALL 4 4 GENERIC_I2C_START_STOP_TIMING_CNTL 8 9 GENERIC_I2C_PRESCALE 16 31 mmGENERIC_I2C_SETUP 0 0x16f8 5 0 4294967295 GENERIC_I2C_DATA_DRIVE_EN 0 0 GENERIC_I2C_DATA_DRIVE_SEL 1 1 GENERIC_I2C_CLK_DRIVE_EN 7 7 GENERIC_I2C_INTRA_BYTE_DELAY 8 15 GENERIC_I2C_TIME_LIMIT 24 31 mmGENERIC_I2C_TRANSACTION 0 0x16f9 6 0 4294967295 GENERIC_I2C_RW 0 0 GENERIC_I2C_STOP_ON_NACK 8 8 GENERIC_I2C_ACK_ON_READ 9 9 GENERIC_I2C_START 12 12 GENERIC_I2C_STOP 13 13 GENERIC_I2C_COUNT 16 19 mmGENERIC_I2C_DATA 0 0x16fa 4 0 4294967295 GENERIC_I2C_DATA_RW 0 0 GENERIC_I2C_DATA 8 15 GENERIC_I2C_INDEX 16 19 GENERIC_I2C_INDEX_WRITE 31 31 mmGENERIC_I2C_PIN_SELECTION 0 0x16fb 2 0 4294967295 GENERIC_I2C_SCL_PIN_SEL 0 6 GENERIC_I2C_SDA_PIN_SEL 8 14 mmGENERIC_I2C_PIN_DEBUG 0 0x16fc 6 0 4294967295 GENERIC_I2C_SCL_OUTPUT 0 0 GENERIC_I2C_SCL_INPUT 1 1 GENERIC_I2C_SCL_EN 2 2 GENERIC_I2C_SDA_OUTPUT 4 4 GENERIC_I2C_SDA_INPUT 5 5 GENERIC_I2C_SDA_EN 6 6 mmBLNDV_CONTROL 0 0x476d 9 0 4294967295 BLND_GLOBAL_GAIN 0 7 BLND_MODE 8 9 BLND_STEREO_TYPE 10 11 BLND_STEREO_POLARITY 12 12 BLND_FEEDTHROUGH_EN 13 13 BLND_ALPHA_MODE 16 17 BLND_ACTIVE_OVERLAP_ONLY 18 18 BLND_MULTIPLIED_MODE 20 20 BLND_GLOBAL_ALPHA 24 31 mmBLNDV0_BLNDV_CONTROL 0 0x476d 0 0 4294967295 mmBLNDV1_BLNDV_CONTROL 0 0x996d 0 0 4294967295 mmBLNDV_SM_CONTROL2 0 0x476e 6 0 4294967295 SM_MODE 0 2 SM_FRAME_ALTERNATE 4 4 SM_FIELD_ALTERNATE 5 5 SM_FORCE_NEXT_FRAME_POL 8 9 SM_FORCE_NEXT_TOP_POL 16 17 SM_CURRENT_FRAME_POL 24 24 mmBLNDV0_BLNDV_SM_CONTROL2 0 0x476e 0 0 4294967295 mmBLNDV1_BLNDV_SM_CONTROL2 0 0x996e 0 0 4294967295 mmBLNDV_CONTROL2 0 0x476f 5 0 4294967295 PTI_ENABLE 0 0 PTI_NEW_PIXEL_GAP 4 5 BLND_NEW_PIXEL_MODE 6 6 BLND_SUPERAA_DEGAMMA_EN 7 7 BLND_SUPERAA_REGAMMA_EN 8 8 mmBLNDV0_BLNDV_CONTROL2 0 0x476f 0 0 4294967295 mmBLNDV1_BLNDV_CONTROL2 0 0x996f 0 0 4294967295 mmBLNDV_UPDATE 0 0x4770 3 0 4294967295 BLND_UPDATE_PENDING 0 0 BLND_UPDATE_TAKEN 8 8 BLND_UPDATE_LOCK 16 16 mmBLNDV0_BLNDV_UPDATE 0 0x4770 0 0 4294967295 mmBLNDV1_BLNDV_UPDATE 0 0x9970 0 0 4294967295 mmBLNDV_UNDERFLOW_INTERRUPT 0 0x4771 4 0 4294967295 BLND_UNDERFLOW_INT_OCCURED 0 0 BLND_UNDERFLOW_INT_ACK 8 8 BLND_UNDERFLOW_INT_MASK 12 12 BLND_UNDERFLOW_INT_PIPE_INDEX 16 17 mmBLNDV0_BLNDV_UNDERFLOW_INTERRUPT 0 0x4771 0 0 4294967295 mmBLNDV1_BLNDV_UNDERFLOW_INTERRUPT 0 0x9971 0 0 4294967295 mmBLNDV_V_UPDATE_LOCK 0 0x4773 7 0 4294967295 BLND_DCP_GRPH_V_UPDATE_LOCK 0 0 BLND_DCP_GRPH_SURF_V_UPDATE_LOCK 1 1 BLND_DCP_CUR_V_UPDATE_LOCK 16 16 BLND_DCP_CUR2_V_UPDATE_LOCK 24 24 BLND_SCL_V_UPDATE_LOCK 28 28 BLND_BLND_V_UPDATE_LOCK 29 29 BLND_V_UPDATE_LOCK_MODE 31 31 mmBLNDV0_BLNDV_V_UPDATE_LOCK 0 0x4773 0 0 4294967295 mmBLNDV1_BLNDV_V_UPDATE_LOCK 0 0x9973 0 0 4294967295 mmBLNDV_REG_UPDATE_STATUS 0 0x4777 10 0 4294967295 DCP_BLNDC_GRPH_UPDATE_PENDING 0 0 DCP_BLNDO_GRPH_UPDATE_PENDING 1 1 DCP_BLNDC_GRPH_SURF_UPDATE_PENDING 2 2 DCP_BLNDO_GRPH_SURF_UPDATE_PENDING 3 3 DCP_BLNDC_CUR_UPDATE_PENDING 6 6 DCP_BLNDO_CUR_UPDATE_PENDING 7 7 SCL_BLNDC_UPDATE_PENDING 8 8 SCL_BLNDO_UPDATE_PENDING 9 9 BLND_BLNDC_UPDATE_PENDING 10 10 BLND_BLNDO_UPDATE_PENDING 11 11 mmBLNDV0_BLNDV_REG_UPDATE_STATUS 0 0x4777 0 0 4294967295 mmBLNDV1_BLNDV_REG_UPDATE_STATUS 0 0x9977 0 0 4294967295 mmBLNDV_DEBUG 0 0x4774 2 0 4294967295 BLND_CNV_MUX_SELECT 0 0 BLND_DEBUG 1 31 mmBLNDV0_BLNDV_DEBUG 0 0x4774 0 0 4294967295 mmBLNDV1_BLNDV_DEBUG 0 0x9974 0 0 4294967295 mmBLNDV_TEST_DEBUG_INDEX 0 0x4775 2 0 4294967295 BLND_TEST_DEBUG_INDEX 0 7 BLND_TEST_DEBUG_WRITE_EN 8 8 mmBLNDV0_BLNDV_TEST_DEBUG_INDEX 0 0x4775 0 0 4294967295 mmBLNDV1_BLNDV_TEST_DEBUG_INDEX 0 0x9975 0 0 4294967295 mmBLNDV_TEST_DEBUG_DATA 0 0x4776 1 0 4294967295 BLND_TEST_DEBUG_DATA 0 31 mmBLNDV0_BLNDV_TEST_DEBUG_DATA 0 0x4776 0 0 4294967295 mmBLNDV1_BLNDV_TEST_DEBUG_DATA 0 0x9976 0 0 4294967295 mmCRTCV_H_TOTAL 0 0x4780 1 0 4294967295 CRTC_H_TOTAL 0 13 mmCRTCV0_CRTCV_H_TOTAL 0 0x4780 0 0 4294967295 mmCRTCV1_CRTCV_H_TOTAL 0 0x9980 0 0 4294967295 mmCRTCV_H_BLANK_START_END 0 0x4781 2 0 4294967295 CRTC_H_BLANK_START 0 13 CRTC_H_BLANK_END 16 29 mmCRTCV0_CRTCV_H_BLANK_START_END 0 0x4781 0 0 4294967295 mmCRTCV1_CRTCV_H_BLANK_START_END 0 0x9981 0 0 4294967295 mmCRTCV_H_SYNC_A 0 0x4782 2 0 4294967295 CRTC_H_SYNC_A_START 0 13 CRTC_H_SYNC_A_END 16 29 mmCRTCV0_CRTCV_H_SYNC_A 0 0x4782 0 0 4294967295 mmCRTCV1_CRTCV_H_SYNC_A 0 0x9982 0 0 4294967295 mmCRTCV_V_TOTAL 0 0x4787 1 0 4294967295 CRTC_V_TOTAL 0 13 mmCRTCV0_CRTCV_V_TOTAL 0 0x4787 0 0 4294967295 mmCRTCV1_CRTCV_V_TOTAL 0 0x9987 0 0 4294967295 mmCRTCV_V_BLANK_START_END 0 0x478d 2 0 4294967295 CRTC_V_BLANK_START 0 13 CRTC_V_BLANK_END 16 29 mmCRTCV0_CRTCV_V_BLANK_START_END 0 0x478d 0 0 4294967295 mmCRTCV1_CRTCV_V_BLANK_START_END 0 0x998d 0 0 4294967295 mmCRTCV_V_SYNC_A 0 0x478e 2 0 4294967295 CRTC_V_SYNC_A_START 0 13 CRTC_V_SYNC_A_END 16 29 mmCRTCV0_CRTCV_V_SYNC_A 0 0x478e 0 0 4294967295 mmCRTCV1_CRTCV_V_SYNC_A 0 0x998e 0 0 4294967295 mmCRTCV_CONTROL 0 0x479c 12 0 4294967295 CRTC_MASTER_EN 0 0 CRTC_SYNC_RESET_SEL 4 4 CRTC_DISABLE_POINT_CNTL 8 9 CRTC_START_POINT_CNTL 12 12 CRTC_FIELD_NUMBER_CNTL 13 13 CRTC_FIELD_NUMBER_POLARITY 14 14 CRTC_CURRENT_MASTER_EN_STATE 16 16 CRTC_HBLANK_EARLY_CONTROL 20 22 CRTC_DISP_READ_REQUEST_DISABLE 24 24 CRTC_SOF_PULL_EN 29 29 CRTC_AVSYNC_LOCK_SNAPSHOT 30 30 CRTC_AVSYNC_VSYNC_N_HSYNC_MODE 31 31 mmCRTCV0_CRTCV_CONTROL 0 0x479c 0 0 4294967295 mmCRTCV1_CRTCV_CONTROL 0 0x999c 0 0 4294967295 mmCRTCV_START_LINE_CONTROL 0 0x47b3 5 0 4294967295 CRTC_PROGRESSIVE_START_LINE_EARLY 0 0 CRTC_INTERLACE_START_LINE_EARLY 1 1 CRTC_PREFETCH_EN 2 2 CRTC_LEGACY_REQUESTOR_EN 8 8 CRTC_ADVANCED_START_LINE_POSITION 12 19 mmCRTCV0_CRTCV_START_LINE_CONTROL 0 0x47b3 0 0 4294967295 mmCRTCV1_CRTCV_START_LINE_CONTROL 0 0x99b3 0 0 4294967295 mmCRTCV_OVERSCAN_COLOR 0 0x47c8 3 0 4294967295 CRTC_OVERSCAN_COLOR_BLUE 0 9 CRTC_OVERSCAN_COLOR_GREEN 10 19 CRTC_OVERSCAN_COLOR_RED 20 29 mmCRTCV0_CRTCV_OVERSCAN_COLOR 0 0x47c8 0 0 4294967295 mmCRTCV1_CRTCV_OVERSCAN_COLOR 0 0x99c8 0 0 4294967295 mmCRTCV_OVERSCAN_COLOR_EXT 0 0x47c9 3 0 4294967295 CRTC_OVERSCAN_COLOR_BLUE_EXT 0 1 CRTC_OVERSCAN_COLOR_GREEN_EXT 8 9 CRTC_OVERSCAN_COLOR_RED_EXT 16 17 mmCRTCV0_CRTCV_OVERSCAN_COLOR_EXT 0 0x47c9 0 0 4294967295 mmCRTCV1_CRTCV_OVERSCAN_COLOR_EXT 0 0x99c9 0 0 4294967295 mmCRTCV_BLACK_COLOR 0 0x47cc 3 0 4294967295 CRTC_BLACK_COLOR_B_CB 0 9 CRTC_BLACK_COLOR_G_Y 10 19 CRTC_BLACK_COLOR_R_CR 20 29 mmCRTCV0_CRTCV_BLACK_COLOR 0 0x47cc 0 0 4294967295 mmCRTCV1_CRTCV_BLACK_COLOR 0 0x99cc 0 0 4294967295 mmCRTCV_BLACK_COLOR_EXT 0 0x47cd 3 0 4294967295 CRTC_BLACK_COLOR_B_CB_EXT 0 1 CRTC_BLACK_COLOR_G_Y_EXT 8 9 CRTC_BLACK_COLOR_R_CR_EXT 16 17 mmCRTCV0_CRTCV_BLACK_COLOR_EXT 0 0x47cd 0 0 4294967295 mmCRTCV1_CRTCV_BLACK_COLOR_EXT 0 0x99cd 0 0 4294967295 mmCRTCV_CRC_CNTL 0 0x47d4 7 0 4294967295 CRTC_CRC_EN 0 0 CRTC_CRC_CONT_EN 4 4 CRTC_CRC_STEREO_MODE 8 9 CRTC_CRC_INTERLACE_MODE 12 13 CRTC_CRC_USE_NEW_AND_REPEATED_PIXELS 16 16 CRTC_CRC0_SELECT 20 22 CRTC_CRC1_SELECT 24 26 mmCRTCV0_CRTCV_CRC_CNTL 0 0x47d4 0 0 4294967295 mmCRTCV1_CRTCV_CRC_CNTL 0 0x99d4 0 0 4294967295 mmCRTCV_CRC0_WINDOWA_X_CONTROL 0 0x47d5 2 0 4294967295 CRTC_CRC0_WINDOWA_X_START 0 13 CRTC_CRC0_WINDOWA_X_END 16 29 mmCRTCV0_CRTCV_CRC0_WINDOWA_X_CONTROL 0 0x47d5 0 0 4294967295 mmCRTCV1_CRTCV_CRC0_WINDOWA_X_CONTROL 0 0x99d5 0 0 4294967295 mmCRTCV_CRC0_WINDOWA_Y_CONTROL 0 0x47d6 2 0 4294967295 CRTC_CRC0_WINDOWA_Y_START 0 13 CRTC_CRC0_WINDOWA_Y_END 16 29 mmCRTCV0_CRTCV_CRC0_WINDOWA_Y_CONTROL 0 0x47d6 0 0 4294967295 mmCRTCV1_CRTCV_CRC0_WINDOWA_Y_CONTROL 0 0x99d6 0 0 4294967295 mmCRTCV_CRC0_WINDOWB_X_CONTROL 0 0x47d7 2 0 4294967295 CRTC_CRC0_WINDOWB_X_START 0 13 CRTC_CRC0_WINDOWB_X_END 16 29 mmCRTCV0_CRTCV_CRC0_WINDOWB_X_CONTROL 0 0x47d7 0 0 4294967295 mmCRTCV1_CRTCV_CRC0_WINDOWB_X_CONTROL 0 0x99d7 0 0 4294967295 mmCRTCV_CRC0_WINDOWB_Y_CONTROL 0 0x47d8 2 0 4294967295 CRTC_CRC0_WINDOWB_Y_START 0 13 CRTC_CRC0_WINDOWB_Y_END 16 29 mmCRTCV0_CRTCV_CRC0_WINDOWB_Y_CONTROL 0 0x47d8 0 0 4294967295 mmCRTCV1_CRTCV_CRC0_WINDOWB_Y_CONTROL 0 0x99d8 0 0 4294967295 mmCRTCV_CRC0_DATA_RG 0 0x47d9 2 0 4294967295 CRC0_R_CR 0 15 CRC0_G_Y 16 31 mmCRTCV0_CRTCV_CRC0_DATA_RG 0 0x47d9 0 0 4294967295 mmCRTCV1_CRTCV_CRC0_DATA_RG 0 0x99d9 0 0 4294967295 mmCRTCV_CRC0_DATA_B 0 0x47da 1 0 4294967295 CRC0_B_CB 0 15 mmCRTCV0_CRTCV_CRC0_DATA_B 0 0x47da 0 0 4294967295 mmCRTCV1_CRTCV_CRC0_DATA_B 0 0x99da 0 0 4294967295 mmCRTCV_CRC1_WINDOWA_X_CONTROL 0 0x47db 2 0 4294967295 CRTC_CRC1_WINDOWA_X_START 0 13 CRTC_CRC1_WINDOWA_X_END 16 29 mmCRTCV0_CRTCV_CRC1_WINDOWA_X_CONTROL 0 0x47db 0 0 4294967295 mmCRTCV1_CRTCV_CRC1_WINDOWA_X_CONTROL 0 0x99db 0 0 4294967295 mmCRTCV_CRC1_WINDOWA_Y_CONTROL 0 0x47dc 2 0 4294967295 CRTC_CRC1_WINDOWA_Y_START 0 13 CRTC_CRC1_WINDOWA_Y_END 16 29 mmCRTCV0_CRTCV_CRC1_WINDOWA_Y_CONTROL 0 0x47dc 0 0 4294967295 mmCRTCV1_CRTCV_CRC1_WINDOWA_Y_CONTROL 0 0x99dc 0 0 4294967295 mmCRTCV_CRC1_WINDOWB_X_CONTROL 0 0x47dd 2 0 4294967295 CRTC_CRC1_WINDOWB_X_START 0 13 CRTC_CRC1_WINDOWB_X_END 16 29 mmCRTCV0_CRTCV_CRC1_WINDOWB_X_CONTROL 0 0x47dd 0 0 4294967295 mmCRTCV1_CRTCV_CRC1_WINDOWB_X_CONTROL 0 0x99dd 0 0 4294967295 mmCRTCV_CRC1_WINDOWB_Y_CONTROL 0 0x47de 2 0 4294967295 CRTC_CRC1_WINDOWB_Y_START 0 13 CRTC_CRC1_WINDOWB_Y_END 16 29 mmCRTCV0_CRTCV_CRC1_WINDOWB_Y_CONTROL 0 0x47de 0 0 4294967295 mmCRTCV1_CRTCV_CRC1_WINDOWB_Y_CONTROL 0 0x99de 0 0 4294967295 mmCRTCV_CRC1_DATA_RG 0 0x47df 2 0 4294967295 CRC1_R_CR 0 15 CRC1_G_Y 16 31 mmCRTCV0_CRTCV_CRC1_DATA_RG 0 0x47df 0 0 4294967295 mmCRTCV1_CRTCV_CRC1_DATA_RG 0 0x99df 0 0 4294967295 mmCRTCV_CRC1_DATA_B 0 0x47e0 1 0 4294967295 CRC1_B_CB 0 15 mmCRTCV0_CRTCV_CRC1_DATA_B 0 0x47e0 0 0 4294967295 mmCRTCV1_CRTCV_CRC1_DATA_B 0 0x99e0 0 0 4294967295 mmCRTCV_TEST_DEBUG_INDEX 0 0x47c6 2 0 4294967295 CRTC_TEST_DEBUG_INDEX 0 7 CRTC_TEST_DEBUG_WRITE_EN 8 8 mmCRTCV0_CRTCV_TEST_DEBUG_INDEX 0 0x47c6 0 0 4294967295 mmCRTCV1_CRTCV_TEST_DEBUG_INDEX 0 0x99c6 0 0 4294967295 mmCRTCV_TEST_DEBUG_DATA 0 0x47c7 1 0 4294967295 CRTC_TEST_DEBUG_DATA 0 31 mmCRTCV0_CRTCV_TEST_DEBUG_DATA 0 0x47c7 0 0 4294967295 mmCRTCV1_CRTCV_TEST_DEBUG_DATA 0 0x99c7 0 0 4294967295 mmXDMA_MC_PCIE_CLIENT_CONFIG 0 0x3e0 3 0 4294967295 XDMA_MC_PCIE_SWAP 8 9 XDMA_MC_PCIE_VMID 12 15 XDMA_MC_PCIE_PRIV 16 16 mmXDMA_LOCAL_SURFACE_TILING1 0 0x3e1 6 0 4294967295 XDMA_LOCAL_ARRAY_MODE 0 3 XDMA_LOCAL_TILE_SPLIT 4 6 XDMA_LOCAL_BANK_WIDTH 8 9 XDMA_LOCAL_BANK_HEIGHT 10 11 XDMA_LOCAL_MACRO_TILE_ASPECT 12 13 XDMA_LOCAL_NUM_BANKS 20 21 mmXDMA_LOCAL_SURFACE_TILING2 0 0x3e2 3 0 4294967295 XDMA_LOCAL_PIPE_INTERLEAVE_SIZE 0 2 XDMA_LOCAL_MICRO_TILE_MODE 20 22 XDMA_LOCAL_PIPE_CONFIG 27 31 mmXDMA_INTERRUPT 0 0x3e3 9 0 4294967295 XDMA_MSTR_MEM_URGENT_STAT 8 8 XDMA_MSTR_MEM_URGENT_MASK 9 9 XDMA_MSTR_MEM_URGENT_ACK 10 10 XDMA_SLV_READ_URGENT_STAT 16 16 XDMA_SLV_READ_URGENT_MASK 17 17 XDMA_SLV_READ_URGENT_ACK 18 18 XDMA_PERF_MEAS_STAT 20 20 XDMA_PERF_MEAS_MASK 21 21 XDMA_PERF_MEAS_ACK 22 22 mmXDMA_CLOCK_GATING_CNTL 0 0x3e4 13 0 4294967295 XDMA_SCLK_TURN_ON_DELAY 0 3 XDMA_SCLK_TURN_OFF_DELAY 4 11 XDMA_SCLK_GATE_DIS 15 15 XDMA_SCLK_REG_GATE_DIS 16 16 XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_0 17 17 XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_1 18 18 XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_2 19 19 XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_3 20 20 XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_4 21 21 XDMA_SCLK_G_MDYN_GATE_DIS_PIPE_5 22 22 XDMA_SCLK_G_SDYN_GATE_DIS 23 23 XDMA_SCLK_G_MSTAT_GATE_DIS 24 24 XDMA_SCLK_G_SSTAT_GATE_DIS 25 25 mmXDMA_MEM_POWER_CNTL 0 0x3e6 10 0 4294967295 XDMA_MEM_CORE_IDLE_STATE 0 1 XDMA_MEM_IF_IDLE_STATE 2 3 XDMA_MEM_IF_PCIE_STATE 19 20 XDMA_MEM_IF_PCIE_TRANS 21 21 XDMA_MEM_IF_RD_STATE 22 23 XDMA_MEM_IF_RD_TRANS 25 25 XDMA_MEM_IF_WR_STATE 26 27 XDMA_MEM_IF_WR_TRANS 28 28 XDMA_MEM_IF_BIF_STATE 29 30 XDMA_MEM_IF_BIF_TRANS 31 31 mmXDMA_IF_BIF_STATUS 0 0x3e7 2 0 4294967295 XDMA_IF_BIF_ERROR_STATUS 0 3 XDMA_IF_BIF_ERROR_CLEAR 8 8 mmXDMA_PERF_MEAS_STATUS 0 0x3e8 1 0 4294967295 XDMA_PERF_MEAS_STATUS 0 7 mmXDMA_IF_STATUS 0 0x3e9 1 0 4294967295 XDMA_MC_PCIEWR_BUSY 0 0 mmXDMA_TEST_DEBUG_INDEX 0 0x3ea 2 0 4294967295 XDMA_TEST_DEBUG_INDEX 0 7 XDMA_TEST_DEBUG_WRITE_EN 8 8 mmXDMA_TEST_DEBUG_DATA 0 0x3eb 1 0 4294967295 XDMA_TEST_DEBUG_DATA 0 31 mmXDMA_RBBMIF_RDWR_CNTL 0 0x3f8 3 0 4294967295 XDMA_RBBMIF_RDWR_DELAY 0 2 XDMA_RBBMIF_RDWR_TIMEOUT_DIS 3 3 XDMA_RBBMIF_TIMEOUT_DELAY 15 31 mmXDMA_PG_CONTROL 0 0x3f9 1 0 4294967295 XDMA_PG_CONTROL 0 31 mmXDMA_PG_WDATA 0 0x3fa 1 0 4294967295 XDMA_PG_WDATA 0 31 mmXDMA_PG_STATUS 0 0x3fb 4 0 4294967295 XDMA_SERDES_RDATA 0 23 XDMA_PGFSM_READ_READY 24 24 XDMA_SERDES_BUSY 25 25 XDMA_SERDES_SMU_POWER_STATUS 26 26 mmXDMA_AON_TEST_DEBUG_INDEX 0 0x3fc 4 0 4294967295 XDMA_AON_TEST_DEBUG_INDEX 0 7 XDMA_AON_TEST_DEBUG_WRITE_EN 8 8 XDMA_DEBUG_SEL 9 9 XDMA_DEBUG_OUT_EN 10 10 mmXDMA_AON_TEST_DEBUG_DATA 0 0x3fd 1 0 4294967295 XDMA_AON_TEST_DEBUG_DATA 0 31 mmXDMA_MSTR_CNTL 0 0x3ec 6 0 4294967295 XDMA_MSTR_ALPHA_POSITION 12 13 XDMA_MSTR_MEM_READY 14 14 XDMA_MSTR_ENABLE 16 16 XDMA_MSTR_DEBUG_MODE 18 18 XDMA_MSTR_SOFT_RESET 20 20 XDMA_MSTR_BIF_STALL_EN 21 21 mmXDMA_MSTR_STATUS 0 0x3ed 3 0 4294967295 XDMA_MSTR_VCOUNT_CURRENT 0 13 XDMA_MSTR_WRITE_LINE_CURRENT 16 27 XDMA_MSTR_STATUS_SELECT 28 30 mmXDMA_MSTR_MEM_CLIENT_CONFIG 0 0x3ee 3 0 4294967295 XDMA_MSTR_MEM_CLIENT_SWAP 8 9 XDMA_MSTR_MEM_CLIENT_VMID 12 15 XDMA_MSTR_MEM_CLIENT_PRIV 16 16 mmXDMA_MSTR_LOCAL_SURFACE_BASE_ADDR 0 0x3ef 1 0 4294967295 XDMA_MSTR_LOCAL_SURFACE_BASE_ADDR 0 31 mmXDMA_MSTR_LOCAL_SURFACE_BASE_ADDR_HIGH 0 0x3f0 1 0 4294967295 XDMA_MSTR_LOCAL_SURFACE_BASE_ADDR_HIGH 0 7 mmXDMA_MSTR_LOCAL_SURFACE_PITCH 0 0x3f1 1 0 4294967295 XDMA_MSTR_LOCAL_SURFACE_PITCH 0 13 mmXDMA_MSTR_CMD_URGENT_CNTL 0 0x3f2 3 0 4294967295 XDMA_MSTR_CMD_CLIENT_STALL 0 0 XDMA_MSTR_CMD_URGENT_LEVEL 8 11 XDMA_MSTR_CMD_STALL_DELAY 12 15 mmXDMA_MSTR_MEM_URGENT_CNTL 0 0x3f3 5 0 4294967295 XDMA_MSTR_MEM_CLIENT_STALL 0 0 XDMA_MSTR_MEM_URGENT_LIMIT 4 7 XDMA_MSTR_MEM_URGENT_LEVEL 8 11 XDMA_MSTR_MEM_STALL_DELAY 12 15 XDMA_MSTR_MEM_URGENT_TIMER 16 31 mmXDMA_MSTR_PCIE_NACK_STATUS 0 0x3f5 3 0 4294967295 XDMA_MSTR_PCIE_NACK_TAG 0 9 XDMA_MSTR_PCIE_NACK 12 13 XDMA_MSTR_PCIE_NACK_CLR 16 16 mmXDMA_MSTR_MEM_NACK_STATUS 0 0x3f6 3 0 4294967295 XDMA_MSTR_MEM_NACK_TAG 0 9 XDMA_MSTR_MEM_NACK 12 13 XDMA_MSTR_MEM_NACK_CLR 16 16 mmXDMA_MSTR_VSYNC_GSL_CHECK 0 0x3f7 2 0 4294967295 XDMA_MSTR_VSYNC_GSL_CHECK_SEL 0 2 XDMA_MSTR_VSYNC_GSL_CHECK_V_COUNT 8 21 mmXDMA_MSTR_PIPE_CNTL 0 0x400 15 0 4294967295 XDMA_MSTR_CACHE_LINES 0 7 XDMA_MSTR_READ_REQUEST 8 8 XDMA_MSTR_PIPE_FRAME_MODE 9 9 XDMA_MSTR_PIPE_SOFT_RESET 10 10 XDMA_MSTR_CACHE_INVALIDATE 11 11 XDMA_MSTR_REQUEST_CHANNEL_ID 12 14 XDMA_MSTR_FLIP_MODE 15 15 XDMA_MSTR_REQUEST_MIN 16 23 XDMA_MSTR_PIPE_ACTIVE 24 24 XDMA_MSTR_PIPE_FLUSHING 25 25 XDMA_MSTR_PIPE_FLIP_PENDING 26 26 XDMA_MSTR_VSYNC_GSL_ENABLE 27 27 XDMA_MSTR_SUPERAA_ENABLE 28 28 XDMA_MSTR_HSYNC_GSL_GROUP 29 30 XDMA_MSTR_GSL_GROUP_MASTER 31 31 mmXDMA_MSTR_PIPE0_XDMA_MSTR_PIPE_CNTL 0 0x400 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_PIPE_CNTL 0 0x410 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_PIPE_CNTL 0 0x420 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_PIPE_CNTL 0 0x430 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_PIPE_CNTL 0 0x440 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_PIPE_CNTL 0 0x450 0 0 4294967295 mmXDMA_MSTR_READ_COMMAND 0 0x401 2 0 4294967295 XDMA_MSTR_REQUEST_SIZE 0 13 XDMA_MSTR_REQUEST_PREFETCH 16 29 mmXDMA_MSTR_PIPE0_XDMA_MSTR_READ_COMMAND 0 0x401 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_READ_COMMAND 0 0x411 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_READ_COMMAND 0 0x421 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_READ_COMMAND 0 0x431 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_READ_COMMAND 0 0x441 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_READ_COMMAND 0 0x451 0 0 4294967295 mmXDMA_MSTR_CHANNEL_DIM 0 0x402 2 0 4294967295 XDMA_MSTR_CHANNEL_WIDTH 0 13 XDMA_MSTR_CHANNEL_HEIGHT 16 29 mmXDMA_MSTR_PIPE0_XDMA_MSTR_CHANNEL_DIM 0 0x402 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_CHANNEL_DIM 0 0x412 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_CHANNEL_DIM 0 0x422 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_CHANNEL_DIM 0 0x432 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_CHANNEL_DIM 0 0x442 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_CHANNEL_DIM 0 0x452 0 0 4294967295 mmXDMA_MSTR_HEIGHT 0 0x403 2 0 4294967295 XDMA_MSTR_ACTIVE_HEIGHT 0 13 XDMA_MSTR_FRAME_HEIGHT 16 29 mmXDMA_MSTR_PIPE0_XDMA_MSTR_HEIGHT 0 0x403 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_HEIGHT 0 0x413 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_HEIGHT 0 0x423 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_HEIGHT 0 0x433 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_HEIGHT 0 0x443 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_HEIGHT 0 0x453 0 0 4294967295 mmXDMA_MSTR_REMOTE_SURFACE_BASE 0 0x404 1 0 4294967295 XDMA_MSTR_REMOTE_SURFACE_BASE 0 31 mmXDMA_MSTR_PIPE0_XDMA_MSTR_REMOTE_SURFACE_BASE 0 0x404 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_REMOTE_SURFACE_BASE 0 0x414 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_REMOTE_SURFACE_BASE 0 0x424 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_REMOTE_SURFACE_BASE 0 0x434 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_REMOTE_SURFACE_BASE 0 0x444 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_REMOTE_SURFACE_BASE 0 0x454 0 0 4294967295 mmXDMA_MSTR_REMOTE_SURFACE_BASE_HIGH 0 0x405 1 0 4294967295 XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH 0 7 mmXDMA_MSTR_PIPE0_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH 0 0x405 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH 0 0x415 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH 0 0x425 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH 0 0x435 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH 0 0x445 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH 0 0x455 0 0 4294967295 mmXDMA_MSTR_REMOTE_GPU_ADDRESS 0 0x406 1 0 4294967295 XDMA_MSTR_REMOTE_GPU_ADDRESS 0 31 mmXDMA_MSTR_PIPE0_XDMA_MSTR_REMOTE_GPU_ADDRESS 0 0x406 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_REMOTE_GPU_ADDRESS 0 0x416 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_REMOTE_GPU_ADDRESS 0 0x426 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_REMOTE_GPU_ADDRESS 0 0x436 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_REMOTE_GPU_ADDRESS 0 0x446 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_REMOTE_GPU_ADDRESS 0 0x456 0 0 4294967295 mmXDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH 0 0x407 1 0 4294967295 XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH 0 7 mmXDMA_MSTR_PIPE0_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH 0 0x407 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH 0 0x417 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH 0 0x427 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH 0 0x437 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH 0 0x447 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH 0 0x457 0 0 4294967295 mmXDMA_MSTR_CACHE_BASE_ADDR 0 0x408 1 0 4294967295 XDMA_MSTR_CACHE_BASE_ADDR 0 31 mmXDMA_MSTR_PIPE0_XDMA_MSTR_CACHE_BASE_ADDR 0 0x408 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_CACHE_BASE_ADDR 0 0x418 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_CACHE_BASE_ADDR 0 0x428 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_CACHE_BASE_ADDR 0 0x438 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_CACHE_BASE_ADDR 0 0x448 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_CACHE_BASE_ADDR 0 0x458 0 0 4294967295 mmXDMA_MSTR_CACHE_BASE_ADDR_HIGH 0 0x409 1 0 4294967295 XDMA_MSTR_CACHE_BASE_ADDR_HIGH 0 7 mmXDMA_MSTR_PIPE0_XDMA_MSTR_CACHE_BASE_ADDR_HIGH 0 0x409 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_CACHE_BASE_ADDR_HIGH 0 0x419 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_CACHE_BASE_ADDR_HIGH 0 0x429 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_CACHE_BASE_ADDR_HIGH 0 0x439 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_CACHE_BASE_ADDR_HIGH 0 0x449 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_CACHE_BASE_ADDR_HIGH 0 0x459 0 0 4294967295 mmXDMA_MSTR_CACHE 0 0x40a 3 0 4294967295 XDMA_MSTR_CACHE_PITCH 0 13 XDMA_MSTR_CACHE_TLB_PG_STATE 29 30 XDMA_MSTR_CACHE_TLB_PG_TRANS 31 31 mmXDMA_MSTR_PIPE0_XDMA_MSTR_CACHE 0 0x40a 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_CACHE 0 0x41a 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_CACHE 0 0x42a 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_CACHE 0 0x43a 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_CACHE 0 0x44a 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_CACHE 0 0x45a 0 0 4294967295 mmXDMA_MSTR_CHANNEL_START 0 0x40b 2 0 4294967295 XDMA_MSTR_CHANNEL_START_X 0 13 XDMA_MSTR_CHANNEL_START_Y 16 29 mmXDMA_MSTR_PIPE0_XDMA_MSTR_CHANNEL_START 0 0x40b 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_CHANNEL_START 0 0x41b 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_CHANNEL_START 0 0x42b 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_CHANNEL_START 0 0x43b 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_CHANNEL_START 0 0x44b 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_CHANNEL_START 0 0x45b 0 0 4294967295 mmXDMA_MSTR_PERFMEAS_STATUS 0 0x40e 3 0 4294967295 XDMA_MSTR_PERFMEAS_DATA 0 23 XDMA_MSTR_PERFMEAS_INDEX 24 26 XDMA_MSTR_PERFMEAS_INDEX_MODE 30 31 mmXDMA_MSTR_PIPE0_XDMA_MSTR_PERFMEAS_STATUS 0 0x40e 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_PERFMEAS_STATUS 0 0x41e 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_PERFMEAS_STATUS 0 0x42e 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_PERFMEAS_STATUS 0 0x43e 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_PERFMEAS_STATUS 0 0x44e 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_PERFMEAS_STATUS 0 0x45e 0 0 4294967295 mmXDMA_MSTR_PERFMEAS_CNTL 0 0x40f 5 0 4294967295 XDMA_MSTR_CACHE_BW_MEAS_ITER 0 11 XDMA_MSTR_CACHE_BW_SEGID_SEL 12 16 XDMA_MSTR_CACHE_BW_COUNTER_RST 17 17 XDMA_MSTR_LT_MEAS_ITER 19 30 XDMA_MSTR_LT_COUNTER_RST 31 31 mmXDMA_MSTR_PIPE0_XDMA_MSTR_PERFMEAS_CNTL 0 0x40f 0 0 4294967295 mmXDMA_MSTR_PIPE1_XDMA_MSTR_PERFMEAS_CNTL 0 0x41f 0 0 4294967295 mmXDMA_MSTR_PIPE2_XDMA_MSTR_PERFMEAS_CNTL 0 0x42f 0 0 4294967295 mmXDMA_MSTR_PIPE3_XDMA_MSTR_PERFMEAS_CNTL 0 0x43f 0 0 4294967295 mmXDMA_MSTR_PIPE4_XDMA_MSTR_PERFMEAS_CNTL 0 0x44f 0 0 4294967295 mmXDMA_MSTR_PIPE5_XDMA_MSTR_PERFMEAS_CNTL 0 0x45f 0 0 4294967295 mmXDMA_SLV_CNTL 0 0x460 9 0 4294967295 XDMA_SLV_READ_LINES 0 0 XDMA_SLV_MEM_READY 9 9 XDMA_SLV_ACTIVE 10 10 XDMA_SLV_ALPHA_POSITION 12 13 XDMA_SLV_ENABLE 16 16 XDMA_SLV_READ_LAT_TEST_EN 19 19 XDMA_SLV_SOFT_RESET 20 20 XDMA_SLV_REQ_MAXED_OUT 24 24 XDMA_SLV_WB_BURST_RESET 25 25 mmXDMA_SLV_MEM_CLIENT_CONFIG 0 0x461 3 0 4294967295 XDMA_SLV_MEM_CLIENT_SWAP 8 9 XDMA_SLV_MEM_CLIENT_VMID 12 15 XDMA_SLV_MEM_CLIENT_PRIV 16 16 mmXDMA_SLV_SLS_PITCH 0 0x462 2 0 4294967295 XDMA_SLV_SLS_PITCH 0 13 XDMA_SLV_SLS_WIDTH 16 29 mmXDMA_SLV_READ_URGENT_CNTL 0 0x463 5 0 4294967295 XDMA_SLV_READ_CLIENT_STALL 0 0 XDMA_SLV_READ_URGENT_LIMIT 4 7 XDMA_SLV_READ_URGENT_LEVEL 8 11 XDMA_SLV_READ_STALL_DELAY 12 15 XDMA_SLV_READ_URGENT_TIMER 16 31 mmXDMA_SLV_WRITE_URGENT_CNTL 0 0x464 3 0 4294967295 XDMA_SLV_WRITE_STALL 0 0 XDMA_SLV_WRITE_URGENT_LEVEL 8 11 XDMA_SLV_WRITE_STALL_DELAY 12 15 mmXDMA_SLV_WB_RATE_CNTL 0 0x465 2 0 4294967295 XDMA_SLV_WB_BURST_SIZE 0 8 XDMA_SLV_WB_BURST_PERIOD 16 31 mmXDMA_SLV_READ_LATENCY_MINMAX 0 0x466 2 0 4294967295 XDMA_SLV_READ_LATENCY_MIN 0 15 XDMA_SLV_READ_LATENCY_MAX 16 31 mmXDMA_SLV_READ_LATENCY_AVE 0 0x467 2 0 4294967295 XDMA_SLV_READ_LATENCY_ACC 0 19 XDMA_SLV_READ_LATENCY_COUNT 20 31 mmXDMA_SLV_PCIE_NACK_STATUS 0 0x468 3 0 4294967295 XDMA_SLV_PCIE_NACK_TAG 0 9 XDMA_SLV_PCIE_NACK 12 13 XDMA_SLV_PCIE_NACK_CLR 16 16 mmXDMA_SLV_MEM_NACK_STATUS 0 0x469 3 0 4294967295 XDMA_SLV_MEM_NACK_TAG 0 15 XDMA_SLV_MEM_NACK 16 17 XDMA_SLV_MEM_NACK_CLR 31 31 mmXDMA_SLV_RDRET_BUF_STATUS 0 0x46a 4 0 4294967295 XDMA_SLV_RDRET_FREE_ENTRIES 0 9 XDMA_SLV_RDRET_BUF_SIZE 12 21 XDMA_SLV_RDRET_PG_STATE 22 23 XDMA_SLV_RDRET_PG_TRANS 24 24 mmXDMA_SLV_READ_LATENCY_TIMER 0 0x46b 1 0 4294967295 XDMA_SLV_READ_LATENCY_TIMER 0 15 mmXDMA_SLV_FLIP_PENDING 0 0x46c 1 0 4294967295 XDMA_SLV_FLIP_PENDING 0 0 mmXDMA_SLV_CHANNEL_CNTL 0 0x470 4 0 4294967295 XDMA_SLV_CHANNEL_WEIGHT 0 8 XDMA_SLV_STOP_TRANSFER 16 16 XDMA_SLV_CHANNEL_SOFT_RESET 17 17 XDMA_SLV_CHANNEL_ACTIVE 24 24 mmXDMA_SLV_CHANNEL0_XDMA_SLV_CHANNEL_CNTL 0 0x470 0 0 4294967295 mmXDMA_SLV_CHANNEL1_XDMA_SLV_CHANNEL_CNTL 0 0x478 0 0 4294967295 mmXDMA_SLV_CHANNEL2_XDMA_SLV_CHANNEL_CNTL 0 0x480 0 0 4294967295 mmXDMA_SLV_CHANNEL3_XDMA_SLV_CHANNEL_CNTL 0 0x488 0 0 4294967295 mmXDMA_SLV_CHANNEL4_XDMA_SLV_CHANNEL_CNTL 0 0x490 0 0 4294967295 mmXDMA_SLV_CHANNEL5_XDMA_SLV_CHANNEL_CNTL 0 0x498 0 0 4294967295 mmXDMA_SLV_REMOTE_GPU_ADDRESS 0 0x471 1 0 4294967295 XDMA_SLV_REMOTE_GPU_ADDRESS 0 31 mmXDMA_SLV_CHANNEL0_XDMA_SLV_REMOTE_GPU_ADDRESS 0 0x471 0 0 4294967295 mmXDMA_SLV_CHANNEL1_XDMA_SLV_REMOTE_GPU_ADDRESS 0 0x479 0 0 4294967295 mmXDMA_SLV_CHANNEL2_XDMA_SLV_REMOTE_GPU_ADDRESS 0 0x481 0 0 4294967295 mmXDMA_SLV_CHANNEL3_XDMA_SLV_REMOTE_GPU_ADDRESS 0 0x489 0 0 4294967295 mmXDMA_SLV_CHANNEL4_XDMA_SLV_REMOTE_GPU_ADDRESS 0 0x491 0 0 4294967295 mmXDMA_SLV_CHANNEL5_XDMA_SLV_REMOTE_GPU_ADDRESS 0 0x499 0 0 4294967295 mmXDMA_SLV_REMOTE_GPU_ADDRESS_HIGH 0 0x472 1 0 4294967295 XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH 0 7 mmXDMA_SLV_CHANNEL0_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH 0 0x472 0 0 4294967295 mmXDMA_SLV_CHANNEL1_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH 0 0x47a 0 0 4294967295 mmXDMA_SLV_CHANNEL2_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH 0 0x482 0 0 4294967295 mmXDMA_SLV_CHANNEL3_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH 0 0x48a 0 0 4294967295 mmXDMA_SLV_CHANNEL4_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH 0 0x492 0 0 4294967295 mmXDMA_SLV_CHANNEL5_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH 0 0x49a 0 0 4294967295 mmCMD_BUS_TX_CONTROL_LANE0 0 0x48e0 3 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 tx_rdy 8 8 mmDC_COMBOPHYTXREGS0_CMD_BUS_TX_CONTROL_LANE0 0 0x48e0 0 0 4294967295 mmDC_COMBOPHYTXREGS1_CMD_BUS_TX_CONTROL_LANE0 0 0x4980 0 0 4294967295 mmDC_COMBOPHYTXREGS2_CMD_BUS_TX_CONTROL_LANE0 0 0x9a20 0 0 4294967295 mmDC_COMBOPHYTXREGS3_CMD_BUS_TX_CONTROL_LANE0 0 0x9ac0 0 0 4294967295 mmDC_COMBOPHYTXREGS4_CMD_BUS_TX_CONTROL_LANE0 0 0x9b60 0 0 4294967295 mmDC_COMBOPHYTXREGS5_CMD_BUS_TX_CONTROL_LANE0 0 0x9c00 0 0 4294967295 mmDC_COMBOPHYTXREGS6_CMD_BUS_TX_CONTROL_LANE0 0 0x9ca0 0 0 4294967295 mmDC_COMBOPHYTXREGS7_CMD_BUS_TX_CONTROL_LANE0 0 0x9d40 0 0 4294967295 mmCMD_BUS_TX_CONTROL_LANE1 0 0x48f0 3 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 tx_rdy 8 8 mmDC_COMBOPHYTXREGS0_CMD_BUS_TX_CONTROL_LANE1 0 0x48f0 0 0 4294967295 mmDC_COMBOPHYTXREGS1_CMD_BUS_TX_CONTROL_LANE1 0 0x4990 0 0 4294967295 mmDC_COMBOPHYTXREGS2_CMD_BUS_TX_CONTROL_LANE1 0 0x9a30 0 0 4294967295 mmDC_COMBOPHYTXREGS3_CMD_BUS_TX_CONTROL_LANE1 0 0x9ad0 0 0 4294967295 mmDC_COMBOPHYTXREGS4_CMD_BUS_TX_CONTROL_LANE1 0 0x9b70 0 0 4294967295 mmDC_COMBOPHYTXREGS5_CMD_BUS_TX_CONTROL_LANE1 0 0x9c10 0 0 4294967295 mmDC_COMBOPHYTXREGS6_CMD_BUS_TX_CONTROL_LANE1 0 0x9cb0 0 0 4294967295 mmDC_COMBOPHYTXREGS7_CMD_BUS_TX_CONTROL_LANE1 0 0x9d50 0 0 4294967295 mmCMD_BUS_TX_CONTROL_LANE2 0 0x4900 3 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 tx_rdy 8 8 mmDC_COMBOPHYTXREGS0_CMD_BUS_TX_CONTROL_LANE2 0 0x4900 0 0 4294967295 mmDC_COMBOPHYTXREGS1_CMD_BUS_TX_CONTROL_LANE2 0 0x49a0 0 0 4294967295 mmDC_COMBOPHYTXREGS2_CMD_BUS_TX_CONTROL_LANE2 0 0x9a40 0 0 4294967295 mmDC_COMBOPHYTXREGS3_CMD_BUS_TX_CONTROL_LANE2 0 0x9ae0 0 0 4294967295 mmDC_COMBOPHYTXREGS4_CMD_BUS_TX_CONTROL_LANE2 0 0x9b80 0 0 4294967295 mmDC_COMBOPHYTXREGS5_CMD_BUS_TX_CONTROL_LANE2 0 0x9c20 0 0 4294967295 mmDC_COMBOPHYTXREGS6_CMD_BUS_TX_CONTROL_LANE2 0 0x9cc0 0 0 4294967295 mmDC_COMBOPHYTXREGS7_CMD_BUS_TX_CONTROL_LANE2 0 0x9d60 0 0 4294967295 mmCMD_BUS_TX_CONTROL_LANE3 0 0x4910 3 0 4294967295 tx_pwr 0 2 tx_pg_en 3 4 tx_rdy 8 8 mmDC_COMBOPHYTXREGS0_CMD_BUS_TX_CONTROL_LANE3 0 0x4910 0 0 4294967295 mmDC_COMBOPHYTXREGS1_CMD_BUS_TX_CONTROL_LANE3 0 0x49b0 0 0 4294967295 mmDC_COMBOPHYTXREGS2_CMD_BUS_TX_CONTROL_LANE3 0 0x9a50 0 0 4294967295 mmDC_COMBOPHYTXREGS3_CMD_BUS_TX_CONTROL_LANE3 0 0x9af0 0 0 4294967295 mmDC_COMBOPHYTXREGS4_CMD_BUS_TX_CONTROL_LANE3 0 0x9b90 0 0 4294967295 mmDC_COMBOPHYTXREGS5_CMD_BUS_TX_CONTROL_LANE3 0 0x9c30 0 0 4294967295 mmDC_COMBOPHYTXREGS6_CMD_BUS_TX_CONTROL_LANE3 0 0x9cd0 0 0 4294967295 mmDC_COMBOPHYTXREGS7_CMD_BUS_TX_CONTROL_LANE3 0 0x9d70 0 0 4294967295 mmMARGIN_DEEMPH_LANE0 0 0x48e1 3 0 4294967295 txmarg_sel 0 2 deemph_sel 3 4 tx_margin_en 5 5 mmDC_COMBOPHYTXREGS0_MARGIN_DEEMPH_LANE0 0 0x48e1 0 0 4294967295 mmDC_COMBOPHYTXREGS1_MARGIN_DEEMPH_LANE0 0 0x4981 0 0 4294967295 mmDC_COMBOPHYTXREGS2_MARGIN_DEEMPH_LANE0 0 0x9a21 0 0 4294967295 mmDC_COMBOPHYTXREGS3_MARGIN_DEEMPH_LANE0 0 0x9ac1 0 0 4294967295 mmDC_COMBOPHYTXREGS4_MARGIN_DEEMPH_LANE0 0 0x9b61 0 0 4294967295 mmDC_COMBOPHYTXREGS5_MARGIN_DEEMPH_LANE0 0 0x9c01 0 0 4294967295 mmDC_COMBOPHYTXREGS6_MARGIN_DEEMPH_LANE0 0 0x9ca1 0 0 4294967295 mmDC_COMBOPHYTXREGS7_MARGIN_DEEMPH_LANE0 0 0x9d41 0 0 4294967295 mmMARGIN_DEEMPH_LANE1 0 0x48f1 3 0 4294967295 txmarg_sel 0 2 deemph_sel 3 4 tx_margin_en 5 5 mmDC_COMBOPHYTXREGS0_MARGIN_DEEMPH_LANE1 0 0x48f1 0 0 4294967295 mmDC_COMBOPHYTXREGS1_MARGIN_DEEMPH_LANE1 0 0x4991 0 0 4294967295 mmDC_COMBOPHYTXREGS2_MARGIN_DEEMPH_LANE1 0 0x9a31 0 0 4294967295 mmDC_COMBOPHYTXREGS3_MARGIN_DEEMPH_LANE1 0 0x9ad1 0 0 4294967295 mmDC_COMBOPHYTXREGS4_MARGIN_DEEMPH_LANE1 0 0x9b71 0 0 4294967295 mmDC_COMBOPHYTXREGS5_MARGIN_DEEMPH_LANE1 0 0x9c11 0 0 4294967295 mmDC_COMBOPHYTXREGS6_MARGIN_DEEMPH_LANE1 0 0x9cb1 0 0 4294967295 mmDC_COMBOPHYTXREGS7_MARGIN_DEEMPH_LANE1 0 0x9d51 0 0 4294967295 mmMARGIN_DEEMPH_LANE2 0 0x4901 3 0 4294967295 txmarg_sel 0 2 deemph_sel 3 4 tx_margin_en 5 5 mmDC_COMBOPHYTXREGS0_MARGIN_DEEMPH_LANE2 0 0x4901 0 0 4294967295 mmDC_COMBOPHYTXREGS1_MARGIN_DEEMPH_LANE2 0 0x49a1 0 0 4294967295 mmDC_COMBOPHYTXREGS2_MARGIN_DEEMPH_LANE2 0 0x9a41 0 0 4294967295 mmDC_COMBOPHYTXREGS3_MARGIN_DEEMPH_LANE2 0 0x9ae1 0 0 4294967295 mmDC_COMBOPHYTXREGS4_MARGIN_DEEMPH_LANE2 0 0x9b81 0 0 4294967295 mmDC_COMBOPHYTXREGS5_MARGIN_DEEMPH_LANE2 0 0x9c21 0 0 4294967295 mmDC_COMBOPHYTXREGS6_MARGIN_DEEMPH_LANE2 0 0x9cc1 0 0 4294967295 mmDC_COMBOPHYTXREGS7_MARGIN_DEEMPH_LANE2 0 0x9d61 0 0 4294967295 mmMARGIN_DEEMPH_LANE3 0 0x4911 3 0 4294967295 txmarg_sel 0 2 deemph_sel 3 4 tx_margin_en 5 5 mmDC_COMBOPHYTXREGS0_MARGIN_DEEMPH_LANE3 0 0x4911 0 0 4294967295 mmDC_COMBOPHYTXREGS1_MARGIN_DEEMPH_LANE3 0 0x49b1 0 0 4294967295 mmDC_COMBOPHYTXREGS2_MARGIN_DEEMPH_LANE3 0 0x9a51 0 0 4294967295 mmDC_COMBOPHYTXREGS3_MARGIN_DEEMPH_LANE3 0 0x9af1 0 0 4294967295 mmDC_COMBOPHYTXREGS4_MARGIN_DEEMPH_LANE3 0 0x9b91 0 0 4294967295 mmDC_COMBOPHYTXREGS5_MARGIN_DEEMPH_LANE3 0 0x9c31 0 0 4294967295 mmDC_COMBOPHYTXREGS6_MARGIN_DEEMPH_LANE3 0 0x9cd1 0 0 4294967295 mmDC_COMBOPHYTXREGS7_MARGIN_DEEMPH_LANE3 0 0x9d71 0 0 4294967295 mmCMD_BUS_GLOBAL_FOR_TX_LANE0 0 0x48e2 12 0 4294967295 twosym_en 1 2 link_speed 3 4 gang_mode 5 7 max_linkrate 8 9 pcs_freq 10 11 pcs_clken 12 12 pcs_clkdone 13 13 pll1_always_on 14 14 rdclk_div2_en 15 15 tx_boost_adj 16 19 tx_boost_en 20 20 tx_binary_ron_code_offset 22 23 mmDC_COMBOPHYTXREGS0_CMD_BUS_GLOBAL_FOR_TX_LANE0 0 0x48e2 0 0 4294967295 mmDC_COMBOPHYTXREGS1_CMD_BUS_GLOBAL_FOR_TX_LANE0 0 0x4982 0 0 4294967295 mmDC_COMBOPHYTXREGS2_CMD_BUS_GLOBAL_FOR_TX_LANE0 0 0x9a22 0 0 4294967295 mmDC_COMBOPHYTXREGS3_CMD_BUS_GLOBAL_FOR_TX_LANE0 0 0x9ac2 0 0 4294967295 mmDC_COMBOPHYTXREGS4_CMD_BUS_GLOBAL_FOR_TX_LANE0 0 0x9b62 0 0 4294967295 mmDC_COMBOPHYTXREGS5_CMD_BUS_GLOBAL_FOR_TX_LANE0 0 0x9c02 0 0 4294967295 mmDC_COMBOPHYTXREGS6_CMD_BUS_GLOBAL_FOR_TX_LANE0 0 0x9ca2 0 0 4294967295 mmDC_COMBOPHYTXREGS7_CMD_BUS_GLOBAL_FOR_TX_LANE0 0 0x9d42 0 0 4294967295 mmCMD_BUS_GLOBAL_FOR_TX_LANE1 0 0x48f2 12 0 4294967295 twosym_en 1 2 link_speed 3 4 gang_mode 5 7 max_linkrate 8 9 pcs_freq 10 11 pcs_clken 12 12 pcs_clkdone 13 13 pll1_always_on 14 14 rdclk_div2_en 15 15 tx_boost_adj 16 19 tx_boost_en 20 20 tx_binary_ron_code_offset 22 23 mmDC_COMBOPHYTXREGS0_CMD_BUS_GLOBAL_FOR_TX_LANE1 0 0x48f2 0 0 4294967295 mmDC_COMBOPHYTXREGS1_CMD_BUS_GLOBAL_FOR_TX_LANE1 0 0x4992 0 0 4294967295 mmDC_COMBOPHYTXREGS2_CMD_BUS_GLOBAL_FOR_TX_LANE1 0 0x9a32 0 0 4294967295 mmDC_COMBOPHYTXREGS3_CMD_BUS_GLOBAL_FOR_TX_LANE1 0 0x9ad2 0 0 4294967295 mmDC_COMBOPHYTXREGS4_CMD_BUS_GLOBAL_FOR_TX_LANE1 0 0x9b72 0 0 4294967295 mmDC_COMBOPHYTXREGS5_CMD_BUS_GLOBAL_FOR_TX_LANE1 0 0x9c12 0 0 4294967295 mmDC_COMBOPHYTXREGS6_CMD_BUS_GLOBAL_FOR_TX_LANE1 0 0x9cb2 0 0 4294967295 mmDC_COMBOPHYTXREGS7_CMD_BUS_GLOBAL_FOR_TX_LANE1 0 0x9d52 0 0 4294967295 mmCMD_BUS_GLOBAL_FOR_TX_LANE2 0 0x4902 12 0 4294967295 twosym_en 1 2 link_speed 3 4 gang_mode 5 7 max_linkrate 8 9 pcs_freq 10 11 pcs_clken 12 12 pcs_clkdone 13 13 pll1_always_on 14 14 rdclk_div2_en 15 15 tx_boost_adj 16 19 tx_boost_en 20 20 tx_binary_ron_code_offset 22 23 mmDC_COMBOPHYTXREGS0_CMD_BUS_GLOBAL_FOR_TX_LANE2 0 0x4902 0 0 4294967295 mmDC_COMBOPHYTXREGS1_CMD_BUS_GLOBAL_FOR_TX_LANE2 0 0x49a2 0 0 4294967295 mmDC_COMBOPHYTXREGS2_CMD_BUS_GLOBAL_FOR_TX_LANE2 0 0x9a42 0 0 4294967295 mmDC_COMBOPHYTXREGS3_CMD_BUS_GLOBAL_FOR_TX_LANE2 0 0x9ae2 0 0 4294967295 mmDC_COMBOPHYTXREGS4_CMD_BUS_GLOBAL_FOR_TX_LANE2 0 0x9b82 0 0 4294967295 mmDC_COMBOPHYTXREGS5_CMD_BUS_GLOBAL_FOR_TX_LANE2 0 0x9c22 0 0 4294967295 mmDC_COMBOPHYTXREGS6_CMD_BUS_GLOBAL_FOR_TX_LANE2 0 0x9cc2 0 0 4294967295 mmDC_COMBOPHYTXREGS7_CMD_BUS_GLOBAL_FOR_TX_LANE2 0 0x9d62 0 0 4294967295 mmCMD_BUS_GLOBAL_FOR_TX_LANE3 0 0x4912 12 0 4294967295 twosym_en 1 2 link_speed 3 4 gang_mode 5 7 max_linkrate 8 9 pcs_freq 10 11 pcs_clken 12 12 pcs_clkdone 13 13 pll1_always_on 14 14 rdclk_div2_en 15 15 tx_boost_adj 16 19 tx_boost_en 20 20 tx_binary_ron_code_offset 22 23 mmDC_COMBOPHYTXREGS0_CMD_BUS_GLOBAL_FOR_TX_LANE3 0 0x4912 0 0 4294967295 mmDC_COMBOPHYTXREGS1_CMD_BUS_GLOBAL_FOR_TX_LANE3 0 0x49b2 0 0 4294967295 mmDC_COMBOPHYTXREGS2_CMD_BUS_GLOBAL_FOR_TX_LANE3 0 0x9a52 0 0 4294967295 mmDC_COMBOPHYTXREGS3_CMD_BUS_GLOBAL_FOR_TX_LANE3 0 0x9af2 0 0 4294967295 mmDC_COMBOPHYTXREGS4_CMD_BUS_GLOBAL_FOR_TX_LANE3 0 0x9b92 0 0 4294967295 mmDC_COMBOPHYTXREGS5_CMD_BUS_GLOBAL_FOR_TX_LANE3 0 0x9c32 0 0 4294967295 mmDC_COMBOPHYTXREGS6_CMD_BUS_GLOBAL_FOR_TX_LANE3 0 0x9cd2 0 0 4294967295 mmDC_COMBOPHYTXREGS7_CMD_BUS_GLOBAL_FOR_TX_LANE3 0 0x9d72 0 0 4294967295 mmTX_DISP_RFU0_LANE0 0 0x48e3 1 0 4294967295 rfu_value0 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU0_LANE0 0 0x48e3 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU0_LANE0 0 0x4983 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU0_LANE0 0 0x9a23 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU0_LANE0 0 0x9ac3 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU0_LANE0 0 0x9b63 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU0_LANE0 0 0x9c03 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU0_LANE0 0 0x9ca3 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU0_LANE0 0 0x9d43 0 0 4294967295 mmTX_DISP_RFU0_LANE1 0 0x48f3 1 0 4294967295 rfu_value0 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU0_LANE1 0 0x48f3 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU0_LANE1 0 0x4993 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU0_LANE1 0 0x9a33 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU0_LANE1 0 0x9ad3 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU0_LANE1 0 0x9b73 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU0_LANE1 0 0x9c13 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU0_LANE1 0 0x9cb3 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU0_LANE1 0 0x9d53 0 0 4294967295 mmTX_DISP_RFU0_LANE2 0 0x4903 1 0 4294967295 rfu_value0 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU0_LANE2 0 0x4903 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU0_LANE2 0 0x49a3 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU0_LANE2 0 0x9a43 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU0_LANE2 0 0x9ae3 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU0_LANE2 0 0x9b83 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU0_LANE2 0 0x9c23 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU0_LANE2 0 0x9cc3 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU0_LANE2 0 0x9d63 0 0 4294967295 mmTX_DISP_RFU0_LANE3 0 0x4913 1 0 4294967295 rfu_value0 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU0_LANE3 0 0x4913 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU0_LANE3 0 0x49b3 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU0_LANE3 0 0x9a53 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU0_LANE3 0 0x9af3 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU0_LANE3 0 0x9b93 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU0_LANE3 0 0x9c33 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU0_LANE3 0 0x9cd3 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU0_LANE3 0 0x9d73 0 0 4294967295 mmTX_DISP_RFU1_LANE0 0 0x48e4 1 0 4294967295 rfu_value1 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU1_LANE0 0 0x48e4 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU1_LANE0 0 0x4984 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU1_LANE0 0 0x9a24 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU1_LANE0 0 0x9ac4 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU1_LANE0 0 0x9b64 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU1_LANE0 0 0x9c04 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU1_LANE0 0 0x9ca4 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU1_LANE0 0 0x9d44 0 0 4294967295 mmTX_DISP_RFU1_LANE1 0 0x48f4 1 0 4294967295 rfu_value1 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU1_LANE1 0 0x48f4 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU1_LANE1 0 0x4994 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU1_LANE1 0 0x9a34 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU1_LANE1 0 0x9ad4 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU1_LANE1 0 0x9b74 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU1_LANE1 0 0x9c14 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU1_LANE1 0 0x9cb4 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU1_LANE1 0 0x9d54 0 0 4294967295 mmTX_DISP_RFU1_LANE2 0 0x4904 1 0 4294967295 rfu_value1 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU1_LANE2 0 0x4904 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU1_LANE2 0 0x49a4 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU1_LANE2 0 0x9a44 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU1_LANE2 0 0x9ae4 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU1_LANE2 0 0x9b84 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU1_LANE2 0 0x9c24 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU1_LANE2 0 0x9cc4 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU1_LANE2 0 0x9d64 0 0 4294967295 mmTX_DISP_RFU1_LANE3 0 0x4914 1 0 4294967295 rfu_value1 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU1_LANE3 0 0x4914 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU1_LANE3 0 0x49b4 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU1_LANE3 0 0x9a54 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU1_LANE3 0 0x9af4 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU1_LANE3 0 0x9b94 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU1_LANE3 0 0x9c34 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU1_LANE3 0 0x9cd4 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU1_LANE3 0 0x9d74 0 0 4294967295 mmTX_DISP_RFU2_LANE0 0 0x48e5 1 0 4294967295 rfu_value2 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU2_LANE0 0 0x48e5 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU2_LANE0 0 0x4985 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU2_LANE0 0 0x9a25 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU2_LANE0 0 0x9ac5 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU2_LANE0 0 0x9b65 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU2_LANE0 0 0x9c05 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU2_LANE0 0 0x9ca5 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU2_LANE0 0 0x9d45 0 0 4294967295 mmTX_DISP_RFU2_LANE1 0 0x48f5 1 0 4294967295 rfu_value2 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU2_LANE1 0 0x48f5 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU2_LANE1 0 0x4995 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU2_LANE1 0 0x9a35 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU2_LANE1 0 0x9ad5 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU2_LANE1 0 0x9b75 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU2_LANE1 0 0x9c15 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU2_LANE1 0 0x9cb5 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU2_LANE1 0 0x9d55 0 0 4294967295 mmTX_DISP_RFU2_LANE2 0 0x4905 1 0 4294967295 rfu_value2 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU2_LANE2 0 0x4905 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU2_LANE2 0 0x49a5 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU2_LANE2 0 0x9a45 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU2_LANE2 0 0x9ae5 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU2_LANE2 0 0x9b85 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU2_LANE2 0 0x9c25 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU2_LANE2 0 0x9cc5 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU2_LANE2 0 0x9d65 0 0 4294967295 mmTX_DISP_RFU2_LANE3 0 0x4915 1 0 4294967295 rfu_value2 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU2_LANE3 0 0x4915 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU2_LANE3 0 0x49b5 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU2_LANE3 0 0x9a55 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU2_LANE3 0 0x9af5 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU2_LANE3 0 0x9b95 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU2_LANE3 0 0x9c35 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU2_LANE3 0 0x9cd5 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU2_LANE3 0 0x9d75 0 0 4294967295 mmTX_DISP_RFU3_LANE0 0 0x48e6 1 0 4294967295 rfu_value3 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU3_LANE0 0 0x48e6 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU3_LANE0 0 0x4986 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU3_LANE0 0 0x9a26 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU3_LANE0 0 0x9ac6 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU3_LANE0 0 0x9b66 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU3_LANE0 0 0x9c06 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU3_LANE0 0 0x9ca6 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU3_LANE0 0 0x9d46 0 0 4294967295 mmTX_DISP_RFU3_LANE1 0 0x48f6 1 0 4294967295 rfu_value3 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU3_LANE1 0 0x48f6 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU3_LANE1 0 0x4996 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU3_LANE1 0 0x9a36 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU3_LANE1 0 0x9ad6 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU3_LANE1 0 0x9b76 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU3_LANE1 0 0x9c16 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU3_LANE1 0 0x9cb6 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU3_LANE1 0 0x9d56 0 0 4294967295 mmTX_DISP_RFU3_LANE2 0 0x4906 1 0 4294967295 rfu_value3 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU3_LANE2 0 0x4906 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU3_LANE2 0 0x49a6 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU3_LANE2 0 0x9a46 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU3_LANE2 0 0x9ae6 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU3_LANE2 0 0x9b86 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU3_LANE2 0 0x9c26 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU3_LANE2 0 0x9cc6 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU3_LANE2 0 0x9d66 0 0 4294967295 mmTX_DISP_RFU3_LANE3 0 0x4916 1 0 4294967295 rfu_value3 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU3_LANE3 0 0x4916 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU3_LANE3 0 0x49b6 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU3_LANE3 0 0x9a56 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU3_LANE3 0 0x9af6 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU3_LANE3 0 0x9b96 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU3_LANE3 0 0x9c36 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU3_LANE3 0 0x9cd6 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU3_LANE3 0 0x9d76 0 0 4294967295 mmTX_DISP_RFU4_LANE0 0 0x48e7 1 0 4294967295 rfu_value4 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU4_LANE0 0 0x48e7 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU4_LANE0 0 0x4987 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU4_LANE0 0 0x9a27 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU4_LANE0 0 0x9ac7 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU4_LANE0 0 0x9b67 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU4_LANE0 0 0x9c07 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU4_LANE0 0 0x9ca7 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU4_LANE0 0 0x9d47 0 0 4294967295 mmTX_DISP_RFU4_LANE1 0 0x48f7 1 0 4294967295 rfu_value4 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU4_LANE1 0 0x48f7 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU4_LANE1 0 0x4997 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU4_LANE1 0 0x9a37 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU4_LANE1 0 0x9ad7 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU4_LANE1 0 0x9b77 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU4_LANE1 0 0x9c17 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU4_LANE1 0 0x9cb7 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU4_LANE1 0 0x9d57 0 0 4294967295 mmTX_DISP_RFU4_LANE2 0 0x4907 1 0 4294967295 rfu_value4 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU4_LANE2 0 0x4907 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU4_LANE2 0 0x49a7 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU4_LANE2 0 0x9a47 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU4_LANE2 0 0x9ae7 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU4_LANE2 0 0x9b87 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU4_LANE2 0 0x9c27 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU4_LANE2 0 0x9cc7 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU4_LANE2 0 0x9d67 0 0 4294967295 mmTX_DISP_RFU4_LANE3 0 0x4917 1 0 4294967295 rfu_value4 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU4_LANE3 0 0x4917 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU4_LANE3 0 0x49b7 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU4_LANE3 0 0x9a57 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU4_LANE3 0 0x9af7 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU4_LANE3 0 0x9b97 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU4_LANE3 0 0x9c37 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU4_LANE3 0 0x9cd7 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU4_LANE3 0 0x9d77 0 0 4294967295 mmTX_DISP_RFU5_LANE0 0 0x48e8 1 0 4294967295 rfu_value5 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU5_LANE0 0 0x48e8 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU5_LANE0 0 0x4988 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU5_LANE0 0 0x9a28 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU5_LANE0 0 0x9ac8 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU5_LANE0 0 0x9b68 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU5_LANE0 0 0x9c08 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU5_LANE0 0 0x9ca8 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU5_LANE0 0 0x9d48 0 0 4294967295 mmTX_DISP_RFU5_LANE1 0 0x48f8 1 0 4294967295 rfu_value5 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU5_LANE1 0 0x48f8 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU5_LANE1 0 0x4998 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU5_LANE1 0 0x9a38 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU5_LANE1 0 0x9ad8 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU5_LANE1 0 0x9b78 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU5_LANE1 0 0x9c18 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU5_LANE1 0 0x9cb8 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU5_LANE1 0 0x9d58 0 0 4294967295 mmTX_DISP_RFU5_LANE2 0 0x4908 1 0 4294967295 rfu_value5 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU5_LANE2 0 0x4908 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU5_LANE2 0 0x49a8 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU5_LANE2 0 0x9a48 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU5_LANE2 0 0x9ae8 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU5_LANE2 0 0x9b88 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU5_LANE2 0 0x9c28 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU5_LANE2 0 0x9cc8 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU5_LANE2 0 0x9d68 0 0 4294967295 mmTX_DISP_RFU5_LANE3 0 0x4918 1 0 4294967295 rfu_value5 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU5_LANE3 0 0x4918 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU5_LANE3 0 0x49b8 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU5_LANE3 0 0x9a58 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU5_LANE3 0 0x9af8 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU5_LANE3 0 0x9b98 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU5_LANE3 0 0x9c38 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU5_LANE3 0 0x9cd8 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU5_LANE3 0 0x9d78 0 0 4294967295 mmTX_DISP_RFU6_LANE0 0 0x48e9 1 0 4294967295 rfu_value6 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU6_LANE0 0 0x48e9 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU6_LANE0 0 0x4989 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU6_LANE0 0 0x9a29 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU6_LANE0 0 0x9ac9 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU6_LANE0 0 0x9b69 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU6_LANE0 0 0x9c09 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU6_LANE0 0 0x9ca9 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU6_LANE0 0 0x9d49 0 0 4294967295 mmTX_DISP_RFU6_LANE1 0 0x48f9 1 0 4294967295 rfu_value6 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU6_LANE1 0 0x48f9 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU6_LANE1 0 0x4999 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU6_LANE1 0 0x9a39 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU6_LANE1 0 0x9ad9 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU6_LANE1 0 0x9b79 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU6_LANE1 0 0x9c19 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU6_LANE1 0 0x9cb9 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU6_LANE1 0 0x9d59 0 0 4294967295 mmTX_DISP_RFU6_LANE2 0 0x4909 1 0 4294967295 rfu_value6 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU6_LANE2 0 0x4909 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU6_LANE2 0 0x49a9 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU6_LANE2 0 0x9a49 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU6_LANE2 0 0x9ae9 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU6_LANE2 0 0x9b89 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU6_LANE2 0 0x9c29 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU6_LANE2 0 0x9cc9 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU6_LANE2 0 0x9d69 0 0 4294967295 mmTX_DISP_RFU6_LANE3 0 0x4919 1 0 4294967295 rfu_value6 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU6_LANE3 0 0x4919 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU6_LANE3 0 0x49b9 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU6_LANE3 0 0x9a59 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU6_LANE3 0 0x9af9 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU6_LANE3 0 0x9b99 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU6_LANE3 0 0x9c39 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU6_LANE3 0 0x9cd9 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU6_LANE3 0 0x9d79 0 0 4294967295 mmTX_DISP_RFU7_LANE0 0 0x48ea 1 0 4294967295 rfu_value7 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU7_LANE0 0 0x48ea 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU7_LANE0 0 0x498a 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU7_LANE0 0 0x9a2a 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU7_LANE0 0 0x9aca 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU7_LANE0 0 0x9b6a 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU7_LANE0 0 0x9c0a 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU7_LANE0 0 0x9caa 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU7_LANE0 0 0x9d4a 0 0 4294967295 mmTX_DISP_RFU7_LANE1 0 0x48fa 1 0 4294967295 rfu_value7 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU7_LANE1 0 0x48fa 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU7_LANE1 0 0x499a 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU7_LANE1 0 0x9a3a 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU7_LANE1 0 0x9ada 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU7_LANE1 0 0x9b7a 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU7_LANE1 0 0x9c1a 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU7_LANE1 0 0x9cba 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU7_LANE1 0 0x9d5a 0 0 4294967295 mmTX_DISP_RFU7_LANE2 0 0x490a 1 0 4294967295 rfu_value7 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU7_LANE2 0 0x490a 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU7_LANE2 0 0x49aa 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU7_LANE2 0 0x9a4a 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU7_LANE2 0 0x9aea 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU7_LANE2 0 0x9b8a 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU7_LANE2 0 0x9c2a 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU7_LANE2 0 0x9cca 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU7_LANE2 0 0x9d6a 0 0 4294967295 mmTX_DISP_RFU7_LANE3 0 0x491a 1 0 4294967295 rfu_value7 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU7_LANE3 0 0x491a 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU7_LANE3 0 0x49ba 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU7_LANE3 0 0x9a5a 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU7_LANE3 0 0x9afa 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU7_LANE3 0 0x9b9a 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU7_LANE3 0 0x9c3a 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU7_LANE3 0 0x9cda 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU7_LANE3 0 0x9d7a 0 0 4294967295 mmTX_DISP_RFU8_LANE0 0 0x48eb 1 0 4294967295 rfu_value8 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU8_LANE0 0 0x48eb 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU8_LANE0 0 0x498b 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU8_LANE0 0 0x9a2b 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU8_LANE0 0 0x9acb 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU8_LANE0 0 0x9b6b 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU8_LANE0 0 0x9c0b 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU8_LANE0 0 0x9cab 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU8_LANE0 0 0x9d4b 0 0 4294967295 mmTX_DISP_RFU8_LANE1 0 0x48fb 1 0 4294967295 rfu_value8 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU8_LANE1 0 0x48fb 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU8_LANE1 0 0x499b 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU8_LANE1 0 0x9a3b 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU8_LANE1 0 0x9adb 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU8_LANE1 0 0x9b7b 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU8_LANE1 0 0x9c1b 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU8_LANE1 0 0x9cbb 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU8_LANE1 0 0x9d5b 0 0 4294967295 mmTX_DISP_RFU8_LANE2 0 0x490b 1 0 4294967295 rfu_value8 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU8_LANE2 0 0x490b 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU8_LANE2 0 0x49ab 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU8_LANE2 0 0x9a4b 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU8_LANE2 0 0x9aeb 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU8_LANE2 0 0x9b8b 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU8_LANE2 0 0x9c2b 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU8_LANE2 0 0x9ccb 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU8_LANE2 0 0x9d6b 0 0 4294967295 mmTX_DISP_RFU8_LANE3 0 0x491b 1 0 4294967295 rfu_value8 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU8_LANE3 0 0x491b 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU8_LANE3 0 0x49bb 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU8_LANE3 0 0x9a5b 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU8_LANE3 0 0x9afb 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU8_LANE3 0 0x9b9b 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU8_LANE3 0 0x9c3b 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU8_LANE3 0 0x9cdb 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU8_LANE3 0 0x9d7b 0 0 4294967295 mmTX_DISP_RFU9_LANE0 0 0x48ec 1 0 4294967295 rfu_value9 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU9_LANE0 0 0x48ec 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU9_LANE0 0 0x498c 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU9_LANE0 0 0x9a2c 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU9_LANE0 0 0x9acc 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU9_LANE0 0 0x9b6c 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU9_LANE0 0 0x9c0c 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU9_LANE0 0 0x9cac 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU9_LANE0 0 0x9d4c 0 0 4294967295 mmTX_DISP_RFU9_LANE1 0 0x48fc 1 0 4294967295 rfu_value9 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU9_LANE1 0 0x48fc 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU9_LANE1 0 0x499c 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU9_LANE1 0 0x9a3c 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU9_LANE1 0 0x9adc 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU9_LANE1 0 0x9b7c 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU9_LANE1 0 0x9c1c 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU9_LANE1 0 0x9cbc 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU9_LANE1 0 0x9d5c 0 0 4294967295 mmTX_DISP_RFU9_LANE2 0 0x490c 1 0 4294967295 rfu_value9 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU9_LANE2 0 0x490c 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU9_LANE2 0 0x49ac 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU9_LANE2 0 0x9a4c 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU9_LANE2 0 0x9aec 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU9_LANE2 0 0x9b8c 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU9_LANE2 0 0x9c2c 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU9_LANE2 0 0x9ccc 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU9_LANE2 0 0x9d6c 0 0 4294967295 mmTX_DISP_RFU9_LANE3 0 0x491c 1 0 4294967295 rfu_value9 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU9_LANE3 0 0x491c 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU9_LANE3 0 0x49bc 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU9_LANE3 0 0x9a5c 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU9_LANE3 0 0x9afc 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU9_LANE3 0 0x9b9c 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU9_LANE3 0 0x9c3c 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU9_LANE3 0 0x9cdc 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU9_LANE3 0 0x9d7c 0 0 4294967295 mmTX_DISP_RFU10_LANE0 0 0x48ed 1 0 4294967295 rfu_value10 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU10_LANE0 0 0x48ed 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU10_LANE0 0 0x498d 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU10_LANE0 0 0x9a2d 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU10_LANE0 0 0x9acd 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU10_LANE0 0 0x9b6d 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU10_LANE0 0 0x9c0d 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU10_LANE0 0 0x9cad 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU10_LANE0 0 0x9d4d 0 0 4294967295 mmTX_DISP_RFU10_LANE1 0 0x48fd 1 0 4294967295 rfu_value10 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU10_LANE1 0 0x48fd 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU10_LANE1 0 0x499d 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU10_LANE1 0 0x9a3d 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU10_LANE1 0 0x9add 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU10_LANE1 0 0x9b7d 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU10_LANE1 0 0x9c1d 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU10_LANE1 0 0x9cbd 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU10_LANE1 0 0x9d5d 0 0 4294967295 mmTX_DISP_RFU10_LANE2 0 0x490d 1 0 4294967295 rfu_value10 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU10_LANE2 0 0x490d 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU10_LANE2 0 0x49ad 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU10_LANE2 0 0x9a4d 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU10_LANE2 0 0x9aed 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU10_LANE2 0 0x9b8d 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU10_LANE2 0 0x9c2d 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU10_LANE2 0 0x9ccd 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU10_LANE2 0 0x9d6d 0 0 4294967295 mmTX_DISP_RFU10_LANE3 0 0x491d 1 0 4294967295 rfu_value10 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU10_LANE3 0 0x491d 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU10_LANE3 0 0x49bd 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU10_LANE3 0 0x9a5d 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU10_LANE3 0 0x9afd 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU10_LANE3 0 0x9b9d 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU10_LANE3 0 0x9c3d 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU10_LANE3 0 0x9cdd 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU10_LANE3 0 0x9d7d 0 0 4294967295 mmTX_DISP_RFU11_LANE0 0 0x48ee 1 0 4294967295 rfu_value11 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU11_LANE0 0 0x48ee 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU11_LANE0 0 0x498e 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU11_LANE0 0 0x9a2e 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU11_LANE0 0 0x9ace 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU11_LANE0 0 0x9b6e 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU11_LANE0 0 0x9c0e 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU11_LANE0 0 0x9cae 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU11_LANE0 0 0x9d4e 0 0 4294967295 mmTX_DISP_RFU11_LANE1 0 0x48fe 1 0 4294967295 rfu_value11 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU11_LANE1 0 0x48fe 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU11_LANE1 0 0x499e 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU11_LANE1 0 0x9a3e 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU11_LANE1 0 0x9ade 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU11_LANE1 0 0x9b7e 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU11_LANE1 0 0x9c1e 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU11_LANE1 0 0x9cbe 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU11_LANE1 0 0x9d5e 0 0 4294967295 mmTX_DISP_RFU11_LANE2 0 0x490e 1 0 4294967295 rfu_value11 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU11_LANE2 0 0x490e 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU11_LANE2 0 0x49ae 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU11_LANE2 0 0x9a4e 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU11_LANE2 0 0x9aee 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU11_LANE2 0 0x9b8e 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU11_LANE2 0 0x9c2e 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU11_LANE2 0 0x9cce 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU11_LANE2 0 0x9d6e 0 0 4294967295 mmTX_DISP_RFU11_LANE3 0 0x491e 1 0 4294967295 rfu_value11 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU11_LANE3 0 0x491e 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU11_LANE3 0 0x49be 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU11_LANE3 0 0x9a5e 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU11_LANE3 0 0x9afe 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU11_LANE3 0 0x9b9e 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU11_LANE3 0 0x9c3e 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU11_LANE3 0 0x9cde 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU11_LANE3 0 0x9d7e 0 0 4294967295 mmTX_DISP_RFU12_LANE0 0 0x48ef 1 0 4294967295 rfu_value12 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU12_LANE0 0 0x48ef 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU12_LANE0 0 0x498f 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU12_LANE0 0 0x9a2f 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU12_LANE0 0 0x9acf 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU12_LANE0 0 0x9b6f 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU12_LANE0 0 0x9c0f 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU12_LANE0 0 0x9caf 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU12_LANE0 0 0x9d4f 0 0 4294967295 mmTX_DISP_RFU12_LANE1 0 0x48ff 1 0 4294967295 rfu_value12 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU12_LANE1 0 0x48ff 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU12_LANE1 0 0x499f 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU12_LANE1 0 0x9a3f 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU12_LANE1 0 0x9adf 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU12_LANE1 0 0x9b7f 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU12_LANE1 0 0x9c1f 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU12_LANE1 0 0x9cbf 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU12_LANE1 0 0x9d5f 0 0 4294967295 mmTX_DISP_RFU12_LANE2 0 0x490f 1 0 4294967295 rfu_value12 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU12_LANE2 0 0x490f 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU12_LANE2 0 0x49af 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU12_LANE2 0 0x9a4f 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU12_LANE2 0 0x9aef 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU12_LANE2 0 0x9b8f 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU12_LANE2 0 0x9c2f 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU12_LANE2 0 0x9ccf 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU12_LANE2 0 0x9d6f 0 0 4294967295 mmTX_DISP_RFU12_LANE3 0 0x491f 1 0 4294967295 rfu_value12 0 31 mmDC_COMBOPHYTXREGS0_TX_DISP_RFU12_LANE3 0 0x491f 0 0 4294967295 mmDC_COMBOPHYTXREGS1_TX_DISP_RFU12_LANE3 0 0x49bf 0 0 4294967295 mmDC_COMBOPHYTXREGS2_TX_DISP_RFU12_LANE3 0 0x9a5f 0 0 4294967295 mmDC_COMBOPHYTXREGS3_TX_DISP_RFU12_LANE3 0 0x9aff 0 0 4294967295 mmDC_COMBOPHYTXREGS4_TX_DISP_RFU12_LANE3 0 0x9b9f 0 0 4294967295 mmDC_COMBOPHYTXREGS5_TX_DISP_RFU12_LANE3 0 0x9c3f 0 0 4294967295 mmDC_COMBOPHYTXREGS6_TX_DISP_RFU12_LANE3 0 0x9cdf 0 0 4294967295 mmDC_COMBOPHYTXREGS7_TX_DISP_RFU12_LANE3 0 0x9d7f 0 0 4294967295 mmCOMMON_MAR_DEEMPH_NOM 0 0x48c3 4 0 4294967295 tx_margin_nom 0 7 deemph_gen1_nom 8 15 deemph35_gen2_nom 16 23 deemph60_gen2_nom 24 31 mmDC_COMBOPHYCMREGS0_COMMON_MAR_DEEMPH_NOM 0 0x48c3 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_MAR_DEEMPH_NOM 0 0x4963 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_MAR_DEEMPH_NOM 0 0x9a03 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_MAR_DEEMPH_NOM 0 0x9aa3 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_MAR_DEEMPH_NOM 0 0x9b43 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_MAR_DEEMPH_NOM 0 0x9be3 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_MAR_DEEMPH_NOM 0 0x9c83 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_MAR_DEEMPH_NOM 0 0x9d23 0 0 4294967295 mmCOMMON_LANE_PWRMGMT 0 0x48c4 3 0 4294967295 pgdelay 0 3 pgmask 4 9 vprot_en 11 11 mmDC_COMBOPHYCMREGS0_COMMON_LANE_PWRMGMT 0 0x48c4 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_LANE_PWRMGMT 0 0x4964 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_LANE_PWRMGMT 0 0x9a04 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_LANE_PWRMGMT 0 0x9aa4 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_LANE_PWRMGMT 0 0x9b44 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_LANE_PWRMGMT 0 0x9be4 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_LANE_PWRMGMT 0 0x9c84 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_LANE_PWRMGMT 0 0x9d24 0 0 4294967295 mmCOMMON_TXCNTRL 0 0x48c5 7 0 4294967295 rdptr_rst_val_gen3 0 4 clkgate_dis 5 5 slew_rate_ctl_gen1 6 8 slew_rate_ctl_gen2 9 11 slew_rate_ctl_gen3 12 14 dual_dvi_mstr_en 15 15 dual_dvi_en 16 16 mmDC_COMBOPHYCMREGS0_COMMON_TXCNTRL 0 0x48c5 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_TXCNTRL 0 0x4965 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_TXCNTRL 0 0x9a05 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_TXCNTRL 0 0x9aa5 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_TXCNTRL 0 0x9b45 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_TXCNTRL 0 0x9be5 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_TXCNTRL 0 0x9c85 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_TXCNTRL 0 0x9d25 0 0 4294967295 mmCOMMON_TMDP 0 0x48c6 1 0 4294967295 tmdp_spare 0 31 mmDC_COMBOPHYCMREGS0_COMMON_TMDP 0 0x48c6 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_TMDP 0 0x4966 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_TMDP 0 0x9a06 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_TMDP 0 0x9aa6 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_TMDP 0 0x9b46 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_TMDP 0 0x9be6 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_TMDP 0 0x9c86 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_TMDP 0 0x9d26 0 0 4294967295 mmCOMMON_LANE_RESETS 0 0x48c7 8 0 4294967295 lane_0_reset_l 0 0 lane_1_reset_l 1 1 lane_2_reset_l 2 2 lane_3_reset_l 3 3 lane_4_reset_l 4 4 lane_5_reset_l 5 5 lane_6_reset_l 6 6 lane_7_reset_l 7 7 mmDC_COMBOPHYCMREGS0_COMMON_LANE_RESETS 0 0x48c7 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_LANE_RESETS 0 0x4967 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_LANE_RESETS 0 0x9a07 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_LANE_RESETS 0 0x9aa7 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_LANE_RESETS 0 0x9b47 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_LANE_RESETS 0 0x9be7 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_LANE_RESETS 0 0x9c87 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_LANE_RESETS 0 0x9d27 0 0 4294967295 mmCOMMON_ZCALCODE_CTRL 0 0x48c8 3 0 4294967295 zcalcode_override 0 0 tx_binary_code_override_val 1 5 tx_driver_fifty_ohms 21 21 mmDC_COMBOPHYCMREGS0_COMMON_ZCALCODE_CTRL 0 0x48c8 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_ZCALCODE_CTRL 0 0x4968 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_ZCALCODE_CTRL 0 0x9a08 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_ZCALCODE_CTRL 0 0x9aa8 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_ZCALCODE_CTRL 0 0x9b48 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_ZCALCODE_CTRL 0 0x9be8 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_ZCALCODE_CTRL 0 0x9c88 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_ZCALCODE_CTRL 0 0x9d28 0 0 4294967295 mmCOMMON_DISP_RFU1 0 0x48c9 1 0 4294967295 rfu_value1 0 31 mmDC_COMBOPHYCMREGS0_COMMON_DISP_RFU1 0 0x48c9 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_DISP_RFU1 0 0x4969 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_DISP_RFU1 0 0x9a09 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_DISP_RFU1 0 0x9aa9 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_DISP_RFU1 0 0x9b49 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_DISP_RFU1 0 0x9be9 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_DISP_RFU1 0 0x9c89 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_DISP_RFU1 0 0x9d29 0 0 4294967295 mmCOMMON_DISP_RFU2 0 0x48ca 1 0 4294967295 rfu_value2 0 31 mmDC_COMBOPHYCMREGS0_COMMON_DISP_RFU2 0 0x48ca 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_DISP_RFU2 0 0x496a 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_DISP_RFU2 0 0x9a0a 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_DISP_RFU2 0 0x9aaa 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_DISP_RFU2 0 0x9b4a 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_DISP_RFU2 0 0x9bea 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_DISP_RFU2 0 0x9c8a 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_DISP_RFU2 0 0x9d2a 0 0 4294967295 mmCOMMON_DISP_RFU3 0 0x48cb 1 0 4294967295 rfu_value3 0 31 mmDC_COMBOPHYCMREGS0_COMMON_DISP_RFU3 0 0x48cb 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_DISP_RFU3 0 0x496b 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_DISP_RFU3 0 0x9a0b 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_DISP_RFU3 0 0x9aab 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_DISP_RFU3 0 0x9b4b 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_DISP_RFU3 0 0x9beb 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_DISP_RFU3 0 0x9c8b 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_DISP_RFU3 0 0x9d2b 0 0 4294967295 mmCOMMON_DISP_RFU4 0 0x48cc 1 0 4294967295 rfu_value4 0 31 mmDC_COMBOPHYCMREGS0_COMMON_DISP_RFU4 0 0x48cc 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_DISP_RFU4 0 0x496c 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_DISP_RFU4 0 0x9a0c 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_DISP_RFU4 0 0x9aac 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_DISP_RFU4 0 0x9b4c 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_DISP_RFU4 0 0x9bec 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_DISP_RFU4 0 0x9c8c 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_DISP_RFU4 0 0x9d2c 0 0 4294967295 mmCOMMON_DISP_RFU5 0 0x48cd 1 0 4294967295 rfu_value5 0 31 mmDC_COMBOPHYCMREGS0_COMMON_DISP_RFU5 0 0x48cd 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_DISP_RFU5 0 0x496d 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_DISP_RFU5 0 0x9a0d 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_DISP_RFU5 0 0x9aad 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_DISP_RFU5 0 0x9b4d 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_DISP_RFU5 0 0x9bed 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_DISP_RFU5 0 0x9c8d 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_DISP_RFU5 0 0x9d2d 0 0 4294967295 mmCOMMON_DISP_RFU6 0 0x48ce 1 0 4294967295 rfu_value6 0 31 mmDC_COMBOPHYCMREGS0_COMMON_DISP_RFU6 0 0x48ce 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_DISP_RFU6 0 0x496e 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_DISP_RFU6 0 0x9a0e 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_DISP_RFU6 0 0x9aae 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_DISP_RFU6 0 0x9b4e 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_DISP_RFU6 0 0x9bee 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_DISP_RFU6 0 0x9c8e 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_DISP_RFU6 0 0x9d2e 0 0 4294967295 mmCOMMON_DISP_RFU7 0 0x48cf 1 0 4294967295 rfu_value7 0 31 mmDC_COMBOPHYCMREGS0_COMMON_DISP_RFU7 0 0x48cf 0 0 4294967295 mmDC_COMBOPHYCMREGS1_COMMON_DISP_RFU7 0 0x496f 0 0 4294967295 mmDC_COMBOPHYCMREGS2_COMMON_DISP_RFU7 0 0x9a0f 0 0 4294967295 mmDC_COMBOPHYCMREGS3_COMMON_DISP_RFU7 0 0x9aaf 0 0 4294967295 mmDC_COMBOPHYCMREGS4_COMMON_DISP_RFU7 0 0x9b4f 0 0 4294967295 mmDC_COMBOPHYCMREGS5_COMMON_DISP_RFU7 0 0x9bef 0 0 4294967295 mmDC_COMBOPHYCMREGS6_COMMON_DISP_RFU7 0 0x9c8f 0 0 4294967295 mmDC_COMBOPHYCMREGS7_COMMON_DISP_RFU7 0 0x9d2f 0 0 4294967295 mmFREQ_CTRL0 0 0x4920 2 0 4294967295 fcw0_frac 0 15 fcw0_int 16 24 mmDC_COMBOPHYPLLREGS0_FREQ_CTRL0 0 0x4920 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_FREQ_CTRL0 0 0x49c0 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_FREQ_CTRL0 0 0x9a60 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_FREQ_CTRL0 0 0x9b00 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_FREQ_CTRL0 0 0x9ba0 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_FREQ_CTRL0 0 0x9c40 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_FREQ_CTRL0 0 0x9ce0 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_FREQ_CTRL0 0 0x9d80 0 0 4294967295 mmFREQ_CTRL1 0 0x4921 2 0 4294967295 fcw1_frac 0 15 fcw1_int 16 24 mmDC_COMBOPHYPLLREGS0_FREQ_CTRL1 0 0x4921 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_FREQ_CTRL1 0 0x49c1 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_FREQ_CTRL1 0 0x9a61 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_FREQ_CTRL1 0 0x9b01 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_FREQ_CTRL1 0 0x9ba1 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_FREQ_CTRL1 0 0x9c41 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_FREQ_CTRL1 0 0x9ce1 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_FREQ_CTRL1 0 0x9d81 0 0 4294967295 mmFREQ_CTRL2 0 0x4922 2 0 4294967295 fcw_denom 0 15 fcw_slew_frac 16 31 mmDC_COMBOPHYPLLREGS0_FREQ_CTRL2 0 0x4922 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_FREQ_CTRL2 0 0x49c2 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_FREQ_CTRL2 0 0x9a62 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_FREQ_CTRL2 0 0x9b02 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_FREQ_CTRL2 0 0x9ba2 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_FREQ_CTRL2 0 0x9c42 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_FREQ_CTRL2 0 0x9ce2 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_FREQ_CTRL2 0 0x9d82 0 0 4294967295 mmFREQ_CTRL3 0 0x4923 8 0 4294967295 refclk_div 0 1 vco_pre_div 3 4 fracn_en 6 6 ssc_en 8 8 fcw_sel 10 10 freq_jump_en 12 12 tdc_resolution 16 23 dpll_cfg_1 24 31 mmDC_COMBOPHYPLLREGS0_FREQ_CTRL3 0 0x4923 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_FREQ_CTRL3 0 0x49c3 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_FREQ_CTRL3 0 0x9a63 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_FREQ_CTRL3 0 0x9b03 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_FREQ_CTRL3 0 0x9ba3 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_FREQ_CTRL3 0 0x9c43 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_FREQ_CTRL3 0 0x9ce3 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_FREQ_CTRL3 0 0x9d83 0 0 4294967295 mmBW_CTRL_COARSE 0 0x4924 6 0 4294967295 gi_coarse_mant 0 1 gi_coarse_exp 2 5 gp_coarse_mant 7 10 gp_coarse_exp 12 15 nctl_coarse_res 17 22 nctl_coarse_frac_res 24 25 mmDC_COMBOPHYPLLREGS0_BW_CTRL_COARSE 0 0x4924 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_BW_CTRL_COARSE 0 0x49c4 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_BW_CTRL_COARSE 0 0x9a64 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_BW_CTRL_COARSE 0 0x9b04 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_BW_CTRL_COARSE 0 0x9ba4 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_BW_CTRL_COARSE 0 0x9c44 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_BW_CTRL_COARSE 0 0x9ce4 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_BW_CTRL_COARSE 0 0x9d84 0 0 4294967295 mmBW_CTRL_FINE 0 0x4925 1 0 4294967295 dpll_cfg_3 0 9 mmDC_COMBOPHYPLLREGS0_BW_CTRL_FINE 0 0x4925 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_BW_CTRL_FINE 0 0x49c5 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_BW_CTRL_FINE 0 0x9a65 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_BW_CTRL_FINE 0 0x9b05 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_BW_CTRL_FINE 0 0x9ba5 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_BW_CTRL_FINE 0 0x9c45 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_BW_CTRL_FINE 0 0x9ce5 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_BW_CTRL_FINE 0 0x9d85 0 0 4294967295 mmCAL_CTRL 0 0x4926 9 0 4294967295 bypass_freq_lock 0 0 tdc_cal_en 1 1 tdc_cal_ctrl 3 8 meas_win_sel 9 10 kdco_cal_dis 11 11 kdco_ratio 13 20 kdco_incr_cal_dis 22 22 nctl_adj_dis 23 23 refclk_rate 24 31 mmDC_COMBOPHYPLLREGS0_CAL_CTRL 0 0x4926 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_CAL_CTRL 0 0x49c6 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_CAL_CTRL 0 0x9a66 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_CAL_CTRL 0 0x9b06 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_CAL_CTRL 0 0x9ba6 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_CAL_CTRL 0 0x9c46 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_CAL_CTRL 0 0x9ce6 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_CAL_CTRL 0 0x9d86 0 0 4294967295 mmLOOP_CTRL 0 0x4927 10 0 4294967295 fbdiv_mask_en 0 0 fb_slip_dis 2 2 clk_tdc_sel 4 5 clk_nctl_sel 7 8 sig_del_patt_sel 10 10 nctl_sig_del_dis 12 12 fbclk_track_refclk 14 14 prbs_en 16 16 tdc_clk_gate_en 18 18 phase_offset 20 26 mmDC_COMBOPHYPLLREGS0_LOOP_CTRL 0 0x4927 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_LOOP_CTRL 0 0x49c7 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_LOOP_CTRL 0 0x9a67 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_LOOP_CTRL 0 0x9b07 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_LOOP_CTRL 0 0x9ba7 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_LOOP_CTRL 0 0x9c47 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_LOOP_CTRL 0 0x9ce7 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_LOOP_CTRL 0 0x9d87 0 0 4294967295 mmDEBUG0 0 0x4928 0 0 4294967295 mmDC_COMBOPHYPLLREGS0_DEBUG0 0 0x4928 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_DEBUG0 0 0x49c8 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_DEBUG0 0 0x9a68 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_DEBUG0 0 0x9b08 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_DEBUG0 0 0x9ba8 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_DEBUG0 0 0x9c48 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_DEBUG0 0 0x9ce8 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_DEBUG0 0 0x9d88 0 0 4294967295 mmVREG_CFG 0 0x4929 14 0 4294967295 bleeder_ac 0 0 bleeder_en 1 1 is_1p2 2 2 reg_obs_sel 3 4 reg_on_mode 5 6 rlad_tap_sel 7 10 reg_off_hi 11 11 reg_off_lo 12 12 scale_driver 13 14 sel_bump 15 15 sel_rladder_x 16 16 short_rc_filt_x 17 17 vref_pwr_on 18 18 dpll_cfg_2 20 27 mmDC_COMBOPHYPLLREGS0_VREG_CFG 0 0x4929 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_VREG_CFG 0 0x49c9 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_VREG_CFG 0 0x9a69 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_VREG_CFG 0 0x9b09 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_VREG_CFG 0 0x9ba9 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_VREG_CFG 0 0x9c49 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_VREG_CFG 0 0x9ce9 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_VREG_CFG 0 0x9d89 0 0 4294967295 mmOBSERVE0 0 0x492a 5 0 4294967295 lock_det_tdc_steps 0 4 clear_sticky_lock 6 6 lock_det_dis 8 8 dco_cfg 10 17 anaobs_sel 21 23 mmDC_COMBOPHYPLLREGS0_OBSERVE0 0 0x492a 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_OBSERVE0 0 0x49ca 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_OBSERVE0 0 0x9a6a 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_OBSERVE0 0 0x9b0a 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_OBSERVE0 0 0x9baa 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_OBSERVE0 0 0x9c4a 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_OBSERVE0 0 0x9cea 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_OBSERVE0 0 0x9d8a 0 0 4294967295 mmOBSERVE1 0 0x492b 5 0 4294967295 digobs_sel 0 3 digobs_trig_sel 5 8 digobs_div 10 11 digobs_trig_div 13 14 lock_timer 16 29 mmDC_COMBOPHYPLLREGS0_OBSERVE1 0 0x492b 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_OBSERVE1 0 0x49cb 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_OBSERVE1 0 0x9a6b 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_OBSERVE1 0 0x9b0b 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_OBSERVE1 0 0x9bab 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_OBSERVE1 0 0x9c4b 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_OBSERVE1 0 0x9ceb 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_OBSERVE1 0 0x9d8b 0 0 4294967295 mmDFT_OUT 0 0x492c 1 0 4294967295 dft_data 0 31 mmDC_COMBOPHYPLLREGS0_DFT_OUT 0 0x492c 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_DFT_OUT 0 0x49cc 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_DFT_OUT 0 0x9a6c 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_DFT_OUT 0 0x9b0c 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_DFT_OUT 0 0x9bac 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_DFT_OUT 0 0x9c4c 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_DFT_OUT 0 0x9cec 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_DFT_OUT 0 0x9d8c 0 0 4294967295 mmPLL_WRAP_CNTRL1 0 0x495e 1 0 4294967295 wrap_cfg_sel_clk 0 1 mmDC_COMBOPHYPLLREGS0_PLL_WRAP_CNTRL1 0 0x495e 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_PLL_WRAP_CNTRL1 0 0x49fe 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_PLL_WRAP_CNTRL1 0 0x9a9e 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_PLL_WRAP_CNTRL1 0 0x9b3e 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_PLL_WRAP_CNTRL1 0 0x9bde 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_PLL_WRAP_CNTRL1 0 0x9c7e 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_PLL_WRAP_CNTRL1 0 0x9d1e 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_PLL_WRAP_CNTRL1 0 0x9dbe 0 0 4294967295 mmPLL_WRAP_CNTRL 0 0x495f 11 0 4294967295 wrap_cfg_pll_freq_programming_ovveride 0 0 wrap_cfg_pll_pwr_state_ovrride 1 1 wrap_cfg_pll_pwr_state 2 3 wrap_cfg_tx_pdiv_val 5 7 wrap_cfg_tx_pixdiv_val 8 8 wrap_cfg_cml_cmos_sel 10 10 wrap_cfg_pll_rdy 13 13 wrap_cfg_pll_update 14 14 wrap_cfg_ref_values_chg 15 15 wrap_cfg_clk_gate_w_rdy 16 16 wrap_cfg_pll_dsm_sel 17 19 mmDC_COMBOPHYPLLREGS0_PLL_WRAP_CNTRL 0 0x495f 0 0 4294967295 mmDC_COMBOPHYPLLREGS1_PLL_WRAP_CNTRL 0 0x49ff 0 0 4294967295 mmDC_COMBOPHYPLLREGS2_PLL_WRAP_CNTRL 0 0x9a9f 0 0 4294967295 mmDC_COMBOPHYPLLREGS3_PLL_WRAP_CNTRL 0 0x9b3f 0 0 4294967295 mmDC_COMBOPHYPLLREGS4_PLL_WRAP_CNTRL 0 0x9bdf 0 0 4294967295 mmDC_COMBOPHYPLLREGS5_PLL_WRAP_CNTRL 0 0x9c7f 0 0 4294967295 mmDC_COMBOPHYPLLREGS6_PLL_WRAP_CNTRL 0 0x9d1f 0 0 4294967295 mmDC_COMBOPHYPLLREGS7_PLL_WRAP_CNTRL 0 0x9dbf 0 0 4294967295 mmPPLL_VREG_CFG 0 0x1700 14 0 4294967295 pw_pc_bleeder_ac 0 0 pw_pc_bleeder_en 1 1 pw_pc_is_1p2 2 2 pw_pc_reg_obs_sel 3 4 pw_pc_reg_on_mode 5 6 pw_pc_rlad_tap_sel 7 10 pw_pc_reg_off_hi 11 11 pw_pc_reg_off_lo 12 12 pw_pc_scale_driver 13 14 pw_pc_sel_bump 15 15 pw_pc_sel_rladder_x 16 16 pw_pc_short_rc_filt_x 17 17 pw_pc_vref_pwr_on 18 18 pw_pc_dpll_cfg_2 20 27 mmDC_DISPLAYPLLREGS0_PPLL_VREG_CFG 0 0x1700 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_VREG_CFG 0 0x172a 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_VREG_CFG 0 0x1754 0 0 4294967295 mmPPLL_MODE_CNTL 0 0x1701 3 0 4294967295 pw_pc_refclk_gate_dis 0 0 pw_pc_multi_phase_en 8 11 reg_tmg_pwr_state 16 17 mmDC_DISPLAYPLLREGS0_PPLL_MODE_CNTL 0 0x1701 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_MODE_CNTL 0 0x172b 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_MODE_CNTL 0 0x1755 0 0 4294967295 mmPPLL_FREQ_CTRL0 0 0x1702 2 0 4294967295 reg_tmg_fcw0_frac 0 15 reg_tmg_fcw0_int 16 24 mmDC_DISPLAYPLLREGS0_PPLL_FREQ_CTRL0 0 0x1702 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_FREQ_CTRL0 0 0x172c 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_FREQ_CTRL0 0 0x1756 0 0 4294967295 mmPPLL_FREQ_CTRL1 0 0x1703 2 0 4294967295 reg_tmg_fcw1_frac 0 15 reg_tmg_fcw1_int 16 24 mmDC_DISPLAYPLLREGS0_PPLL_FREQ_CTRL1 0 0x1703 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_FREQ_CTRL1 0 0x172d 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_FREQ_CTRL1 0 0x1757 0 0 4294967295 mmPPLL_FREQ_CTRL2 0 0x1704 2 0 4294967295 reg_tmg_fcw_denom 0 15 reg_tmg_fcw_slew_frac 16 31 mmDC_DISPLAYPLLREGS0_PPLL_FREQ_CTRL2 0 0x1704 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_FREQ_CTRL2 0 0x172e 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_FREQ_CTRL2 0 0x1758 0 0 4294967295 mmPPLL_FREQ_CTRL3 0 0x1705 8 0 4294967295 reg_tmg_refclk_div 0 1 reg_tmg_vco_pre_div 3 4 reg_tmg_fracn_en 6 6 reg_tmg_ssc_en 8 8 reg_tmg_fcw_sel 10 10 reg_tmg_freq_jump_en 12 12 reg_tmg_tdc_resol 16 23 pw_pc_dpll_cfg_1 24 31 mmDC_DISPLAYPLLREGS0_PPLL_FREQ_CTRL3 0 0x1705 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_FREQ_CTRL3 0 0x172f 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_FREQ_CTRL3 0 0x1759 0 0 4294967295 mmPPLL_BW_CTRL_COARSE 0 0x1706 6 0 4294967295 reg_tmg_gi_crse_mant 0 1 reg_tmg_gi_crse_exp 2 5 reg_tmg_gp_crse_mant 7 10 reg_tmg_gp_crse_exp 12 15 reg_tmg_nctl_crse_res 17 22 reg_tmg_nctl_crse_frac_res 24 25 mmDC_DISPLAYPLLREGS0_PPLL_BW_CTRL_COARSE 0 0x1706 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_BW_CTRL_COARSE 0 0x1730 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_BW_CTRL_COARSE 0 0x175a 0 0 4294967295 mmPPLL_BW_CTRL_FINE 0 0x1708 1 0 4294967295 pw_pc_dpll_cfg_3 0 9 mmDC_DISPLAYPLLREGS0_PPLL_BW_CTRL_FINE 0 0x1708 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_BW_CTRL_FINE 0 0x1732 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_BW_CTRL_FINE 0 0x175c 0 0 4294967295 mmPPLL_CAL_CTRL 0 0x1709 9 0 4294967295 pw_pc_bypass_freq_lock 0 0 pw_pc_tdc_cal_en 1 1 pw_pc_tdc_cal_ctrl 3 8 pw_pc_meas_win_sel 9 10 pw_pc_kdco_cal_dis 11 11 pw_pc_kdco_ratio 13 20 pw_pc_kdco_incr_cal_dis 22 22 pw_pc_nctl_adj_dis 23 23 pw_pc_refclk_rate 24 31 mmDC_DISPLAYPLLREGS0_PPLL_CAL_CTRL 0 0x1709 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_CAL_CTRL 0 0x1733 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_CAL_CTRL 0 0x175d 0 0 4294967295 mmPPLL_LOOP_CTRL 0 0x170a 10 0 4294967295 pw_pc_fbdiv_mask_en 0 0 pw_pc_fb_slip_dis 2 2 pw_pc_clk_tdc_sel 4 5 pw_pc_clk_nctl_sel 7 8 pw_pc_sig_del_patt_sel 10 10 pw_pc_nctl_sig_del_dis 12 12 pw_pc_fbclk_track_refclk 14 14 pw_pc_prbs_en 16 16 pw_pc_tdc_clk_gate_en 18 18 pw_pc_phase_offset 20 26 mmDC_DISPLAYPLLREGS0_PPLL_LOOP_CTRL 0 0x170a 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_LOOP_CTRL 0 0x1734 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_LOOP_CTRL 0 0x175e 0 0 4294967295 mmPPLL_REFCLK_CNTL 0 0x1718 10 0 4294967295 regs_pw_refclk0_recv_en 0 0 regs_pw_refclk1_recv_en 1 1 regs_pw_refclk2_recv_en 2 2 regs_pw_refclk3_recv_en 3 3 regs_pw_refclk0_recv_sel 8 8 regs_pw_refclk1_recv_sel 9 9 regs_pw_refclk2_recv_sel 10 10 regs_pw_refclk3_recv_sel 11 11 regs_pw_refdivsrc 14 15 regs_pw_ref2core_sel 16 16 mmDC_DISPLAYPLLREGS0_PPLL_REFCLK_CNTL 0 0x1718 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_REFCLK_CNTL 0 0x1742 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_REFCLK_CNTL 0 0x176c 0 0 4294967295 mmPPLL_CLKOUT_CNTL 0 0x1719 10 0 4294967295 regs_pw_pixclk_pre_pdivsel 8 8 regs_pw_pixclk_pdivsel 9 9 regs_pw_dvoclk_pre_pdivsel 10 10 regs_pw_dvoclk_pdivsel 11 11 regs_pw_idclk_en 12 12 regs_pw_idclk_pre_pdivsel 13 13 regs_pw_idclk_pdivsel 14 14 regs_pw_idclk_obs_sel 15 15 regs_pw_refclk_sel 16 17 regs_cc_resetb 20 20 mmDC_DISPLAYPLLREGS0_PPLL_CLKOUT_CNTL 0 0x1719 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_CLKOUT_CNTL 0 0x1743 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_CLKOUT_CNTL 0 0x176d 0 0 4294967295 mmPPLL_DFT_CNTL 0 0x171a 5 0 4294967295 regs_pw_obs_en 0 0 regs_pw_obs_div_sel_1 1 2 regs_pw_obs_clk_sel_1 4 7 regs_pw_obs_clk_sel_2 8 11 regs_pw_obs_sel 12 13 mmDC_DISPLAYPLLREGS0_PPLL_DFT_CNTL 0 0x171a 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_DFT_CNTL 0 0x1744 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_DFT_CNTL 0 0x176e 0 0 4294967295 mmPPLL_ANALOG_CNTL 0 0x171b 1 0 4294967295 regs_pw_spare 0 7 mmDC_DISPLAYPLLREGS0_PPLL_ANALOG_CNTL 0 0x171b 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_ANALOG_CNTL 0 0x1745 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_ANALOG_CNTL 0 0x176f 0 0 4294967295 mmPPLL_POSTDIV 0 0x171c 2 0 4294967295 reg_tmg_postdiv 8 11 reg_tmg_pixclk_pdiv2 12 12 mmDC_DISPLAYPLLREGS0_PPLL_POSTDIV 0 0x171c 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_POSTDIV 0 0x1746 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_POSTDIV 0 0x1770 0 0 4294967295 mmPPLL_DEBUG0 0 0x1720 9 0 4294967295 pw_pc_phase_jump_trig 1 1 pw_pc_fine_tdc_dis 2 2 pw_pc_coarse_tdc_dis 3 3 pw_pc_alt_nctl_en 4 4 pw_pc_alt_nctl 5 24 pw_pc_nctl_coarse_step_dis 25 25 pw_pc_trig_coarse_step 26 26 pw_pc_dft_sel 27 29 pw_pc_dft_capture 30 30 mmDC_DISPLAYPLLREGS0_PPLL_DEBUG0 0 0x1720 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_DEBUG0 0 0x174a 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_DEBUG0 0 0x1774 0 0 4294967295 mmPPLL_OBSERVE0 0 0x1721 5 0 4294967295 pw_pc_lock_det_tdc_steps 0 4 pw_pc_clear_sticky_lock 6 6 pw_pc_lock_det_dis 8 8 pw_pc_dco_cfg 10 17 pw_pc_anaobs_sel 21 23 mmDC_DISPLAYPLLREGS0_PPLL_OBSERVE0 0 0x1721 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_OBSERVE0 0 0x174b 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_OBSERVE0 0 0x1775 0 0 4294967295 mmPPLL_OBSERVE1 0 0x1722 5 0 4294967295 pw_pc_digobs_sel 0 3 pw_pc_digobs_trig_sel 5 8 pw_pc_digobs_div 10 11 pw_pc_digobs_trig_div 12 13 reg_tmg_lock_timer 16 29 mmDC_DISPLAYPLLREGS0_PPLL_OBSERVE1 0 0x1722 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_OBSERVE1 0 0x174c 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_OBSERVE1 0 0x1776 0 0 4294967295 mmPPLL_UPDATE_CNTL 0 0x1724 5 0 4294967295 reg_tmg_PLL_UPDATE_LOCK 2 2 reg_tmg_PLL_UPDATE_POINT 3 3 tmg_reg_UPDATE_PENDING 8 8 pc_pw_pll_rdy 9 9 TieLow1 16 16 mmDC_DISPLAYPLLREGS0_PPLL_UPDATE_CNTL 0 0x1724 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_UPDATE_CNTL 0 0x174e 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_UPDATE_CNTL 0 0x1778 0 0 4294967295 mmPPLL_OBSERVE0_OUT 0 0x1725 1 0 4294967295 disppll_core_obsout 0 31 mmDC_DISPLAYPLLREGS0_PPLL_OBSERVE0_OUT 0 0x1725 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_OBSERVE0_OUT 0 0x174f 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_OBSERVE0_OUT 0 0x1779 0 0 4294967295 mmPPLL_STATUS_DEBUG1 0 0x1726 3 0 4294967295 dbg_pll_rdy 0 0 core_disppll_pwr_ok_vddp 1 1 core_disppll_rcu_dc_resetb_vddp 2 2 mmDC_DISPLAYPLLREGS0_PPLL_STATUS_DEBUG1 0 0x1726 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_STATUS_DEBUG1 0 0x1750 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_STATUS_DEBUG1 0 0x177a 0 0 4294967295 mmPPLL_DEBUG_MUX_CNTL 0 0x1727 1 0 4294967295 DEBUG_BUS_MUX_SEL 0 4 mmDC_DISPLAYPLLREGS0_PPLL_DEBUG_MUX_CNTL 0 0x1727 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_DEBUG_MUX_CNTL 0 0x1751 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_DEBUG_MUX_CNTL 0 0x177b 0 0 4294967295 mmPPLL_DIV_UPDATE_DEBUG 0 0x1728 7 0 4294967295 TieLow2 0 0 tmg_reg_FB_DIV_CHANGED 1 1 dbg_UPDATE_PENDING 2 2 tmg_reg_CURRENT_STATE 3 4 tmg_reg_UPDATE_ENABLE 5 5 tmg_reg_UPDATE_REQ 6 6 tmg_reg_UPDATE_ACK 7 7 mmDC_DISPLAYPLLREGS0_PPLL_DIV_UPDATE_DEBUG 0 0x1728 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_DIV_UPDATE_DEBUG 0 0x1752 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_DIV_UPDATE_DEBUG 0 0x177c 0 0 4294967295 mmPPLL_STATUS_DEBUG0 0 0x1729 1 0 4294967295 obsout 0 31 mmDC_DISPLAYPLLREGS0_PPLL_STATUS_DEBUG0 0 0x1729 0 0 4294967295 mmDC_DISPLAYPLLREGS1_PPLL_STATUS_DEBUG0 0 0x1753 0 0 4294967295 mmDC_DISPLAYPLLREGS2_PPLL_STATUS_DEBUG0 0 0x177d 0 0 4294967295 mmCOMP_EN_CTL 0 0x9dc0 12 0 4294967295 comp_en 0 0 comp_en_override 2 2 comp_done 4 4 zcal_code_override 6 6 zcal_cal_rtt 7 7 zcal_base_en 8 8 zcal_ht_rtt_sel 9 9 zcal_code 10 14 zcal_ron_cal_mode 16 16 zcal_ana_dbg_sel 17 18 cfg_cml_cmos_sel 19 19 dsm_sel 20 23 mmDPCSTX_PHY_CNTL 0 0x48d0 1 0 4294967295 DPCS_PHY_RESET 0 0 mmDPCSTX0_DPCSTX_PHY_CNTL 0 0x48d0 0 0 4294967295 mmDPCSTX1_DPCSTX_PHY_CNTL 0 0x4970 0 0 4294967295 mmDPCSTX2_DPCSTX_PHY_CNTL 0 0x9a10 0 0 4294967295 mmDPCSTX3_DPCSTX_PHY_CNTL 0 0x9ab0 0 0 4294967295 mmDPCSTX4_DPCSTX_PHY_CNTL 0 0x9b50 0 0 4294967295 mmDPCSTX5_DPCSTX_PHY_CNTL 0 0x9bf0 0 0 4294967295 mmDPCSTX6_DPCSTX_PHY_CNTL 0 0x9c90 0 0 4294967295 mmDPCSTX7_DPCSTX_PHY_CNTL 0 0x9d30 0 0 4294967295 mmDPCSTX_TX_CLOCK_CNTL 0 0x48d1 8 0 4294967295 DPCS_SYMCLK_GATE_DIS 0 0 DPCS_SYMCLK_EN 1 1 DPCS_SYMCLK_CLOCK_ON 2 2 DPCS_SYMCLK_DIV2_CLOCK_ON 3 3 DPCS_SYMCLK_DIV2_TX0_EN 4 4 DPCS_SYMCLK_DIV2_TX1_EN 5 5 DPCS_SYMCLK_DIV2_TX2_EN 6 6 DPCS_SYMCLK_DIV2_TX3_EN 7 7 mmDPCSTX0_DPCSTX_TX_CLOCK_CNTL 0 0x48d1 0 0 4294967295 mmDPCSTX1_DPCSTX_TX_CLOCK_CNTL 0 0x4971 0 0 4294967295 mmDPCSTX2_DPCSTX_TX_CLOCK_CNTL 0 0x9a11 0 0 4294967295 mmDPCSTX3_DPCSTX_TX_CLOCK_CNTL 0 0x9ab1 0 0 4294967295 mmDPCSTX4_DPCSTX_TX_CLOCK_CNTL 0 0x9b51 0 0 4294967295 mmDPCSTX5_DPCSTX_TX_CLOCK_CNTL 0 0x9bf1 0 0 4294967295 mmDPCSTX6_DPCSTX_TX_CLOCK_CNTL 0 0x9c91 0 0 4294967295 mmDPCSTX7_DPCSTX_TX_CLOCK_CNTL 0 0x9d31 0 0 4294967295 mmDPCSTX_TX_CNTL 0 0x48d3 13 0 4294967295 DPCS_TX_RESYNC 0 0 DPCS_TX_STAGGERING_EN 1 1 DPCS_TX_HIGH_IMP_IDLE_OVERRIDE_EN 2 2 DPCS_TX_HIGH_IMP_IDLE 4 7 DPCS_TX_STAGGERING_DELAY 8 10 DPCS_TX_PLL_UPDATE_REQ 12 12 DPCS_TX_PLL_UPDATE_PENDING 13 13 DPCS_TX_DATA_SWAP 14 14 DPCS_TX_FIFO_EN 16 16 DPCS_TX_FIFO_START 17 17 DPCS_TX_FIFO_WR_START_DELAY 20 23 DPCS_TX_DVI_LINK_MODE 24 25 DPCS_TX_SOFT_RESET 31 31 mmDPCSTX0_DPCSTX_TX_CNTL 0 0x48d3 0 0 4294967295 mmDPCSTX1_DPCSTX_TX_CNTL 0 0x4973 0 0 4294967295 mmDPCSTX2_DPCSTX_TX_CNTL 0 0x9a13 0 0 4294967295 mmDPCSTX3_DPCSTX_TX_CNTL 0 0x9ab3 0 0 4294967295 mmDPCSTX4_DPCSTX_TX_CNTL 0 0x9b53 0 0 4294967295 mmDPCSTX5_DPCSTX_TX_CNTL 0 0x9bf3 0 0 4294967295 mmDPCSTX6_DPCSTX_TX_CNTL 0 0x9c93 0 0 4294967295 mmDPCSTX7_DPCSTX_TX_CNTL 0 0x9d33 0 0 4294967295 mmDPCSTX_CBUS_CNTL 0 0x48d5 3 0 4294967295 DPCS_CBUS_WR_CMD_DELAY 0 3 DPCS_PHY_MASTER_REQ_DELAY 8 15 DPCS_CBUS_SOFT_RESET 31 31 mmDPCSTX0_DPCSTX_CBUS_CNTL 0 0x48d5 0 0 4294967295 mmDPCSTX1_DPCSTX_CBUS_CNTL 0 0x4975 0 0 4294967295 mmDPCSTX2_DPCSTX_CBUS_CNTL 0 0x9a15 0 0 4294967295 mmDPCSTX3_DPCSTX_CBUS_CNTL 0 0x9ab5 0 0 4294967295 mmDPCSTX4_DPCSTX_CBUS_CNTL 0 0x9b55 0 0 4294967295 mmDPCSTX5_DPCSTX_CBUS_CNTL 0 0x9bf5 0 0 4294967295 mmDPCSTX6_DPCSTX_CBUS_CNTL 0 0x9c95 0 0 4294967295 mmDPCSTX7_DPCSTX_CBUS_CNTL 0 0x9d35 0 0 4294967295 mmDPCSTX_REG_ERROR_STATUS 0 0x48d6 3 0 4294967295 DPCS_REG_FIFO_OVERFLOW 0 0 DPCS_REG_ERROR_CLR 1 1 DPCS_REG_FIFO_ERROR_MASK 4 4 mmDPCSTX0_DPCSTX_REG_ERROR_STATUS 0 0x48d6 0 0 4294967295 mmDPCSTX1_DPCSTX_REG_ERROR_STATUS 0 0x4976 0 0 4294967295 mmDPCSTX2_DPCSTX_REG_ERROR_STATUS 0 0x9a16 0 0 4294967295 mmDPCSTX3_DPCSTX_REG_ERROR_STATUS 0 0x9ab6 0 0 4294967295 mmDPCSTX4_DPCSTX_REG_ERROR_STATUS 0 0x9b56 0 0 4294967295 mmDPCSTX5_DPCSTX_REG_ERROR_STATUS 0 0x9bf6 0 0 4294967295 mmDPCSTX6_DPCSTX_REG_ERROR_STATUS 0 0x9c96 0 0 4294967295 mmDPCSTX7_DPCSTX_REG_ERROR_STATUS 0 0x9d36 0 0 4294967295 mmDPCSTX_TX_ERROR_STATUS 0 0x48d7 6 0 4294967295 DPCS_TX0_FIFO_ERROR 0 0 DPCS_TX1_FIFO_ERROR 1 1 DPCS_TX2_FIFO_ERROR 2 2 DPCS_TX3_FIFO_ERROR 3 3 DPCS_TX_ERROR_CLR 8 8 DPCS_TX_FIFO_ERROR_MASK 12 12 mmDPCSTX0_DPCSTX_TX_ERROR_STATUS 0 0x48d7 0 0 4294967295 mmDPCSTX1_DPCSTX_TX_ERROR_STATUS 0 0x4977 0 0 4294967295 mmDPCSTX2_DPCSTX_TX_ERROR_STATUS 0 0x9a17 0 0 4294967295 mmDPCSTX3_DPCSTX_TX_ERROR_STATUS 0 0x9ab7 0 0 4294967295 mmDPCSTX4_DPCSTX_TX_ERROR_STATUS 0 0x9b57 0 0 4294967295 mmDPCSTX5_DPCSTX_TX_ERROR_STATUS 0 0x9bf7 0 0 4294967295 mmDPCSTX6_DPCSTX_TX_ERROR_STATUS 0 0x9c97 0 0 4294967295 mmDPCSTX7_DPCSTX_TX_ERROR_STATUS 0 0x9d37 0 0 4294967295 mmDPCSTX_PLL_UPDATE_ADDR 0 0x48d8 1 0 4294967295 DPCS_PLL_UPDATE_ADDR 0 17 mmDPCSTX0_DPCSTX_PLL_UPDATE_ADDR 0 0x48d8 0 0 4294967295 mmDPCSTX1_DPCSTX_PLL_UPDATE_ADDR 0 0x4978 0 0 4294967295 mmDPCSTX2_DPCSTX_PLL_UPDATE_ADDR 0 0x9a18 0 0 4294967295 mmDPCSTX3_DPCSTX_PLL_UPDATE_ADDR 0 0x9ab8 0 0 4294967295 mmDPCSTX4_DPCSTX_PLL_UPDATE_ADDR 0 0x9b58 0 0 4294967295 mmDPCSTX5_DPCSTX_PLL_UPDATE_ADDR 0 0x9bf8 0 0 4294967295 mmDPCSTX6_DPCSTX_PLL_UPDATE_ADDR 0 0x9c98 0 0 4294967295 mmDPCSTX7_DPCSTX_PLL_UPDATE_ADDR 0 0x9d38 0 0 4294967295 mmDPCSTX_PLL_UPDATE_DATA 0 0x48d9 1 0 4294967295 DPCS_PLL_UPDATE_DATA 0 31 mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA 0 0x48d9 0 0 4294967295 mmDPCSTX1_DPCSTX_PLL_UPDATE_DATA 0 0x4979 0 0 4294967295 mmDPCSTX2_DPCSTX_PLL_UPDATE_DATA 0 0x9a19 0 0 4294967295 mmDPCSTX3_DPCSTX_PLL_UPDATE_DATA 0 0x9ab9 0 0 4294967295 mmDPCSTX4_DPCSTX_PLL_UPDATE_DATA 0 0x9b59 0 0 4294967295 mmDPCSTX5_DPCSTX_PLL_UPDATE_DATA 0 0x9bf9 0 0 4294967295 mmDPCSTX6_DPCSTX_PLL_UPDATE_DATA 0 0x9c99 0 0 4294967295 mmDPCSTX7_DPCSTX_PLL_UPDATE_DATA 0 0x9d39 0 0 4294967295 mmDPCSTX_INDEX_MODE_ADDR 0 0x48da 1 0 4294967295 DPCS_INDEX_MODE_ADDR 0 17 mmDPCSTX0_DPCSTX_INDEX_MODE_ADDR 0 0x48da 0 0 4294967295 mmDPCSTX1_DPCSTX_INDEX_MODE_ADDR 0 0x497a 0 0 4294967295 mmDPCSTX2_DPCSTX_INDEX_MODE_ADDR 0 0x9a1a 0 0 4294967295 mmDPCSTX3_DPCSTX_INDEX_MODE_ADDR 0 0x9aba 0 0 4294967295 mmDPCSTX4_DPCSTX_INDEX_MODE_ADDR 0 0x9b5a 0 0 4294967295 mmDPCSTX5_DPCSTX_INDEX_MODE_ADDR 0 0x9bfa 0 0 4294967295 mmDPCSTX6_DPCSTX_INDEX_MODE_ADDR 0 0x9c9a 0 0 4294967295 mmDPCSTX7_DPCSTX_INDEX_MODE_ADDR 0 0x9d3a 0 0 4294967295 mmDPCSTX_INDEX_MODE_DATA 0 0x48db 1 0 4294967295 DPCS_INDEX_MODE_DATA 0 31 mmDPCSTX0_DPCSTX_INDEX_MODE_DATA 0 0x48db 0 0 4294967295 mmDPCSTX1_DPCSTX_INDEX_MODE_DATA 0 0x497b 0 0 4294967295 mmDPCSTX2_DPCSTX_INDEX_MODE_DATA 0 0x9a1b 0 0 4294967295 mmDPCSTX3_DPCSTX_INDEX_MODE_DATA 0 0x9abb 0 0 4294967295 mmDPCSTX4_DPCSTX_INDEX_MODE_DATA 0 0x9b5b 0 0 4294967295 mmDPCSTX5_DPCSTX_INDEX_MODE_DATA 0 0x9bfb 0 0 4294967295 mmDPCSTX6_DPCSTX_INDEX_MODE_DATA 0 0x9c9b 0 0 4294967295 mmDPCSTX7_DPCSTX_INDEX_MODE_DATA 0 0x9d3b 0 0 4294967295 mmDPCSTX_DEBUG_CONFIG 0 0x48dc 9 0 4294967295 DPCS_DBG_EN 0 0 DPCS_DBG_CFGCLK_SEL 1 2 DPCS_DBG_TX_SYMCLK_SEL 3 5 DPCS_DBG_CLOCK_SEL 8 10 DPCS_DBG_BLOCK_SEL 11 13 DPCS_DBG_CBUS_DIS 14 14 DPCS_TEST_DEBUG_WRITE_EN 16 16 DPCS_DBG_TX_SYMCLK_DIV2_SEL 17 19 DPCS_TEST_DEBUG_INDEX 24 31 mmDPCSTX0_DPCSTX_DEBUG_CONFIG 0 0x48dc 0 0 4294967295 mmDPCSTX1_DPCSTX_DEBUG_CONFIG 0 0x497c 0 0 4294967295 mmDPCSTX2_DPCSTX_DEBUG_CONFIG 0 0x9a1c 0 0 4294967295 mmDPCSTX3_DPCSTX_DEBUG_CONFIG 0 0x9abc 0 0 4294967295 mmDPCSTX4_DPCSTX_DEBUG_CONFIG 0 0x9b5c 0 0 4294967295 mmDPCSTX5_DPCSTX_DEBUG_CONFIG 0 0x9bfc 0 0 4294967295 mmDPCSTX6_DPCSTX_DEBUG_CONFIG 0 0x9c9c 0 0 4294967295 mmDPCSTX7_DPCSTX_DEBUG_CONFIG 0 0x9d3c 0 0 4294967295 mmDPCSTX_TEST_DEBUG_DATA 0 0x48dd 1 0 4294967295 DPCS_TEST_DEBUG_DATA 0 31 mmDPCSTX0_DPCSTX_TEST_DEBUG_DATA 0 0x48dd 0 0 4294967295 mmDPCSTX1_DPCSTX_TEST_DEBUG_DATA 0 0x497d 0 0 4294967295 mmDPCSTX2_DPCSTX_TEST_DEBUG_DATA 0 0x9a1d 0 0 4294967295 mmDPCSTX3_DPCSTX_TEST_DEBUG_DATA 0 0x9abd 0 0 4294967295 mmDPCSTX4_DPCSTX_TEST_DEBUG_DATA 0 0x9b5d 0 0 4294967295 mmDPCSTX5_DPCSTX_TEST_DEBUG_DATA 0 0x9bfd 0 0 4294967295 mmDPCSTX6_DPCSTX_TEST_DEBUG_DATA 0 0x9c9d 0 0 4294967295 mmDPCSTX7_DPCSTX_TEST_DEBUG_DATA 0 0x9d3d 0 0 4294967295