101 mmGRBM_CNTL 0 0x0 0 0 0 mmGRBM_SKEW_CNTL 0 0x1 0 0 0 mmGRBM_STATUS2 0 0x2 0 0 0 mmGRBM_PWR_CNTL 0 0x3 0 0 0 mmGRBM_STATUS 0 0x4 0 0 0 mmGRBM_STATUS_SE0 0 0x5 0 0 0 mmGRBM_STATUS_SE1 0 0x6 0 0 0 mmGRBM_SOFT_RESET 0 0x8 0 0 0 mmGRBM_GFX_CLKEN_CNTL 0 0xc 0 0 0 mmGRBM_WAIT_IDLE_CLOCKS 0 0xd 0 0 0 mmGRBM_STATUS_SE2 0 0xe 0 0 0 mmGRBM_STATUS_SE3 0 0xf 0 0 0 mmGRBM_READ_ERROR 0 0x16 0 0 0 mmGRBM_READ_ERROR2 0 0x17 0 0 0 mmGRBM_INT_CNTL 0 0x18 0 0 0 mmGRBM_TRAP_OP 0 0x19 0 0 0 mmGRBM_TRAP_ADDR 0 0x1a 0 0 0 mmGRBM_TRAP_ADDR_MSK 0 0x1b 0 0 0 mmGRBM_TRAP_WD 0 0x1c 0 0 0 mmGRBM_TRAP_WD_MSK 0 0x1d 0 0 0 mmGRBM_DSM_BYPASS 0 0x1e 0 0 0 mmGRBM_WRITE_ERROR 0 0x1f 0 0 0 mmGRBM_IOV_ERROR 0 0x20 0 0 0 mmGRBM_CHIP_REVISION 0 0x21 0 0 0 mmGRBM_GFX_CNTL 0 0x22 0 0 0 mmGRBM_RSMU_CFG 0 0x23 0 0 0 mmGRBM_IH_CREDIT 0 0x24 0 0 0 mmGRBM_PWR_CNTL2 0 0x25 0 0 0 mmGRBM_UTCL2_INVAL_RANGE_START 0 0x26 0 0 0 mmGRBM_UTCL2_INVAL_RANGE_END 0 0x27 0 0 0 mmGRBM_RSMU_READ_ERROR 0 0x28 0 0 0 mmGRBM_CHICKEN_BITS 0 0x29 0 0 0 mmGRBM_FENCE_RANGE0 0 0x2a 0 0 0 mmGRBM_FENCE_RANGE1 0 0x2b 0 0 0 mmGRBM_NOWHERE 0 0x3f 0 0 0 mmGRBM_SCRATCH_REG0 0 0x40 0 0 0 mmGRBM_SCRATCH_REG1 0 0x41 0 0 0 mmGRBM_SCRATCH_REG2 0 0x42 0 0 0 mmGRBM_SCRATCH_REG3 0 0x43 0 0 0 mmGRBM_SCRATCH_REG4 0 0x44 0 0 0 mmGRBM_SCRATCH_REG5 0 0x45 0 0 0 mmGRBM_SCRATCH_REG6 0 0x46 0 0 0 mmGRBM_SCRATCH_REG7 0 0x47 0 0 0 mmCPF_EDC_TAG_CNT 0 0x1189 2 0 0 DED_COUNT 0 1 SEC_COUNT 2 3 mmCPF_EDC_ROQ_CNT 0 0x118a 4 0 0 DED_COUNT_ME1 0 1 SEC_COUNT_ME1 2 3 DED_COUNT_ME2 4 5 SEC_COUNT_ME2 6 7 mmCPG_EDC_TAG_CNT 0 0x118b 2 0 0 DED_COUNT 0 1 SEC_COUNT 2 3 mmCPG_EDC_DMA_CNT 0 0x118d 4 0 0 ROQ_DED_COUNT 0 1 ROQ_SEC_COUNT 2 3 TAG_DED_COUNT 4 5 TAG_SEC_COUNT 6 7 mmCPC_EDC_SCRATCH_CNT 0 0x118e 2 0 0 DED_COUNT 0 1 SEC_COUNT 2 3 mmCPC_EDC_UCODE_CNT 0 0x118f 2 0 0 DED_COUNT 0 1 SEC_COUNT 2 3 mmDC_EDC_STATE_CNT 0 0x1191 2 0 0 DED_COUNT_ME1 0 1 SEC_COUNT_ME1 2 3 mmDC_EDC_CSINVOC_CNT 0 0x1192 4 0 0 DED_COUNT_ME1 0 1 SEC_COUNT_ME1 2 3 DED_COUNT1_ME1 4 5 SEC_COUNT1_ME1 6 7 mmDC_EDC_RESTORE_CNT 0 0x1193 4 0 0 DED_COUNT_ME1 0 1 SEC_COUNT_ME1 2 3 DED_COUNT1_ME1 4 5 SEC_COUNT1_ME1 6 7 mmGDS_EDC_CNT 0 0x5c5 3 0 0 GDS_MEM_DED 0 1 GDS_MEM_SEC 4 5 UNUSED 6 31 mmGDS_EDC_GRBM_CNT 0 0x5c6 3 0 0 DED 0 1 SEC 2 3 UNUSED 4 31 mmGDS_EDC_OA_DED 0 0x5c7 13 0 0 ME0_GFXHP3D_PIX_DED 0 0 ME0_GFXHP3D_VTX_DED 1 1 ME0_CS_DED 2 2 ME0_GFXHP3D_GS_DED 3 3 ME1_PIPE0_DED 4 4 ME1_PIPE1_DED 5 5 ME1_PIPE2_DED 6 6 ME1_PIPE3_DED 7 7 ME2_PIPE0_DED 8 8 ME2_PIPE1_DED 9 9 ME2_PIPE2_DED 10 10 ME2_PIPE3_DED 11 11 UNUSED1 12 31 mmGDS_EDC_OA_PHY_CNT 0 0x5cb 7 0 0 ME0_CS_PIPE_MEM_SEC 0 1 ME0_CS_PIPE_MEM_DED 2 3 PHY_CMD_RAM_MEM_SEC 4 5 PHY_CMD_RAM_MEM_DED 6 7 PHY_DATA_RAM_MEM_SEC 8 9 PHY_DATA_RAM_MEM_DED 10 11 UNUSED1 12 31 mmGDS_EDC_OA_PIPE_CNT 0 0x5cc 9 0 0 ME1_PIPE0_PIPE_MEM_SEC 0 1 ME1_PIPE0_PIPE_MEM_DED 2 3 ME1_PIPE1_PIPE_MEM_SEC 4 5 ME1_PIPE1_PIPE_MEM_DED 6 7 ME1_PIPE2_PIPE_MEM_SEC 8 9 ME1_PIPE2_PIPE_MEM_DED 10 11 ME1_PIPE3_PIPE_MEM_SEC 12 13 ME1_PIPE3_PIPE_MEM_DED 14 15 UNUSED 16 31 mmSPI_EDC_CNT 0 0x445 10 0 0 SPI_SR_MEM_SEC_COUNT 0 1 SPI_SR_MEM_DED_COUNT 2 3 SPI_GDS_EXPREQ_SEC_COUNT 4 5 SPI_GDS_EXPREQ_DED_COUNT 6 7 SPI_WB_GRANT_30_SEC_COUNT 8 9 SPI_WB_GRANT_30_DED_COUNT 10 11 SPI_WB_GRANT_61_SEC_COUNT 12 13 SPI_WB_GRANT_61_DED_COUNT 14 15 SPI_LIFE_CNT_SEC_COUNT 16 17 SPI_LIFE_CNT_DED_COUNT 18 19 mmSQC_EDC_CNT2 0 0x32c 10 0 0 INST_BANKA_TAG_RAM_SEC_COUNT 0 1 INST_BANKA_TAG_RAM_DED_COUNT 2 3 INST_BANKA_BANK_RAM_SEC_COUNT 4 5 INST_BANKA_BANK_RAM_DED_COUNT 6 7 DATA_BANKA_TAG_RAM_SEC_COUNT 8 9 DATA_BANKA_TAG_RAM_DED_COUNT 10 11 DATA_BANKA_BANK_RAM_SEC_COUNT 12 13 DATA_BANKA_BANK_RAM_DED_COUNT 14 15 INST_UTCL1_LFIFO_SEC_COUNT 16 17 INST_UTCL1_LFIFO_DED_COUNT 18 19 mmSQC_EDC_CNT3 0 0x32d 8 0 0 INST_BANKB_TAG_RAM_SEC_COUNT 0 1 INST_BANKB_TAG_RAM_DED_COUNT 2 3 INST_BANKB_BANK_RAM_SEC_COUNT 4 5 INST_BANKB_BANK_RAM_DED_COUNT 6 7 DATA_BANKB_TAG_RAM_SEC_COUNT 8 9 DATA_BANKB_TAG_RAM_DED_COUNT 10 11 DATA_BANKB_BANK_RAM_SEC_COUNT 12 13 DATA_BANKB_BANK_RAM_DED_COUNT 14 15 mmSQC_EDC_PARITY_CNT3 0 0x32e 16 0 0 INST_BANKA_UTCL1_MISS_FIFO_SEC_COUNT 0 1 INST_BANKA_UTCL1_MISS_FIFO_DED_COUNT 2 3 INST_BANKA_MISS_FIFO_SEC_COUNT 4 5 INST_BANKA_MISS_FIFO_DED_COUNT 6 7 DATA_BANKA_HIT_FIFO_SEC_COUNT 8 9 DATA_BANKA_HIT_FIFO_DED_COUNT 10 11 DATA_BANKA_MISS_FIFO_SEC_COUNT 12 13 DATA_BANKA_MISS_FIFO_DED_COUNT 14 15 INST_BANKB_UTCL1_MISS_FIFO_SEC_COUNT 16 17 INST_BANKB_UTCL1_MISS_FIFO_DED_COUNT 18 19 INST_BANKB_MISS_FIFO_SEC_COUNT 20 21 INST_BANKB_MISS_FIFO_DED_COUNT 22 23 DATA_BANKB_HIT_FIFO_SEC_COUNT 24 25 DATA_BANKB_HIT_FIFO_DED_COUNT 26 27 DATA_BANKB_MISS_FIFO_SEC_COUNT 28 29 DATA_BANKB_MISS_FIFO_DED_COUNT 30 31 mmSQC_EDC_CNT 0 0x3a2 16 0 0 DATA_CU0_WRITE_DATA_BUF_SEC_COUNT 0 1 DATA_CU0_WRITE_DATA_BUF_DED_COUNT 2 3 DATA_CU0_UTCL1_LFIFO_SEC_COUNT 4 5 DATA_CU0_UTCL1_LFIFO_DED_COUNT 6 7 DATA_CU1_WRITE_DATA_BUF_SEC_COUNT 8 9 DATA_CU1_WRITE_DATA_BUF_DED_COUNT 10 11 DATA_CU1_UTCL1_LFIFO_SEC_COUNT 12 13 DATA_CU1_UTCL1_LFIFO_DED_COUNT 14 15 DATA_CU2_WRITE_DATA_BUF_SEC_COUNT 16 17 DATA_CU2_WRITE_DATA_BUF_DED_COUNT 18 19 DATA_CU2_UTCL1_LFIFO_SEC_COUNT 20 21 DATA_CU2_UTCL1_LFIFO_DED_COUNT 22 23 DATA_CU3_WRITE_DATA_BUF_SEC_COUNT 24 25 DATA_CU3_WRITE_DATA_BUF_DED_COUNT 26 27 DATA_CU3_UTCL1_LFIFO_SEC_COUNT 28 29 DATA_CU3_UTCL1_LFIFO_DED_COUNT 30 31 mmSQ_EDC_SEC_CNT 0 0x3a3 3 0 0 LDS_SEC 0 7 SGPR_SEC 8 15 VGPR_SEC 16 23 mmSQ_EDC_DED_CNT 0 0x3a4 3 0 0 LDS_DED 0 7 SGPR_DED 8 15 VGPR_DED 16 23 mmSQ_EDC_INFO 0 0x3a5 4 0 0 WAVE_ID 0 3 SIMD_ID 4 5 SOURCE 6 8 VM_ID 9 12 mmSQ_EDC_CNT 0 0x3a6 14 0 0 LDS_D_SEC_COUNT 0 1 LDS_D_DED_COUNT 2 3 LDS_I_SEC_COUNT 4 5 LDS_I_DED_COUNT 6 7 SGPR_SEC_COUNT 8 9 SGPR_DED_COUNT 10 11 VGPR0_SEC_COUNT 12 13 VGPR0_DED_COUNT 14 15 VGPR1_SEC_COUNT 16 17 VGPR1_DED_COUNT 18 19 VGPR2_SEC_COUNT 20 21 VGPR2_DED_COUNT 22 23 VGPR3_SEC_COUNT 24 25 VGPR3_DED_COUNT 26 27 mmTA_EDC_CNT 0 0x586 10 0 0 TA_FS_DFIFO_SEC_COUNT 0 1 TA_FS_DFIFO_DED_COUNT 2 3 TA_FS_AFIFO_SEC_COUNT 4 5 TA_FS_AFIFO_DED_COUNT 6 7 TA_FL_LFIFO_SEC_COUNT 8 9 TA_FL_LFIFO_DED_COUNT 10 11 TA_FX_LFIFO_SEC_COUNT 12 13 TA_FX_LFIFO_DED_COUNT 14 15 TA_FS_CFIFO_SEC_COUNT 16 17 TA_FS_CFIFO_DED_COUNT 18 19 mmTCP_EDC_CNT 0 0xb17 3 0 0 SEC_COUNT 0 7 LFIFO_SED_COUNT 8 15 DED_COUNT 16 23 mmTCP_EDC_CNT_NEW 0 0xb18 13 0 0 CACHE_RAM_SEC_COUNT 0 1 CACHE_RAM_DED_COUNT 2 3 LFIFO_RAM_SEC_COUNT 4 5 LFIFO_RAM_DED_COUNT 6 7 CMD_FIFO_SEC_COUNT 8 9 CMD_FIFO_DED_COUNT 10 11 VM_FIFO_SEC_COUNT 12 13 VM_FIFO_DED_COUNT 14 15 DB_RAM_SED_COUNT 16 17 UTCL1_LFIFO0_SEC_COUNT 18 19 UTCL1_LFIFO0_DED_COUNT 20 21 UTCL1_LFIFO1_SEC_COUNT 22 23 UTCL1_LFIFO1_DED_COUNT 24 25 mmTCP_ATC_EDC_GATCL1_CNT 0 0x12b1 1 0 0 DATA_SEC 0 7 mmTCI_EDC_CNT 0 0xb60 2 0 0 WRITE_RAM_SEC_COUNT 0 1 WRITE_RAM_DED_COUNT 2 3 mmTCC_EDC_CNT 0 0xb82 14 0 0 CACHE_DATA_SEC_COUNT 0 1 CACHE_DATA_DED_COUNT 2 3 CACHE_DIRTY_SEC_COUNT 4 5 CACHE_DIRTY_DED_COUNT 6 7 HIGH_RATE_TAG_SEC_COUNT 8 9 HIGH_RATE_TAG_DED_COUNT 10 11 LOW_RATE_TAG_SEC_COUNT 12 13 LOW_RATE_TAG_DED_COUNT 14 15 SRC_FIFO_SEC_COUNT 16 17 SRC_FIFO_DED_COUNT 18 19 LATENCY_FIFO_SEC_COUNT 20 21 LATENCY_FIFO_DED_COUNT 22 23 LATENCY_FIFO_NEXT_RAM_SEC_COUNT 24 25 LATENCY_FIFO_NEXT_RAM_DED_COUNT 26 27 mmTCC_EDC_CNT2 0 0xb83 16 0 0 CACHE_TAG_PROBE_FIFO_SEC_COUNT 0 1 CACHE_TAG_PROBE_FIFO_DED_COUNT 2 3 UC_ATOMIC_FIFO_SEC_COUNT 4 5 UC_ATOMIC_FIFO_DED_COUNT 6 7 WRITE_CACHE_READ_SEC_COUNT 8 9 WRITE_CACHE_READ_DED_COUNT 10 11 RETURN_CONTROL_SEC_COUNT 12 13 RETURN_CONTROL_DED_COUNT 14 15 IN_USE_TRANSFER_SEC_COUNT 16 17 IN_USE_TRANSFER_DED_COUNT 18 19 IN_USE_DEC_SEC_COUNT 20 21 IN_USE_DEC_DED_COUNT 22 23 WRITE_RETURN_SEC_COUNT 24 25 WRITE_RETURN_DED_COUNT 26 27 RETURN_DATA_SEC_COUNT 28 29 RETURN_DATA_DED_COUNT 30 31 mmTCA_EDC_CNT 0 0xbc5 4 0 0 HOLE_FIFO_SEC_COUNT 0 1 HOLE_FIFO_DED_COUNT 2 3 REQ_FIFO_SEC_COUNT 4 5 REQ_FIFO_DED_COUNT 6 7 mmTD_EDC_CNT 0 0x52e 6 0 0 SS_FIFO_LO_SEC_COUNT 0 1 SS_FIFO_LO_DED_COUNT 2 3 SS_FIFO_HI_SEC_COUNT 4 5 SS_FIFO_HI_DED_COUNT 6 7 CS_FIFO_SEC_COUNT 8 9 CS_FIFO_DED_COUNT 10 11 mmTA_EDC_CNT 0 0x586 10 0 0 TA_FS_DFIFO_SEC_COUNT 0 1 TA_FS_DFIFO_DED_COUNT 2 3 TA_FS_AFIFO_SEC_COUNT 4 5 TA_FS_AFIFO_DED_COUNT 6 7 TA_FL_LFIFO_SEC_COUNT 8 9 TA_FL_LFIFO_DED_COUNT 10 11 TA_FX_LFIFO_SEC_COUNT 12 13 TA_FX_LFIFO_DED_COUNT 14 15 TA_FS_CFIFO_SEC_COUNT 16 17 TA_FS_CFIFO_DED_COUNT 18 19 mmGCEA_EDC_CNT 0 0x706 16 0 0 DRAMRD_CMDMEM_SEC_COUNT 0 1 DRAMRD_CMDMEM_DED_COUNT 2 3 DRAMWR_CMDMEM_SEC_COUNT 4 5 DRAMWR_CMDMEM_DED_COUNT 6 7 DRAMWR_DATAMEM_SEC_COUNT 8 9 DRAMWR_DATAMEM_DED_COUNT 10 11 RRET_TAGMEM_SEC_COUNT 12 13 RRET_TAGMEM_DED_COUNT 14 15 WRET_TAGMEM_SEC_COUNT 16 17 WRET_TAGMEM_DED_COUNT 18 19 DRAMRD_PAGEMEM_SED_COUNT 20 21 DRAMWR_PAGEMEM_SED_COUNT 22 23 IORD_CMDMEM_SED_COUNT 24 25 IOWR_CMDMEM_SED_COUNT 26 27 IOWR_DATAMEM_SED_COUNT 28 29 MAM_AFMEM_SEC_COUNT 30 31 mmGCEA_EDC_CNT2 0 0x707 16 0 0 GMIRD_CMDMEM_SEC_COUNT 0 1 GMIRD_CMDMEM_DED_COUNT 2 3 GMIWR_CMDMEM_SEC_COUNT 4 5 GMIWR_CMDMEM_DED_COUNT 6 7 GMIWR_DATAMEM_SEC_COUNT 8 9 GMIWR_DATAMEM_DED_COUNT 10 11 GMIRD_PAGEMEM_SED_COUNT 12 13 GMIWR_PAGEMEM_SED_COUNT 14 15 MAM_D0MEM_SED_COUNT 16 17 MAM_D1MEM_SED_COUNT 18 19 MAM_D2MEM_SED_COUNT 20 21 MAM_D3MEM_SED_COUNT 22 23 MAM_D0MEM_DED_COUNT 24 25 MAM_D1MEM_DED_COUNT 26 27 MAM_D2MEM_DED_COUNT 28 29 MAM_D3MEM_DED_COUNT 30 31 mmGCEA_EDC_CNT3 0 0x71b 16 0 0 DRAMRD_PAGEMEM_DED_COUNT 0 1 DRAMWR_PAGEMEM_DED_COUNT 2 3 IORD_CMDMEM_DED_COUNT 4 5 IOWR_CMDMEM_DED_COUNT 6 7 IOWR_DATAMEM_DED_COUNT 8 9 GMIRD_PAGEMEM_DED_COUNT 10 11 GMIWR_PAGEMEM_DED_COUNT 12 13 MAM_AFMEM_DED_COUNT 14 15 MAM_A0MEM_SEC_COUNT 16 17 MAM_A0MEM_DED_COUNT 18 19 MAM_A1MEM_SEC_COUNT 20 21 MAM_A1MEM_DED_COUNT 22 23 MAM_A2MEM_SEC_COUNT 24 25 MAM_A2MEM_DED_COUNT 26 27 MAM_A3MEM_SEC_COUNT 28 29 MAM_A3MEM_DED_COUNT 30 31 mmGCEA_ERR_STATUS 0 0x712 7 0 0 SDP_RDRSP_STATUS 0 3 SDP_WRRSP_STATUS 4 7 SDP_RDRSP_DATASTATUS 8 9 SDP_RDRSP_DATAPARITY_ERROR 10 10 CLEAR_ERROR_STATUS 11 11 BUSY_ON_ERROR 12 12 FUE_FLAG 13 13 mmSCRATCH_REG0 0 0x2040 0 0 1 mmSCRATCH_REG1 0 0x2041 0 0 1 mmSCRATCH_REG2 0 0x2042 0 0 1 mmSCRATCH_REG3 0 0x2043 0 0 1 mmSCRATCH_REG4 0 0x2044 0 0 1 mmSCRATCH_REG5 0 0x2045 0 0 1 mmSCRATCH_REG6 0 0x2046 0 0 1 mmSCRATCH_REG7 0 0x2047 0 0 1 mmGRBM_GFX_INDEX 0 0x2200 6 0 1 INSTANCE_INDEX 0 7 SH_INDEX 8 15 SE_INDEX 16 23 SH_BROADCAST_WRITES 29 29 INSTANCE_BROADCAST_WRITES 30 30 SE_BROADCAST_WRITES 31 31 mmATC_L2_CACHE_4K_DSM_INDEX 0 0x80e 1 0 0 INDEX 0 7 mmATC_L2_CACHE_2M_DSM_INDEX 0 0x80f 1 0 0 INDEX 0 7 mmATC_L2_CACHE_4K_DSM_CNTL 0 0x810 2 0 0 SEC_COUNT 13 14 DED_COUNT 15 16 mmATC_L2_CACHE_2M_DSM_CNTL 0 0x811 2 0 0 SEC_COUNT 13 14 DED_COUNT 15 16 mmVML2_MEM_ECC_INDEX 0 0x860 1 0 0 INDEX 0 7 mmVML2_WALKER_MEM_ECC_INDEX 0 0x861 1 0 0 INDEX 0 7 mmUTCL2_MEM_ECC_INDEX 0 0x862 1 0 0 INDEX 0 7 mmVML2_MEM_ECC_CNTL 0 0x863 2 0 0 SEC_COUNT 12 13 DED_COUNT 14 15 mmVML2_WALKER_MEM_ECC_CNTL 0 0x864 2 0 0 SEC_COUNT 12 13 DED_COUNT 14 15 mmUTCL2_MEM_ECC_CNTL 0 0x865 2 0 0 SEC_COUNT 12 13 DED_COUNT 14 15 mmRLC_EDC_CNT 0 0x4d40 16 0 1 RLCG_INSTR_RAM_SEC_COUNT 0 1 RLCG_INSTR_RAM_DED_COUNT 2 3 RLCG_SCRATCH_RAM_SEC_COUNT 4 5 RLCG_SCRATCH_RAM_DED_COUNT 6 7 RLCV_INSTR_RAM_SEC_COUNT 8 9 RLCV_INSTR_RAM_DED_COUNT 10 11 RLCV_SCRATCH_RAM_SEC_COUNT 12 13 RLCV_SCRATCH_RAM_DED_COUNT 14 15 RLC_TCTAG_RAM_SEC_COUNT 16 17 RLC_TCTAG_RAM_DED_COUNT 18 19 RLC_SPM_SCRATCH_RAM_SEC_COUNT 20 21 RLC_SPM_SCRATCH_RAM_DED_COUNT 22 23 RLC_SRM_DATA_RAM_SEC_COUNT 24 25 RLC_SRM_DATA_RAM_DED_COUNT 26 27 RLC_SRM_ADDR_RAM_SEC_COUNT 28 29 RLC_SRM_ADDR_RAM_DED_COUNT 30 31 mmRLC_EDC_CNT2 0 0x4d41 16 0 1 RLC_SPM_SE0_SCRATCH_RAM_SEC_COUNT 0 1 RLC_SPM_SE0_SCRATCH_RAM_DED_COUNT 2 3 RLC_SPM_SE1_SCRATCH_RAM_SEC_COUNT 4 5 RLC_SPM_SE1_SCRATCH_RAM_DED_COUNT 6 7 RLC_SPM_SE2_SCRATCH_RAM_SEC_COUNT 8 9 RLC_SPM_SE2_SCRATCH_RAM_DED_COUNT 10 11 RLC_SPM_SE3_SCRATCH_RAM_SEC_COUNT 12 13 RLC_SPM_SE3_SCRATCH_RAM_DED_COUNT 14 15 RLC_SPM_SE4_SCRATCH_RAM_SEC_COUNT 16 17 RLC_SPM_SE4_SCRATCH_RAM_DED_COUNT 18 19 RLC_SPM_SE5_SCRATCH_RAM_SEC_COUNT 20 21 RLC_SPM_SE5_SCRATCH_RAM_DED_COUNT 22 23 RLC_SPM_SE6_SCRATCH_RAM_SEC_COUNT 24 25 RLC_SPM_SE6_SCRATCH_RAM_DED_COUNT 26 27 RLC_SPM_SE7_SCRATCH_RAM_SEC_COUNT 28 29 RLC_SPM_SE7_SCRATCH_RAM_DED_COUNT 30 31