1247 ixMC_IO_DEBUG_ACMD_CLKSEL_D0 2 0xce 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_CLKSEL_D1 2 0xde 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_MISC_D0 2 0xae 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_MISC_D1 2 0xbe 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_OFSCAL_D0 2 0xee 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_OFSCAL_D1 2 0xfe 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_RXPHASE_D0 2 0x10e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_RXPHASE_D1 2 0x11e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXBST_PD_D0 2 0x18e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXBST_PD_D1 2 0x19e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXBST_PU_D0 2 0x1ae 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXBST_PU_D1 2 0x1be 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXPHASE_D0 2 0x12e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXPHASE_D1 2 0x13e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXSLF_D0 2 0x16e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXSLF_D1 2 0x17e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_CLKSEL_D0 2 0xcd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_CLKSEL_D1 2 0xdd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_MISC_D0 2 0xad 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_MISC_D1 2 0xbd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_RXPHASE_D0 2 0x10d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_RXPHASE_D1 2 0x11d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXBST_PD_D0 2 0x18d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXBST_PD_D1 2 0x19d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXBST_PU_D0 2 0x1ad 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXBST_PU_D1 2 0x1bd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXPHASE_D0 2 0x12d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXPHASE_D1 2 0x13d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXSLF_D0 2 0x16d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXSLF_D1 2 0x17d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_CLKSEL_D0 2 0xcc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_CLKSEL_D1 2 0xdc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_MISC_D0 2 0xac 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_MISC_D1 2 0xbc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_RXPHASE_D0 2 0x10c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_RXPHASE_D1 2 0x11c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXBST_PD_D0 2 0x18c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXBST_PD_D1 2 0x19c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXBST_PU_D0 2 0x1ac 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXBST_PU_D1 2 0x1bc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXPHASE_D0 2 0x12c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXPHASE_D1 2 0x13c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXSLF_D0 2 0x16c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXSLF_D1 2 0x17c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_CLKSEL_D0 2 0xcb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_CLKSEL_D1 2 0xdb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_MISC_D0 2 0xab 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_MISC_D1 2 0xbb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_RXPHASE_D0 2 0x10b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_RXPHASE_D1 2 0x11b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXBST_PD_D0 2 0x18b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXBST_PD_D1 2 0x19b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXBST_PU_D0 2 0x1ab 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXBST_PU_D1 2 0x1bb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXPHASE_D0 2 0x12b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXPHASE_D1 2 0x13b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXSLF_D0 2 0x16b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXSLF_D1 2 0x17b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_CLKSEL_D0 2 0xcf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_CLKSEL_D1 2 0xdf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_MISC_D0 2 0xaf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_MISC_D1 2 0xbf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_OFSCAL_D0 2 0xef 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_OFSCAL_D1 2 0xff 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_RX_EQ_D0 2 0x1cf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_RX_EQ_D1 2 0x1df 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_RXPHASE_D0 2 0x10f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_RXPHASE_D1 2 0x11f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXBST_PD_D0 2 0x18f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXBST_PD_D1 2 0x19f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXBST_PU_D0 2 0x1af 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXBST_PU_D1 2 0x1bf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXPHASE_D0 2 0x12f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXPHASE_D1 2 0x13f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXSLF_D0 2 0x16f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXSLF_D1 2 0x17f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_CDR_PHSIZE_D0 2 0x14f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_CDR_PHSIZE_D1 2 0x15f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_CLKSEL_D0 2 0xc8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_CLKSEL_D1 2 0xd8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_MISC_D0 2 0xa8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_MISC_D1 2 0xb8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_OFSCAL_D0 2 0xe8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_OFSCAL_D1 2 0xf8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RX_EQ_D0 2 0x1c8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RX_EQ_D1 2 0x1d8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RXPHASE_D0 2 0x108 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RXPHASE_D1 2 0x118 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RX_VREF_CAL_D0 2 0x148 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RX_VREF_CAL_D1 2 0x158 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXBST_PD_D0 2 0x188 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXBST_PD_D1 2 0x198 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXBST_PU_D0 2 0x1a8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXBST_PU_D1 2 0x1b8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXPHASE_D0 2 0x128 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXPHASE_D1 2 0x138 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXSLF_D0 2 0x168 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXSLF_D1 2 0x178 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ0_RX_DYN_PM_D0 2 0x1cd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ0_RX_DYN_PM_D1 2 0x1dd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ0_RX_EQ_PM_D0 2 0x1cb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ0_RX_EQ_PM_D1 2 0x1db 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ1_RX_DYN_PM_D0 2 0x1ce 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ1_RX_DYN_PM_D1 2 0x1de 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ1_RX_EQ_PM_D0 2 0x1cc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ1_RX_EQ_PM_D1 2 0x1dc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0_CDR_PHSIZE_D0 2 0x14b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0_CDR_PHSIZE_D1 2 0x15b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_CLKSEL_D0 2 0xc1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_CLKSEL_D1 2 0xd1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_MISC_D0 2 0xa1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_MISC_D1 2 0xb1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_OFSCAL_D0 2 0xe1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_OFSCAL_D1 2 0xf1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RX_EQ_D0 2 0x1c1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RX_EQ_D1 2 0x1d1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RXPHASE_D0 2 0x101 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RXPHASE_D1 2 0x111 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RX_VREF_CAL_D0 2 0x141 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RX_VREF_CAL_D1 2 0x151 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXBST_PD_D0 2 0x181 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXBST_PD_D1 2 0x191 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXBST_PU_D0 2 0x1a1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXBST_PU_D1 2 0x1b1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXPHASE_D0 2 0x121 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXPHASE_D1 2 0x131 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXSLF_D0 2 0x161 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXSLF_D1 2 0x171 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_CLKSEL_D0 2 0xc0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_CLKSEL_D1 2 0xd0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_MISC_D0 2 0xa0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_MISC_D1 2 0xb0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_OFSCAL_D0 2 0xe0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_OFSCAL_D1 2 0xf0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RX_EQ_D0 2 0x1c0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RX_EQ_D1 2 0x1d0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RXPHASE_D0 2 0x100 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RXPHASE_D1 2 0x110 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RX_VREF_CAL_D0 2 0x140 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RX_VREF_CAL_D1 2 0x150 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXBST_PD_D0 2 0x180 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXBST_PD_D1 2 0x190 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXBST_PU_D0 2 0x1a0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXBST_PU_D1 2 0x1b0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXPHASE_D0 2 0x120 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXPHASE_D1 2 0x130 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXSLF_D0 2 0x160 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXSLF_D1 2 0x170 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1_CDR_PHSIZE_D0 2 0x14c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1_CDR_PHSIZE_D1 2 0x15c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_CLKSEL_D0 2 0xc3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_CLKSEL_D1 2 0xd3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_MISC_D0 2 0xa3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_MISC_D1 2 0xb3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_OFSCAL_D0 2 0xe3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_OFSCAL_D1 2 0xf3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RX_EQ_D0 2 0x1c3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RX_EQ_D1 2 0x1d3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RXPHASE_D0 2 0x103 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RXPHASE_D1 2 0x113 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RX_VREF_CAL_D0 2 0x143 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RX_VREF_CAL_D1 2 0x153 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXBST_PD_D0 2 0x183 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXBST_PD_D1 2 0x193 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXBST_PU_D0 2 0x1a3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXBST_PU_D1 2 0x1b3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXPHASE_D0 2 0x123 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXPHASE_D1 2 0x133 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXSLF_D0 2 0x163 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXSLF_D1 2 0x173 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_CLKSEL_D0 2 0xc2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_CLKSEL_D1 2 0xd2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_MISC_D0 2 0xa2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_MISC_D1 2 0xb2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_OFSCAL_D0 2 0xe2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_OFSCAL_D1 2 0xf2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RX_EQ_D0 2 0x1c2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RX_EQ_D1 2 0x1d2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RXPHASE_D0 2 0x102 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RXPHASE_D1 2 0x112 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RX_VREF_CAL_D0 2 0x142 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RX_VREF_CAL_D1 2 0x152 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXBST_PD_D0 2 0x182 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXBST_PD_D1 2 0x192 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXBST_PU_D0 2 0x1a2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXBST_PU_D1 2 0x1b2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXPHASE_D0 2 0x122 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXPHASE_D1 2 0x132 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXSLF_D0 2 0x162 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXSLF_D1 2 0x172 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2_CDR_PHSIZE_D0 2 0x14d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2_CDR_PHSIZE_D1 2 0x15d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_CLKSEL_D0 2 0xc5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_CLKSEL_D1 2 0xd5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_MISC_D0 2 0xa5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_MISC_D1 2 0xb5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_OFSCAL_D0 2 0xe5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_OFSCAL_D1 2 0xf5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RX_EQ_D0 2 0x1c5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RX_EQ_D1 2 0x1d5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RXPHASE_D0 2 0x105 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RXPHASE_D1 2 0x115 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RX_VREF_CAL_D0 2 0x145 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RX_VREF_CAL_D1 2 0x155 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXBST_PD_D0 2 0x185 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXBST_PD_D1 2 0x195 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXBST_PU_D0 2 0x1a5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXBST_PU_D1 2 0x1b5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXPHASE_D0 2 0x125 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXPHASE_D1 2 0x135 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXSLF_D0 2 0x165 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXSLF_D1 2 0x175 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_CLKSEL_D0 2 0xc4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_CLKSEL_D1 2 0xd4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_MISC_D0 2 0xa4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_MISC_D1 2 0xb4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_OFSCAL_D0 2 0xe4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_OFSCAL_D1 2 0xf4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RX_EQ_D0 2 0x1c4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RX_EQ_D1 2 0x1d4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RXPHASE_D0 2 0x104 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RXPHASE_D1 2 0x114 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RX_VREF_CAL_D0 2 0x144 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RX_VREF_CAL_D1 2 0x154 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXBST_PD_D0 2 0x184 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXBST_PD_D1 2 0x194 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXBST_PU_D0 2 0x1a4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXBST_PU_D1 2 0x1b4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXPHASE_D0 2 0x124 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXPHASE_D1 2 0x134 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXSLF_D0 2 0x164 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXSLF_D1 2 0x174 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3_CDR_PHSIZE_D0 2 0x14e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3_CDR_PHSIZE_D1 2 0x15e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_CLKSEL_D0 2 0xc7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_CLKSEL_D1 2 0xd7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_MISC_D0 2 0xa7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_MISC_D1 2 0xb7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_OFSCAL_D0 2 0xe7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_OFSCAL_D1 2 0xf7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RX_EQ_D0 2 0x1c7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RX_EQ_D1 2 0x1d7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RXPHASE_D0 2 0x107 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RXPHASE_D1 2 0x117 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RX_VREF_CAL_D0 2 0x147 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RX_VREF_CAL_D1 2 0x157 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXBST_PD_D0 2 0x187 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXBST_PD_D1 2 0x197 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXBST_PU_D0 2 0x1a7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXBST_PU_D1 2 0x1b7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXPHASE_D0 2 0x127 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXPHASE_D1 2 0x137 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXSLF_D0 2 0x167 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXSLF_D1 2 0x177 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_CLKSEL_D0 2 0xc6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_CLKSEL_D1 2 0xd6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_MISC_D0 2 0xa6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_MISC_D1 2 0xb6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_OFSCAL_D0 2 0xe6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_OFSCAL_D1 2 0xf6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RX_EQ_D0 2 0x1c6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RX_EQ_D1 2 0x1d6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RXPHASE_D0 2 0x106 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RXPHASE_D1 2 0x116 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RX_VREF_CAL_D0 2 0x146 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RX_VREF_CAL_D1 2 0x156 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXBST_PD_D0 2 0x186 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXBST_PD_D1 2 0x196 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXBST_PU_D0 2 0x1a6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXBST_PU_D1 2 0x1b6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXPHASE_D0 2 0x126 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXPHASE_D1 2 0x136 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXSLF_D0 2 0x166 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXSLF_D1 2 0x176 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_CDR_PHSIZE_D0 2 0xed 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_CDR_PHSIZE_D1 2 0xfd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_CLKSEL_D0 2 0xc9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_CLKSEL_D1 2 0xd9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_MISC_D0 2 0xa9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_MISC_D1 2 0xb9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_OFSCAL_D0 2 0xe9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_OFSCAL_D1 2 0xf9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_DYN_PM_D0 2 0xec 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_DYN_PM_D1 2 0xfc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_EQ_D0 2 0x1c9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_EQ_D1 2 0x1d9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_EQ_PM_D0 2 0xeb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_EQ_PM_D1 2 0xfb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RXPHASE_D0 2 0x109 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RXPHASE_D1 2 0x119 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_VREF_CAL_D0 2 0x149 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_VREF_CAL_D1 2 0x159 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXBST_PD_D0 2 0x189 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXBST_PD_D1 2 0x199 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXBST_PU_D0 2 0x1a9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXBST_PU_D1 2 0x1b9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXPHASE_D0 2 0x129 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXPHASE_D1 2 0x139 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXSLF_D0 2 0x169 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXSLF_D1 2 0x179 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_0 2 0x0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_100 2 0x64 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_10 2 0xa 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_101 2 0x65 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_102 2 0x66 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_103 2 0x67 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_104 2 0x68 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_105 2 0x69 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_106 2 0x6a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_107 2 0x6b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_108 2 0x6c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_109 2 0x6d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_1 2 0x1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_110 2 0x6e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_11 2 0xb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_111 2 0x6f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_112 2 0x70 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_113 2 0x71 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_114 2 0x72 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_115 2 0x73 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_116 2 0x74 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_117 2 0x75 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_118 2 0x76 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_119 2 0x77 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_120 2 0x78 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_12 2 0xc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_121 2 0x79 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_122 2 0x7a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_123 2 0x7b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_124 2 0x7c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_125 2 0x7d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_126 2 0x7e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_127 2 0x7f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_128 2 0x80 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_129 2 0x81 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_130 2 0x82 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_13 2 0xd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_131 2 0x83 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_132 2 0x84 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_133 2 0x85 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_134 2 0x86 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_135 2 0x87 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_136 2 0x88 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_137 2 0x89 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_138 2 0x8a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_139 2 0x8b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_140 2 0x8c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_14 2 0xe 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_141 2 0x8d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_142 2 0x8e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_143 2 0x8f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_144 2 0x90 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_145 2 0x91 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_146 2 0x92 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_147 2 0x93 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_148 2 0x94 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_149 2 0x95 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_150 2 0x96 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_15 2 0xf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_151 2 0x97 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_152 2 0x98 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_153 2 0x99 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_154 2 0x9a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_155 2 0x9b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_156 2 0x9c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_157 2 0x9d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_158 2 0x9e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_159 2 0x9f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_16 2 0x10 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_17 2 0x11 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_18 2 0x12 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_19 2 0x13 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_20 2 0x14 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_2 2 0x2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_21 2 0x15 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_22 2 0x16 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_23 2 0x17 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_24 2 0x18 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_25 2 0x19 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_26 2 0x1a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_27 2 0x1b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_28 2 0x1c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_29 2 0x1d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_30 2 0x1e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_3 2 0x3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_31 2 0x1f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_32 2 0x20 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_33 2 0x21 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_34 2 0x22 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_35 2 0x23 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_36 2 0x24 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_37 2 0x25 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_38 2 0x26 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_39 2 0x27 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_40 2 0x28 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_4 2 0x4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_41 2 0x29 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_42 2 0x2a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_43 2 0x2b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_44 2 0x2c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_45 2 0x2d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_46 2 0x2e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_47 2 0x2f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_48 2 0x30 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_49 2 0x31 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_50 2 0x32 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_5 2 0x5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_51 2 0x33 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_52 2 0x34 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_53 2 0x35 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_54 2 0x36 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_55 2 0x37 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_56 2 0x38 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_57 2 0x39 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_58 2 0x3a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_59 2 0x3b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_60 2 0x3c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_6 2 0x6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_61 2 0x3d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_62 2 0x3e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_63 2 0x3f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_64 2 0x40 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_65 2 0x41 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_66 2 0x42 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_67 2 0x43 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_68 2 0x44 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_69 2 0x45 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_70 2 0x46 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_7 2 0x7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_71 2 0x47 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_72 2 0x48 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_73 2 0x49 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_74 2 0x4a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_75 2 0x4b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_76 2 0x4c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_77 2 0x4d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_78 2 0x4e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_79 2 0x4f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_80 2 0x50 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_8 2 0x8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_81 2 0x51 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_82 2 0x52 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_83 2 0x53 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_84 2 0x54 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_85 2 0x55 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_86 2 0x56 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_87 2 0x57 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_88 2 0x58 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_89 2 0x59 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_90 2 0x5a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_9 2 0x9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_91 2 0x5b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_92 2 0x5c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_93 2 0x5d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_94 2 0x5e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_95 2 0x5f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_96 2 0x60 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_97 2 0x61 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_98 2 0x62 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_99 2 0x63 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_CDR_PHSIZE_D0 2 0x1ea 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_CDR_PHSIZE_D1 2 0x1fa 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_CLKSEL_D0 2 0x1e1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_CLKSEL_D1 2 0x1f1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_MISC_D0 2 0x1e0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_MISC_D1 2 0x1f0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_OFSCAL_D0 2 0x1e2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_OFSCAL_D1 2 0x1f2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_DYN_PM_D0 2 0x1ec 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_DYN_PM_D1 2 0x1fc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_EQ_D0 2 0x1e9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_EQ_D1 2 0x1f9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_EQ_PM_D0 2 0x1eb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_EQ_PM_D1 2 0x1fb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RXPHASE_D0 2 0x1e3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RXPHASE_D1 2 0x1f3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_VREF_CAL_D0 2 0x1e5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_VREF_CAL_D1 2 0x1f5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXBST_PD_D0 2 0x1e7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXBST_PD_D1 2 0x1f7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXBST_PU_D0 2 0x1e8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXBST_PU_D1 2 0x1f8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXPHASE_D0 2 0x1e4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXPHASE_D1 2 0x1f4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXSLF_D0 2 0x1e6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXSLF_D1 2 0x1f6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_CLKSEL_D0 2 0xca 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_CLKSEL_D1 2 0xda 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_MISC_D0 2 0xaa 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_MISC_D1 2 0xba 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_OFSCAL_D0 2 0xea 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_OFSCAL_D1 2 0xfa 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RX_EQ_D0 2 0x1ca 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RX_EQ_D1 2 0x1da 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RXPHASE_D0 2 0x10a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RXPHASE_D1 2 0x11a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RX_VREF_CAL_D0 2 0x14a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RX_VREF_CAL_D1 2 0x15a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXBST_PD_D0 2 0x18a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXBST_PD_D1 2 0x19a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXBST_PU_D0 2 0x1aa 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXBST_PU_D1 2 0x1ba 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXPHASE_D0 2 0x12a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXPHASE_D1 2 0x13a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXSLF_D0 2 0x16a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXSLF_D1 2 0x17a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_TSM_DEBUG_BCNT0 2 0x3 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT10 2 0xd 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT1 2 0x4 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT2 2 0x5 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT3 2 0x6 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT4 2 0x7 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT5 2 0x8 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT6 2 0x9 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT7 2 0xa 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT8 2 0xb 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT9 2 0xc 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BKPT 2 0x13 1 0 4294967295 DATA 0 31 ixMC_TSM_DEBUG_FLAG 2 0x1 1 0 4294967295 DATA 0 31 ixMC_TSM_DEBUG_GCNT 2 0x0 1 0 4294967295 DATA 0 31 ixMC_TSM_DEBUG_MISC 2 0x2 3 0 4294967295 FLAG 0 7 NCNT_RD 8 11 NCNT_WR 12 15 ixMC_TSM_DEBUG_ST01 2 0x10 1 0 4294967295 DATA 0 31 ixMC_TSM_DEBUG_ST23 2 0x11 1 0 4294967295 DATA 0 31 ixMC_TSM_DEBUG_ST45 2 0x12 1 0 4294967295 DATA 0 31 mmATC_ATS_CNTL 0 0xcc9 5 0 4294967295 CREDITS_ATS_RPB 8 13 DEBUG_ECO 16 19 DISABLE_ATC 0 0 DISABLE_PASID 2 2 DISABLE_PRI 1 1 mmATC_ATS_DEBUG 0 0xcca 12 0 4294967295 ADDRESS_TRANSLATION_REQUEST_WRITE_PERMS 2 2 DISALLOW_ERR_TO_DONE 14 14 EXE_BIT 7 7 IDENT_RETURN 1 1 IGNORE_FED 15 15 INVALIDATE_ALL 0 0 INVALIDATION_REQUESTS_DISALLOWED_WHEN_ATC_IS_DISABLED 16 16 NUM_REQUESTS_AT_ERR 10 13 PAGE_REQUEST_PERMS 8 8 PAGE_REQUESTS_USE_RELAXED_ORDERING 5 5 PRIV_BIT 6 6 UNTRANSLATED_ONLY_REQUESTS_CARRY_SIZE 9 9 mmATC_ATS_DEFAULT_PAGE_CNTL 0 0xcd1 2 0 4294967295 DEFAULT_PAGE_HIGH 2 5 SEND_DEFAULT_PAGE 0 0 mmATC_ATS_DEFAULT_PAGE_LOW 0 0xcd0 1 0 4294967295 DEFAULT_PAGE 0 31 mmATC_ATS_FAULT_CNTL 0 0xccd 3 0 4294967295 FAULT_CRASH_TABLE 20 25 FAULT_INTERRUPT_TABLE 10 15 FAULT_REGISTER_LOG 0 5 mmATC_ATS_FAULT_DEBUG 0 0xccb 3 0 4294967295 ALLOW_SUBSEQUENT_FAULT_STATUS_ADDR_UPDATES 8 8 CLEAR_FAULT_STATUS_ADDR 16 16 CREDITS_ATS_IH 0 4 mmATC_ATS_FAULT_STATUS_ADDR 0 0xccf 1 0 4294967295 PAGE_ADDR 0 31 mmATC_ATS_FAULT_STATUS_INFO 0 0xcce 8 0 4294967295 EXTRA_INFO2 16 16 EXTRA_INFO 15 15 FAULT_TYPE 0 5 INVALIDATION 17 17 PAGE_ADDR_HIGH 24 27 PAGE_REQUEST 18 18 STATUS 19 23 VMID 10 14 mmATC_ATS_STATUS 0 0xccc 3 0 4294967295 BUSY 0 0 CRASHED 1 1 DEADLOCK_DETECTION 2 2 mmATC_L1_ADDRESS_OFFSET 0 0xcdd 1 0 4294967295 LOGICAL_ADDRESS 0 31 mmATC_L1_CNTL 0 0xcdc 3 0 4294967295 DONT_NEED_ATS_BEHAVIOR 0 1 NEED_ATS_BEHAVIOR 2 2 NEED_ATS_SNOOP_DEFAULT 4 4 mmATC_L1RD_DEBUG_TLB 0 0xcde 7 0 4294967295 CREDITS_L1_L2 12 17 CREDITS_L1_RPB 20 27 DEBUG_ECO 28 29 DISABLE_FRAGMENTS 0 0 EFFECTIVE_CAM_SIZE 4 7 EFFECTIVE_WORK_QUEUE_SIZE 8 10 INVALIDATE_ALL 30 30 mmATC_L1RD_STATUS 0 0xce0 3 0 4294967295 BAD_NEED_ATS 8 8 BUSY 0 0 DEADLOCK_DETECTION 1 1 mmATC_L1WR_DEBUG_TLB 0 0xcdf 7 0 4294967295 CREDITS_L1_L2 12 17 CREDITS_L1_RPB 20 27 DEBUG_ECO 28 29 DISABLE_FRAGMENTS 0 0 EFFECTIVE_CAM_SIZE 4 7 EFFECTIVE_WORK_QUEUE_SIZE 8 10 INVALIDATE_ALL 30 30 mmATC_L1WR_STATUS 0 0xce1 3 0 4294967295 BAD_NEED_ATS 8 8 BUSY 0 0 DEADLOCK_DETECTION 1 1 mmATC_L2_CNTL 0 0xcd5 4 0 4294967295 NUMBER_OF_TRANSLATION_READ_REQUESTS 0 1 NUMBER_OF_TRANSLATION_READS_DEPENDS_ON_ADDR_MOD 10 10 NUMBER_OF_TRANSLATION_WRITE_REQUESTS 4 5 NUMBER_OF_TRANSLATION_WRITES_DEPENDS_ON_ADDR_MOD 11 11 mmATC_L2_DEBUG 0 0xcd7 1 0 4294967295 CREDITS_L2_ATS 0 5 mmATC_MISC_CG 0 0xcd4 3 0 4294967295 ENABLE 18 18 MEM_LS_ENABLE 19 19 OFFDLY 6 11 mmATC_VM_APERTURE0_CNTL 0 0xcc4 1 0 4294967295 ATS_ACCESS_MODE 0 1 mmATC_VM_APERTURE0_CNTL2 0 0xcc6 1 0 4294967295 VMIDS_USING_RANGE 0 15 mmATC_VM_APERTURE0_HIGH_ADDR 0 0xcc2 1 0 4294967295 VIRTUAL_PAGE_NUMBER 0 27 mmATC_VM_APERTURE0_LOW_ADDR 0 0xcc0 1 0 4294967295 VIRTUAL_PAGE_NUMBER 0 27 mmATC_VM_APERTURE1_CNTL 0 0xcc5 1 0 4294967295 ATS_ACCESS_MODE 0 1 mmATC_VM_APERTURE1_CNTL2 0 0xcc7 1 0 4294967295 VMIDS_USING_RANGE 0 15 mmATC_VM_APERTURE1_HIGH_ADDR 0 0xcc3 1 0 4294967295 VIRTUAL_PAGE_NUMBER 0 27 mmATC_VM_APERTURE1_LOW_ADDR 0 0xcc1 1 0 4294967295 VIRTUAL_PAGE_NUMBER 0 27 mmATC_VMID0_PASID_MAPPING 0 0xce7 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID10_PASID_MAPPING 0 0xcf1 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID11_PASID_MAPPING 0 0xcf2 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID12_PASID_MAPPING 0 0xcf3 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID13_PASID_MAPPING 0 0xcf4 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID14_PASID_MAPPING 0 0xcf5 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID15_PASID_MAPPING 0 0xcf6 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID1_PASID_MAPPING 0 0xce8 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID2_PASID_MAPPING 0 0xce9 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID3_PASID_MAPPING 0 0xcea 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID4_PASID_MAPPING 0 0xceb 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID5_PASID_MAPPING 0 0xcec 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID6_PASID_MAPPING 0 0xced 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID7_PASID_MAPPING 0 0xcee 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID8_PASID_MAPPING 0 0xcef 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID9_PASID_MAPPING 0 0xcf0 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID_PASID_MAPPING_UPDATE_STATUS 0 0xce6 16 0 4294967295 VMID0_REMAPPING_FINISHED 0 0 VMID10_REMAPPING_FINISHED 10 10 VMID11_REMAPPING_FINISHED 11 11 VMID12_REMAPPING_FINISHED 12 12 VMID13_REMAPPING_FINISHED 13 13 VMID14_REMAPPING_FINISHED 14 14 VMID15_REMAPPING_FINISHED 15 15 VMID1_REMAPPING_FINISHED 1 1 VMID2_REMAPPING_FINISHED 2 2 VMID3_REMAPPING_FINISHED 3 3 VMID4_REMAPPING_FINISHED 4 4 VMID5_REMAPPING_FINISHED 5 5 VMID6_REMAPPING_FINISHED 6 6 VMID7_REMAPPING_FINISHED 7 7 VMID8_REMAPPING_FINISHED 8 8 VMID9_REMAPPING_FINISHED 9 9 mmCC_MC_MAX_CHANNEL 0 0x96e 1 0 4294967295 NOOFCHAN 1 4 mmDLL_CNTL 0 0xae9 5 0 4294967295 DLL_LOCK_TIME 12 21 DLL_RESET_TIME 0 9 MRDCK0_BYPASS 24 24 MRDCK1_BYPASS 25 25 PWR2_MODE 26 26 mmGMCON_DEBUG 0 0xd5f 3 0 4294967295 GFX_CLEAR 1 1 GFX_STALL 0 0 MISC_FLAGS 2 29 mmGMCON_MISC 0 0xd43 15 0 4294967295 ALLOW_DEEP_SLEEP_MODE 28 29 CRITICAL_REGS_LOCK 27 27 RENG_EXECUTE_NOW_MODE 10 10 RENG_EXECUTE_ON_REG_UPDATE 11 11 RENG_SRBM_CREDITS_MCD 12 15 STCTRL_DISABLE_ALLOW_SR 25 25 STCTRL_DISABLE_GMC_OFFLINE 26 26 STCTRL_FORCE_ALLOW_SR 30 30 STCTRL_GMC_IDLE_THRESHOLD 17 18 STCTRL_IGNORE_ALLOW_STOP 22 22 STCTRL_IGNORE_PRE_SR 21 21 STCTRL_IGNORE_PROTECTION_FAULT 24 24 STCTRL_IGNORE_SR_COMMIT 23 23 STCTRL_SRBM_IDLE_THRESHOLD 19 20 STCTRL_STUTTER_EN 16 16 mmGMCON_MISC2 0 0xd44 6 0 4294967295 RENG_MEM_POWER_CTRL_OVERRIDE0 0 2 RENG_MEM_POWER_CTRL_OVERRIDE1 3 5 RENG_SR_HOLD_THRESHOLD 10 15 STCTRL_EXTEND_GMC_OFFLINE 29 29 STCTRL_IGNORE_ARB_BUSY 28 28 STCTRL_LPT_TARGET 16 27 mmGMCON_MISC3 0 0xd51 3 0 4294967295 RENG_DISABLE_MCC 0 5 RENG_DISABLE_MCD 6 11 STCTRL_FORCE_PGFSM_CMD_DONE 12 23 mmGMCON_PERF_MON_CNTL0 0 0xd4a 5 0 4294967295 ALLOW_WRAP 28 28 START_MODE 24 25 START_THRESH 0 11 STOP_MODE 26 27 STOP_THRESH 12 23 mmGMCON_PERF_MON_CNTL1 0 0xd4b 5 0 4294967295 MON0_ID 18 23 MON1_ID 24 29 START_TRIG_ID 6 11 STOP_TRIG_ID 12 17 THRESH_CNTR_ID 0 5 mmGMCON_PERF_MON_RSLT0 0 0xd4c 1 0 4294967295 COUNT 0 31 mmGMCON_PERF_MON_RSLT1 0 0xd4d 1 0 4294967295 COUNT 0 31 mmGMCON_PGFSM_CONFIG 0 0xd4e 10 0 4294967295 FSM_ADDR 0 7 P1_SELECT 10 10 P2_SELECT 11 11 POWER_DOWN 8 8 POWER_UP 9 9 READ 13 13 REG_ADDR 28 31 RSRVD 14 26 SRBM_OVERRIDE 27 27 WRITE 12 12 mmGMCON_PGFSM_READ 0 0xd50 3 0 4294967295 PGFSM_SELECT 24 27 READ_VALUE 0 23 SERDES_MASTER_BUSY 28 28 mmGMCON_PGFSM_WRITE 0 0xd4f 1 0 4294967295 WRITE_VALUE 0 31 mmGMCON_RENG_EXECUTE 0 0xd42 5 0 4294967295 RENG_EXECUTE_DSP_END_PTR 12 21 RENG_EXECUTE_END_PTR 22 31 RENG_EXECUTE_NOW 1 1 RENG_EXECUTE_NOW_START_PTR 2 11 RENG_EXECUTE_ON_PWR_UP 0 0 mmGMCON_RENG_RAM_DATA 0 0xd41 1 0 4294967295 RENG_RAM_DATA 0 31 mmGMCON_RENG_RAM_INDEX 0 0xd40 1 0 4294967295 RENG_RAM_INDEX 0 9 mmGMCON_STCTRL_REGISTER_SAVE_EXCL_SET0 0 0xd48 2 0 4294967295 STCTRL_REGISTER_SAVE_EXCL0 0 15 STCTRL_REGISTER_SAVE_EXCL1 16 31 mmGMCON_STCTRL_REGISTER_SAVE_EXCL_SET1 0 0xd49 2 0 4294967295 STCTRL_REGISTER_SAVE_EXCL2 0 15 STCTRL_REGISTER_SAVE_EXCL3 16 31 mmGMCON_STCTRL_REGISTER_SAVE_RANGE0 0 0xd45 2 0 4294967295 STCTRL_REGISTER_SAVE_BASE0 0 15 STCTRL_REGISTER_SAVE_LIMIT0 16 31 mmGMCON_STCTRL_REGISTER_SAVE_RANGE1 0 0xd46 2 0 4294967295 STCTRL_REGISTER_SAVE_BASE1 0 15 STCTRL_REGISTER_SAVE_LIMIT1 16 31 mmGMCON_STCTRL_REGISTER_SAVE_RANGE2 0 0xd47 2 0 4294967295 STCTRL_REGISTER_SAVE_BASE2 0 15 STCTRL_REGISTER_SAVE_LIMIT2 16 31 mmMC_ARB_ADDR_HASH 0 0x9dc 3 0 4294967295 BANK_XOR_ENABLE 0 3 COL_XOR 4 11 ROW_XOR 12 27 mmMC_ARB_AGE_RD 0 0x9e9 24 0 4294967295 DIVIDE_GROUP0 24 24 DIVIDE_GROUP1 25 25 DIVIDE_GROUP2 26 26 DIVIDE_GROUP3 27 27 DIVIDE_GROUP4 28 28 DIVIDE_GROUP5 29 29 DIVIDE_GROUP6 30 30 DIVIDE_GROUP7 31 31 ENABLE_GROUP0 16 16 ENABLE_GROUP1 17 17 ENABLE_GROUP2 18 18 ENABLE_GROUP3 19 19 ENABLE_GROUP4 20 20 ENABLE_GROUP5 21 21 ENABLE_GROUP6 22 22 ENABLE_GROUP7 23 23 RATE_GROUP0 0 1 RATE_GROUP1 2 3 RATE_GROUP2 4 5 RATE_GROUP3 6 7 RATE_GROUP4 8 9 RATE_GROUP5 10 11 RATE_GROUP6 12 13 RATE_GROUP7 14 15 mmMC_ARB_AGE_WR 0 0x9ea 24 0 4294967295 DIVIDE_GROUP0 24 24 DIVIDE_GROUP1 25 25 DIVIDE_GROUP2 26 26 DIVIDE_GROUP3 27 27 DIVIDE_GROUP4 28 28 DIVIDE_GROUP5 29 29 DIVIDE_GROUP6 30 30 DIVIDE_GROUP7 31 31 ENABLE_GROUP0 16 16 ENABLE_GROUP1 17 17 ENABLE_GROUP2 18 18 ENABLE_GROUP3 19 19 ENABLE_GROUP4 20 20 ENABLE_GROUP5 21 21 ENABLE_GROUP6 22 22 ENABLE_GROUP7 23 23 RATE_GROUP0 0 1 RATE_GROUP1 2 3 RATE_GROUP2 4 5 RATE_GROUP3 6 7 RATE_GROUP4 8 9 RATE_GROUP5 10 11 RATE_GROUP6 12 13 RATE_GROUP7 14 15 mmMC_ARB_BANKMAP 0 0x9d7 5 0 4294967295 BANK0 0 3 BANK1 4 7 BANK2 8 11 BANK3 12 15 RANK 16 19 mmMC_ARB_BURST_TIME 0 0xa02 4 0 4294967295 STATE0 0 4 STATE1 5 9 STATE2 10 14 STATE3 15 19 mmMC_ARB_CAC_CNTL 0 0x9d4 4 0 4294967295 ALLOW_OVERFLOW 13 13 ENABLE 0 0 READ_WEIGHT 1 6 WRITE_WEIGHT 7 12 mmMC_ARB_CG 0 0x9fa 2 0 4294967295 CG_ARB_REQ 0 7 CG_ARB_RESP 8 15 mmMC_ARB_DRAM_TIMING 0 0x9dd 4 0 4294967295 ACTRD 0 7 ACTWR 8 15 RASMACTRD 16 23 RASMACTWR 24 31 mmMC_ARB_DRAM_TIMING_1 0 0x9fc 4 0 4294967295 ACTRD 0 7 ACTWR 8 15 RASMACTRD 16 23 RASMACTWR 24 31 mmMC_ARB_DRAM_TIMING2 0 0x9de 4 0 4294967295 BUS_TURN 24 28 RAS2RAS 0 7 RP 8 15 WRPLUSRP 16 23 mmMC_ARB_DRAM_TIMING2_1 0 0x9ff 4 0 4294967295 BUS_TURN 24 28 RAS2RAS 0 7 RP 8 15 WRPLUSRP 16 23 mmMC_ARB_FED_CNTL 0 0x9c1 3 0 4294967295 KEEP_POISON_IN_PAGE 4 4 MODE 0 1 WR_ERR 2 3 mmMC_ARB_GDEC_RD_CNTL 0 0x9ee 5 0 4294967295 PAGEBIT0 0 3 PAGEBIT1 4 7 REM_DEFAULT_GRP 10 13 USE_RANK 8 8 USE_RSNO 9 9 mmMC_ARB_GDEC_WR_CNTL 0 0x9ef 5 0 4294967295 PAGEBIT0 0 3 PAGEBIT1 4 7 REM_DEFAULT_GRP 10 13 USE_RANK 8 8 USE_RSNO 9 9 mmMC_ARB_GECC2 0 0x9c9 8 0 4294967295 CLOSE_BANK_RMW 14 14 COLFIFO_WATER 15 20 ECC_MODE 1 2 ENABLE 0 0 EXOR_BANK_SEL 5 6 NO_GECC_CLI 7 10 PAGE_BIT0 3 4 READ_ERR 11 13 mmMC_ARB_GECC2_CLI 0 0x9ca 4 0 4294967295 NO_GECC_CLI0 0 7 NO_GECC_CLI1 8 15 NO_GECC_CLI2 16 23 NO_GECC_CLI3 24 31 mmMC_ARB_GECC2_DEBUG 0 0x9c4 4 0 4294967295 DATA_FIELD 3 4 DIRECTION 2 2 NUM_ERR_BITS 0 1 SW_INJECTION 5 5 mmMC_ARB_GECC2_DEBUG2 0 0x9c5 4 0 4294967295 ERR0_START 8 15 ERR1_START 16 23 ERR2_START 24 31 PERIOD 0 7 mmMC_ARB_GECC2_MISC 0 0x9c3 1 0 4294967295 STREAK_BREAK 0 3 mmMC_ARB_GECC2_STATUS 0 0x9c2 15 0 4294967295 CORR_CLEAR0 8 8 CORR_CLEAR1 12 12 CORR_STS0 0 0 CORR_STS1 4 4 FED_CLEAR0 10 10 FED_CLEAR1 14 14 FED_STS0 2 2 FED_STS1 6 6 RSVD0 3 3 RSVD1 7 7 RSVD2 11 11 UNCORR_CLEAR0 9 9 UNCORR_CLEAR1 13 13 UNCORR_STS0 1 1 UNCORR_STS1 5 5 mmMC_ARB_LAZY0_RD 0 0x9e5 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_LAZY0_WR 0 0x9e6 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_LAZY1_RD 0 0x9e7 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_LAZY1_WR 0 0x9e8 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_LM_RD 0 0x9f0 8 0 4294967295 BANKGROUP_CONFIG 21 23 ENABLE_TWO_LIST 18 18 POPIDLE_RST_TWOLIST 19 19 SKID1_RST_TWOLIST 20 20 STREAK_BREAK 16 16 STREAK_LIMIT 0 7 STREAK_LIMIT_UBER 8 15 STREAK_UBER 17 17 mmMC_ARB_LM_WR 0 0x9f1 8 0 4294967295 BANKGROUP_CONFIG 21 23 ENABLE_TWO_LIST 18 18 POPIDLE_RST_TWOLIST 19 19 SKID1_RST_TWOLIST 20 20 STREAK_BREAK 16 16 STREAK_LIMIT 0 7 STREAK_LIMIT_UBER 8 15 STREAK_UBER 17 17 mmMC_ARB_MINCLKS 0 0x9da 3 0 4294967295 ARB_RW_SWITCH 16 16 READ_CLKS 0 7 WRITE_CLKS 8 15 mmMC_ARB_MISC 0 0x9d6 12 0 4294967295 CALI_ENABLE 20 20 CALI_RATES 21 22 CHAN_COUPLE 3 10 DISPURG_NOSW2WR 24 24 DISPURG_STALL 25 25 DISPURG_THROTTLE 26 29 DISPURGVLD_NOWRT 23 23 HARSHNESS 11 18 IDLE_RFSH 1 1 SMART_RDWR_SW 19 19 STICKY_RFSH 0 0 STUTTER_RFSH 2 2 mmMC_ARB_MISC2 0 0x9d5 19 0 4294967295 ARB_DEBUG29 29 29 GECC 18 18 GECC_RST 19 19 GECC_STATUS 20 20 POP_IDLE_REPLAY 11 11 RDRET_NO_BP 13 13 RDRET_NO_REORDERING 12 12 RDRET_SEQ_SKID 14 17 REPLAY_DEBUG 28 28 SEQ_RDY_POP_IDLE 30 30 TAGFIFO_THRESHOLD 21 24 TCCDL4_BANKBIT3_XOR_COLBIT4 6 6 TCCDL4_BANKBIT3_XOR_COLBIT5 7 7 TCCDL4_BANKBIT3_XOR_COLBIT6 8 8 TCCDL4_BANKBIT3_XOR_COLBIT7 9 9 TCCDL4_BANKBIT3_XOR_COLBIT8 10 10 TCCDL4_BANKBIT3_XOR_ENABLE 5 5 TCCDL4_REPLAY_EOB 31 31 WCDR_REPLAY_MASKCNT 25 27 mmMC_ARB_PM_CNTL 0 0x9ed 17 0 4294967295 BLKOUT_ON_D1 5 5 IDLE_CNT 20 23 IDLE_ON_D1 6 6 IDLE_ON_D2 18 18 IDLE_ON_D3 19 19 OVERRIDE_CGSTATE 0 1 OVRR_CGRFSH 2 2 OVRR_CGSQM 3 3 OVRR_PM 7 7 OVRR_PM_STATE 8 9 OVRR_RD 10 10 OVRR_RD_STATE 11 11 OVRR_RFSH 14 14 OVRR_RFSH_STATE 15 15 OVRR_WR 12 12 OVRR_WR_STATE 13 13 SRFSH_ON_D1 4 4 mmMC_ARB_POP 0 0x9d9 9 0 4294967295 ALLOW_EOB_BY_WRRET_STALL 19 19 ENABLE_ARB 0 0 ENABLE_TWO_PAGE 18 18 POP_DEPTH 2 5 QUICK_STOP 17 17 SKID_DEPTH 12 14 SPEC_OPEN 1 1 WAIT_AFTER_RFSH 15 16 WRDATAINDEX_DEPTH 6 11 mmMC_ARB_RAMCFG 0 0x9d8 6 0 4294967295 CHANSIZE 8 8 NOOFBANK 0 1 NOOFCOLS 6 7 NOOFGROUPS 12 12 NOOFRANKS 2 2 NOOFROWS 3 5 mmMC_ARB_REMREQ 0 0x9f2 4 0 4294967295 RD_WATER 0 7 WR_LAZY_TIMER 20 23 WR_MAXBURST_SIZE 16 19 WR_WATER 8 15 mmMC_ARB_REPLAY 0 0x9f3 9 0 4294967295 BOS_ENABLE_WAIT_CYC 7 7 BOS_WAIT_CYC 8 14 BREAK_ON_STALL 6 6 ENABLE_RD 0 0 ENABLE_WR 1 1 IGNORE_WR_CDC 5 5 RAW_ENABLE 4 4 WAW_ENABLE 3 3 WRACK_MODE 2 2 mmMC_ARB_RET_CREDITS_RD 0 0x9f4 4 0 4294967295 DISP 16 23 HUB 8 15 LCL 0 7 RETURN_CREDIT 24 31 mmMC_ARB_RET_CREDITS_WR 0 0x9f5 4 0 4294967295 HUB 8 15 LCL 0 7 RETURN_CREDIT 16 23 WRRET_SEQ_SKID 24 27 mmMC_ARB_RFSH_CNTL 0 0x9eb 4 0 4294967295 ACCUM 11 11 ENABLE 0 0 URG0 1 5 URG1 6 10 mmMC_ARB_RFSH_RATE 0 0x9ec 1 0 4294967295 POWERMODE0 0 7 mmMC_ARB_RTT_CNTL0 0 0x9d0 23 0 4294967295 BREAK_ON_HARSH 8 8 BREAK_ON_URGENTRD 9 9 BREAK_ON_URGENTWR 10 10 DATA_CNTL 24 24 DEBUG_RSV_0 15 15 DEBUG_RSV_1 16 16 DEBUG_RSV_2 17 17 DEBUG_RSV_3 18 18 DEBUG_RSV_4 19 19 DEBUG_RSV_5 20 20 DEBUG_RSV_6 21 21 DEBUG_RSV_7 22 22 DEBUG_RSV_8 23 23 ENABLE 0 0 FLUSH_ON_ENTER 4 4 HARSH_START 5 5 NEIGHBOR_BIT 25 25 START_IDLE 1 1 START_R2W 2 3 START_R2W_RFSH 14 14 TPS_HARSH_PRIORITY 6 6 TRAIN_PERIOD 11 13 TWRT_HARSH_PRIORITY 7 7 mmMC_ARB_RTT_CNTL1 0 0x9d1 7 0 4294967295 WINDOW_DEC_THRESHOLD 13 19 WINDOW_INC_THRESHOLD 6 12 WINDOW_SIZE 0 4 WINDOW_SIZE_MAX 20 24 WINDOW_SIZE_MIN 25 29 WINDOW_UPDATE_COUNT 30 31 WINDOW_UPDATE 5 5 mmMC_ARB_RTT_CNTL2 0 0x9d2 4 0 4294967295 FILTER_CNTL 13 13 PHASE_ADJUST_SIZE 12 12 PHASE_ADJUST_THRESHOLD 6 11 SAMPLE_CNT 0 5 mmMC_ARB_RTT_DATA 0 0x9cf 1 0 4294967295 PATTERN 0 7 mmMC_ARB_RTT_DEBUG 0 0x9d3 6 0 4294967295 DEBUG_BYTE_CH0 0 1 DEBUG_BYTE_CH1 2 3 SHIFTED_PHASE_CH0 4 11 SHIFTED_PHASE_CH1 17 24 WINDOW_SIZE_CH0 12 16 WINDOW_SIZE_CH1 25 29 mmMC_ARB_SQM_CNTL 0 0x9db 5 0 4294967295 DYN_SQM_ENABLE 8 8 MIN_PENAL 0 7 RATIO_DEBUG 24 31 RATIO 16 23 SQM_RESERVE 9 15 mmMC_ARB_TM_CNTL_RD 0 0x9e3 4 0 4294967295 BANK_SELECT 1 2 GROUPBY_RANK 0 0 MATCH_BANK 4 4 MATCH_RANK 3 3 mmMC_ARB_TM_CNTL_WR 0 0x9e4 4 0 4294967295 BANK_SELECT 1 2 GROUPBY_RANK 0 0 MATCH_BANK 4 4 MATCH_RANK 3 3 mmMC_ARB_WCDR 0 0x9fb 14 0 4294967295 IDLE_BURST 7 12 IDLE_BURST_MODE 13 13 IDLE_DEGLITCH_ENABLE 16 16 IDLE_ENABLE 0 0 IDLE_PERIOD 2 6 IDLE_WAKEUP 14 15 SEQ_IDLE 1 1 WPRE_ENABLE 17 17 WPRE_INC_READ 25 25 WPRE_INC_SEQIDLE 27 27 WPRE_INC_SKIDIDLE 26 26 WPRE_MAX_BURST 22 24 WPRE_THRESHOLD 18 21 WPRE_TWOPAGE 28 28 mmMC_ARB_WCDR_2 0 0x9ce 8 0 4294967295 DEBUG_0 9 9 DEBUG_1 10 10 DEBUG_2 11 11 DEBUG_3 12 12 DEBUG_4 13 13 DEBUG_5 14 14 WPRE_INC_STEP 0 3 WPRE_MIN_THRESHOLD 4 8 mmMC_ARB_WTM_CNTL_RD 0 0x9df 10 0 4294967295 ALLOW_STUTTER_GRP0 3 3 ALLOW_STUTTER_GRP1 4 4 ALLOW_STUTTER_GRP2 5 5 ALLOW_STUTTER_GRP3 6 6 ALLOW_STUTTER_GRP4 7 7 ALLOW_STUTTER_GRP5 8 8 ALLOW_STUTTER_GRP6 9 9 ALLOW_STUTTER_GRP7 10 10 HARSH_PRI 2 2 WTMODE 0 1 mmMC_ARB_WTM_CNTL_WR 0 0x9e0 10 0 4294967295 ALLOW_STUTTER_GRP0 3 3 ALLOW_STUTTER_GRP1 4 4 ALLOW_STUTTER_GRP2 5 5 ALLOW_STUTTER_GRP3 6 6 ALLOW_STUTTER_GRP4 7 7 ALLOW_STUTTER_GRP5 8 8 ALLOW_STUTTER_GRP6 9 9 ALLOW_STUTTER_GRP7 10 10 HARSH_PRI 2 2 WTMODE 0 1 mmMC_ARB_WTM_GRPWT_RD 0 0x9e1 9 0 4294967295 GRP0 0 1 GRP1 2 3 GRP2 4 5 GRP3 6 7 GRP4 8 9 GRP5 10 11 GRP6 12 13 GRP7 14 15 GRP_EXT 16 23 mmMC_ARB_WTM_GRPWT_WR 0 0x9e2 9 0 4294967295 GRP0 0 1 GRP1 2 3 GRP2 4 5 GRP3 6 7 GRP4 8 9 GRP5 10 11 GRP6 12 13 GRP7 14 15 GRP_EXT 16 23 mmMC_BIST_AUTO_CNTL 0 0xa06 5 0 4294967295 ADR_GEN 4 7 ADR_RESET 25 25 LFSR_KEY 8 23 LFSR_RESET 24 24 MOP 0 1 mmMC_BIST_CMD_CNTL 0 0xa8e 12 0 4294967295 CMD_ISSUE_LOOP 2 2 CMD_ISSUE_MODE 1 1 CMD_ISSUE_MODE_U 16 16 CMD_ISSUE_RUN 17 17 DONE 31 31 ENABLE_D0 28 28 ENABLE_D1 29 29 LOOP_CNT_MAX 4 15 LOOP_CNT_RD 18 27 LOOP_END_CONDITION 3 3 RESET 0 0 STATUS_CH 30 30 mmMC_BIST_CMP_CNTL 0 0xa8d 11 0 4294967295 CMP 16 17 CMP_MASK_BIT 4 11 CMP_MASK_BYTE 0 3 DATA_STORE_MODE 20 21 DATA_STORE_SEL 13 13 DAT_MODE 18 18 EDC_STORE_MODE 19 19 EDC_STORE_SEL 14 14 ENABLE_CMD_FIFO 15 15 LOAD_RTEDC 12 12 MISMATCH_CNT 22 31 mmMC_BIST_CMP_CNTL_2 0 0xab6 4 0 4294967295 DATA_STORE_CNT 0 4 DATA_STORE_CNT_RST 8 8 EDC_STORE_CNT 12 16 EDC_STORE_CNT_RST 20 20 mmMC_BIST_CNTL 0 0xa05 14 0 4294967295 ADR_MODE 5 5 DAT_MODE 6 6 DONE 30 30 ENABLE_D0 12 12 ENABLE_D1 13 13 LOAD_RTDATA_CH 14 14 LOAD_RTDATA 31 31 LOOP_CNT 16 27 LOOP 10 11 MOP_MODE 4 4 PTR_RST_D0 2 2 PTR_RST_D1 3 3 RESET 0 0 RUN 1 1 mmMC_BIST_DATA_MASK 0 0xa12 1 0 4294967295 MASK 0 31 mmMC_BIST_DATA_WORD0 0 0xa0a 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD1 0 0xa0b 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD2 0 0xa0c 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD3 0 0xa0d 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD4 0 0xa0e 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD5 0 0xa0f 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD6 0 0xa10 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD7 0 0xa11 1 0 4294967295 DATA 0 31 mmMC_BIST_DIR_CNTL 0 0xa07 9 0 4294967295 CMD_RTR_D0 6 6 CMD_RTR_D1 8 8 DATA_LOAD 5 5 DAT_RTR_D0 7 7 DAT_RTR_D1 9 9 EOB 3 3 MOP3 10 10 MOP_LOAD 4 4 MOP 0 2 mmMC_BIST_EADDR 0 0xa09 6 0 4294967295 BANK 24 27 COLH 29 29 COL 0 9 RANK 28 28 ROWH 30 31 ROW 10 23 mmMC_BIST_MISMATCH_ADDR 0 0xa13 6 0 4294967295 BANK 24 27 COLH 29 29 COL 0 9 RANK 28 28 ROWH 30 31 ROW 10 23 mmMC_BIST_RDATA_EDC 0 0xa1d 1 0 4294967295 EDC 0 31 mmMC_BIST_RDATA_MASK 0 0xa1c 1 0 4294967295 MASK 0 31 mmMC_BIST_RDATA_WORD0 0 0xa14 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD1 0 0xa15 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD2 0 0xa16 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD3 0 0xa17 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD4 0 0xa18 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD5 0 0xa19 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD6 0 0xa1a 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD7 0 0xa1b 1 0 4294967295 RDATA 0 31 mmMC_BIST_SADDR 0 0xa08 6 0 4294967295 BANK 24 27 COLH 29 29 COL 0 9 RANK 28 28 ROWH 30 31 ROW 10 23 mmMC_CG_CONFIG 0 0x96f 6 0 4294967295 INDEX 6 21 MCDW_WR_ENABLE 0 0 MCDX_WR_ENABLE 1 1 MCDY_WR_ENABLE 2 2 MCDZ_WR_ENABLE 3 3 MC_RD_ENABLE 4 5 mmMC_CG_CONFIG_MCD 0 0x829 8 0 4294967295 INDEX 13 28 MCD0_WR_ENABLE 0 0 MCD1_WR_ENABLE 1 1 MCD2_WR_ENABLE 2 2 MCD3_WR_ENABLE 3 3 MCD4_WR_ENABLE 4 4 MCD5_WR_ENABLE 5 5 MC_RD_ENABLE 8 10 mmMC_CG_DATAPORT 0 0xa21 1 0 4294967295 DATA_FIELD 0 31 mmMC_CITF_CNTL 0 0x970 4 0 4294967295 EXEMPTPM 3 3 GFX_IDLE_OVERRIDE 4 5 IGNOREPM 2 2 MCD_SRBM_MASK_ENABLE 6 6 mmMC_CITF_CREDITS_ARB_RD 0 0x972 5 0 4294967295 HUB_PRI 25 25 LCL_PRI 24 24 READ_HUB 8 15 READ_LCL 0 7 READ_PRI 16 23 mmMC_CITF_CREDITS_ARB_WR 0 0x973 4 0 4294967295 HUB_PRI 16 16 LCL_PRI 17 17 WRITE_HUB 8 15 WRITE_LCL 0 7 mmMC_CITF_CREDITS_VM 0 0x971 2 0 4294967295 READ_ALL 0 5 WRITE_ALL 6 11 mmMC_CITF_CREDITS_XBAR 0 0x989 2 0 4294967295 READ_LCL 0 7 WRITE_LCL 8 15 mmMC_CITF_DAGB_CNTL 0 0x974 4 0 4294967295 CENTER_RD_MAX_BURST 1 4 CENTER_WR_MAX_BURST 6 9 DISABLE_SELF_INIT 5 5 JUMP_AHEAD 0 0 mmMC_CITF_DAGB_DLY 0 0x977 3 0 4294967295 CLI 16 20 DLY 0 4 POS 24 28 mmMC_CITF_INT_CREDITS 0 0x975 4 0 4294967295 CNTR_RD_HUB_HP 18 23 CNTR_RD_HUB_LP 12 17 CNTR_RD_LCL 24 29 REMRDRET 0 5 mmMC_CITF_INT_CREDITS_WR 0 0x97d 2 0 4294967295 CNTR_WR_HUB 0 5 CNTR_WR_LCL 6 11 mmMC_CITF_MISC_RD_CG 0 0x992 5 0 4294967295 ENABLE 18 18 MEM_LS_ENABLE 19 19 OFFDLY 6 11 ONDLY 0 5 RDYDLY 12 17 mmMC_CITF_MISC_VM_CG 0 0x994 5 0 4294967295 ENABLE 18 18 MEM_LS_ENABLE 19 19 OFFDLY 6 11 ONDLY 0 5 RDYDLY 12 17 mmMC_CITF_MISC_WR_CG 0 0x993 5 0 4294967295 ENABLE 18 18 MEM_LS_ENABLE 19 19 OFFDLY 6 11 ONDLY 0 5 RDYDLY 12 17 mmMC_CITF_PERF_MON_CNTL2 0 0x98e 1 0 4294967295 CID 0 8 mmMC_CITF_PERF_MON_RSLT2 0 0x991 13 0 4294967295 CB_RD_BUSY 6 6 CB_WR_BUSY 12 12 DB_RD_BUSY 7 7 DB_WR_BUSY 13 13 SX_WR_BUSY 14 14 TC0_RD_BUSY 8 8 TC0_WR_BUSY 16 16 TC1_RD_BUSY 10 10 TC1_WR_BUSY 17 17 TC2_RD_BUSY 15 15 TC2_WR_BUSY 18 18 VC0_RD_BUSY 9 9 VC1_RD_BUSY 11 11 mmMC_CITF_REMREQ 0 0x97a 3 0 4294967295 CREDITS_ENABLE 14 14 READ_CREDITS 0 6 WRITE_CREDITS 7 13 mmMC_CITF_RET_MODE 0 0x976 6 0 4294967295 INORDER_RD 0 0 INORDER_WR 1 1 LCLPRI_RD 4 4 LCLPRI_WR 5 5 REMPRI_RD 2 2 REMPRI_WR 3 3 mmMC_CITF_WTM_RD_CNTL 0 0x97f 9 0 4294967295 DISABLE_REMOTE 24 24 GROUP0_DECREMENT 0 2 GROUP1_DECREMENT 3 5 GROUP2_DECREMENT 6 8 GROUP3_DECREMENT 9 11 GROUP4_DECREMENT 12 14 GROUP5_DECREMENT 15 17 GROUP6_DECREMENT 18 20 GROUP7_DECREMENT 21 23 mmMC_CITF_WTM_WR_CNTL 0 0x980 9 0 4294967295 DISABLE_REMOTE 24 24 GROUP0_DECREMENT 0 2 GROUP1_DECREMENT 3 5 GROUP2_DECREMENT 6 8 GROUP3_DECREMENT 9 11 GROUP4_DECREMENT 12 14 GROUP5_DECREMENT 15 17 GROUP6_DECREMENT 18 20 GROUP7_DECREMENT 21 23 mmMC_CITF_XTRA_ENABLE 0 0x96d 7 0 4294967295 ARB_DBG 8 11 CB1_RD 0 0 CB1_WR 1 1 DB1_RD 2 2 DB1_WR 3 3 TC2_RD 4 4 TC2_WR 12 12 mmMC_CONFIG 0 0x800 6 0 4294967295 MCC_INDEX_MODE_ENABLE 31 31 MCDW_WR_ENABLE 0 0 MCDX_WR_ENABLE 1 1 MCDY_WR_ENABLE 2 2 MCDZ_WR_ENABLE 3 3 MC_RD_ENABLE 4 5 mmMC_CONFIG_MCD 0 0x828 8 0 4294967295 MCD0_WR_ENABLE 0 0 MCD1_WR_ENABLE 1 1 MCD2_WR_ENABLE 2 2 MCD3_WR_ENABLE 3 3 MCD4_WR_ENABLE 4 4 MCD5_WR_ENABLE 5 5 MCD_INDEX_MODE_ENABLE 31 31 MC_RD_ENABLE 8 10 mmMC_HUB_MISC_DBG 0 0x831 2 0 4294967295 SELECT0 0 3 SELECT1 4 7 mmMC_HUB_MISC_FRAMING 0 0x834 1 0 4294967295 BITS 0 31 mmMC_HUB_MISC_HUB_CG 0 0x82e 5 0 4294967295 ENABLE 18 18 MEM_LS_ENABLE 19 19 OFFDLY 6 11 ONDLY 0 5 RDYDLY 12 17 mmMC_HUB_MISC_IDLE_STATUS 0 0x847 20 0 4294967295 OUTSTANDING_CP_READ 0 0 OUTSTANDING_CP_WRITE 1 1 OUTSTANDING_DISP_READ 10 10 OUTSTANDING_DISP_WRITE 11 11 OUTSTANDING_GFX_READ 2 2 OUTSTANDING_GFX_WRITE 3 3 OUTSTANDING_HDP_READ 16 16 OUTSTANDING_HDP_WRITE 17 17 OUTSTANDING_OTH_READ 18 18 OUTSTANDING_OTH_WRITE 19 19 OUTSTANDING_RLC_READ 6 6 OUTSTANDING_RLC_WRITE 7 7 OUTSTANDING_SMU_READ 14 14 OUTSTANDING_SMU_WRITE 15 15 OUTSTANDING_UVD_READ 12 12 OUTSTANDING_UVD_WRITE 13 13 OUTSTANDING_VCE_READ 24 24 OUTSTANDING_VCE_WRITE 25 25 OUTSTANDING_VMC_READ 20 20 OUTSTANDING_VMC_WRITE 21 21 mmMC_HUB_MISC_OVERRIDE 0 0x833 1 0 4294967295 IDLE 0 1 mmMC_HUB_MISC_POWER 0 0x82d 2 0 4294967295 PM_BLACKOUT_CNTL 3 4 SRBM_GATE_OVERRIDE 2 2 mmMC_HUB_MISC_SIP_CG 0 0x830 5 0 4294967295 ENABLE 18 18 MEM_LS_ENABLE 19 19 OFFDLY 6 11 ONDLY 0 5 RDYDLY 12 17 mmMC_HUB_MISC_STATUS 0 0x832 14 0 4294967295 GFX_BUSY 13 13 OUTSTANDING_HUB_RDREQ 2 2 OUTSTANDING_HUB_RDRET 3 3 OUTSTANDING_HUB_WRREQ 4 4 OUTSTANDING_HUB_WRRET 5 5 OUTSTANDING_MCD_READ 8 8 OUTSTANDING_MCD_WRITE 9 9 OUTSTANDING_READ 0 0 OUTSTANDING_RPB_READ 6 6 OUTSTANDING_RPB_WRITE 7 7 OUTSTANDING_WRITE 1 1 READ_DEADLOCK_WARNING 12 12 RPB_BUSY 10 10 WRITE_DEADLOCK_WARNING 11 11 mmMC_HUB_MISC_VM_CG 0 0x82f 5 0 4294967295 ENABLE 18 18 MEM_LS_ENABLE 19 19 OFFDLY 6 11 ONDLY 0 5 RDYDLY 12 17 mmMC_HUB_RDREQ_CNTL 0 0x83b 13 0 4294967295 BREAK_HDP_DEADLOCK 9 9 DEBUG_REG 10 16 DISABLE_SELF_INIT_GBL0 17 17 DISABLE_SELF_INIT_GBL1 18 18 JUMPAHEAD_GBL0 2 2 JUMPAHEAD_GBL1 3 3 MCDW_STALL_MODE 5 5 MCDX_STALL_MODE 6 6 MCDY_STALL_MODE 7 7 MCDZ_STALL_MODE 8 8 OVERRIDE_STALL_ENABLE 4 4 PWRXPRESS_MODE 19 19 REMOTE_BLACKOUT 0 0 mmMC_HUB_RDREQ_CREDITS 0 0x844 4 0 4294967295 STOR0 16 23 STOR1 24 31 VM0 0 7 VM1 8 15 mmMC_HUB_RDREQ_CREDITS2 0 0x845 1 0 4294967295 STOR1_PRI 0 7 mmMC_HUB_RDREQ_DMIF 0 0x863 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_RDREQ_DMIF_LIMIT 0 0x848 2 0 4294967295 ENABLE 0 1 LIMIT_COUNT 2 6 mmMC_HUB_RDREQ_GBL0 0 0x856 1 0 4294967295 STALL_THRESHOLD 0 7 mmMC_HUB_RDREQ_GBL1 0 0x857 1 0 4294967295 STALL_THRESHOLD 0 7 mmMC_HUB_RDREQ_HDP 0 0x85b 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_RDREQ_MCDW 0 0x851 8 0 4294967295 ASK_CREDITS 11 17 BLACKOUT_EXEMPT 1 1 BUS 2 2 DISPLAY_CREDITS 18 24 ENABLE 0 0 LAZY_TIMER 7 10 MAXBURST 3 6 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_MCDX 0 0x852 8 0 4294967295 ASK_CREDITS 11 17 BLACKOUT_EXEMPT 1 1 BUS 2 2 DISPLAY_CREDITS 18 24 ENABLE 0 0 LAZY_TIMER 7 10 MAXBURST 3 6 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_MCDY 0 0x853 8 0 4294967295 ASK_CREDITS 11 17 BLACKOUT_EXEMPT 1 1 BUS 2 2 DISPLAY_CREDITS 18 24 ENABLE 0 0 LAZY_TIMER 7 10 MAXBURST 3 6 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_MCDZ 0 0x854 8 0 4294967295 ASK_CREDITS 11 17 BLACKOUT_EXEMPT 1 1 BUS 2 2 DISPLAY_CREDITS 18 24 ENABLE 0 0 LAZY_TIMER 7 10 MAXBURST 3 6 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_MCIF 0 0x864 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_RDREQ_RLC 0 0x85d 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_RDREQ_SEM 0 0x85e 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_RDREQ_SIP 0 0x855 3 0 4294967295 ASK_CREDITS 0 6 DISPLAY_CREDITS 8 14 DUMMY 7 7 mmMC_HUB_RDREQ_SMU 0 0x858 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_RDREQ_STATUS 0 0x839 12 0 4294967295 GBL0_BYPASS_STOR_FULL 7 7 GBL0_STOR_FULL 6 6 GBL0_VM_FULL 5 5 GBL1_BYPASS_STOR_FULL 10 10 GBL1_STOR_FULL 9 9 GBL1_VM_FULL 8 8 MCDW_RD_AVAIL 1 1 MCDX_RD_AVAIL 2 2 MCDY_RD_AVAIL 3 3 MCDZ_RD_AVAIL 4 4 PWRXPRESS_ERR 11 11 SIP_AVAIL 0 0 mmMC_HUB_RDREQ_UMC 0 0x860 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_RDREQ_UVD 0 0x861 9 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 VM_BYPASS 16 16 mmMC_HUB_RDREQ_VCE 0 0x85f 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_RDREQ_VCEU 0 0x866 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_RDREQ_VMC 0 0x865 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_RDREQ_WTM_CNTL 0 0x83d 8 0 4294967295 GROUP0_DECREMENT 0 2 GROUP1_DECREMENT 3 5 GROUP2_DECREMENT 6 8 GROUP3_DECREMENT 9 11 GROUP4_DECREMENT 12 14 GROUP5_DECREMENT 15 17 GROUP6_DECREMENT 18 20 GROUP7_DECREMENT 21 23 mmMC_HUB_RDREQ_XDMAM 0 0x882 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_SHARED_DAGB_DLY 0 0x846 3 0 4294967295 CLI 16 20 DLY 0 5 POS 24 28 mmMC_HUB_WDP_BP 0 0x837 3 0 4294967295 ENABLE 0 0 RDRET 1 17 WRREQ 18 29 mmMC_HUB_WDP_CNTL 0 0x835 13 0 4294967295 DEBUG_REG 5 12 DISABLE_SELF_INIT_GBL0 13 13 DISABLE_SELF_INIT_GBL1 14 14 DISABLE_SELF_INIT_INTERNAL 15 15 DISP_WAIT_EOP 18 18 FAIR_CH_SW 16 16 JUMPAHEAD_GBL0 1 1 JUMPAHEAD_GBL1 2 2 JUMPAHEAD_INTERNAL 3 3 LCLWRREQ_BYPASS 17 17 MCD_WAIT_EOP 19 19 OVERRIDE_STALL_ENABLE 4 4 SIP_WAIT_EOP 20 20 mmMC_HUB_WDP_CREDITS 0 0x83f 4 0 4294967295 STOR0 16 23 STOR1 24 31 VM0 0 7 VM1 8 15 mmMC_HUB_WDP_ERR 0 0x836 2 0 4294967295 MGPU1_TARG_SYS 0 0 MGPU2_TARG_SYS 1 1 mmMC_HUB_WDP_GBL0 0 0x841 4 0 4294967295 LAZY_TIMER 4 7 MAXBURST 0 3 STALL_MODE 16 16 STALL_THRESHOLD 8 15 mmMC_HUB_WDP_GBL1 0 0x842 4 0 4294967295 LAZY_TIMER 4 7 MAXBURST 0 3 STALL_MODE 16 16 STALL_THRESHOLD 8 15 mmMC_HUB_WDP_HDP 0 0x879 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_IH 0 0x872 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_MCDW 0 0x867 8 0 4294967295 ASK_CREDITS 7 12 ASK_CREDITS_W 24 30 BLACKOUT_EXEMPT 1 1 ENABLE 0 0 LAZY_TIMER 13 16 MAXBURST 3 6 STALL_MODE 2 2 STALL_THRESHOLD 17 23 mmMC_HUB_WDP_MCDX 0 0x868 8 0 4294967295 ASK_CREDITS 7 12 ASK_CREDITS_W 24 30 BLACKOUT_EXEMPT 1 1 ENABLE 0 0 LAZY_TIMER 13 16 MAXBURST 3 6 STALL_MODE 2 2 STALL_THRESHOLD 17 23 mmMC_HUB_WDP_MCDY 0 0x869 8 0 4294967295 ASK_CREDITS 7 12 ASK_CREDITS_W 24 30 BLACKOUT_EXEMPT 1 1 ENABLE 0 0 LAZY_TIMER 13 16 MAXBURST 3 6 STALL_MODE 2 2 STALL_THRESHOLD 17 23 mmMC_HUB_WDP_MCDZ 0 0x86a 8 0 4294967295 ASK_CREDITS 7 12 ASK_CREDITS_W 24 30 BLACKOUT_EXEMPT 1 1 ENABLE 0 0 LAZY_TIMER 13 16 MAXBURST 3 6 STALL_MODE 2 2 STALL_THRESHOLD 17 23 mmMC_HUB_WDP_MCIF 0 0x86f 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_MGPU 0 0x843 5 0 4294967295 CID 8 15 ENABLE 23 23 MGPU_PRIORITY_TIME 16 22 OTH_PRIORITY_TIME 24 30 STOR 0 7 mmMC_HUB_WDP_MGPU2 0 0x840 1 0 4294967295 CID2 0 7 mmMC_HUB_WDP_RLC 0 0x873 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_SEM 0 0x874 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_SH0 0 0x86e 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_SH1 0 0x876 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_SIP 0 0x86b 2 0 4294967295 ASK_CREDITS 2 8 STALL_MODE 0 1 mmMC_HUB_WDP_SMU 0 0x875 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_STATUS 0 0x838 15 0 4294967295 GBL0_BYPASS_STOR_FULL 7 7 GBL0_STOR_FULL 6 6 GBL0_VM_FULL 5 5 GBL1_BYPASS_STOR_FULL 10 10 GBL1_STOR_FULL 9 9 GBL1_VM_FULL 8 8 MCDW_RD_AVAIL 1 1 MCDW_WR_AVAIL 11 11 MCDX_RD_AVAIL 2 2 MCDX_WR_AVAIL 12 12 MCDY_RD_AVAIL 3 3 MCDY_WR_AVAIL 13 13 MCDZ_RD_AVAIL 4 4 MCDZ_WR_AVAIL 14 14 SIP_AVAIL 0 0 mmMC_HUB_WDP_UMC 0 0x877 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_UVD 0 0x878 9 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 VM_BYPASS 16 16 mmMC_HUB_WDP_VCE 0 0x870 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_VCEU 0 0x87f 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_WTM_CNTL 0 0x83e 8 0 4294967295 GROUP0_DECREMENT 0 2 GROUP1_DECREMENT 3 5 GROUP2_DECREMENT 6 8 GROUP3_DECREMENT 9 11 GROUP4_DECREMENT 12 14 GROUP5_DECREMENT 15 17 GROUP6_DECREMENT 18 20 GROUP7_DECREMENT 21 23 mmMC_HUB_WDP_XDMA 0 0x881 9 0 4294967295 BLACKOUT_EXEMPT 3 3 BYPASS_AVAIL_OVERRIDE 16 16 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_XDMAM 0 0x880 9 0 4294967295 BLACKOUT_EXEMPT 3 3 BYPASS_AVAIL_OVERRIDE 16 16 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WDP_XDP 0 0x871 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAXBURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_HUB_WRRET_CNTL 0 0x83c 6 0 4294967295 BP_ENABLE 21 21 BP 1 20 DEBUG_REG 22 29 DISABLE_SELF_INIT 30 30 FAIR_CH_SW 31 31 JUMPAHEAD 0 0 mmMC_HUB_WRRET_MCDW 0 0x87b 2 0 4294967295 CREDIT_COUNT 1 7 STALL_MODE 0 0 mmMC_HUB_WRRET_MCDX 0 0x87c 2 0 4294967295 CREDIT_COUNT 1 7 STALL_MODE 0 0 mmMC_HUB_WRRET_MCDY 0 0x87d 2 0 4294967295 CREDIT_COUNT 1 7 STALL_MODE 0 0 mmMC_HUB_WRRET_MCDZ 0 0x87e 2 0 4294967295 CREDIT_COUNT 1 7 STALL_MODE 0 0 mmMC_HUB_WRRET_STATUS 0 0x83a 4 0 4294967295 MCDW_AVAIL 0 0 MCDX_AVAIL 1 1 MCDY_AVAIL 2 2 MCDZ_AVAIL 3 3 mmMC_IMP_CNTL 0 0xa36 10 0 4294967295 CAL_PWRON 31 31 CAL_VREF 16 22 CAL_VREFMODE 6 6 CAL_VREF_SEL 5 5 CAL_WHEN_IDLE 29 29 CAL_WHEN_REFRESH 30 30 CLEAR_TIMEOUT_ERR 9 9 MEM_IO_SAMPLE_CNT 13 15 MEM_IO_UPDATE_RATE 0 4 TIMEOUT_ERR 8 8 mmMC_IMP_DEBUG 0 0xa37 7 0 4294967295 DEBUG_CAL_DONE 31 31 DEBUG_CAL_EN 28 28 DEBUG_CAL_INTR 30 30 DEBUG_CAL_START 29 29 PMVCAL_RESERVED 16 27 TIMEOUT_CNTR 8 15 TSTARTUP_CNTR 0 7 mmMC_IMP_DQ_STATUS 0 0xabc 4 0 4294967295 CH0_DQ_NSTR 8 15 CH0_DQ_PSTR 0 7 CH1_DQ_NSTR 24 31 CH1_DQ_PSTR 16 23 mmMC_IMP_STATUS 0 0xa38 4 0 4294967295 NSTR_ACCUM_VAL 24 31 NSTR_CAL 16 23 PSTR_ACCUM_VAL 8 15 PSTR_CAL 0 7 mmMC_IO_APHY_STR_CNTL_D0 0 0xa97 8 0 4294967295 CAL_SEL 26 27 LOAD_A_STR 28 28 LOAD_D_RD_STR 29 29 NSTR_OFF_A 6 11 PSTR_OFF_A 0 5 PSTR_OFF_D_RD 12 17 USE_A_CAL 24 24 USE_D_RD_CAL 25 25 mmMC_IO_APHY_STR_CNTL_D1 0 0xa98 8 0 4294967295 CAL_SEL 26 27 LOAD_A_STR 28 28 LOAD_D_RD_STR 29 29 NSTR_OFF_A 6 11 PSTR_OFF_A 0 5 PSTR_OFF_D_RD 12 17 USE_A_CAL 24 24 USE_D_RD_CAL 25 25 mmMC_IO_CDRCNTL1_D0 0 0xadd 4 0 4294967295 DQ_RXPHASE_B0 0 7 DQ_RXPHASE_B1 8 15 WCDR_TXPHASE_B0 16 23 WCDR_TXPHASE_B1 24 31 mmMC_IO_CDRCNTL1_D1 0 0xade 4 0 4294967295 DQ_RXPHASE_B0 0 7 DQ_RXPHASE_B1 8 15 WCDR_TXPHASE_B0 16 23 WCDR_TXPHASE_B1 24 31 mmMC_IO_CDRCNTL2_D0 0 0xae4 8 0 4294967295 CDR_FB_SEL0 0 0 CDR_FB_SEL1 1 1 EDC_RXEN_OVR0 2 2 EDC_RXEN_OVR1 3 3 TXCDRBYPASS0 4 4 TXCDRBYPASS1 5 5 WCK_RXEN_OVR0 6 6 WCK_RXEN_OVR1 7 7 mmMC_IO_CDRCNTL2_D1 0 0xae5 8 0 4294967295 CDR_FB_SEL0 0 0 CDR_FB_SEL1 1 1 EDC_RXEN_OVR0 2 2 EDC_RXEN_OVR1 3 3 TXCDRBYPASS0 4 4 TXCDRBYPASS1 5 5 WCK_RXEN_OVR0 6 6 WCK_RXEN_OVR1 7 7 mmMC_IO_CDRCNTL_D0 0 0xa55 20 0 4294967295 DQRXCDREN_B0 22 22 DQRXCDREN_B1 23 23 DQRXSEL_B0 28 28 DQRXSEL_B1 29 29 DQTXCDREN_B0 20 20 DQTXCDREN_B1 21 21 DQTXSEL_B0 30 30 DQTXSEL_B1 31 31 RXCDRBYPASS_B01 10 10 RXCDRBYPASS_B23 11 11 RXCDREN_B01 8 8 RXCDREN_B23 9 9 RXPHASE1_B01 12 15 RXPHASE1_B23 16 19 RXPHASE_B01 0 3 RXPHASE_B23 4 7 WCDREDC_B0 26 26 WCDREDC_B1 27 27 WCDRRXCDREN_B0 24 24 WCDRRXCDREN_B1 25 25 mmMC_IO_CDRCNTL_D1 0 0xa56 20 0 4294967295 DQRXCDREN_B0 22 22 DQRXCDREN_B1 23 23 DQRXSEL_B0 28 28 DQRXSEL_B1 29 29 DQTXCDREN_B0 20 20 DQTXCDREN_B1 21 21 DQTXSEL_B0 30 30 DQTXSEL_B1 31 31 RXCDRBYPASS_B01 10 10 RXCDRBYPASS_B23 11 11 RXCDREN_B01 8 8 RXCDREN_B23 9 9 RXPHASE1_B01 12 15 RXPHASE1_B23 16 19 RXPHASE_B01 0 3 RXPHASE_B23 4 7 WCDREDC_B0 26 26 WCDREDC_B1 27 27 WCDRRXCDREN_B0 24 24 WCDRRXCDREN_B1 25 25 mmMC_IO_DPHY_STR_CNTL_D0 0 0xa4e 9 0 4294967295 CAL_SEL 26 27 LOAD_D_STR 28 28 LOAD_S_STR 29 29 NSTR_OFF_D 6 11 NSTR_OFF_S 18 23 PSTR_OFF_D 0 5 PSTR_OFF_S 12 17 USE_D_CAL 24 24 USE_S_CAL 25 25 mmMC_IO_DPHY_STR_CNTL_D1 0 0xa54 9 0 4294967295 CAL_SEL 26 27 LOAD_D_STR 28 28 LOAD_S_STR 29 29 NSTR_OFF_D 6 11 NSTR_OFF_S 18 23 PSTR_OFF_D 0 5 PSTR_OFF_S 12 17 USE_D_CAL 24 24 USE_S_CAL 25 25 mmMC_IO_PAD_CNTL 0 0xa73 10 0 4294967295 ATBEN 24 29 ATBSEL_D0 31 31 ATBSEL_D1 30 30 ATBSEL 20 23 MEM_IO_IMP_MAX 8 15 MEM_IO_IMP_MIN 0 7 OVL_YCLKON_D0 18 18 OVL_YCLKON_D1 19 19 RXPHASE_GRAY 17 17 TXPHASE_GRAY 16 16 mmMC_IO_PAD_CNTL_D0 0 0xa74 21 0 4294967295 CK_AUTO_EN 20 20 CK_DELAY_N 22 23 CK_DELAY_P 24 25 CK_DELAY_SEL 21 21 DELAY_ADR_SYNC 4 4 DELAY_CLK_SYNC 2 2 DELAY_CMD_SYNC 3 3 DIFF_STR 29 29 DISABLE_ADR 13 13 DISABLE_CMD 12 12 EN_RD_STR_DLY 11 11 FORCE_EN_RD_STR 10 10 GDDR_PWRON 30 30 MEM_FALL_OUT_ADR 9 9 MEM_FALL_OUT_CLK 7 7 MEM_FALL_OUT_CMD 8 8 TXPWROFF_CKE 27 27 TXPWROFF_CLK 31 31 UNI_STR 28 28 VREFI_EN 14 14 VREFI_SEL 15 19 mmMC_IO_PAD_CNTL_D1 0 0xa75 25 0 4294967295 CK_AUTO_EN 20 20 CK_DELAY_N 22 23 CK_DELAY_P 24 25 CK_DELAY_SEL 21 21 DELAY_ADR_SYNC 4 4 DELAY_CLK_SYNC 2 2 DELAY_CMD_SYNC 3 3 DELAY_DATA_SYNC 0 0 DELAY_STR_SYNC 1 1 DIFF_STR 29 29 DISABLE_ADR 13 13 DISABLE_CMD 12 12 EN_RD_STR_DLY 11 11 FORCE_EN_RD_STR 10 10 GDDR_PWRON 30 30 MEM_FALL_OUT_ADR 9 9 MEM_FALL_OUT_CLK 7 7 MEM_FALL_OUT_CMD 8 8 MEM_FALL_OUT_DATA 5 5 MEM_FALL_OUT_STR 6 6 TXPWROFF_CKE 27 27 TXPWROFF_CLK 31 31 UNI_STR 28 28 VREFI_EN 14 14 VREFI_SEL 15 19 mmMC_IO_RXCNTL1_DPHY0_D0 0 0xadf 8 0 4294967295 DLL_RSV 28 31 PMD_LOOPBACK 25 27 VREFCAL1_MSB 0 3 VREFCAL2_MSB 4 7 VREFCAL3 8 15 VREFPDNB_1 18 18 VREFSEL2 16 16 VREFSEL3 17 17 mmMC_IO_RXCNTL1_DPHY0_D1 0 0xae1 8 0 4294967295 DLL_RSV 28 31 PMD_LOOPBACK 25 27 VREFCAL1_MSB 0 3 VREFCAL2_MSB 4 7 VREFCAL3 8 15 VREFPDNB_1 18 18 VREFSEL2 16 16 VREFSEL3 17 17 mmMC_IO_RXCNTL1_DPHY1_D0 0 0xae0 8 0 4294967295 DLL_RSV 28 31 PMD_LOOPBACK 25 27 VREFCAL1_MSB 0 3 VREFCAL2_MSB 4 7 VREFCAL3 8 15 VREFPDNB_1 18 18 VREFSEL2 16 16 VREFSEL3 17 17 mmMC_IO_RXCNTL1_DPHY1_D1 0 0xae2 8 0 4294967295 DLL_RSV 28 31 PMD_LOOPBACK 25 27 VREFCAL1_MSB 0 3 VREFCAL2_MSB 4 7 VREFCAL3 8 15 VREFPDNB_1 18 18 VREFSEL2 16 16 VREFSEL3 17 17 mmMC_IO_RXCNTL_DPHY0_D0 0 0xa4c 15 0 4294967295 DLL_ADJ_B0 20 22 DLL_ADJ_B1 24 26 DLL_ADJ_M 28 28 DLL_BW_CTRL 30 31 RCVSEL 2 2 REFCLK_PWRON 29 29 RXBIASSEL 0 1 RXDPWRON_DLY 4 5 RXLP 7 7 RXPDNB 6 6 RX_PEAKSEL 18 19 VREFCAL 8 11 VREFCAL_STR 12 15 VREFPDNB 3 3 VREFSEL 16 16 mmMC_IO_RXCNTL_DPHY0_D1 0 0xa52 15 0 4294967295 DLL_ADJ_B0 20 22 DLL_ADJ_B1 24 26 DLL_ADJ_M 28 28 DLL_BW_CTRL 30 31 RCVSEL 2 2 REFCLK_PWRON 29 29 RXBIASSEL 0 1 RXDPWRON_DLY 4 5 RXLP 7 7 RXPDNB 6 6 RX_PEAKSEL 18 19 VREFCAL 8 11 VREFCAL_STR 12 15 VREFPDNB 3 3 VREFSEL 16 16 mmMC_IO_RXCNTL_DPHY1_D0 0 0xa4d 15 0 4294967295 DLL_ADJ_B0 20 22 DLL_ADJ_B1 24 26 DLL_ADJ_M 28 28 DLL_BW_CTRL 30 31 RCVSEL 2 2 REFCLK_PWRON 29 29 RXBIASSEL 0 1 RXDPWRON_DLY 4 5 RXLP 7 7 RXPDNB 6 6 RX_PEAKSEL 18 19 VREFCAL 8 11 VREFCAL_STR 12 15 VREFPDNB 3 3 VREFSEL 16 16 mmMC_IO_RXCNTL_DPHY1_D1 0 0xa53 15 0 4294967295 DLL_ADJ_B0 20 22 DLL_ADJ_B1 24 26 DLL_ADJ_M 28 28 DLL_BW_CTRL 30 31 RCVSEL 2 2 REFCLK_PWRON 29 29 RXBIASSEL 0 1 RXDPWRON_DLY 4 5 RXLP 7 7 RXPDNB 6 6 RX_PEAKSEL 18 19 VREFCAL 8 11 VREFCAL_STR 12 15 VREFPDNB 3 3 VREFSEL 16 16 mmMC_IO_TXCNTL_APHY_D0 0 0xa4b 18 0 4294967295 BIASSEL 0 1 CKE_BIT 30 30 CKE_SEL 31 31 DRVDUTY 2 3 EMPH 6 6 LOWCMEN 4 4 NDRV 20 22 PDRV 16 19 PMA_LOOPBACK 13 15 PTERM 8 11 QDR 5 5 TSTEN 24 24 TXBPASS_SEL 12 12 TXBYPASS_DATA 27 29 TXBYPASS 26 26 TXPD 7 7 TXRESET 25 25 YCLKON 23 23 mmMC_IO_TXCNTL_APHY_D1 0 0xa51 18 0 4294967295 BIASSEL 0 1 CKE_BIT 30 30 CKE_SEL 31 31 DRVDUTY 2 3 EMPH 6 6 LOWCMEN 4 4 NDRV 20 22 PDRV 16 19 PMA_LOOPBACK 13 15 PTERM 8 11 QDR 5 5 TSTEN 24 24 TXBPASS_SEL 12 12 TXBYPASS_DATA 27 29 TXBYPASS 26 26 TXPD 7 7 TXRESET 25 25 YCLKON 23 23 mmMC_IO_TXCNTL_DPHY0_D0 0 0xa49 15 0 4294967295 BIASSEL 0 1 DRVDUTY 2 3 EDCTX_CLKGATE_EN 25 25 EMPH 6 6 LOWCMEN 4 4 NDRV 20 23 NTERM 12 15 PDRV 16 19 PLL_LOOPBCK 27 27 PTERM 8 11 QDR 5 5 TSTEN 24 24 TXBYPASS_DATA 28 31 TXBYPASS 26 26 TXPD 7 7 mmMC_IO_TXCNTL_DPHY0_D1 0 0xa4f 15 0 4294967295 BIASSEL 0 1 DRVDUTY 2 3 EDCTX_CLKGATE_EN 25 25 EMPH 6 6 LOWCMEN 4 4 NDRV 20 23 NTERM 12 15 PDRV 16 19 PLL_LOOPBCK 27 27 PTERM 8 11 QDR 5 5 TSTEN 24 24 TXBYPASS_DATA 28 31 TXBYPASS 26 26 TXPD 7 7 mmMC_IO_TXCNTL_DPHY1_D0 0 0xa4a 15 0 4294967295 BIASSEL 0 1 DRVDUTY 2 3 EDCTX_CLKGATE_EN 25 25 EMPH 6 6 LOWCMEN 4 4 NDRV 20 23 NTERM 12 15 PDRV 16 19 PLL_LOOPBCK 27 27 PTERM 8 11 QDR 5 5 TSTEN 24 24 TXBYPASS_DATA 28 31 TXBYPASS 26 26 TXPD 7 7 mmMC_IO_TXCNTL_DPHY1_D1 0 0xa50 15 0 4294967295 BIASSEL 0 1 DRVDUTY 2 3 EDCTX_CLKGATE_EN 25 25 EMPH 6 6 LOWCMEN 4 4 NDRV 20 23 NTERM 12 15 PDRV 16 19 PLL_LOOPBCK 27 27 PTERM 8 11 QDR 5 5 TSTEN 24 24 TXBYPASS_DATA 28 31 TXBYPASS 26 26 TXPD 7 7 mmMCLK_PWRMGT_CNTL 0 0xae8 8 0 4294967295 DLL_READY 6 6 DLL_READY_READ 24 24 DLL_SPEED 0 4 MC_INT_CNTL 7 7 MRDCK0_PDNB 8 8 MRDCK0_RESET 16 16 MRDCK1_PDNB 9 9 MRDCK1_RESET 17 17 mmMC_MEM_POWER_LS 0 0x82a 2 0 4294967295 LS_HOLD 6 11 LS_SETUP 0 5 mmMC_NPL_STATUS 0 0xa76 8 0 4294967295 D0_NDELAY 2 3 D0_NEARLY 5 5 D0_PDELAY 0 1 D0_PEARLY 4 4 D1_NDELAY 8 9 D1_NEARLY 11 11 D1_PDELAY 6 7 D1_PEARLY 10 10 mmMC_PHY_TIMING_2 0 0xace 14 0 4294967295 ADR_CLKEN_D0 18 18 ADR_CLKEN_D1 19 19 IND_LD_CNT 0 6 RXC0_FRC 12 12 RXC0_INV 8 8 RXC1_FRC 13 13 RXC1_INV 9 9 TXC0_FRC 14 14 TXC0_INV 10 10 TXC1_FRC 15 15 TXC1_INV 11 11 TX_CDREN_D0 16 16 TX_CDREN_D1 17 17 WR_DLY 20 23 mmMC_PHY_TIMING_D0 0 0xacc 8 0 4294967295 RXC0_DLY 0 3 RXC0_EXT 4 7 RXC1_DLY 8 11 RXC1_EXT 12 15 TXC0_DLY 16 18 TXC0_EXT 20 23 TXC1_DLY 24 26 TXC1_EXT 28 31 mmMC_PHY_TIMING_D1 0 0xacd 8 0 4294967295 RXC0_DLY 0 3 RXC0_EXT 4 7 RXC1_DLY 8 11 RXC1_EXT 12 15 TXC0_DLY 16 18 TXC0_EXT 20 23 TXC1_DLY 24 26 TXC1_EXT 28 31 mmMC_PMG_AUTO_CFG 0 0xa35 18 0 4294967295 DLL_CNT 24 31 EXIT_ALLOW_STOP 11 11 MRS_WAIT_CNT 16 19 PREA_SRX 13 13 RFS_SRX 12 12 RST_MRS 1 1 RXPDNB 22 22 SCDS_MODE 10 10 SELFREFR_COMMIT_0 15 15 SELFREFR_COMMIT_1 23 23 SS_ALWAYS_SLF 8 8 SS_S_SLF 9 9 STUTTER_EN 14 14 SYC_CLK 0 0 TRI_MIO 2 2 WRITE_DURING_DLOCK 20 20 XSR_TMR 4 7 YCLK_ON 21 21 mmMC_PMG_AUTO_CMD 0 0xa34 3 0 4294967295 ADR 0 16 ADR_MSB0 29 29 ADR_MSB1 28 28 mmMC_PMG_CFG 0 0xa84 16 0 4294967295 DPM_WAKE 10 10 EARLY_ACK_ACPI 22 22 MRS_WAIT_CNT 16 19 PREA_SRX 13 13 RFS_SRX 12 12 RST_EMRS 2 2 RST_MRS1 8 8 RST_MRS2 9 9 RST_MRS 1 1 RXPDNB 25 25 SYC_CLK 0 0 TRI_MIO 3 3 WRITE_DURING_DLOCK 20 20 XSR_TMR 4 7 YCLK_ON 21 21 ZQCL_SEND 26 27 mmMC_PMG_CMD_EMRS 0 0xa83 7 0 4294967295 ADR 0 15 ADR_MSB0 29 29 ADR_MSB1 28 28 BNK_MSB 19 19 CSB 21 22 END 20 20 MOP 16 18 mmMC_PMG_CMD_MRS 0 0xaab 7 0 4294967295 ADR 0 15 ADR_MSB0 29 29 ADR_MSB1 28 28 BNK_MSB 19 19 CSB 21 22 END 20 20 MOP 16 18 mmMC_PMG_CMD_MRS1 0 0xad1 7 0 4294967295 ADR 0 15 ADR_MSB0 29 29 ADR_MSB1 28 28 BNK_MSB 19 19 CSB 21 22 END 20 20 MOP 16 18 mmMC_PMG_CMD_MRS2 0 0xad7 7 0 4294967295 ADR 0 15 ADR_MSB0 29 29 ADR_MSB1 28 28 BNK_MSB 19 19 CSB 21 22 END 20 20 MOP 16 18 mmMC_RD_CB 0 0x981 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAX_BURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_RD_DB 0 0x982 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAX_BURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_RD_GRP_EXT 0 0x978 2 0 4294967295 DBSTEN0 0 3 TC0 4 7 mmMC_RD_GRP_GFX 0 0x803 2 0 4294967295 CP 0 3 XDMAM 16 19 mmMC_RD_GRP_LCL 0 0x98a 5 0 4294967295 CB0 12 15 CBCMASK0 16 19 CBFMASK0 20 23 DB0 24 27 DBHTILE0 28 31 mmMC_RD_GRP_OTH 0 0x807 6 0 4294967295 HDP 8 11 SEM 12 15 UMC 16 19 UVD_EXT0 0 3 UVD_EXT1 24 27 UVD 20 23 mmMC_RD_GRP_SYS 0 0x805 7 0 4294967295 DMIF 12 15 MCIF 16 19 RLC 0 3 SMU 20 23 VCE 24 27 VCEU 28 31 VMC 4 7 mmMC_RD_HUB 0 0x985 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAX_BURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_RD_TC0 0 0x983 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAX_BURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_RD_TC1 0 0x984 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAX_BURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_RPB_ARB_CNTL 0 0x951 3 0 4294967295 ATC_SWITCH_NUM 16 23 RD_SWITCH_NUM 8 15 WR_SWITCH_NUM 0 7 mmMC_RPB_BIF_CNTL 0 0x952 2 0 4294967295 ARB_SWITCH_NUM 0 7 XPB_SWITCH_NUM 8 15 mmMC_RPB_CID_QUEUE_EX 0 0x95a 2 0 4294967295 OFFSET 1 5 START 0 0 mmMC_RPB_CID_QUEUE_EX_DATA 0 0x95b 2 0 4294967295 READ_ENTRIES 16 31 WRITE_ENTRIES 0 15 mmMC_RPB_CID_QUEUE_RD 0 0x957 3 0 4294967295 CLIENT_ID 0 7 READ_QUEUE 10 11 WRITE_QUEUE 8 9 mmMC_RPB_CID_QUEUE_WR 0 0x956 5 0 4294967295 CLIENT_ID 0 7 READ_QUEUE 11 12 UPDATE 13 13 UPDATE_MODE 8 8 WRITE_QUEUE 9 10 mmMC_RPB_CONF 0 0x94d 3 0 4294967295 RPB_RD_PCIE_ORDER 16 16 RPB_WR_PCIE_ORDER 17 17 XPB_PCIE_ORDER 15 15 mmMC_RPB_DBG1 0 0x94f 3 0 4294967295 DEBUG_BITS 20 31 RPB_BIF_OUTSTANDING_RD_32B 8 19 RPB_BIF_OUTSTANDING_RD 0 7 mmMC_RPB_EFF_CNTL 0 0x950 2 0 4294967295 RD_LAZY_TIMER 8 15 WR_LAZY_TIMER 0 7 mmMC_RPB_IF_CONF 0 0x94e 2 0 4294967295 OUTSTANDING_WRRET_ASK 8 15 RPB_BIF_CREDITS 0 7 mmMC_RPB_PERF_COUNTER_CNTL 0 0x958 9 0 4294967295 CLEAR_ALL_PERF_COUNTERS 3 3 CLEAR_SELECTED_PERF_COUNTER 2 2 ENABLE_PERF_COUNTERS 5 8 PERF_COUNTER_ASSIGN_0 9 13 PERF_COUNTER_ASSIGN_1 14 18 PERF_COUNTER_ASSIGN_2 19 23 PERF_COUNTER_ASSIGN_3 24 28 PERF_COUNTER_SELECT 0 1 STOP_ON_COUNTER_SATURATION 4 4 mmMC_RPB_PERF_COUNTER_STATUS 0 0x959 1 0 4294967295 PERFORMANCE_COUNTER_VALUE 0 31 mmMC_RPB_RD_SWITCH_CNTL 0 0x955 4 0 4294967295 QUEUE0_SWITCH_NUM 0 7 QUEUE1_SWITCH_NUM 8 15 QUEUE2_SWITCH_NUM 16 23 QUEUE3_SWITCH_NUM 24 31 mmMC_RPB_WR_COMBINE_CNTL 0 0x954 4 0 4294967295 WC_ALIGN 7 7 WC_ENABLE 0 0 WC_FLUSH_TIMER 3 6 WC_MAX_PACKET_SIZE 1 2 mmMC_RPB_WR_SWITCH_CNTL 0 0x953 4 0 4294967295 QUEUE0_SWITCH_NUM 0 7 QUEUE1_SWITCH_NUM 8 15 QUEUE2_SWITCH_NUM 16 23 QUEUE3_SWITCH_NUM 24 31 mmMC_SEQ_BIT_REMAP_B0_D0 0 0xaa3 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B0_D1 0 0xaa7 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B1_D0 0 0xaa4 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B1_D1 0 0xaa8 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B2_D0 0 0xaa5 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B2_D1 0 0xaa9 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B3_D0 0 0xaa6 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B3_D1 0 0xaaa 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BYTE_REMAP_D0 0 0xa93 4 0 4294967295 BYTE0 0 1 BYTE1 2 3 BYTE2 4 5 BYTE3 6 7 mmMC_SEQ_BYTE_REMAP_D1 0 0xa94 4 0 4294967295 BYTE0 0 1 BYTE1 2 3 BYTE2 4 5 BYTE3 6 7 mmMC_SEQ_CAS_TIMING 0 0xa29 7 0 4294967295 TCCDL 9 11 TCL 24 28 TNOPR 2 3 TNOPW 0 1 TR2R 12 15 TR2W 4 8 TW2R 16 20 mmMC_SEQ_CAS_TIMING_LP 0 0xa9c 7 0 4294967295 TCCDL 9 11 TCL 24 28 TNOPR 2 3 TNOPW 0 1 TR2R 12 15 TR2W 4 8 TW2R 16 20 mmMC_SEQ_CG 0 0xa9a 4 0 4294967295 CG_SEQ_REQ 0 7 CG_SEQ_RESP 8 15 SEQ_CG_REQ 16 23 SEQ_CG_RESP 24 31 mmMC_SEQ_CMD 0 0xa31 8 0 4294967295 ADR 0 15 ADR_MSB0 29 29 ADR_MSB1 28 28 CHAN0 24 24 CHAN1 25 25 CSB 21 22 END 20 20 MOP 16 19 mmMC_SEQ_CNTL 0 0xa25 15 0 4294967295 ARB_REQCMD_WMK 20 23 ARB_REQDAT_WMK 24 27 ARB_RTDAT_WMK 28 31 BANKGROUP_ENB 18 18 BANKGROUP_SIZE 17 17 CHANNEL_DISABLE 8 9 DAT_INV 6 6 MEM_ADDR_MAP_BANK 2 3 MEM_ADDR_MAP_COLS 0 1 MSK_DF1 7 7 MSKOFF_DAT_TH 15 15 MSKOFF_DAT_TL 14 14 RET_HOLD_EOP 16 16 RTR_OVERRIDE 19 19 SAFE_MODE 4 5 mmMC_SEQ_CNTL_2 0 0xad4 7 0 4294967295 ARB_RTDAT_WMK_MSB 8 9 DRST_NSTR 10 15 DRST_PSTR 16 21 PLL_RX_PWRON_D0 24 27 PLL_RX_PWRON_D1 28 31 PLL_TX_PWRON_D0 22 22 PLL_TX_PWRON_D1 23 23 mmMC_SEQ_DRAM 0 0xa26 21 0 4294967295 ADR_2CK 0 0 ADR_DF1 2 2 ADR_MUX 1 1 AP8 3 3 BO4 14 14 CKE_ACT 13 13 CKE_DYN 12 12 DAT_DF1 4 4 DAT_INV 24 24 DLL_CLR 15 15 DLL_CNT 16 23 DQM_ACT 7 7 DQM_DF1 6 6 DQS_DF1 5 5 INV_ACM 25 25 ODT_ACT 27 27 ODT_ENB 26 26 RST_CTL 28 28 STB_CNT 8 11 TRI_CKE 30 30 TRI_MIO_DYN 29 29 mmMC_SEQ_DRAM_2 0 0xa27 25 0 4294967295 ADBI_ACT 26 26 ADBI_DF1 25 25 ADR_DBI_ACM 2 2 ADR_DBI 1 1 ADR_DDR 0 0 BNK_MRS 13 13 CMD_QDR 3 3 CS_BY16 31 31 DAT_QDR 4 4 DBI_ACT 28 28 DBI_DF1 27 27 DBI_EDC_DF1 29 29 DBI_OVR 14 14 DLL_EST 12 12 DQM_EST 7 7 PCH_BNK 24 24 PLL_CLR 11 11 PLL_CNT 16 23 PLL_EST 10 10 RDAT_EDC 6 6 RD_DQS 8 8 TESTCHIP_EN 30 30 TRI_CLK 15 15 WDAT_EDC 5 5 WR_DQS 9 9 mmMC_SEQ_DRAM_ERROR_INSERTION 0 0xacb 2 0 4294967295 RX 16 31 TX 0 15 mmMC_SEQ_FIFO_CTL 0 0xa57 10 0 4294967295 CG_DIS_D0 8 8 CG_DIS_D1 9 9 R_LD_INIT 4 5 R_SYC_SEL 6 7 SYC_DLY 12 14 W_ASYC_EXT 16 17 W_DSYC_EXT 18 19 W_LD_INIT_D0 0 1 W_LD_INIT_D1 10 11 W_SYC_SEL 2 3 mmMC_SEQ_IO_DEBUG_DATA 0 0xa92 1 0 4294967295 IO_DEBUG_DATA 0 31 mmMC_SEQ_IO_DEBUG_INDEX 0 0xa91 1 0 4294967295 IO_DEBUG_INDEX 0 8 mmMC_SEQ_IO_RDBI 0 0xab4 1 0 4294967295 MASK 0 31 mmMC_SEQ_IO_REDC 0 0xab5 1 0 4294967295 EDC 0 31 mmMC_SEQ_IO_RESERVE_D0 0 0xab7 3 0 4294967295 APHY_RSV 24 31 DPHY0_RSV 0 11 DPHY1_RSV 12 23 mmMC_SEQ_IO_RESERVE_D1 0 0xab8 3 0 4294967295 APHY_RSV 24 31 DPHY0_RSV 0 11 DPHY1_RSV 12 23 mmMC_SEQ_IO_RWORD0 0 0xaac 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD1 0 0xaad 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD2 0 0xaae 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD3 0 0xaaf 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD4 0 0xab0 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD5 0 0xab1 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD6 0 0xab2 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD7 0 0xab3 1 0 4294967295 RDATA 0 31 mmMC_SEQ_MISC0 0 0xa80 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC1 0 0xa81 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC3 0 0xa8b 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC4 0 0xa8c 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC5 0 0xa95 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC6 0 0xa96 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC7 0 0xa99 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC8 0 0xa5f 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC9 0 0xae7 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC_TIMING 0 0xa2a 4 0 4294967295 TRFC 20 28 TRP 15 19 TRP_RDA 8 13 TRP_WRA 0 5 mmMC_SEQ_MISC_TIMING2 0 0xa2b 7 0 4294967295 FAW 8 12 PA2RDATA 0 2 PA2WDATA 4 6 T32AW 21 24 TREDC 13 15 TWDATATR 28 31 TWEDC 16 20 mmMC_SEQ_MISC_TIMING2_LP 0 0xa9e 8 0 4294967295 FAW 8 12 PA2RDATA 0 2 PA2WDATA 4 6 TADR 21 23 TFCKTR 24 27 TREDC 13 15 TWDATATR 28 31 TWEDC 16 20 mmMC_SEQ_MISC_TIMING_LP 0 0xa9d 4 0 4294967295 TRFC 20 28 TRP 15 19 TRP_RDA 8 13 TRP_WRA 0 5 mmMC_SEQ_MPLL_OVERRIDE 0 0xa22 8 0 4294967295 AD_PLL_RESET_OVERRIDE 0 0 ATGM_CLK_SEL_OVERRIDE 5 5 DQ_0_0_PLL_RESET_OVERRIDE 1 1 DQ_0_1_PLL_RESET_OVERRIDE 2 2 DQ_1_0_PLL_RESET_OVERRIDE 3 3 DQ_1_1_PLL_RESET_OVERRIDE 4 4 TEST_BYPASS_CLK_EN_OVERRIDE 6 6 TEST_BYPASS_CLK_SEL_OVERRIDE 7 7 mmMC_SEQ_PERF_CNTL 0 0xa77 2 0 4294967295 CNTL 30 31 MONITOR_PERIOD 0 29 mmMC_SEQ_PERF_CNTL_1 0 0xafd 9 0 4294967295 PAUSE 0 0 SEL_A_MSB 8 8 SEL_B_MSB 9 9 SEL_CH0_C_MSB 10 10 SEL_CH0_D_MSB 11 11 SEL_CH1_A_MSB 12 12 SEL_CH1_B_MSB 13 13 SEL_CH1_C_MSB 14 14 SEL_CH1_D_MSB 15 15 mmMC_SEQ_PERF_SEQ_CNT_A_I0 0 0xa79 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_A_I1 0 0xa7a 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_B_I0 0 0xa7b 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_B_I1 0 0xa7c 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_C_I0 0 0xad9 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_C_I1 0 0xada 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_D_I0 0 0xadb 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_D_I1 0 0xadc 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CTL 0 0xa78 8 0 4294967295 SEL_A 0 3 SEL_B 4 7 SEL_CH0_C 8 11 SEL_CH0_D 12 15 SEL_CH1_A 16 19 SEL_CH1_B 20 23 SEL_CH1_C 24 27 SEL_CH1_D 28 31 mmMC_SEQ_PMG_CMD_EMRS_LP 0 0xaa1 7 0 4294967295 ADR 0 15 ADR_MSB0 29 29 ADR_MSB1 28 28 BNK_MSB 19 19 CSB 21 22 END 20 20 MOP 16 18 mmMC_SEQ_PMG_CMD_MRS1_LP 0 0xad2 7 0 4294967295 ADR 0 15 ADR_MSB0 29 29 ADR_MSB1 28 28 BNK_MSB 19 19 CSB 21 22 END 20 20 MOP 16 18 mmMC_SEQ_PMG_CMD_MRS2_LP 0 0xad8 7 0 4294967295 ADR 0 15 ADR_MSB0 29 29 ADR_MSB1 28 28 BNK_MSB 19 19 CSB 21 22 END 20 20 MOP 16 18 mmMC_SEQ_PMG_CMD_MRS_LP 0 0xaa2 7 0 4294967295 ADR 0 15 ADR_MSB0 29 29 ADR_MSB1 28 28 BNK_MSB 19 19 CSB 21 22 END 20 20 MOP 16 18 mmMC_SEQ_PMG_PG_HWCNTL 0 0xab9 9 0 4294967295 ACAO 18 18 AC_DLY 8 9 D_DLY 6 7 G_DLY 10 13 PWRGATE_EN 0 0 RXAO 17 17 STAGGER_EN 1 1 TPGCG 2 5 TXAO 16 16 mmMC_SEQ_PMG_PG_SWCNTL_0 0 0xaba 18 0 4294967295 GMCON_SR_COMMIT 31 31 PMA0_AC_ENB 16 16 PMD0_DBI_RX_ENB 5 5 PMD0_DBI_TX_ENB 1 1 PMD0_DQ_RX_ENB 4 4 PMD0_DQ_TX_ENB 0 0 PMD0_EDC_RX_ENB 6 6 PMD0_EDC_TX_ENB 2 2 PMD0_WCLKX_RX_ENB 7 7 PMD0_WCLKX_TX_ENB 3 3 PMD1_DBI_RX_ENB 13 13 PMD1_DBI_TX_ENB 9 9 PMD1_DQ_RX_ENB 12 12 PMD1_DQ_TX_ENB 8 8 PMD1_EDC_RX_ENB 14 14 PMD1_EDC_TX_ENB 10 10 PMD1_WCLKX_RX_ENB 15 15 PMD1_WCLKX_TX_ENB 11 11 mmMC_SEQ_PMG_PG_SWCNTL_1 0 0xabb 18 0 4294967295 GMCON_SR_COMMIT 31 31 PMA1_AC_ENB 16 16 PMD2_DBI_RX_ENB 5 5 PMD2_DBI_TX_ENB 1 1 PMD2_DQ_RX_ENB 4 4 PMD2_DQ_TX_ENB 0 0 PMD2_EDC_RX_ENB 6 6 PMD2_EDC_TX_ENB 2 2 PMD2_WCLKX_RX_ENB 7 7 PMD2_WCLKX_TX_ENB 3 3 PMD3_DBI_RX_ENB 13 13 PMD3_DBI_TX_ENB 9 9 PMD3_DQ_RX_ENB 12 12 PMD3_DQ_TX_ENB 8 8 PMD3_EDC_RX_ENB 14 14 PMD3_EDC_TX_ENB 10 10 PMD3_WCLKX_RX_ENB 15 15 PMD3_WCLKX_TX_ENB 11 11 mmMC_SEQ_PMG_TIMING 0 0xa2c 7 0 4294967295 SEQ_IDLE 18 20 SEQ_IDLE_SS 24 31 TCKE 12 17 TCKE_PULSE 8 11 TCKE_PULSE_MSB 23 23 TCKSRE 0 2 TCKSRX 4 6 mmMC_SEQ_PMG_TIMING_LP 0 0xad3 7 0 4294967295 SEQ_IDLE 18 20 SEQ_IDLE_SS 24 31 TCKE 12 17 TCKE_PULSE 8 11 TCKE_PULSE_MSB 23 23 TCKSRE 0 2 TCKSRX 4 6 mmMC_SEQ_RAS_TIMING 0 0xa28 6 0 4294967295 TRCDRA 15 19 TRCDR 10 14 TRCDWA 5 9 TRCDW 0 4 TRC 24 30 TRRD 20 23 mmMC_SEQ_RAS_TIMING_LP 0 0xa9b 6 0 4294967295 TRCDRA 15 19 TRCDR 10 14 TRCDWA 5 9 TRCDW 0 4 TRC 24 30 TRRD 20 23 mmMC_SEQ_RD_CTL_D0 0 0xa2d 9 0 4294967295 RBS_DLY 20 24 RBS_WEDC_DLY 25 29 RCV_DLY 0 2 RCV_EXT 3 7 RST_HLD 12 15 RST_SEL 8 9 RXDPWRON_DLY 10 11 STR_PRE 16 16 STR_PST 17 17 mmMC_SEQ_RD_CTL_D0_LP 0 0xac7 9 0 4294967295 RBS_DLY 20 24 RBS_WEDC_DLY 25 29 RCV_DLY 0 2 RCV_EXT 3 7 RST_HLD 12 15 RST_SEL 8 9 RXDPWRON_DLY 10 11 STR_PRE 16 16 STR_PST 17 17 mmMC_SEQ_RD_CTL_D1 0 0xa2e 9 0 4294967295 RBS_DLY 20 24 RBS_WEDC_DLY 25 29 RCV_DLY 0 2 RCV_EXT 3 7 RST_HLD 12 15 RST_SEL 8 9 RXDPWRON_DLY 10 11 STR_PRE 16 16 STR_PST 17 17 mmMC_SEQ_RD_CTL_D1_LP 0 0xac8 9 0 4294967295 RBS_DLY 20 24 RBS_WEDC_DLY 25 29 RCV_DLY 0 2 RCV_EXT 3 7 RST_HLD 12 15 RST_SEL 8 9 RXDPWRON_DLY 10 11 STR_PRE 16 16 STR_PST 17 17 mmMC_SEQ_RESERVE_0_S 0 0xa1e 1 0 4294967295 SCLK_FIELD 0 31 mmMC_SEQ_RESERVE_1_S 0 0xa1f 1 0 4294967295 SCLK_FIELD 0 31 mmMC_SEQ_RESERVE_M 0 0xa82 1 0 4294967295 MCLK_FIELD 0 31 mmMC_SEQ_RXFRAMING_BYTE0_D0 0 0xa67 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE0_D1 0 0xa6d 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE1_D0 0 0xa68 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE1_D1 0 0xa6e 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE2_D0 0 0xa69 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE2_D1 0 0xa6f 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE3_D0 0 0xa6a 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE3_D1 0 0xa70 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_DBI_D0 0 0xa6b 4 0 4294967295 DBI0 0 3 DBI1 4 7 DBI2 8 11 DBI3 12 15 mmMC_SEQ_RXFRAMING_DBI_D1 0 0xa71 4 0 4294967295 DBI0 0 3 DBI1 4 7 DBI2 8 11 DBI3 12 15 mmMC_SEQ_RXFRAMING_EDC_D0 0 0xa6c 8 0 4294967295 EDC0 0 3 EDC1 4 7 EDC2 8 11 EDC3 12 15 WCDR0 16 19 WCDR1 20 23 WCDR2 24 27 WCDR3 28 31 mmMC_SEQ_RXFRAMING_EDC_D1 0 0xa72 8 0 4294967295 EDC0 0 3 EDC1 4 7 EDC2 8 11 EDC3 12 15 WCDR0 16 19 WCDR1 20 23 WCDR2 24 27 WCDR3 28 31 mmMC_SEQ_STATUS_M 0 0xa7d 18 0 4294967295 CMD_RDY_D0 2 2 CMD_RDY_D1 3 3 PMG_FSMSTATE 20 24 PMG_PWRSTATE 16 16 PWRUP_COMPL_D0 0 0 PWRUP_COMPL_D1 1 1 SEQ0_ARB_CMD_FIFO_EMPTY 8 8 SEQ0_BUSY_HYS 25 25 SEQ0_BUSY 14 14 SEQ0_RS_DATA_FIFO_FULL 12 12 SEQ1_ARB_CMD_FIFO_EMPTY 9 9 SEQ1_BUSY_HYS 26 26 SEQ1_BUSY 15 15 SEQ1_RS_DATA_FIFO_FULL 13 13 SLF_D0 4 4 SLF_D1 5 5 SS_SLF_D0 6 6 SS_SLF_D1 7 7 mmMC_SEQ_STATUS_S 0 0xa20 6 0 4294967295 SEQ0_ARB_CMD_FIFO_FULL 4 4 SEQ0_ARB_DATA_FIFO_FULL 0 0 SEQ0_RS_DATA_FIFO_EMPTY 8 8 SEQ1_ARB_CMD_FIFO_FULL 5 5 SEQ1_ARB_DATA_FIFO_FULL 1 1 SEQ1_RS_DATA_FIFO_EMPTY 9 9 mmMC_SEQ_SUP_CNTL 0 0xa32 9 0 4294967295 BKPT_CLEAR 7 7 FAST_WRITE 6 6 PGM_CHKSUM 23 31 PGM_READ 5 5 PGM_WRITE 4 4 RESET_PC 3 3 RUN 0 0 SINGLE_STEP 1 1 SW_WAKE 2 2 mmMC_SEQ_SUP_DEC_STAT 0 0xa88 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_GP0_STAT 0 0xa8f 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_GP1_STAT 0 0xa90 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_GP2_STAT 0 0xa85 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_GP3_STAT 0 0xa86 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_IR_STAT 0 0xa87 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_PGM 0 0xa33 1 0 4294967295 CNTL 0 31 mmMC_SEQ_SUP_PGM_STAT 0 0xa89 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_R_PGM 0 0xa8a 1 0 4294967295 PGM 0 31 mmMC_SEQ_TCG_CNTL 0 0xabd 18 0 4294967295 AREF_BOTH 26 26 AREF_LAST 25 25 BURST_NUM 19 21 DATA_CNT 12 15 DONE 31 31 ENABLE_D0 1 1 ENABLE_D1 2 2 FRAME_TRAIN 18 18 INFINITE_CMD 7 7 ISSUE_AREF 22 22 LOAD_FIFO 16 16 MOP 8 11 NFIFO 4 6 RESET 0 0 SHORT_LDFF 17 17 START 3 3 TXDBI_CNTL 23 23 VPTR_MASK 24 24 mmMC_SEQ_TIMER_RD 0 0xaca 1 0 4294967295 COUNTER 0 31 mmMC_SEQ_TIMER_WR 0 0xac9 1 0 4294967295 COUNTER 0 31 mmMC_SEQ_TRAIN_CAPTURE 0 0xa3e 26 0 4294967295 ALLOWSTOP0_WAKEUP 18 18 ALLOWSTOP1_WAKEUP 19 19 ALLOWSTOPB0_WAKEUP 21 21 ALLOWSTOPB1_WAKEUP 22 22 D0_ARF_WAKEUP 0 0 D0_CMD_FIFO_READY_WAKEUP 8 8 D0_DATA_FIFO_READY_WAKEUP 10 10 D0_IDLEH_WAKEUP 24 24 D0_REDC_WAKEUP 2 2 D0_WEDC_WAKEUP 4 4 D1_ARF_WAKEUP 1 1 D1_CMD_FIFO_READY_WAKEUP 9 9 D1_DATA_FIFO_READY_WAKEUP 11 11 D1_IDLEH_WAKEUP 25 25 D1_REDC_WAKEUP 3 3 D1_WEDC_WAKEUP 5 5 DPM_LPT_WAKEUP 23 23 DPM_WAKEUP 20 20 MCLK_FREQ_CHANGE_WAKEUP 6 6 PHY_PG_WAKEUP 26 26 RESERVE0_WAKEUP 13 13 SCLK_SRBM_READY_WAKEUP 7 7 SOFTWARE_WAKEUP_WAKEUP 12 12 TCG_DONE_WAKEUP 17 17 TIMER_DONE_WAKEUP 15 15 TSM_DONE_WAKEUP 14 14 mmMC_SEQ_TRAIN_EDC_THRESHOLD 0 0xa3b 2 0 4294967295 READ_EDC_THRESHOLD 16 31 WRITE_EDC_THRESHOLD 0 15 mmMC_SEQ_TRAIN_EDC_THRESHOLD2 0 0xafe 1 0 4294967295 THRESHOLD_PERIOD 0 31 mmMC_SEQ_TRAIN_EDC_THRESHOLD3 0 0xaff 7 0 4294967295 CH0_LINK_RETRAIN_IN_PROGRESS 8 8 CH0_LINK_RETRAIN_STATUS 0 0 CH1_LINK_RETRAIN_IN_PROGRESS 9 9 CH1_LINK_RETRAIN_STATUS 1 1 CLEAR_RETRAIN_STATUS 2 2 RETRAIN_MONITOR 4 5 RETRAIN_VBI 3 3 mmMC_SEQ_TRAIN_TIMING 0 0xa40 4 0 4294967295 TARF2T 5 9 TLD2LD 15 19 TT2ROW 10 14 TWT2RT 0 4 mmMC_SEQ_TRAIN_WAKEUP_CLEAR 0 0xa3f 27 0 4294967295 ALLOWSTOP0_WAKEUP 18 18 ALLOWSTOP1_WAKEUP 19 19 ALLOWSTOPB0_WAKEUP 21 21 ALLOWSTOPB1_WAKEUP 22 22 CLEARALL 16 16 D0_ARF_WAKEUP 0 0 D0_CMD_FIFO_READY_WAKEUP 8 8 D0_DATA_FIFO_READY_WAKEUP 10 10 D0_IDLEH_WAKEUP 24 24 D0_REDC_WAKEUP 2 2 D0_WEDC_WAKEUP 4 4 D1_ARF_WAKEUP 1 1 D1_CMD_FIFO_READY_WAKEUP 9 9 D1_DATA_FIFO_READY_WAKEUP 11 11 D1_IDLEH_WAKEUP 25 25 D1_REDC_WAKEUP 3 3 D1_WEDC_WAKEUP 5 5 DPM_LPT_WAKEUP 23 23 DPM_WAKEUP 20 20 MCLK_FREQ_CHANGE_WAKEUP 6 6 PHY_PG_WAKEUP 26 26 RESERVE0_WAKEUP 13 13 SCLK_SRBM_READY_WAKEUP 7 7 SOFTWARE_WAKEUP_WAKEUP 12 12 TCG_DONE_WAKEUP 17 17 TIMER_DONE_WAKEUP 15 15 TSM_DONE_WAKEUP 14 14 mmMC_SEQ_TRAIN_WAKEUP_CNTL 0 0xa3a 31 0 4294967295 AUTO_REFRESH_ADDR_TRAIN 8 8 AUTO_REFRESH_READ_TRAIN 10 10 AUTO_REFRESH_WAKEUP_EARLY 20 20 AUTO_REFRESH_WCK_TRAIN 9 9 AUTO_REFRESH_WRITE_TRAIN 11 11 BLOCK_ARB_RD_D0 24 24 BLOCK_ARB_RD_D1 26 26 BLOCK_ARB_WR_D0 25 25 BLOCK_ARB_WR_D1 27 27 BOOT_UP_ADDR_TRAIN 0 0 BOOT_UP_READ_TRAIN 2 2 BOOT_UP_WCK_TRAIN 1 1 BOOT_UP_WRITE_TRAIN 3 3 DISP_ASTOP_WAKEUP 29 29 READ_ECC_ADDR_TRAIN 16 16 READ_ECC_READ_TRAIN 18 18 READ_ECC_WCK_TRAIN 17 17 READ_ECC_WRITE_TRAIN 19 19 SELF_REFRESH_ADDR_TRAIN 4 4 SELF_REFRESH_READ_TRAIN 6 6 SELF_REFRESH_WCK_TRAIN 5 5 SELF_REFRESH_WRITE_TRAIN 7 7 STOP_WCK_D0 21 21 STOP_WCK_D1 22 22 SW_WAKEUP 28 28 TRAIN_DONE_D0 30 30 TRAIN_DONE_D1 31 31 WRITE_ECC_ADDR_TRAIN 12 12 WRITE_ECC_READ_TRAIN 14 14 WRITE_ECC_WCK_TRAIN 13 13 WRITE_ECC_WRITE_TRAIN 15 15 mmMC_SEQ_TRAIN_WAKEUP_EDGE 0 0xa3c 26 0 4294967295 ALLOWSTOP0_WAKEUP 18 18 ALLOWSTOP1_WAKEUP 19 19 ALLOWSTOPB0_WAKEUP 21 21 ALLOWSTOPB1_WAKEUP 22 22 D0_ARF_WAKEUP 0 0 D0_CMD_FIFO_READY_WAKEUP 8 8 D0_DATA_FIFO_READY_WAKEUP 10 10 D0_IDLEH_WAKEUP 24 24 D0_REDC_WAKEUP 2 2 D0_WEDC_WAKEUP 4 4 D1_ARF_WAKEUP 1 1 D1_CMD_FIFO_READY_WAKEUP 9 9 D1_DATA_FIFO_READY_WAKEUP 11 11 D1_IDLEH_WAKEUP 25 25 D1_REDC_WAKEUP 3 3 D1_WEDC_WAKEUP 5 5 DPM_LPT_WAKEUP 23 23 DPM_WAKEUP 20 20 MCLK_FREQ_CHANGE_WAKEUP 6 6 PHY_PG_WAKEUP 26 26 RESERVE0_WAKEUP 13 13 SCLK_SRBM_READY_WAKEUP 7 7 SOFTWARE_WAKEUP_WAKEUP 12 12 TCG_DONE_WAKEUP 17 17 TIMER_DONE_WAKEUP 15 15 TSM_DONE_WAKEUP 14 14 mmMC_SEQ_TRAIN_WAKEUP_MASK 0 0xa3d 26 0 4294967295 ALLOWSTOP0_WAKEUP 18 18 ALLOWSTOP1_WAKEUP 19 19 ALLOWSTOPB0_WAKEUP 21 21 ALLOWSTOPB1_WAKEUP 22 22 D0_ARF_WAKEUP 0 0 D0_CMD_FIFO_READY_WAKEUP 8 8 D0_DATA_FIFO_READY_WAKEUP 10 10 D0_IDLEH_WAKEUP 24 24 D0_REDC_WAKEUP 2 2 D0_WEDC_WAKEUP 4 4 D1_ARF_WAKEUP 1 1 D1_CMD_FIFO_READY_WAKEUP 9 9 D1_DATA_FIFO_READY_WAKEUP 11 11 D1_IDLEH_WAKEUP 25 25 D1_REDC_WAKEUP 3 3 D1_WEDC_WAKEUP 5 5 DPM_LPT_WAKEUP 23 23 DPM_WAKEUP 20 20 MCLK_FREQ_CHANGE_WAKEUP 6 6 PHY_PG_WAKEUP 26 26 RESERVE0_WAKEUP 13 13 SCLK_SRBM_READY_WAKEUP 7 7 SOFTWARE_WAKEUP_WAKEUP 12 12 TCG_DONE_WAKEUP 17 17 TIMER_DONE_WAKEUP 15 15 TSM_DONE_WAKEUP 14 14 mmMC_SEQ_TSM_BCNT 0 0xac2 5 0 4294967295 BCNT_TESTS 8 15 COMP_VALUE 16 23 DONE_TESTS 24 31 FALSE_ACT 4 7 TRUE_ACT 0 3 mmMC_SEQ_TSM_CTRL 0 0xabe 11 0 4294967295 CAPTURE_START 1 1 DIRECTION 5 5 DONE 2 2 ERR 3 3 INVERT 6 6 MASK_BITS 7 7 POINTER 16 31 ROT_INV 10 10 START 0 0 STEP 4 4 UPDATE_LOOP 8 9 mmMC_SEQ_TSM_DBI 0 0xac6 1 0 4294967295 DBI 0 31 mmMC_SEQ_TSM_DEBUG_DATA 0 0xad0 1 0 4294967295 TSM_DEBUG_DATA 0 31 mmMC_SEQ_TSM_DEBUG_INDEX 0 0xacf 1 0 4294967295 TSM_DEBUG_INDEX 0 4 mmMC_SEQ_TSM_EDC 0 0xac5 1 0 4294967295 EDC 0 31 mmMC_SEQ_TSM_FLAG 0 0xac3 5 0 4294967295 ERROR_TESTS 24 31 FALSE_ACT 4 7 FLAG_TESTS 8 15 NBBL_MASK 16 19 TRUE_ACT 0 3 mmMC_SEQ_TSM_GCNT 0 0xabf 4 0 4294967295 COMP_VALUE 16 31 FALSE_ACT 4 7 TESTS 8 15 TRUE_ACT 0 3 mmMC_SEQ_TSM_MISC 0 0xae6 2 0 4294967295 WCDR_MASK 16 19 WCDR_PTR 0 15 mmMC_SEQ_TSM_NCNT 0 0xac1 6 0 4294967295 FALSE_ACT 4 7 NIBBLE_SKIP 24 27 RANGE_HIGH 20 23 RANGE_LOW 16 19 TESTS 8 15 TRUE_ACT 0 3 mmMC_SEQ_TSM_OCNT 0 0xac0 4 0 4294967295 CMP_VALUE 16 31 FALSE_ACT 4 7 TESTS 8 15 TRUE_ACT 0 3 mmMC_SEQ_TSM_UPDATE 0 0xac4 5 0 4294967295 AREF_COUNT 16 23 CAPTR_TESTS 24 31 FALSE_ACT 4 7 TRUE_ACT 0 3 UPDT_TESTS 8 15 mmMC_SEQ_TSM_WCDR 0 0xae3 1 0 4294967295 WCDR 0 31 mmMC_SEQ_TXFRAMING_BYTE0_D0 0 0xa58 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE0_D1 0 0xa60 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE1_D0 0 0xa59 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE1_D1 0 0xa61 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE2_D0 0 0xa5a 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE2_D1 0 0xa62 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE3_D0 0 0xa5b 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE3_D1 0 0xa63 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_DBI_D0 0 0xa5c 4 0 4294967295 DBI0 0 3 DBI1 4 7 DBI2 8 11 DBI3 12 15 mmMC_SEQ_TXFRAMING_DBI_D1 0 0xa64 4 0 4294967295 DBI0 0 3 DBI1 4 7 DBI2 8 11 DBI3 12 15 mmMC_SEQ_TXFRAMING_EDC_D0 0 0xa5d 8 0 4294967295 EDC0 0 3 EDC1 4 7 EDC2 8 11 EDC3 12 15 WCDR0 16 19 WCDR1 20 23 WCDR2 24 27 WCDR3 28 31 mmMC_SEQ_TXFRAMING_EDC_D1 0 0xa65 8 0 4294967295 EDC0 0 3 EDC1 4 7 EDC2 8 11 EDC3 12 15 WCDR0 16 19 WCDR1 20 23 WCDR2 24 27 WCDR3 28 31 mmMC_SEQ_TXFRAMING_FCK_D0 0 0xa5e 4 0 4294967295 FCK0 0 3 FCK1 4 7 FCK2 8 11 FCK3 12 15 mmMC_SEQ_TXFRAMING_FCK_D1 0 0xa66 4 0 4294967295 FCK0 0 3 FCK1 4 7 FCK2 8 11 FCK3 12 15 mmMC_SEQ_VENDOR_ID_I0 0 0xa7e 1 0 4294967295 VALUE 0 31 mmMC_SEQ_VENDOR_ID_I1 0 0xa7f 1 0 4294967295 VALUE 0 31 mmMC_SEQ_WCDR_CTRL 0 0xa39 11 0 4294967295 AREF_EN 14 14 PRBS_EN 20 20 PRBS_RST 21 21 PREAMBLE 24 27 PRE_MASK 28 31 RD_EN 13 13 TRAIN_EN 15 15 TWCDRL 16 19 WCDR_PRE 0 7 WCDR_TIM 8 11 WR_EN 12 12 mmMC_SEQ_WR_CTL_2 0 0xad5 7 0 4294967295 DAT_DLY_H_D0 0 0 DAT_DLY_H_D1 3 3 DQS_DLY_H_D0 1 1 DQS_DLY_H_D1 4 4 OEN_DLY_H_D0 2 2 OEN_DLY_H_D1 5 5 WCDR_EN 6 6 mmMC_SEQ_WR_CTL_2_LP 0 0xad6 7 0 4294967295 DAT_DLY_H_D0 0 0 DAT_DLY_H_D1 3 3 DQS_DLY_H_D0 1 1 DQS_DLY_H_D1 4 4 OEN_DLY_H_D0 2 2 OEN_DLY_H_D1 5 5 WCDR_EN 6 6 mmMC_SEQ_WR_CTL_D0 0 0xa2f 13 0 4294967295 ADR_2Y_DLY 10 10 ADR_DLY 29 29 CMD_2Y_DLY 11 11 CMD_DLY 30 30 DAT_2Y_DLY 9 9 DAT_DLY 0 3 DQS_DLY 4 7 DQS_XTR 8 8 ODT_DLY 24 27 ODT_EXT 28 28 OEN_DLY 12 15 OEN_EXT 16 19 OEN_SEL 20 21 mmMC_SEQ_WR_CTL_D0_LP 0 0xa9f 13 0 4294967295 ADR_2Y_DLY 10 10 ADR_DLY 29 29 CMD_2Y_DLY 11 11 CMD_DLY 30 30 DAT_2Y_DLY 9 9 DAT_DLY 0 3 DQS_DLY 4 7 DQS_XTR 8 8 ODT_DLY 24 27 ODT_EXT 28 28 OEN_DLY 12 15 OEN_EXT 16 19 OEN_SEL 20 21 mmMC_SEQ_WR_CTL_D1 0 0xa30 13 0 4294967295 ADR_2Y_DLY 10 10 ADR_DLY 29 29 CMD_2Y_DLY 11 11 CMD_DLY 30 30 DAT_2Y_DLY 9 9 DAT_DLY 0 3 DQS_DLY 4 7 DQS_XTR 8 8 ODT_DLY 24 27 ODT_EXT 28 28 OEN_DLY 12 15 OEN_EXT 16 19 OEN_SEL 20 21 mmMC_SEQ_WR_CTL_D1_LP 0 0xaa0 13 0 4294967295 ADR_2Y_DLY 10 10 ADR_DLY 29 29 CMD_2Y_DLY 11 11 CMD_DLY 30 30 DAT_2Y_DLY 9 9 DAT_DLY 0 3 DQS_DLY 4 7 DQS_XTR 8 8 ODT_DLY 24 27 ODT_EXT 28 28 OEN_DLY 12 15 OEN_EXT 16 19 OEN_SEL 20 21 mmMC_SHARED_BLACKOUT_CNTL 0 0x82b 1 0 4294967295 BLACKOUT_MODE 0 2 mmMC_SHARED_CHMAP 0 0x801 4 0 4294967295 CHAN0 0 3 CHAN1 4 7 CHAN2 8 11 NOOFCHAN 12 15 mmMC_SHARED_CHREMAP 0 0x802 8 0 4294967295 CHAN0 0 2 CHAN1 3 5 CHAN2 6 8 CHAN3 9 11 CHAN4 12 14 CHAN5 15 17 CHAN6 18 20 CHAN7 21 23 mmMC_TRAIN_EDCCDR_R_D0 0 0xa41 4 0 4294967295 EDC0 0 7 EDC1 8 15 EDC2 16 23 EDC3 24 31 mmMC_TRAIN_EDCCDR_R_D1 0 0xa42 4 0 4294967295 EDC0 0 7 EDC1 8 15 EDC2 16 23 EDC3 24 31 mmMC_TRAIN_EDC_STATUS_D0 0 0xa45 2 0 4294967295 REDC_CNT 16 31 WEDC_CNT 0 15 mmMC_TRAIN_EDC_STATUS_D1 0 0xa48 2 0 4294967295 REDC_CNT 16 31 WEDC_CNT 0 15 mmMC_TRAIN_PRBSERR_0_D0 0 0xa43 1 0 4294967295 DQ_STATUS 0 31 mmMC_TRAIN_PRBSERR_0_D1 0 0xa46 1 0 4294967295 DQ_STATUS 0 31 mmMC_TRAIN_PRBSERR_1_D0 0 0xa44 7 0 4294967295 DBI_STATUS 0 3 EDC_STATUS 4 7 PMA_PRBSCLR 28 28 PMD0_PRBSCLR 29 29 PMD1_PRBSCLR 30 30 WCDR_STATUS 12 15 WCK_STATUS 8 11 mmMC_TRAIN_PRBSERR_1_D1 0 0xa47 7 0 4294967295 DBI_STATUS 0 3 EDC_STATUS 4 7 PMA_PRBSCLR 28 28 PMD0_PRBSCLR 29 29 PMD1_PRBSCLR 30 30 WCDR_STATUS 12 15 WCK_STATUS 8 11 mmMC_TRAIN_PRBSERR_2_D0 0 0xafb 9 0 4294967295 ABI_STATUS 28 28 ADDR_STATUS 16 25 CAS_STATUS 10 10 CKB_STATUS 1 1 CKE_STATUS 8 8 CK_STATUS 0 0 CS_STATUS 4 5 RAS_STATUS 9 9 WE_STATUS 11 11 mmMC_TRAIN_PRBSERR_2_D1 0 0xafc 9 0 4294967295 ABI_STATUS 28 28 ADDR_STATUS 16 25 CAS_STATUS 10 10 CKB_STATUS 1 1 CKE_STATUS 8 8 CK_STATUS 0 0 CS_STATUS 4 5 RAS_STATUS 9 9 WE_STATUS 11 11 mmMC_VM_AGP_BASE 0 0x80c 1 0 4294967295 AGP_BASE 0 17 mmMC_VM_AGP_BOT 0 0x80b 1 0 4294967295 AGP_BOT 0 17 mmMC_VM_AGP_TOP 0 0x80a 1 0 4294967295 AGP_TOP 0 17 mmMC_VM_DC_WRITE_CNTL 0 0x810 6 0 4294967295 DC_MEMORY_WRITE_LOCAL 8 8 DC_MEMORY_WRITE_SYSTEM 9 9 DC_WRITE_HIT_REGION_0_MODE 0 1 DC_WRITE_HIT_REGION_1_MODE 2 3 DC_WRITE_HIT_REGION_2_MODE 4 5 DC_WRITE_HIT_REGION_3_MODE 6 7 mmMC_VM_DC_WRITE_HIT_REGION_0_HIGH_ADDR 0 0x815 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_0_LOW_ADDR 0 0x811 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_1_HIGH_ADDR 0 0x816 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_1_LOW_ADDR 0 0x812 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_2_HIGH_ADDR 0 0x817 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_2_LOW_ADDR 0 0x813 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_3_HIGH_ADDR 0 0x818 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_3_LOW_ADDR 0 0x814 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_FB_LOCATION 0 0x809 2 0 4294967295 FB_BASE 0 15 FB_TOP 16 31 mmMC_VM_FB_OFFSET 0 0x81a 1 0 4294967295 FB_OFFSET 0 17 mmMC_VM_MB_L1_TLB0_DEBUG 0 0x891 5 0 4294967295 EFFECTIVE_L1_QUEUE_SIZE 12 14 EFFECTIVE_L1_TLB_SIZE 9 11 INVALIDATE_L1_TLB 0 0 L1_TLB_DEBUG 15 18 SEND_FREE_AT_RTN 8 8 mmMC_VM_MB_L1_TLB0_STATUS 0 0x895 1 0 4294967295 BUSY 0 0 mmMC_VM_MB_L1_TLB1_STATUS 0 0x896 1 0 4294967295 BUSY 0 0 mmMC_VM_MB_L1_TLB2_DEBUG 0 0x893 5 0 4294967295 EFFECTIVE_L1_QUEUE_SIZE 12 14 EFFECTIVE_L1_TLB_SIZE 9 11 INVALIDATE_L1_TLB 0 0 L1_TLB_DEBUG 15 18 SEND_FREE_AT_RTN 8 8 mmMC_VM_MB_L1_TLB2_STATUS 0 0x897 1 0 4294967295 BUSY 0 0 mmMC_VM_MB_L1_TLB3_DEBUG 0 0x8a5 5 0 4294967295 EFFECTIVE_L1_QUEUE_SIZE 12 14 EFFECTIVE_L1_TLB_SIZE 9 11 INVALIDATE_L1_TLB 0 0 L1_TLB_DEBUG 15 18 SEND_FREE_AT_RTN 8 8 mmMC_VM_MB_L1_TLB3_STATUS 0 0x8a6 1 0 4294967295 BUSY 0 0 mmMC_VM_MB_L2ARBITER_L2_CREDITS 0 0x8a1 1 0 4294967295 L2_IF_CREDITS 0 5 mmMC_VM_MD_L1_TLB0_DEBUG 0 0x998 5 0 4294967295 EFFECTIVE_L1_QUEUE_SIZE 12 14 EFFECTIVE_L1_TLB_SIZE 9 11 INVALIDATE_L1_TLB 0 0 L1_TLB_DEBUG 15 18 SEND_FREE_AT_RTN 8 8 mmMC_VM_MD_L1_TLB0_STATUS 0 0x99b 1 0 4294967295 BUSY 0 0 mmMC_VM_MD_L1_TLB1_DEBUG 0 0x999 5 0 4294967295 EFFECTIVE_L1_QUEUE_SIZE 12 14 EFFECTIVE_L1_TLB_SIZE 9 11 INVALIDATE_L1_TLB 0 0 L1_TLB_DEBUG 15 18 SEND_FREE_AT_RTN 8 8 mmMC_VM_MD_L1_TLB1_STATUS 0 0x99c 1 0 4294967295 BUSY 0 0 mmMC_VM_MD_L1_TLB2_DEBUG 0 0x99a 5 0 4294967295 EFFECTIVE_L1_QUEUE_SIZE 12 14 EFFECTIVE_L1_TLB_SIZE 9 11 INVALIDATE_L1_TLB 0 0 L1_TLB_DEBUG 15 18 SEND_FREE_AT_RTN 8 8 mmMC_VM_MD_L1_TLB2_STATUS 0 0x99d 1 0 4294967295 BUSY 0 0 mmMC_VM_MD_L1_TLB3_DEBUG 0 0x9a7 5 0 4294967295 EFFECTIVE_L1_QUEUE_SIZE 12 14 EFFECTIVE_L1_TLB_SIZE 9 11 INVALIDATE_L1_TLB 0 0 L1_TLB_DEBUG 15 18 SEND_FREE_AT_RTN 8 8 mmMC_VM_MD_L1_TLB3_STATUS 0 0x9a8 1 0 4294967295 BUSY 0 0 mmMC_VM_MD_L2ARBITER_L2_CREDITS 0 0x9a4 1 0 4294967295 L2_IF_CREDITS 0 5 mmMC_VM_MX_L1_TLB_CNTL 0 0x819 6 0 4294967295 ECO_BITS 7 10 ENABLE_ADVANCED_DRIVER_MODEL 6 6 ENABLE_L1_FRAGMENT_PROCESSING 1 1 ENABLE_L1_TLB 0 0 SYSTEM_ACCESS_MODE 3 4 SYSTEM_APERTURE_UNMAPPED_ACCESS 5 5 mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0 0x80f 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR 0 0x80e 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmMC_VM_SYSTEM_APERTURE_LOW_ADDR 0 0x80d 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmMC_WR_CB 0 0x986 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAX_BURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_WR_DB 0 0x987 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAX_BURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_WR_GRP_EXT 0 0x979 2 0 4294967295 DBSTEN0 0 3 TC0 4 7 mmMC_WR_GRP_GFX 0 0x804 3 0 4294967295 CP 0 3 XDMA 12 15 XDMAM 16 19 mmMC_WR_GRP_LCL 0 0x98b 7 0 4294967295 CB0 0 3 CBCMASK0 4 7 CBFMASK0 8 11 CBIMMED0 28 31 DB0 12 15 DBHTILE0 16 19 SX0 20 23 mmMC_WR_GRP_OTH 0 0x808 7 0 4294967295 HDP 8 11 SEM 12 15 UMC 16 19 UVD_EXT0 0 3 UVD_EXT1 28 31 UVD 20 23 XDP 24 27 mmMC_WR_GRP_SYS 0 0x806 6 0 4294967295 IH 0 3 MCIF 4 7 RLC 8 11 SMU 20 23 VCE 24 27 VCEU 28 31 mmMC_WR_HUB 0 0x988 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAX_BURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_WR_TC0 0 0x97b 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAX_BURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_WR_TC1 0 0x97c 8 0 4294967295 BLACKOUT_EXEMPT 3 3 ENABLE 0 0 LAZY_TIMER 11 14 MAX_BURST 7 10 PRESCALE 1 2 STALL_MODE 4 5 STALL_OVERRIDE 6 6 STALL_OVERRIDE_WTM 15 15 mmMC_XBAR_ADDR_DEC 0 0xc80 4 0 4294967295 GECC 1 1 NO_DIV_BY_3 0 0 RB_SPLIT_COLHI 3 3 RB_SPLIT 2 2 mmMC_XBAR_ARB 0 0xc8d 3 0 4294967295 BREAK_BURST_CID_CHANGE 2 2 DISABLE_HUB_STALL_HIGHEST 1 1 HUBRD_HIGHEST 0 0 mmMC_XBAR_ARB_MAX_BURST 0 0xc8e 8 0 4294967295 RD_PORT0 0 3 RD_PORT1 4 7 RD_PORT2 8 11 RD_PORT3 12 15 WR_PORT0 16 19 WR_PORT1 20 23 WR_PORT2 24 27 WR_PORT3 28 31 mmMC_XBAR_CHTRIREMAP 0 0xc8b 3 0 4294967295 CH0 0 1 CH1 2 3 CH2 4 5 mmMC_XBAR_PERF_MON_CNTL0 0 0xc8f 5 0 4294967295 ALLOW_WRAP 28 28 START_MODE 24 25 START_THRESH 0 11 STOP_MODE 26 27 STOP_THRESH 12 23 mmMC_XBAR_PERF_MON_CNTL1 0 0xc90 3 0 4294967295 START_TRIG_ID 8 15 STOP_TRIG_ID 16 23 THRESH_CNTR_ID 0 7 mmMC_XBAR_PERF_MON_CNTL2 0 0xc91 4 0 4294967295 MON0_ID 0 7 MON1_ID 8 15 MON2_ID 16 23 MON3_ID 24 31 mmMC_XBAR_PERF_MON_MAX_THSH 0 0xc96 4 0 4294967295 MON0 0 7 MON1 8 15 MON2 16 23 MON3 24 31 mmMC_XBAR_PERF_MON_RSLT0 0 0xc92 1 0 4294967295 COUNT 0 31 mmMC_XBAR_PERF_MON_RSLT1 0 0xc93 1 0 4294967295 COUNT 0 31 mmMC_XBAR_PERF_MON_RSLT2 0 0xc94 1 0 4294967295 COUNT 0 31 mmMC_XBAR_PERF_MON_RSLT3 0 0xc95 1 0 4294967295 COUNT 0 31 mmMC_XBAR_RDREQ_CREDIT 0 0xc83 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_RDREQ_PRI_CREDIT 0 0xc84 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_RDRET_CREDIT1 0 0xc87 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_RDRET_CREDIT2 0 0xc88 3 0 4294967295 HUB_LP_RDRET_SKID 16 23 OUT4 0 7 OUT5 8 15 mmMC_XBAR_RDRET_PRI_CREDIT1 0 0xc89 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_RDRET_PRI_CREDIT2 0 0xc8a 2 0 4294967295 OUT4 0 7 OUT5 8 15 mmMC_XBAR_REMOTE 0 0xc81 2 0 4294967295 RDREQ_EN_GOQ 1 1 WRREQ_EN_GOQ 0 0 mmMC_XBAR_SPARE0 0 0xc97 1 0 4294967295 BIT 0 31 mmMC_XBAR_SPARE1 0 0xc98 1 0 4294967295 BIT 0 31 mmMC_XBAR_TWOCHAN 0 0xc8c 3 0 4294967295 CH0 1 2 CH1 3 4 DISABLE_ONEPORT 0 0 mmMC_XBAR_WRREQ_CREDIT 0 0xc82 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_WRRET_CREDIT1 0 0xc85 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_WRRET_CREDIT2 0 0xc86 2 0 4294967295 OUT4 0 7 OUT5 8 15 mmMC_XPB_CLG_CFG0 0 0x8e9 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG10 0 0x8f3 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG1 0 0x8ea 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG11 0 0x8f4 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG12 0 0x8f5 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG13 0 0x8f6 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG14 0 0x8f7 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG15 0 0x8f8 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG16 0 0x8f9 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG17 0 0x8fa 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG18 0 0x8fb 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG19 0 0x8fc 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG20 0 0x928 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG2 0 0x8eb 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG21 0 0x929 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG22 0 0x92a 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG23 0 0x92b 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG24 0 0x92c 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG25 0 0x92d 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG26 0 0x92e 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG27 0 0x92f 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG28 0 0x930 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG29 0 0x931 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG30 0 0x932 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG3 0 0x8ec 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG31 0 0x933 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG32 0 0x936 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG33 0 0x937 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG34 0 0x938 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG35 0 0x939 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG36 0 0x93a 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG4 0 0x8ed 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG5 0 0x8ee 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG6 0 0x8ef 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG7 0 0x8f0 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG8 0 0x8f1 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_CFG9 0 0x8f2 5 0 4294967295 HOST_FLUSH 10 13 LB_TYPE 4 6 P2P_BAR 7 9 SIDE_FLUSH 14 17 WCB_NUM 0 3 mmMC_XPB_CLG_EXTRA 0 0x8fd 5 0 4294967295 CMP0 0 7 CMP1 17 24 MSK0 8 15 VLD0 16 16 VLD1 25 25 mmMC_XPB_CLG_EXTRA_RD 0 0x935 5 0 4294967295 CMP0 0 7 CMP1 17 24 MSK0 8 15 VLD0 16 16 VLD1 25 25 mmMC_XPB_CLK_GAT 0 0x91e 5 0 4294967295 ENABLE 18 18 MEM_LS_ENABLE 19 19 OFFDLY 6 11 ONDLY 0 5 RDYDLY 12 17 mmMC_XPB_INTF_CFG 0 0x91f 11 0 4294967295 BIF_MEM_SNOOP_SEL 25 25 BIF_MEM_SNOOP_VAL 26 26 BIF_REG_SNOOP_SEL 23 23 BIF_REG_SNOOP_VAL 24 24 MC_WRRET_ASK 8 15 RPB_WRREQ_CRD 0 7 XSP_ORDERING_SEL 30 30 XSP_ORDERING_VAL 31 31 XSP_REQ_CRD 16 22 XSP_SNOOP_SEL 27 28 XSP_SNOOP_VAL 29 29 mmMC_XPB_INTF_CFG2 0 0x934 1 0 4294967295 RPB_RDREQ_CRD 0 7 mmMC_XPB_INTF_STS 0 0x920 7 0 4294967295 CNS_BUF_BUSY 18 18 CNS_BUF_FULL 17 17 HOP_ATTR_BUF_FULL 16 16 HOP_DATA_BUF_FULL 15 15 RPB_RDREQ_CRD 19 26 RPB_WRREQ_CRD 0 7 XSP_REQ_CRD 8 14 mmMC_XPB_LB_ADDR 0 0x8fe 4 0 4294967295 CMP0 0 9 CMP1 20 25 MASK0 10 19 MASK1 26 31 mmMC_XPB_MAP_INVERT_FLUSH_NUM_LSB 0 0x923 1 0 4294967295 ALTER_FLUSH_NUM 0 15 mmMC_XPB_MISC_CFG 0 0x927 5 0 4294967295 FIELDNAME0 0 7 FIELDNAME1 8 15 FIELDNAME2 16 23 FIELDNAME3 24 30 TRIGGERNAME 31 31 mmMC_XPB_P2P_BAR0 0 0x904 8 0 4294967295 ADDRESS 16 31 COMPRESS_DIS 14 14 HOST_FLUSH 0 3 MEM_SYS_BAR 8 11 REG_SYS_BAR 4 7 RESERVED 15 15 SEND_DIS 13 13 VALID 12 12 mmMC_XPB_P2P_BAR1 0 0x905 8 0 4294967295 ADDRESS 16 31 COMPRESS_DIS 14 14 HOST_FLUSH 0 3 MEM_SYS_BAR 8 11 REG_SYS_BAR 4 7 RESERVED 15 15 SEND_DIS 13 13 VALID 12 12 mmMC_XPB_P2P_BAR2 0 0x906 8 0 4294967295 ADDRESS 16 31 COMPRESS_DIS 14 14 HOST_FLUSH 0 3 MEM_SYS_BAR 8 11 REG_SYS_BAR 4 7 RESERVED 15 15 SEND_DIS 13 13 VALID 12 12 mmMC_XPB_P2P_BAR3 0 0x907 8 0 4294967295 ADDRESS 16 31 COMPRESS_DIS 14 14 HOST_FLUSH 0 3 MEM_SYS_BAR 8 11 REG_SYS_BAR 4 7 RESERVED 15 15 SEND_DIS 13 13 VALID 12 12 mmMC_XPB_P2P_BAR4 0 0x908 8 0 4294967295 ADDRESS 16 31 COMPRESS_DIS 14 14 HOST_FLUSH 0 3 MEM_SYS_BAR 8 11 REG_SYS_BAR 4 7 RESERVED 15 15 SEND_DIS 13 13 VALID 12 12 mmMC_XPB_P2P_BAR5 0 0x909 8 0 4294967295 ADDRESS 16 31 COMPRESS_DIS 14 14 HOST_FLUSH 0 3 MEM_SYS_BAR 8 11 REG_SYS_BAR 4 7 RESERVED 15 15 SEND_DIS 13 13 VALID 12 12 mmMC_XPB_P2P_BAR6 0 0x90a 8 0 4294967295 ADDRESS 16 31 COMPRESS_DIS 14 14 HOST_FLUSH 0 3 MEM_SYS_BAR 8 11 REG_SYS_BAR 4 7 RESERVED 15 15 SEND_DIS 13 13 VALID 12 12 mmMC_XPB_P2P_BAR7 0 0x90b 8 0 4294967295 ADDRESS 16 31 COMPRESS_DIS 14 14 HOST_FLUSH 0 3 MEM_SYS_BAR 8 11 REG_SYS_BAR 4 7 RESERVED 15 15 SEND_DIS 13 13 VALID 12 12 mmMC_XPB_P2P_BAR_CFG 0 0x903 9 0 4294967295 ADDR_SIZE 0 3 ATC_TRANSLATED 12 12 COMPRESS_DIS 8 8 RD_EN 11 11 REGBAR_FROM_SYSBAR 10 10 SEND_BAR 4 5 SEND_DIS 7 7 SNOOP 6 6 UPDATE_DIS 9 9 mmMC_XPB_P2P_BAR_DEBUG 0 0x90d 3 0 4294967295 HOST_FLUSH 8 11 MEM_SYS_BAR 12 15 SEL 0 7 mmMC_XPB_P2P_BAR_DELTA_ABOVE 0 0x90e 2 0 4294967295 DELTA 8 27 EN 0 7 mmMC_XPB_P2P_BAR_DELTA_BELOW 0 0x90f 2 0 4294967295 DELTA 8 27 EN 0 7 mmMC_XPB_P2P_BAR_SETUP 0 0x90c 7 0 4294967295 ADDRESS 16 31 COMPRESS_DIS 14 14 REG_SYS_BAR 8 11 RESERVED 15 15 SEL 0 7 SEND_DIS 13 13 VALID 12 12 mmMC_XPB_PEER_SYS_BAR0 0 0x910 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_PEER_SYS_BAR1 0 0x911 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_PEER_SYS_BAR2 0 0x912 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_PEER_SYS_BAR3 0 0x913 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_PEER_SYS_BAR4 0 0x914 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_PEER_SYS_BAR5 0 0x915 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_PEER_SYS_BAR6 0 0x916 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_PEER_SYS_BAR7 0 0x917 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_PEER_SYS_BAR8 0 0x918 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_PEER_SYS_BAR9 0 0x919 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_PERF_KNOBS 0 0x924 3 0 4294967295 CNS_FIFO_DEPTH 0 5 WCB_HST_FIFO_DEPTH 6 11 WCB_SID_FIFO_DEPTH 12 17 mmMC_XPB_PIPE_STS 0 0x921 13 0 4294967295 RET_BUF_FULL 23 23 WCB_ANY_PBUF 0 0 WCB_HST_DATA_BUF_CNT 1 7 WCB_HST_DATA_OBUF_FULL 21 21 WCB_HST_RD_PTR_BUF_FULL 15 15 WCB_HST_REQ_FIFO_FULL 17 17 WCB_HST_REQ_OBUF_FULL 19 19 WCB_SID_DATA_BUF_CNT 8 14 WCB_SID_DATA_OBUF_FULL 22 22 WCB_SID_RD_PTR_BUF_FULL 16 16 WCB_SID_REQ_FIFO_FULL 18 18 WCB_SID_REQ_OBUF_FULL 20 20 XPB_CLK_BUSY_BITS 24 31 mmMC_XPB_RTR_DEST_MAP0 0 0x8db 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_RTR_DEST_MAP1 0 0x8dc 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_RTR_DEST_MAP2 0 0x8dd 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_RTR_DEST_MAP3 0 0x8de 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_RTR_DEST_MAP4 0 0x8df 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_RTR_DEST_MAP5 0 0x8e0 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_RTR_DEST_MAP6 0 0x8e1 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_RTR_DEST_MAP7 0 0x8e2 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_RTR_DEST_MAP8 0 0x8e3 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_RTR_DEST_MAP9 0 0x8e4 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_RTR_SRC_APRTR0 0 0x8cd 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR1 0 0x8ce 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR2 0 0x8cf 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR3 0 0x8d0 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR4 0 0x8d1 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR5 0 0x8d2 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR6 0 0x8d3 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR7 0 0x8d4 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR8 0 0x8d5 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR9 0 0x8d6 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_STICKY 0 0x925 1 0 4294967295 BITS 0 31 mmMC_XPB_STICKY_W1C 0 0x926 1 0 4294967295 BITS 0 31 mmMC_XPB_SUB_CTRL 0 0x922 20 0 4294967295 RESET_CGR 19 19 RESET_CNS 10 10 RESET_HOP 16 16 RESET_HST 15 15 RESET_MAP 13 13 RESET_RET 12 12 RESET_RTR 11 11 RESET_SID 17 17 RESET_SRB 18 18 RESET_WCB 14 14 STALL_CNS_RTR_REQ 1 1 STALL_HST_HOP_REQ 8 8 STALL_MAP_WCB_REQ 4 4 STALL_MC_XSP_REQ_SEND 6 6 STALL_RTR_MAP_REQ 3 3 STALL_RTR_RPB_WRREQ 2 2 STALL_WCB_HST_REQ 7 7 STALL_WCB_SID_REQ 5 5 STALL_XPB_RPB_REQ_ATTR 9 9 WRREQ_BYPASS_XPB 0 0 mmMC_XPB_UNC_THRESH_HST 0 0x8ff 3 0 4294967295 CHANGE_PREF 0 5 STRONG_PREF 6 11 USE_UNFULL 12 17 mmMC_XPB_UNC_THRESH_SID 0 0x900 3 0 4294967295 CHANGE_PREF 0 5 STRONG_PREF 6 11 USE_UNFULL 12 17 mmMC_XPB_WCB_CFG 0 0x902 3 0 4294967295 HST_MAX 16 17 SID_MAX 18 19 TIMEOUT 0 15 mmMC_XPB_WCB_STS 0 0x901 3 0 4294967295 PBUF_VLD 0 15 WCB_HST_DATA_BUF_CNT 16 22 WCB_SID_DATA_BUF_CNT 23 29 mmMC_XPB_XDMA_PEER_SYS_BAR0 0 0x91a 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_XDMA_PEER_SYS_BAR1 0 0x91b 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_XDMA_PEER_SYS_BAR2 0 0x91c 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_XDMA_PEER_SYS_BAR3 0 0x91d 3 0 4294967295 ADDR 2 26 SIDE_OK 1 1 VALID 0 0 mmMC_XPB_XDMA_RTR_DEST_MAP0 0 0x8e5 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_XDMA_RTR_DEST_MAP1 0 0x8e6 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_XDMA_RTR_DEST_MAP2 0 0x8e7 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_XDMA_RTR_DEST_MAP3 0 0x8e8 6 0 4294967295 APRTR_SIZE 26 30 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 NMR 0 0 SIDE_OK 25 25 mmMC_XPB_XDMA_RTR_SRC_APRTR0 0 0x8d7 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_XDMA_RTR_SRC_APRTR1 0 0x8d8 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_XDMA_RTR_SRC_APRTR2 0 0x8d9 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_XDMA_RTR_SRC_APRTR3 0 0x8da 1 0 4294967295 BASE_ADDR 0 24 mmMPLL_AD_FUNC_CNTL 0 0xaf0 2 0 4294967295 SPARE 3 31 YCLK_POST_DIV 0 2 mmMPLL_AD_STATUS 0 0xaf6 6 0 4294967295 FREQ_LOCK 18 18 FREQ_UNLOCK_STICKY 19 19 OINT_RESET 17 17 TEST_FBDIV_FRAC 4 6 TEST_FBDIV_INT 7 16 VCTRLADC 0 2 mmMPLL_CNTL_MODE 0 0xaec 16 0 4294967295 FAST_LOCK_CNTRL 21 22 FAST_LOCK_EN 20 20 FORCE_TESTMODE 17 17 GLOBAL_MPLL_RESET 31 31 INSTR_DELAY 0 7 MPLL_CHG_STATUS 16 16 MPLL_CTLREQ 14 14 MPLL_MCLK_SEL 11 11 MPLL_SW_DIR_CONTROL 8 8 QDR 13 13 SPARE_1 12 12 SPARE_2 23 23 SPARE_3 28 30 SS_DSMODE_EN 26 26 SS_SSEN 24 25 VTOI_BIAS_CNTRL 27 27 mmMPLL_CONTROL 0 0xaf5 23 0 4294967295 AD_BG_PWRON 12 12 AD_PLL_PWRON 13 13 AD_PLL_RESET 14 14 DQ_0_0_BG_PWRON 16 16 DQ_0_0_PLL_PWRON 17 17 DQ_0_0_PLL_RESET 18 18 DQ_0_1_BG_PWRON 20 20 DQ_0_1_PLL_PWRON 21 21 DQ_0_1_PLL_RESET 22 22 DQ_1_0_BG_PWRON 24 24 DQ_1_0_PLL_PWRON 25 25 DQ_1_0_PLL_RESET 26 26 DQ_1_1_BG_PWRON 28 28 DQ_1_1_PLL_PWRON 29 29 DQ_1_1_PLL_RESET 30 30 GDDR_PWRON 0 0 PLL_BUF_PWRON_TX 2 2 REFCLK_PWRON 1 1 SPARE_AD_0 15 15 SPARE_DQ_0_0 19 19 SPARE_DQ_0_1 23 23 SPARE_DQ_1_0 27 27 SPARE_DQ_1_1 31 31 mmMPLL_DQ_0_0_STATUS 0 0xaf7 6 0 4294967295 FREQ_LOCK 18 18 FREQ_UNLOCK_STICKY 19 19 OINT_RESET 17 17 TEST_FBDIV_FRAC 4 6 TEST_FBDIV_INT 7 16 VCTRLADC 0 2 mmMPLL_DQ_0_1_STATUS 0 0xaf8 6 0 4294967295 FREQ_LOCK 18 18 FREQ_UNLOCK_STICKY 19 19 OINT_RESET 17 17 TEST_FBDIV_FRAC 4 6 TEST_FBDIV_INT 7 16 VCTRLADC 0 2 mmMPLL_DQ_1_0_STATUS 0 0xaf9 6 0 4294967295 FREQ_LOCK 18 18 FREQ_UNLOCK_STICKY 19 19 OINT_RESET 17 17 TEST_FBDIV_FRAC 4 6 TEST_FBDIV_INT 7 16 VCTRLADC 0 2 mmMPLL_DQ_1_1_STATUS 0 0xafa 6 0 4294967295 FREQ_LOCK 18 18 FREQ_UNLOCK_STICKY 19 19 OINT_RESET 17 17 TEST_FBDIV_FRAC 4 6 TEST_FBDIV_INT 7 16 VCTRLADC 0 2 mmMPLL_DQ_FUNC_CNTL 0 0xaf1 4 0 4294967295 SPARE_0 3 3 SPARE 5 31 YCLK_POST_DIV 0 2 YCLK_SEL 4 4 mmMPLL_FUNC_CNTL 0 0xaed 5 0 4294967295 BG_100ADJ 8 11 BG_135ADJ 16 19 BWCTRL 20 27 REG_BIAS 30 31 SPARE_0 5 5 mmMPLL_FUNC_CNTL_1 0 0xaee 5 0 4294967295 CLKF 16 27 CLKFRAC 4 15 SPARE_0 2 3 SPARE_1 28 31 VCO_MODE 0 1 mmMPLL_FUNC_CNTL_2 0 0xaef 15 0 4294967295 BACKUP_2 17 19 BACKUP 27 31 LF_CNTRL 20 26 MPLL_UNLOCK_CLEAR 7 7 PFD_RESET_CNTRL 12 13 RESET_EN 2 2 RESET_TIMER 10 11 TEST_BYPCLK_EN 3 3 TEST_BYPCLK_SRC 4 4 TEST_BYPMCLK 6 6 TEST_FBDIV_FRAC_BYPASS 5 5 TEST_FBDIV_SSC_BYPASS 9 9 TEST_VCTL_CNTRL 8 8 TEST_VCTL_EN 1 1 VCTRLADC_EN 0 0 mmMPLL_SEQ_UCODE_1 0 0xaea 8 0 4294967295 INSTR0 0 3 INSTR1 4 7 INSTR2 8 11 INSTR3 12 15 INSTR4 16 19 INSTR5 20 23 INSTR6 24 27 INSTR7 28 31 mmMPLL_SEQ_UCODE_2 0 0xaeb 8 0 4294967295 INSTR10 8 11 INSTR11 12 15 INSTR12 16 19 INSTR13 20 23 INSTR14 24 27 INSTR15 28 31 INSTR8 0 3 INSTR9 4 7 mmMPLL_SS1 0 0xaf3 2 0 4294967295 CLKV 0 25 SPARE 26 31 mmMPLL_SS2 0 0xaf4 2 0 4294967295 CLKS 0 11 SPARE 12 31 mmMPLL_TIME 0 0xaf2 2 0 4294967295 MPLL_LOCK_TIME 0 15 MPLL_RESET_TIME 16 31 mmVM_CONTEXT0_CNTL 0 0x504 22 0 4294967295 DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT 7 7 DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT 6 6 ENABLE_CONTEXT 0 0 PAGE_TABLE_BLOCK_SIZE 24 27 PAGE_TABLE_DEPTH 1 2 PDE0_PROTECTION_FAULT_ENABLE_DEFAULT 10 10 PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT 9 9 PDE0_PROTECTION_FAULT_ENABLE_SAVE 11 11 PRIVILEGED_PROTECTION_FAULT_ENABLE_DEFAULT 22 22 PRIVILEGED_PROTECTION_FAULT_ENABLE_INTERRUPT 21 21 PRIVILEGED_PROTECTION_FAULT_ENABLE_SAVE 23 23 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT 4 4 RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT 3 3 READ_PROTECTION_FAULT_ENABLE_DEFAULT 16 16 READ_PROTECTION_FAULT_ENABLE_INTERRUPT 15 15 READ_PROTECTION_FAULT_ENABLE_SAVE 17 17 VALID_PROTECTION_FAULT_ENABLE_DEFAULT 13 13 VALID_PROTECTION_FAULT_ENABLE_INTERRUPT 12 12 VALID_PROTECTION_FAULT_ENABLE_SAVE 14 14 WRITE_PROTECTION_FAULT_ENABLE_DEFAULT 19 19 WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT 18 18 WRITE_PROTECTION_FAULT_ENABLE_SAVE 20 20 mmVM_CONTEXT0_CNTL2 0 0x50c 5 0 4294967295 ALLOW_SUBSEQUENT_PROTECTION_FAULT_STATUS_ADDR_UPDATES 3 3 CLEAR_PROTECTION_FAULT_STATUS_ADDR 0 0 ENABLE_CLEAR_PROTECTION_FAULT_STATUS_ADDR_WHEN_INVALIDATE_CONTEXT 1 1 ENABLE_INTERRUPT_PROCESSING_FOR_SUBSEQUENT_FAULTS_PER_CONTEXT 2 2 WAIT_FOR_IDLE_WHEN_INVALIDATE 4 4 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0 0x54f 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT0_PAGE_TABLE_END_ADDR 0 0x55f 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT0_PAGE_TABLE_START_ADDR 0 0x557 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT0_PROTECTION_FAULT_ADDR 0 0x53e 1 0 4294967295 LOGICAL_PAGE_ADDR 0 27 mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR 0 0x546 1 0 4294967295 PHYSICAL_PAGE_ADDR 0 27 mmVM_CONTEXT0_PROTECTION_FAULT_STATUS 0 0x536 4 0 4294967295 MEMORY_CLIENT_ID 12 19 MEMORY_CLIENT_RW 24 24 PROTECTIONS 0 7 VMID 25 28 mmVM_CONTEXT10_PAGE_TABLE_BASE_ADDR 0 0x510 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT11_PAGE_TABLE_BASE_ADDR 0 0x511 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT12_PAGE_TABLE_BASE_ADDR 0 0x512 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT13_PAGE_TABLE_BASE_ADDR 0 0x513 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT14_PAGE_TABLE_BASE_ADDR 0 0x514 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT15_PAGE_TABLE_BASE_ADDR 0 0x515 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT1_CNTL 0 0x505 22 0 4294967295 DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT 7 7 DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT 6 6 ENABLE_CONTEXT 0 0 PAGE_TABLE_BLOCK_SIZE 24 27 PAGE_TABLE_DEPTH 1 2 PDE0_PROTECTION_FAULT_ENABLE_DEFAULT 10 10 PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT 9 9 PDE0_PROTECTION_FAULT_ENABLE_SAVE 11 11 PRIVILEGED_PROTECTION_FAULT_ENABLE_DEFAULT 22 22 PRIVILEGED_PROTECTION_FAULT_ENABLE_INTERRUPT 21 21 PRIVILEGED_PROTECTION_FAULT_ENABLE_SAVE 23 23 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT 4 4 RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT 3 3 READ_PROTECTION_FAULT_ENABLE_DEFAULT 16 16 READ_PROTECTION_FAULT_ENABLE_INTERRUPT 15 15 READ_PROTECTION_FAULT_ENABLE_SAVE 17 17 VALID_PROTECTION_FAULT_ENABLE_DEFAULT 13 13 VALID_PROTECTION_FAULT_ENABLE_INTERRUPT 12 12 VALID_PROTECTION_FAULT_ENABLE_SAVE 14 14 WRITE_PROTECTION_FAULT_ENABLE_DEFAULT 19 19 WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT 18 18 WRITE_PROTECTION_FAULT_ENABLE_SAVE 20 20 mmVM_CONTEXT1_CNTL2 0 0x50d 5 0 4294967295 ALLOW_SUBSEQUENT_PROTECTION_FAULT_STATUS_ADDR_UPDATES 3 3 CLEAR_PROTECTION_FAULT_STATUS_ADDR 0 0 ENABLE_CLEAR_PROTECTION_FAULT_STATUS_ADDR_WHEN_INVALIDATE_CONTEXT 1 1 ENABLE_INTERRUPT_PROCESSING_FOR_SUBSEQUENT_FAULTS_PER_CONTEXT 2 2 WAIT_FOR_IDLE_WHEN_INVALIDATE 4 4 mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR 0 0x550 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT1_PAGE_TABLE_END_ADDR 0 0x560 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT1_PAGE_TABLE_START_ADDR 0 0x558 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT1_PROTECTION_FAULT_ADDR 0 0x53f 1 0 4294967295 LOGICAL_PAGE_ADDR 0 27 mmVM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR 0 0x547 1 0 4294967295 PHYSICAL_PAGE_ADDR 0 27 mmVM_CONTEXT1_PROTECTION_FAULT_STATUS 0 0x537 4 0 4294967295 MEMORY_CLIENT_ID 12 19 MEMORY_CLIENT_RW 24 24 PROTECTIONS 0 7 VMID 25 28 mmVM_CONTEXT2_PAGE_TABLE_BASE_ADDR 0 0x551 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT3_PAGE_TABLE_BASE_ADDR 0 0x552 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT4_PAGE_TABLE_BASE_ADDR 0 0x553 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT5_PAGE_TABLE_BASE_ADDR 0 0x554 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT6_PAGE_TABLE_BASE_ADDR 0 0x555 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT7_PAGE_TABLE_BASE_ADDR 0 0x556 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR 0 0x50e 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT9_PAGE_TABLE_BASE_ADDR 0 0x50f 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXTS_DISABLE 0 0x535 16 0 4294967295 DISABLE_CONTEXT_0 0 0 DISABLE_CONTEXT_10 10 10 DISABLE_CONTEXT_11 11 11 DISABLE_CONTEXT_12 12 12 DISABLE_CONTEXT_13 13 13 DISABLE_CONTEXT_14 14 14 DISABLE_CONTEXT_15 15 15 DISABLE_CONTEXT_1 1 1 DISABLE_CONTEXT_2 2 2 DISABLE_CONTEXT_3 3 3 DISABLE_CONTEXT_4 4 4 DISABLE_CONTEXT_5 5 5 DISABLE_CONTEXT_6 6 6 DISABLE_CONTEXT_7 7 7 DISABLE_CONTEXT_8 8 8 DISABLE_CONTEXT_9 9 9 mmVM_DEBUG 0 0x56f 1 0 4294967295 FLAGS 0 31 mmVM_DUMMY_PAGE_FAULT_ADDR 0 0x507 1 0 4294967295 DUMMY_PAGE_ADDR 0 27 mmVM_DUMMY_PAGE_FAULT_CNTL 0 0x506 3 0 4294967295 DUMMY_PAGE_ADDRESS_LOGICAL 1 1 DUMMY_PAGE_COMPARE_MASK 2 3 DUMMY_PAGE_FAULT_ENABLE 0 0 mmVM_FAULT_CLIENT_ID 0 0x54e 2 0 4294967295 MEMORY_CLIENT 0 8 MEMORY_CLIENT_MASK 9 17 mmVM_INVALIDATE_REQUEST 0 0x51e 16 0 4294967295 INVALIDATE_DOMAIN_0 0 0 INVALIDATE_DOMAIN_10 10 10 INVALIDATE_DOMAIN_11 11 11 INVALIDATE_DOMAIN_12 12 12 INVALIDATE_DOMAIN_13 13 13 INVALIDATE_DOMAIN_14 14 14 INVALIDATE_DOMAIN_15 15 15 INVALIDATE_DOMAIN_1 1 1 INVALIDATE_DOMAIN_2 2 2 INVALIDATE_DOMAIN_3 3 3 INVALIDATE_DOMAIN_4 4 4 INVALIDATE_DOMAIN_5 5 5 INVALIDATE_DOMAIN_6 6 6 INVALIDATE_DOMAIN_7 7 7 INVALIDATE_DOMAIN_8 8 8 INVALIDATE_DOMAIN_9 9 9 mmVM_INVALIDATE_RESPONSE 0 0x51f 16 0 4294967295 DOMAIN_INVALIDATED_0 0 0 DOMAIN_INVALIDATED_10 10 10 DOMAIN_INVALIDATED_11 11 11 DOMAIN_INVALIDATED_12 12 12 DOMAIN_INVALIDATED_13 13 13 DOMAIN_INVALIDATED_14 14 14 DOMAIN_INVALIDATED_15 15 15 DOMAIN_INVALIDATED_1 1 1 DOMAIN_INVALIDATED_2 2 2 DOMAIN_INVALIDATED_3 3 3 DOMAIN_INVALIDATED_4 4 4 DOMAIN_INVALIDATED_5 5 5 DOMAIN_INVALIDATED_6 6 6 DOMAIN_INVALIDATED_7 7 7 DOMAIN_INVALIDATED_8 8 8 DOMAIN_INVALIDATED_9 9 9 mmVM_L2_BANK_SELECT_MASKA 0 0x572 1 0 4294967295 BANK_SELECT_MASK 0 27 mmVM_L2_BANK_SELECT_MASKB 0 0x573 1 0 4294967295 BANK_SELECT_MASK 0 7 mmVM_L2_CG 0 0x570 3 0 4294967295 ENABLE 18 18 MEM_LS_ENABLE 19 19 OFFDLY 6 11 mmVM_L2_CNTL 0 0x500 14 0 4294967295 CONTEXT1_IDENTITY_ACCESS_MODE 19 20 EFFECTIVE_L2_QUEUE_SIZE 15 17 ENABLE_L2_CACHE 0 0 ENABLE_L2_FRAGMENT_PROCESSING 1 1 ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE 10 10 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE 9 9 IDENTITY_MODE_FRAGMENT_SIZE 21 25 L2_CACHE_4K_SWAP_TAG_INDEX_LSBS 26 27 L2_CACHE_BIGK_SWAP_TAG_INDEX_LSBS 28 30 L2_CACHE_PDE_ENDIAN_SWAP_MODE 4 5 L2_CACHE_PTE_ENDIAN_SWAP_MODE 2 3 L2_PDE0_CACHE_SPLIT_MODE 12 14 L2_PDE0_CACHE_TAG_GENERATION_MODE 8 8 PDE_FAULT_CLASSIFICATION 18 18 mmVM_L2_CNTL2 0 0x501 6 0 4294967295 DISABLE_BIGK_CACHE_OPTIMIZATION 22 22 DISABLE_INVALIDATE_PER_DOMAIN 21 21 INVALIDATE_ALL_L1_TLBS 0 0 INVALIDATE_CACHE_MODE 26 27 INVALIDATE_L2_CACHE 1 1 L2_CACHE_BIGK_VMID_MODE 23 25 mmVM_L2_CNTL3 0 0x502 9 0 4294967295 BANK_SELECT 0 5 L2_CACHE_4K_EFFECTIVE_SIZE 21 23 L2_CACHE_4K_FORCE_MISS 28 28 L2_CACHE_BIGK_ASSOCIATIVITY 20 20 L2_CACHE_BIGK_EFFECTIVE_SIZE 24 27 L2_CACHE_BIGK_FORCE_MISS 29 29 L2_CACHE_BIGK_FRAGMENT_SIZE 15 19 L2_CACHE_UPDATE_MODE 6 7 L2_CACHE_UPDATE_WILDCARD_REFERENCE_VALUE 8 12 mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR 0 0x576 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR 0 0x575 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET 0 0x577 1 0 4294967295 PHYSICAL_PAGE_OFFSET 0 27 mmVM_L2_STATUS 0 0x503 2 0 4294967295 CONTEXT_DOMAIN_BUSY 1 16 L2_BUSY 0 0 mmVM_PRT_APERTURE0_HIGH_ADDR 0 0x530 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE0_LOW_ADDR 0 0x52c 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE1_HIGH_ADDR 0 0x531 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE1_LOW_ADDR 0 0x52d 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE2_HIGH_ADDR 0 0x532 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE2_LOW_ADDR 0 0x52e 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE3_HIGH_ADDR 0 0x533 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE3_LOW_ADDR 0 0x52f 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_CNTL 0 0x534 4 0 4294967295 L1_TLB_STORE_INVALID_ENTRIES 3 3 L2_CACHE_STORE_INVALID_ENTRIES 2 2 CB_DISABLE_FAULT_ON_UNMAPPED_ACCESS 0 0 TC_DISABLE_FAULT_ON_UNMAPPED_ACCESS 1 1