1436 mmMC_CONFIG 0 0x800 10 0 4294967295 MCDW_WR_ENABLE 0 0 MCDX_WR_ENABLE 1 1 MCDY_WR_ENABLE 2 2 MCDZ_WR_ENABLE 3 3 MCDS_WR_ENABLE 4 4 MCDT_WR_ENABLE 5 5 MCDU_WR_ENABLE 6 6 MCDV_WR_ENABLE 7 7 MC_RD_ENABLE 8 10 MCC_INDEX_MODE_ENABLE 31 31 mmMC_ARB_AGE_CNTL 0 0x9bf 22 0 4294967295 RESET_RD_GROUP0 0 0 RESET_RD_GROUP1 1 1 RESET_RD_GROUP2 2 2 RESET_RD_GROUP3 3 3 RESET_RD_GROUP4 4 4 RESET_RD_GROUP5 5 5 RESET_RD_GROUP6 6 6 RESET_RD_GROUP7 7 7 RESET_WR_GROUP0 8 8 RESET_WR_GROUP1 9 9 RESET_WR_GROUP2 10 10 RESET_WR_GROUP3 11 11 RESET_WR_GROUP4 12 12 RESET_WR_GROUP5 13 13 RESET_WR_GROUP6 14 14 RESET_WR_GROUP7 15 15 AGE_LOW_RATE_RD 16 18 AGE_LOW_RATE_WR 19 21 TIMER_STALL_RD 22 22 TIMER_STALL_WR 23 23 EXTEND_WEIGHT_RD 24 24 EXTEND_WEIGHT_WR 25 25 mmMC_ARB_RET_CREDITS2 0 0x9c0 7 0 4294967295 ACP_WR 0 7 NECKDOWN_CNTR_EN_RD 8 8 NECKDOWN_CNTR_EN_WR 9 9 ACP_RDRET_URG 10 10 HDP_RDRET_URG 11 11 NECKDOWN_CNTR_MONITOR_RD 12 12 NECKDOWN_CNTR_MONITOR_WR 13 13 mmMC_ARB_FED_CNTL 0 0x9c1 6 0 4294967295 MODE 0 1 WR_ERR 2 3 KEEP_POISON_IN_PAGE 4 4 RDRET_PARITY_NACK 5 5 USE_LEGACY_NACK 6 6 DEBUG_RSV 7 31 mmMC_ARB_GECC2_STATUS 0 0x9c2 27 0 4294967295 CORR_STS0 0 0 UNCORR_STS0 1 1 FED_STS0 2 2 RSVD0 3 3 CORR_STS1 4 4 UNCORR_STS1 5 5 FED_STS1 6 6 RSVD1 7 7 CORR_CLEAR0 8 8 UNCORR_CLEAR0 9 9 FED_CLEAR0 10 10 RSVD2 11 11 CORR_CLEAR1 12 12 UNCORR_CLEAR1 13 13 FED_CLEAR1 14 14 RSVD3 15 15 RMWRD_CORR_STS0 16 16 RMWRD_UNCORR_STS0 17 17 RSVD4 18 19 RMWRD_CORR_STS1 20 20 RMWRD_UNCORR_STS1 21 21 RSVD5 22 23 RMWRD_CORR_CLEAR0 24 24 RMWRD_UNCORR_CLEAR0 25 25 RSVD6 26 27 RMWRD_CORR_CLEAR1 28 28 RMWRD_UNCORR_CLEAR1 29 29 mmMC_ARB_GECC2_MISC 0 0x9c3 11 0 4294967295 STREAK_BREAK 0 3 COL10_HACK 4 4 CWRD_IN_REPLAY 5 5 NO_EOB_ALL_WR_IN_REPLAY 6 6 RMW_LM_WR_STALL 7 7 RMW_STALL_RELEASE 8 8 WR_EDC_MASK_REPLAY 9 9 CWRD_REPLAY_AGAIN 10 10 WRRDWR_REPLAY_AGAIN 11 11 ALLOW_RMW_ERR_AFTER_REPLAY 12 12 DEBUG_RSV 13 31 mmMC_ARB_GECC2_DEBUG 0 0x9c4 4 0 4294967295 NUM_ERR_BITS 0 1 DIRECTION 2 2 DATA_FIELD 3 4 SW_INJECTION 5 5 mmMC_ARB_GECC2_DEBUG2 0 0x9c5 4 0 4294967295 PERIOD 0 7 ERR0_START 8 15 ERR1_START 16 23 ERR2_START 24 31 mmMC_ARB_PERF_CID 0 0x9c6 4 0 4294967295 CH0 0 7 CH1 8 15 CH0_EN 16 16 CH1_EN 17 17 mmMC_ARB_GECC2 0 0x9c9 10 0 4294967295 ENABLE 0 0 ECC_MODE 1 2 PAGE_BIT0 3 4 EXOR_BANK_SEL 5 6 NO_GECC_CLI 7 10 READ_ERR 11 13 CLOSE_BANK_RMW 14 14 COLFIFO_WATER 15 20 WRADDR_CONV 21 21 RMWRD_UNCOR_POISON 22 22 mmMC_ARB_GECC2_CLI 0 0x9ca 4 0 4294967295 NO_GECC_CLI0 0 7 NO_GECC_CLI1 8 15 NO_GECC_CLI2 16 23 NO_GECC_CLI3 24 31 mmMC_ARB_ADDR_SWIZ0 0 0x9cb 8 0 4294967295 A8 0 3 A9 4 7 A10 8 11 A11 12 15 A12 16 19 A13 20 23 A14 24 27 A15 28 31 mmMC_ARB_ADDR_SWIZ1 0 0x9cc 4 0 4294967295 A16 0 3 A17 4 7 A18 8 11 A19 12 15 mmMC_ARB_MISC3 0 0x9cd 4 0 4294967295 NO_GECC_EXT_EOB 0 0 CHAN4_EN 1 1 CHAN4_ARB_SEL 2 2 TBD_FIELD 3 31 mmMC_ARB_WCDR_2 0 0x9ce 8 0 4294967295 WPRE_INC_STEP 0 3 WPRE_MIN_THRESHOLD 4 8 DEBUG_0 9 9 DEBUG_1 10 10 DEBUG_2 11 11 DEBUG_3 12 12 DEBUG_4 13 13 DEBUG_5 14 14 mmMC_ARB_RTT_DATA 0 0x9cf 1 0 4294967295 PATTERN 0 7 mmMC_ARB_RTT_CNTL0 0 0x9d0 23 0 4294967295 ENABLE 0 0 START_IDLE 1 1 START_R2W 2 3 FLUSH_ON_ENTER 4 4 HARSH_START 5 5 TPS_HARSH_PRIORITY 6 6 TWRT_HARSH_PRIORITY 7 7 BREAK_ON_HARSH 8 8 BREAK_ON_URGENTRD 9 9 BREAK_ON_URGENTWR 10 10 TRAIN_PERIOD 11 13 START_R2W_RFSH 14 14 DEBUG_RSV_0 15 15 DEBUG_RSV_1 16 16 DEBUG_RSV_2 17 17 DEBUG_RSV_3 18 18 DEBUG_RSV_4 19 19 DEBUG_RSV_5 20 20 DEBUG_RSV_6 21 21 DEBUG_RSV_7 22 22 DEBUG_RSV_8 23 23 DATA_CNTL 24 24 NEIGHBOR_BIT 25 25 mmMC_ARB_RTT_CNTL1 0 0x9d1 7 0 4294967295 WINDOW_SIZE 0 4 WINDOW_UPDATE 5 5 WINDOW_INC_THRESHOLD 6 12 WINDOW_DEC_THRESHOLD 13 19 WINDOW_SIZE_MAX 20 24 WINDOW_SIZE_MIN 25 29 WINDOW_UPDATE_COUNT 30 31 mmMC_ARB_RTT_CNTL2 0 0x9d2 4 0 4294967295 SAMPLE_CNT 0 5 PHASE_ADJUST_THRESHOLD 6 11 PHASE_ADJUST_SIZE 12 12 FILTER_CNTL 13 13 mmMC_ARB_RTT_DEBUG 0 0x9d3 6 0 4294967295 DEBUG_BYTE_CH0 0 1 DEBUG_BYTE_CH1 2 3 SHIFTED_PHASE_CH0 4 11 WINDOW_SIZE_CH0 12 16 SHIFTED_PHASE_CH1 17 24 WINDOW_SIZE_CH1 25 29 mmMC_ARB_CAC_CNTL 0 0x9d4 4 0 4294967295 ENABLE 0 0 READ_WEIGHT 1 6 WRITE_WEIGHT 7 12 ALLOW_OVERFLOW 13 13 mmMC_ARB_MISC2 0 0x9d5 19 0 4294967295 TCCDL4_BANKBIT3_XOR_ENABLE 5 5 TCCDL4_BANKBIT3_XOR_COLBIT4 6 6 TCCDL4_BANKBIT3_XOR_COLBIT5 7 7 TCCDL4_BANKBIT3_XOR_COLBIT6 8 8 TCCDL4_BANKBIT3_XOR_COLBIT7 9 9 TCCDL4_BANKBIT3_XOR_COLBIT8 10 10 POP_IDLE_REPLAY 11 11 RDRET_NO_REORDERING 12 12 RDRET_NO_BP 13 13 RDRET_SEQ_SKID 14 17 GECC 18 18 GECC_RST 19 19 GECC_STATUS 20 20 TAGFIFO_THRESHOLD 21 24 WCDR_REPLAY_MASKCNT 25 27 REPLAY_DEBUG 28 28 ARB_DEBUG29 29 29 SEQ_RDY_POP_IDLE 30 30 TCCDL4_REPLAY_EOB 31 31 mmMC_ARB_MISC 0 0x9d6 14 0 4294967295 STICKY_RFSH 0 0 IDLE_RFSH 1 1 STUTTER_RFSH 2 2 CHAN_COUPLE 3 10 HARSHNESS 11 18 SMART_RDWR_SW 19 19 CALI_ENABLE 20 20 CALI_RATES 21 22 DISPURGVLD_NOWRT 23 23 DISPURG_NOSW2WR 24 24 DISPURG_STALL 25 25 DISPURG_THROTTLE 26 29 EXTEND_WEIGHT 30 30 ACPURG_STALL 31 31 mmMC_ARB_BANKMAP 0 0x9d7 5 0 4294967295 BANK0 0 3 BANK1 4 7 BANK2 8 11 BANK3 12 15 RANK 16 19 mmMC_ARB_RAMCFG 0 0x9d8 10 0 4294967295 NOOFBANK 0 1 NOOFRANKS 2 2 NOOFROWS 3 5 NOOFCOLS 6 7 CHANSIZE 8 8 RSV_1 9 9 RSV_2 10 10 RSV_3 11 11 NOOFGROUPS 12 12 RSV_4 13 17 mmMC_ARB_POP 0 0x9d9 9 0 4294967295 ENABLE_ARB 0 0 SPEC_OPEN 1 1 POP_DEPTH 2 5 WRDATAINDEX_DEPTH 6 11 SKID_DEPTH 12 14 WAIT_AFTER_RFSH 15 16 QUICK_STOP 17 17 ENABLE_TWO_PAGE 18 18 ALLOW_EOB_BY_WRRET_STALL 19 19 mmMC_ARB_MINCLKS 0 0x9da 4 0 4294967295 READ_CLKS 0 7 WRITE_CLKS 8 15 ARB_RW_SWITCH 16 16 RW_SWITCH_HARSH 17 18 mmMC_ARB_SQM_CNTL 0 0x9db 6 0 4294967295 MIN_PENAL 0 7 DYN_SQM_ENABLE 8 8 SQM_RDY16 9 9 SQM_RESERVE 10 15 RATIO 16 23 RATIO_DEBUG 24 31 mmMC_ARB_ADDR_HASH 0 0x9dc 3 0 4294967295 BANK_XOR_ENABLE 0 3 COL_XOR 4 11 ROW_XOR 12 27 mmMC_ARB_DRAM_TIMING 0 0x9dd 4 0 4294967295 ACTRD 0 7 ACTWR 8 15 RASMACTRD 16 23 RASMACTWR 24 31 mmMC_ARB_DRAM_TIMING2 0 0x9de 4 0 4294967295 RAS2RAS 0 7 RP 8 15 WRPLUSRP 16 23 BUS_TURN 24 28 mmMC_ARB_WTM_CNTL_RD 0 0x9df 13 0 4294967295 WTMODE 0 1 HARSH_PRI 2 2 ALLOW_STUTTER_GRP0 3 3 ALLOW_STUTTER_GRP1 4 4 ALLOW_STUTTER_GRP2 5 5 ALLOW_STUTTER_GRP3 6 6 ALLOW_STUTTER_GRP4 7 7 ALLOW_STUTTER_GRP5 8 8 ALLOW_STUTTER_GRP6 9 9 ALLOW_STUTTER_GRP7 10 10 ACP_HARSH_PRI 11 11 ACP_OVER_DISP 12 12 FORCE_ACP_URG 13 13 mmMC_ARB_WTM_CNTL_WR 0 0x9e0 13 0 4294967295 WTMODE 0 1 HARSH_PRI 2 2 ALLOW_STUTTER_GRP0 3 3 ALLOW_STUTTER_GRP1 4 4 ALLOW_STUTTER_GRP2 5 5 ALLOW_STUTTER_GRP3 6 6 ALLOW_STUTTER_GRP4 7 7 ALLOW_STUTTER_GRP5 8 8 ALLOW_STUTTER_GRP6 9 9 ALLOW_STUTTER_GRP7 10 10 ACP_HARSH_PRI 11 11 ACP_OVER_DISP 12 12 FORCE_ACP_URG 13 13 mmMC_ARB_WTM_GRPWT_RD 0 0x9e1 9 0 4294967295 GRP0 0 1 GRP1 2 3 GRP2 4 5 GRP3 6 7 GRP4 8 9 GRP5 10 11 GRP6 12 13 GRP7 14 15 GRP_EXT 16 23 mmMC_ARB_WTM_GRPWT_WR 0 0x9e2 9 0 4294967295 GRP0 0 1 GRP1 2 3 GRP2 4 5 GRP3 6 7 GRP4 8 9 GRP5 10 11 GRP6 12 13 GRP7 14 15 GRP_EXT 16 23 mmMC_ARB_TM_CNTL_RD 0 0x9e3 4 0 4294967295 GROUPBY_RANK 0 0 BANK_SELECT 1 2 MATCH_RANK 3 3 MATCH_BANK 4 4 mmMC_ARB_TM_CNTL_WR 0 0x9e4 4 0 4294967295 GROUPBY_RANK 0 0 BANK_SELECT 1 2 MATCH_RANK 3 3 MATCH_BANK 4 4 mmMC_ARB_LAZY0_RD 0 0x9e5 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_LAZY0_WR 0 0x9e6 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_LAZY1_RD 0 0x9e7 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_LAZY1_WR 0 0x9e8 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_AGE_RD 0 0x9e9 24 0 4294967295 RATE_GROUP0 0 1 RATE_GROUP1 2 3 RATE_GROUP2 4 5 RATE_GROUP3 6 7 RATE_GROUP4 8 9 RATE_GROUP5 10 11 RATE_GROUP6 12 13 RATE_GROUP7 14 15 ENABLE_GROUP0 16 16 ENABLE_GROUP1 17 17 ENABLE_GROUP2 18 18 ENABLE_GROUP3 19 19 ENABLE_GROUP4 20 20 ENABLE_GROUP5 21 21 ENABLE_GROUP6 22 22 ENABLE_GROUP7 23 23 DIVIDE_GROUP0 24 24 DIVIDE_GROUP1 25 25 DIVIDE_GROUP2 26 26 DIVIDE_GROUP3 27 27 DIVIDE_GROUP4 28 28 DIVIDE_GROUP5 29 29 DIVIDE_GROUP6 30 30 DIVIDE_GROUP7 31 31 mmMC_ARB_AGE_WR 0 0x9ea 24 0 4294967295 RATE_GROUP0 0 1 RATE_GROUP1 2 3 RATE_GROUP2 4 5 RATE_GROUP3 6 7 RATE_GROUP4 8 9 RATE_GROUP5 10 11 RATE_GROUP6 12 13 RATE_GROUP7 14 15 ENABLE_GROUP0 16 16 ENABLE_GROUP1 17 17 ENABLE_GROUP2 18 18 ENABLE_GROUP3 19 19 ENABLE_GROUP4 20 20 ENABLE_GROUP5 21 21 ENABLE_GROUP6 22 22 ENABLE_GROUP7 23 23 DIVIDE_GROUP0 24 24 DIVIDE_GROUP1 25 25 DIVIDE_GROUP2 26 26 DIVIDE_GROUP3 27 27 DIVIDE_GROUP4 28 28 DIVIDE_GROUP5 29 29 DIVIDE_GROUP6 30 30 DIVIDE_GROUP7 31 31 mmMC_ARB_RFSH_CNTL 0 0x9eb 7 0 4294967295 ENABLE 0 0 URG0 1 5 URG1 6 10 ACCUM 11 11 SINGLE_BANK 12 12 PUSH_SINGLE_BANK_REFRESH 13 13 PENDING_RATE_SEL 14 16 mmMC_ARB_RFSH_RATE 0 0x9ec 1 0 4294967295 POWERMODE0 0 7 mmMC_ARB_PM_CNTL 0 0x9ed 20 0 4294967295 OVERRIDE_CGSTATE 0 1 OVRR_CGRFSH 2 2 OVRR_CGSQM 3 3 SRFSH_ON_D1 4 4 BLKOUT_ON_D1 5 5 IDLE_ON_D1 6 6 OVRR_PM 7 7 OVRR_PM_STATE 8 9 OVRR_RD 10 10 OVRR_RD_STATE 11 11 OVRR_WR 12 12 OVRR_WR_STATE 13 13 OVRR_RFSH 14 14 OVRR_RFSH_STATE 15 15 RSV_0 16 17 IDLE_ON_D2 18 18 IDLE_ON_D3 19 19 IDLE_CNT 20 23 RSV_1 24 24 RSV_2 25 25 mmMC_ARB_GDEC_RD_CNTL 0 0x9ee 5 0 4294967295 PAGEBIT0 0 3 PAGEBIT1 4 7 USE_RANK 8 8 USE_RSNO 9 9 REM_DEFAULT_GRP 10 13 mmMC_ARB_GDEC_WR_CNTL 0 0x9ef 5 0 4294967295 PAGEBIT0 0 3 PAGEBIT1 4 7 USE_RANK 8 8 USE_RSNO 9 9 REM_DEFAULT_GRP 10 13 mmMC_ARB_LM_RD 0 0x9f0 8 0 4294967295 STREAK_LIMIT 0 7 STREAK_LIMIT_UBER 8 15 STREAK_BREAK 16 16 STREAK_UBER 17 17 ENABLE_TWO_LIST 18 18 POPIDLE_RST_TWOLIST 19 19 SKID1_RST_TWOLIST 20 20 BANKGROUP_CONFIG 21 23 mmMC_ARB_LM_WR 0 0x9f1 9 0 4294967295 STREAK_LIMIT 0 7 STREAK_LIMIT_UBER 8 15 STREAK_BREAK 16 16 STREAK_UBER 17 17 ENABLE_TWO_LIST 18 18 POPIDLE_RST_TWOLIST 19 19 SKID1_RST_TWOLIST 20 20 BANKGROUP_CONFIG 21 23 MASKWR_LM_EOB 24 24 mmMC_ARB_REMREQ 0 0x9f2 5 0 4294967295 RD_WATER 0 7 WR_WATER 8 15 WR_MAXBURST_SIZE 16 19 WR_LAZY_TIMER 20 23 ENABLE_REMOTE_NACK_REQ 24 24 mmMC_ARB_REPLAY 0 0x9f3 10 0 4294967295 ENABLE_RD 0 0 ENABLE_WR 1 1 WRACK_MODE 2 2 WAW_ENABLE 3 3 RAW_ENABLE 4 4 IGNORE_WR_CDC 5 5 BREAK_ON_STALL 6 6 BOS_ENABLE_WAIT_CYC 7 7 BOS_WAIT_CYC 8 14 NO_PCH_AT_REPLAY_START 15 15 mmMC_ARB_RET_CREDITS_RD 0 0x9f4 4 0 4294967295 LCL 0 7 HUB 8 15 DISP 16 23 RETURN_CREDIT 24 31 mmMC_ARB_RET_CREDITS_WR 0 0x9f5 5 0 4294967295 LCL 0 7 HUB 8 15 RETURN_CREDIT 16 23 WRRET_SEQ_SKID 24 27 WRRET_BP 28 28 mmMC_ARB_MAX_LAT_CID 0 0x9f6 6 0 4294967295 CID_CH0 0 7 CID_CH1 8 15 WRITE_CH0 16 16 WRITE_CH1 17 17 REALTIME_CH0 18 18 REALTIME_CH1 19 19 mmMC_ARB_MAX_LAT_RSLT0 0 0x9f7 1 0 4294967295 MAX_LATENCY 0 31 mmMC_ARB_MAX_LAT_RSLT1 0 0x9f8 1 0 4294967295 MAX_LATENCY 0 31 mmMC_ARB_SSM 0 0x9f9 1 0 4294967295 FORMAT 0 4 mmMC_ARB_CG 0 0x9fa 4 0 4294967295 CG_ARB_REQ 0 7 CG_ARB_RESP 8 15 RSV_0 16 23 RSV_1 24 31 mmMC_ARB_WCDR 0 0x9fb 14 0 4294967295 IDLE_ENABLE 0 0 SEQ_IDLE 1 1 IDLE_PERIOD 2 6 IDLE_BURST 7 12 IDLE_BURST_MODE 13 13 IDLE_WAKEUP 14 15 IDLE_DEGLITCH_ENABLE 16 16 WPRE_ENABLE 17 17 WPRE_THRESHOLD 18 21 WPRE_MAX_BURST 22 24 WPRE_INC_READ 25 25 WPRE_INC_SKIDIDLE 26 26 WPRE_INC_SEQIDLE 27 27 WPRE_TWOPAGE 28 28 mmMC_ARB_DRAM_TIMING_1 0 0x9fc 4 0 4294967295 ACTRD 0 7 ACTWR 8 15 RASMACTRD 16 23 RASMACTWR 24 31 mmMC_ARB_BUSY_STATUS 0 0x9fd 32 0 4294967295 LM_RD0 0 0 LM_RD1 1 1 LM_WR0 2 2 LM_WR1 3 3 HM_RD0 4 4 HM_RD1 5 5 HM_WR0 6 6 HM_WR1 7 7 WDE_RD0 8 8 WDE_RD1 9 9 WDE_WR0 10 10 WDE_WR1 11 11 POP0 12 12 POP1 13 13 TAGFIFO0 14 14 TAGFIFO1 15 15 REPLAY0 16 16 REPLAY1 17 17 RDRET0 18 18 RDRET1 19 19 GECC2_RD0 20 20 GECC2_RD1 21 21 GECC2_WR0 22 22 GECC2_WR1 23 23 WCDR0 24 24 WCDR1 25 25 RTT0 26 26 RTT1 27 27 REM_RD0 28 28 REM_RD1 29 29 REM_WR0 30 30 REM_WR1 31 31 mmMC_ARB_DRAM_TIMING2_1 0 0x9ff 4 0 4294967295 RAS2RAS 0 7 RP 8 15 WRPLUSRP 16 23 BUS_TURN 24 28 mmMC_ARB_BURST_TIME 0 0xa02 4 0 4294967295 STATE0 0 4 STATE1 5 9 STATE2 10 14 STATE3 15 19 mmMC_CITF_XTRA_ENABLE 0 0x96d 18 0 4294967295 CB1_RD 0 0 CB1_WR 1 1 DB1_RD 2 2 DB1_WR 3 3 TC2_RD 4 4 ARB_DBG 8 11 TC2_WR 12 12 CB0_CONNECT_CNTL 13 14 DB0_CONNECT_CNTL 15 16 CB1_CONNECT_CNTL 17 18 DB1_CONNECT_CNTL 19 20 TC0_CONNECT_CNTL 21 22 TC1_CONNECT_CNTL 23 24 CB0_CID_CNTL_ENABLE 25 25 DB0_CID_CNTL_ENABLE 26 26 CB1_CID_CNTL_ENABLE 27 27 DB1_CID_CNTL_ENABLE 28 28 TC2_REPAIR_ENABLE 29 30 mmCC_MC_MAX_CHANNEL 0 0x96e 1 0 4294967295 NOOFCHAN 1 4 mmMC_CG_CONFIG 0 0x96f 6 0 4294967295 MCDW_WR_ENABLE 0 0 MCDX_WR_ENABLE 1 1 MCDY_WR_ENABLE 2 2 MCDZ_WR_ENABLE 3 3 MC_RD_ENABLE 4 5 INDEX 6 21 mmMC_CITF_CNTL 0 0x970 6 0 4294967295 IGNOREPM 2 2 EXEMPTPM 3 3 GFX_IDLE_OVERRIDE 4 5 MCD_SRBM_MASK_ENABLE 6 6 CNTR_CHMAP_MODE 7 8 REMOTE_RB_CONNECT_ENABLE 9 9 mmMC_CITF_CREDITS_VM 0 0x971 2 0 4294967295 READ_ALL 0 5 WRITE_ALL 6 11 mmMC_CITF_CREDITS_ARB_RD 0 0x972 5 0 4294967295 READ_LCL 0 7 READ_HUB 8 15 READ_PRI 16 23 LCL_PRI 24 24 HUB_PRI 25 25 mmMC_CITF_CREDITS_ARB_WR 0 0x973 5 0 4294967295 WRITE_LCL 0 7 WRITE_HUB 8 15 WRITE_PRI 16 23 HUB_PRI 24 24 LCL_PRI 25 25 mmMC_CITF_DAGB_CNTL 0 0x974 4 0 4294967295 JUMP_AHEAD 0 0 CENTER_RD_MAX_BURST 1 4 DISABLE_SELF_INIT 5 5 CENTER_WR_MAX_BURST 6 9 mmMC_CITF_INT_CREDITS 0 0x975 4 0 4294967295 REMRDRET 0 5 CNTR_RD_HUB_LP 12 17 CNTR_RD_HUB_HP 18 23 CNTR_RD_LCL 24 29 mmMC_CITF_RET_MODE 0 0x976 8 0 4294967295 INORDER_RD 0 0 INORDER_WR 1 1 REMPRI_RD 2 2 REMPRI_WR 3 3 LCLPRI_RD 4 4 LCLPRI_WR 5 5 RDRET_STALL_EN 6 6 RDRET_STALL_THRESHOLD 7 14 mmMC_CITF_DAGB_DLY 0 0x977 3 0 4294967295 DLY 0 4 CLI 16 21 POS 24 28 mmMC_RD_GRP_EXT 0 0x978 2 0 4294967295 DBSTEN0 0 3 TC0 4 7 mmMC_WR_GRP_EXT 0 0x979 2 0 4294967295 DBSTEN0 0 3 TC0 4 7 mmMC_CITF_REMREQ 0 0x97a 3 0 4294967295 READ_CREDITS 0 6 WRITE_CREDITS 7 13 CREDITS_ENABLE 14 14 mmMC_WR_TC0 0 0x97b 8 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAX_BURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 mmMC_WR_TC1 0 0x97c 8 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAX_BURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 mmMC_CITF_INT_CREDITS_WR 0 0x97d 2 0 4294967295 CNTR_WR_HUB 0 5 CNTR_WR_LCL 6 11 mmMC_CITF_WTM_RD_CNTL 0 0x97f 10 0 4294967295 GROUP0_DECREMENT 0 2 GROUP1_DECREMENT 3 5 GROUP2_DECREMENT 6 8 GROUP3_DECREMENT 9 11 GROUP4_DECREMENT 12 14 GROUP5_DECREMENT 15 17 GROUP6_DECREMENT 18 20 GROUP7_DECREMENT 21 23 DISABLE_REMOTE 24 24 DISABLE_LOCAL 25 25 mmMC_CITF_WTM_WR_CNTL 0 0x980 10 0 4294967295 GROUP0_DECREMENT 0 2 GROUP1_DECREMENT 3 5 GROUP2_DECREMENT 6 8 GROUP3_DECREMENT 9 11 GROUP4_DECREMENT 12 14 GROUP5_DECREMENT 15 17 GROUP6_DECREMENT 18 20 GROUP7_DECREMENT 21 23 DISABLE_REMOTE 24 24 DISABLE_LOCAL 25 25 mmMC_RD_CB 0 0x981 8 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAX_BURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 mmMC_RD_DB 0 0x982 8 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAX_BURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 mmMC_RD_TC0 0 0x983 8 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAX_BURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 mmMC_RD_TC1 0 0x984 8 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAX_BURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 mmMC_RD_HUB 0 0x985 8 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAX_BURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 mmMC_WR_CB 0 0x986 8 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAX_BURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 mmMC_WR_DB 0 0x987 8 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAX_BURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 mmMC_WR_HUB 0 0x988 8 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAX_BURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 mmMC_CITF_CREDITS_XBAR 0 0x989 2 0 4294967295 READ_LCL 0 7 WRITE_LCL 8 15 mmMC_RD_GRP_LCL 0 0x98a 5 0 4294967295 CB0 12 15 CBCMASK0 16 19 CBFMASK0 20 23 DB0 24 27 DBHTILE0 28 31 mmMC_WR_GRP_LCL 0 0x98b 7 0 4294967295 CB0 0 3 CBCMASK0 4 7 CBFMASK0 8 11 DB0 12 15 DBHTILE0 16 19 SX0 20 23 CBIMMED0 28 31 mmMC_CITF_PERF_MON_CNTL2 0 0x98e 1 0 4294967295 CID 0 7 mmMC_CITF_PERF_MON_RSLT2 0 0x991 13 0 4294967295 CB_RD_BUSY 6 6 DB_RD_BUSY 7 7 TC0_RD_BUSY 8 8 VC0_RD_BUSY 9 9 TC1_RD_BUSY 10 10 VC1_RD_BUSY 11 11 CB_WR_BUSY 12 12 DB_WR_BUSY 13 13 SX_WR_BUSY 14 14 TC2_RD_BUSY 15 15 TC0_WR_BUSY 16 16 TC1_WR_BUSY 17 17 TC2_WR_BUSY 18 18 mmMC_CITF_MISC_RD_CG 0 0x992 5 0 4294967295 ONDLY 0 5 OFFDLY 6 11 RDYDLY 12 17 ENABLE 18 18 MEM_LS_ENABLE 19 19 mmMC_CITF_MISC_WR_CG 0 0x993 5 0 4294967295 ONDLY 0 5 OFFDLY 6 11 RDYDLY 12 17 ENABLE 18 18 MEM_LS_ENABLE 19 19 mmMC_CITF_MISC_VM_CG 0 0x994 5 0 4294967295 ONDLY 0 5 OFFDLY 6 11 RDYDLY 12 17 ENABLE 18 18 MEM_LS_ENABLE 19 19 mmMC_HUB_MISC_POWER 0 0x82d 2 0 4294967295 SRBM_GATE_OVERRIDE 2 2 PM_BLACKOUT_CNTL 3 4 mmMC_HUB_MISC_HUB_CG 0 0x82e 5 0 4294967295 ONDLY 0 5 OFFDLY 6 11 RDYDLY 12 17 ENABLE 18 18 MEM_LS_ENABLE 19 19 mmMC_HUB_MISC_VM_CG 0 0x82f 5 0 4294967295 ONDLY 0 5 OFFDLY 6 11 RDYDLY 12 17 ENABLE 18 18 MEM_LS_ENABLE 19 19 mmMC_HUB_MISC_SIP_CG 0 0x830 5 0 4294967295 ONDLY 0 5 OFFDLY 6 11 RDYDLY 12 17 ENABLE 18 18 MEM_LS_ENABLE 19 19 mmMC_HUB_MISC_STATUS 0 0x832 14 0 4294967295 OUTSTANDING_READ 0 0 OUTSTANDING_WRITE 1 1 OUTSTANDING_HUB_RDREQ 2 2 OUTSTANDING_HUB_RDRET 3 3 OUTSTANDING_HUB_WRREQ 4 4 OUTSTANDING_HUB_WRRET 5 5 OUTSTANDING_RPB_READ 6 6 OUTSTANDING_RPB_WRITE 7 7 OUTSTANDING_MCD_READ 8 8 OUTSTANDING_MCD_WRITE 9 9 RPB_BUSY 10 10 WRITE_DEADLOCK_WARNING 11 11 READ_DEADLOCK_WARNING 12 12 GFX_BUSY 13 13 mmMC_HUB_MISC_OVERRIDE 0 0x833 1 0 4294967295 IDLE 0 1 mmMC_HUB_MISC_FRAMING 0 0x834 1 0 4294967295 BITS 0 31 mmMC_HUB_WDP_CNTL 0 0x835 15 0 4294967295 JUMPAHEAD_GBL0 1 1 JUMPAHEAD_GBL1 2 2 JUMPAHEAD_INTERNAL 3 3 OVERRIDE_STALL_ENABLE 4 4 DEBUG_REG 5 12 DISABLE_SELF_INIT_GBL0 13 13 DISABLE_SELF_INIT_GBL1 14 14 DISABLE_SELF_INIT_INTERNAL 15 15 FAIR_CH_SW 16 16 LCLWRREQ_BYPASS 17 17 DISP_WAIT_EOP 18 18 MCD_WAIT_EOP 19 19 SIP_WAIT_EOP 20 20 UVD_VCE_WRITE_PRI_EN 21 21 WRITE_PRI_EN 22 22 mmMC_HUB_WDP_ERR 0 0x836 2 0 4294967295 MGPU1_TARG_SYS 0 0 MGPU2_TARG_SYS 1 1 mmMC_HUB_WDP_BP 0 0x837 3 0 4294967295 ENABLE 0 0 RDRET 1 17 WRREQ 18 29 mmMC_HUB_WDP_STATUS 0 0x838 23 0 4294967295 SIP_AVAIL 0 0 MCDW_RD_AVAIL 1 1 MCDX_RD_AVAIL 2 2 MCDY_RD_AVAIL 3 3 MCDZ_RD_AVAIL 4 4 MCDS_RD_AVAIL 5 5 MCDT_RD_AVAIL 6 6 MCDU_RD_AVAIL 7 7 MCDV_RD_AVAIL 8 8 MCDW_WR_AVAIL 9 9 MCDX_WR_AVAIL 10 10 MCDY_WR_AVAIL 11 11 MCDZ_WR_AVAIL 12 12 MCDS_WR_AVAIL 13 13 MCDT_WR_AVAIL 14 14 MCDU_WR_AVAIL 15 15 MCDV_WR_AVAIL 16 16 GBL0_VM_FULL 17 17 GBL0_STOR_FULL 18 18 GBL0_BYPASS_STOR_FULL 19 19 GBL1_VM_FULL 20 20 GBL1_STOR_FULL 21 21 GBL1_BYPASS_STOR_FULL 22 22 mmMC_HUB_RDREQ_STATUS 0 0x839 16 0 4294967295 SIP_AVAIL 0 0 MCDW_RD_AVAIL 1 1 MCDX_RD_AVAIL 2 2 MCDY_RD_AVAIL 3 3 MCDZ_RD_AVAIL 4 4 MCDS_RD_AVAIL 5 5 MCDT_RD_AVAIL 6 6 MCDU_RD_AVAIL 7 7 MCDV_RD_AVAIL 8 8 GBL0_VM_FULL 9 9 GBL0_STOR_FULL 10 10 GBL0_BYPASS_STOR_FULL 11 11 GBL1_VM_FULL 12 12 GBL1_STOR_FULL 13 13 GBL1_BYPASS_STOR_FULL 14 14 PWRXPRESS_ERR 15 15 mmMC_HUB_WRRET_STATUS 0 0x83a 8 0 4294967295 MCDW_AVAIL 0 0 MCDX_AVAIL 1 1 MCDY_AVAIL 2 2 MCDZ_AVAIL 3 3 MCDS_AVAIL 4 4 MCDT_AVAIL 5 5 MCDU_AVAIL 6 6 MCDV_AVAIL 7 7 mmMC_HUB_RDREQ_CNTL 0 0x83b 19 0 4294967295 REMOTE_BLACKOUT 0 0 JUMPAHEAD_GBL0 2 2 JUMPAHEAD_GBL1 3 3 OVERRIDE_STALL_ENABLE 4 4 MCDW_STALL_MODE 5 5 MCDX_STALL_MODE 6 6 MCDY_STALL_MODE 7 7 MCDZ_STALL_MODE 8 8 MCDS_STALL_MODE 9 9 MCDT_STALL_MODE 10 10 MCDU_STALL_MODE 11 11 MCDV_STALL_MODE 12 12 BREAK_HDP_DEADLOCK 13 13 DEBUG_REG 14 20 DISABLE_SELF_INIT_GBL0 21 21 DISABLE_SELF_INIT_GBL1 22 22 PWRXPRESS_MODE 23 23 ACPG_HP_TO_MCD_OVERRIDE 24 24 GBL0_PRI_ENABLE 25 25 mmMC_HUB_WRRET_CNTL 0 0x83c 6 0 4294967295 JUMPAHEAD 0 0 BP 1 20 BP_ENABLE 21 21 DEBUG_REG 22 29 DISABLE_SELF_INIT 30 30 FAIR_CH_SW 31 31 mmMC_HUB_RDREQ_WTM_CNTL 0 0x83d 8 0 4294967295 GROUP0_DECREMENT 0 2 GROUP1_DECREMENT 3 5 GROUP2_DECREMENT 6 8 GROUP3_DECREMENT 9 11 GROUP4_DECREMENT 12 14 GROUP5_DECREMENT 15 17 GROUP6_DECREMENT 18 20 GROUP7_DECREMENT 21 23 mmMC_HUB_WDP_WTM_CNTL 0 0x83e 8 0 4294967295 GROUP0_DECREMENT 0 2 GROUP1_DECREMENT 3 5 GROUP2_DECREMENT 6 8 GROUP3_DECREMENT 9 11 GROUP4_DECREMENT 12 14 GROUP5_DECREMENT 15 17 GROUP6_DECREMENT 18 20 GROUP7_DECREMENT 21 23 mmMC_HUB_WDP_CREDITS 0 0x83f 4 0 4294967295 VM0 0 7 VM1 8 15 STOR0 16 23 STOR1 24 31 mmMC_HUB_WDP_CREDITS2 0 0x840 2 0 4294967295 STOR0_PRI 0 7 STOR1_PRI 8 15 mmMC_HUB_WDP_GBL0 0 0x841 5 0 4294967295 MAXBURST 0 3 LAZY_TIMER 4 7 STALL_THRESHOLD 8 15 STALL_MODE 16 16 STALL_THRESHOLD_PRI 17 24 mmMC_HUB_WDP_GBL1 0 0x842 5 0 4294967295 MAXBURST 0 3 LAZY_TIMER 4 7 STALL_THRESHOLD 8 15 STALL_MODE 16 16 STALL_THRESHOLD_PRI 17 24 mmMC_HUB_RDREQ_CREDITS 0 0x844 4 0 4294967295 VM0 0 7 VM1 8 15 STOR0 16 23 STOR1 24 31 mmMC_HUB_RDREQ_CREDITS2 0 0x845 2 0 4294967295 STOR0_PRI 0 7 STOR1_PRI 8 15 mmMC_HUB_SHARED_DAGB_DLY 0 0x846 3 0 4294967295 DLY 0 5 CLI 16 21 POS 24 28 mmMC_HUB_MISC_IDLE_STATUS 0 0x847 32 0 4294967295 OUTSTANDING_GFX_READ 0 0 OUTSTANDING_GFX_WRITE 1 1 OUTSTANDING_RLC_READ 2 2 OUTSTANDING_RLC_WRITE 3 3 OUTSTANDING_SDMA0_READ 4 4 OUTSTANDING_SDMA0_WRITE 5 5 OUTSTANDING_SDMA1_READ 6 6 OUTSTANDING_SDMA1_WRITE 7 7 OUTSTANDING_DISP_READ 8 8 OUTSTANDING_DISP_WRITE 9 9 OUTSTANDING_UVD_READ 10 10 OUTSTANDING_UVD_WRITE 11 11 OUTSTANDING_SMU_READ 12 12 OUTSTANDING_SMU_WRITE 13 13 OUTSTANDING_HDP_READ 14 14 OUTSTANDING_HDP_WRITE 15 15 OUTSTANDING_OTH_READ 16 16 OUTSTANDING_OTH_WRITE 17 17 OUTSTANDING_VMC_READ 18 18 OUTSTANDING_VMC_WRITE 19 19 OUTSTANDING_IA_READ 20 20 OUTSTANDING_IA_WRITE 21 21 OUTSTANDING_VCE_READ 22 22 OUTSTANDING_VCE_WRITE 23 23 OUTSTANDING_ACP_READ 24 24 OUTSTANDING_ACP_WRITE 25 25 OUTSTANDING_CP_READ 26 26 OUTSTANDING_CP_WRITE 27 27 OUTSTANDING_XDMA_READ 28 28 OUTSTANDING_XDMA_WRITE 29 29 OUTSTANDING_ISP_READ 30 30 OUTSTANDING_ISP_WRITE 31 31 mmMC_HUB_RDREQ_DMIF_LIMIT 0 0x848 2 0 4294967295 ENABLE 0 1 LIMIT_COUNT 2 6 mmMC_HUB_RDREQ_ACPG_LIMIT 0 0x849 2 0 4294967295 ENABLE 0 1 LIMIT_COUNT 2 6 mmMC_HUB_WDP_BYPASS_GBL0 0 0x84a 5 0 4294967295 ENABLE 0 0 CID1 1 8 CID2 9 16 HDP_PRIORITY_TIME 17 23 OTH_PRIORITY_TIME 24 30 mmMC_HUB_WDP_BYPASS_GBL1 0 0x84b 5 0 4294967295 ENABLE 0 0 CID1 1 8 CID2 9 16 HDP_PRIORITY_TIME 17 23 OTH_PRIORITY_TIME 24 30 mmMC_HUB_RDREQ_BYPASS_GBL0 0 0x84c 3 0 4294967295 ENABLE 0 0 CID1 1 8 CID2 9 16 mmMC_HUB_WDP_SH2 0 0x84d 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_SH3 0 0x84e 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_IA0 0 0x84f 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_IA1 0 0x850 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_MCDW 0 0x851 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 BUS 2 2 MAXBURST 3 6 LAZY_TIMER 7 10 ASK_CREDITS 11 17 DISPLAY_CREDITS 18 24 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_MCDX 0 0x852 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 BUS 2 2 MAXBURST 3 6 LAZY_TIMER 7 10 ASK_CREDITS 11 17 DISPLAY_CREDITS 18 24 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_MCDY 0 0x853 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 BUS 2 2 MAXBURST 3 6 LAZY_TIMER 7 10 ASK_CREDITS 11 17 DISPLAY_CREDITS 18 24 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_MCDZ 0 0x854 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 BUS 2 2 MAXBURST 3 6 LAZY_TIMER 7 10 ASK_CREDITS 11 17 DISPLAY_CREDITS 18 24 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_SIP 0 0x855 3 0 4294967295 ASK_CREDITS 0 6 DUMMY 7 7 DISPLAY_CREDITS 8 14 mmMC_HUB_RDREQ_GBL0 0 0x856 2 0 4294967295 STALL_THRESHOLD 0 7 STALL_THRESHOLD_PRI 8 15 mmMC_HUB_RDREQ_GBL1 0 0x857 2 0 4294967295 STALL_THRESHOLD 0 7 STALL_THRESHOLD_PRI 8 15 mmMC_HUB_RDREQ_SMU 0 0x858 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_CPG 0 0x859 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_SDMA0 0 0x85a 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_HDP 0 0x85b 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_SDMA1 0 0x85c 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_RLC 0 0x85d 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_SEM 0 0x85e 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_VCE 0 0x85f 10 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 VM_BYPASS 16 16 BYPASS_AVAIL_OVERRIDE 17 17 mmMC_HUB_RDREQ_UMC 0 0x860 10 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 VM_BYPASS 16 16 BYPASS_AVAIL_OVERRIDE 17 17 mmMC_HUB_RDREQ_UVD 0 0x861 10 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 VM_BYPASS 16 16 BYPASS_AVAIL_OVERRIDE 17 17 mmMC_HUB_RDREQ_IA 0 0x862 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_DMIF 0 0x863 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_MCIF 0 0x864 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_VMC 0 0x865 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_VCEU 0 0x866 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_MCDW 0 0x867 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 STALL_MODE 2 2 MAXBURST 3 6 ASK_CREDITS 7 12 LAZY_TIMER 13 16 STALL_THRESHOLD 17 23 ASK_CREDITS_W 24 30 mmMC_HUB_WDP_MCDX 0 0x868 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 STALL_MODE 2 2 MAXBURST 3 6 ASK_CREDITS 7 12 LAZY_TIMER 13 16 STALL_THRESHOLD 17 23 ASK_CREDITS_W 24 30 mmMC_HUB_WDP_MCDY 0 0x869 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 STALL_MODE 2 2 MAXBURST 3 6 ASK_CREDITS 7 12 LAZY_TIMER 13 16 STALL_THRESHOLD 17 23 ASK_CREDITS_W 24 30 mmMC_HUB_WDP_MCDZ 0 0x86a 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 STALL_MODE 2 2 MAXBURST 3 6 ASK_CREDITS 7 12 LAZY_TIMER 13 16 STALL_THRESHOLD 17 23 ASK_CREDITS_W 24 30 mmMC_HUB_WDP_SIP 0 0x86b 2 0 4294967295 STALL_MODE 0 1 ASK_CREDITS 2 8 mmMC_HUB_WDP_CPG 0 0x86c 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_SDMA1 0 0x86d 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_SH0 0 0x86e 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_MCIF 0 0x86f 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_VCE 0 0x870 10 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 VM_BYPASS 16 16 BYPASS_AVAIL_OVERRIDE 17 17 mmMC_HUB_WDP_XDP 0 0x871 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_IH 0 0x872 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_RLC 0 0x873 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_SEM 0 0x874 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_SMU 0 0x875 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_SH1 0 0x876 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_UMC 0 0x877 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_UVD 0 0x878 10 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 VM_BYPASS 16 16 BYPASS_AVAIL_OVERRIDE 17 17 mmMC_HUB_WDP_HDP 0 0x879 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_SDMA0 0 0x87a 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WRRET_MCDW 0 0x87b 2 0 4294967295 STALL_MODE 0 0 CREDIT_COUNT 1 7 mmMC_HUB_WRRET_MCDX 0 0x87c 2 0 4294967295 STALL_MODE 0 0 CREDIT_COUNT 1 7 mmMC_HUB_WRRET_MCDY 0 0x87d 2 0 4294967295 STALL_MODE 0 0 CREDIT_COUNT 1 7 mmMC_HUB_WRRET_MCDZ 0 0x87e 2 0 4294967295 STALL_MODE 0 0 CREDIT_COUNT 1 7 mmMC_HUB_WDP_VCEU 0 0x87f 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_XDMAM 0 0x880 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_XDMA 0 0x881 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_XDMAM 0 0x882 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_ACPG 0 0x883 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_RDREQ_ACPO 0 0x884 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_RDREQ_SAM 0 0x885 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_ACPG 0 0x886 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_WDP_ACPO 0 0x887 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_WDP_SAM 0 0x888 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_CPC 0 0x889 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_CPF 0 0x88a 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_CPC 0 0x88b 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_WDP_CPF 0 0x88c 9 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 mmMC_HUB_RDREQ_ISP_SPM 0 0xde0 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_RDREQ_ISP_MPM 0 0xde1 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_RDREQ_ISP_CCPU 0 0xde2 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_WDP_ISP_SPM 0 0xde3 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_WDP_ISP_MPS 0 0xde4 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_WDP_ISP_MPM 0 0xde5 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_WDP_ISP_CCPU 0 0xde6 12 0 4294967295 ENABLE 0 0 PRESCALE 1 2 BLACKOUT_EXEMPT 3 3 STALL_MODE 4 5 STALL_OVERRIDE 6 6 MAXBURST 7 10 LAZY_TIMER 11 14 STALL_OVERRIDE_WTM 15 15 BYPASS_AVAIL_OVERRIDE 16 16 PRIORITY_DISABLE 17 17 STALL_FILTER_ENABLE 18 18 STALL_THRESHOLD 19 24 mmMC_HUB_RDREQ_MCDS 0 0xde7 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 BUS 2 2 MAXBURST 3 6 LAZY_TIMER 7 10 ASK_CREDITS 11 17 DISPLAY_CREDITS 18 24 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_MCDT 0 0xde8 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 BUS 2 2 MAXBURST 3 6 LAZY_TIMER 7 10 ASK_CREDITS 11 17 DISPLAY_CREDITS 18 24 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_MCDU 0 0xde9 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 BUS 2 2 MAXBURST 3 6 LAZY_TIMER 7 10 ASK_CREDITS 11 17 DISPLAY_CREDITS 18 24 STALL_THRESHOLD 25 31 mmMC_HUB_RDREQ_MCDV 0 0xdea 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 BUS 2 2 MAXBURST 3 6 LAZY_TIMER 7 10 ASK_CREDITS 11 17 DISPLAY_CREDITS 18 24 STALL_THRESHOLD 25 31 mmMC_HUB_WDP_MCDS 0 0xdeb 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 STALL_MODE 2 2 MAXBURST 3 6 ASK_CREDITS 7 12 LAZY_TIMER 13 16 STALL_THRESHOLD 17 23 ASK_CREDITS_W 24 30 mmMC_HUB_WDP_MCDT 0 0xdec 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 STALL_MODE 2 2 MAXBURST 3 6 ASK_CREDITS 7 12 LAZY_TIMER 13 16 STALL_THRESHOLD 17 23 ASK_CREDITS_W 24 30 mmMC_HUB_WDP_MCDU 0 0xded 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 STALL_MODE 2 2 MAXBURST 3 6 ASK_CREDITS 7 12 LAZY_TIMER 13 16 STALL_THRESHOLD 17 23 ASK_CREDITS_W 24 30 mmMC_HUB_WDP_MCDV 0 0xdee 8 0 4294967295 ENABLE 0 0 BLACKOUT_EXEMPT 1 1 STALL_MODE 2 2 MAXBURST 3 6 ASK_CREDITS 7 12 LAZY_TIMER 13 16 STALL_THRESHOLD 17 23 ASK_CREDITS_W 24 30 mmMC_HUB_WRRET_MCDS 0 0xdef 2 0 4294967295 STALL_MODE 0 0 CREDIT_COUNT 1 7 mmMC_HUB_WRRET_MCDT 0 0xdf0 2 0 4294967295 STALL_MODE 0 0 CREDIT_COUNT 1 7 mmMC_HUB_WRRET_MCDU 0 0xdf1 2 0 4294967295 STALL_MODE 0 0 CREDIT_COUNT 1 7 mmMC_HUB_WRRET_MCDV 0 0xdf2 2 0 4294967295 STALL_MODE 0 0 CREDIT_COUNT 1 7 mmMC_HUB_WDP_CREDITS_MCDW 0 0xdf3 2 0 4294967295 WR_PRI 0 6 WR_PRI_STALL_THRESHOLD 7 13 mmMC_HUB_WDP_CREDITS_MCDX 0 0xdf4 2 0 4294967295 WR_PRI 0 6 WR_PRI_STALL_THRESHOLD 7 13 mmMC_HUB_WDP_CREDITS_MCDY 0 0xdf5 2 0 4294967295 WR_PRI 0 6 WR_PRI_STALL_THRESHOLD 7 13 mmMC_HUB_WDP_CREDITS_MCDZ 0 0xdf6 2 0 4294967295 WR_PRI 0 6 WR_PRI_STALL_THRESHOLD 7 13 mmMC_HUB_WDP_CREDITS_MCDS 0 0xdf7 2 0 4294967295 WR_PRI 0 6 WR_PRI_STALL_THRESHOLD 7 13 mmMC_HUB_WDP_CREDITS_MCDT 0 0xdf8 2 0 4294967295 WR_PRI 0 6 WR_PRI_STALL_THRESHOLD 7 13 mmMC_HUB_WDP_CREDITS_MCDU 0 0xdf9 2 0 4294967295 WR_PRI 0 6 WR_PRI_STALL_THRESHOLD 7 13 mmMC_HUB_WDP_CREDITS_MCDV 0 0xdfa 2 0 4294967295 WR_PRI 0 6 WR_PRI_STALL_THRESHOLD 7 13 mmMC_HUB_WDP_BP2 0 0xdfb 1 0 4294967295 RDRET 0 15 mmMC_RPB_CONF 0 0x94d 3 0 4294967295 XPB_PCIE_ORDER 15 15 RPB_RD_PCIE_ORDER 16 16 RPB_WR_PCIE_ORDER 17 17 mmMC_RPB_IF_CONF 0 0x94e 2 0 4294967295 RPB_BIF_CREDITS 0 7 OUTSTANDING_WRRET_ASK 8 15 mmMC_RPB_DBG1 0 0x94f 3 0 4294967295 RPB_BIF_OUTSTANDING_RD 0 7 RPB_BIF_OUTSTANDING_RD_32B 8 19 DEBUG_BITS 20 31 mmMC_RPB_EFF_CNTL 0 0x950 2 0 4294967295 WR_LAZY_TIMER 0 7 RD_LAZY_TIMER 8 15 mmMC_RPB_ARB_CNTL 0 0x951 3 0 4294967295 WR_SWITCH_NUM 0 7 RD_SWITCH_NUM 8 15 ATC_SWITCH_NUM 16 23 mmMC_RPB_BIF_CNTL 0 0x952 2 0 4294967295 ARB_SWITCH_NUM 0 7 XPB_SWITCH_NUM 8 15 mmMC_RPB_WR_SWITCH_CNTL 0 0x953 4 0 4294967295 QUEUE0_SWITCH_NUM 0 7 QUEUE1_SWITCH_NUM 8 15 QUEUE2_SWITCH_NUM 16 23 QUEUE3_SWITCH_NUM 24 31 mmMC_RPB_WR_COMBINE_CNTL 0 0x954 4 0 4294967295 WC_ENABLE 0 0 WC_MAX_PACKET_SIZE 1 2 WC_FLUSH_TIMER 3 6 WC_ALIGN 7 7 mmMC_RPB_RD_SWITCH_CNTL 0 0x955 4 0 4294967295 QUEUE0_SWITCH_NUM 0 7 QUEUE1_SWITCH_NUM 8 15 QUEUE2_SWITCH_NUM 16 23 QUEUE3_SWITCH_NUM 24 31 mmMC_RPB_CID_QUEUE_WR 0 0x956 5 0 4294967295 CLIENT_ID 0 7 UPDATE_MODE 8 8 WRITE_QUEUE 9 10 READ_QUEUE 11 12 UPDATE 13 13 mmMC_RPB_CID_QUEUE_RD 0 0x957 3 0 4294967295 CLIENT_ID 0 7 WRITE_QUEUE 8 9 READ_QUEUE 10 11 mmMC_RPB_PERF_COUNTER_CNTL 0 0x958 9 0 4294967295 PERF_COUNTER_SELECT 0 1 CLEAR_SELECTED_PERF_COUNTER 2 2 CLEAR_ALL_PERF_COUNTERS 3 3 STOP_ON_COUNTER_SATURATION 4 4 ENABLE_PERF_COUNTERS 5 8 PERF_COUNTER_ASSIGN_0 9 13 PERF_COUNTER_ASSIGN_1 14 18 PERF_COUNTER_ASSIGN_2 19 23 PERF_COUNTER_ASSIGN_3 24 28 mmMC_RPB_PERF_COUNTER_STATUS 0 0x959 1 0 4294967295 PERFORMANCE_COUNTER_VALUE 0 31 mmMC_RPB_CID_QUEUE_EX 0 0x95a 2 0 4294967295 START 0 0 OFFSET 1 5 mmMC_RPB_CID_QUEUE_EX_DATA 0 0x95b 2 0 4294967295 WRITE_ENTRIES 0 15 READ_ENTRIES 16 31 mmMC_RPB_TCI_CNTL 0 0x95c 7 0 4294967295 TCI_ENABLE 0 0 TCI_POLICY 1 2 TCI_VOL 3 3 TCI_VMID 4 7 TCI_REQ_CREDITS 8 15 TCI_MAX_WRITES 16 23 TCI_MAX_READS 24 31 mmMC_SHARED_CHMAP 0 0x801 6 0 4294967295 CHAN0 0 3 CHAN1 4 7 CHAN2 8 11 NOOFCHAN 12 15 CHAN3 16 19 CHAN4 20 23 mmMC_SHARED_CHREMAP 0 0x802 8 0 4294967295 CHAN0 0 3 CHAN1 4 7 CHAN2 8 11 CHAN3 12 15 CHAN4 16 19 CHAN5 20 23 CHAN6 24 27 CHAN7 28 31 mmMC_RD_GRP_GFX 0 0x803 7 0 4294967295 CP 0 3 SH 4 7 IA 8 11 ACPG 12 15 ACPO 16 19 ISP 20 23 XDMAM 24 27 mmMC_WR_GRP_GFX 0 0x804 7 0 4294967295 CP 0 3 SH 4 7 ACPG 8 11 ACPO 12 15 ISP 16 19 XDMA 20 23 XDMAM 24 27 mmMC_RD_GRP_SYS 0 0x805 8 0 4294967295 RLC 0 3 VMC 4 7 SDMA1 8 11 DMIF 12 15 MCIF 16 19 SMU 20 23 VCE 24 27 VCEU 28 31 mmMC_WR_GRP_SYS 0 0x806 8 0 4294967295 IH 0 3 MCIF 4 7 RLC 8 11 SAM 12 15 SMU 16 19 SDMA1 20 23 VCE 24 27 VCEU 28 31 mmMC_RD_GRP_OTH 0 0x807 8 0 4294967295 UVD_EXT0 0 3 SDMA0 4 7 HDP 8 11 SEM 12 15 UMC 16 19 UVD 20 23 UVD_EXT1 24 27 SAM 28 31 mmMC_WR_GRP_OTH 0 0x808 8 0 4294967295 UVD_EXT0 0 3 SDMA0 4 7 HDP 8 11 SEM 12 15 UMC 16 19 UVD 20 23 XDP 24 27 UVD_EXT1 28 31 mmMC_VM_FB_LOCATION 0 0x809 2 0 4294967295 FB_BASE 0 15 FB_TOP 16 31 mmMC_VM_AGP_TOP 0 0x80a 1 0 4294967295 AGP_TOP 0 17 mmMC_VM_AGP_BOT 0 0x80b 1 0 4294967295 AGP_BOT 0 17 mmMC_VM_AGP_BASE 0 0x80c 1 0 4294967295 AGP_BASE 0 17 mmMC_VM_SYSTEM_APERTURE_LOW_ADDR 0 0x80d 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR 0 0x80e 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0 0x80f 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmMC_VM_DC_WRITE_CNTL 0 0x810 6 0 4294967295 DC_WRITE_HIT_REGION_0_MODE 0 1 DC_WRITE_HIT_REGION_1_MODE 2 3 DC_WRITE_HIT_REGION_2_MODE 4 5 DC_WRITE_HIT_REGION_3_MODE 6 7 DC_MEMORY_WRITE_LOCAL 8 8 DC_MEMORY_WRITE_SYSTEM 9 9 mmMC_VM_DC_WRITE_HIT_REGION_0_LOW_ADDR 0 0x811 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_1_LOW_ADDR 0 0x812 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_2_LOW_ADDR 0 0x813 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_3_LOW_ADDR 0 0x814 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_0_HIGH_ADDR 0 0x815 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_1_HIGH_ADDR 0 0x816 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_2_HIGH_ADDR 0 0x817 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_DC_WRITE_HIT_REGION_3_HIGH_ADDR 0 0x818 1 0 4294967295 PHYSICAL_ADDRESS 0 27 mmMC_VM_MX_L1_TLB_CNTL 0 0x819 6 0 4294967295 ENABLE_L1_TLB 0 0 ENABLE_L1_FRAGMENT_PROCESSING 1 1 SYSTEM_ACCESS_MODE 3 4 SYSTEM_APERTURE_UNMAPPED_ACCESS 5 5 ENABLE_ADVANCED_DRIVER_MODEL 6 6 ECO_BITS 7 10 mmMC_VM_FB_OFFSET 0 0x81a 1 0 4294967295 FB_OFFSET 0 17 mmMC_VM_STEERING 0 0x81b 1 0 4294967295 DEFAULT_STEERING 0 1 mmMC_SHARED_CHREMAP2 0 0x81c 8 0 4294967295 CHAN8 0 3 CHAN9 4 7 CHAN10 8 11 CHAN11 12 15 CHAN12 16 19 CHAN13 20 23 CHAN14 24 27 CHAN15 28 31 mmMC_CONFIG_MCD 0 0x828 13 0 4294967295 MCD0_WR_ENABLE 0 0 MCD1_WR_ENABLE 1 1 MCD2_WR_ENABLE 2 2 MCD3_WR_ENABLE 3 3 MCD4_WR_ENABLE 4 4 MCD5_WR_ENABLE 5 5 MCD6_WR_ENABLE 6 6 MCD7_WR_ENABLE 7 7 MC_RD_ENABLE 8 10 MC_RD_ENABLE_SUB 11 11 ARB0_WR_ENABLE 12 12 ARB1_WR_ENABLE 13 13 MCD_INDEX_MODE_ENABLE 31 31 mmMC_CG_CONFIG_MCD 0 0x829 11 0 4294967295 MCD0_WR_ENABLE 0 0 MCD1_WR_ENABLE 1 1 MCD2_WR_ENABLE 2 2 MCD3_WR_ENABLE 3 3 MCD4_WR_ENABLE 4 4 MCD5_WR_ENABLE 5 5 MCD6_WR_ENABLE 6 6 MCD7_WR_ENABLE 7 7 MC_RD_ENABLE 8 10 MC_RD_ENABLE_SUB 11 11 INDEX 13 28 mmMC_MEM_POWER_LS 0 0x82a 2 0 4294967295 LS_SETUP 0 5 LS_HOLD 6 11 mmMC_SHARED_BLACKOUT_CNTL 0 0x82b 1 0 4294967295 BLACKOUT_MODE 0 2 mmMC_VM_MB_L1_TLB0_DEBUG 0 0x891 6 0 4294967295 INVALIDATE_L1_TLB 0 0 SEND_FREE_AT_RTN 8 8 EFFECTIVE_L1_TLB_SIZE 9 11 EFFECTIVE_L1_QUEUE_SIZE 12 14 L1_TLB_DEBUG 15 18 L1_TLB_FORCE_MISS 19 19 mmMC_VM_MB_L1_TLB2_DEBUG 0 0x893 6 0 4294967295 INVALIDATE_L1_TLB 0 0 SEND_FREE_AT_RTN 8 8 EFFECTIVE_L1_TLB_SIZE 9 11 EFFECTIVE_L1_QUEUE_SIZE 12 14 L1_TLB_DEBUG 15 18 L1_TLB_FORCE_MISS 19 19 mmMC_VM_MB_L1_TLB0_STATUS 0 0x895 1 0 4294967295 BUSY 0 0 mmMC_VM_MB_L1_TLB1_STATUS 0 0x896 1 0 4294967295 BUSY 0 0 mmMC_VM_MB_L1_TLB2_STATUS 0 0x897 1 0 4294967295 BUSY 0 0 mmMC_VM_MB_L2ARBITER_L2_CREDITS 0 0x8a1 1 0 4294967295 L2_IF_CREDITS 0 5 mmMC_VM_MB_L1_TLB3_DEBUG 0 0x8a5 6 0 4294967295 INVALIDATE_L1_TLB 0 0 SEND_FREE_AT_RTN 8 8 EFFECTIVE_L1_TLB_SIZE 9 11 EFFECTIVE_L1_QUEUE_SIZE 12 14 L1_TLB_DEBUG 15 18 L1_TLB_FORCE_MISS 19 19 mmMC_VM_MB_L1_TLB3_STATUS 0 0x8a6 1 0 4294967295 BUSY 0 0 mmMC_VM_MD_L1_TLB0_DEBUG 0 0x998 6 0 4294967295 INVALIDATE_L1_TLB 0 0 SEND_FREE_AT_RTN 8 8 EFFECTIVE_L1_TLB_SIZE 9 11 EFFECTIVE_L1_QUEUE_SIZE 12 14 L1_TLB_DEBUG 15 18 L1_TLB_FORCE_MISS 19 19 mmMC_VM_MD_L1_TLB1_DEBUG 0 0x999 6 0 4294967295 INVALIDATE_L1_TLB 0 0 SEND_FREE_AT_RTN 8 8 EFFECTIVE_L1_TLB_SIZE 9 11 EFFECTIVE_L1_QUEUE_SIZE 12 14 L1_TLB_DEBUG 15 18 L1_TLB_FORCE_MISS 19 19 mmMC_VM_MD_L1_TLB2_DEBUG 0 0x99a 6 0 4294967295 INVALIDATE_L1_TLB 0 0 SEND_FREE_AT_RTN 8 8 EFFECTIVE_L1_TLB_SIZE 9 11 EFFECTIVE_L1_QUEUE_SIZE 12 14 L1_TLB_DEBUG 15 18 L1_TLB_FORCE_MISS 19 19 mmMC_VM_MD_L1_TLB0_STATUS 0 0x99b 1 0 4294967295 BUSY 0 0 mmMC_VM_MD_L1_TLB1_STATUS 0 0x99c 1 0 4294967295 BUSY 0 0 mmMC_VM_MD_L1_TLB2_STATUS 0 0x99d 1 0 4294967295 BUSY 0 0 mmMC_VM_MD_L2ARBITER_L2_CREDITS 0 0x9a4 1 0 4294967295 L2_IF_CREDITS 0 5 mmMC_VM_MD_L1_TLB3_DEBUG 0 0x9a7 6 0 4294967295 INVALIDATE_L1_TLB 0 0 SEND_FREE_AT_RTN 8 8 EFFECTIVE_L1_TLB_SIZE 9 11 EFFECTIVE_L1_QUEUE_SIZE 12 14 L1_TLB_DEBUG 15 18 L1_TLB_FORCE_MISS 19 19 mmMC_VM_MD_L1_TLB3_STATUS 0 0x9a8 1 0 4294967295 BUSY 0 0 mmMC_XPB_RTR_SRC_APRTR0 0 0x8cd 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR1 0 0x8ce 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR2 0 0x8cf 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR3 0 0x8d0 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR4 0 0x8d1 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR5 0 0x8d2 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR6 0 0x8d3 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR7 0 0x8d4 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR8 0 0x8d5 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_SRC_APRTR9 0 0x8d6 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_XDMA_RTR_SRC_APRTR0 0 0x8d7 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_XDMA_RTR_SRC_APRTR1 0 0x8d8 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_XDMA_RTR_SRC_APRTR2 0 0x8d9 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_XDMA_RTR_SRC_APRTR3 0 0x8da 1 0 4294967295 BASE_ADDR 0 24 mmMC_XPB_RTR_DEST_MAP0 0 0x8db 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_RTR_DEST_MAP1 0 0x8dc 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_RTR_DEST_MAP2 0 0x8dd 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_RTR_DEST_MAP3 0 0x8de 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_RTR_DEST_MAP4 0 0x8df 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_RTR_DEST_MAP5 0 0x8e0 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_RTR_DEST_MAP6 0 0x8e1 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_RTR_DEST_MAP7 0 0x8e2 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_RTR_DEST_MAP8 0 0x8e3 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_RTR_DEST_MAP9 0 0x8e4 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_XDMA_RTR_DEST_MAP0 0 0x8e5 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_XDMA_RTR_DEST_MAP1 0 0x8e6 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_XDMA_RTR_DEST_MAP2 0 0x8e7 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_XDMA_RTR_DEST_MAP3 0 0x8e8 6 0 4294967295 NMR 0 0 DEST_OFFSET 1 19 DEST_SEL 20 23 DEST_SEL_RPB 24 24 SIDE_OK 25 25 APRTR_SIZE 26 30 mmMC_XPB_CLG_CFG0 0 0x8e9 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG1 0 0x8ea 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG2 0 0x8eb 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG3 0 0x8ec 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG4 0 0x8ed 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG5 0 0x8ee 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG6 0 0x8ef 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG7 0 0x8f0 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG8 0 0x8f1 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG9 0 0x8f2 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG10 0 0x8f3 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG11 0 0x8f4 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG12 0 0x8f5 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG13 0 0x8f6 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG14 0 0x8f7 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG15 0 0x8f8 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG16 0 0x8f9 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG17 0 0x8fa 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG18 0 0x8fb 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG19 0 0x8fc 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_EXTRA 0 0x8fd 5 0 4294967295 CMP0 0 7 MSK0 8 15 VLD0 16 16 CMP1 17 24 VLD1 25 25 mmMC_XPB_LB_ADDR 0 0x8fe 4 0 4294967295 CMP0 0 9 MASK0 10 19 CMP1 20 25 MASK1 26 31 mmMC_XPB_UNC_THRESH_HST 0 0x8ff 3 0 4294967295 CHANGE_PREF 0 5 STRONG_PREF 6 11 USE_UNFULL 12 17 mmMC_XPB_UNC_THRESH_SID 0 0x900 3 0 4294967295 CHANGE_PREF 0 5 STRONG_PREF 6 11 USE_UNFULL 12 17 mmMC_XPB_WCB_STS 0 0x901 3 0 4294967295 PBUF_VLD 0 15 WCB_HST_DATA_BUF_CNT 16 22 WCB_SID_DATA_BUF_CNT 23 29 mmMC_XPB_WCB_CFG 0 0x902 3 0 4294967295 TIMEOUT 0 15 HST_MAX 16 17 SID_MAX 18 19 mmMC_XPB_P2P_BAR_CFG 0 0x903 9 0 4294967295 ADDR_SIZE 0 3 SEND_BAR 4 5 SNOOP 6 6 SEND_DIS 7 7 COMPRESS_DIS 8 8 UPDATE_DIS 9 9 REGBAR_FROM_SYSBAR 10 10 RD_EN 11 11 ATC_TRANSLATED 12 12 mmMC_XPB_P2P_BAR0 0 0x904 8 0 4294967295 HOST_FLUSH 0 3 REG_SYS_BAR 4 7 MEM_SYS_BAR 8 11 VALID 12 12 SEND_DIS 13 13 COMPRESS_DIS 14 14 RESERVED 15 15 ADDRESS 16 31 mmMC_XPB_P2P_BAR1 0 0x905 8 0 4294967295 HOST_FLUSH 0 3 REG_SYS_BAR 4 7 MEM_SYS_BAR 8 11 VALID 12 12 SEND_DIS 13 13 COMPRESS_DIS 14 14 RESERVED 15 15 ADDRESS 16 31 mmMC_XPB_P2P_BAR2 0 0x906 8 0 4294967295 HOST_FLUSH 0 3 REG_SYS_BAR 4 7 MEM_SYS_BAR 8 11 VALID 12 12 SEND_DIS 13 13 COMPRESS_DIS 14 14 RESERVED 15 15 ADDRESS 16 31 mmMC_XPB_P2P_BAR3 0 0x907 8 0 4294967295 HOST_FLUSH 0 3 REG_SYS_BAR 4 7 MEM_SYS_BAR 8 11 VALID 12 12 SEND_DIS 13 13 COMPRESS_DIS 14 14 RESERVED 15 15 ADDRESS 16 31 mmMC_XPB_P2P_BAR4 0 0x908 8 0 4294967295 HOST_FLUSH 0 3 REG_SYS_BAR 4 7 MEM_SYS_BAR 8 11 VALID 12 12 SEND_DIS 13 13 COMPRESS_DIS 14 14 RESERVED 15 15 ADDRESS 16 31 mmMC_XPB_P2P_BAR5 0 0x909 8 0 4294967295 HOST_FLUSH 0 3 REG_SYS_BAR 4 7 MEM_SYS_BAR 8 11 VALID 12 12 SEND_DIS 13 13 COMPRESS_DIS 14 14 RESERVED 15 15 ADDRESS 16 31 mmMC_XPB_P2P_BAR6 0 0x90a 8 0 4294967295 HOST_FLUSH 0 3 REG_SYS_BAR 4 7 MEM_SYS_BAR 8 11 VALID 12 12 SEND_DIS 13 13 COMPRESS_DIS 14 14 RESERVED 15 15 ADDRESS 16 31 mmMC_XPB_P2P_BAR7 0 0x90b 8 0 4294967295 HOST_FLUSH 0 3 REG_SYS_BAR 4 7 MEM_SYS_BAR 8 11 VALID 12 12 SEND_DIS 13 13 COMPRESS_DIS 14 14 RESERVED 15 15 ADDRESS 16 31 mmMC_XPB_P2P_BAR_SETUP 0 0x90c 7 0 4294967295 SEL 0 7 REG_SYS_BAR 8 11 VALID 12 12 SEND_DIS 13 13 COMPRESS_DIS 14 14 RESERVED 15 15 ADDRESS 16 31 mmMC_XPB_P2P_BAR_DEBUG 0 0x90d 3 0 4294967295 SEL 0 7 HOST_FLUSH 8 11 MEM_SYS_BAR 12 15 mmMC_XPB_P2P_BAR_DELTA_ABOVE 0 0x90e 2 0 4294967295 EN 0 7 DELTA 8 27 mmMC_XPB_P2P_BAR_DELTA_BELOW 0 0x90f 2 0 4294967295 EN 0 7 DELTA 8 27 mmMC_XPB_PEER_SYS_BAR0 0 0x910 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_PEER_SYS_BAR1 0 0x911 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_PEER_SYS_BAR2 0 0x912 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_PEER_SYS_BAR3 0 0x913 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_PEER_SYS_BAR4 0 0x914 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_PEER_SYS_BAR5 0 0x915 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_PEER_SYS_BAR6 0 0x916 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_PEER_SYS_BAR7 0 0x917 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_PEER_SYS_BAR8 0 0x918 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_PEER_SYS_BAR9 0 0x919 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_XDMA_PEER_SYS_BAR0 0 0x91a 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_XDMA_PEER_SYS_BAR1 0 0x91b 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_XDMA_PEER_SYS_BAR2 0 0x91c 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_XDMA_PEER_SYS_BAR3 0 0x91d 3 0 4294967295 VALID 0 0 SIDE_OK 1 1 ADDR 2 26 mmMC_XPB_CLK_GAT 0 0x91e 5 0 4294967295 ONDLY 0 5 OFFDLY 6 11 RDYDLY 12 17 ENABLE 18 18 MEM_LS_ENABLE 19 19 mmMC_XPB_INTF_CFG 0 0x91f 11 0 4294967295 RPB_WRREQ_CRD 0 7 MC_WRRET_ASK 8 15 XSP_REQ_CRD 16 22 BIF_REG_SNOOP_SEL 23 23 BIF_REG_SNOOP_VAL 24 24 BIF_MEM_SNOOP_SEL 25 25 BIF_MEM_SNOOP_VAL 26 26 XSP_SNOOP_SEL 27 28 XSP_SNOOP_VAL 29 29 XSP_ORDERING_SEL 30 30 XSP_ORDERING_VAL 31 31 mmMC_XPB_INTF_STS 0 0x920 7 0 4294967295 RPB_WRREQ_CRD 0 7 XSP_REQ_CRD 8 14 HOP_DATA_BUF_FULL 15 15 HOP_ATTR_BUF_FULL 16 16 CNS_BUF_FULL 17 17 CNS_BUF_BUSY 18 18 RPB_RDREQ_CRD 19 26 mmMC_XPB_PIPE_STS 0 0x921 13 0 4294967295 WCB_ANY_PBUF 0 0 WCB_HST_DATA_BUF_CNT 1 7 WCB_SID_DATA_BUF_CNT 8 14 WCB_HST_RD_PTR_BUF_FULL 15 15 WCB_SID_RD_PTR_BUF_FULL 16 16 WCB_HST_REQ_FIFO_FULL 17 17 WCB_SID_REQ_FIFO_FULL 18 18 WCB_HST_REQ_OBUF_FULL 19 19 WCB_SID_REQ_OBUF_FULL 20 20 WCB_HST_DATA_OBUF_FULL 21 21 WCB_SID_DATA_OBUF_FULL 22 22 RET_BUF_FULL 23 23 XPB_CLK_BUSY_BITS 24 31 mmMC_XPB_SUB_CTRL 0 0x922 20 0 4294967295 WRREQ_BYPASS_XPB 0 0 STALL_CNS_RTR_REQ 1 1 STALL_RTR_RPB_WRREQ 2 2 STALL_RTR_MAP_REQ 3 3 STALL_MAP_WCB_REQ 4 4 STALL_WCB_SID_REQ 5 5 STALL_MC_XSP_REQ_SEND 6 6 STALL_WCB_HST_REQ 7 7 STALL_HST_HOP_REQ 8 8 STALL_XPB_RPB_REQ_ATTR 9 9 RESET_CNS 10 10 RESET_RTR 11 11 RESET_RET 12 12 RESET_MAP 13 13 RESET_WCB 14 14 RESET_HST 15 15 RESET_HOP 16 16 RESET_SID 17 17 RESET_SRB 18 18 RESET_CGR 19 19 mmMC_XPB_MAP_INVERT_FLUSH_NUM_LSB 0 0x923 1 0 4294967295 ALTER_FLUSH_NUM 0 15 mmMC_XPB_PERF_KNOBS 0 0x924 3 0 4294967295 CNS_FIFO_DEPTH 0 5 WCB_HST_FIFO_DEPTH 6 11 WCB_SID_FIFO_DEPTH 12 17 mmMC_XPB_STICKY 0 0x925 1 0 4294967295 BITS 0 31 mmMC_XPB_STICKY_W1C 0 0x926 1 0 4294967295 BITS 0 31 mmMC_XPB_MISC_CFG 0 0x927 5 0 4294967295 FIELDNAME0 0 7 FIELDNAME1 8 15 FIELDNAME2 16 23 FIELDNAME3 24 30 TRIGGERNAME 31 31 mmMC_XPB_CLG_CFG20 0 0x928 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG21 0 0x929 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG22 0 0x92a 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG23 0 0x92b 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG24 0 0x92c 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG25 0 0x92d 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG26 0 0x92e 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG27 0 0x92f 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG28 0 0x930 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG29 0 0x931 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG30 0 0x932 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG31 0 0x933 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_INTF_CFG2 0 0x934 1 0 4294967295 RPB_RDREQ_CRD 0 7 mmMC_XPB_CLG_EXTRA_RD 0 0x935 5 0 4294967295 CMP0 0 7 MSK0 8 15 VLD0 16 16 CMP1 17 24 VLD1 25 25 mmMC_XPB_CLG_CFG32 0 0x936 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG33 0 0x937 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG34 0 0x938 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG35 0 0x939 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XPB_CLG_CFG36 0 0x93a 5 0 4294967295 WCB_NUM 0 3 LB_TYPE 4 6 P2P_BAR 7 9 HOST_FLUSH 10 13 SIDE_FLUSH 14 17 mmMC_XBAR_ADDR_DEC 0 0xc80 4 0 4294967295 NO_DIV_BY_3 0 0 GECC 1 1 RB_SPLIT 2 2 RB_SPLIT_COLHI 3 3 mmMC_XBAR_REMOTE 0 0xc81 2 0 4294967295 WRREQ_EN_GOQ 0 0 RDREQ_EN_GOQ 1 1 mmMC_XBAR_WRREQ_CREDIT 0 0xc82 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_RDREQ_CREDIT 0 0xc83 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_RDREQ_PRI_CREDIT 0 0xc84 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_WRRET_CREDIT1 0 0xc85 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_WRRET_CREDIT2 0 0xc86 2 0 4294967295 OUT4 0 7 OUT5 8 15 mmMC_XBAR_RDRET_CREDIT1 0 0xc87 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_RDRET_CREDIT2 0 0xc88 3 0 4294967295 OUT4 0 7 OUT5 8 15 HUB_LP_RDRET_SKID 16 23 mmMC_XBAR_RDRET_PRI_CREDIT1 0 0xc89 4 0 4294967295 OUT0 0 7 OUT1 8 15 OUT2 16 23 OUT3 24 31 mmMC_XBAR_RDRET_PRI_CREDIT2 0 0xc8a 2 0 4294967295 OUT4 0 7 OUT5 8 15 mmMC_XBAR_CHTRIREMAP 0 0xc8b 3 0 4294967295 CH0 0 1 CH1 2 3 CH2 4 5 mmMC_XBAR_TWOCHAN 0 0xc8c 3 0 4294967295 DISABLE_ONEPORT 0 0 CH0 1 2 CH1 3 4 mmMC_XBAR_ARB 0 0xc8d 3 0 4294967295 HUBRD_HIGHEST 0 0 DISABLE_HUB_STALL_HIGHEST 1 1 BREAK_BURST_CID_CHANGE 2 2 mmMC_XBAR_ARB_MAX_BURST 0 0xc8e 8 0 4294967295 RD_PORT0 0 3 RD_PORT1 4 7 RD_PORT2 8 11 RD_PORT3 12 15 WR_PORT0 16 19 WR_PORT1 20 23 WR_PORT2 24 27 WR_PORT3 28 31 mmMC_XBAR_PERF_MON_CNTL0 0 0xc8f 5 0 4294967295 START_THRESH 0 11 STOP_THRESH 12 23 START_MODE 24 25 STOP_MODE 26 27 ALLOW_WRAP 28 28 mmMC_XBAR_PERF_MON_CNTL1 0 0xc90 3 0 4294967295 THRESH_CNTR_ID 0 7 START_TRIG_ID 8 15 STOP_TRIG_ID 16 23 mmMC_XBAR_PERF_MON_CNTL2 0 0xc91 4 0 4294967295 MON0_ID 0 7 MON1_ID 8 15 MON2_ID 16 23 MON3_ID 24 31 mmMC_XBAR_PERF_MON_RSLT0 0 0xc92 1 0 4294967295 COUNT 0 31 mmMC_XBAR_PERF_MON_RSLT1 0 0xc93 1 0 4294967295 COUNT 0 31 mmMC_XBAR_PERF_MON_RSLT2 0 0xc94 1 0 4294967295 COUNT 0 31 mmMC_XBAR_PERF_MON_RSLT3 0 0xc95 1 0 4294967295 COUNT 0 31 mmMC_XBAR_PERF_MON_MAX_THSH 0 0xc96 4 0 4294967295 MON0 0 7 MON1 8 15 MON2 16 23 MON3 24 31 mmMC_XBAR_SPARE0 0 0xc97 1 0 4294967295 BIT 0 31 mmMC_XBAR_SPARE1 0 0xc98 1 0 4294967295 BIT 0 31 mmMC_CITF_PERFCOUNTER_LO 0 0x7a0 1 0 4294967295 COUNTER_LO 0 31 mmMC_HUB_PERFCOUNTER_LO 0 0x7a1 1 0 4294967295 COUNTER_LO 0 31 mmMC_RPB_PERFCOUNTER_LO 0 0x7a2 1 0 4294967295 COUNTER_LO 0 31 mmMC_MCBVM_PERFCOUNTER_LO 0 0x7a3 1 0 4294967295 COUNTER_LO 0 31 mmMC_MCDVM_PERFCOUNTER_LO 0 0x7a4 1 0 4294967295 COUNTER_LO 0 31 mmMC_VM_L2_PERFCOUNTER_LO 0 0x7a5 1 0 4294967295 COUNTER_LO 0 31 mmMC_ARB_PERFCOUNTER_LO 0 0x7a6 1 0 4294967295 COUNTER_LO 0 31 mmATC_PERFCOUNTER_LO 0 0x7a7 1 0 4294967295 COUNTER_LO 0 31 mmMC_CITF_PERFCOUNTER_HI 0 0x7a8 2 0 4294967295 COUNTER_HI 0 15 COMPARE_VALUE 16 31 mmMC_HUB_PERFCOUNTER_HI 0 0x7a9 2 0 4294967295 COUNTER_HI 0 15 COMPARE_VALUE 16 31 mmMC_MCBVM_PERFCOUNTER_HI 0 0x7aa 2 0 4294967295 COUNTER_HI 0 15 COMPARE_VALUE 16 31 mmMC_MCDVM_PERFCOUNTER_HI 0 0x7ab 2 0 4294967295 COUNTER_HI 0 15 COMPARE_VALUE 16 31 mmMC_RPB_PERFCOUNTER_HI 0 0x7ac 2 0 4294967295 COUNTER_HI 0 15 COMPARE_VALUE 16 31 mmMC_VM_L2_PERFCOUNTER_HI 0 0x7ad 2 0 4294967295 COUNTER_HI 0 15 COMPARE_VALUE 16 31 mmMC_ARB_PERFCOUNTER_HI 0 0x7ae 2 0 4294967295 COUNTER_HI 0 15 COMPARE_VALUE 16 31 mmATC_PERFCOUNTER_HI 0 0x7af 2 0 4294967295 COUNTER_HI 0 15 COMPARE_VALUE 16 31 mmMC_CITF_PERFCOUNTER0_CFG 0 0x7b0 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_CITF_PERFCOUNTER1_CFG 0 0x7b1 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_CITF_PERFCOUNTER2_CFG 0 0x7b2 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_CITF_PERFCOUNTER3_CFG 0 0x7b3 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_HUB_PERFCOUNTER0_CFG 0 0x7b4 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_HUB_PERFCOUNTER1_CFG 0 0x7b5 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_HUB_PERFCOUNTER2_CFG 0 0x7b6 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_HUB_PERFCOUNTER3_CFG 0 0x7b7 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_RPB_PERFCOUNTER0_CFG 0 0x7b8 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_RPB_PERFCOUNTER1_CFG 0 0x7b9 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_RPB_PERFCOUNTER2_CFG 0 0x7ba 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_RPB_PERFCOUNTER3_CFG 0 0x7bb 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_ARB_PERFCOUNTER0_CFG 0 0x7bc 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_ARB_PERFCOUNTER1_CFG 0 0x7bd 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_ARB_PERFCOUNTER2_CFG 0 0x7be 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_ARB_PERFCOUNTER3_CFG 0 0x7bf 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_MCBVM_PERFCOUNTER0_CFG 0 0x7c0 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_MCBVM_PERFCOUNTER1_CFG 0 0x7c1 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_MCBVM_PERFCOUNTER2_CFG 0 0x7c2 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_MCBVM_PERFCOUNTER3_CFG 0 0x7c3 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_MCDVM_PERFCOUNTER0_CFG 0 0x7c4 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_MCDVM_PERFCOUNTER1_CFG 0 0x7c5 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_MCDVM_PERFCOUNTER2_CFG 0 0x7c6 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_MCDVM_PERFCOUNTER3_CFG 0 0x7c7 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmATC_PERFCOUNTER0_CFG 0 0x7c8 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmATC_PERFCOUNTER1_CFG 0 0x7c9 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmATC_PERFCOUNTER2_CFG 0 0x7ca 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmATC_PERFCOUNTER3_CFG 0 0x7cb 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_VM_L2_PERFCOUNTER0_CFG 0 0x7cc 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_VM_L2_PERFCOUNTER1_CFG 0 0x7cd 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmMC_CITF_PERFCOUNTER_RSLT_CNTL 0 0x7ce 6 0 4294967295 PERF_COUNTER_SELECT 0 3 START_TRIGGER 8 15 STOP_TRIGGER 16 23 ENABLE_ANY 24 24 CLEAR_ALL 25 25 STOP_ALL_ON_SATURATE 26 26 mmMC_HUB_PERFCOUNTER_RSLT_CNTL 0 0x7cf 6 0 4294967295 PERF_COUNTER_SELECT 0 3 START_TRIGGER 8 15 STOP_TRIGGER 16 23 ENABLE_ANY 24 24 CLEAR_ALL 25 25 STOP_ALL_ON_SATURATE 26 26 mmMC_RPB_PERFCOUNTER_RSLT_CNTL 0 0x7d0 6 0 4294967295 PERF_COUNTER_SELECT 0 3 START_TRIGGER 8 15 STOP_TRIGGER 16 23 ENABLE_ANY 24 24 CLEAR_ALL 25 25 STOP_ALL_ON_SATURATE 26 26 mmMC_MCBVM_PERFCOUNTER_RSLT_CNTL 0 0x7d1 6 0 4294967295 PERF_COUNTER_SELECT 0 3 START_TRIGGER 8 15 STOP_TRIGGER 16 23 ENABLE_ANY 24 24 CLEAR_ALL 25 25 STOP_ALL_ON_SATURATE 26 26 mmMC_MCDVM_PERFCOUNTER_RSLT_CNTL 0 0x7d2 6 0 4294967295 PERF_COUNTER_SELECT 0 3 START_TRIGGER 8 15 STOP_TRIGGER 16 23 ENABLE_ANY 24 24 CLEAR_ALL 25 25 STOP_ALL_ON_SATURATE 26 26 mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL 0 0x7d3 6 0 4294967295 PERF_COUNTER_SELECT 0 3 START_TRIGGER 8 15 STOP_TRIGGER 16 23 ENABLE_ANY 24 24 CLEAR_ALL 25 25 STOP_ALL_ON_SATURATE 26 26 mmMC_ARB_PERFCOUNTER_RSLT_CNTL 0 0x7d4 6 0 4294967295 PERF_COUNTER_SELECT 0 3 START_TRIGGER 8 15 STOP_TRIGGER 16 23 ENABLE_ANY 24 24 CLEAR_ALL 25 25 STOP_ALL_ON_SATURATE 26 26 mmATC_PERFCOUNTER_RSLT_CNTL 0 0x7d5 6 0 4294967295 PERF_COUNTER_SELECT 0 3 START_TRIGGER 8 15 STOP_TRIGGER 16 23 ENABLE_ANY 24 24 CLEAR_ALL 25 25 STOP_ALL_ON_SATURATE 26 26 mmCHUB_ATC_PERFCOUNTER_LO 0 0x7d6 1 0 4294967295 COUNTER_LO 0 31 mmCHUB_ATC_PERFCOUNTER_HI 0 0x7d7 2 0 4294967295 COUNTER_HI 0 15 COMPARE_VALUE 16 31 mmCHUB_ATC_PERFCOUNTER0_CFG 0 0x7d8 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmCHUB_ATC_PERFCOUNTER1_CFG 0 0x7d9 5 0 4294967295 PERF_SEL 0 7 PERF_SEL_END 8 15 PERF_MODE 24 27 ENABLE 28 28 CLEAR 29 29 mmCHUB_ATC_PERFCOUNTER_RSLT_CNTL 0 0x7da 6 0 4294967295 PERF_COUNTER_SELECT 0 3 START_TRIGGER 8 15 STOP_TRIGGER 16 23 ENABLE_ANY 24 24 CLEAR_ALL 25 25 STOP_ALL_ON_SATURATE 26 26 mmMC_ARB_PERF_MON_CNTL0_ECC 0 0x7db 1 0 4294967295 ALLOW_WRAP 0 0 mmATC_VM_APERTURE0_LOW_ADDR 0 0xcc0 1 0 4294967295 VIRTUAL_PAGE_NUMBER 0 27 mmATC_VM_APERTURE1_LOW_ADDR 0 0xcc1 1 0 4294967295 VIRTUAL_PAGE_NUMBER 0 27 mmATC_VM_APERTURE0_HIGH_ADDR 0 0xcc2 1 0 4294967295 VIRTUAL_PAGE_NUMBER 0 27 mmATC_VM_APERTURE1_HIGH_ADDR 0 0xcc3 1 0 4294967295 VIRTUAL_PAGE_NUMBER 0 27 mmATC_VM_APERTURE0_CNTL 0 0xcc4 1 0 4294967295 ATS_ACCESS_MODE 0 1 mmATC_VM_APERTURE1_CNTL 0 0xcc5 1 0 4294967295 ATS_ACCESS_MODE 0 1 mmATC_VM_APERTURE0_CNTL2 0 0xcc6 1 0 4294967295 VMIDS_USING_RANGE 0 15 mmATC_VM_APERTURE1_CNTL2 0 0xcc7 1 0 4294967295 VMIDS_USING_RANGE 0 15 mmATC_ATS_CNTL 0 0xcc9 5 0 4294967295 DISABLE_ATC 0 0 DISABLE_PRI 1 1 DISABLE_PASID 2 2 CREDITS_ATS_RPB 8 13 DEBUG_ECO 16 19 mmATC_ATS_DEBUG 0 0xcca 14 0 4294967295 INVALIDATE_ALL 0 0 IDENT_RETURN 1 1 ADDRESS_TRANSLATION_REQUEST_WRITE_PERMS 2 2 PAGE_REQUESTS_USE_RELAXED_ORDERING 5 5 PRIV_BIT 6 6 EXE_BIT 7 7 PAGE_REQUEST_PERMS 8 8 UNTRANSLATED_ONLY_REQUESTS_CARRY_SIZE 9 9 NUM_REQUESTS_AT_ERR 10 13 DISALLOW_ERR_TO_DONE 14 14 IGNORE_FED 15 15 INVALIDATION_REQUESTS_DISALLOWED_WHEN_ATC_IS_DISABLED 16 16 DEBUG_BUS_SELECT 17 17 DISABLE_INVALIDATE_PER_DOMAIN 18 18 mmATC_ATS_FAULT_DEBUG 0 0xccb 3 0 4294967295 CREDITS_ATS_IH 0 4 ALLOW_SUBSEQUENT_FAULT_STATUS_ADDR_UPDATES 8 8 CLEAR_FAULT_STATUS_ADDR 16 16 mmATC_ATS_STATUS 0 0xccc 3 0 4294967295 BUSY 0 0 CRASHED 1 1 DEADLOCK_DETECTION 2 2 mmATC_ATS_FAULT_CNTL 0 0xccd 3 0 4294967295 FAULT_REGISTER_LOG 0 5 FAULT_INTERRUPT_TABLE 10 15 FAULT_CRASH_TABLE 20 25 mmATC_ATS_FAULT_STATUS_INFO 0 0xcce 8 0 4294967295 FAULT_TYPE 0 5 VMID 10 14 EXTRA_INFO 15 15 EXTRA_INFO2 16 16 INVALIDATION 17 17 PAGE_REQUEST 18 18 STATUS 19 23 PAGE_ADDR_HIGH 24 27 mmATC_ATS_FAULT_STATUS_ADDR 0 0xccf 1 0 4294967295 PAGE_ADDR 0 31 mmATC_ATS_DEFAULT_PAGE_LOW 0 0xcd0 1 0 4294967295 DEFAULT_PAGE 0 31 mmATC_ATS_DEFAULT_PAGE_CNTL 0 0xcd1 2 0 4294967295 SEND_DEFAULT_PAGE 0 0 DEFAULT_PAGE_HIGH 2 5 mmATC_MISC_CG 0 0xcd4 3 0 4294967295 OFFDLY 6 11 ENABLE 18 18 MEM_LS_ENABLE 19 19 mmATC_L2_CNTL 0 0xcd5 4 0 4294967295 NUMBER_OF_TRANSLATION_READ_REQUESTS 0 1 NUMBER_OF_TRANSLATION_WRITE_REQUESTS 4 5 NUMBER_OF_TRANSLATION_READS_DEPENDS_ON_ADDR_MOD 8 8 NUMBER_OF_TRANSLATION_WRITES_DEPENDS_ON_ADDR_MOD 9 9 mmATC_L2_CNTL2 0 0xcd6 6 0 4294967295 BANK_SELECT 0 5 L2_CACHE_UPDATE_MODE 6 7 ENABLE_L2_CACHE_LRU_UPDATE_BY_WRITE 8 8 L2_CACHE_SWAP_TAG_INDEX_LSBS 9 11 L2_CACHE_VMID_MODE 12 14 L2_CACHE_UPDATE_WILDCARD_REFERENCE_VALUE 15 20 mmATC_L2_DEBUG 0 0xcd7 1 0 4294967295 CREDITS_L2_ATS 0 5 mmATC_L2_DEBUG2 0 0xcd8 9 0 4294967295 EFFECTIVE_CACHE_SIZE 0 4 EFFECTIVE_WORK_QUEUE_SIZE 5 7 FORCE_CACHE_MISS 8 8 INVALIDATE_ALL 9 9 DISABLE_CACHING_SPECULATIVE_READ_RETURNS 11 11 DISABLE_CACHING_SPECULATIVE_WRITE_RETURNS 12 12 DISABLE_CACHING_FAULT_RETURNS 14 14 DEBUG_BUS_SELECT 15 16 DEBUG_ECO 17 18 mmATC_L1_CNTL 0 0xcdc 3 0 4294967295 DONT_NEED_ATS_BEHAVIOR 0 1 NEED_ATS_BEHAVIOR 2 2 NEED_ATS_SNOOP_DEFAULT 4 4 mmATC_L1_ADDRESS_OFFSET 0 0xcdd 1 0 4294967295 LOGICAL_ADDRESS 0 31 mmATC_L1RD_DEBUG_TLB 0 0xcde 9 0 4294967295 DISABLE_FRAGMENTS 0 0 DISABLE_INVALIDATE_BY_ADDRESS_RANGE 1 1 EFFECTIVE_CAM_SIZE 4 7 EFFECTIVE_WORK_QUEUE_SIZE 8 10 CREDITS_L1_L2 12 17 CREDITS_L1_RPB 20 27 DEBUG_ECO 28 29 INVALIDATE_ALL 30 30 DISABLE_CACHING_FAULT_RETURNS 31 31 mmATC_L1WR_DEBUG_TLB 0 0xcdf 9 0 4294967295 DISABLE_FRAGMENTS 0 0 DISABLE_INVALIDATE_BY_ADDRESS_RANGE 1 1 EFFECTIVE_CAM_SIZE 4 7 EFFECTIVE_WORK_QUEUE_SIZE 8 10 CREDITS_L1_L2 12 17 CREDITS_L1_RPB 20 27 DEBUG_ECO 28 29 INVALIDATE_ALL 30 30 DISABLE_CACHING_FAULT_RETURNS 31 31 mmATC_L1RD_STATUS 0 0xce0 3 0 4294967295 BUSY 0 0 DEADLOCK_DETECTION 1 1 BAD_NEED_ATS 8 8 mmATC_L1WR_STATUS 0 0xce1 3 0 4294967295 BUSY 0 0 DEADLOCK_DETECTION 1 1 BAD_NEED_ATS 8 8 mmATC_VMID_PASID_MAPPING_UPDATE_STATUS 0 0xce6 16 0 4294967295 VMID0_REMAPPING_FINISHED 0 0 VMID1_REMAPPING_FINISHED 1 1 VMID2_REMAPPING_FINISHED 2 2 VMID3_REMAPPING_FINISHED 3 3 VMID4_REMAPPING_FINISHED 4 4 VMID5_REMAPPING_FINISHED 5 5 VMID6_REMAPPING_FINISHED 6 6 VMID7_REMAPPING_FINISHED 7 7 VMID8_REMAPPING_FINISHED 8 8 VMID9_REMAPPING_FINISHED 9 9 VMID10_REMAPPING_FINISHED 10 10 VMID11_REMAPPING_FINISHED 11 11 VMID12_REMAPPING_FINISHED 12 12 VMID13_REMAPPING_FINISHED 13 13 VMID14_REMAPPING_FINISHED 14 14 VMID15_REMAPPING_FINISHED 15 15 mmATC_VMID0_PASID_MAPPING 0 0xce7 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID1_PASID_MAPPING 0 0xce8 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID2_PASID_MAPPING 0 0xce9 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID3_PASID_MAPPING 0 0xcea 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID4_PASID_MAPPING 0 0xceb 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID5_PASID_MAPPING 0 0xcec 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID6_PASID_MAPPING 0 0xced 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID7_PASID_MAPPING 0 0xcee 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID8_PASID_MAPPING 0 0xcef 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID9_PASID_MAPPING 0 0xcf0 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID10_PASID_MAPPING 0 0xcf1 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID11_PASID_MAPPING 0 0xcf2 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID12_PASID_MAPPING 0 0xcf3 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID13_PASID_MAPPING 0 0xcf4 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID14_PASID_MAPPING 0 0xcf5 2 0 4294967295 PASID 0 15 VALID 31 31 mmATC_VMID15_PASID_MAPPING 0 0xcf6 2 0 4294967295 PASID 0 15 VALID 31 31 mmGMCON_RENG_RAM_INDEX 0 0xd40 1 0 4294967295 RENG_RAM_INDEX 0 9 mmGMCON_RENG_RAM_DATA 0 0xd41 1 0 4294967295 RENG_RAM_DATA 0 31 mmGMCON_RENG_EXECUTE 0 0xd42 5 0 4294967295 RENG_EXECUTE_ON_PWR_UP 0 0 RENG_EXECUTE_NOW 1 1 RENG_EXECUTE_NOW_START_PTR 2 11 RENG_EXECUTE_DSP_END_PTR 12 21 RENG_EXECUTE_END_PTR 22 31 mmGMCON_MISC 0 0xd43 15 0 4294967295 RENG_EXECUTE_NOW_MODE 10 10 RENG_EXECUTE_ON_REG_UPDATE 11 11 RENG_SRBM_CREDITS_MCD 12 15 STCTRL_STUTTER_EN 16 16 STCTRL_GMC_IDLE_THRESHOLD 17 18 STCTRL_SRBM_IDLE_THRESHOLD 19 20 STCTRL_IGNORE_PRE_SR 21 21 STCTRL_IGNORE_ALLOW_STOP 22 22 STCTRL_IGNORE_SR_COMMIT 23 23 STCTRL_IGNORE_PROTECTION_FAULT 24 24 STCTRL_DISABLE_ALLOW_SR 25 25 STCTRL_DISABLE_GMC_OFFLINE 26 26 CRITICAL_REGS_LOCK 27 27 ALLOW_DEEP_SLEEP_MODE 28 30 STCTRL_FORCE_ALLOW_SR 31 31 mmGMCON_MISC2 0 0xd44 7 0 4294967295 GMCON_MISC2_RESERVED0 0 5 STCTRL_NONDISP_IDLE_THRESHOLD 6 10 RENG_SR_HOLD_THRESHOLD 11 16 GMCON_MISC2_RESERVED1 17 28 STCTRL_IGNORE_ARB_BUSY 29 29 STCTRL_EXTEND_GMC_OFFLINE 30 30 STCTRL_TIMER_PULSE_OVERRIDE 31 31 mmGMCON_STCTRL_REGISTER_SAVE_RANGE0 0 0xd45 2 0 4294967295 STCTRL_REGISTER_SAVE_BASE0 0 15 STCTRL_REGISTER_SAVE_LIMIT0 16 31 mmGMCON_STCTRL_REGISTER_SAVE_RANGE1 0 0xd46 2 0 4294967295 STCTRL_REGISTER_SAVE_BASE1 0 15 STCTRL_REGISTER_SAVE_LIMIT1 16 31 mmGMCON_STCTRL_REGISTER_SAVE_RANGE2 0 0xd47 2 0 4294967295 STCTRL_REGISTER_SAVE_BASE2 0 15 STCTRL_REGISTER_SAVE_LIMIT2 16 31 mmGMCON_STCTRL_REGISTER_SAVE_EXCL_SET0 0 0xd48 2 0 4294967295 STCTRL_REGISTER_SAVE_EXCL0 0 15 STCTRL_REGISTER_SAVE_EXCL1 16 31 mmGMCON_STCTRL_REGISTER_SAVE_EXCL_SET1 0 0xd49 2 0 4294967295 STCTRL_REGISTER_SAVE_EXCL2 0 15 STCTRL_REGISTER_SAVE_EXCL3 16 31 mmGMCON_PERF_MON_CNTL0 0 0xd4a 8 0 4294967295 START_THRESH 0 11 STOP_THRESH 12 23 START_MODE 24 25 STOP_MODE 26 27 ALLOW_WRAP 28 28 THRESH_CNTR_ID_EXT 29 29 START_TRIG_ID_EXT 30 30 STOP_TRIG_ID_EXT 31 31 mmGMCON_PERF_MON_CNTL1 0 0xd4b 5 0 4294967295 THRESH_CNTR_ID 0 5 START_TRIG_ID 6 11 STOP_TRIG_ID 12 17 MON0_ID 18 24 MON1_ID 25 31 mmGMCON_PERF_MON_RSLT0 0 0xd4c 1 0 4294967295 COUNT 0 31 mmGMCON_PERF_MON_RSLT1 0 0xd4d 1 0 4294967295 COUNT 0 31 mmGMCON_PGFSM_CONFIG 0 0xd4e 10 0 4294967295 FSM_ADDR 0 7 POWER_DOWN 8 8 POWER_UP 9 9 P1_SELECT 10 10 P2_SELECT 11 11 WRITE 12 12 READ 13 13 RSRVD 14 26 SRBM_OVERRIDE 27 27 REG_ADDR 28 31 mmGMCON_PGFSM_WRITE 0 0xd4f 1 0 4294967295 WRITE_VALUE 0 31 mmGMCON_PGFSM_READ 0 0xd50 3 0 4294967295 READ_VALUE 0 23 PGFSM_SELECT 24 27 SERDES_MASTER_BUSY 28 28 mmGMCON_MISC3 0 0xd51 6 0 4294967295 RENG_DISABLE_MCC 0 7 RENG_DISABLE_MCD 8 15 STCTRL_FORCE_PGFSM_CMD_DONE 16 27 STCTRL_IGNORE_ALLOW_STUTTER 28 28 RENG_MEM_LS_ENABLE 29 29 STCTRL_EXCLUDE_NONMEM_CLIENTS 30 30 mmGMCON_MASK 0 0xd52 5 0 4294967295 STCTRL_BUSY_MASK_ACP_RD 0 0 STCTRL_BUSY_MASK_ACP_WR 1 1 STCTRL_BUSY_MASK_VCE_RD 2 2 STCTRL_BUSY_MASK_VCE_WR 3 3 STCTRL_SR_HANDSHAKE_MASK 4 11 mmGMCON_LPT_TARGET 0 0xd53 1 0 4294967295 STCTRL_LPT_TARGET 0 31 mmGMCON_DEBUG 0 0xd5f 3 0 4294967295 GFX_STALL 0 0 GFX_CLEAR 1 1 MISC_FLAGS 2 29 mmVM_L2_CNTL 0 0x500 15 0 4294967295 ENABLE_L2_CACHE 0 0 ENABLE_L2_FRAGMENT_PROCESSING 1 1 L2_CACHE_PTE_ENDIAN_SWAP_MODE 2 3 L2_CACHE_PDE_ENDIAN_SWAP_MODE 4 5 L2_PDE0_CACHE_TAG_GENERATION_MODE 8 8 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE 9 9 ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE 10 10 ENABLE_DEFAULT_PAGE_OUT_TO_SYSTEM_MEMORY 11 11 L2_PDE0_CACHE_SPLIT_MODE 12 14 EFFECTIVE_L2_QUEUE_SIZE 15 17 PDE_FAULT_CLASSIFICATION 18 18 CONTEXT1_IDENTITY_ACCESS_MODE 19 20 IDENTITY_MODE_FRAGMENT_SIZE 21 25 L2_CACHE_4K_SWAP_TAG_INDEX_LSBS 26 27 L2_CACHE_BIGK_SWAP_TAG_INDEX_LSBS 28 30 mmVM_L2_CNTL2 0 0x501 7 0 4294967295 INVALIDATE_ALL_L1_TLBS 0 0 INVALIDATE_L2_CACHE 1 1 DISABLE_INVALIDATE_PER_DOMAIN 21 21 DISABLE_BIGK_CACHE_OPTIMIZATION 22 22 L2_CACHE_BIGK_VMID_MODE 23 25 INVALIDATE_CACHE_MODE 26 27 PDE_CACHE_EFFECTIVE_SIZE 28 30 mmVM_L2_CNTL3 0 0x502 10 0 4294967295 BANK_SELECT 0 5 L2_CACHE_UPDATE_MODE 6 7 L2_CACHE_UPDATE_WILDCARD_REFERENCE_VALUE 8 12 L2_CACHE_BIGK_FRAGMENT_SIZE 15 19 L2_CACHE_BIGK_ASSOCIATIVITY 20 20 L2_CACHE_4K_EFFECTIVE_SIZE 21 23 L2_CACHE_BIGK_EFFECTIVE_SIZE 24 27 L2_CACHE_4K_FORCE_MISS 28 28 L2_CACHE_BIGK_FORCE_MISS 29 29 PDE_CACHE_FORCE_MISS 30 30 mmVM_L2_STATUS 0 0x503 2 0 4294967295 L2_BUSY 0 0 CONTEXT_DOMAIN_BUSY 1 16 mmVM_CONTEXT0_CNTL 0 0x504 22 0 4294967295 ENABLE_CONTEXT 0 0 PAGE_TABLE_DEPTH 1 2 RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT 3 3 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT 4 4 DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT 6 6 DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT 7 7 PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT 9 9 PDE0_PROTECTION_FAULT_ENABLE_DEFAULT 10 10 PDE0_PROTECTION_FAULT_ENABLE_SAVE 11 11 VALID_PROTECTION_FAULT_ENABLE_INTERRUPT 12 12 VALID_PROTECTION_FAULT_ENABLE_DEFAULT 13 13 VALID_PROTECTION_FAULT_ENABLE_SAVE 14 14 READ_PROTECTION_FAULT_ENABLE_INTERRUPT 15 15 READ_PROTECTION_FAULT_ENABLE_DEFAULT 16 16 READ_PROTECTION_FAULT_ENABLE_SAVE 17 17 WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT 18 18 WRITE_PROTECTION_FAULT_ENABLE_DEFAULT 19 19 WRITE_PROTECTION_FAULT_ENABLE_SAVE 20 20 PRIVILEGED_PROTECTION_FAULT_ENABLE_INTERRUPT 21 21 PRIVILEGED_PROTECTION_FAULT_ENABLE_DEFAULT 22 22 PRIVILEGED_PROTECTION_FAULT_ENABLE_SAVE 23 23 PAGE_TABLE_BLOCK_SIZE 24 27 mmVM_CONTEXT1_CNTL 0 0x505 22 0 4294967295 ENABLE_CONTEXT 0 0 PAGE_TABLE_DEPTH 1 2 RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT 3 3 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT 4 4 DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT 6 6 DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT 7 7 PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT 9 9 PDE0_PROTECTION_FAULT_ENABLE_DEFAULT 10 10 PDE0_PROTECTION_FAULT_ENABLE_SAVE 11 11 VALID_PROTECTION_FAULT_ENABLE_INTERRUPT 12 12 VALID_PROTECTION_FAULT_ENABLE_DEFAULT 13 13 VALID_PROTECTION_FAULT_ENABLE_SAVE 14 14 READ_PROTECTION_FAULT_ENABLE_INTERRUPT 15 15 READ_PROTECTION_FAULT_ENABLE_DEFAULT 16 16 READ_PROTECTION_FAULT_ENABLE_SAVE 17 17 WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT 18 18 WRITE_PROTECTION_FAULT_ENABLE_DEFAULT 19 19 WRITE_PROTECTION_FAULT_ENABLE_SAVE 20 20 PRIVILEGED_PROTECTION_FAULT_ENABLE_INTERRUPT 21 21 PRIVILEGED_PROTECTION_FAULT_ENABLE_DEFAULT 22 22 PRIVILEGED_PROTECTION_FAULT_ENABLE_SAVE 23 23 PAGE_TABLE_BLOCK_SIZE 24 27 mmVM_DUMMY_PAGE_FAULT_CNTL 0 0x506 3 0 4294967295 DUMMY_PAGE_FAULT_ENABLE 0 0 DUMMY_PAGE_ADDRESS_LOGICAL 1 1 DUMMY_PAGE_COMPARE_MASK 2 3 mmVM_DUMMY_PAGE_FAULT_ADDR 0 0x507 1 0 4294967295 DUMMY_PAGE_ADDR 0 27 mmVM_CONTEXT0_CNTL2 0 0x50c 5 0 4294967295 CLEAR_PROTECTION_FAULT_STATUS_ADDR 0 0 ENABLE_CLEAR_PROTECTION_FAULT_STATUS_ADDR_WHEN_INVALIDATE_CONTEXT 1 1 ENABLE_INTERRUPT_PROCESSING_FOR_SUBSEQUENT_FAULTS_PER_CONTEXT 2 2 ALLOW_SUBSEQUENT_PROTECTION_FAULT_STATUS_ADDR_UPDATES 3 3 WAIT_FOR_IDLE_WHEN_INVALIDATE 4 4 mmVM_CONTEXT1_CNTL2 0 0x50d 5 0 4294967295 CLEAR_PROTECTION_FAULT_STATUS_ADDR 0 0 ENABLE_CLEAR_PROTECTION_FAULT_STATUS_ADDR_WHEN_INVALIDATE_CONTEXT 1 1 ENABLE_INTERRUPT_PROCESSING_FOR_SUBSEQUENT_FAULTS_PER_CONTEXT 2 2 ALLOW_SUBSEQUENT_PROTECTION_FAULT_STATUS_ADDR_UPDATES 3 3 WAIT_FOR_IDLE_WHEN_INVALIDATE 4 4 mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR 0 0x50e 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT9_PAGE_TABLE_BASE_ADDR 0 0x50f 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT10_PAGE_TABLE_BASE_ADDR 0 0x510 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT11_PAGE_TABLE_BASE_ADDR 0 0x511 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT12_PAGE_TABLE_BASE_ADDR 0 0x512 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT13_PAGE_TABLE_BASE_ADDR 0 0x513 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT14_PAGE_TABLE_BASE_ADDR 0 0x514 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT15_PAGE_TABLE_BASE_ADDR 0 0x515 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_INVALIDATE_REQUEST 0 0x51e 16 0 4294967295 INVALIDATE_DOMAIN_0 0 0 INVALIDATE_DOMAIN_1 1 1 INVALIDATE_DOMAIN_2 2 2 INVALIDATE_DOMAIN_3 3 3 INVALIDATE_DOMAIN_4 4 4 INVALIDATE_DOMAIN_5 5 5 INVALIDATE_DOMAIN_6 6 6 INVALIDATE_DOMAIN_7 7 7 INVALIDATE_DOMAIN_8 8 8 INVALIDATE_DOMAIN_9 9 9 INVALIDATE_DOMAIN_10 10 10 INVALIDATE_DOMAIN_11 11 11 INVALIDATE_DOMAIN_12 12 12 INVALIDATE_DOMAIN_13 13 13 INVALIDATE_DOMAIN_14 14 14 INVALIDATE_DOMAIN_15 15 15 mmVM_INVALIDATE_RESPONSE 0 0x51f 16 0 4294967295 DOMAIN_INVALIDATED_0 0 0 DOMAIN_INVALIDATED_1 1 1 DOMAIN_INVALIDATED_2 2 2 DOMAIN_INVALIDATED_3 3 3 DOMAIN_INVALIDATED_4 4 4 DOMAIN_INVALIDATED_5 5 5 DOMAIN_INVALIDATED_6 6 6 DOMAIN_INVALIDATED_7 7 7 DOMAIN_INVALIDATED_8 8 8 DOMAIN_INVALIDATED_9 9 9 DOMAIN_INVALIDATED_10 10 10 DOMAIN_INVALIDATED_11 11 11 DOMAIN_INVALIDATED_12 12 12 DOMAIN_INVALIDATED_13 13 13 DOMAIN_INVALIDATED_14 14 14 DOMAIN_INVALIDATED_15 15 15 mmVM_PRT_APERTURE0_LOW_ADDR 0 0x52c 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE1_LOW_ADDR 0 0x52d 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE2_LOW_ADDR 0 0x52e 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE3_LOW_ADDR 0 0x52f 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE0_HIGH_ADDR 0 0x530 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE1_HIGH_ADDR 0 0x531 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE2_HIGH_ADDR 0 0x532 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_APERTURE3_HIGH_ADDR 0 0x533 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_PRT_CNTL 0 0x534 7 0 4294967295 CB_DISABLE_READ_FAULT_ON_UNMAPPED_ACCESS 0 0 TC_DISABLE_READ_FAULT_ON_UNMAPPED_ACCESS 1 1 L2_CACHE_STORE_INVALID_ENTRIES 2 2 L1_TLB_STORE_INVALID_ENTRIES 3 3 CB_DISABLE_WRITE_FAULT_ON_UNMAPPED_ACCESS 4 4 TC_DISABLE_WRITE_FAULT_ON_UNMAPPED_ACCESS 5 5 MASK_PDE0_FAULT 6 6 mmVM_CONTEXTS_DISABLE 0 0x535 16 0 4294967295 DISABLE_CONTEXT_0 0 0 DISABLE_CONTEXT_1 1 1 DISABLE_CONTEXT_2 2 2 DISABLE_CONTEXT_3 3 3 DISABLE_CONTEXT_4 4 4 DISABLE_CONTEXT_5 5 5 DISABLE_CONTEXT_6 6 6 DISABLE_CONTEXT_7 7 7 DISABLE_CONTEXT_8 8 8 DISABLE_CONTEXT_9 9 9 DISABLE_CONTEXT_10 10 10 DISABLE_CONTEXT_11 11 11 DISABLE_CONTEXT_12 12 12 DISABLE_CONTEXT_13 13 13 DISABLE_CONTEXT_14 14 14 DISABLE_CONTEXT_15 15 15 mmVM_CONTEXT0_PROTECTION_FAULT_STATUS 0 0x536 4 0 4294967295 PROTECTIONS 0 7 MEMORY_CLIENT_ID 12 20 MEMORY_CLIENT_RW 24 24 VMID 25 28 mmVM_CONTEXT1_PROTECTION_FAULT_STATUS 0 0x537 4 0 4294967295 PROTECTIONS 0 7 MEMORY_CLIENT_ID 12 20 MEMORY_CLIENT_RW 24 24 VMID 25 28 mmVM_CONTEXT0_PROTECTION_FAULT_MCCLIENT 0 0x538 1 0 4294967295 NAME 0 31 mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT 0 0x539 1 0 4294967295 NAME 0 31 mmVM_CONTEXT0_PROTECTION_FAULT_ADDR 0 0x53e 1 0 4294967295 LOGICAL_PAGE_ADDR 0 27 mmVM_CONTEXT1_PROTECTION_FAULT_ADDR 0 0x53f 1 0 4294967295 LOGICAL_PAGE_ADDR 0 27 mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR 0 0x546 1 0 4294967295 PHYSICAL_PAGE_ADDR 0 27 mmVM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR 0 0x547 1 0 4294967295 PHYSICAL_PAGE_ADDR 0 27 mmVM_FAULT_CLIENT_ID 0 0x54e 2 0 4294967295 MEMORY_CLIENT 0 8 MEMORY_CLIENT_MASK 9 17 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0 0x54f 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR 0 0x550 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT2_PAGE_TABLE_BASE_ADDR 0 0x551 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT3_PAGE_TABLE_BASE_ADDR 0 0x552 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT4_PAGE_TABLE_BASE_ADDR 0 0x553 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT5_PAGE_TABLE_BASE_ADDR 0 0x554 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT6_PAGE_TABLE_BASE_ADDR 0 0x555 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT7_PAGE_TABLE_BASE_ADDR 0 0x556 1 0 4294967295 PHYSICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT0_PAGE_TABLE_START_ADDR 0 0x557 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT1_PAGE_TABLE_START_ADDR 0 0x558 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT0_PAGE_TABLE_END_ADDR 0 0x55f 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_CONTEXT1_PAGE_TABLE_END_ADDR 0 0x560 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_DEBUG 0 0x56f 1 0 4294967295 FLAGS 0 31 mmVM_L2_CG 0 0x570 3 0 4294967295 OFFDLY 6 11 ENABLE 18 18 MEM_LS_ENABLE 19 19 mmVM_L2_BANK_SELECT_MASKA 0 0x572 1 0 4294967295 BANK_SELECT_MASK 0 27 mmVM_L2_BANK_SELECT_MASKB 0 0x573 1 0 4294967295 BANK_SELECT_MASK 0 8 mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR 0 0x575 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR 0 0x576 1 0 4294967295 LOGICAL_PAGE_NUMBER 0 27 mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET 0 0x577 1 0 4294967295 PHYSICAL_PAGE_OFFSET 0 27 mmMC_SEQ_CNTL 0 0xa25 15 0 4294967295 MEM_ADDR_MAP_COLS 0 1 MEM_ADDR_MAP_BANK 2 3 SAFE_MODE 4 5 DAT_INV 6 6 MSK_DF1 7 7 CHANNEL_DISABLE 8 9 MSKOFF_DAT_TL 14 14 MSKOFF_DAT_TH 15 15 RET_HOLD_EOP 16 16 BANKGROUP_SIZE 17 17 BANKGROUP_ENB 18 18 RTR_OVERRIDE 19 19 ARB_REQCMD_WMK 20 23 ARB_REQDAT_WMK 24 27 ARB_RTDAT_WMK 28 31 mmMC_SEQ_CNTL_2 0 0xad4 10 0 4294967295 DRST_PDRV 0 3 DRST_PU 4 4 DRST_PD 5 5 ARB_RTDAT_WMK_MSB 8 9 DRST_NSTR 10 15 DRST_PSTR 16 21 PLL_TX_PWRON_D0 22 22 PLL_TX_PWRON_D1 23 23 PLL_RX_PWRON_D0 24 27 PLL_RX_PWRON_D1 28 31 mmMC_SEQ_DRAM 0 0xa26 22 0 4294967295 ADR_2CK 0 0 ADR_MUX 1 1 ADR_DF1 2 2 AP8 3 3 DAT_DF1 4 4 DQS_DF1 5 5 DQM_DF1 6 6 DQM_ACT 7 7 STB_CNT 8 11 CKE_DYN 12 12 CKE_ACT 13 13 BO4 14 14 DLL_CLR 15 15 DLL_CNT 16 23 DAT_INV 24 24 INV_ACM 25 25 ODT_ENB 26 26 ODT_ACT 27 27 RST_CTL 28 28 TRI_MIO_DYN 29 29 TRI_CKE 30 30 RDSTRB_RSYC_DIS 31 31 mmMC_SEQ_DRAM_2 0 0xa27 25 0 4294967295 ADR_DDR 0 0 ADR_DBI 1 1 ADR_DBI_ACM 2 2 CMD_QDR 3 3 DAT_QDR 4 4 WDAT_EDC 5 5 RDAT_EDC 6 6 DQM_EST 7 7 RD_DQS 8 8 WR_DQS 9 9 PLL_EST 10 10 PLL_CLR 11 11 DLL_EST 12 12 BNK_MRS 13 13 DBI_OVR 14 14 TRI_CLK 15 15 PLL_CNT 16 23 PCH_BNK 24 24 ADBI_DF1 25 25 ADBI_ACT 26 26 DBI_DF1 27 27 DBI_ACT 28 28 DBI_EDC_DF1 29 29 TESTCHIP_EN 30 30 CS_BY16 31 31 mmMC_SEQ_RAS_TIMING 0 0xa28 6 0 4294967295 TRCDW 0 4 TRCDWA 5 9 TRCDR 10 14 TRCDRA 15 19 TRRD 20 23 TRC 24 30 mmMC_SEQ_CAS_TIMING 0 0xa29 7 0 4294967295 TNOPW 0 1 TNOPR 2 3 TR2W 4 8 TCCDL 9 11 TR2R 12 15 TW2R 16 20 TCL 24 28 mmMC_SEQ_MISC_TIMING 0 0xa2a 4 0 4294967295 TRP_WRA 0 5 TRP_RDA 8 13 TRP 15 19 TRFC 20 28 mmMC_SEQ_MISC_TIMING2 0 0xa2b 7 0 4294967295 PA2RDATA 0 2 PA2WDATA 4 6 FAW 8 12 TREDC 13 15 TWEDC 16 20 T32AW 21 24 TWDATATR 28 31 mmMC_SEQ_PMG_TIMING 0 0xa2c 7 0 4294967295 TCKSRE 0 2 TCKSRX 4 6 TCKE_PULSE 8 11 TCKE 12 17 SEQ_IDLE 18 20 TCKE_PULSE_MSB 23 23 SEQ_IDLE_SS 24 31 mmMC_SEQ_RD_CTL_D0 0 0xa2d 9 0 4294967295 RCV_DLY 0 2 RCV_EXT 3 7 RST_SEL 8 9 RXDPWRON_DLY 10 11 RST_HLD 12 15 STR_PRE 16 16 STR_PST 17 17 RBS_DLY 20 24 RBS_WEDC_DLY 25 29 mmMC_SEQ_RD_CTL_D1 0 0xa2e 9 0 4294967295 RCV_DLY 0 2 RCV_EXT 3 7 RST_SEL 8 9 RXDPWRON_DLY 10 11 RST_HLD 12 15 STR_PRE 16 16 STR_PST 17 17 RBS_DLY 20 24 RBS_WEDC_DLY 25 29 mmMC_SEQ_WR_CTL_D0 0 0xa2f 13 0 4294967295 DAT_DLY 0 3 DQS_DLY 4 7 DQS_XTR 8 8 DAT_2Y_DLY 9 9 ADR_2Y_DLY 10 10 CMD_2Y_DLY 11 11 OEN_DLY 12 15 OEN_EXT 16 19 OEN_SEL 20 21 ODT_DLY 24 27 ODT_EXT 28 28 ADR_DLY 29 29 CMD_DLY 30 30 mmMC_SEQ_WR_CTL_D1 0 0xa30 13 0 4294967295 DAT_DLY 0 3 DQS_DLY 4 7 DQS_XTR 8 8 DAT_2Y_DLY 9 9 ADR_2Y_DLY 10 10 CMD_2Y_DLY 11 11 OEN_DLY 12 15 OEN_EXT 16 19 OEN_SEL 20 21 ODT_DLY 24 27 ODT_EXT 28 28 ADR_DLY 29 29 CMD_DLY 30 30 mmMC_SEQ_WR_CTL_2 0 0xad5 7 0 4294967295 DAT_DLY_H_D0 0 0 DQS_DLY_H_D0 1 1 OEN_DLY_H_D0 2 2 DAT_DLY_H_D1 3 3 DQS_DLY_H_D1 4 4 OEN_DLY_H_D1 5 5 WCDR_EN 6 6 mmMC_SEQ_CMD 0 0xa31 8 0 4294967295 ADR 0 15 MOP 16 19 END 20 20 CSB 21 22 CHAN0 24 24 CHAN1 25 25 ADR_MSB1 28 28 ADR_MSB0 29 29 mmMC_PMG_CMD_EMRS 0 0xa83 7 0 4294967295 ADR 0 15 MOP 16 18 BNK_MSB 19 19 END 20 20 CSB 21 22 ADR_MSB1 28 28 ADR_MSB0 29 29 mmMC_PMG_CMD_MRS 0 0xaab 7 0 4294967295 ADR 0 15 MOP 16 18 BNK_MSB 19 19 END 20 20 CSB 21 22 ADR_MSB1 28 28 ADR_MSB0 29 29 mmMC_PMG_CMD_MRS1 0 0xad1 7 0 4294967295 ADR 0 15 MOP 16 18 BNK_MSB 19 19 END 20 20 CSB 21 22 ADR_MSB1 28 28 ADR_MSB0 29 29 mmMC_PMG_CMD_MRS2 0 0xad7 7 0 4294967295 ADR 0 15 MOP 16 18 BNK_MSB 19 19 END 20 20 CSB 21 22 ADR_MSB1 28 28 ADR_MSB0 29 29 mmMC_PMG_CFG 0 0xa84 16 0 4294967295 SYC_CLK 0 0 RST_MRS 1 1 RST_EMRS 2 2 TRI_MIO 3 3 XSR_TMR 4 7 RST_MRS1 8 8 RST_MRS2 9 9 DPM_WAKE 10 10 RFS_SRX 12 12 PREA_SRX 13 13 MRS_WAIT_CNT 16 19 WRITE_DURING_DLOCK 20 20 YCLK_ON 21 21 EARLY_ACK_ACPI 22 22 RXPDNB 25 25 ZQCL_SEND 26 27 mmMC_PMG_AUTO_CMD 0 0xa34 3 0 4294967295 ADR 0 16 ADR_MSB1 28 28 ADR_MSB0 29 29 mmMC_PMG_AUTO_CFG 0 0xa35 18 0 4294967295 SYC_CLK 0 0 RST_MRS 1 1 TRI_MIO 2 2 XSR_TMR 4 7 SS_ALWAYS_SLF 8 8 SS_S_SLF 9 9 SCDS_MODE 10 10 EXIT_ALLOW_STOP 11 11 RFS_SRX 12 12 PREA_SRX 13 13 STUTTER_EN 14 14 SELFREFR_COMMIT_0 15 15 MRS_WAIT_CNT 16 19 WRITE_DURING_DLOCK 20 20 YCLK_ON 21 21 RXPDNB 22 22 SELFREFR_COMMIT_1 23 23 DLL_CNT 24 31 mmMC_IMP_CNTL 0 0xa36 10 0 4294967295 MEM_IO_UPDATE_RATE 0 4 CAL_VREF_SEL 5 5 CAL_VREFMODE 6 6 TIMEOUT_ERR 8 8 CLEAR_TIMEOUT_ERR 9 9 MEM_IO_SAMPLE_CNT 13 15 CAL_VREF 16 22 CAL_WHEN_IDLE 29 29 CAL_WHEN_REFRESH 30 30 CAL_PWRON 31 31 mmMC_IMP_DEBUG 0 0xa37 7 0 4294967295 TSTARTUP_CNTR 0 7 TIMEOUT_CNTR 8 15 PMVCAL_RESERVED 16 27 DEBUG_CAL_EN 28 28 DEBUG_CAL_START 29 29 DEBUG_CAL_INTR 30 30 DEBUG_CAL_DONE 31 31 mmMC_IMP_STATUS 0 0xa38 4 0 4294967295 PSTR_CAL 0 7 PSTR_ACCUM_VAL 8 15 NSTR_CAL 16 23 NSTR_ACCUM_VAL 24 31 mmMC_IMP_DQ_STATUS 0 0xabc 4 0 4294967295 CH0_DQ_PSTR 0 7 CH0_DQ_NSTR 8 15 CH1_DQ_PSTR 16 23 CH1_DQ_NSTR 24 31 mmMC_SEQ_WCDR_CTRL 0 0xa39 11 0 4294967295 WCDR_PRE 0 7 WCDR_TIM 8 11 WR_EN 12 12 RD_EN 13 13 AREF_EN 14 14 TRAIN_EN 15 15 TWCDRL 16 19 PRBS_EN 20 20 PRBS_RST 21 21 PREAMBLE 24 27 PRE_MASK 28 31 mmMC_SEQ_TRAIN_WAKEUP_CNTL 0 0xa3a 31 0 4294967295 BOOT_UP_ADDR_TRAIN 0 0 BOOT_UP_WCK_TRAIN 1 1 BOOT_UP_READ_TRAIN 2 2 BOOT_UP_WRITE_TRAIN 3 3 SELF_REFRESH_ADDR_TRAIN 4 4 SELF_REFRESH_WCK_TRAIN 5 5 SELF_REFRESH_READ_TRAIN 6 6 SELF_REFRESH_WRITE_TRAIN 7 7 AUTO_REFRESH_ADDR_TRAIN 8 8 AUTO_REFRESH_WCK_TRAIN 9 9 AUTO_REFRESH_READ_TRAIN 10 10 AUTO_REFRESH_WRITE_TRAIN 11 11 WRITE_ECC_ADDR_TRAIN 12 12 WRITE_ECC_WCK_TRAIN 13 13 WRITE_ECC_READ_TRAIN 14 14 WRITE_ECC_WRITE_TRAIN 15 15 READ_ECC_ADDR_TRAIN 16 16 READ_ECC_WCK_TRAIN 17 17 READ_ECC_READ_TRAIN 18 18 READ_ECC_WRITE_TRAIN 19 19 AUTO_REFRESH_WAKEUP_EARLY 20 20 STOP_WCK_D0 21 21 STOP_WCK_D1 22 22 BLOCK_ARB_RD_D0 24 24 BLOCK_ARB_WR_D0 25 25 BLOCK_ARB_RD_D1 26 26 BLOCK_ARB_WR_D1 27 27 SW_WAKEUP 28 28 DISP_ASTOP_WAKEUP 29 29 TRAIN_DONE_D0 30 30 TRAIN_DONE_D1 31 31 mmMC_SEQ_TRAIN_EDC_THRESHOLD 0 0xa3b 2 0 4294967295 WRITE_EDC_THRESHOLD 0 15 READ_EDC_THRESHOLD 16 31 mmMC_SEQ_TRAIN_EDC_THRESHOLD2 0 0xafe 1 0 4294967295 THRESHOLD_PERIOD 0 31 mmMC_SEQ_TRAIN_EDC_THRESHOLD3 0 0xaff 7 0 4294967295 CH0_LINK_RETRAIN_STATUS 0 0 CH1_LINK_RETRAIN_STATUS 1 1 CLEAR_RETRAIN_STATUS 2 2 RETRAIN_VBI 3 3 RETRAIN_MONITOR 4 5 CH0_LINK_RETRAIN_IN_PROGRESS 8 8 CH1_LINK_RETRAIN_IN_PROGRESS 9 9 mmMC_SEQ_TRAIN_WAKEUP_EDGE 0 0xa3c 27 0 4294967295 D0_ARF_WAKEUP 0 0 D1_ARF_WAKEUP 1 1 D0_REDC_WAKEUP 2 2 D1_REDC_WAKEUP 3 3 D0_WEDC_WAKEUP 4 4 D1_WEDC_WAKEUP 5 5 MCLK_FREQ_CHANGE_WAKEUP 6 6 SCLK_SRBM_READY_WAKEUP 7 7 D0_CMD_FIFO_READY_WAKEUP 8 8 D1_CMD_FIFO_READY_WAKEUP 9 9 D0_DATA_FIFO_READY_WAKEUP 10 10 D1_DATA_FIFO_READY_WAKEUP 11 11 SOFTWARE_WAKEUP_WAKEUP 12 12 RESERVE0_WAKEUP 13 13 TSM_DONE_WAKEUP 14 14 TIMER_DONE_WAKEUP 15 15 TCG_DONE_WAKEUP 17 17 ALLOWSTOP0_WAKEUP 18 18 ALLOWSTOP1_WAKEUP 19 19 DPM_WAKEUP 20 20 ALLOWSTOPB0_WAKEUP 21 21 ALLOWSTOPB1_WAKEUP 22 22 DPM_LPT_WAKEUP 23 23 D0_IDLEH_WAKEUP 24 24 D1_IDLEH_WAKEUP 25 25 PHY_PG_WAKEUP 26 26 SREG_WAKEUP 27 27 mmMC_SEQ_TRAIN_WAKEUP_MASK 0 0xa3d 27 0 4294967295 D0_ARF_WAKEUP 0 0 D1_ARF_WAKEUP 1 1 D0_REDC_WAKEUP 2 2 D1_REDC_WAKEUP 3 3 D0_WEDC_WAKEUP 4 4 D1_WEDC_WAKEUP 5 5 MCLK_FREQ_CHANGE_WAKEUP 6 6 SCLK_SRBM_READY_WAKEUP 7 7 D0_CMD_FIFO_READY_WAKEUP 8 8 D1_CMD_FIFO_READY_WAKEUP 9 9 D0_DATA_FIFO_READY_WAKEUP 10 10 D1_DATA_FIFO_READY_WAKEUP 11 11 SOFTWARE_WAKEUP_WAKEUP 12 12 RESERVE0_WAKEUP 13 13 TSM_DONE_WAKEUP 14 14 TIMER_DONE_WAKEUP 15 15 TCG_DONE_WAKEUP 17 17 ALLOWSTOP0_WAKEUP 18 18 ALLOWSTOP1_WAKEUP 19 19 DPM_WAKEUP 20 20 ALLOWSTOPB0_WAKEUP 21 21 ALLOWSTOPB1_WAKEUP 22 22 DPM_LPT_WAKEUP 23 23 D0_IDLEH_WAKEUP 24 24 D1_IDLEH_WAKEUP 25 25 PHY_PG_WAKEUP 26 26 SREG_WAKEUP 27 27 mmMC_SEQ_TRAIN_CAPTURE 0 0xa3e 27 0 4294967295 D0_ARF_WAKEUP 0 0 D1_ARF_WAKEUP 1 1 D0_REDC_WAKEUP 2 2 D1_REDC_WAKEUP 3 3 D0_WEDC_WAKEUP 4 4 D1_WEDC_WAKEUP 5 5 MCLK_FREQ_CHANGE_WAKEUP 6 6 SCLK_SRBM_READY_WAKEUP 7 7 D0_CMD_FIFO_READY_WAKEUP 8 8 D1_CMD_FIFO_READY_WAKEUP 9 9 D0_DATA_FIFO_READY_WAKEUP 10 10 D1_DATA_FIFO_READY_WAKEUP 11 11 SOFTWARE_WAKEUP_WAKEUP 12 12 RESERVE0_WAKEUP 13 13 TSM_DONE_WAKEUP 14 14 TIMER_DONE_WAKEUP 15 15 TCG_DONE_WAKEUP 17 17 ALLOWSTOP0_WAKEUP 18 18 ALLOWSTOP1_WAKEUP 19 19 DPM_WAKEUP 20 20 ALLOWSTOPB0_WAKEUP 21 21 ALLOWSTOPB1_WAKEUP 22 22 DPM_LPT_WAKEUP 23 23 D0_IDLEH_WAKEUP 24 24 D1_IDLEH_WAKEUP 25 25 PHY_PG_WAKEUP 26 26 SREG_WAKEUP 27 27 mmMC_SEQ_TRAIN_WAKEUP_CLEAR 0 0xa3f 28 0 4294967295 D0_ARF_WAKEUP 0 0 D1_ARF_WAKEUP 1 1 D0_REDC_WAKEUP 2 2 D1_REDC_WAKEUP 3 3 D0_WEDC_WAKEUP 4 4 D1_WEDC_WAKEUP 5 5 MCLK_FREQ_CHANGE_WAKEUP 6 6 SCLK_SRBM_READY_WAKEUP 7 7 D0_CMD_FIFO_READY_WAKEUP 8 8 D1_CMD_FIFO_READY_WAKEUP 9 9 D0_DATA_FIFO_READY_WAKEUP 10 10 D1_DATA_FIFO_READY_WAKEUP 11 11 SOFTWARE_WAKEUP_WAKEUP 12 12 RESERVE0_WAKEUP 13 13 TSM_DONE_WAKEUP 14 14 TIMER_DONE_WAKEUP 15 15 CLEARALL 16 16 TCG_DONE_WAKEUP 17 17 ALLOWSTOP0_WAKEUP 18 18 ALLOWSTOP1_WAKEUP 19 19 DPM_WAKEUP 20 20 ALLOWSTOPB0_WAKEUP 21 21 ALLOWSTOPB1_WAKEUP 22 22 DPM_LPT_WAKEUP 23 23 D0_IDLEH_WAKEUP 24 24 D1_IDLEH_WAKEUP 25 25 PHY_PG_WAKEUP 26 26 SREG_WAKEUP 27 27 mmMC_SEQ_TRAIN_TIMING 0 0xa40 4 0 4294967295 TWT2RT 0 4 TARF2T 5 9 TT2ROW 10 14 TLD2LD 15 19 mmMC_TRAIN_EDCCDR_R_D0 0 0xa41 4 0 4294967295 EDC0 0 7 EDC1 8 15 EDC2 16 23 EDC3 24 31 mmMC_TRAIN_EDCCDR_R_D1 0 0xa42 4 0 4294967295 EDC0 0 7 EDC1 8 15 EDC2 16 23 EDC3 24 31 mmMC_TRAIN_PRBSERR_0_D0 0 0xa43 1 0 4294967295 DQ_STATUS 0 31 mmMC_TRAIN_PRBSERR_1_D0 0 0xa44 7 0 4294967295 DBI_STATUS 0 3 EDC_STATUS 4 7 WCK_STATUS 8 11 WCDR_STATUS 12 15 PMA_PRBSCLR 28 28 PMD0_PRBSCLR 29 29 PMD1_PRBSCLR 30 30 mmMC_TRAIN_PRBSERR_2_D0 0 0xafb 9 0 4294967295 CK_STATUS 0 0 CKB_STATUS 1 1 CS_STATUS 4 5 CKE_STATUS 8 8 RAS_STATUS 9 9 CAS_STATUS 10 10 WE_STATUS 11 11 ADDR_STATUS 16 25 ABI_STATUS 28 28 mmMC_TRAIN_EDC_STATUS_D0 0 0xa45 2 0 4294967295 WEDC_CNT 0 15 REDC_CNT 16 31 mmMC_TRAIN_PRBSERR_0_D1 0 0xa46 1 0 4294967295 DQ_STATUS 0 31 mmMC_TRAIN_PRBSERR_1_D1 0 0xa47 7 0 4294967295 DBI_STATUS 0 3 EDC_STATUS 4 7 WCK_STATUS 8 11 WCDR_STATUS 12 15 PMA_PRBSCLR 28 28 PMD0_PRBSCLR 29 29 PMD1_PRBSCLR 30 30 mmMC_TRAIN_PRBSERR_2_D1 0 0xafc 9 0 4294967295 CK_STATUS 0 0 CKB_STATUS 1 1 CS_STATUS 4 5 CKE_STATUS 8 8 RAS_STATUS 9 9 CAS_STATUS 10 10 WE_STATUS 11 11 ADDR_STATUS 16 25 ABI_STATUS 28 28 mmMC_TRAIN_EDC_STATUS_D1 0 0xa48 2 0 4294967295 WEDC_CNT 0 15 REDC_CNT 16 31 mmMC_IO_TXCNTL_DPHY0_D0 0 0xa49 15 0 4294967295 BIASSEL 0 1 DRVDUTY 2 3 LOWCMEN 4 4 QDR 5 5 EMPH 6 6 TXPD 7 7 PTERM 8 11 NTERM 12 15 PDRV 16 19 NDRV 20 23 TSTEN 24 24 EDCTX_CLKGATE_EN 25 25 TXBYPASS 26 26 PLL_LOOPBCK 27 27 TXBYPASS_DATA 28 31 mmMC_IO_TXCNTL_DPHY1_D0 0 0xa4a 15 0 4294967295 BIASSEL 0 1 DRVDUTY 2 3 LOWCMEN 4 4 QDR 5 5 EMPH 6 6 TXPD 7 7 PTERM 8 11 NTERM 12 15 PDRV 16 19 NDRV 20 23 TSTEN 24 24 EDCTX_CLKGATE_EN 25 25 TXBYPASS 26 26 PLL_LOOPBCK 27 27 TXBYPASS_DATA 28 31 mmMC_IO_TXCNTL_APHY_D0 0 0xa4b 18 0 4294967295 BIASSEL 0 1 DRVDUTY 2 3 LOWCMEN 4 4 QDR 5 5 EMPH 6 6 TXPD 7 7 PTERM 8 11 TXBPASS_SEL 12 12 PMA_LOOPBACK 13 15 PDRV 16 19 NDRV 20 22 YCLKON 23 23 TSTEN 24 24 TXRESET 25 25 TXBYPASS 26 26 TXBYPASS_DATA 27 29 CKE_BIT 30 30 CKE_SEL 31 31 mmMC_IO_RXCNTL_DPHY0_D0 0 0xa4c 15 0 4294967295 RXBIASSEL 0 1 RCVSEL 2 2 VREFPDNB 3 3 RXDPWRON_DLY 4 5 RXPDNB 6 6 RXLP 7 7 VREFCAL 8 11 VREFCAL_STR 12 15 VREFSEL 16 16 RX_PEAKSEL 18 19 DLL_ADJ_B0 20 22 DLL_ADJ_B1 24 26 DLL_ADJ_M 28 28 REFCLK_PWRON 29 29 DLL_BW_CTRL 30 31 mmMC_IO_RXCNTL1_DPHY0_D0 0 0xadf 13 0 4294967295 VREFCAL1_MSB 0 3 VREFCAL2_MSB 4 7 VREFCAL3 8 15 VREFSEL2 16 16 VREFSEL3 17 17 VREFPDNB_1 18 18 DLL_PWRGOOD_OVR 19 19 DLL_VCTRLADC_EN 20 20 DLL_MSTR_STBY 21 21 RXLEQ_EN 22 22 RXLEQ_NXT 23 23 PMD_LOOPBACK 25 27 DLL_RSV 28 31 mmMC_IO_RXCNTL_DPHY1_D0 0 0xa4d 15 0 4294967295 RXBIASSEL 0 1 RCVSEL 2 2 VREFPDNB 3 3 RXDPWRON_DLY 4 5 RXPDNB 6 6 RXLP 7 7 VREFCAL 8 11 VREFCAL_STR 12 15 VREFSEL 16 16 RX_PEAKSEL 18 19 DLL_ADJ_B0 20 22 DLL_ADJ_B1 24 26 DLL_ADJ_M 28 28 REFCLK_PWRON 29 29 DLL_BW_CTRL 30 31 mmMC_IO_RXCNTL1_DPHY1_D0 0 0xae0 13 0 4294967295 VREFCAL1_MSB 0 3 VREFCAL2_MSB 4 7 VREFCAL3 8 15 VREFSEL2 16 16 VREFSEL3 17 17 VREFPDNB_1 18 18 DLL_PWRGOOD_OVR 19 19 DLL_VCTRLADC_EN 20 20 DLL_MSTR_STBY 21 21 RXLEQ_EN 22 22 RXLEQ_NXT 23 23 PMD_LOOPBACK 25 27 DLL_RSV 28 31 mmMC_IO_DPHY_STR_CNTL_D0 0 0xa4e 10 0 4294967295 PSTR_OFF_D 0 5 NSTR_OFF_D 6 11 PSTR_OFF_S 12 17 NSTR_OFF_S 18 23 USE_D_CAL 24 24 USE_S_CAL 25 25 CAL_SEL 26 27 LOAD_D_STR 28 28 LOAD_S_STR 29 29 AUTO_LD_STR 30 30 mmMC_IO_APHY_STR_CNTL_D0 0 0xa97 8 0 4294967295 PSTR_OFF_A 0 5 NSTR_OFF_A 6 11 PSTR_OFF_D_RD 12 17 USE_A_CAL 24 24 USE_D_RD_CAL 25 25 CAL_SEL 26 27 LOAD_A_STR 28 28 LOAD_D_RD_STR 29 29 mmMC_IO_TXCNTL_DPHY0_D1 0 0xa4f 15 0 4294967295 BIASSEL 0 1 DRVDUTY 2 3 LOWCMEN 4 4 QDR 5 5 EMPH 6 6 TXPD 7 7 PTERM 8 11 NTERM 12 15 PDRV 16 19 NDRV 20 23 TSTEN 24 24 EDCTX_CLKGATE_EN 25 25 TXBYPASS 26 26 PLL_LOOPBCK 27 27 TXBYPASS_DATA 28 31 mmMC_IO_TXCNTL_DPHY1_D1 0 0xa50 15 0 4294967295 BIASSEL 0 1 DRVDUTY 2 3 LOWCMEN 4 4 QDR 5 5 EMPH 6 6 TXPD 7 7 PTERM 8 11 NTERM 12 15 PDRV 16 19 NDRV 20 23 TSTEN 24 24 EDCTX_CLKGATE_EN 25 25 TXBYPASS 26 26 PLL_LOOPBCK 27 27 TXBYPASS_DATA 28 31 mmMC_IO_TXCNTL_APHY_D1 0 0xa51 18 0 4294967295 BIASSEL 0 1 DRVDUTY 2 3 LOWCMEN 4 4 QDR 5 5 EMPH 6 6 TXPD 7 7 PTERM 8 11 TXBPASS_SEL 12 12 PMA_LOOPBACK 13 15 PDRV 16 19 NDRV 20 22 YCLKON 23 23 TSTEN 24 24 TXRESET 25 25 TXBYPASS 26 26 TXBYPASS_DATA 27 29 CKE_BIT 30 30 CKE_SEL 31 31 mmMC_IO_RXCNTL_DPHY0_D1 0 0xa52 15 0 4294967295 RXBIASSEL 0 1 RCVSEL 2 2 VREFPDNB 3 3 RXDPWRON_DLY 4 5 RXPDNB 6 6 RXLP 7 7 VREFCAL 8 11 VREFCAL_STR 12 15 VREFSEL 16 16 RX_PEAKSEL 18 19 DLL_ADJ_B0 20 22 DLL_ADJ_B1 24 26 DLL_ADJ_M 28 28 REFCLK_PWRON 29 29 DLL_BW_CTRL 30 31 mmMC_IO_RXCNTL1_DPHY0_D1 0 0xae1 13 0 4294967295 VREFCAL1_MSB 0 3 VREFCAL2_MSB 4 7 VREFCAL3 8 15 VREFSEL2 16 16 VREFSEL3 17 17 VREFPDNB_1 18 18 DLL_PWRGOOD_OVR 19 19 DLL_VCTRLADC_EN 20 20 DLL_MSTR_STBY 21 21 RXLEQ_EN 22 22 RXLEQ_NXT 23 23 PMD_LOOPBACK 25 27 DLL_RSV 28 31 mmMC_IO_RXCNTL_DPHY1_D1 0 0xa53 15 0 4294967295 RXBIASSEL 0 1 RCVSEL 2 2 VREFPDNB 3 3 RXDPWRON_DLY 4 5 RXPDNB 6 6 RXLP 7 7 VREFCAL 8 11 VREFCAL_STR 12 15 VREFSEL 16 16 RX_PEAKSEL 18 19 DLL_ADJ_B0 20 22 DLL_ADJ_B1 24 26 DLL_ADJ_M 28 28 REFCLK_PWRON 29 29 DLL_BW_CTRL 30 31 mmMC_IO_RXCNTL1_DPHY1_D1 0 0xae2 13 0 4294967295 VREFCAL1_MSB 0 3 VREFCAL2_MSB 4 7 VREFCAL3 8 15 VREFSEL2 16 16 VREFSEL3 17 17 VREFPDNB_1 18 18 DLL_PWRGOOD_OVR 19 19 DLL_VCTRLADC_EN 20 20 DLL_MSTR_STBY 21 21 RXLEQ_EN 22 22 RXLEQ_NXT 23 23 PMD_LOOPBACK 25 27 DLL_RSV 28 31 mmMC_IO_DPHY_STR_CNTL_D1 0 0xa54 10 0 4294967295 PSTR_OFF_D 0 5 NSTR_OFF_D 6 11 PSTR_OFF_S 12 17 NSTR_OFF_S 18 23 USE_D_CAL 24 24 USE_S_CAL 25 25 CAL_SEL 26 27 LOAD_D_STR 28 28 LOAD_S_STR 29 29 AUTO_LD_STR 30 30 mmMC_IO_APHY_STR_CNTL_D1 0 0xa98 8 0 4294967295 PSTR_OFF_A 0 5 NSTR_OFF_A 6 11 PSTR_OFF_D_RD 12 17 USE_A_CAL 24 24 USE_D_RD_CAL 25 25 CAL_SEL 26 27 LOAD_A_STR 28 28 LOAD_D_RD_STR 29 29 mmMC_IO_CDRCNTL_D0 0 0xa55 20 0 4294967295 RXPHASE_B01 0 3 RXPHASE_B23 4 7 RXCDREN_B01 8 8 RXCDREN_B23 9 9 RXCDRBYPASS_B01 10 10 RXCDRBYPASS_B23 11 11 RXPHASE1_B01 12 15 RXPHASE1_B23 16 19 DQTXCDREN_B0 20 20 DQTXCDREN_B1 21 21 DQRXCDREN_B0 22 22 DQRXCDREN_B1 23 23 WCDRRXCDREN_B0 24 24 WCDRRXCDREN_B1 25 25 WCDREDC_B0 26 26 WCDREDC_B1 27 27 DQRXSEL_B0 28 28 DQRXSEL_B1 29 29 DQTXSEL_B0 30 30 DQTXSEL_B1 31 31 mmMC_IO_CDRCNTL1_D0 0 0xadd 4 0 4294967295 DQ_RXPHASE_B0 0 7 DQ_RXPHASE_B1 8 15 WCDR_TXPHASE_B0 16 23 WCDR_TXPHASE_B1 24 31 mmMC_IO_CDRCNTL2_D0 0 0xae4 11 0 4294967295 CDR_FB_SEL0 0 0 CDR_FB_SEL1 1 1 EDC_RXEN_OVR0 2 2 EDC_RXEN_OVR1 3 3 TXCDRBYPASS0 4 4 TXCDRBYPASS1 5 5 WCK_RXEN_OVR0 6 6 WCK_RXEN_OVR1 7 7 WCDRTXPWRON 8 11 WCDRTXSEL 12 15 WCDRTRACK01 16 19 mmMC_IO_CDRCNTL_D1 0 0xa56 20 0 4294967295 RXPHASE_B01 0 3 RXPHASE_B23 4 7 RXCDREN_B01 8 8 RXCDREN_B23 9 9 RXCDRBYPASS_B01 10 10 RXCDRBYPASS_B23 11 11 RXPHASE1_B01 12 15 RXPHASE1_B23 16 19 DQTXCDREN_B0 20 20 DQTXCDREN_B1 21 21 DQRXCDREN_B0 22 22 DQRXCDREN_B1 23 23 WCDRRXCDREN_B0 24 24 WCDRRXCDREN_B1 25 25 WCDREDC_B0 26 26 WCDREDC_B1 27 27 DQRXSEL_B0 28 28 DQRXSEL_B1 29 29 DQTXSEL_B0 30 30 DQTXSEL_B1 31 31 mmMC_IO_CDRCNTL1_D1 0 0xade 4 0 4294967295 DQ_RXPHASE_B0 0 7 DQ_RXPHASE_B1 8 15 WCDR_TXPHASE_B0 16 23 WCDR_TXPHASE_B1 24 31 mmMC_IO_CDRCNTL2_D1 0 0xae5 11 0 4294967295 CDR_FB_SEL0 0 0 CDR_FB_SEL1 1 1 EDC_RXEN_OVR0 2 2 EDC_RXEN_OVR1 3 3 TXCDRBYPASS0 4 4 TXCDRBYPASS1 5 5 WCK_RXEN_OVR0 6 6 WCK_RXEN_OVR1 7 7 WCDRTXPWRON 8 11 WCDRTXSEL 12 15 WCDRTRACK01 16 19 mmMC_SEQ_FIFO_CTL 0 0xa57 13 0 4294967295 W_LD_INIT_D0 0 1 W_SYC_SEL 2 3 R_LD_INIT 4 5 R_SYC_SEL 6 7 CG_DIS_D0 8 8 CG_DIS_D1 9 9 W_LD_INIT_D1 10 11 SYC_DLY 12 14 W_ASYC_EXT 16 17 W_DSYC_EXT 18 19 R_DQS_LD_INIT 20 23 R_DQS_STEP 24 27 R_DQS_FRC 28 28 mmMC_SEQ_TXFRAMING_BYTE0_D0 0 0xa58 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE1_D0 0 0xa59 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE2_D0 0 0xa5a 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE3_D0 0 0xa5b 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_DBI_D0 0 0xa5c 4 0 4294967295 DBI0 0 3 DBI1 4 7 DBI2 8 11 DBI3 12 15 mmMC_SEQ_TXFRAMING_EDC_D0 0 0xa5d 8 0 4294967295 EDC0 0 3 EDC1 4 7 EDC2 8 11 EDC3 12 15 WCDR0 16 19 WCDR1 20 23 WCDR2 24 27 WCDR3 28 31 mmMC_SEQ_TXFRAMING_FCK_D0 0 0xa5e 4 0 4294967295 FCK0 0 3 FCK1 4 7 FCK2 8 11 FCK3 12 15 mmMC_SEQ_TXFRAMING_BYTE0_D1 0 0xa60 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE1_D1 0 0xa61 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE2_D1 0 0xa62 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_BYTE3_D1 0 0xa63 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_TXFRAMING_DBI_D1 0 0xa64 4 0 4294967295 DBI0 0 3 DBI1 4 7 DBI2 8 11 DBI3 12 15 mmMC_SEQ_TXFRAMING_EDC_D1 0 0xa65 8 0 4294967295 EDC0 0 3 EDC1 4 7 EDC2 8 11 EDC3 12 15 WCDR0 16 19 WCDR1 20 23 WCDR2 24 27 WCDR3 28 31 mmMC_SEQ_TXFRAMING_FCK_D1 0 0xa66 4 0 4294967295 FCK0 0 3 FCK1 4 7 FCK2 8 11 FCK3 12 15 mmMC_SEQ_RXFRAMING_BYTE0_D0 0 0xa67 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE1_D0 0 0xa68 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE2_D0 0 0xa69 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE3_D0 0 0xa6a 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_DBI_D0 0 0xa6b 4 0 4294967295 DBI0 0 3 DBI1 4 7 DBI2 8 11 DBI3 12 15 mmMC_SEQ_RXFRAMING_EDC_D0 0 0xa6c 8 0 4294967295 EDC0 0 3 EDC1 4 7 EDC2 8 11 EDC3 12 15 WCDR0 16 19 WCDR1 20 23 WCDR2 24 27 WCDR3 28 31 mmMC_SEQ_RXFRAMING_BYTE0_D1 0 0xa6d 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE1_D1 0 0xa6e 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE2_D1 0 0xa6f 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_BYTE3_D1 0 0xa70 8 0 4294967295 DQ0 0 3 DQ1 4 7 DQ2 8 11 DQ3 12 15 DQ4 16 19 DQ5 20 23 DQ6 24 27 DQ7 28 31 mmMC_SEQ_RXFRAMING_DBI_D1 0 0xa71 4 0 4294967295 DBI0 0 3 DBI1 4 7 DBI2 8 11 DBI3 12 15 mmMC_SEQ_RXFRAMING_EDC_D1 0 0xa72 8 0 4294967295 EDC0 0 3 EDC1 4 7 EDC2 8 11 EDC3 12 15 WCDR0 16 19 WCDR1 20 23 WCDR2 24 27 WCDR3 28 31 mmMC_IO_PAD_CNTL 0 0xa73 10 0 4294967295 MEM_IO_IMP_MIN 0 7 MEM_IO_IMP_MAX 8 15 TXPHASE_GRAY 16 16 RXPHASE_GRAY 17 17 OVL_YCLKON_D0 18 18 OVL_YCLKON_D1 19 19 ATBSEL 20 23 ATBEN 24 29 ATBSEL_D1 30 30 ATBSEL_D0 31 31 mmMC_IO_PAD_CNTL_D0 0 0xa74 21 0 4294967295 DELAY_CLK_SYNC 2 2 DELAY_CMD_SYNC 3 3 DELAY_ADR_SYNC 4 4 MEM_FALL_OUT_CLK 7 7 MEM_FALL_OUT_CMD 8 8 MEM_FALL_OUT_ADR 9 9 FORCE_EN_RD_STR 10 10 EN_RD_STR_DLY 11 11 DISABLE_CMD 12 12 DISABLE_ADR 13 13 VREFI_EN 14 14 VREFI_SEL 15 19 CK_AUTO_EN 20 20 CK_DELAY_SEL 21 21 CK_DELAY_N 22 23 CK_DELAY_P 24 25 TXPWROFF_CKE 27 27 UNI_STR 28 28 DIFF_STR 29 29 GDDR_PWRON 30 30 TXPWROFF_CLK 31 31 mmMC_IO_PAD_CNTL_D1 0 0xa75 25 0 4294967295 DELAY_DATA_SYNC 0 0 DELAY_STR_SYNC 1 1 DELAY_CLK_SYNC 2 2 DELAY_CMD_SYNC 3 3 DELAY_ADR_SYNC 4 4 MEM_FALL_OUT_DATA 5 5 MEM_FALL_OUT_STR 6 6 MEM_FALL_OUT_CLK 7 7 MEM_FALL_OUT_CMD 8 8 MEM_FALL_OUT_ADR 9 9 FORCE_EN_RD_STR 10 10 EN_RD_STR_DLY 11 11 DISABLE_CMD 12 12 DISABLE_ADR 13 13 VREFI_EN 14 14 VREFI_SEL 15 19 CK_AUTO_EN 20 20 CK_DELAY_SEL 21 21 CK_DELAY_N 22 23 CK_DELAY_P 24 25 TXPWROFF_CKE 27 27 UNI_STR 28 28 DIFF_STR 29 29 GDDR_PWRON 30 30 TXPWROFF_CLK 31 31 mmMC_NPL_STATUS 0 0xa76 8 0 4294967295 D0_PDELAY 0 1 D0_NDELAY 2 3 D0_PEARLY 4 4 D0_NEARLY 5 5 D1_PDELAY 6 7 D1_NDELAY 8 9 D1_PEARLY 10 10 D1_NEARLY 11 11 mmMC_BIST_CMD_CNTL 0 0xa8e 12 0 4294967295 RESET 0 0 CMD_ISSUE_MODE 1 1 CMD_ISSUE_LOOP 2 2 LOOP_END_CONDITION 3 3 LOOP_CNT_MAX 4 15 CMD_ISSUE_MODE_U 16 16 CMD_ISSUE_RUN 17 17 LOOP_CNT_RD 18 27 ENABLE_D0 28 28 ENABLE_D1 29 29 STATUS_CH 30 30 DONE 31 31 mmMC_BIST_CNTL 0 0xa05 14 0 4294967295 RESET 0 0 RUN 1 1 PTR_RST_D0 2 2 PTR_RST_D1 3 3 MOP_MODE 4 4 ADR_MODE 5 5 DAT_MODE 6 6 LOOP 10 11 ENABLE_D0 12 12 ENABLE_D1 13 13 LOAD_RTDATA_CH 14 14 LOOP_CNT 16 27 DONE 30 30 LOAD_RTDATA 31 31 mmMC_BIST_AUTO_CNTL 0 0xa06 5 0 4294967295 MOP 0 1 ADR_GEN 4 7 LFSR_KEY 8 23 LFSR_RESET 24 24 ADR_RESET 25 25 mmMC_BIST_DIR_CNTL 0 0xa07 9 0 4294967295 MOP 0 2 EOB 3 3 MOP_LOAD 4 4 DATA_LOAD 5 5 CMD_RTR_D0 6 6 DAT_RTR_D0 7 7 CMD_RTR_D1 8 8 DAT_RTR_D1 9 9 MOP3 10 10 mmMC_BIST_SADDR 0 0xa08 6 0 4294967295 COL 0 9 ROW 10 23 BANK 24 27 RANK 28 28 COLH 29 29 ROWH 30 31 mmMC_BIST_EADDR 0 0xa09 6 0 4294967295 COL 0 9 ROW 10 23 BANK 24 27 RANK 28 28 COLH 29 29 ROWH 30 31 mmMC_BIST_CMP_CNTL 0 0xa8d 11 0 4294967295 CMP_MASK_BYTE 0 3 CMP_MASK_BIT 4 11 LOAD_RTEDC 12 12 DATA_STORE_SEL 13 13 EDC_STORE_SEL 14 14 ENABLE_CMD_FIFO 15 15 CMP 16 17 DAT_MODE 18 18 EDC_STORE_MODE 19 19 DATA_STORE_MODE 20 21 MISMATCH_CNT 22 31 mmMC_BIST_CMP_CNTL_2 0 0xab6 4 0 4294967295 DATA_STORE_CNT 0 4 DATA_STORE_CNT_RST 8 8 EDC_STORE_CNT 12 16 EDC_STORE_CNT_RST 20 20 mmMC_BIST_DATA_WORD0 0 0xa0a 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD1 0 0xa0b 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD2 0 0xa0c 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD3 0 0xa0d 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD4 0 0xa0e 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD5 0 0xa0f 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD6 0 0xa10 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_WORD7 0 0xa11 1 0 4294967295 DATA 0 31 mmMC_BIST_DATA_MASK 0 0xa12 1 0 4294967295 MASK 0 31 mmMC_BIST_MISMATCH_ADDR 0 0xa13 6 0 4294967295 COL 0 9 ROW 10 23 BANK 24 27 RANK 28 28 COLH 29 29 ROWH 30 31 mmMC_BIST_RDATA_WORD0 0 0xa14 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD1 0 0xa15 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD2 0 0xa16 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD3 0 0xa17 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD4 0 0xa18 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD5 0 0xa19 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD6 0 0xa1a 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_WORD7 0 0xa1b 1 0 4294967295 RDATA 0 31 mmMC_BIST_RDATA_MASK 0 0xa1c 1 0 4294967295 MASK 0 31 mmMC_BIST_RDATA_EDC 0 0xa1d 1 0 4294967295 EDC 0 31 mmMC_SEQ_PERF_CNTL 0 0xa77 2 0 4294967295 MONITOR_PERIOD 0 29 CNTL 30 31 mmMC_SEQ_PERF_CNTL_1 0 0xafd 9 0 4294967295 PAUSE 0 0 SEL_A_MSB 8 8 SEL_B_MSB 9 9 SEL_CH0_C_MSB 10 10 SEL_CH0_D_MSB 11 11 SEL_CH1_A_MSB 12 12 SEL_CH1_B_MSB 13 13 SEL_CH1_C_MSB 14 14 SEL_CH1_D_MSB 15 15 mmMC_SEQ_PERF_SEQ_CTL 0 0xa78 8 0 4294967295 SEL_A 0 3 SEL_B 4 7 SEL_CH0_C 8 11 SEL_CH0_D 12 15 SEL_CH1_A 16 19 SEL_CH1_B 20 23 SEL_CH1_C 24 27 SEL_CH1_D 28 31 mmMC_SEQ_PERF_SEQ_CNT_A_I0 0 0xa79 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_A_I1 0 0xa7a 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_B_I0 0 0xa7b 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_B_I1 0 0xa7c 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_C_I0 0 0xad9 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_C_I1 0 0xada 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_D_I0 0 0xadb 1 0 4294967295 VALUE 0 31 mmMC_SEQ_PERF_SEQ_CNT_D_I1 0 0xadc 1 0 4294967295 VALUE 0 31 mmMC_SEQ_STATUS_M 0 0xa7d 20 0 4294967295 PWRUP_COMPL_D0 0 0 PWRUP_COMPL_D1 1 1 CMD_RDY_D0 2 2 CMD_RDY_D1 3 3 SLF_D0 4 4 SLF_D1 5 5 SS_SLF_D0 6 6 SS_SLF_D1 7 7 SEQ0_ARB_CMD_FIFO_EMPTY 8 8 SEQ1_ARB_CMD_FIFO_EMPTY 9 9 SEQ0_RS_DATA_FIFO_FULL 12 12 SEQ1_RS_DATA_FIFO_FULL 13 13 SEQ0_BUSY 14 14 SEQ1_BUSY 15 15 PMG_PWRSTATE 16 16 PMG_FSMSTATE 20 24 SEQ0_BUSY_HYS 25 25 SEQ1_BUSY_HYS 26 26 SEQ0_ALLOWSTOP 27 27 SEQ1_ALLOWSTOP 28 28 mmMC_SEQ_STATUS_S 0 0xa20 6 0 4294967295 SEQ0_ARB_DATA_FIFO_FULL 0 0 SEQ1_ARB_DATA_FIFO_FULL 1 1 SEQ0_ARB_CMD_FIFO_FULL 4 4 SEQ1_ARB_CMD_FIFO_FULL 5 5 SEQ0_RS_DATA_FIFO_EMPTY 8 8 SEQ1_RS_DATA_FIFO_EMPTY 9 9 mmMC_CG_DATAPORT 0 0xa21 1 0 4294967295 DATA_FIELD 0 31 mmMC_SEQ_VENDOR_ID_I0 0 0xa7e 1 0 4294967295 VALUE 0 31 mmMC_SEQ_VENDOR_ID_I1 0 0xa7f 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC0 0 0xa80 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC1 0 0xa81 1 0 4294967295 VALUE 0 31 mmMC_SEQ_RESERVE_0_S 0 0xa1e 2 0 4294967295 MCLK_GCK_SEL 0 0 SCLK_FIELD 1 31 mmMC_SEQ_RESERVE_1_S 0 0xa1f 1 0 4294967295 SCLK_FIELD 0 31 mmMC_SEQ_RESERVE_M 0 0xa82 1 0 4294967295 MCLK_FIELD 0 31 mmMC_SEQ_IO_RESERVE_D0 0 0xab7 3 0 4294967295 DPHY0_RSV 0 11 DPHY1_RSV 12 23 APHY_RSV 24 31 mmMC_SEQ_IO_RESERVE_D1 0 0xab8 3 0 4294967295 DPHY0_RSV 0 11 DPHY1_RSV 12 23 APHY_RSV 24 31 mmMC_SEQ_SUP_CNTL 0 0xa32 9 0 4294967295 RUN 0 0 SINGLE_STEP 1 1 SW_WAKE 2 2 RESET_PC 3 3 PGM_WRITE 4 4 PGM_READ 5 5 FAST_WRITE 6 6 BKPT_CLEAR 7 7 PGM_CHKSUM 23 31 mmMC_SEQ_SUP_PGM 0 0xa33 1 0 4294967295 CNTL 0 31 mmMC_SEQ_SUP_GP0_STAT 0 0xa8f 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_GP1_STAT 0 0xa90 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_GP2_STAT 0 0xa85 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_GP3_STAT 0 0xa86 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_IR_STAT 0 0xa87 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_DEC_STAT 0 0xa88 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_PGM_STAT 0 0xa89 1 0 4294967295 STATUS 0 31 mmMC_SEQ_SUP_R_PGM 0 0xa8a 1 0 4294967295 PGM 0 31 mmMC_SEQ_MISC3 0 0xa8b 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC4 0 0xa8c 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC5 0 0xa95 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC6 0 0xa96 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC7 0 0xa99 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC8 0 0xa5f 1 0 4294967295 VALUE 0 31 mmMC_SEQ_MISC9 0 0xae7 1 0 4294967295 VALUE 0 31 mmMC_SEQ_CG 0 0xa9a 4 0 4294967295 CG_SEQ_REQ 0 7 CG_SEQ_RESP 8 15 SEQ_CG_REQ 16 23 SEQ_CG_RESP 24 31 mmMC_SEQ_BYTE_REMAP_D0 0 0xa93 4 0 4294967295 BYTE0 0 1 BYTE1 2 3 BYTE2 4 5 BYTE3 6 7 mmMC_SEQ_BYTE_REMAP_D1 0 0xa94 4 0 4294967295 BYTE0 0 1 BYTE1 2 3 BYTE2 4 5 BYTE3 6 7 mmMC_SEQ_BIT_REMAP_B0_D0 0 0xaa3 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B1_D0 0 0xaa4 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B2_D0 0 0xaa5 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B3_D0 0 0xaa6 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B0_D1 0 0xaa7 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B1_D1 0 0xaa8 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B2_D1 0 0xaa9 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_BIT_REMAP_B3_D1 0 0xaaa 8 0 4294967295 BIT0 0 2 BIT1 3 5 BIT2 6 8 BIT3 9 11 BIT4 12 14 BIT5 15 17 BIT6 18 20 BIT7 21 23 mmMC_SEQ_RAS_TIMING_LP 0 0xa9b 6 0 4294967295 TRCDW 0 4 TRCDWA 5 9 TRCDR 10 14 TRCDRA 15 19 TRRD 20 23 TRC 24 30 mmMC_SEQ_CAS_TIMING_LP 0 0xa9c 7 0 4294967295 TNOPW 0 1 TNOPR 2 3 TR2W 4 8 TCCDL 9 11 TR2R 12 15 TW2R 16 20 TCL 24 28 mmMC_SEQ_MISC_TIMING_LP 0 0xa9d 4 0 4294967295 TRP_WRA 0 5 TRP_RDA 8 13 TRP 15 19 TRFC 20 28 mmMC_SEQ_MISC_TIMING2_LP 0 0xa9e 8 0 4294967295 PA2RDATA 0 2 PA2WDATA 4 6 FAW 8 12 TREDC 13 15 TWEDC 16 20 TADR 21 23 TFCKTR 24 27 TWDATATR 28 31 mmMC_SEQ_RD_CTL_D0_LP 0 0xac7 9 0 4294967295 RCV_DLY 0 2 RCV_EXT 3 7 RST_SEL 8 9 RXDPWRON_DLY 10 11 RST_HLD 12 15 STR_PRE 16 16 STR_PST 17 17 RBS_DLY 20 24 RBS_WEDC_DLY 25 29 mmMC_SEQ_RD_CTL_D1_LP 0 0xac8 9 0 4294967295 RCV_DLY 0 2 RCV_EXT 3 7 RST_SEL 8 9 RXDPWRON_DLY 10 11 RST_HLD 12 15 STR_PRE 16 16 STR_PST 17 17 RBS_DLY 20 24 RBS_WEDC_DLY 25 29 mmMC_SEQ_WR_CTL_D0_LP 0 0xa9f 13 0 4294967295 DAT_DLY 0 3 DQS_DLY 4 7 DQS_XTR 8 8 DAT_2Y_DLY 9 9 ADR_2Y_DLY 10 10 CMD_2Y_DLY 11 11 OEN_DLY 12 15 OEN_EXT 16 19 OEN_SEL 20 21 ODT_DLY 24 27 ODT_EXT 28 28 ADR_DLY 29 29 CMD_DLY 30 30 mmMC_SEQ_WR_CTL_D1_LP 0 0xaa0 13 0 4294967295 DAT_DLY 0 3 DQS_DLY 4 7 DQS_XTR 8 8 DAT_2Y_DLY 9 9 ADR_2Y_DLY 10 10 CMD_2Y_DLY 11 11 OEN_DLY 12 15 OEN_EXT 16 19 OEN_SEL 20 21 ODT_DLY 24 27 ODT_EXT 28 28 ADR_DLY 29 29 CMD_DLY 30 30 mmMC_SEQ_WR_CTL_2_LP 0 0xad6 7 0 4294967295 DAT_DLY_H_D0 0 0 DQS_DLY_H_D0 1 1 OEN_DLY_H_D0 2 2 DAT_DLY_H_D1 3 3 DQS_DLY_H_D1 4 4 OEN_DLY_H_D1 5 5 WCDR_EN 6 6 mmMC_SEQ_PMG_CMD_EMRS_LP 0 0xaa1 7 0 4294967295 ADR 0 15 MOP 16 18 BNK_MSB 19 19 END 20 20 CSB 21 22 ADR_MSB1 28 28 ADR_MSB0 29 29 mmMC_SEQ_PMG_CMD_MRS_LP 0 0xaa2 7 0 4294967295 ADR 0 15 MOP 16 18 BNK_MSB 19 19 END 20 20 CSB 21 22 ADR_MSB1 28 28 ADR_MSB0 29 29 mmMC_SEQ_PMG_CMD_MRS1_LP 0 0xad2 7 0 4294967295 ADR 0 15 MOP 16 18 BNK_MSB 19 19 END 20 20 CSB 21 22 ADR_MSB1 28 28 ADR_MSB0 29 29 mmMC_SEQ_PMG_CMD_MRS2_LP 0 0xad8 7 0 4294967295 ADR 0 15 MOP 16 18 BNK_MSB 19 19 END 20 20 CSB 21 22 ADR_MSB1 28 28 ADR_MSB0 29 29 mmMC_SEQ_PMG_TIMING_LP 0 0xad3 7 0 4294967295 TCKSRE 0 2 TCKSRX 4 6 TCKE_PULSE 8 11 TCKE 12 17 SEQ_IDLE 18 20 TCKE_PULSE_MSB 23 23 SEQ_IDLE_SS 24 31 mmMC_SEQ_IO_RWORD0 0 0xaac 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD1 0 0xaad 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD2 0 0xaae 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD3 0 0xaaf 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD4 0 0xab0 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD5 0 0xab1 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD6 0 0xab2 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RWORD7 0 0xab3 1 0 4294967295 RDATA 0 31 mmMC_SEQ_IO_RDBI 0 0xab4 1 0 4294967295 MASK 0 31 mmMC_SEQ_IO_REDC 0 0xab5 1 0 4294967295 EDC 0 31 mmMC_SEQ_TCG_CNTL 0 0xabd 20 0 4294967295 RESET 0 0 ENABLE_D0 1 1 ENABLE_D1 2 2 START 3 3 NFIFO 4 6 INFINITE_CMD 7 7 MOP 8 11 DATA_CNT 12 15 LOAD_FIFO 16 16 SHORT_LDFF 17 17 FRAME_TRAIN 18 18 BURST_NUM 19 21 ISSUE_AREF 22 22 TXDBI_CNTL 23 23 VPTR_MASK 24 24 AREF_LAST 25 25 AREF_BOTH 26 26 LD_RTDATA_OVR 28 28 LD_RTDATA_CH 29 29 DONE 31 31 mmMC_SEQ_TSM_CTRL 0 0xabe 14 0 4294967295 START 0 0 CAPTURE_START 1 1 DONE 2 2 ERR 3 3 STEP 4 4 DIRECTION 5 5 INVERT 6 6 MASK_BITS 7 7 UPDATE_LOOP 8 9 ROT_INV 10 10 DUAL_CH_EN 11 11 DONE0 12 12 DONE1 13 13 POINTER 16 31 mmMC_SEQ_TSM_GCNT 0 0xabf 4 0 4294967295 TRUE_ACT 0 3 FALSE_ACT 4 7 TESTS 8 15 COMP_VALUE 16 31 mmMC_SEQ_TSM_OCNT 0 0xac0 4 0 4294967295 TRUE_ACT 0 3 FALSE_ACT 4 7 TESTS 8 15 CMP_VALUE 16 31 mmMC_SEQ_TSM_NCNT 0 0xac1 6 0 4294967295 TRUE_ACT 0 3 FALSE_ACT 4 7 TESTS 8 15 RANGE_LOW 16 19 RANGE_HIGH 20 23 NIBBLE_SKIP 24 27 mmMC_SEQ_TSM_BCNT 0 0xac2 5 0 4294967295 TRUE_ACT 0 3 FALSE_ACT 4 7 BCNT_TESTS 8 15 COMP_VALUE 16 23 DONE_TESTS 24 31 mmMC_SEQ_TSM_FLAG 0 0xac3 5 0 4294967295 TRUE_ACT 0 3 FALSE_ACT 4 7 FLAG_TESTS 8 15 NBBL_MASK 16 19 ERROR_TESTS 24 31 mmMC_SEQ_TSM_UPDATE 0 0xac4 5 0 4294967295 TRUE_ACT 0 3 FALSE_ACT 4 7 UPDT_TESTS 8 15 AREF_COUNT 16 23 CAPTR_TESTS 24 31 mmMC_SEQ_TSM_EDC 0 0xac5 1 0 4294967295 EDC 0 31 mmMC_SEQ_TSM_DBI 0 0xac6 1 0 4294967295 DBI 0 31 mmMC_SEQ_TSM_WCDR 0 0xae3 1 0 4294967295 WCDR 0 31 mmMC_SEQ_TSM_MISC 0 0xae6 4 0 4294967295 WCDR_PTR 0 15 WCDR_MASK 16 19 CH1_OFFSET 20 25 CH1_WCDR_OFFSET 26 31 mmMC_SEQ_TIMER_WR 0 0xac9 1 0 4294967295 COUNTER 0 31 mmMC_SEQ_TIMER_RD 0 0xaca 1 0 4294967295 COUNTER 0 31 mmMC_SEQ_DRAM_ERROR_INSERTION 0 0xacb 2 0 4294967295 TX 0 15 RX 16 31 mmMC_PHY_TIMING_D0 0 0xacc 8 0 4294967295 RXC0_DLY 0 3 RXC0_EXT 4 7 RXC1_DLY 8 11 RXC1_EXT 12 15 TXC0_DLY 16 18 TXC0_EXT 20 23 TXC1_DLY 24 26 TXC1_EXT 28 31 mmMC_PHY_TIMING_D1 0 0xacd 8 0 4294967295 RXC0_DLY 0 3 RXC0_EXT 4 7 RXC1_DLY 8 11 RXC1_EXT 12 15 TXC0_DLY 16 18 TXC0_EXT 20 23 TXC1_DLY 24 26 TXC1_EXT 28 31 mmMC_PHY_TIMING_2 0 0xace 16 0 4294967295 IND_LD_CNT 0 6 RXC0_INV 8 8 RXC1_INV 9 9 TXC0_INV 10 10 TXC1_INV 11 11 RXC0_FRC 12 12 RXC1_FRC 13 13 TXC0_FRC 14 14 TXC1_FRC 15 15 TX_CDREN_D0 16 16 TX_CDREN_D1 17 17 ADR_CLKEN_D0 18 18 ADR_CLKEN_D1 19 19 WR_DLY 20 23 RXDPWRONC0_FRC 24 24 RXDPWRONC1_FRC 25 25 mmMC_SEQ_MPLL_OVERRIDE 0 0xa22 8 0 4294967295 AD_PLL_RESET_OVERRIDE 0 0 DQ_0_0_PLL_RESET_OVERRIDE 1 1 DQ_0_1_PLL_RESET_OVERRIDE 2 2 DQ_1_0_PLL_RESET_OVERRIDE 3 3 DQ_1_1_PLL_RESET_OVERRIDE 4 4 ATGM_CLK_SEL_OVERRIDE 5 5 TEST_BYPASS_CLK_EN_OVERRIDE 6 6 TEST_BYPASS_CLK_SEL_OVERRIDE 7 7 mmMCLK_PWRMGT_CNTL 0 0xae8 8 0 4294967295 DLL_SPEED 0 4 DLL_READY 6 6 MC_INT_CNTL 7 7 MRDCK0_PDNB 8 8 MRDCK1_PDNB 9 9 MRDCK0_RESET 16 16 MRDCK1_RESET 17 17 DLL_READY_READ 24 24 mmDLL_CNTL 0 0xae9 5 0 4294967295 DLL_RESET_TIME 0 9 DLL_LOCK_TIME 12 21 MRDCK0_BYPASS 24 24 MRDCK1_BYPASS 25 25 PWR2_MODE 26 26 mmMPLL_SEQ_UCODE_1 0 0xaea 8 0 4294967295 INSTR0 0 3 INSTR1 4 7 INSTR2 8 11 INSTR3 12 15 INSTR4 16 19 INSTR5 20 23 INSTR6 24 27 INSTR7 28 31 mmMPLL_SEQ_UCODE_2 0 0xaeb 8 0 4294967295 INSTR8 0 3 INSTR9 4 7 INSTR10 8 11 INSTR11 12 15 INSTR12 16 19 INSTR13 20 23 INSTR14 24 27 INSTR15 28 31 mmMPLL_CNTL_MODE 0 0xaec 16 0 4294967295 INSTR_DELAY 0 7 MPLL_SW_DIR_CONTROL 8 8 MPLL_MCLK_SEL 11 11 SPARE_1 12 12 QDR 13 13 MPLL_CTLREQ 14 14 MPLL_CHG_STATUS 16 16 FORCE_TESTMODE 17 17 FAST_LOCK_EN 20 20 FAST_LOCK_CNTRL 21 22 SPARE_2 23 23 SS_SSEN 24 25 SS_DSMODE_EN 26 26 VTOI_BIAS_CNTRL 27 27 SPARE_3 28 30 GLOBAL_MPLL_RESET 31 31 mmMPLL_FUNC_CNTL 0 0xaed 5 0 4294967295 SPARE_0 5 5 BG_100ADJ 8 11 BG_135ADJ 16 19 BWCTRL 20 27 REG_BIAS 30 31 mmMPLL_FUNC_CNTL_1 0 0xaee 5 0 4294967295 VCO_MODE 0 1 SPARE_0 2 3 CLKFRAC 4 15 CLKF 16 27 SPARE_1 28 31 mmMPLL_FUNC_CNTL_2 0 0xaef 18 0 4294967295 VCTRLADC_EN 0 0 TEST_VCTL_EN 1 1 RESET_EN 2 2 TEST_BYPCLK_EN 3 3 TEST_BYPCLK_SRC 4 4 TEST_FBDIV_FRAC_BYPASS 5 5 TEST_BYPMCLK 6 6 MPLL_UNLOCK_CLEAR 7 7 TEST_VCTL_CNTRL 8 8 TEST_FBDIV_SSC_BYPASS 9 9 RESET_TIMER 10 11 PFD_RESET_CNTRL 12 13 RISEFBVCO_EN 14 14 PWRGOOD_OVR 15 15 ISO_DIS_P 16 16 BACKUP_2 17 19 LF_CNTRL 20 26 BACKUP 27 31 mmMPLL_AD_FUNC_CNTL 0 0xaf0 2 0 4294967295 YCLK_POST_DIV 0 2 SPARE 3 31 mmMPLL_DQ_FUNC_CNTL 0 0xaf1 4 0 4294967295 YCLK_POST_DIV 0 2 SPARE_0 3 3 YCLK_SEL 4 4 SPARE 5 31 mmMPLL_TIME 0 0xaf2 2 0 4294967295 MPLL_LOCK_TIME 0 15 MPLL_RESET_TIME 16 31 mmMPLL_SS1 0 0xaf3 2 0 4294967295 CLKV 0 25 SPARE 26 31 mmMPLL_SS2 0 0xaf4 2 0 4294967295 CLKS 0 11 SPARE 12 31 mmMPLL_CONTROL 0 0xaf5 23 0 4294967295 GDDR_PWRON 0 0 REFCLK_PWRON 1 1 PLL_BUF_PWRON_TX 2 2 AD_BG_PWRON 12 12 AD_PLL_PWRON 13 13 AD_PLL_RESET 14 14 SPARE_AD_0 15 15 DQ_0_0_BG_PWRON 16 16 DQ_0_0_PLL_PWRON 17 17 DQ_0_0_PLL_RESET 18 18 SPARE_DQ_0_0 19 19 DQ_0_1_BG_PWRON 20 20 DQ_0_1_PLL_PWRON 21 21 DQ_0_1_PLL_RESET 22 22 SPARE_DQ_0_1 23 23 DQ_1_0_BG_PWRON 24 24 DQ_1_0_PLL_PWRON 25 25 DQ_1_0_PLL_RESET 26 26 SPARE_DQ_1_0 27 27 DQ_1_1_BG_PWRON 28 28 DQ_1_1_PLL_PWRON 29 29 DQ_1_1_PLL_RESET 30 30 SPARE_DQ_1_1 31 31 mmMPLL_AD_STATUS 0 0xaf6 6 0 4294967295 VCTRLADC 0 2 TEST_FBDIV_FRAC 4 6 TEST_FBDIV_INT 7 16 OINT_RESET 17 17 FREQ_LOCK 18 18 FREQ_UNLOCK_STICKY 19 19 mmMPLL_DQ_0_0_STATUS 0 0xaf7 6 0 4294967295 VCTRLADC 0 2 TEST_FBDIV_FRAC 4 6 TEST_FBDIV_INT 7 16 OINT_RESET 17 17 FREQ_LOCK 18 18 FREQ_UNLOCK_STICKY 19 19 mmMPLL_DQ_0_1_STATUS 0 0xaf8 6 0 4294967295 VCTRLADC 0 2 TEST_FBDIV_FRAC 4 6 TEST_FBDIV_INT 7 16 OINT_RESET 17 17 FREQ_LOCK 18 18 FREQ_UNLOCK_STICKY 19 19 mmMPLL_DQ_1_0_STATUS 0 0xaf9 6 0 4294967295 VCTRLADC 0 2 TEST_FBDIV_FRAC 4 6 TEST_FBDIV_INT 7 16 OINT_RESET 17 17 FREQ_LOCK 18 18 FREQ_UNLOCK_STICKY 19 19 mmMPLL_DQ_1_1_STATUS 0 0xafa 6 0 4294967295 VCTRLADC 0 2 TEST_FBDIV_FRAC 4 6 TEST_FBDIV_INT 7 16 OINT_RESET 17 17 FREQ_LOCK 18 18 FREQ_UNLOCK_STICKY 19 19 mmMC_SEQ_PMG_PG_HWCNTL 0 0xab9 9 0 4294967295 PWRGATE_EN 0 0 STAGGER_EN 1 1 TPGCG 2 5 D_DLY 6 7 AC_DLY 8 9 G_DLY 10 13 TXAO 16 16 RXAO 17 17 ACAO 18 18 mmMC_SEQ_PMG_PG_SWCNTL_0 0 0xaba 18 0 4294967295 PMD0_DQ_TX_ENB 0 0 PMD0_DBI_TX_ENB 1 1 PMD0_EDC_TX_ENB 2 2 PMD0_WCLKX_TX_ENB 3 3 PMD0_DQ_RX_ENB 4 4 PMD0_DBI_RX_ENB 5 5 PMD0_EDC_RX_ENB 6 6 PMD0_WCLKX_RX_ENB 7 7 PMD1_DQ_TX_ENB 8 8 PMD1_DBI_TX_ENB 9 9 PMD1_EDC_TX_ENB 10 10 PMD1_WCLKX_TX_ENB 11 11 PMD1_DQ_RX_ENB 12 12 PMD1_DBI_RX_ENB 13 13 PMD1_EDC_RX_ENB 14 14 PMD1_WCLKX_RX_ENB 15 15 PMA0_AC_ENB 16 16 GMCON_SR_COMMIT 31 31 mmMC_SEQ_PMG_PG_SWCNTL_1 0 0xabb 18 0 4294967295 PMD2_DQ_TX_ENB 0 0 PMD2_DBI_TX_ENB 1 1 PMD2_EDC_TX_ENB 2 2 PMD2_WCLKX_TX_ENB 3 3 PMD2_DQ_RX_ENB 4 4 PMD2_DBI_RX_ENB 5 5 PMD2_EDC_RX_ENB 6 6 PMD2_WCLKX_RX_ENB 7 7 PMD3_DQ_TX_ENB 8 8 PMD3_DBI_TX_ENB 9 9 PMD3_EDC_TX_ENB 10 10 PMD3_WCLKX_TX_ENB 11 11 PMD3_DQ_RX_ENB 12 12 PMD3_DBI_RX_ENB 13 13 PMD3_EDC_RX_ENB 14 14 PMD3_WCLKX_RX_ENB 15 15 PMA1_AC_ENB 16 16 GMCON_SR_COMMIT 31 31 mmMC_SEQ_TSM_DEBUG_INDEX 0 0xacf 1 0 4294967295 TSM_DEBUG_INDEX 0 4 mmMC_SEQ_TSM_DEBUG_DATA 0 0xad0 1 0 4294967295 TSM_DEBUG_DATA 0 31 ixMC_TSM_DEBUG_GCNT 2 0x0 1 0 4294967295 DATA 0 31 ixMC_TSM_DEBUG_FLAG 2 0x1 1 0 4294967295 DATA 0 31 ixMC_TSM_DEBUG_MISC 2 0x2 3 0 4294967295 FLAG 0 7 NCNT_RD 8 11 NCNT_WR 12 15 ixMC_TSM_DEBUG_BCNT0 2 0x3 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT1 2 0x4 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT2 2 0x5 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT3 2 0x6 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT4 2 0x7 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT5 2 0x8 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT6 2 0x9 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT7 2 0xa 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT8 2 0xb 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT9 2 0xc 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_BCNT10 2 0xd 4 0 4294967295 BYTE0 0 7 BYTE1 8 15 BYTE2 16 23 BYTE3 24 31 ixMC_TSM_DEBUG_ST01 2 0x10 1 0 4294967295 DATA 0 31 ixMC_TSM_DEBUG_ST23 2 0x11 1 0 4294967295 DATA 0 31 ixMC_TSM_DEBUG_ST45 2 0x12 1 0 4294967295 DATA 0 31 ixMC_TSM_DEBUG_BKPT 2 0x13 1 0 4294967295 DATA 0 31 mmMC_SEQ_IO_DEBUG_INDEX 0 0xa91 1 0 4294967295 IO_DEBUG_INDEX 0 8 mmMC_SEQ_IO_DEBUG_DATA 0 0xa92 1 0 4294967295 IO_DEBUG_DATA 0 31 ixMC_IO_DEBUG_UP_0 2 0x0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_1 2 0x1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_2 2 0x2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_3 2 0x3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_4 2 0x4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_5 2 0x5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_6 2 0x6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_7 2 0x7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_8 2 0x8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_9 2 0x9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_10 2 0xa 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_11 2 0xb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_12 2 0xc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_13 2 0xd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_14 2 0xe 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_15 2 0xf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_16 2 0x10 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_17 2 0x11 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_18 2 0x12 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_19 2 0x13 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_20 2 0x14 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_21 2 0x15 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_22 2 0x16 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_23 2 0x17 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_24 2 0x18 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_25 2 0x19 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_26 2 0x1a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_27 2 0x1b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_28 2 0x1c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_29 2 0x1d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_30 2 0x1e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_31 2 0x1f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_32 2 0x20 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_33 2 0x21 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_34 2 0x22 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_35 2 0x23 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_36 2 0x24 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_37 2 0x25 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_38 2 0x26 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_39 2 0x27 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_40 2 0x28 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_41 2 0x29 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_42 2 0x2a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_43 2 0x2b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_44 2 0x2c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_45 2 0x2d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_46 2 0x2e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_47 2 0x2f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_48 2 0x30 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_49 2 0x31 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_50 2 0x32 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_51 2 0x33 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_52 2 0x34 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_53 2 0x35 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_54 2 0x36 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_55 2 0x37 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_56 2 0x38 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_57 2 0x39 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_58 2 0x3a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_59 2 0x3b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_60 2 0x3c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_61 2 0x3d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_62 2 0x3e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_63 2 0x3f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_64 2 0x40 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_65 2 0x41 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_66 2 0x42 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_67 2 0x43 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_68 2 0x44 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_69 2 0x45 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_70 2 0x46 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_71 2 0x47 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_72 2 0x48 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_73 2 0x49 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_74 2 0x4a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_75 2 0x4b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_76 2 0x4c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_77 2 0x4d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_78 2 0x4e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_79 2 0x4f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_80 2 0x50 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_81 2 0x51 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_82 2 0x52 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_83 2 0x53 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_84 2 0x54 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_85 2 0x55 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_86 2 0x56 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_87 2 0x57 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_88 2 0x58 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_89 2 0x59 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_90 2 0x5a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_91 2 0x5b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_92 2 0x5c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_93 2 0x5d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_94 2 0x5e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_95 2 0x5f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_96 2 0x60 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_97 2 0x61 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_98 2 0x62 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_99 2 0x63 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_100 2 0x64 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_101 2 0x65 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_102 2 0x66 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_103 2 0x67 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_104 2 0x68 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_105 2 0x69 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_106 2 0x6a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_107 2 0x6b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_108 2 0x6c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_109 2 0x6d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_110 2 0x6e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_111 2 0x6f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_112 2 0x70 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_113 2 0x71 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_114 2 0x72 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_115 2 0x73 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_116 2 0x74 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_117 2 0x75 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_118 2 0x76 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_119 2 0x77 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_120 2 0x78 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_121 2 0x79 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_122 2 0x7a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_123 2 0x7b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_124 2 0x7c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_125 2 0x7d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_126 2 0x7e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_127 2 0x7f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_128 2 0x80 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_129 2 0x81 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_130 2 0x82 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_131 2 0x83 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_132 2 0x84 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_133 2 0x85 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_134 2 0x86 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_135 2 0x87 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_136 2 0x88 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_137 2 0x89 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_138 2 0x8a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_139 2 0x8b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_140 2 0x8c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_141 2 0x8d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_142 2 0x8e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_143 2 0x8f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_144 2 0x90 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_145 2 0x91 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_146 2 0x92 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_147 2 0x93 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_148 2 0x94 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_149 2 0x95 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_150 2 0x96 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_151 2 0x97 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_152 2 0x98 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_153 2 0x99 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_154 2 0x9a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_155 2 0x9b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_156 2 0x9c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_157 2 0x9d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_158 2 0x9e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_UP_159 2 0x9f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_MISC_D0 2 0xa0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_MISC_D0 2 0xa1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_MISC_D0 2 0xa2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_MISC_D0 2 0xa3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_MISC_D0 2 0xa4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_MISC_D0 2 0xa5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_MISC_D0 2 0xa6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_MISC_D0 2 0xa7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_MISC_D0 2 0xa8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_MISC_D0 2 0xa9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_MISC_D0 2 0xaa 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_MISC_D0 2 0xab 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_MISC_D0 2 0xac 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_MISC_D0 2 0xad 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_MISC_D0 2 0xae 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_MISC_D0 2 0xaf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_MISC_D1 2 0xb0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_MISC_D1 2 0xb1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_MISC_D1 2 0xb2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_MISC_D1 2 0xb3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_MISC_D1 2 0xb4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_MISC_D1 2 0xb5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_MISC_D1 2 0xb6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_MISC_D1 2 0xb7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_MISC_D1 2 0xb8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_MISC_D1 2 0xb9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_MISC_D1 2 0xba 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_MISC_D1 2 0xbb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_MISC_D1 2 0xbc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_MISC_D1 2 0xbd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_MISC_D1 2 0xbe 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_MISC_D1 2 0xbf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_CLKSEL_D0 2 0xc0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_CLKSEL_D0 2 0xc1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_CLKSEL_D0 2 0xc2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_CLKSEL_D0 2 0xc3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_CLKSEL_D0 2 0xc4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_CLKSEL_D0 2 0xc5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_CLKSEL_D0 2 0xc6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_CLKSEL_D0 2 0xc7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_CLKSEL_D0 2 0xc8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_CLKSEL_D0 2 0xc9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_CLKSEL_D0 2 0xca 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_CLKSEL_D0 2 0xcb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_CLKSEL_D0 2 0xcc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_CLKSEL_D0 2 0xcd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_CLKSEL_D0 2 0xce 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_CLKSEL_D0 2 0xcf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_CLKSEL_D1 2 0xd0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_CLKSEL_D1 2 0xd1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_CLKSEL_D1 2 0xd2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_CLKSEL_D1 2 0xd3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_CLKSEL_D1 2 0xd4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_CLKSEL_D1 2 0xd5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_CLKSEL_D1 2 0xd6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_CLKSEL_D1 2 0xd7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_CLKSEL_D1 2 0xd8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_CLKSEL_D1 2 0xd9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_CLKSEL_D1 2 0xda 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_CLKSEL_D1 2 0xdb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_CLKSEL_D1 2 0xdc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_CLKSEL_D1 2 0xdd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_CLKSEL_D1 2 0xde 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_CLKSEL_D1 2 0xdf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_OFSCAL_D0 2 0xe0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_OFSCAL_D0 2 0xe1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_OFSCAL_D0 2 0xe2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_OFSCAL_D0 2 0xe3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_OFSCAL_D0 2 0xe4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_OFSCAL_D0 2 0xe5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_OFSCAL_D0 2 0xe6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_OFSCAL_D0 2 0xe7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_OFSCAL_D0 2 0xe8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_OFSCAL_D0 2 0xe9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_OFSCAL_D0 2 0xea 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_EQ_PM_D0 2 0xeb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_DYN_PM_D0 2 0xec 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_CDR_PHSIZE_D0 2 0xed 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_OFSCAL_D0 2 0xee 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_OFSCAL_D0 2 0xef 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_OFSCAL_D1 2 0xf0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_OFSCAL_D1 2 0xf1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_OFSCAL_D1 2 0xf2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_OFSCAL_D1 2 0xf3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_OFSCAL_D1 2 0xf4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_OFSCAL_D1 2 0xf5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_OFSCAL_D1 2 0xf6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_OFSCAL_D1 2 0xf7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_OFSCAL_D1 2 0xf8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_OFSCAL_D1 2 0xf9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_OFSCAL_D1 2 0xfa 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_EQ_PM_D1 2 0xfb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_DYN_PM_D1 2 0xfc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_CDR_PHSIZE_D1 2 0xfd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_OFSCAL_D1 2 0xfe 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_OFSCAL_D1 2 0xff 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RXPHASE_D0 2 0x100 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RXPHASE_D0 2 0x101 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RXPHASE_D0 2 0x102 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RXPHASE_D0 2 0x103 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RXPHASE_D0 2 0x104 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RXPHASE_D0 2 0x105 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RXPHASE_D0 2 0x106 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RXPHASE_D0 2 0x107 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RXPHASE_D0 2 0x108 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RXPHASE_D0 2 0x109 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RXPHASE_D0 2 0x10a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_RXPHASE_D0 2 0x10b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_RXPHASE_D0 2 0x10c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_RXPHASE_D0 2 0x10d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_RXPHASE_D0 2 0x10e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_RXPHASE_D0 2 0x10f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RXPHASE_D1 2 0x110 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RXPHASE_D1 2 0x111 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RXPHASE_D1 2 0x112 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RXPHASE_D1 2 0x113 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RXPHASE_D1 2 0x114 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RXPHASE_D1 2 0x115 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RXPHASE_D1 2 0x116 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RXPHASE_D1 2 0x117 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RXPHASE_D1 2 0x118 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RXPHASE_D1 2 0x119 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RXPHASE_D1 2 0x11a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_RXPHASE_D1 2 0x11b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_RXPHASE_D1 2 0x11c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_RXPHASE_D1 2 0x11d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_RXPHASE_D1 2 0x11e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_RXPHASE_D1 2 0x11f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXPHASE_D0 2 0x120 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXPHASE_D0 2 0x121 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXPHASE_D0 2 0x122 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXPHASE_D0 2 0x123 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXPHASE_D0 2 0x124 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXPHASE_D0 2 0x125 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXPHASE_D0 2 0x126 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXPHASE_D0 2 0x127 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXPHASE_D0 2 0x128 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXPHASE_D0 2 0x129 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXPHASE_D0 2 0x12a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXPHASE_D0 2 0x12b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXPHASE_D0 2 0x12c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXPHASE_D0 2 0x12d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXPHASE_D0 2 0x12e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXPHASE_D0 2 0x12f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXPHASE_D1 2 0x130 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXPHASE_D1 2 0x131 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXPHASE_D1 2 0x132 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXPHASE_D1 2 0x133 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXPHASE_D1 2 0x134 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXPHASE_D1 2 0x135 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXPHASE_D1 2 0x136 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXPHASE_D1 2 0x137 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXPHASE_D1 2 0x138 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXPHASE_D1 2 0x139 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXPHASE_D1 2 0x13a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXPHASE_D1 2 0x13b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXPHASE_D1 2 0x13c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXPHASE_D1 2 0x13d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXPHASE_D1 2 0x13e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXPHASE_D1 2 0x13f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RX_VREF_CAL_D0 2 0x140 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RX_VREF_CAL_D0 2 0x141 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RX_VREF_CAL_D0 2 0x142 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RX_VREF_CAL_D0 2 0x143 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RX_VREF_CAL_D0 2 0x144 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RX_VREF_CAL_D0 2 0x145 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RX_VREF_CAL_D0 2 0x146 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RX_VREF_CAL_D0 2 0x147 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RX_VREF_CAL_D0 2 0x148 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_VREF_CAL_D0 2 0x149 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RX_VREF_CAL_D0 2 0x14a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0_CDR_PHSIZE_D0 2 0x14b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1_CDR_PHSIZE_D0 2 0x14c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2_CDR_PHSIZE_D0 2 0x14d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3_CDR_PHSIZE_D0 2 0x14e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_CDR_PHSIZE_D0 2 0x14f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RX_VREF_CAL_D1 2 0x150 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RX_VREF_CAL_D1 2 0x151 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RX_VREF_CAL_D1 2 0x152 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RX_VREF_CAL_D1 2 0x153 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RX_VREF_CAL_D1 2 0x154 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RX_VREF_CAL_D1 2 0x155 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RX_VREF_CAL_D1 2 0x156 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RX_VREF_CAL_D1 2 0x157 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RX_VREF_CAL_D1 2 0x158 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_VREF_CAL_D1 2 0x159 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RX_VREF_CAL_D1 2 0x15a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0_CDR_PHSIZE_D1 2 0x15b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1_CDR_PHSIZE_D1 2 0x15c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2_CDR_PHSIZE_D1 2 0x15d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3_CDR_PHSIZE_D1 2 0x15e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_CDR_PHSIZE_D1 2 0x15f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXSLF_D0 2 0x160 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXSLF_D0 2 0x161 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXSLF_D0 2 0x162 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXSLF_D0 2 0x163 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXSLF_D0 2 0x164 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXSLF_D0 2 0x165 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXSLF_D0 2 0x166 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXSLF_D0 2 0x167 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXSLF_D0 2 0x168 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXSLF_D0 2 0x169 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXSLF_D0 2 0x16a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXSLF_D0 2 0x16b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXSLF_D0 2 0x16c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXSLF_D0 2 0x16d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXSLF_D0 2 0x16e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXSLF_D0 2 0x16f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXSLF_D1 2 0x170 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXSLF_D1 2 0x171 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXSLF_D1 2 0x172 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXSLF_D1 2 0x173 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXSLF_D1 2 0x174 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXSLF_D1 2 0x175 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXSLF_D1 2 0x176 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXSLF_D1 2 0x177 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXSLF_D1 2 0x178 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXSLF_D1 2 0x179 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXSLF_D1 2 0x17a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXSLF_D1 2 0x17b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXSLF_D1 2 0x17c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXSLF_D1 2 0x17d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXSLF_D1 2 0x17e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXSLF_D1 2 0x17f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXBST_PD_D0 2 0x180 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXBST_PD_D0 2 0x181 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXBST_PD_D0 2 0x182 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXBST_PD_D0 2 0x183 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXBST_PD_D0 2 0x184 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXBST_PD_D0 2 0x185 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXBST_PD_D0 2 0x186 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXBST_PD_D0 2 0x187 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXBST_PD_D0 2 0x188 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXBST_PD_D0 2 0x189 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXBST_PD_D0 2 0x18a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXBST_PD_D0 2 0x18b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXBST_PD_D0 2 0x18c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXBST_PD_D0 2 0x18d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXBST_PD_D0 2 0x18e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXBST_PD_D0 2 0x18f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXBST_PD_D1 2 0x190 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXBST_PD_D1 2 0x191 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXBST_PD_D1 2 0x192 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXBST_PD_D1 2 0x193 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXBST_PD_D1 2 0x194 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXBST_PD_D1 2 0x195 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXBST_PD_D1 2 0x196 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXBST_PD_D1 2 0x197 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXBST_PD_D1 2 0x198 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXBST_PD_D1 2 0x199 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXBST_PD_D1 2 0x19a 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXBST_PD_D1 2 0x19b 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXBST_PD_D1 2 0x19c 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXBST_PD_D1 2 0x19d 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXBST_PD_D1 2 0x19e 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXBST_PD_D1 2 0x19f 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXBST_PU_D0 2 0x1a0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXBST_PU_D0 2 0x1a1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXBST_PU_D0 2 0x1a2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXBST_PU_D0 2 0x1a3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXBST_PU_D0 2 0x1a4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXBST_PU_D0 2 0x1a5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXBST_PU_D0 2 0x1a6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXBST_PU_D0 2 0x1a7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXBST_PU_D0 2 0x1a8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXBST_PU_D0 2 0x1a9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXBST_PU_D0 2 0x1aa 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXBST_PU_D0 2 0x1ab 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXBST_PU_D0 2 0x1ac 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXBST_PU_D0 2 0x1ad 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXBST_PU_D0 2 0x1ae 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXBST_PU_D0 2 0x1af 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_TXBST_PU_D1 2 0x1b0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_TXBST_PU_D1 2 0x1b1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_TXBST_PU_D1 2 0x1b2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_TXBST_PU_D1 2 0x1b3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_TXBST_PU_D1 2 0x1b4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_TXBST_PU_D1 2 0x1b5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_TXBST_PU_D1 2 0x1b6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_TXBST_PU_D1 2 0x1b7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_TXBST_PU_D1 2 0x1b8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_TXBST_PU_D1 2 0x1b9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_TXBST_PU_D1 2 0x1ba 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CK_TXBST_PU_D1 2 0x1bb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRL_TXBST_PU_D1 2 0x1bc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ADDRH_TXBST_PU_D1 2 0x1bd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_ACMD_TXBST_PU_D1 2 0x1be 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_TXBST_PU_D1 2 0x1bf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RX_EQ_D0 2 0x1c0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RX_EQ_D0 2 0x1c1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RX_EQ_D0 2 0x1c2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RX_EQ_D0 2 0x1c3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RX_EQ_D0 2 0x1c4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RX_EQ_D0 2 0x1c5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RX_EQ_D0 2 0x1c6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RX_EQ_D0 2 0x1c7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RX_EQ_D0 2 0x1c8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_EQ_D0 2 0x1c9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RX_EQ_D0 2 0x1ca 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ0_RX_EQ_PM_D0 2 0x1cb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ1_RX_EQ_PM_D0 2 0x1cc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ0_RX_DYN_PM_D0 2 0x1cd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ1_RX_DYN_PM_D0 2 0x1ce 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_RX_EQ_D0 2 0x1cf 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0L_RX_EQ_D1 2 0x1d0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB0H_RX_EQ_D1 2 0x1d1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1L_RX_EQ_D1 2 0x1d2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB1H_RX_EQ_D1 2 0x1d3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2L_RX_EQ_D1 2 0x1d4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB2H_RX_EQ_D1 2 0x1d5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3L_RX_EQ_D1 2 0x1d6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQB3H_RX_EQ_D1 2 0x1d7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DBI_RX_EQ_D1 2 0x1d8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_EDC_RX_EQ_D1 2 0x1d9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCK_RX_EQ_D1 2 0x1da 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ0_RX_EQ_PM_D1 2 0x1db 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ1_RX_EQ_PM_D1 2 0x1dc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ0_RX_DYN_PM_D1 2 0x1dd 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_DQ1_RX_DYN_PM_D1 2 0x1de 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_CMD_RX_EQ_D1 2 0x1df 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_MISC_D0 2 0x1e0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_CLKSEL_D0 2 0x1e1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_OFSCAL_D0 2 0x1e2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RXPHASE_D0 2 0x1e3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXPHASE_D0 2 0x1e4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_VREF_CAL_D0 2 0x1e5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXSLF_D0 2 0x1e6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXBST_PD_D0 2 0x1e7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXBST_PU_D0 2 0x1e8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_EQ_D0 2 0x1e9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_CDR_PHSIZE_D0 2 0x1ea 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_EQ_PM_D0 2 0x1eb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_DYN_PM_D0 2 0x1ec 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_MISC_D1 2 0x1f0 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_CLKSEL_D1 2 0x1f1 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_OFSCAL_D1 2 0x1f2 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RXPHASE_D1 2 0x1f3 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXPHASE_D1 2 0x1f4 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_VREF_CAL_D1 2 0x1f5 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXSLF_D1 2 0x1f6 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXBST_PD_D1 2 0x1f7 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_TXBST_PU_D1 2 0x1f8 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_EQ_D1 2 0x1f9 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_CDR_PHSIZE_D1 2 0x1fa 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_EQ_PM_D1 2 0x1fb 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 ixMC_IO_DEBUG_WCDR_RX_DYN_PM_D1 2 0x1fc 4 0 4294967295 VALUE0 0 7 VALUE1 8 15 VALUE2 16 23 VALUE3 24 31 mmMC_SEQ_CNTL_3 0 0xd80 14 0 4294967295 PIPE_DELAY_OUT_D0 0 2 PIPE_DELAY_IN_D0 3 5 PIPE_DELAY_OUT_D1 6 8 PIPE_DELAY_IN_D1 9 11 REPCG_EN_D0 12 12 REPCG_EN_D1 13 13 REPCG_OFF_DLY 16 19 FCK_FRC 20 20 DBI_FRC 21 21 PRGRM_CDC 22 22 DQS_FRC 23 23 DQS_FRC_PAT 24 27 IDSC_EN 30 30 CAC_EN 31 31 mmMC_SEQ_G5PDX_CTRL 0 0xd81 8 0 4294967295 CH0_ENABLE 0 0 CH1_ENABLE 1 1 WCKOFF_EARLY 2 2 WCKOFF_LATE 3 3 TPD2MRS 4 9 TMRS2WCK 12 15 TWCK2MRS 16 19 TMRD 20 23 mmMC_SEQ_G5PDX_CTRL_LP 0 0xd82 8 0 4294967295 CH0_ENABLE 0 0 CH1_ENABLE 1 1 WCKOFF_EARLY 2 2 WCKOFF_LATE 3 3 TPD2MRS 4 9 TMRS2WCK 12 15 TWCK2MRS 16 19 TMRD 20 23 mmMC_SEQ_G5PDX_CMD0 0 0xd83 1 0 4294967295 CMD 0 31 mmMC_SEQ_G5PDX_CMD0_LP 0 0xd84 1 0 4294967295 CMD 0 31 mmMC_SEQ_G5PDX_CMD1 0 0xd85 1 0 4294967295 CMD 0 31 mmMC_SEQ_G5PDX_CMD1_LP 0 0xd86 1 0 4294967295 CMD 0 31 mmMC_SEQ_SREG_READ 0 0xd87 1 0 4294967295 DATA 0 31 mmMC_SEQ_SREG_STATUS 0 0xd88 3 0 4294967295 AVAIL_RTN 0 3 PND_RD 8 11 PND_WR 12 15 mmMC_SEQ_PHYREG_BCAST 0 0xd89 11 0 4294967295 CH0_EN 0 0 CH1_EN 1 1 CKE_MASK 7 7 DQ_MASK 8 8 DBI_MASK 9 9 EDC_MASK 10 10 WCK_MASK 11 11 WCDR_MASK 12 12 CLK_MASK 13 13 CMD_MASK 14 14 ADR_MASK 15 15 mmMC_SEQ_PMG_DVS_CTL 0 0xd8a 2 0 4294967295 ENABLE 0 0 TDVS 1 5 mmMC_SEQ_PMG_DVS_CTL_LP 0 0xd8b 2 0 4294967295 ENABLE 0 0 TDVS 1 5 mmMC_SEQ_PMG_DVS_CMD 0 0xd8c 7 0 4294967295 ADR 0 15 MOP 16 18 BNK_MSB 19 19 END 20 20 CSB 21 22 ADR_MSB1 23 23 ADR_MSB0 24 24 mmMC_SEQ_PMG_DVS_CMD_LP 0 0xd8d 7 0 4294967295 ADR 0 15 MOP 16 18 BNK_MSB 19 19 END 20 20 CSB 21 22 ADR_MSB1 23 23 ADR_MSB0 24 24 mmMC_SEQ_DLL_STBY 0 0xd8e 10 0 4294967295 EN 0 0 VCTRLADC_FRC 1 1 VCTRLADC_VAL 2 2 MSTRSTBY_FRC 3 3 MSTRSTBY_VAL 4 4 ENTR_DLY 5 7 STBY_DLY 8 11 TCKE_PULSE_EXTN 12 15 TCKE_EXTN 16 23 EXIT_DLY 24 29 mmMC_SEQ_DLL_STBY_LP 0 0xd8f 10 0 4294967295 EN 0 0 VCTRLADC_FRC 1 1 VCTRLADC_VAL 2 2 MSTRSTBY_FRC 3 3 MSTRSTBY_VAL 4 4 ENTR_DLY 5 7 STBY_DLY 8 11 TCKE_PULSE_EXTN 12 15 TCKE_EXTN 16 23 EXIT_DLY 24 29 mmMC_DLB_MISCCTRL0 0 0xd90 7 0 4294967295 UDD_ON_STATUS_BITS 0 0 LOAD_DATA_SEL 1 1 LOAD_UDD 2 2 ADR_STATUS_SEL 3 3 DATA_SEL 4 7 PRBS_CHK_LOAD_CNT 8 14 UDD 16 31 mmMC_DLB_MISCCTRL1 0 0xd91 1 0 4294967295 PRBS_ERR_CNT_LIMIT 0 31 mmMC_DLB_MISCCTRL2 0 0xd92 11 0 4294967295 PRBS_RUN_LENGTH 0 16 PRBS_FREERUN 17 17 PRBS15_MODE 18 18 PRBS23_MODE 19 19 STOP_ON_NEXT_ERR 20 20 STOP_CLK 21 21 SWEEP_DLY 24 25 GRAY_CODE_EN 26 26 SEL_PHY_PRBS_CHK 28 28 SEL_AC_PRBS_CHK 29 29 STATUS_SEL 30 30 mmMC_DLB_CONFIG0 0 0xd93 5 0 4294967295 CONF_EN_CH0 0 0 CONF_EN_CH1 1 1 CONF_AUTO_EN 2 2 MASK 4 7 PTR 8 17 mmMC_DLB_CONFIG1 0 0xd94 1 0 4294967295 DATA 0 31 mmMC_DLB_SETUP 0 0xd95 12 0 4294967295 DLB_EN 0 0 DLB_FIFO_EN 1 1 DLB_STATUS_EN 2 2 DLB_CONFIG_EN 3 3 DLB_PRBS_EN 4 4 PRBS_GEN_RST 5 5 PRBS_CHK_RST 6 6 PRBS_PHY_RST 7 7 QDR_MODE 8 8 CHK_DATA_BITS 16 23 MEM_BIT_SEL 24 28 RXTXLP_EN 31 31 mmMC_DLB_SETUPSWEEP 0 0xd96 5 0 4294967295 DLL_RST 0 0 CONFIG 1 1 MASTER 2 2 DLLDLY 4 7 DLLSTEPS 8 12 mmMC_DLB_SETUPFIFO 0 0xd97 9 0 4294967295 WRITE_FIFO_RST 0 0 READ_FIFO_RST 1 1 BOTH_FIFO_RST 2 2 SYNC_RST 3 3 SYNC_RST_MASK 4 5 OUTPUT_EN_RST 6 6 SHIFT_WR_FIFO_PTR 8 9 DELAY_RD_FIFO_PTR 10 12 STROBE 16 19 mmMC_DLB_WRITE_MASK 0 0xd98 2 0 4294967295 BIT_MASK 0 21 CH_MASK 24 27 mmMC_DLB_STATUS 0 0xd99 3 0 4294967295 STICK_ERROR 0 3 LOCK 4 7 SWEEP_DONE 8 11 mmMC_DLB_STATUS_MISC0 0 0xd9a 1 0 4294967295 DATA 0 31 mmMC_DLB_STATUS_MISC1 0 0xd9b 1 0 4294967295 DATA 0 31 mmMC_DLB_STATUS_MISC2 0 0xd9c 1 0 4294967295 DATA 0 31 mmMC_DLB_STATUS_MISC3 0 0xd9d 1 0 4294967295 DATA 0 31 mmMC_DLB_STATUS_MISC4 0 0xd9e 1 0 4294967295 DATA 0 31 mmMC_DLB_STATUS_MISC5 0 0xd9f 1 0 4294967295 DATA 0 31 mmMC_DLB_STATUS_MISC6 0 0xda0 1 0 4294967295 DATA 0 31 mmMC_DLB_STATUS_MISC7 0 0xda1 1 0 4294967295 DATA 0 31 mmMC_ARB_HARSH_EN_RD 0 0xdc0 4 0 4294967295 TX_PRI 0 7 BW_PRI 8 15 FIX_PRI 16 23 ST_PRI 24 31 mmMC_ARB_HARSH_EN_WR 0 0xdc1 4 0 4294967295 TX_PRI 0 7 BW_PRI 8 15 FIX_PRI 16 23 ST_PRI 24 31 mmMC_ARB_HARSH_TX_HI0_RD 0 0xdc2 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_HARSH_TX_HI0_WR 0 0xdc3 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_HARSH_TX_HI1_RD 0 0xdc4 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_HARSH_TX_HI1_WR 0 0xdc5 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_HARSH_TX_LO0_RD 0 0xdc6 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_HARSH_TX_LO0_WR 0 0xdc7 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_HARSH_TX_LO1_RD 0 0xdc8 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_HARSH_TX_LO1_WR 0 0xdc9 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_HARSH_BWPERIOD0_RD 0 0xdca 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_HARSH_BWPERIOD0_WR 0 0xdcb 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_HARSH_BWPERIOD1_RD 0 0xdcc 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_HARSH_BWPERIOD1_WR 0 0xdcd 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_HARSH_BWCNT0_RD 0 0xdce 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_HARSH_BWCNT0_WR 0 0xdcf 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_HARSH_BWCNT1_RD 0 0xdd0 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_HARSH_BWCNT1_WR 0 0xdd1 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_HARSH_SAT0_RD 0 0xdd2 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_HARSH_SAT0_WR 0 0xdd3 4 0 4294967295 GROUP0 0 7 GROUP1 8 15 GROUP2 16 23 GROUP3 24 31 mmMC_ARB_HARSH_SAT1_RD 0 0xdd4 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_HARSH_SAT1_WR 0 0xdd5 4 0 4294967295 GROUP4 0 7 GROUP5 8 15 GROUP6 16 23 GROUP7 24 31 mmMC_ARB_HARSH_CTL_RD 0 0xdd6 8 0 4294967295 FORCE_HIGHEST 0 7 HARSH_RR 8 8 BANK_AGE_ONLY 9 9 USE_LEGACY_HARSH 10 10 BWCNT_CATCHUP 11 11 ST_MODE 12 13 FORCE_STALL 14 21 PERF_MON_SEL 22 24 mmMC_ARB_HARSH_CTL_WR 0 0xdd7 8 0 4294967295 FORCE_HIGHEST 0 7 HARSH_RR 8 8 BANK_AGE_ONLY 9 9 USE_LEGACY_HARSH 10 10 BWCNT_CATCHUP 11 11 ST_MODE 12 13 FORCE_STALL 14 21 PERF_MON_SEL 22 24