94
mmHDP_MMHUB_TLVL 0 0x0 5 0 0
	HDP_WR_TLVL 0 2
	HDP_RD_TLVL 4 6
	XDP_WR_TLVL 8 10
	XDP_RD_TLVL 12 14
	XDP_MBX_WR_TLVL 16 18
mmHDP_MMHUB_UNITID 0 0x1 3 0 0
	HDP_UNITID 0 5
	XDP_UNITID 8 13
	XDP_MBX_UNITID 16 21
mmHDP_NONSURFACE_BASE 0 0x40 1 0 0
	NONSURF_BASE_39_8 0 31
mmHDP_NONSURFACE_INFO 0 0x41 2 0 0
	NONSURF_SWAP 4 5
	NONSURF_VMID 8 11
mmHDP_NONSURFACE_BASE_HI 0 0x42 1 0 0
	NONSURF_BASE_47_40 0 7
mmHDP_SURFACE_WRITE_FLAGS 0 0xc4 2 0 0
	SURF0_WRITE_FLAG 0 0
	SURF1_WRITE_FLAG 1 1
mmHDP_SURFACE_READ_FLAGS 0 0xc5 2 0 0
	SURF0_READ_FLAG 0 0
	SURF1_READ_FLAG 1 1
mmHDP_SURFACE_WRITE_FLAGS_CLR 0 0xc6 2 0 0
	SURF0_WRITE_FLAG_CLR 0 0
	SURF1_WRITE_FLAG_CLR 1 1
mmHDP_SURFACE_READ_FLAGS_CLR 0 0xc7 2 0 0
	SURF0_READ_FLAG_CLR 0 0
	SURF1_READ_FLAG_CLR 1 1
mmHDP_NONSURF_FLAGS 0 0xc8 2 0 0
	NONSURF_WRITE_FLAG 0 0
	NONSURF_READ_FLAG 1 1
mmHDP_NONSURF_FLAGS_CLR 0 0xc9 2 0 0
	NONSURF_WRITE_FLAG_CLR 0 0
	NONSURF_READ_FLAG_CLR 1 1
mmHDP_HOST_PATH_CNTL 0 0xcc 10 0 0
	WR_STALL_TIMER 9 10
	RD_STALL_TIMER 11 12
	WRITE_COMBINE_TIMER_PRELOAD_CFG 18 18
	WRITE_COMBINE_TIMER 19 20
	WRITE_COMBINE_EN 21 21
	WRITE_COMBINE_64B_EN 22 22
	RD_CPL_BUF_EN 23 23
	ALL_SURFACES_DIS 29 29
	WRITE_THROUGH_CACHE_DIS 30 30
	LIN_RD_CACHE_DIS 31 31
mmHDP_SW_SEMAPHORE 0 0xcd 1 0 0
	SW_SEMAPHORE 0 31
mmHDP_LAST_SURFACE_HIT 0 0xd0 1 0 0
	LAST_SURFACE_HIT 0 1
mmHDP_READ_CACHE_INVALIDATE 0 0xd1 1 0 0
	READ_CACHE_INVALIDATE 0 0
mmHDP_OUTSTANDING_REQ 0 0xd2 2 0 0
	WRITE_REQ 0 7
	READ_REQ 8 15
mmHDP_MISC_CNTL 0 0xd3 17 0 0
	FLUSH_INVALIDATE_CACHE 0 0
	IDLE_HYSTERESIS_CNTL 2 3
	OUTSTANDING_WRITE_COUNT_1024 5 5
	MULTIPLE_READS 6 6
	RAW_ADDR_CAM_ENABLE 7 7
	MMHUB_EARLY_WRACK_ENABLE 8 8
	SIMULTANEOUS_READS_WRITES 11 11
	FED_ENABLE 21 21
	ATOMIC_FED_ENABLE 22 22
	SYSHUB_CHANNEL_PRIORITY 23 23
	MMHUB_WRBURST_ENABLE 24 24
	ALL_FUNCTION_CACHELINE_INVALID 25 25
	HDP_MMHUB_PENDING_WR_TAG_CHECK 26 26
	XDP_MMHUB_PENDING_WR_TAG_CHECK 27 27
	VARIABLE_CACHELINE_SIZE 28 28
	ADAPTIVE_CACHELINE_SIZE 29 29
	MMHUB_WRBURST_SIZE 30 30
mmHDP_MEM_POWER_CTRL 0 0xd4 14 0 0
	IPH_MEM_POWER_CTRL_EN 0 0
	IPH_MEM_POWER_LS_EN 1 1
	IPH_MEM_POWER_DS_EN 2 2
	IPH_MEM_POWER_SD_EN 3 3
	IPH_MEM_IDLE_HYSTERESIS 4 6
	IPH_MEM_POWER_UP_RECOVER_DELAY 8 13
	IPH_MEM_POWER_DOWN_LS_ENTER_DELAY 14 15
	RC_MEM_POWER_CTRL_EN 16 16
	RC_MEM_POWER_LS_EN 17 17
	RC_MEM_POWER_DS_EN 18 18
	RC_MEM_POWER_SD_EN 19 19
	RC_MEM_IDLE_HYSTERESIS 20 22
	RC_MEM_POWER_UP_RECOVER_DELAY 24 29
	RC_MEM_POWER_DOWN_LS_ENTER_DELAY 30 31
mmHDP_MMHUB_CNTL 0 0xd5 3 0 0
	HDP_MMHUB_RO 0 0
	HDP_MMHUB_GCC 1 1
	HDP_MMHUB_SNOOP 2 2
mmHDP_EDC_CNT 0 0xd6 4 0 0
	MEM0_SED_COUNT 0 1
	MEM1_SED_COUNT 2 3
	MEM2_SED_COUNT 4 5
	MEM3_SED_COUNT 6 7
mmHDP_VERSION 0 0xd7 3 0 0
	MINVER 0 7
	MAJVER 8 15
	REV 16 23
mmHDP_CLK_CNTL 0 0xd8 8 0 0
	REG_CLK_ENABLE_COUNT 0 3
	REG_WAKE_DYN_CLK 4 4
	IPH_MEM_CLK_SOFT_OVERRIDE 26 26
	RC_MEM_CLK_SOFT_OVERRIDE 27 27
	DBUS_CLK_SOFT_OVERRIDE 28 28
	DYN_CLK_SOFT_OVERRIDE 29 29
	XDP_REG_CLK_SOFT_OVERRIDE 30 30
	HDP_REG_CLK_SOFT_OVERRIDE 31 31
mmHDP_MEMIO_CNTL 0 0xf6 10 0 0
	MEMIO_SEND 0 0
	MEMIO_OP 1 1
	MEMIO_BE 2 5
	MEMIO_WR_STROBE 6 6
	MEMIO_RD_STROBE 7 7
	MEMIO_ADDR_UPPER 8 13
	MEMIO_CLR_WR_ERROR 14 14
	MEMIO_CLR_RD_ERROR 15 15
	MEMIO_VF 16 16
	MEMIO_VFID 17 21
mmHDP_MEMIO_ADDR 0 0xf7 1 0 0
	MEMIO_ADDR_LOWER 0 31
mmHDP_MEMIO_STATUS 0 0xf8 4 0 0
	MEMIO_WR_STATUS 0 0
	MEMIO_RD_STATUS 1 1
	MEMIO_WR_ERROR 2 2
	MEMIO_RD_ERROR 3 3
mmHDP_MEMIO_WR_DATA 0 0xf9 1 0 0
	MEMIO_WR_DATA 0 31
mmHDP_MEMIO_RD_DATA 0 0xfa 1 0 0
	MEMIO_RD_DATA 0 31
mmHDP_XDP_DIRECT2HDP_FIRST 0 0x100 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_FLUSH 0 0x101 8 0 0
	D2H_FLUSH_FLUSH_NUM 0 3
	D2H_FLUSH_MBX_ENC_DATA 4 7
	D2H_FLUSH_MBX_ADDR_SEL 8 10
	D2H_FLUSH_XPB_CLG 11 15
	D2H_FLUSH_SEND_HOST 16 16
	D2H_FLUSH_ALTER_FLUSH_NUM 18 18
	D2H_FLUSH_RSVD_0 19 19
	D2H_FLUSH_RSVD_1 20 20
mmHDP_XDP_D2H_BAR_UPDATE 0 0x102 3 0 0
	D2H_BAR_UPDATE_ADDR 0 15
	D2H_BAR_UPDATE_FLUSH_NUM 16 19
	D2H_BAR_UPDATE_BAR_NUM 20 22
mmHDP_XDP_D2H_RSVD_3 0 0x103 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_4 0 0x104 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_5 0 0x105 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_6 0 0x106 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_7 0 0x107 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_8 0 0x108 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_9 0 0x109 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_10 0 0x10a 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_11 0 0x10b 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_12 0 0x10c 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_13 0 0x10d 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_14 0 0x10e 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_15 0 0x10f 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_16 0 0x110 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_17 0 0x111 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_18 0 0x112 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_19 0 0x113 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_20 0 0x114 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_21 0 0x115 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_22 0 0x116 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_23 0 0x117 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_24 0 0x118 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_25 0 0x119 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_26 0 0x11a 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_27 0 0x11b 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_28 0 0x11c 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_29 0 0x11d 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_30 0 0x11e 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_31 0 0x11f 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_32 0 0x120 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_33 0 0x121 1 0 0
	RESERVED 0 31
mmHDP_XDP_D2H_RSVD_34 0 0x122 1 0 0
	RESERVED 0 31
mmHDP_XDP_DIRECT2HDP_LAST 0 0x123 1 0 0
	RESERVED 0 31
mmHDP_XDP_P2P_BAR_CFG 0 0x124 2 0 0
	P2P_BAR_CFG_ADDR_SIZE 0 3
	P2P_BAR_CFG_BAR_FROM 4 5
mmHDP_XDP_P2P_MBX_OFFSET 0 0x125 1 0 0
	P2P_MBX_OFFSET 0 16
mmHDP_XDP_P2P_MBX_ADDR0 0 0x126 4 0 0
	VALID 0 0
	ADDR_35_19 3 19
	ADDR_39_36 20 23
	ADDR_47_40 24 31
mmHDP_XDP_P2P_MBX_ADDR1 0 0x127 4 0 0
	VALID 0 0
	ADDR_35_19 3 19
	ADDR_39_36 20 23
	ADDR_47_40 24 31
mmHDP_XDP_P2P_MBX_ADDR2 0 0x128 4 0 0
	VALID 0 0
	ADDR_35_19 3 19
	ADDR_39_36 20 23
	ADDR_47_40 24 31
mmHDP_XDP_P2P_MBX_ADDR3 0 0x129 4 0 0
	VALID 0 0
	ADDR_35_19 3 19
	ADDR_39_36 20 23
	ADDR_47_40 24 31
mmHDP_XDP_P2P_MBX_ADDR4 0 0x12a 4 0 0
	VALID 0 0
	ADDR_35_19 3 19
	ADDR_39_36 20 23
	ADDR_47_40 24 31
mmHDP_XDP_P2P_MBX_ADDR5 0 0x12b 4 0 0
	VALID 0 0
	ADDR_35_19 3 19
	ADDR_39_36 20 23
	ADDR_47_40 24 31
mmHDP_XDP_P2P_MBX_ADDR6 0 0x12c 4 0 0
	VALID 0 0
	ADDR_35_19 3 19
	ADDR_39_36 20 23
	ADDR_47_40 24 31
mmHDP_XDP_HDP_MBX_MC_CFG 0 0x12d 6 0 0
	HDP_MBX_MC_CFG_TAP_WRREQ_QOS 0 3
	HDP_MBX_MC_CFG_TAP_WRREQ_SWAP 4 5
	HDP_MBX_MC_CFG_TAP_WRREQ_VMID 8 11
	HDP_MBX_MC_CFG_TAP_WRREQ_RO 12 12
	HDP_MBX_MC_CFG_TAP_WRREQ_GCC 13 13
	HDP_MBX_MC_CFG_TAP_WRREQ_SNOOP 14 14
mmHDP_XDP_HDP_MC_CFG 0 0x12e 6 0 0
	HDP_MC_CFG_HST_TAP_REQ_SNOOP 3 3
	HDP_MC_CFG_HST_TAP_REQ_SWAP 4 5
	HDP_MC_CFG_HST_TAP_REQ_VMID 8 11
	HDP_MC_CFG_HST_TAP_REQ_RO 12 12
	HDP_MC_CFG_HST_TAP_REQ_GCC 13 13
	HDP_MC_CFG_XDP_HIGHER_PRI_THRESH 14 19
mmHDP_XDP_HST_CFG 0 0x12f 5 0 0
	HST_CFG_WR_COMBINE_EN 0 0
	HST_CFG_WR_COMBINE_TIMER 1 2
	HST_CFG_WR_BURST_EN 3 3
	HST_CFG_WR_COMBINE_64B_EN 4 4
	HST_CFG_WR_COMBINE_TIMER_PRELOAD_CFG 5 5
mmHDP_XDP_HDP_IPH_CFG 0 0x131 4 0 0
	HDP_IPH_CFG_SYS_FIFO_DEPTH_OVERRIDE 0 5
	HDP_IPH_CFG_XDP_FIFO_DEPTH_OVERRIDE 6 11
	HDP_IPH_CFG_INVERSE_PEER_TAG_MATCHING 12 12
	HDP_IPH_CFG_P2P_RD_EN 13 13
mmHDP_XDP_P2P_BAR0 0 0x134 3 0 0
	ADDR 0 15
	FLUSH 16 19
	VALID 20 20
mmHDP_XDP_P2P_BAR1 0 0x135 3 0 0
	ADDR 0 15
	FLUSH 16 19
	VALID 20 20
mmHDP_XDP_P2P_BAR2 0 0x136 3 0 0
	ADDR 0 15
	FLUSH 16 19
	VALID 20 20
mmHDP_XDP_P2P_BAR3 0 0x137 3 0 0
	ADDR 0 15
	FLUSH 16 19
	VALID 20 20
mmHDP_XDP_P2P_BAR4 0 0x138 3 0 0
	ADDR 0 15
	FLUSH 16 19
	VALID 20 20
mmHDP_XDP_P2P_BAR5 0 0x139 3 0 0
	ADDR 0 15
	FLUSH 16 19
	VALID 20 20
mmHDP_XDP_P2P_BAR6 0 0x13a 3 0 0
	ADDR 0 15
	FLUSH 16 19
	VALID 20 20
mmHDP_XDP_P2P_BAR7 0 0x13b 3 0 0
	ADDR 0 15
	FLUSH 16 19
	VALID 20 20
mmHDP_XDP_FLUSH_ARMED_STS 0 0x13c 1 0 0
	FLUSH_ARMED_STS 0 31
mmHDP_XDP_FLUSH_CNTR0_STS 0 0x13d 1 0 0
	FLUSH_CNTR0_STS 0 25
mmHDP_XDP_BUSY_STS 0 0x13e 1 0 0
	BUSY_BITS 0 23
mmHDP_XDP_STICKY 0 0x13f 2 0 0
	STICKY_STS 0 15
	STICKY_W1C 16 31
mmHDP_XDP_CHKN 0 0x140 4 0 0
	CHKN_0_RSVD 0 7
	CHKN_1_RSVD 8 15
	CHKN_2_RSVD 16 23
	CHKN_3_RSVD 24 31
mmHDP_XDP_BARS_ADDR_39_36 0 0x144 8 0 0
	BAR0_ADDR_39_36 0 3
	BAR1_ADDR_39_36 4 7
	BAR2_ADDR_39_36 8 11
	BAR3_ADDR_39_36 12 15
	BAR4_ADDR_39_36 16 19
	BAR5_ADDR_39_36 20 23
	BAR6_ADDR_39_36 24 27
	BAR7_ADDR_39_36 28 31
mmHDP_XDP_MC_VM_FB_LOCATION_BASE 0 0x145 1 0 0
	FB_BASE 0 25
mmHDP_XDP_GPU_IOV_VIOLATION_LOG 0 0x148 6 0 0
	VIOLATION_STATUS 0 0
	MULTIPLE_VIOLATION_STATUS 1 1
	ADDRESS 2 17
	OPCODE 18 18
	VF 19 19
	VFID 20 24
mmHDP_XDP_GPU_IOV_VIOLATION_LOG2 0 0x149 1 0 0
	INITIATOR_ID 0 9
mmHDP_XDP_MMHUB_ERROR 0 0x14a 18 0 0
	HDP_BRESP_01 1 1
	HDP_BRESP_10 2 2
	HDP_BRESP_11 3 3
	HDP_BUSER_NACK_01 5 5
	HDP_BUSER_NACK_10 6 6
	HDP_BUSER_NACK_11 7 7
	HDP_RRESP_01 9 9
	HDP_RRESP_10 10 10
	HDP_RRESP_11 11 11
	HDP_RUSER_NACK_01 13 13
	HDP_RUSER_NACK_10 14 14
	HDP_RUSER_NACK_11 15 15
	XDP_BRESP_01 17 17
	XDP_BRESP_10 18 18
	XDP_BRESP_11 19 19
	XDP_BUSER_NACK_01 21 21
	XDP_BUSER_NACK_10 22 22
	XDP_BUSER_NACK_11 23 23
