11462 mmBIF_BX_PF_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_PF_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_PF_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmSYSHUB_INDEX_OVLP 0 0x8 1 0 0 SYSHUB_OFFSET 0 21 mmSYSHUB_DATA_OVLP 0 0x9 1 0 0 SYSHUB_DATA 0 31 mmPCIE_INDEX 0 0xc 1 0 0 PCIE_INDEX 0 31 mmPCIE_DATA 0 0xd 1 0 0 PCIE_DATA 0 31 mmPCIE_INDEX2 0 0xe 1 0 0 PCIE_INDEX2 0 31 mmPCIE_DATA2 0 0xf 1 0 0 PCIE_DATA2 0 31 mmSBIOS_SCRATCH_0 0 0x34 1 0 1 SBIOS_SCRATCH_DW 0 31 mmSBIOS_SCRATCH_1 0 0x35 1 0 1 SBIOS_SCRATCH_DW 0 31 mmSBIOS_SCRATCH_2 0 0x36 1 0 1 SBIOS_SCRATCH_DW 0 31 mmSBIOS_SCRATCH_3 0 0x37 1 0 1 SBIOS_SCRATCH_DW 0 31 mmBIOS_SCRATCH_0 0 0x38 1 0 1 BIOS_SCRATCH_0 0 31 mmBIOS_SCRATCH_1 0 0x39 1 0 1 BIOS_SCRATCH_1 0 31 mmBIOS_SCRATCH_2 0 0x3a 1 0 1 BIOS_SCRATCH_2 0 31 mmBIOS_SCRATCH_3 0 0x3b 1 0 1 BIOS_SCRATCH_3 0 31 mmBIOS_SCRATCH_4 0 0x3c 1 0 1 BIOS_SCRATCH_4 0 31 mmBIOS_SCRATCH_5 0 0x3d 1 0 1 BIOS_SCRATCH_5 0 31 mmBIOS_SCRATCH_6 0 0x3e 1 0 1 BIOS_SCRATCH_6 0 31 mmBIOS_SCRATCH_7 0 0x3f 1 0 1 BIOS_SCRATCH_7 0 31 mmBIOS_SCRATCH_8 0 0x40 1 0 1 BIOS_SCRATCH_8 0 31 mmBIOS_SCRATCH_9 0 0x41 1 0 1 BIOS_SCRATCH_9 0 31 mmBIOS_SCRATCH_10 0 0x42 1 0 1 BIOS_SCRATCH_10 0 31 mmBIOS_SCRATCH_11 0 0x43 1 0 1 BIOS_SCRATCH_11 0 31 mmBIOS_SCRATCH_12 0 0x44 1 0 1 BIOS_SCRATCH_12 0 31 mmBIOS_SCRATCH_13 0 0x45 1 0 1 BIOS_SCRATCH_13 0 31 mmBIOS_SCRATCH_14 0 0x46 1 0 1 BIOS_SCRATCH_14 0 31 mmBIOS_SCRATCH_15 0 0x47 1 0 1 BIOS_SCRATCH_15 0 31 mmBIF_RLC_INTR_CNTL 0 0x4c 4 0 1 RLC_CMD_COMPLETE 0 0 RLC_HANG_SELF_RECOVERED 1 1 RLC_HANG_NEED_FLR 2 2 RLC_VM_BUSY_TRANSITION 3 3 mmBIF_VCE_INTR_CNTL 0 0x4d 4 0 1 VCE_CMD_COMPLETE 0 0 VCE_HANG_SELF_RECOVERED 1 1 VCE_HANG_NEED_FLR 2 2 VCE_VM_BUSY_TRANSITION 3 3 mmBIF_UVD_INTR_CNTL 0 0x4e 5 0 1 UVD_CMD_COMPLETE 0 0 UVD_HANG_SELF_RECOVERED 1 1 UVD_HANG_NEED_FLR 2 2 UVD_VM_BUSY_TRANSITION 3 3 UVD_INST_SEL 28 31 mmGFX_MMIOREG_CAM_ADDR0 0 0x6c 1 0 1 CAM_ADDR0 0 19 mmGFX_MMIOREG_CAM_REMAP_ADDR0 0 0x6d 1 0 1 CAM_REMAP_ADDR0 0 19 mmGFX_MMIOREG_CAM_ADDR1 0 0x6e 1 0 1 CAM_ADDR1 0 19 mmGFX_MMIOREG_CAM_REMAP_ADDR1 0 0x6f 1 0 1 CAM_REMAP_ADDR1 0 19 mmGFX_MMIOREG_CAM_ADDR2 0 0x70 1 0 1 CAM_ADDR2 0 19 mmGFX_MMIOREG_CAM_REMAP_ADDR2 0 0x71 1 0 1 CAM_REMAP_ADDR2 0 19 mmGFX_MMIOREG_CAM_ADDR3 0 0x72 1 0 1 CAM_ADDR3 0 19 mmGFX_MMIOREG_CAM_REMAP_ADDR3 0 0x73 1 0 1 CAM_REMAP_ADDR3 0 19 mmGFX_MMIOREG_CAM_ADDR4 0 0x74 1 0 1 CAM_ADDR4 0 19 mmGFX_MMIOREG_CAM_REMAP_ADDR4 0 0x75 1 0 1 CAM_REMAP_ADDR4 0 19 mmGFX_MMIOREG_CAM_ADDR5 0 0x76 1 0 1 CAM_ADDR5 0 19 mmGFX_MMIOREG_CAM_REMAP_ADDR5 0 0x77 1 0 1 CAM_REMAP_ADDR5 0 19 mmGFX_MMIOREG_CAM_ADDR6 0 0x78 1 0 1 CAM_ADDR6 0 19 mmGFX_MMIOREG_CAM_REMAP_ADDR6 0 0x79 1 0 1 CAM_REMAP_ADDR6 0 19 mmGFX_MMIOREG_CAM_ADDR7 0 0x7a 1 0 1 CAM_ADDR7 0 19 mmGFX_MMIOREG_CAM_REMAP_ADDR7 0 0x7b 1 0 1 CAM_REMAP_ADDR7 0 19 mmGFX_MMIOREG_CAM_CNTL 0 0x7c 1 0 1 CAM_ENABLE 0 7 mmGFX_MMIOREG_CAM_ZERO_CPL 0 0x7d 1 0 1 CAM_ZERO_CPL 0 31 mmGFX_MMIOREG_CAM_ONE_CPL 0 0x7e 1 0 1 CAM_ONE_CPL 0 31 mmGFX_MMIOREG_CAM_PROGRAMMABLE_CPL 0 0x7f 1 0 1 CAM_PROGRAMMABLE_CPL 0 31 mmSYSHUB_INDEX 0 0x8 1 0 0 INDEX 0 31 mmSYSHUB_DATA 0 0x9 1 0 0 DATA 0 31 mmRCC_BIF_STRAP0 0 0x0 24 0 2 STRAP_GEN4_DIS_PIN 0 0 STRAP_CLK_PM_EN_PIN 1 1 STRAP_VGA_DIS_PIN 2 2 STRAP_MEM_AP_SIZE_PIN 3 5 STRAP_BIOS_ROM_EN_PIN 6 6 STRAP_PX_CAPABLE 7 7 STRAP_BIF_KILL_GEN3 8 8 STRAP_MSI_FIRST_BE_FULL_PAYLOAD_EN 9 9 STRAP_NBIF_IGNORE_ERR_INFLR 10 10 STRAP_PME_SUPPORT_COMPLIANCE_EN 11 11 STRAP_RX_IGNORE_EP_ERR 12 12 STRAP_RX_IGNORE_MSG_ERR 13 13 STRAP_RX_IGNORE_MAX_PAYLOAD_ERR 14 14 STRAP_RX_IGNORE_SHORTPREFIX_ERR_DN 15 15 STRAP_RX_IGNORE_TC_ERR 16 16 STRAP_RX_IGNORE_TC_ERR_DN 17 17 STRAP_AUD_PIN 18 19 STRAP_GEN3_DIS 24 24 STRAP_BIF_KILL_GEN4 25 25 STRAP_QUICKSIM_START 26 26 STRAP_NO_RO_ENABLED_P2P_PASSING 27 27 STRAP_CFG0_RD_VF_BUSNUM_CHK_EN 29 29 STRAP_BIGAPU_MODE 30 30 STRAP_LINK_DOWN_RESET_EN 31 31 mmRCC_BIF_STRAP1 0 0x1 24 0 2 FUSESTRAP_VALID 0 0 ROMSTRAP_VALID 1 1 WRITE_DISABLE 2 2 STRAP_ECRC_INTERMEDIATE_CHK_EN 3 3 STRAP_TRUE_PM_STATUS_EN 4 4 STRAP_IGNORE_E2E_PREFIX_UR_SWUS 5 5 STRAP_MARGINING_USES_SOFTWARE 6 6 STRAP_MARGINING_READY 7 7 STRAP_SWUS_APER_EN 8 8 STRAP_SWUS_64BAR_EN 9 9 STRAP_SWUS_AP_SIZE 10 11 STRAP_SWUS_APER_PREFETCHABLE 12 12 STRAP_HWREV_LSB2 13 14 STRAP_SWREV_LSB2 15 16 STRAP_LINK_RST_CFG_ONLY 17 17 STRAP_BIF_IOV_LKRST_DIS 18 18 STRAP_DLF_EN 19 19 STRAP_PHY_16GT_EN 20 20 STRAP_MARGIN_EN 21 21 STRAP_BIF_PSN_UR_RPT_EN 22 22 STRAP_BIF_SLOT_POWER_SUPPORT_EN 23 23 STRAP_S5_REGS_ACCESS_DIS 24 24 STRAP_S5_MMREG_WR_POSTED_EN 25 25 STRAP_GFX_FUNC_LTR_MODE 26 26 mmRCC_BIF_STRAP2 0 0x2 13 0 2 STRAP_PCIESWUS_INDEX_APER_RANGE 0 0 STRAP_SUC_IND_ACCESS_DIS 3 3 STRAP_SUM_IND_ACCESS_DIS 4 4 STRAP_ENDP_LINKDOWN_DROP_DMA 5 5 STRAP_SWITCH_LINKDOWN_DROP_DMA 6 6 STRAP_GMI_DNS_SDP_CLKREQ_TOGGLE_DIS 8 8 STRAP_ACS_MSKSEV_EP_HIDE_DIS 9 9 STRAP_CFG_PG_FW_INTERLOCK_EXIT_EN 10 11 RESERVED_BIF_STRAP2 12 13 STRAP_LTR_IN_ASPML1_DIS 14 14 STRAP_GFXAZ_POWERSTATE_INTERLOCK_EN 15 15 STRAP_PWRBRK_DEGLITCH_CYCLE 16 23 STRAP_PWRBRK_DEGLITCH_BYPASS 24 24 mmRCC_BIF_STRAP3 0 0x3 2 0 2 STRAP_VLINK_ASPM_IDLE_TIMER 0 15 STRAP_VLINK_PM_L1_ENTRY_TIMER 16 31 mmRCC_BIF_STRAP4 0 0x4 2 0 2 STRAP_VLINK_L0S_EXIT_TIMER 0 15 STRAP_VLINK_L1_EXIT_TIMER 16 31 mmRCC_BIF_STRAP5 0 0x5 11 0 2 STRAP_VLINK_LDN_ENTRY_TIMER 0 15 STRAP_VLINK_LDN_ON_SWUS_LDN_EN 16 16 STRAP_VLINK_LDN_ON_SWUS_SECRST_EN 17 17 STRAP_VLINK_ENTER_COMPLIANCE_DIS 18 18 STRAP_IGNORE_PSN_ON_VDM1_DIS 19 19 STRAP_SMN_ERR_STATUS_MASK_EN_UPS 20 20 STRAP_SMN_ERRRSP_DATA_FORCE 22 23 STRAP_INTERMEDIATERSP_DATA_ALLF_DATA_FORCE 24 24 STRAP_EMER_POWER_REDUCTION_SUPPORTED 25 26 STRAP_EMER_POWER_REDUCTION_INIT_REQ 27 27 STRAP_PWRBRK_STATUS_TIMER 28 30 mmRCC_BIF_STRAP6 0 0x6 1 0 2 RESERVED_BIF_STRAP3 0 31 mmRCC_DEV0_PORT_STRAP0 0 0x7 10 0 2 STRAP_ARI_EN_DN_DEV0 1 1 STRAP_ACS_EN_DN_DEV0 2 2 STRAP_AER_EN_DN_DEV0 3 3 STRAP_CPL_ABORT_ERR_EN_DN_DEV0 4 4 STRAP_DEVICE_ID_DN_DEV0 5 20 STRAP_INTERRUPT_PIN_DN_DEV0 21 23 STRAP_IGNORE_E2E_PREFIX_UR_DN_DEV0 24 24 STRAP_MAX_PAYLOAD_SUPPORT_DN_DEV0 25 27 STRAP_MAX_LINK_WIDTH_SUPPORT_DEV0 28 30 STRAP_EPF0_DUMMY_EN_DEV0 31 31 mmRCC_DEV0_PORT_STRAP1 0 0x8 2 0 2 STRAP_SUBSYS_ID_DN_DEV0 0 15 STRAP_SUBSYS_VEN_ID_DN_DEV0 16 31 mmRCC_DEV0_PORT_STRAP2 0 0x9 21 0 2 STRAP_DE_EMPHASIS_SEL_DN_DEV0 0 0 STRAP_DSN_EN_DN_DEV0 1 1 STRAP_E2E_PREFIX_EN_DEV0 2 2 STRAP_ECN1P1_EN_DEV0 3 3 STRAP_ECRC_CHECK_EN_DEV0 4 4 STRAP_ECRC_GEN_EN_DEV0 5 5 STRAP_ERR_REPORTING_DIS_DEV0 6 6 STRAP_EXTENDED_FMT_SUPPORTED_DEV0 7 7 STRAP_EXTENDED_TAG_ECN_EN_DEV0 8 8 STRAP_EXT_VC_COUNT_DN_DEV0 9 11 STRAP_FIRST_RCVD_ERR_LOG_DN_DEV0 12 12 STRAP_POISONED_ADVISORY_NONFATAL_DN_DEV0 13 13 STRAP_GEN2_COMPLIANCE_DEV0 14 14 STRAP_GEN2_EN_DEV0 15 15 STRAP_GEN3_COMPLIANCE_DEV0 16 16 STRAP_GEN4_COMPLIANCE_DEV0 17 17 STRAP_TARGET_LINK_SPEED_DEV0 18 19 STRAP_L0S_ACCEPTABLE_LATENCY_DEV0 20 22 STRAP_L0S_EXIT_LATENCY_DEV0 23 25 STRAP_L1_ACCEPTABLE_LATENCY_DEV0 26 28 STRAP_L1_EXIT_LATENCY_DEV0 29 31 mmRCC_DEV0_PORT_STRAP3 0 0xa 17 0 2 STRAP_LINK_BW_NOTIFICATION_CAP_DN_EN_DEV0 0 0 STRAP_LTR_EN_DEV0 1 1 STRAP_LTR_EN_DN_DEV0 2 2 STRAP_MAX_PAYLOAD_SUPPORT_DEV0 3 5 STRAP_MSI_EN_DN_DEV0 6 6 STRAP_MSTCPL_TIMEOUT_EN_DEV0 7 7 STRAP_NO_SOFT_RESET_DN_DEV0 8 8 STRAP_OBFF_SUPPORTED_DEV0 9 10 STRAP_PCIE_LANE_EQUALIZATION_CNTL_DOWNSTREAM_PORT_RX_PRESET_HINT_DEV0 11 13 STRAP_PCIE_LANE_EQUALIZATION_CNTL_DOWNSTREAM_PORT_TX_PRESET_DEV0 14 17 STRAP_PCIE_LANE_EQUALIZATION_CNTL_UPSTREAM_PORT_RX_PRESET_HINT_DEV0 18 20 STRAP_PCIE_LANE_EQUALIZATION_CNTL_UPSTREAM_PORT_TX_PRESET_DEV0 21 24 STRAP_PM_SUPPORT_DEV0 25 26 STRAP_PM_SUPPORT_DN_DEV0 27 28 STRAP_ATOMIC_EN_DN_DEV0 29 29 STRAP_VENDOR_ID_BIT_DN_DEV0 30 30 STRAP_PMC_DSI_DN_DEV0 31 31 mmRCC_DEV0_PORT_STRAP4 0 0xb 4 0 2 STRAP_PWR_BUDGET_DATA_8T0_0_DEV0 0 7 STRAP_PWR_BUDGET_DATA_8T0_1_DEV0 8 15 STRAP_PWR_BUDGET_DATA_8T0_2_DEV0 16 23 STRAP_PWR_BUDGET_DATA_8T0_3_DEV0 24 31 mmRCC_DEV0_PORT_STRAP5 0 0xc 18 0 2 STRAP_PWR_BUDGET_DATA_8T0_4_DEV0 0 7 STRAP_PWR_BUDGET_DATA_8T0_5_DEV0 8 15 STRAP_PWR_BUDGET_SYSTEM_ALLOCATED_DEV0 16 16 STRAP_ATOMIC_64BIT_EN_DN_DEV0 17 17 STRAP_ATOMIC_ROUTING_EN_DEV0 18 18 STRAP_VC_EN_DN_DEV0 19 19 STRAP_TwoVC_EN_DEV0 20 20 STRAP_TwoVC_EN_DN_DEV0 21 21 STRAP_LOCAL_DLF_SUPPORTED_DEV0 22 22 STRAP_ACS_SOURCE_VALIDATION_DN_DEV0 23 23 STRAP_ACS_TRANSLATION_BLOCKING_DN_DEV0 24 24 STRAP_ACS_P2P_REQUEST_REDIRECT_DN_DEV0 25 25 STRAP_ACS_P2P_COMPLETION_REDIRECT_DN_DEV0 26 26 STRAP_ACS_UPSTREAM_FORWARDING_DN_DEV0 27 27 STRAP_ACS_P2P_EGRESS_CONTROL_DN_DEV0 28 28 STRAP_ACS_DIRECT_TRANSLATED_P2P_DN_DEV0 29 29 STRAP_MSI_MAP_EN_DEV0 30 30 STRAP_SSID_EN_DEV0 31 31 mmRCC_DEV0_PORT_STRAP6 0 0xd 11 0 2 STRAP_CFG_CRS_EN_DEV0 0 0 STRAP_SMN_ERR_STATUS_MASK_EN_DNS_DEV0 1 1 STRAP_INTERNAL_ERR_EN_DEV0 2 2 STRAP_RTM1_PRESENCE_DET_SUPPORT_DEV0 3 3 STRAP_RTM2_PRESENCE_DET_SUPPORT_DEV0 4 4 STRAP_10BIT_TAG_COMPLETER_SUPPORTED_DEV0 5 5 STRAP_10BIT_TAG_REQUESTER_SUPPORTED_DEV0 6 6 STRAP_VF_10BIT_TAG_REQUESTER_SUPPORTED_DEV0 7 7 STRAP_PCIE_16GT_LANE_EQUALIZATION_CNTL_DSP_TX_PRESET_DEV0 8 11 STRAP_PCIE_16GT_LANE_EQUALIZATION_CNTL_USP_TX_PRESET_DEV0 12 15 STRAP_TPH_CPLR_SUPPORTED_DN_DEV0 16 17 mmRCC_DEV0_PORT_STRAP7 0 0xe 6 0 2 STRAP_PORT_NUMBER_DEV0 0 7 STRAP_MAJOR_REV_ID_DN_DEV0 8 11 STRAP_MINOR_REV_ID_DN_DEV0 12 15 STRAP_RP_BUSNUM_DEV0 16 23 STRAP_DN_DEVNUM_DEV0 24 28 STRAP_DN_FUNCID_DEV0 29 31 mmRCC_DEV0_PORT_STRAP8 0 0xf 4 0 2 STRAP_PWR_BUDGET_DATA_8T0_6_DEV0 0 7 STRAP_PWR_BUDGET_DATA_8T0_7_DEV0 8 15 STRAP_PWR_BUDGET_DATA_8T0_8_DEV0 16 23 STRAP_PWR_BUDGET_DATA_8T0_9_DEV0 24 31 mmRCC_DEV0_PORT_STRAP9 0 0x10 2 0 2 STRAP_PWR_BUDGET_DATA_8T0_a_DEV0 0 7 STRAP_PWR_BUDGET_DATA_8T0_b_DEV0 8 15 mmRCC_DEV0_EPF0_STRAP0 0 0x11 8 0 2 STRAP_DEVICE_ID_DEV0_F0 0 15 STRAP_MAJOR_REV_ID_DEV0_F0 16 19 STRAP_MINOR_REV_ID_DEV0_F0 20 23 STRAP_ATI_REV_ID_DEV0_F0 24 27 STRAP_FUNC_EN_DEV0_F0 28 28 STRAP_LEGACY_DEVICE_TYPE_EN_DEV0_F0 29 29 STRAP_D1_SUPPORT_DEV0_F0 30 30 STRAP_D2_SUPPORT_DEV0_F0 31 31 mmRCC_DEV0_EPF0_STRAP1 0 0x12 2 0 2 STRAP_SRIOV_VF_DEVICE_ID_DEV0_F0 0 15 STRAP_SRIOV_SUPPORTED_PAGE_SIZE_DEV0_F0 16 31 mmRCC_DEV0_EPF0_STRAP13 0 0x13 3 0 2 STRAP_CLASS_CODE_PIF_DEV0_F0 0 7 STRAP_CLASS_CODE_SUB_DEV0_F0 8 15 STRAP_CLASS_CODE_BASE_DEV0_F0 16 23 mmRCC_DEV0_EPF0_STRAP2 0 0x14 21 0 2 STRAP_SRIOV_EN_DEV0_F0 0 0 STRAP_SRIOV_TOTAL_VFS_DEV0_F0 1 5 STRAP_64BAR_DIS_DEV0_F0 6 6 STRAP_NO_SOFT_RESET_DEV0_F0 7 7 STRAP_RESIZE_BAR_EN_DEV0_F0 8 8 STRAP_MAX_PASID_WIDTH_DEV0_F0 9 13 STRAP_MSI_PERVECTOR_MASK_CAP_DEV0_F0 14 14 STRAP_ARI_EN_DEV0_F0 15 15 STRAP_AER_EN_DEV0_F0 16 16 STRAP_ACS_EN_DEV0_F0 17 17 STRAP_ATS_EN_DEV0_F0 18 18 STRAP_CPL_ABORT_ERR_EN_DEV0_F0 20 20 STRAP_DPA_EN_DEV0_F0 21 21 STRAP_DSN_EN_DEV0_F0 22 22 STRAP_VC_EN_DEV0_F0 23 23 STRAP_MSI_MULTI_CAP_DEV0_F0 24 26 STRAP_PAGE_REQ_EN_DEV0_F0 27 27 STRAP_PASID_EN_DEV0_F0 28 28 STRAP_PASID_EXE_PERMISSION_SUPPORTED_DEV0_F0 29 29 STRAP_PASID_GLOBAL_INVALIDATE_SUPPORTED_DEV0_F0 30 30 STRAP_PASID_PRIV_MODE_SUPPORTED_DEV0_F0 31 31 mmRCC_DEV0_EPF0_STRAP3 0 0x15 12 0 2 STRAP_POISONED_ADVISORY_NONFATAL_DEV0_F0 0 0 STRAP_PWR_EN_DEV0_F0 1 1 STRAP_SUBSYS_ID_DEV0_F0 2 17 STRAP_MSI_EN_DEV0_F0 18 18 STRAP_MSI_CLR_PENDING_EN_DEV0_F0 19 19 STRAP_MSIX_EN_DEV0_F0 20 20 STRAP_MSIX_TABLE_BIR_DEV0_F0 21 23 STRAP_PMC_DSI_DEV0_F0 24 24 STRAP_VENDOR_ID_BIT_DEV0_F0 25 25 STRAP_ALL_MSI_EVENT_SUPPORT_EN_DEV0_F0 26 26 STRAP_SMN_ERR_STATUS_MASK_EN_EP_DEV0_F0 27 27 STRAP_VF_RESIZE_BAR_EN_DEV0_F0 28 28 mmRCC_DEV0_EPF0_STRAP4 0 0x16 7 0 2 STRAP_RESERVED_STRAP4_DEV0_F0 0 9 STRAP_ATOMIC_64BIT_EN_DEV0_F0 20 20 STRAP_ATOMIC_EN_DEV0_F0 21 21 STRAP_FLR_EN_DEV0_F0 22 22 STRAP_PME_SUPPORT_DEV0_F0 23 27 STRAP_INTERRUPT_PIN_DEV0_F0 28 30 STRAP_AUXPWR_SUPPORT_DEV0_F0 31 31 mmRCC_DEV0_EPF0_STRAP5 0 0x17 1 0 2 STRAP_SUBSYS_VEN_ID_DEV0_F0 0 15 mmRCC_DEV0_EPF0_STRAP8 0 0x18 15 0 2 STRAP_DOORBELL_APER_SIZE_DEV0_F0 0 2 STRAP_DOORBELL_BAR_DIS_DEV0_F0 3 3 STRAP_FB_ALWAYS_ON_DEV0_F0 4 4 STRAP_FB_CPL_TYPE_SEL_DEV0_F0 5 6 STRAP_IO_BAR_DIS_DEV0_F0 7 7 STRAP_LFB_ERRMSG_EN_DEV0_F0 8 8 STRAP_MEM_AP_SIZE_DEV0_F0 9 12 STRAP_REG_AP_SIZE_DEV0_F0 13 14 STRAP_ROM_AP_SIZE_DEV0_F0 15 16 STRAP_VF_DOORBELL_APER_SIZE_DEV0_F0 17 19 STRAP_VF_MEM_AP_SIZE_DEV0_F0 20 23 STRAP_VF_REG_AP_SIZE_DEV0_F0 24 25 STRAP_VGA_DIS_DEV0_F0 26 26 STRAP_VF_MSI_MULTI_CAP_DEV0_F0 27 29 STRAP_SRIOV_VF_MAPPING_MODE_DEV0_F0 30 31 mmRCC_DEV0_EPF0_STRAP9 0 0x19 4 0 2 STRAP_OUTSTAND_PAGE_REQ_CAP_DEV0_F0 0 15 STRAP_BAR_COMPLIANCE_EN_DEV0_F0 18 18 STRAP_NBIF_ROM_BAR_DIS_CHICKEN_DEV0_F0 19 19 STRAP_VF_REG_PROT_DIS_DEV0_F0 20 20 mmRCC_DEV0_EPF1_STRAP0 0 0x1a 7 0 2 STRAP_DEVICE_ID_DEV0_F1 0 15 STRAP_MAJOR_REV_ID_DEV0_F1 16 19 STRAP_MINOR_REV_ID_DEV0_F1 20 23 STRAP_FUNC_EN_DEV0_F1 28 28 STRAP_LEGACY_DEVICE_TYPE_EN_DEV0_F1 29 29 STRAP_D1_SUPPORT_DEV0_F1 30 30 STRAP_D2_SUPPORT_DEV0_F1 31 31 mmRCC_DEV0_EPF1_STRAP10 0 0x1b 2 0 2 STRAP_APER1_RESIZE_EN_DEV0_F1 0 0 STRAP_APER1_RESIZE_SUPPORT_DEV0_F1 1 28 mmRCC_DEV0_EPF1_STRAP11 0 0x1c 2 0 2 STRAP_APER2_RESIZE_EN_DEV0_F1 0 0 STRAP_APER2_RESIZE_SUPPORT_DEV0_F1 1 28 mmRCC_DEV0_EPF1_STRAP12 0 0x1d 2 0 2 STRAP_APER3_RESIZE_EN_DEV0_F1 0 0 STRAP_APER3_RESIZE_SUPPORT_DEV0_F1 1 28 mmRCC_DEV0_EPF1_STRAP13 0 0x1e 3 0 2 STRAP_CLASS_CODE_PIF_DEV0_F1 0 7 STRAP_CLASS_CODE_SUB_DEV0_F1 8 15 STRAP_CLASS_CODE_BASE_DEV0_F1 16 23 mmRCC_DEV0_EPF1_STRAP2 0 0x1f 16 0 2 STRAP_NO_SOFT_RESET_DEV0_F1 7 7 STRAP_RESIZE_BAR_EN_DEV0_F1 8 8 STRAP_MAX_PASID_WIDTH_DEV0_F1 9 13 STRAP_MSI_PERVECTOR_MASK_CAP_DEV0_F1 14 14 STRAP_AER_EN_DEV0_F1 16 16 STRAP_ACS_EN_DEV0_F1 17 17 STRAP_ATS_EN_DEV0_F1 18 18 STRAP_CPL_ABORT_ERR_EN_DEV0_F1 20 20 STRAP_DPA_EN_DEV0_F1 21 21 STRAP_DSN_EN_DEV0_F1 22 22 STRAP_VC_EN_DEV0_F1 23 23 STRAP_MSI_MULTI_CAP_DEV0_F1 24 26 STRAP_PASID_EN_DEV0_F1 28 28 STRAP_PASID_EXE_PERMISSION_SUPPORTED_DEV0_F1 29 29 STRAP_PASID_GLOBAL_INVALIDATE_SUPPORTED_DEV0_F1 30 30 STRAP_PASID_PRIV_MODE_SUPPORTED_DEV0_F1 31 31 mmRCC_DEV0_EPF1_STRAP3 0 0x20 10 0 2 STRAP_POISONED_ADVISORY_NONFATAL_DEV0_F1 0 0 STRAP_PWR_EN_DEV0_F1 1 1 STRAP_SUBSYS_ID_DEV0_F1 2 17 STRAP_MSI_EN_DEV0_F1 18 18 STRAP_MSI_CLR_PENDING_EN_DEV0_F1 19 19 STRAP_MSIX_EN_DEV0_F1 20 20 STRAP_PMC_DSI_DEV0_F1 24 24 STRAP_VENDOR_ID_BIT_DEV0_F1 25 25 STRAP_ALL_MSI_EVENT_SUPPORT_EN_DEV0_F1 26 26 STRAP_SMN_ERR_STATUS_MASK_EN_EP_DEV0_F1 27 27 mmRCC_DEV0_EPF1_STRAP4 0 0x21 6 0 2 STRAP_ATOMIC_64BIT_EN_DEV0_F1 20 20 STRAP_ATOMIC_EN_DEV0_F1 21 21 STRAP_FLR_EN_DEV0_F1 22 22 STRAP_PME_SUPPORT_DEV0_F1 23 27 STRAP_INTERRUPT_PIN_DEV0_F1 28 30 STRAP_AUXPWR_SUPPORT_DEV0_F1 31 31 mmRCC_DEV0_EPF1_STRAP5 0 0x22 1 0 2 STRAP_SUBSYS_VEN_ID_DEV0_F1 0 15 mmRCC_DEV0_EPF1_STRAP6 0 0x23 10 0 2 STRAP_APER0_EN_DEV0_F1 0 0 STRAP_APER0_PREFETCHABLE_EN_DEV0_F1 1 1 STRAP_APER0_64BAR_EN_DEV0_F1 2 2 STRAP_APER0_AP_SIZE_DEV0_F1 4 6 STRAP_APER1_EN_DEV0_F1 8 8 STRAP_APER1_PREFETCHABLE_EN_DEV0_F1 9 9 STRAP_APER2_EN_DEV0_F1 16 16 STRAP_APER2_PREFETCHABLE_EN_DEV0_F1 17 17 STRAP_APER3_EN_DEV0_F1 24 24 STRAP_APER3_PREFETCHABLE_EN_DEV0_F1 25 25 mmRCC_DEV0_EPF1_STRAP7 0 0x24 7 0 2 STRAP_ROM_APER_EN_DEV0_F1 0 0 STRAP_ROM_APER_SIZE_DEV0_F1 1 4 STRAP_TPH_CPLR_SUPPORTED_DEV0_F1 20 21 STRAP_TPH_EN_DEV0_F1 22 22 STRAP_TPH_REQR_DEV_SPC_MODE_SUPPORTED_DEV0_F1 23 23 STRAP_TPH_REQR_ST_TABLE_LOCATION_DEV0_F1 24 25 STRAP_TPH_REQR_ST_TABLE_SIZE_DEV0_F1 26 31 mmEP_PCIE_SCRATCH 0 0x25 1 0 2 PCIE_SCRATCH 0 31 mmEP_PCIE_CNTL 0 0x27 3 0 2 UR_ERR_REPORT_DIS 7 7 PCIE_MALFORM_ATOMIC_OPS 8 8 RX_IGNORE_LTR_MSG_UR 30 30 mmEP_PCIE_INT_CNTL 0 0x28 6 0 2 CORR_ERR_INT_EN 0 0 NON_FATAL_ERR_INT_EN 1 1 FATAL_ERR_INT_EN 2 2 USR_DETECTED_INT_EN 3 3 MISC_ERR_INT_EN 4 4 POWER_STATE_CHG_INT_EN 6 6 mmEP_PCIE_INT_STATUS 0 0x29 6 0 2 CORR_ERR_INT_STATUS 0 0 NON_FATAL_ERR_INT_STATUS 1 1 FATAL_ERR_INT_STATUS 2 2 USR_DETECTED_INT_STATUS 3 3 MISC_ERR_INT_STATUS 4 4 POWER_STATE_CHG_INT_STATUS 6 6 mmEP_PCIE_RX_CNTL2 0 0x2a 1 0 2 RX_IGNORE_EP_INVALIDPASID_UR 0 0 mmEP_PCIE_BUS_CNTL 0 0x2b 1 0 2 IMMEDIATE_PMI_DIS 7 7 mmEP_PCIE_CFG_CNTL 0 0x2c 4 0 2 CFG_EN_DEC_TO_HIDDEN_REG 0 0 CFG_EN_DEC_TO_GEN2_HIDDEN_REG 1 1 CFG_EN_DEC_TO_GEN3_HIDDEN_REG 2 2 CFG_EN_DEC_TO_GEN4_HIDDEN_REG 3 3 mmEP_PCIE_TX_LTR_CNTL 0 0x2e 10 0 2 LTR_PRIV_S_SHORT_VALUE 0 2 LTR_PRIV_S_LONG_VALUE 3 5 LTR_PRIV_S_REQUIREMENT 6 6 LTR_PRIV_NS_SHORT_VALUE 7 9 LTR_PRIV_NS_LONG_VALUE 10 12 LTR_PRIV_NS_REQUIREMENT 13 13 LTR_PRIV_MSG_DIS_IN_PM_NON_D0 14 14 LTR_PRIV_RST_LTR_IN_DL_DOWN 15 15 TX_CHK_FC_FOR_L1 16 16 LTR_DSTATE_USING_WDATA_EN 17 17 mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_0 0 0x2f 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_1 0 0x2f 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_2 0 0x2f 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_3 0 0x2f 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_4 0 0x30 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_5 0 0x30 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_6 0 0x30 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_7 0 0x30 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmEP_PCIE_STRAP_MISC 0 0x31 1 0 2 STRAP_MST_ADR64_EN 29 29 mmEP_PCIE_STRAP_MISC2 0 0x32 1 0 2 STRAP_TPH_SUPPORTED 4 4 mmEP_PCIE_F0_DPA_CAP 0 0x34 4 0 2 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 mmEP_PCIE_F0_DPA_LATENCY_INDICATOR 0 0x35 1 0 2 TRANS_LAT_INDICATOR_BITS 0 7 mmEP_PCIE_F0_DPA_CNTL 0 0x35 2 0 2 SUBSTATE_STATUS 0 4 DPA_COMPLIANCE_MODE 8 8 mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_0 0 0x35 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_1 0 0x36 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_2 0 0x36 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_3 0 0x36 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_4 0 0x36 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5 0 0x37 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_6 0 0x37 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_7 0 0x37 1 0 2 SUBSTATE_PWR_ALLOC 0 7 mmEP_PCIE_PME_CONTROL 0 0x37 1 0 2 PME_SERVICE_TIMER 0 4 mmEP_PCIEP_RESERVED 0 0x38 1 0 2 PCIEP_RESERVED 0 31 mmEP_PCIE_TX_CNTL 0 0x3a 5 0 2 TX_SNR_OVERRIDE 10 11 TX_RO_OVERRIDE 12 13 TX_F0_TPH_DIS 24 24 TX_F1_TPH_DIS 25 25 TX_F2_TPH_DIS 26 26 mmEP_PCIE_TX_REQUESTER_ID 0 0x3b 3 0 2 TX_REQUESTER_ID_FUNCTION 0 2 TX_REQUESTER_ID_DEVICE 3 7 TX_REQUESTER_ID_BUS 8 15 mmEP_PCIE_ERR_CNTL 0 0x3c 12 0 2 ERR_REPORTING_DIS 0 0 AER_HDR_LOG_TIMEOUT 8 10 SEND_ERR_MSG_IMMEDIATELY 17 17 STRAP_POISONED_ADVISORY_NONFATAL 18 18 AER_HDR_LOG_F0_TIMER_EXPIRED 24 24 AER_HDR_LOG_F1_TIMER_EXPIRED 25 25 AER_HDR_LOG_F2_TIMER_EXPIRED 26 26 AER_HDR_LOG_F3_TIMER_EXPIRED 27 27 AER_HDR_LOG_F4_TIMER_EXPIRED 28 28 AER_HDR_LOG_F5_TIMER_EXPIRED 29 29 AER_HDR_LOG_F6_TIMER_EXPIRED 30 30 AER_HDR_LOG_F7_TIMER_EXPIRED 31 31 mmEP_PCIE_RX_CNTL 0 0x3d 8 0 2 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR 9 9 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR 21 21 RX_IGNORE_MAXPREFIX_ERR 22 22 RX_IGNORE_INVALIDPASID_ERR 24 24 RX_IGNORE_NOT_PASID_UR 25 25 RX_TPH_DIS 26 26 mmEP_PCIE_LC_SPEED_CNTL 0 0x3e 3 0 2 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_GEN4_EN_STRAP 2 2 mmDN_PCIE_RESERVED 0 0x40 1 0 2 PCIE_RESERVED 0 31 mmDN_PCIE_SCRATCH 0 0x41 1 0 2 PCIE_SCRATCH 0 31 mmDN_PCIE_CNTL 0 0x43 3 0 2 HWINIT_WR_LOCK 0 0 UR_ERR_REPORT_DIS_DN 7 7 RX_IGNORE_LTR_MSG_UR 30 30 mmDN_PCIE_CONFIG_CNTL 0 0x44 1 0 2 CI_EXTENDED_TAG_EN_OVERRIDE 25 26 mmDN_PCIE_RX_CNTL2 0 0x45 1 0 2 FLR_EXTEND_MODE 28 30 mmDN_PCIE_BUS_CNTL 0 0x46 2 0 2 IMMEDIATE_PMI_DIS 7 7 AER_CPL_TIMEOUT_RO_DIS_SWDN 8 8 mmDN_PCIE_CFG_CNTL 0 0x47 4 0 2 CFG_EN_DEC_TO_HIDDEN_REG 0 0 CFG_EN_DEC_TO_GEN2_HIDDEN_REG 1 1 CFG_EN_DEC_TO_GEN3_HIDDEN_REG 2 2 CFG_EN_DEC_TO_GEN4_HIDDEN_REG 3 3 mmDN_PCIE_STRAP_F0 0 0x48 3 0 2 STRAP_F0_EN 0 0 STRAP_F0_MC_EN 17 17 STRAP_F0_MSI_MULTI_CAP 21 23 mmDN_PCIE_STRAP_MISC 0 0x49 2 0 2 STRAP_CLK_PM_EN 24 24 STRAP_MST_ADR64_EN 29 29 mmDN_PCIE_STRAP_MISC2 0 0x4a 1 0 2 STRAP_MSTCPL_TIMEOUT_EN 2 2 mmPCIE_ERR_CNTL 0 0x4f 4 0 2 ERR_REPORTING_DIS 0 0 AER_HDR_LOG_TIMEOUT 8 10 AER_HDR_LOG_F0_TIMER_EXPIRED 11 11 SEND_ERR_MSG_IMMEDIATELY 17 17 mmPCIE_RX_CNTL 0 0x50 5 0 2 RX_IGNORE_MAX_PAYLOAD_ERR 8 8 RX_IGNORE_TC_ERR_DN 9 9 RX_PCIE_CPL_TIMEOUT_DIS 20 20 RX_IGNORE_SHORTPREFIX_ERR_DN 21 21 RX_RCB_FLR_TIMEOUT_DIS 27 27 mmPCIE_LC_SPEED_CNTL 0 0x51 3 0 2 LC_GEN2_EN_STRAP 0 0 LC_GEN3_EN_STRAP 1 1 LC_GEN4_EN_STRAP 2 2 mmPCIE_LC_CNTL2 0 0x52 1 0 2 LC_LINK_BW_NOTIFICATION_DIS 27 27 mmPCIEP_STRAP_MISC 0 0x53 1 0 2 STRAP_MULTI_FUNC_EN 10 10 mmLTR_MSG_INFO_FROM_EP 0 0x54 1 0 2 LTR_MSG_INFO_FROM_EP 0 31 mmRCC_DEV0_EPF0_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmRCC_ERR_INT_CNTL 0 0x86 1 0 2 INVALID_REG_ACCESS_IN_SRIOV_INT_EN 0 0 mmRCC_BACO_CNTL_MISC 0 0x87 2 0 2 BIF_ROM_REQ_DIS 0 0 BIF_AZ_REQ_DIS 1 1 mmRCC_RESET_EN 0 0x88 1 0 2 DB_APER_RESET_EN 15 15 mmRCC_VDM_SUPPORT 0 0x89 5 0 2 MCTP_SUPPORT 0 0 AMPTP_SUPPORT 1 1 OTHER_VDM_SUPPORT 2 2 ROUTE_TO_RC_CHECK_IN_RCMODE 3 3 ROUTE_BROADCAST_CHECK_IN_RCMODE 4 4 mmRCC_MARGIN_PARAM_CNTL0 0 0x8a 9 0 2 MARGINING_VOLTAGE_SUPPORTED 0 0 MARGINING_IND_LEFTRIGHT_TIMING 1 1 MARGINING_IND_UPDOWN_VOLTAGE 2 2 MARGINING_IND_ERROR_SAMPLER 3 3 MARGINING_SAMPLE_REPORTING_METHOD 4 4 MARGINING_NUM_TIMING_STEPS 5 10 MARGINING_MAX_TIMING_OFFSET 11 17 MARGINING_NUM_VOLTAGE_STEPS 18 24 MARGINING_MAX_VOLTAGE_OFFSET 25 31 mmRCC_MARGIN_PARAM_CNTL1 0 0x8b 4 0 2 MARGINING_SAMPLING_RATE_VOLTAGE 0 5 MARGINING_SAMPLING_RATE_TIMING 6 11 MARGINING_MAX_LANES 12 16 MARGINING_SAMPLE_COUNT 17 23 mmRCC_GPUIOV_REGION 0 0x8c 2 0 2 LFB_REGION 0 2 MAX_REGION 4 6 mmRCC_PEER_REG_RANGE0 0 0xbe 2 0 2 START_ADDR 0 15 END_ADDR 16 31 mmRCC_PEER_REG_RANGE1 0 0xbf 2 0 2 START_ADDR 0 15 END_ADDR 16 31 mmRCC_BUS_CNTL 0 0xc1 19 0 2 PMI_IO_DIS 2 2 PMI_MEM_DIS 3 3 PMI_BM_DIS 4 4 PMI_IO_DIS_DN 5 5 PMI_MEM_DIS_DN 6 6 PMI_IO_DIS_UP 7 7 PMI_MEM_DIS_UP 8 8 ROOT_ERR_LOG_ON_EVENT 12 12 HOST_CPL_POISONED_LOG_IN_RC 13 13 DN_SEC_SIG_CPLCA_WITH_EP_ERR 16 16 DN_SEC_RCV_CPLCA_WITH_EP_ERR 17 17 DN_SEC_RCV_CPLUR_WITH_EP_ERR 18 18 DN_PRI_SIG_CPLCA_WITH_EP_ERR 19 19 DN_PRI_RCV_CPLCA_WITH_EP_ERR 20 20 DN_PRI_RCV_CPLUR_WITH_EP_ERR 21 21 MAX_PAYLOAD_SIZE_MODE 24 24 PRIV_MAX_PAYLOAD_SIZE 25 27 MAX_READ_REQUEST_SIZE_MODE 28 28 PRIV_MAX_READ_REQUEST_SIZE 29 31 mmRCC_CONFIG_CNTL 0 0xc2 3 0 2 CFG_VGA_RAM_EN 0 0 GENMO_MONO_ADDRESS_B 2 2 GRPH_ADRSEL 3 4 mmRCC_CONFIG_F0_BASE 0 0xc6 1 0 2 F0_BASE 0 31 mmRCC_CONFIG_APER_SIZE 0 0xc7 1 0 2 APER_SIZE 0 31 mmRCC_CONFIG_REG_APER_SIZE 0 0xc8 1 0 2 REG_APER_SIZE 0 19 mmRCC_XDMA_LO 0 0xc9 2 0 2 BIF_XDMA_LOWER_BOUND 0 30 BIF_XDMA_APER_EN 31 31 mmRCC_XDMA_HI 0 0xca 1 0 2 BIF_XDMA_UPPER_BOUND 0 30 mmRCC_FEATURES_CONTROL_MISC 0 0xcb 16 0 2 UR_PSN_PKT_REPORT_POISON_DIS 4 4 POST_PSN_ONLY_PKT_REPORT_UR_ALL_DIS 5 5 POST_PSN_ONLY_PKT_REPORT_UR_PART_DIS 6 6 INIT_PFFLR_CRS_RET_DIS 7 7 ATC_PRG_RESP_PASID_UR_EN 8 8 RX_IGNORE_TRANSMRD_UR 9 9 RX_IGNORE_TRANSMWR_UR 10 10 RX_IGNORE_ATSTRANSREQ_UR 11 11 RX_IGNORE_PAGEREQMSG_UR 12 12 RX_IGNORE_INVCPL_UR 13 13 CLR_MSI_X_PENDING_WHEN_DISABLED_DIS 14 14 CHECK_BME_ON_PENDING_PKT_GEN_DIS 15 15 PSN_CHECK_ON_PAYLOAD_DIS 16 16 CLR_MSI_PENDING_ON_MULTIEN_DIS 17 17 SET_DEVICE_ERR_FOR_ECRC_EN 18 18 HOST_POISON_FLAG_CHECK_FOR_CHAIN_DIS 19 19 mmRCC_BUSNUM_CNTL1 0 0xcc 1 0 2 ID_MASK 0 7 mmRCC_BUSNUM_LIST0 0 0xcd 4 0 2 ID0 0 7 ID1 8 15 ID2 16 23 ID3 24 31 mmRCC_BUSNUM_LIST1 0 0xce 4 0 2 ID4 0 7 ID5 8 15 ID6 16 23 ID7 24 31 mmRCC_BUSNUM_CNTL2 0 0xcf 4 0 2 AUTOUPDATE_SEL 0 7 AUTOUPDATE_EN 8 8 HDPREG_CNTL 16 16 ERROR_MULTIPLE_ID_MATCH 17 17 mmRCC_CAPTURE_HOST_BUSNUM 0 0xd0 1 0 2 CHECK_EN 0 0 mmRCC_HOST_BUSNUM 0 0xd1 1 0 2 HOST_ID 0 15 mmRCC_PEER0_FB_OFFSET_HI 0 0xd2 1 0 2 PEER0_FB_OFFSET_HI 0 19 mmRCC_PEER0_FB_OFFSET_LO 0 0xd3 2 0 2 PEER0_FB_OFFSET_LO 0 19 PEER0_FB_EN 31 31 mmRCC_PEER1_FB_OFFSET_HI 0 0xd4 1 0 2 PEER1_FB_OFFSET_HI 0 19 mmRCC_PEER1_FB_OFFSET_LO 0 0xd5 2 0 2 PEER1_FB_OFFSET_LO 0 19 PEER1_FB_EN 31 31 mmRCC_PEER2_FB_OFFSET_HI 0 0xd6 1 0 2 PEER2_FB_OFFSET_HI 0 19 mmRCC_PEER2_FB_OFFSET_LO 0 0xd7 2 0 2 PEER2_FB_OFFSET_LO 0 19 PEER2_FB_EN 31 31 mmRCC_PEER3_FB_OFFSET_HI 0 0xd8 1 0 2 PEER3_FB_OFFSET_HI 0 19 mmRCC_PEER3_FB_OFFSET_LO 0 0xd9 2 0 2 PEER3_FB_OFFSET_LO 0 19 PEER3_FB_EN 31 31 mmRCC_DEVFUNCNUM_LIST0 0 0xda 4 0 2 DEVFUNC_ID0 0 7 DEVFUNC_ID1 8 15 DEVFUNC_ID2 16 23 DEVFUNC_ID3 24 31 mmRCC_DEVFUNCNUM_LIST1 0 0xdb 4 0 2 DEVFUNC_ID4 0 7 DEVFUNC_ID5 8 15 DEVFUNC_ID6 16 23 DEVFUNC_ID7 24 31 mmRCC_DEV0_LINK_CNTL 0 0xdd 2 0 2 LINK_DOWN_EXIT 0 0 LINK_DOWN_ENTRY 8 8 mmRCC_CMN_LINK_CNTL 0 0xde 5 0 2 BLOCK_PME_ON_L0S_DIS 0 0 BLOCK_PME_ON_L1_DIS 1 1 BLOCK_PME_ON_LDN_DIS 2 2 PM_L1_IDLE_CHECK_DMA_EN 3 3 VLINK_IN_L1LTR_TIMER 16 31 mmRCC_EP_REQUESTERID_RESTORE 0 0xdf 2 0 2 EP_REQID_BUS 0 7 EP_REQID_DEV 8 12 mmRCC_LTR_LSWITCH_CNTL 0 0xe0 1 0 2 LSWITCH_LATENCY_VALUE 0 9 mmRCC_MH_ARB_CNTL 0 0xe1 2 0 2 MH_ARB_MODE 0 0 MH_ARB_FIX_PRIORITY 1 14 mmCC_BIF_BX_STRAP0 0 0xe2 1 0 2 STRAP_RESERVED 25 31 mmCC_BIF_BX_PINSTRAP0 0 0xe4 0 0 2 mmBIF_MM_INDACCESS_CNTL 0 0xe6 2 0 2 WRITE_DIS 0 0 MM_INDACCESS_DIS 1 1 mmBUS_CNTL 0 0xe7 12 0 2 VGA_REG_COHERENCY_DIS 6 6 VGA_MEM_COHERENCY_DIS 7 7 SET_AZ_TC 10 12 SET_MC_TC 13 15 ZERO_BE_WR_EN 16 16 ZERO_BE_RD_EN 17 17 RD_STALL_IO_WR 18 18 PRECEEDINGWR_STALL_VGA_FB_FLUSH_DIS 25 25 PRECEEDINGWR_STALL_VGA_REG_FLUSH_DIS 26 26 HDP_REG_FLUSH_VF_MASK_EN 29 29 VGAFB_ZERO_BE_WR_EN 30 30 VGAFB_ZERO_BE_RD_EN 31 31 mmBIF_SCRATCH0 0 0xe8 1 0 2 BIF_SCRATCH0 0 31 mmBIF_SCRATCH1 0 0xe9 1 0 2 BIF_SCRATCH1 0 31 mmBX_RESET_EN 0 0xed 1 0 2 RESET_ON_VFENABLE_LOW_EN 16 16 mmMM_CFGREGS_CNTL 0 0xee 3 0 2 MM_CFG_FUNC_SEL 0 2 MM_CFG_DEV_SEL 6 7 MM_WR_TO_CFG_EN 31 31 mmBX_RESET_CNTL 0 0xf0 1 0 2 LINK_TRAIN_EN 0 0 mmINTERRUPT_CNTL 0 0xf1 9 0 2 IH_DUMMY_RD_OVERRIDE 0 0 IH_DUMMY_RD_EN 1 1 IH_REQ_NONSNOOP_EN 3 3 IH_INTR_DLY_CNTR 4 7 GEN_IH_INT_EN 8 8 BIF_RB_REQ_NONSNOOP_EN 15 15 DUMMYRD_BYPASS_IN_MSI_EN 16 16 ALWAYS_SEND_INTPKT_AFTER_DUMMYRD_DIS 17 17 BIF_RB_REQ_RELAX_ORDER_EN 18 18 mmINTERRUPT_CNTL2 0 0xf2 1 0 2 IH_DUMMY_RD_ADDR 0 31 mmCLKREQB_PAD_CNTL 0 0xf8 13 0 2 CLKREQB_PAD_A 0 0 CLKREQB_PAD_SEL 1 1 CLKREQB_PAD_MODE 2 2 CLKREQB_PAD_SPARE 3 4 CLKREQB_PAD_SN0 5 5 CLKREQB_PAD_SN1 6 6 CLKREQB_PAD_SN2 7 7 CLKREQB_PAD_SN3 8 8 CLKREQB_PAD_SLEWN 9 9 CLKREQB_PAD_WAKE 10 10 CLKREQB_PAD_SCHMEN 11 11 CLKREQB_PAD_CNTL_EN 12 12 CLKREQB_PAD_Y 13 13 mmBIF_FEATURES_CONTROL_MISC 0 0xfb 11 0 2 MST_BIF_REQ_EP_DIS 0 0 SLV_BIF_CPL_EP_DIS 1 1 BIF_SLV_REQ_EP_DIS 2 2 BIF_MST_CPL_EP_DIS 3 3 BIF_RB_MSI_VEC_NOT_ENABLED_MODE 11 11 BIF_RB_SET_OVERFLOW_EN 12 12 ATOMIC_ERR_INT_DIS 13 13 ATOMIC_ONLY_WRITE_DIS 14 14 BME_HDL_NONVIR_EN 15 15 HDP_NP_OSTD_LIMIT 16 23 DOORBELL_SELFRING_GPA_APER_CHK_48BIT_ADDR 24 24 mmBIF_DOORBELL_CNTL 0 0xfc 9 0 2 SELF_RING_DIS 0 0 TRANS_CHECK_DIS 1 1 UNTRANS_LBACK_EN 2 2 NON_CONSECUTIVE_BE_ZERO_DIS 3 3 DOORBELL_MONITOR_EN 4 4 DB_MNTR_INTGEN_DIS 24 24 DB_MNTR_INTGEN_MODE_0 25 25 DB_MNTR_INTGEN_MODE_1 26 26 DB_MNTR_INTGEN_MODE_2 27 27 mmBIF_DOORBELL_INT_CNTL 0 0xfd 12 0 2 DOORBELL_INTERRUPT_STATUS 0 0 RAS_CNTLR_INTERRUPT_STATUS 1 1 RAS_ATHUB_ERR_EVENT_INTERRUPT_STATUS 2 2 DOORBELL_INTERRUPT_CLEAR 16 16 RAS_CNTLR_INTERRUPT_CLEAR 17 17 RAS_ATHUB_ERR_EVENT_INTERRUPT_CLEAR 18 18 DOORBELL_INTERRUPT_DISABLE 24 24 RAS_CNTLR_INTERRUPT_DISABLE 25 25 RAS_ATHUB_ERR_EVENT_INTERRUPT_DISABLE 26 26 SET_DB_INTR_STATUS_WHEN_RB_ENABLE 28 28 SET_IOH_RAS_INTR_STATUS_WHEN_RB_ENABLE 29 29 SET_ATH_RAS_INTR_STATUS_WHEN_RB_ENABLE 30 30 mmBIF_FB_EN 0 0xff 2 0 2 FB_READ_EN 0 0 FB_WRITE_EN 1 1 mmBIF_INTR_CNTL 0 0x100 1 0 2 RAS_INTR_VEC_SEL 0 0 mmBIF_MST_TRANS_PENDING_VF 0 0x109 1 0 2 BIF_MST_TRANS_PENDING 0 30 mmBIF_SLV_TRANS_PENDING_VF 0 0x10a 1 0 2 BIF_SLV_TRANS_PENDING 0 30 mmBACO_CNTL 0 0x10b 9 0 2 BACO_EN 0 0 BACO_DUMMY_EN 2 2 BACO_POWER_OFF 3 3 BACO_DSTATE_BYPASS 5 5 BACO_RST_INTR_MASK 6 6 BACO_MODE 8 8 RCU_BIF_CONFIG_DONE 9 9 PWRGOOD_VDDSOC 16 16 BACO_AUTO_EXIT 31 31 mmBIF_BACO_EXIT_TIME0 0 0x10c 1 0 2 BACO_EXIT_PXEN_CLR_TIMER 0 19 mmBIF_BACO_EXIT_TIMER1 0 0x10d 7 0 2 BACO_EXIT_SIDEBAND_TIMER 0 19 BACO_HW_AUTO_FLUSH_EN 24 24 BACO_HW_EXIT_DIS 26 26 PX_EN_OE_IN_PX_EN_HIGH 27 27 PX_EN_OE_IN_PX_EN_LOW 28 28 BACO_MODE_SEL 29 30 AUTO_BACO_EXIT_CLR_BY_HW_DIS 31 31 mmBIF_BACO_EXIT_TIMER2 0 0x10e 1 0 2 BACO_EXIT_LCLK_BAK_TIMER 0 19 mmBIF_BACO_EXIT_TIMER3 0 0x10f 1 0 2 BACO_EXIT_DUMMY_EN_CLR_TIMER 0 19 mmBIF_BACO_EXIT_TIMER4 0 0x110 1 0 2 BACO_EXIT_BACO_EN_CLR_TIMER 0 19 mmMEM_TYPE_CNTL 0 0x111 1 0 2 BF_MEM_PHY_G5_G3 0 0 mmNBIF_GFX_ADDR_LUT_CNTL 0 0x113 2 0 2 LUT_ENABLE 0 0 MSI_ADDR_MODE 1 1 mmNBIF_GFX_ADDR_LUT_0 0 0x114 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_1 0 0x115 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_2 0 0x116 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_3 0 0x117 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_4 0 0x118 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_5 0 0x119 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_6 0 0x11a 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_7 0 0x11b 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_8 0 0x11c 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_9 0 0x11d 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_10 0 0x11e 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_11 0 0x11f 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_12 0 0x120 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_13 0 0x121 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_14 0 0x122 1 0 2 ADDR 0 23 mmNBIF_GFX_ADDR_LUT_15 0 0x123 1 0 2 ADDR 0 23 mmREMAP_HDP_MEM_FLUSH_CNTL 0 0x12d 1 0 2 ADDRESS 2 18 mmREMAP_HDP_REG_FLUSH_CNTL 0 0x12e 1 0 2 ADDRESS 2 18 mmBIF_RB_CNTL 0 0x12f 9 0 2 RB_ENABLE 0 0 RB_SIZE 1 5 WPTR_WRITEBACK_ENABLE 8 8 WPTR_WRITEBACK_TIMER 9 13 BIF_RB_TRAN 17 17 RB_INTR_FIX_PRIORITY 26 28 RB_INTR_ARB_MODE 29 29 RB_RST_BY_FLR_DISABLE 30 30 WPTR_OVERFLOW_CLEAR 31 31 mmBIF_RB_BASE 0 0x130 1 0 2 ADDR 0 31 mmBIF_RB_RPTR 0 0x131 1 0 2 OFFSET 2 17 mmBIF_RB_WPTR 0 0x132 2 0 2 BIF_RB_OVERFLOW 0 0 OFFSET 2 17 mmBIF_RB_WPTR_ADDR_HI 0 0x133 1 0 2 ADDR 0 7 mmBIF_RB_WPTR_ADDR_LO 0 0x134 1 0 2 ADDR 2 31 mmMAILBOX_INDEX 0 0x135 1 0 2 MAILBOX_INDEX 0 4 mmBIF_MP1_INTR_CTRL 0 0x142 1 0 2 BACO_EXIT_DONE 0 0 mmBIF_UVD_GPUIOV_CFG_SIZE 0 0x143 1 0 2 UVD_GPUIOV_CFG_SIZE 0 3 mmBIF_VCE_GPUIOV_CFG_SIZE 0 0x144 1 0 2 VCE_GPUIOV_CFG_SIZE 0 3 mmBIF_GFX_SDMA_GPUIOV_CFG_SIZE 0 0x145 1 0 2 GFX_SDMA_GPUIOV_CFG_SIZE 0 3 mmBIF_PERSTB_PAD_CNTL 0 0x148 1 0 2 PERSTB_PAD_CNTL 0 15 mmBIF_PX_EN_PAD_CNTL 0 0x149 1 0 2 PX_EN_PAD_CNTL 0 7 mmBIF_REFPADKIN_PAD_CNTL 0 0x14a 1 0 2 REFPADKIN_PAD_CNTL 0 7 mmBIF_CLKREQB_PAD_CNTL 0 0x14b 1 0 2 CLKREQB_PAD_CNTL 0 23 mmBIF_PWRBRK_PAD_CNTL 0 0x14c 1 0 2 PWRBRK_PAD_CNTL 0 7 mmBIF_WAKEB_PAD_CNTL 0 0x14d 8 0 2 GPIO33_ITXIMPSEL 0 0 GPIO33_ICTFEN 1 1 GPIO33_IPD 2 2 GPIO33_IPU 3 3 GPIO33_IRXEN 4 4 GPIO33_IRXSEL0 5 5 GPIO33_IRXSEL1 6 6 GPIO33_RESERVED 7 7 mmBIF_VAUX_PRESENT_PAD_CNTL 0 0x14e 6 0 2 GPIO_IPD 0 0 GPIO_IPU 1 1 GPIO_IRXEN 2 2 GPIO_IRXSEL0 3 3 GPIO_IRXSEL1 4 4 GPIO_ITXIMPSEL 5 5 mmBIF_BX_PF_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_PF_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_PF_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_PF_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_PF_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_PF_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_PF_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_PF_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_PF_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_PF_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_PF_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_PF_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_PF_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_PF_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_PF_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_PF_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_PF_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_PF_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_PF_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmA2S_CNTL_CL0 0 0x190 13 0 2 NSNOOP_MAP 0 1 REQPASSPW_VC0_MAP 2 3 REQPASSPW_NVC0_MAP 4 5 REQRSPPASSPW_VC0_MAP 6 7 REQRSPPASSPW_NVC0_MAP 8 9 BLKLVL_MAP 10 11 DATERR_MAP 12 13 EXOKAY_WR_MAP 14 15 EXOKAY_RD_MAP 16 17 RESP_WR_MAP 18 19 RESP_RD_MAP 20 21 RDRSP_ERRMAP 22 23 RDRSP_SEL_MODE 24 26 mmA2S_CNTL_CL1 0 0x191 13 0 2 NSNOOP_MAP 0 1 REQPASSPW_VC0_MAP 2 3 REQPASSPW_NVC0_MAP 4 5 REQRSPPASSPW_VC0_MAP 6 7 REQRSPPASSPW_NVC0_MAP 8 9 BLKLVL_MAP 10 11 DATERR_MAP 12 13 EXOKAY_WR_MAP 14 15 EXOKAY_RD_MAP 16 17 RESP_WR_MAP 18 19 RESP_RD_MAP 20 21 RDRSP_ERRMAP 22 23 RDRSP_SEL_MODE 24 26 mmA2S_CNTL3_CL0 0 0x1a0 4 0 2 FORCE_WR_PH 0 1 FORCE_WR_STEERING 2 2 WR_ST_TAG_MODE 3 3 FORCE_WR_ST_ENTRY 4 9 mmA2S_CNTL3_CL1 0 0x1a1 4 0 2 FORCE_WR_PH 0 1 FORCE_WR_STEERING 2 2 WR_ST_TAG_MODE 3 3 FORCE_WR_ST_ENTRY 4 9 mmA2S_CNTL_SW0 0 0x1b0 3 0 2 SDP_WR_CHAIN_DIS 9 9 WRR_RD_WEIGHT 16 23 WRR_WR_WEIGHT 24 31 mmA2S_CNTL_SW1 0 0x1b1 3 0 2 SDP_WR_CHAIN_DIS 9 9 WRR_RD_WEIGHT 16 23 WRR_WR_WEIGHT 24 31 mmA2S_CNTL_SW2 0 0x1b2 3 0 2 SDP_WR_CHAIN_DIS 9 9 WRR_RD_WEIGHT 16 23 WRR_WR_WEIGHT 24 31 mmA2S_CPLBUF_ALLOC_CNTL 0 0x1bc 4 0 2 CPLBUF_RSVD_FOR_VC0_RD 0 3 CPLBUF_RSVD_FOR_VC5_RD 20 23 CPLBUF_RSVD_FOR_VC6_RD 24 27 CPLBUF_RSVD_FOR_VC7_RD 28 31 mmA2S_TAG_ALLOC_0 0 0x1bd 3 0 2 TAG_ALLOC_FOR_VC0_WR 0 7 TAG_ALLOC_FOR_VC0_RD 8 15 TAG_ALLOC_FOR_VC1_WR 16 23 mmA2S_TAG_ALLOC_1 0 0x1be 3 0 2 TAG_ALLOC_FOR_VC3_WR 0 7 TAG_ALLOC_FOR_VC7_WR 16 23 TAG_ALLOC_FOR_VC7_RD 24 31 mmA2S_MISC_CNTL 0 0x1c1 12 0 2 BLKLVL_FOR_MSG 0 1 RESERVE_2_CRED_FOR_NPWR_REQ_DIS 2 2 WRR_ARB_MODE 3 3 FORCE_RSP_REORDER_EN 4 4 RSP_REORDER_DIS 5 5 WRRSP_ACCUM_SEL 6 6 WRRSP_TAGFIFO_CONT_RD_DIS 7 7 RDRSP_TAGFIFO_CONT_RD_DIS 8 8 RDRSP_STS_DATSTS_PRIORITY 9 9 INSERT_RD_ON_2ND_WDAT_EN 10 10 WR_TAG_SET_MIN 16 20 RD_TAG_SET_MIN 21 25 mmNGDC_SDP_PORT_CTRL 0 0x1c2 1 0 2 SDP_DISCON_HYSTERESIS 0 7 mmSHUB_REGS_IF_CTL 0 0x1c3 1 0 2 SHUB_REGS_DROP_NONPF_MMREGREQ_SETERR_DIS 0 0 mmNGDC_MGCG_CTRL 0 0x1ca 7 0 2 NGDC_MGCG_EN 0 0 NGDC_MGCG_MODE 1 1 NGDC_MGCG_HYSTERESIS 2 9 NGDC_MGCG_HST_DIS 10 10 NGDC_MGCG_DMA_DIS 11 11 NGDC_MGCG_REG_DIS 12 12 NGDC_MGCG_AER_DIS 13 13 mmNGDC_RESERVED_0 0 0x1cb 1 0 2 RESERVED 0 31 mmNGDC_RESERVED_1 0 0x1cc 1 0 2 RESERVED 0 31 mmNGDC_SDP_PORT_CTRL_SOCCLK 0 0x1cd 1 0 2 SDP_DISCON_HYSTERESIS_SOCCLK 0 7 mmBIF_SDMA0_DOORBELL_RANGE 0 0x1d0 2 0 2 OFFSET 2 11 SIZE 16 20 mmBIF_SDMA1_DOORBELL_RANGE 0 0x1d1 2 0 2 OFFSET 2 11 SIZE 16 20 mmBIF_IH_DOORBELL_RANGE 0 0x1d2 2 0 2 OFFSET 2 11 SIZE 16 20 mmBIF_MMSCH0_DOORBELL_RANGE 0 0x1d3 2 0 2 OFFSET 2 11 SIZE 16 20 mmBIF_ACV_DOORBELL_RANGE 0 0x1d4 2 0 2 OFFSET 2 11 SIZE 16 20 mmBIF_DOORBELL_FENCE_CNTL 0 0x1de 5 0 2 DOORBELL_FENCE_CP_ENABLE 0 0 DOORBELL_FENCE_SDMA0_ENABLE 1 1 DOORBELL_FENCE_SDMA1_ENABLE 2 2 DOORBELL_FENCE_ACV_ENABLE 3 3 DOORBELL_FENCE_ONCE_TRIGGER_DIS 16 16 mmS2A_MISC_CNTL 0 0x1df 9 0 2 DOORBELL_64BIT_SUPPORT_SDMA0_DIS 0 0 DOORBELL_64BIT_SUPPORT_SDMA1_DIS 1 1 DOORBELL_64BIT_SUPPORT_CP_DIS 2 2 AXI_HST_CPL_EP_DIS 3 3 DOORBELL_64BIT_SUPPORT_ACV_DIS 4 4 ATM_ARB_MODE 8 9 RB_ARB_MODE 10 11 HSTR_ARB_MODE 12 13 WRSP_ARB_MODE 16 19 mmNGDC_PG_MISC_CTRL 0 0x1f0 8 0 2 NGDC_PG_ENDP_D3_ONLY 10 10 NGDC_PG_EARLY_WAKEUP_BY_CLIENT_ACTIVE 11 11 NGDC_PG_EARLY_WAKEUP_BY_CLIENT_DS_EXIT 12 12 NGDC_PG_CLK_PERM 13 13 NGDC_PG_DS_ALLOW_DIS 14 14 NGDC_PG_EARLY_WAKEUP_ALLOW_AER_ACTIVE 15 15 NGDC_CFG_REFCLK_CYCLE_FOR_200NS 24 29 NGDC_CFG_PG_EXIT_OVERRIDE 31 31 mmNGDC_PGMST_CTRL 0 0x1f1 4 0 2 NGDC_CFG_PG_HYSTERESIS 0 7 NGDC_CFG_PG_EN 8 8 NGDC_CFG_IDLENESS_COUNT_EN 10 13 NGDC_CFG_FW_PG_EXIT_EN 14 15 mmNGDC_PGSLV_CTRL 0 0x1f2 3 0 2 NGDC_CFG_SHUBCLK_0_IDLE_HYSTERESIS 0 4 NGDC_CFG_SHUBCLK_1_IDLE_HYSTERESIS 5 9 NGDC_CFG_GDCCLK_IDLE_HYSTERESIS 10 14 mmRCC_DEV0_EPF0_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 cfgPSWUSCFG0_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgPSWUSCFG0_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgPSWUSCFG0_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgPSWUSCFG0_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgPSWUSCFG0_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgPSWUSCFG0_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgPSWUSCFG0_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgPSWUSCFG0_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgPSWUSCFG0_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgPSWUSCFG0_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgPSWUSCFG0_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgPSWUSCFG0_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgPSWUSCFG0_0_SUB_BUS_NUMBER_LATENCY 3 0x18 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 cfgPSWUSCFG0_0_IO_BASE_LIMIT 3 0x1c 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 cfgPSWUSCFG0_0_SECONDARY_STATUS 3 0x1e 9 0 4294967295 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 RECEIVED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgPSWUSCFG0_0_MEM_BASE_LIMIT 3 0x20 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 cfgPSWUSCFG0_0_PREF_BASE_LIMIT 3 0x24 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 cfgPSWUSCFG0_0_PREF_BASE_UPPER 3 0x28 1 0 4294967295 PREF_BASE_UPPER 0 31 cfgPSWUSCFG0_0_PREF_LIMIT_UPPER 3 0x2c 1 0 4294967295 PREF_LIMIT_UPPER 0 31 cfgPSWUSCFG0_0_IO_BASE_LIMIT_HI 3 0x30 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 cfgPSWUSCFG0_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgPSWUSCFG0_0_ROM_BASE_ADDR 3 0x38 1 0 4294967295 BASE_ADDR 0 31 cfgPSWUSCFG0_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgPSWUSCFG0_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgPSWUSCFG0_0_IRQ_BRIDGE_CNTL 3 0x3e 12 0 4294967295 PARITY_RESPONSE_EN 0 0 SERR_EN 1 1 ISA_EN 2 2 VGA_EN 3 3 VGA_DEC 4 4 MASTER_ABORT_MODE 5 5 SECONDARY_BUS_RESET 6 6 FAST_B2B_EN 7 7 PRIMARY_DISCARD_TIMER 8 8 SECONDARY_DISCARD_TIMER 9 9 DISCARD_TIMER_STATUS 10 10 DISCARD_TIMER_SERR_ENABLE 11 11 cfgPSWUSCFG0_0_EXT_BRIDGE_CNTL 3 0x40 1 0 4294967295 IO_PORT_80_EN 0 0 cfgPSWUSCFG0_0_VENDOR_CAP_LIST 3 0x48 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 cfgPSWUSCFG0_0_ADAPTER_ID_W 3 0x4c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgPSWUSCFG0_0_PMI_CAP_LIST 3 0x50 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgPSWUSCFG0_0_PMI_CAP 3 0x52 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgPSWUSCFG0_0_PMI_STATUS_CNTL 3 0x54 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgPSWUSCFG0_0_PCIE_CAP_LIST 3 0x58 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgPSWUSCFG0_0_PCIE_CAP 3 0x5a 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgPSWUSCFG0_0_DEVICE_CAP 3 0x5c 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgPSWUSCFG0_0_DEVICE_CNTL 3 0x60 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 cfgPSWUSCFG0_0_DEVICE_STATUS 3 0x62 6 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 cfgPSWUSCFG0_0_LINK_CAP 3 0x64 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgPSWUSCFG0_0_LINK_CNTL 3 0x68 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgPSWUSCFG0_0_LINK_STATUS 3 0x6a 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgPSWUSCFG0_0_DEVICE_CAP2 3 0x7c 18 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 FRS_SUPPORTED 31 31 cfgPSWUSCFG0_0_DEVICE_CNTL2 3 0x80 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgPSWUSCFG0_0_DEVICE_STATUS2 3 0x82 1 0 4294967295 RESERVED 0 15 cfgPSWUSCFG0_0_LINK_CAP2 3 0x84 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTED 31 31 cfgPSWUSCFG0_0_LINK_CNTL2 3 0x88 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgPSWUSCFG0_0_LINK_STATUS2 3 0x8a 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgPSWUSCFG0_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgPSWUSCFG0_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgPSWUSCFG0_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgPSWUSCFG0_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgPSWUSCFG0_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgPSWUSCFG0_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgPSWUSCFG0_0_SSID_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgPSWUSCFG0_0_SSID_CAP 3 0xc4 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgPSWUSCFG0_0_MSI_MAP_CAP_LIST 3 0xc8 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgPSWUSCFG0_0_MSI_MAP_CAP 3 0xca 3 0 4294967295 EN 0 0 FIXD 1 1 CAP_TYPE 11 15 cfgPSWUSCFG0_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgPSWUSCFG0_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgPSWUSCFG0_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgPSWUSCFG0_0_PCIE_VC_ENH_CAP_LIST 3 0x110 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_PORT_VC_CAP_REG1 3 0x114 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 cfgPSWUSCFG0_0_PCIE_PORT_VC_CAP_REG2 3 0x118 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 cfgPSWUSCFG0_0_PCIE_PORT_VC_CNTL 3 0x11c 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 cfgPSWUSCFG0_0_PCIE_PORT_VC_STATUS 3 0x11e 1 0 4294967295 VC_ARB_TABLE_STATUS 0 0 cfgPSWUSCFG0_0_PCIE_VC0_RESOURCE_CAP 3 0x120 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 22 PORT_ARB_TABLE_OFFSET 24 31 cfgPSWUSCFG0_0_PCIE_VC0_RESOURCE_CNTL 3 0x124 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgPSWUSCFG0_0_PCIE_VC0_RESOURCE_STATUS 3 0x12a 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgPSWUSCFG0_0_PCIE_VC1_RESOURCE_CAP 3 0x12c 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 22 PORT_ARB_TABLE_OFFSET 24 31 cfgPSWUSCFG0_0_PCIE_VC1_RESOURCE_CNTL 3 0x130 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgPSWUSCFG0_0_PCIE_VC1_RESOURCE_STATUS 3 0x136 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgPSWUSCFG0_0_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 3 0x140 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_DEV_SERIAL_NUM_DW1 3 0x144 1 0 4294967295 SERIAL_NUMBER_LO 0 31 cfgPSWUSCFG0_0_PCIE_DEV_SERIAL_NUM_DW2 3 0x148 1 0 4294967295 SERIAL_NUMBER_HI 0 31 cfgPSWUSCFG0_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_UNCORR_ERR_STATUS 3 0x154 17 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 POISONED_TLP_EGRESS_BLOCKED_STATUS 26 26 cfgPSWUSCFG0_0_PCIE_UNCORR_ERR_MASK 3 0x158 17 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 POISONED_TLP_EGRESS_BLOCKED_MASK 26 26 cfgPSWUSCFG0_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 17 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 POISONED_TLP_EGRESS_BLOCKED_SEVERITY 26 26 cfgPSWUSCFG0_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgPSWUSCFG0_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgPSWUSCFG0_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgPSWUSCFG0_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgPSWUSCFG0_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgPSWUSCFG0_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgPSWUSCFG0_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgPSWUSCFG0_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgPSWUSCFG0_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgPSWUSCFG0_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgPSWUSCFG0_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgPSWUSCFG0_0_PCIE_SECONDARY_ENH_CAP_LIST 3 0x270 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_LINK_CNTL3 3 0x274 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 ENABLE_LOWER_SKP_OS_GEN 9 15 cfgPSWUSCFG0_0_PCIE_LANE_ERROR_STATUS 3 0x278 1 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 cfgPSWUSCFG0_0_PCIE_LANE_0_EQUALIZATION_CNTL 3 0x27c 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_1_EQUALIZATION_CNTL 3 0x27e 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_2_EQUALIZATION_CNTL 3 0x280 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_3_EQUALIZATION_CNTL 3 0x282 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_4_EQUALIZATION_CNTL 3 0x284 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_5_EQUALIZATION_CNTL 3 0x286 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_6_EQUALIZATION_CNTL 3 0x288 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_7_EQUALIZATION_CNTL 3 0x28a 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_8_EQUALIZATION_CNTL 3 0x28c 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_9_EQUALIZATION_CNTL 3 0x28e 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_10_EQUALIZATION_CNTL 3 0x290 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_11_EQUALIZATION_CNTL 3 0x292 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_12_EQUALIZATION_CNTL 3 0x294 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_13_EQUALIZATION_CNTL 3 0x296 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_14_EQUALIZATION_CNTL 3 0x298 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_LANE_15_EQUALIZATION_CNTL 3 0x29a 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_0_PCIE_ACS_ENH_CAP_LIST 3 0x2a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_ACS_CAP 3 0x2a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgPSWUSCFG0_0_PCIE_ACS_CNTL 3 0x2a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgPSWUSCFG0_0_PCIE_MC_ENH_CAP_LIST 3 0x2f0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_MC_CAP 3 0x2f4 3 0 4294967295 MC_MAX_GROUP 0 5 MC_WIN_SIZE_REQ 8 13 MC_ECRC_REGEN_SUPP 15 15 cfgPSWUSCFG0_0_PCIE_MC_CNTL 3 0x2f6 2 0 4294967295 MC_NUM_GROUP 0 5 MC_ENABLE 15 15 cfgPSWUSCFG0_0_PCIE_MC_ADDR0 3 0x2f8 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 cfgPSWUSCFG0_0_PCIE_MC_ADDR1 3 0x2fc 1 0 4294967295 MC_BASE_ADDR_1 0 31 cfgPSWUSCFG0_0_PCIE_MC_RCV0 3 0x300 1 0 4294967295 MC_RECEIVE_0 0 31 cfgPSWUSCFG0_0_PCIE_MC_RCV1 3 0x304 1 0 4294967295 MC_RECEIVE_1 0 31 cfgPSWUSCFG0_0_PCIE_MC_BLOCK_ALL0 3 0x308 1 0 4294967295 MC_BLOCK_ALL_0 0 31 cfgPSWUSCFG0_0_PCIE_MC_BLOCK_ALL1 3 0x30c 1 0 4294967295 MC_BLOCK_ALL_1 0 31 cfgPSWUSCFG0_0_PCIE_MC_BLOCK_UNTRANSLATED_0 3 0x310 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 cfgPSWUSCFG0_0_PCIE_MC_BLOCK_UNTRANSLATED_1 3 0x314 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 cfgPSWUSCFG0_0_PCIE_MC_OVERLAY_BAR0 3 0x318 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 cfgPSWUSCFG0_0_PCIE_MC_OVERLAY_BAR1 3 0x31c 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 cfgPSWUSCFG0_0_PCIE_LTR_ENH_CAP_LIST 3 0x320 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_LTR_CAP 3 0x324 4 0 4294967295 LTR_MAX_S_LATENCY_VALUE 0 9 LTR_MAX_S_LATENCY_SCALE 10 12 LTR_MAX_NS_LATENCY_VALUE 16 25 LTR_MAX_NS_LATENCY_SCALE 26 28 cfgPSWUSCFG0_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgPSWUSCFG0_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgPSWUSCFG0_0_PCIE_L1_PM_SUB_CAP_LIST 3 0x370 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_L1_PM_SUB_CAP 3 0x374 8 0 4294967295 PCI_PM_L1_2_SUPPORTED 0 0 PCI_PM_L1_1_SUPPORTED 1 1 ASPM_L1_2_SUPPORTED 2 2 ASPM_L1_1_SUPPORTED 3 3 L1_PM_SUB_SUPPORTED 4 4 PORT_CM_RESTORE_TIME 8 15 PORT_T_POWER_ON_SCALE 16 17 PORT_T_POWER_ON_VALUE 19 23 cfgPSWUSCFG0_0_PCIE_L1_PM_SUB_CNTL 3 0x378 7 0 4294967295 PCI_PM_L1_2_EN 0 0 PCI_PM_L1_1_EN 1 1 ASPM_L1_2_EN 2 2 ASPM_L1_1_EN 3 3 COMMON_MODE_RESTORE_TIME 8 15 LTR_L1_2_THRESHOLD_VALUE 16 25 LTR_L1_2_THRESHOLD_SCALE 29 31 cfgPSWUSCFG0_0_PCIE_L1_PM_SUB_CNTL2 3 0x37c 2 0 4294967295 T_POWER_ON_SCALE 0 1 T_POWER_ON_VALUE 3 7 cfgPSWUSCFG0_0_PCIE_ESM_CAP_LIST 3 0x3c4 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_ESM_HEADER_1 3 0x3c8 3 0 4294967295 ESM_VENDOR_ID 0 15 ESM_CAP_REV 16 19 ESM_CAP_LEN 20 31 cfgPSWUSCFG0_0_PCIE_ESM_HEADER_2 3 0x3cc 1 0 4294967295 CAP_ID 0 15 cfgPSWUSCFG0_0_PCIE_ESM_STATUS 3 0x3ce 2 0 4294967295 MIN_TIME_IN_EI_VAL 0 8 MIN_TIME_IN_EI_SCALE 9 11 cfgPSWUSCFG0_0_PCIE_ESM_CTRL 3 0x3d0 3 0 4294967295 ESM_GEN_3_DATA_RATE 0 6 ESM_GEN_4_DATA_RATE 8 14 ESM_ENABLED 15 15 cfgPSWUSCFG0_0_PCIE_ESM_CAP_1 3 0x3d4 30 0 4294967295 ESM_8P0G 0 0 ESM_8P1G 1 1 ESM_8P2G 2 2 ESM_8P3G 3 3 ESM_8P4G 4 4 ESM_8P5G 5 5 ESM_8P6G 6 6 ESM_8P7G 7 7 ESM_8P8G 8 8 ESM_8P9G 9 9 ESM_9P0G 10 10 ESM_9P1G 11 11 ESM_9P2G 12 12 ESM_9P3G 13 13 ESM_9P4G 14 14 ESM_9P5G 15 15 ESM_9P6G 16 16 ESM_9P7G 17 17 ESM_9P8G 18 18 ESM_9P9G 19 19 ESM_10P0G 20 20 ESM_10P1G 21 21 ESM_10P2G 22 22 ESM_10P3G 23 23 ESM_10P4G 24 24 ESM_10P5G 25 25 ESM_10P6G 26 26 ESM_10P7G 27 27 ESM_10P8G 28 28 ESM_10P9G 29 29 cfgPSWUSCFG0_0_PCIE_ESM_CAP_2 3 0x3d8 30 0 4294967295 ESM_11P0G 0 0 ESM_11P1G 1 1 ESM_11P2G 2 2 ESM_11P3G 3 3 ESM_11P4G 4 4 ESM_11P5G 5 5 ESM_11P6G 6 6 ESM_11P7G 7 7 ESM_11P8G 8 8 ESM_11P9G 9 9 ESM_12P0G 10 10 ESM_12P1G 11 11 ESM_12P2G 12 12 ESM_12P3G 13 13 ESM_12P4G 14 14 ESM_12P5G 15 15 ESM_12P6G 16 16 ESM_12P7G 17 17 ESM_12P8G 18 18 ESM_12P9G 19 19 ESM_13P0G 20 20 ESM_13P1G 21 21 ESM_13P2G 22 22 ESM_13P3G 23 23 ESM_13P4G 24 24 ESM_13P5G 25 25 ESM_13P6G 26 26 ESM_13P7G 27 27 ESM_13P8G 28 28 ESM_13P9G 29 29 cfgPSWUSCFG0_0_PCIE_ESM_CAP_3 3 0x3dc 20 0 4294967295 ESM_14P0G 0 0 ESM_14P1G 1 1 ESM_14P2G 2 2 ESM_14P3G 3 3 ESM_14P4G 4 4 ESM_14P5G 5 5 ESM_14P6G 6 6 ESM_14P7G 7 7 ESM_14P8G 8 8 ESM_14P9G 9 9 ESM_15P0G 10 10 ESM_15P1G 11 11 ESM_15P2G 12 12 ESM_15P3G 13 13 ESM_15P4G 14 14 ESM_15P5G 15 15 ESM_15P6G 16 16 ESM_15P7G 17 17 ESM_15P8G 18 18 ESM_15P9G 19 19 cfgPSWUSCFG0_0_PCIE_ESM_CAP_4 3 0x3e0 30 0 4294967295 ESM_16P0G 0 0 ESM_16P1G 1 1 ESM_16P2G 2 2 ESM_16P3G 3 3 ESM_16P4G 4 4 ESM_16P5G 5 5 ESM_16P6G 6 6 ESM_16P7G 7 7 ESM_16P8G 8 8 ESM_16P9G 9 9 ESM_17P0G 10 10 ESM_17P1G 11 11 ESM_17P2G 12 12 ESM_17P3G 13 13 ESM_17P4G 14 14 ESM_17P5G 15 15 ESM_17P6G 16 16 ESM_17P7G 17 17 ESM_17P8G 18 18 ESM_17P9G 19 19 ESM_18P0G 20 20 ESM_18P1G 21 21 ESM_18P2G 22 22 ESM_18P3G 23 23 ESM_18P4G 24 24 ESM_18P5G 25 25 ESM_18P6G 26 26 ESM_18P7G 27 27 ESM_18P8G 28 28 ESM_18P9G 29 29 cfgPSWUSCFG0_0_PCIE_ESM_CAP_5 3 0x3e4 30 0 4294967295 ESM_19P0G 0 0 ESM_19P1G 1 1 ESM_19P2G 2 2 ESM_19P3G 3 3 ESM_19P4G 4 4 ESM_19P5G 5 5 ESM_19P6G 6 6 ESM_19P7G 7 7 ESM_19P8G 8 8 ESM_19P9G 9 9 ESM_20P0G 10 10 ESM_20P1G 11 11 ESM_20P2G 12 12 ESM_20P3G 13 13 ESM_20P4G 14 14 ESM_20P5G 15 15 ESM_20P6G 16 16 ESM_20P7G 17 17 ESM_20P8G 18 18 ESM_20P9G 19 19 ESM_21P0G 20 20 ESM_21P1G 21 21 ESM_21P2G 22 22 ESM_21P3G 23 23 ESM_21P4G 24 24 ESM_21P5G 25 25 ESM_21P6G 26 26 ESM_21P7G 27 27 ESM_21P8G 28 28 ESM_21P9G 29 29 cfgPSWUSCFG0_0_PCIE_ESM_CAP_6 3 0x3e8 30 0 4294967295 ESM_22P0G 0 0 ESM_22P1G 1 1 ESM_22P2G 2 2 ESM_22P3G 3 3 ESM_22P4G 4 4 ESM_22P5G 5 5 ESM_22P6G 6 6 ESM_22P7G 7 7 ESM_22P8G 8 8 ESM_22P9G 9 9 ESM_23P0G 10 10 ESM_23P1G 11 11 ESM_23P2G 12 12 ESM_23P3G 13 13 ESM_23P4G 14 14 ESM_23P5G 15 15 ESM_23P6G 16 16 ESM_23P7G 17 17 ESM_23P8G 18 18 ESM_23P9G 19 19 ESM_24P0G 20 20 ESM_24P1G 21 21 ESM_24P2G 22 22 ESM_24P3G 23 23 ESM_24P4G 24 24 ESM_24P5G 25 25 ESM_24P6G 26 26 ESM_24P7G 27 27 ESM_24P8G 28 28 ESM_24P9G 29 29 cfgPSWUSCFG0_0_PCIE_ESM_CAP_7 3 0x3ec 31 0 4294967295 ESM_25P0G 0 0 ESM_25P1G 1 1 ESM_25P2G 2 2 ESM_25P3G 3 3 ESM_25P4G 4 4 ESM_25P5G 5 5 ESM_25P6G 6 6 ESM_25P7G 7 7 ESM_25P8G 8 8 ESM_25P9G 9 9 ESM_26P0G 10 10 ESM_26P1G 11 11 ESM_26P2G 12 12 ESM_26P3G 13 13 ESM_26P4G 14 14 ESM_26P5G 15 15 ESM_26P6G 16 16 ESM_26P7G 17 17 ESM_26P8G 18 18 ESM_26P9G 19 19 ESM_27P0G 20 20 ESM_27P1G 21 21 ESM_27P2G 22 22 ESM_27P3G 23 23 ESM_27P4G 24 24 ESM_27P5G 25 25 ESM_27P6G 26 26 ESM_27P7G 27 27 ESM_27P8G 28 28 ESM_27P9G 29 29 ESM_28P0G 30 30 cfgPSWUSCFG0_0_PCIE_DLF_ENH_CAP_LIST 3 0x400 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_DATA_LINK_FEATURE_CAP 3 0x404 3 0 4294967295 LOCAL_DLF_SCALED_FLOW_CONTROL_SUPPORTED 0 0 LOCAL_DLF_SUPPORTED_22_1 1 22 DLF_EXCHANGE_ENABLE 31 31 cfgPSWUSCFG0_0_DATA_LINK_FEATURE_STATUS 3 0x408 2 0 4294967295 REMOTE_DLF_SUPPORTED 0 22 REMOTE_DLF_SUPPORTED_VALID 31 31 cfgPSWUSCFG0_0_PCIE_PHY_16GT_ENH_CAP_LIST 3 0x410 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_LINK_CAP_16GT 3 0x414 1 0 4294967295 RESERVED 0 31 cfgPSWUSCFG0_0_LINK_CNTL_16GT 3 0x418 1 0 4294967295 RESERVED 0 31 cfgPSWUSCFG0_0_LINK_STATUS_16GT 3 0x41c 5 0 4294967295 EQUALIZATION_COMPLETE_16GT 0 0 EQUALIZATION_PHASE1_SUCCESS_16GT 1 1 EQUALIZATION_PHASE2_SUCCESS_16GT 2 2 EQUALIZATION_PHASE3_SUCCESS_16GT 3 3 LINK_EQUALIZATION_REQUEST_16GT 4 4 cfgPSWUSCFG0_0_LOCAL_PARITY_MISMATCH_STATUS_16GT 3 0x420 1 0 4294967295 LOCAL_PARITY_MISMATCH_STATUS_BITS 0 15 cfgPSWUSCFG0_0_RTM1_PARITY_MISMATCH_STATUS_16GT 3 0x424 1 0 4294967295 RTM1_PARITY_MISMATCH_STATUS_BITS 0 15 cfgPSWUSCFG0_0_RTM2_PARITY_MISMATCH_STATUS_16GT 3 0x428 1 0 4294967295 RTM2_PARITY_MISMATCH_STATUS_BITS 0 15 cfgPSWUSCFG0_0_LANE_0_EQUALIZATION_CNTL_16GT 3 0x430 2 0 4294967295 LANE_0_DSP_16GT_TX_PRESET 0 3 LANE_0_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_1_EQUALIZATION_CNTL_16GT 3 0x431 2 0 4294967295 LANE_1_DSP_16GT_TX_PRESET 0 3 LANE_1_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_2_EQUALIZATION_CNTL_16GT 3 0x432 2 0 4294967295 LANE_2_DSP_16GT_TX_PRESET 0 3 LANE_2_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_3_EQUALIZATION_CNTL_16GT 3 0x433 2 0 4294967295 LANE_3_DSP_16GT_TX_PRESET 0 3 LANE_3_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_4_EQUALIZATION_CNTL_16GT 3 0x434 2 0 4294967295 LANE_4_DSP_16GT_TX_PRESET 0 3 LANE_4_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_5_EQUALIZATION_CNTL_16GT 3 0x435 2 0 4294967295 LANE_5_DSP_16GT_TX_PRESET 0 3 LANE_5_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_6_EQUALIZATION_CNTL_16GT 3 0x436 2 0 4294967295 LANE_6_DSP_16GT_TX_PRESET 0 3 LANE_6_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_7_EQUALIZATION_CNTL_16GT 3 0x437 2 0 4294967295 LANE_7_DSP_16GT_TX_PRESET 0 3 LANE_7_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_8_EQUALIZATION_CNTL_16GT 3 0x438 2 0 4294967295 LANE_8_DSP_16GT_TX_PRESET 0 3 LANE_8_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_9_EQUALIZATION_CNTL_16GT 3 0x439 2 0 4294967295 LANE_9_DSP_16GT_TX_PRESET 0 3 LANE_9_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_10_EQUALIZATION_CNTL_16GT 3 0x43a 2 0 4294967295 LANE_10_DSP_16GT_TX_PRESET 0 3 LANE_10_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_11_EQUALIZATION_CNTL_16GT 3 0x43b 2 0 4294967295 LANE_11_DSP_16GT_TX_PRESET 0 3 LANE_11_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_12_EQUALIZATION_CNTL_16GT 3 0x43c 2 0 4294967295 LANE_12_DSP_16GT_TX_PRESET 0 3 LANE_12_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_13_EQUALIZATION_CNTL_16GT 3 0x43d 2 0 4294967295 LANE_13_DSP_16GT_TX_PRESET 0 3 LANE_13_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_14_EQUALIZATION_CNTL_16GT 3 0x43e 2 0 4294967295 LANE_14_DSP_16GT_TX_PRESET 0 3 LANE_14_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_LANE_15_EQUALIZATION_CNTL_16GT 3 0x43f 2 0 4294967295 LANE_15_DSP_16GT_TX_PRESET 0 3 LANE_15_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_PCIE_MARGINING_ENH_CAP_LIST 3 0x440 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_MARGINING_PORT_CAP 3 0x444 1 0 4294967295 MARGINING_USES_SOFTWARE 0 0 cfgPSWUSCFG0_0_MARGINING_PORT_STATUS 3 0x446 2 0 4294967295 MARGINING_READY 0 0 MARGINING_SOFTWARE_READY 1 1 cfgPSWUSCFG0_0_LANE_0_MARGINING_LANE_CNTL 3 0x448 4 0 4294967295 LANE_0_RECEIVER_NUMBER 0 2 LANE_0_MARGIN_TYPE 3 5 LANE_0_USAGE_MODEL 6 6 LANE_0_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_0_MARGINING_LANE_STATUS 3 0x44a 4 0 4294967295 LANE_0_RECEIVER_NUMBER_STATUS 0 2 LANE_0_MARGIN_TYPE_STATUS 3 5 LANE_0_USAGE_MODEL_STATUS 6 6 LANE_0_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_1_MARGINING_LANE_CNTL 3 0x44c 4 0 4294967295 LANE_1_RECEIVER_NUMBER 0 2 LANE_1_MARGIN_TYPE 3 5 LANE_1_USAGE_MODEL 6 6 LANE_1_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_1_MARGINING_LANE_STATUS 3 0x44e 4 0 4294967295 LANE_1_RECEIVER_NUMBER_STATUS 0 2 LANE_1_MARGIN_TYPE_STATUS 3 5 LANE_1_USAGE_MODEL_STATUS 6 6 LANE_1_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_2_MARGINING_LANE_CNTL 3 0x450 4 0 4294967295 LANE_2_RECEIVER_NUMBER 0 2 LANE_2_MARGIN_TYPE 3 5 LANE_2_USAGE_MODEL 6 6 LANE_2_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_2_MARGINING_LANE_STATUS 3 0x452 4 0 4294967295 LANE_2_RECEIVER_NUMBER_STATUS 0 2 LANE_2_MARGIN_TYPE_STATUS 3 5 LANE_2_USAGE_MODEL_STATUS 6 6 LANE_2_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_3_MARGINING_LANE_CNTL 3 0x454 4 0 4294967295 LANE_3_RECEIVER_NUMBER 0 2 LANE_3_MARGIN_TYPE 3 5 LANE_3_USAGE_MODEL 6 6 LANE_3_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_3_MARGINING_LANE_STATUS 3 0x456 4 0 4294967295 LANE_3_RECEIVER_NUMBER_STATUS 0 2 LANE_3_MARGIN_TYPE_STATUS 3 5 LANE_3_USAGE_MODEL_STATUS 6 6 LANE_3_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_4_MARGINING_LANE_CNTL 3 0x458 4 0 4294967295 LANE_4_RECEIVER_NUMBER 0 2 LANE_4_MARGIN_TYPE 3 5 LANE_4_USAGE_MODEL 6 6 LANE_4_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_4_MARGINING_LANE_STATUS 3 0x45a 4 0 4294967295 LANE_4_RECEIVER_NUMBER_STATUS 0 2 LANE_4_MARGIN_TYPE_STATUS 3 5 LANE_4_USAGE_MODEL_STATUS 6 6 LANE_4_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_5_MARGINING_LANE_CNTL 3 0x45c 4 0 4294967295 LANE_5_RECEIVER_NUMBER 0 2 LANE_5_MARGIN_TYPE 3 5 LANE_5_USAGE_MODEL 6 6 LANE_5_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_5_MARGINING_LANE_STATUS 3 0x45e 4 0 4294967295 LANE_5_RECEIVER_NUMBER_STATUS 0 2 LANE_5_MARGIN_TYPE_STATUS 3 5 LANE_5_USAGE_MODEL_STATUS 6 6 LANE_5_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_6_MARGINING_LANE_CNTL 3 0x460 4 0 4294967295 LANE_6_RECEIVER_NUMBER 0 2 LANE_6_MARGIN_TYPE 3 5 LANE_6_USAGE_MODEL 6 6 LANE_6_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_6_MARGINING_LANE_STATUS 3 0x462 4 0 4294967295 LANE_6_RECEIVER_NUMBER_STATUS 0 2 LANE_6_MARGIN_TYPE_STATUS 3 5 LANE_6_USAGE_MODEL_STATUS 6 6 LANE_6_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_7_MARGINING_LANE_CNTL 3 0x464 4 0 4294967295 LANE_7_RECEIVER_NUMBER 0 2 LANE_7_MARGIN_TYPE 3 5 LANE_7_USAGE_MODEL 6 6 LANE_7_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_7_MARGINING_LANE_STATUS 3 0x466 4 0 4294967295 LANE_7_RECEIVER_NUMBER_STATUS 0 2 LANE_7_MARGIN_TYPE_STATUS 3 5 LANE_7_USAGE_MODEL_STATUS 6 6 LANE_7_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_8_MARGINING_LANE_CNTL 3 0x468 4 0 4294967295 LANE_8_RECEIVER_NUMBER 0 2 LANE_8_MARGIN_TYPE 3 5 LANE_8_USAGE_MODEL 6 6 LANE_8_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_8_MARGINING_LANE_STATUS 3 0x46a 4 0 4294967295 LANE_8_RECEIVER_NUMBER_STATUS 0 2 LANE_8_MARGIN_TYPE_STATUS 3 5 LANE_8_USAGE_MODEL_STATUS 6 6 LANE_8_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_9_MARGINING_LANE_CNTL 3 0x46c 4 0 4294967295 LANE_9_RECEIVER_NUMBER 0 2 LANE_9_MARGIN_TYPE 3 5 LANE_9_USAGE_MODEL 6 6 LANE_9_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_9_MARGINING_LANE_STATUS 3 0x46e 4 0 4294967295 LANE_9_RECEIVER_NUMBER_STATUS 0 2 LANE_9_MARGIN_TYPE_STATUS 3 5 LANE_9_USAGE_MODEL_STATUS 6 6 LANE_9_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_10_MARGINING_LANE_CNTL 3 0x470 4 0 4294967295 LANE_10_RECEIVER_NUMBER 0 2 LANE_10_MARGIN_TYPE 3 5 LANE_10_USAGE_MODEL 6 6 LANE_10_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_10_MARGINING_LANE_STATUS 3 0x472 4 0 4294967295 LANE_10_RECEIVER_NUMBER_STATUS 0 2 LANE_10_MARGIN_TYPE_STATUS 3 5 LANE_10_USAGE_MODEL_STATUS 6 6 LANE_10_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_11_MARGINING_LANE_CNTL 3 0x474 4 0 4294967295 LANE_11_RECEIVER_NUMBER 0 2 LANE_11_MARGIN_TYPE 3 5 LANE_11_USAGE_MODEL 6 6 LANE_11_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_11_MARGINING_LANE_STATUS 3 0x476 4 0 4294967295 LANE_11_RECEIVER_NUMBER_STATUS 0 2 LANE_11_MARGIN_TYPE_STATUS 3 5 LANE_11_USAGE_MODEL_STATUS 6 6 LANE_11_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_12_MARGINING_LANE_CNTL 3 0x478 4 0 4294967295 LANE_12_RECEIVER_NUMBER 0 2 LANE_12_MARGIN_TYPE 3 5 LANE_12_USAGE_MODEL 6 6 LANE_12_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_12_MARGINING_LANE_STATUS 3 0x47a 4 0 4294967295 LANE_12_RECEIVER_NUMBER_STATUS 0 2 LANE_12_MARGIN_TYPE_STATUS 3 5 LANE_12_USAGE_MODEL_STATUS 6 6 LANE_12_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_13_MARGINING_LANE_CNTL 3 0x47c 4 0 4294967295 LANE_13_RECEIVER_NUMBER 0 2 LANE_13_MARGIN_TYPE 3 5 LANE_13_USAGE_MODEL 6 6 LANE_13_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_13_MARGINING_LANE_STATUS 3 0x47e 4 0 4294967295 LANE_13_RECEIVER_NUMBER_STATUS 0 2 LANE_13_MARGIN_TYPE_STATUS 3 5 LANE_13_USAGE_MODEL_STATUS 6 6 LANE_13_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_14_MARGINING_LANE_CNTL 3 0x480 4 0 4294967295 LANE_14_RECEIVER_NUMBER 0 2 LANE_14_MARGIN_TYPE 3 5 LANE_14_USAGE_MODEL 6 6 LANE_14_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_14_MARGINING_LANE_STATUS 3 0x482 4 0 4294967295 LANE_14_RECEIVER_NUMBER_STATUS 0 2 LANE_14_MARGIN_TYPE_STATUS 3 5 LANE_14_USAGE_MODEL_STATUS 6 6 LANE_14_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_LANE_15_MARGINING_LANE_CNTL 3 0x484 4 0 4294967295 LANE_15_RECEIVER_NUMBER 0 2 LANE_15_MARGIN_TYPE 3 5 LANE_15_USAGE_MODEL 6 6 LANE_15_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_0_LANE_15_MARGINING_LANE_STATUS 3 0x486 4 0 4294967295 LANE_15_RECEIVER_NUMBER_STATUS 0 2 LANE_15_MARGIN_TYPE_STATUS 3 5 LANE_15_USAGE_MODEL_STATUS 6 6 LANE_15_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_0_PCIE_CCIX_CAP_LIST 3 0x488 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_0_PCIE_CCIX_HEADER_1 3 0x48c 3 0 4294967295 CCIX_VENDOR_ID 0 15 CCIX_CAP_REV 16 19 CCIX_CAP_LEN 20 31 cfgPSWUSCFG0_0_PCIE_CCIX_HEADER_2 3 0x490 1 0 4294967295 CAP_ID 0 15 cfgPSWUSCFG0_0_PCIE_CCIX_CAP 3 0x492 5 0 4294967295 ESM_MODE_SUPPORTED 0 0 ESM_PHY_REACH_LENGTH_CAPABILITY 1 2 ESM_RECALIBRATION_NEEDED_ON_ESM_DATA_RATE_UPDATE 3 3 ESM_CALIBRATION_TIME 4 6 ESM_QUICK_EQUALIZATION_TIMEOUT 8 10 cfgPSWUSCFG0_0_PCIE_CCIX_ESM_REQD_CAP 3 0x494 6 0 4294967295 ESM_SUPPORT_2P5GT 0 0 ESM_SUPPORT_5GT 1 1 ESM_SUPPORT_8GT 2 2 ESM_SUPPORT_16GT 5 5 ESM_SUPPORT_20GT 9 9 ESM_SUPPORT_25GT 14 14 cfgPSWUSCFG0_0_PCIE_CCIX_ESM_OPTL_CAP 3 0x498 1 0 4294967295 RESERVED 0 31 cfgPSWUSCFG0_0_PCIE_CCIX_ESM_STATUS 3 0x49c 2 0 4294967295 ESM_CURRENT_DATA_RATE 0 6 ESM_CALIBRATION_COMPLETE 7 7 cfgPSWUSCFG0_0_PCIE_CCIX_ESM_CNTL 3 0x4a0 9 0 4294967295 ESM_DATA_RATE0 0 6 ESM_PERFORM_CALIBRATION 7 7 ESM_DATA_RATE1 8 14 ESM_ENABLE 15 15 ESM_EXTENDED_EQUALIZATION_PHASE2_TIMEOUT 16 18 ESM_EXTENDED_EQUALIZATION_PHASE3_TIMEOUT 20 22 LINK_REACH_TARGET 24 24 RETIMER_PRESENT 25 25 ESM_QUICK_EQUALIZATION_TIMEOUT_SELECT 26 28 cfgPSWUSCFG0_0_ESM_LANE_0_EQUALIZATION_CNTL_20GT 3 0x4a4 2 0 4294967295 ESM_LANE_0_DSP_20GT_TX_PRESET 0 3 ESM_LANE_0_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_1_EQUALIZATION_CNTL_20GT 3 0x4a5 2 0 4294967295 ESM_LANE_1_DSP_20GT_TX_PRESET 0 3 ESM_LANE_1_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_2_EQUALIZATION_CNTL_20GT 3 0x4a6 2 0 4294967295 ESM_LANE_2_DSP_20GT_TX_PRESET 0 3 ESM_LANE_2_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_3_EQUALIZATION_CNTL_20GT 3 0x4a7 2 0 4294967295 ESM_LANE_3_DSP_20GT_TX_PRESET 0 3 ESM_LANE_3_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_4_EQUALIZATION_CNTL_20GT 3 0x4a8 2 0 4294967295 ESM_LANE_4_DSP_20GT_TX_PRESET 0 3 ESM_LANE_4_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_5_EQUALIZATION_CNTL_20GT 3 0x4a9 2 0 4294967295 ESM_LANE_5_DSP_20GT_TX_PRESET 0 3 ESM_LANE_5_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_6_EQUALIZATION_CNTL_20GT 3 0x4aa 2 0 4294967295 ESM_LANE_6_DSP_20GT_TX_PRESET 0 3 ESM_LANE_6_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_7_EQUALIZATION_CNTL_20GT 3 0x4ab 2 0 4294967295 ESM_LANE_7_DSP_20GT_TX_PRESET 0 3 ESM_LANE_7_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_8_EQUALIZATION_CNTL_20GT 3 0x4ac 2 0 4294967295 ESM_LANE_8_DSP_20GT_TX_PRESET 0 3 ESM_LANE_8_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_9_EQUALIZATION_CNTL_20GT 3 0x4ad 2 0 4294967295 ESM_LANE_9_DSP_20GT_TX_PRESET 0 3 ESM_LANE_9_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_10_EQUALIZATION_CNTL_20GT 3 0x4ae 2 0 4294967295 ESM_LANE_10_DSP_20GT_TX_PRESET 0 3 ESM_LANE_10_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_11_EQUALIZATION_CNTL_20GT 3 0x4af 2 0 4294967295 ESM_LANE_11_DSP_20GT_TX_PRESET 0 3 ESM_LANE_11_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_12_EQUALIZATION_CNTL_20GT 3 0x4b0 2 0 4294967295 ESM_LANE_12_DSP_20GT_TX_PRESET 0 3 ESM_LANE_12_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_13_EQUALIZATION_CNTL_20GT 3 0x4b1 2 0 4294967295 ESM_LANE_13_DSP_20GT_TX_PRESET 0 3 ESM_LANE_13_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_14_EQUALIZATION_CNTL_20GT 3 0x4b2 2 0 4294967295 ESM_LANE_14_DSP_20GT_TX_PRESET 0 3 ESM_LANE_14_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_15_EQUALIZATION_CNTL_20GT 3 0x4b3 2 0 4294967295 ESM_LANE_15_DSP_20GT_TX_PRESET 0 3 ESM_LANE_15_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_0_EQUALIZATION_CNTL_25GT 3 0x4b4 2 0 4294967295 ESM_LANE_0_DSP_25GT_TX_PRESET 0 3 ESM_LANE_0_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_1_EQUALIZATION_CNTL_25GT 3 0x4b5 2 0 4294967295 ESM_LANE_1_DSP_25GT_TX_PRESET 0 3 ESM_LANE_1_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_2_EQUALIZATION_CNTL_25GT 3 0x4b6 2 0 4294967295 ESM_LANE_2_DSP_25GT_TX_PRESET 0 3 ESM_LANE_2_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_3_EQUALIZATION_CNTL_25GT 3 0x4b7 2 0 4294967295 ESM_LANE_3_DSP_25GT_TX_PRESET 0 3 ESM_LANE_3_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_4_EQUALIZATION_CNTL_25GT 3 0x4b8 2 0 4294967295 ESM_LANE_4_DSP_25GT_TX_PRESET 0 3 ESM_LANE_4_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_5_EQUALIZATION_CNTL_25GT 3 0x4b9 2 0 4294967295 ESM_LANE_5_DSP_25GT_TX_PRESET 0 3 ESM_LANE_5_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_6_EQUALIZATION_CNTL_25GT 3 0x4ba 2 0 4294967295 ESM_LANE_6_DSP_25GT_TX_PRESET 0 3 ESM_LANE_6_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_7_EQUALIZATION_CNTL_25GT 3 0x4bb 2 0 4294967295 ESM_LANE_7_DSP_25GT_TX_PRESET 0 3 ESM_LANE_7_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_8_EQUALIZATION_CNTL_25GT 3 0x4bc 2 0 4294967295 ESM_LANE_8_DSP_25GT_TX_PRESET 0 3 ESM_LANE_8_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_9_EQUALIZATION_CNTL_25GT 3 0x4bd 2 0 4294967295 ESM_LANE_9_DSP_25GT_TX_PRESET 0 3 ESM_LANE_9_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_10_EQUALIZATION_CNTL_25GT 3 0x4be 2 0 4294967295 ESM_LANE_10_DSP_25GT_TX_PRESET 0 3 ESM_LANE_10_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_11_EQUALIZATION_CNTL_25GT 3 0x4bf 2 0 4294967295 ESM_LANE_11_DSP_25GT_TX_PRESET 0 3 ESM_LANE_11_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_12_EQUALIZATION_CNTL_25GT 3 0x4c0 2 0 4294967295 ESM_LANE_12_DSP_25GT_TX_PRESET 0 3 ESM_LANE_12_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_13_EQUALIZATION_CNTL_25GT 3 0x4c1 2 0 4294967295 ESM_LANE_13_DSP_25GT_TX_PRESET 0 3 ESM_LANE_13_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_14_EQUALIZATION_CNTL_25GT 3 0x4c2 2 0 4294967295 ESM_LANE_14_DSP_25GT_TX_PRESET 0 3 ESM_LANE_14_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_ESM_LANE_15_EQUALIZATION_CNTL_25GT 3 0x4c3 2 0 4294967295 ESM_LANE_15_DSP_25GT_TX_PRESET 0 3 ESM_LANE_15_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_0_PCIE_CCIX_TRANS_CAP 3 0x4c4 1 0 4294967295 CCIX_OPTIMIZED_TLP_FORMAT_SUPPORT 0 0 cfgPSWUSCFG0_0_PCIE_CCIX_TRANS_CNTL 3 0x4c8 2 0 4294967295 CCIX_OPTIMIZED_TLP_FORMAT_ENABLE 0 0 CCIX_PCIE_COMPATIBLE_TLP_ENABLE 1 1 cfgBIF_CFG_DEV0_EPF0_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_0_VENDOR_CAP_LIST 3 0x48 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 cfgBIF_CFG_DEV0_EPF0_0_ADAPTER_ID_W 3 0x4c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_0_PMI_CAP_LIST 3 0x50 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_0_PMI_CAP 3 0x52 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgBIF_CFG_DEV0_EPF0_0_PMI_STATUS_CNTL 3 0x54 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VC_ENH_CAP_LIST 3 0x110 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PORT_VC_CAP_REG1 3 0x114 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PORT_VC_CAP_REG2 3 0x118 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PORT_VC_CNTL 3 0x11c 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PORT_VC_STATUS 3 0x11e 1 0 4294967295 VC_ARB_TABLE_STATUS 0 0 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VC0_RESOURCE_CAP 3 0x120 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VC0_RESOURCE_CNTL 3 0x124 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VC0_RESOURCE_STATUS 3 0x12a 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VC1_RESOURCE_CAP 3 0x12c 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VC1_RESOURCE_CNTL 3 0x130 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VC1_RESOURCE_STATUS 3 0x136 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 3 0x140 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DEV_SERIAL_NUM_DW1 3 0x144 1 0 4294967295 SERIAL_NUMBER_LO 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DEV_SERIAL_NUM_DW2 3 0x148 1 0 4294967295 SERIAL_NUMBER_HI 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR_ENH_CAP_LIST 3 0x200 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR1_CAP 3 0x204 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR1_CNTL 3 0x208 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR2_CAP 3 0x20c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR2_CNTL 3 0x210 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR3_CAP 3 0x214 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR3_CNTL 3 0x218 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR4_CAP 3 0x21c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR4_CNTL 3 0x220 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR5_CAP 3 0x224 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR5_CNTL 3 0x228 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR6_CAP 3 0x22c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_BAR6_CNTL 3 0x230 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PWR_BUDGET_ENH_CAP_LIST 3 0x240 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PWR_BUDGET_DATA_SELECT 3 0x244 1 0 4294967295 DATA_SELECT 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PWR_BUDGET_DATA 3 0x248 6 0 4294967295 BASE_POWER 0 7 DATA_SCALE 8 9 PM_SUB_STATE 10 12 PM_STATE 13 14 TYPE 15 17 POWER_RAIL 18 20 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PWR_BUDGET_CAP 3 0x24c 1 0 4294967295 SYSTEM_ALLOCATED 0 0 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_ENH_CAP_LIST 3 0x250 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_CAP 3 0x254 5 0 4294967295 SUBSTATE_MAX 0 4 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_LATENCY_INDICATOR 3 0x258 1 0 4294967295 TRANS_LAT_INDICATOR_BITS 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_STATUS 3 0x25c 2 0 4294967295 SUBSTATE_STATUS 0 4 SUBSTATE_CNTL_ENABLED 8 8 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_CNTL 3 0x25e 1 0 4294967295 SUBSTATE_CNTL 0 4 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_0 3 0x260 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_1 3 0x261 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_2 3 0x262 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_3 3 0x263 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_4 3 0x264 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_5 3 0x265 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_6 3 0x266 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_7 3 0x267 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SECONDARY_ENH_CAP_LIST 3 0x270 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LINK_CNTL3 3 0x274 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 ENABLE_LOWER_SKP_OS_GEN 9 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_ERROR_STATUS 3 0x278 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_0_EQUALIZATION_CNTL 3 0x27c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_1_EQUALIZATION_CNTL 3 0x27e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_2_EQUALIZATION_CNTL 3 0x280 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_3_EQUALIZATION_CNTL 3 0x282 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_4_EQUALIZATION_CNTL 3 0x284 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_5_EQUALIZATION_CNTL 3 0x286 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_6_EQUALIZATION_CNTL 3 0x288 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_7_EQUALIZATION_CNTL 3 0x28a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_8_EQUALIZATION_CNTL 3 0x28c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_9_EQUALIZATION_CNTL 3 0x28e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_10_EQUALIZATION_CNTL 3 0x290 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_11_EQUALIZATION_CNTL 3 0x292 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_12_EQUALIZATION_CNTL 3 0x294 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_13_EQUALIZATION_CNTL 3 0x296 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_14_EQUALIZATION_CNTL 3 0x298 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LANE_15_EQUALIZATION_CNTL 3 0x29a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ACS_ENH_CAP_LIST 3 0x2a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ACS_CAP 3 0x2a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ACS_CNTL 3 0x2a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PAGE_REQ_ENH_CAP_LIST 3 0x2c0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PAGE_REQ_CNTL 3 0x2c4 2 0 4294967295 PRI_ENABLE 0 0 PRI_RESET 1 1 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PAGE_REQ_STATUS 3 0x2c6 4 0 4294967295 RESPONSE_FAILURE 0 0 UNEXPECTED_PAGE_REQ_GRP_INDEX 1 1 STOPPED 8 8 PRG_RESPONSE_PASID_REQUIRED 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_OUTSTAND_PAGE_REQ_CAPACITY 3 0x2c8 1 0 4294967295 OUTSTAND_PAGE_REQ_CAPACITY 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_OUTSTAND_PAGE_REQ_ALLOC 3 0x2cc 1 0 4294967295 OUTSTAND_PAGE_REQ_ALLOC 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PASID_ENH_CAP_LIST 3 0x2d0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PASID_CAP 3 0x2d4 3 0 4294967295 PASID_EXE_PERMISSION_SUPPORTED 1 1 PASID_PRIV_MODE_SUPPORTED 2 2 MAX_PASID_WIDTH 8 12 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PASID_CNTL 3 0x2d6 3 0 4294967295 PASID_ENABLE 0 0 PASID_EXE_PERMISSION_ENABLE 1 1 PASID_PRIV_MODE_SUPPORTED_ENABLE 2 2 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_ENH_CAP_LIST 3 0x2f0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_CAP 3 0x2f4 3 0 4294967295 MC_MAX_GROUP 0 5 MC_WIN_SIZE_REQ 8 13 MC_ECRC_REGEN_SUPP 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_CNTL 3 0x2f6 2 0 4294967295 MC_NUM_GROUP 0 5 MC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_ADDR0 3 0x2f8 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_ADDR1 3 0x2fc 1 0 4294967295 MC_BASE_ADDR_1 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_RCV0 3 0x300 1 0 4294967295 MC_RECEIVE_0 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_RCV1 3 0x304 1 0 4294967295 MC_RECEIVE_1 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_BLOCK_ALL0 3 0x308 1 0 4294967295 MC_BLOCK_ALL_0 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_BLOCK_ALL1 3 0x30c 1 0 4294967295 MC_BLOCK_ALL_1 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_BLOCK_UNTRANSLATED_0 3 0x310 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MC_BLOCK_UNTRANSLATED_1 3 0x314 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LTR_ENH_CAP_LIST 3 0x320 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_LTR_CAP 3 0x324 4 0 4294967295 LTR_MAX_S_LATENCY_VALUE 0 9 LTR_MAX_S_LATENCY_SCALE 10 12 LTR_MAX_NS_LATENCY_VALUE 16 25 LTR_MAX_NS_LATENCY_SCALE 26 28 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_ENH_CAP_LIST 3 0x330 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_CAP 3 0x334 4 0 4294967295 SRIOV_VF_MIGRATION_CAP 0 0 SRIOV_ARI_CAP_HIERARCHY_PRESERVED 1 1 SRIOV_VF_TEN_BIT_TAG_REQUESTER_SUPPORTED 2 2 SRIOV_VF_MIGRATION_INTR_MSG_NUM 21 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_CONTROL 3 0x338 6 0 4294967295 SRIOV_VF_ENABLE 0 0 SRIOV_VF_MIGRATION_ENABLE 1 1 SRIOV_VF_MIGRATION_INTR_ENABLE 2 2 SRIOV_VF_MSE 3 3 SRIOV_ARI_CAP_HIERARCHY 4 4 SRIOV_VF_TEN_BIT_TAG_REQUESTER_ENABLE 5 5 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_STATUS 3 0x33a 1 0 4294967295 SRIOV_VF_MIGRATION_STATUS 0 0 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_INITIAL_VFS 3 0x33c 1 0 4294967295 SRIOV_INITIAL_VFS 0 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_TOTAL_VFS 3 0x33e 1 0 4294967295 SRIOV_TOTAL_VFS 0 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_NUM_VFS 3 0x340 1 0 4294967295 SRIOV_NUM_VFS 0 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_FUNC_DEP_LINK 3 0x342 1 0 4294967295 SRIOV_FUNC_DEP_LINK 0 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_FIRST_VF_OFFSET 3 0x344 1 0 4294967295 SRIOV_FIRST_VF_OFFSET 0 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_VF_STRIDE 3 0x346 1 0 4294967295 SRIOV_VF_STRIDE 0 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_VF_DEVICE_ID 3 0x34a 1 0 4294967295 SRIOV_VF_DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_SUPPORTED_PAGE_SIZE 3 0x34c 1 0 4294967295 SRIOV_SUPPORTED_PAGE_SIZE 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_SYSTEM_PAGE_SIZE 3 0x350 1 0 4294967295 SRIOV_SYSTEM_PAGE_SIZE 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_VF_BASE_ADDR_0 3 0x354 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_VF_BASE_ADDR_1 3 0x358 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_VF_BASE_ADDR_2 3 0x35c 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_VF_BASE_ADDR_3 3 0x360 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_VF_BASE_ADDR_4 3 0x364 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_VF_BASE_ADDR_5 3 0x368 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_SRIOV_VF_MIGRATION_STATE_ARRAY_OFFSET 3 0x36c 2 0 4294967295 SRIOV_VF_MIGRATION_STATE_BIR 0 2 SRIOV_VF_MIGRATION_STATE_ARRAY_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_TPH_REQR_ENH_CAP_LIST 3 0x370 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_TPH_REQR_CAP 3 0x374 6 0 4294967295 TPH_REQR_NO_ST_MODE_SUPPORTED 0 0 TPH_REQR_INT_VEC_MODE_SUPPORTED 1 1 TPH_REQR_DEV_SPC_MODE_SUPPORTED 2 2 TPH_REQR_EXTND_TPH_REQR_SUPPORED 8 8 TPH_REQR_ST_TABLE_LOCATION 9 10 TPH_REQR_ST_TABLE_SIZE 16 26 cfgBIF_CFG_DEV0_EPF0_0_PCIE_TPH_REQR_CNTL 3 0x378 2 0 4294967295 TPH_REQR_ST_MODE_SEL 0 2 TPH_REQR_EN 8 9 cfgBIF_CFG_DEV0_EPF0_0_PCIE_DLF_ENH_CAP_LIST 3 0x400 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_DATA_LINK_FEATURE_CAP 3 0x404 2 0 4294967295 LOCAL_DLF_SUPPORTED 0 22 DLF_EXCHANGE_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF0_0_DATA_LINK_FEATURE_STATUS 3 0x408 2 0 4294967295 REMOTE_DLF_SUPPORTED 0 22 REMOTE_DLF_SUPPORTED_VALID 31 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_PHY_16GT_ENH_CAP_LIST 3 0x410 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_LINK_CAP_16GT 3 0x414 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_EPF0_0_LINK_CNTL_16GT 3 0x418 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_EPF0_0_LINK_STATUS_16GT 3 0x41c 5 0 4294967295 EQUALIZATION_COMPLETE_16GT 0 0 EQUALIZATION_PHASE1_SUCCESS_16GT 1 1 EQUALIZATION_PHASE2_SUCCESS_16GT 2 2 EQUALIZATION_PHASE3_SUCCESS_16GT 3 3 LINK_EQUALIZATION_REQUEST_16GT 4 4 cfgBIF_CFG_DEV0_EPF0_0_LOCAL_PARITY_MISMATCH_STATUS_16GT 3 0x420 1 0 4294967295 LOCAL_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF0_0_RTM1_PARITY_MISMATCH_STATUS_16GT 3 0x424 1 0 4294967295 RTM1_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF0_0_RTM2_PARITY_MISMATCH_STATUS_16GT 3 0x428 1 0 4294967295 RTM2_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_0_EQUALIZATION_CNTL_16GT 3 0x430 2 0 4294967295 LANE_0_DSP_16GT_TX_PRESET 0 3 LANE_0_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_1_EQUALIZATION_CNTL_16GT 3 0x431 2 0 4294967295 LANE_1_DSP_16GT_TX_PRESET 0 3 LANE_1_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_2_EQUALIZATION_CNTL_16GT 3 0x432 2 0 4294967295 LANE_2_DSP_16GT_TX_PRESET 0 3 LANE_2_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_3_EQUALIZATION_CNTL_16GT 3 0x433 2 0 4294967295 LANE_3_DSP_16GT_TX_PRESET 0 3 LANE_3_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_4_EQUALIZATION_CNTL_16GT 3 0x434 2 0 4294967295 LANE_4_DSP_16GT_TX_PRESET 0 3 LANE_4_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_5_EQUALIZATION_CNTL_16GT 3 0x435 2 0 4294967295 LANE_5_DSP_16GT_TX_PRESET 0 3 LANE_5_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_6_EQUALIZATION_CNTL_16GT 3 0x436 2 0 4294967295 LANE_6_DSP_16GT_TX_PRESET 0 3 LANE_6_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_7_EQUALIZATION_CNTL_16GT 3 0x437 2 0 4294967295 LANE_7_DSP_16GT_TX_PRESET 0 3 LANE_7_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_8_EQUALIZATION_CNTL_16GT 3 0x438 2 0 4294967295 LANE_8_DSP_16GT_TX_PRESET 0 3 LANE_8_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_9_EQUALIZATION_CNTL_16GT 3 0x439 2 0 4294967295 LANE_9_DSP_16GT_TX_PRESET 0 3 LANE_9_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_10_EQUALIZATION_CNTL_16GT 3 0x43a 2 0 4294967295 LANE_10_DSP_16GT_TX_PRESET 0 3 LANE_10_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_11_EQUALIZATION_CNTL_16GT 3 0x43b 2 0 4294967295 LANE_11_DSP_16GT_TX_PRESET 0 3 LANE_11_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_12_EQUALIZATION_CNTL_16GT 3 0x43c 2 0 4294967295 LANE_12_DSP_16GT_TX_PRESET 0 3 LANE_12_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_13_EQUALIZATION_CNTL_16GT 3 0x43d 2 0 4294967295 LANE_13_DSP_16GT_TX_PRESET 0 3 LANE_13_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_14_EQUALIZATION_CNTL_16GT 3 0x43e 2 0 4294967295 LANE_14_DSP_16GT_TX_PRESET 0 3 LANE_14_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_LANE_15_EQUALIZATION_CNTL_16GT 3 0x43f 2 0 4294967295 LANE_15_DSP_16GT_TX_PRESET 0 3 LANE_15_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_0_PCIE_MARGINING_ENH_CAP_LIST 3 0x440 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_MARGINING_PORT_CAP 3 0x444 1 0 4294967295 MARGINING_USES_SOFTWARE 0 0 cfgBIF_CFG_DEV0_EPF0_0_MARGINING_PORT_STATUS 3 0x446 2 0 4294967295 MARGINING_READY 0 0 MARGINING_SOFTWARE_READY 1 1 cfgBIF_CFG_DEV0_EPF0_0_LANE_0_MARGINING_LANE_CNTL 3 0x448 4 0 4294967295 LANE_0_RECEIVER_NUMBER 0 2 LANE_0_MARGIN_TYPE 3 5 LANE_0_USAGE_MODEL 6 6 LANE_0_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_0_MARGINING_LANE_STATUS 3 0x44a 4 0 4294967295 LANE_0_RECEIVER_NUMBER_STATUS 0 2 LANE_0_MARGIN_TYPE_STATUS 3 5 LANE_0_USAGE_MODEL_STATUS 6 6 LANE_0_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_1_MARGINING_LANE_CNTL 3 0x44c 4 0 4294967295 LANE_1_RECEIVER_NUMBER 0 2 LANE_1_MARGIN_TYPE 3 5 LANE_1_USAGE_MODEL 6 6 LANE_1_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_1_MARGINING_LANE_STATUS 3 0x44e 4 0 4294967295 LANE_1_RECEIVER_NUMBER_STATUS 0 2 LANE_1_MARGIN_TYPE_STATUS 3 5 LANE_1_USAGE_MODEL_STATUS 6 6 LANE_1_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_2_MARGINING_LANE_CNTL 3 0x450 4 0 4294967295 LANE_2_RECEIVER_NUMBER 0 2 LANE_2_MARGIN_TYPE 3 5 LANE_2_USAGE_MODEL 6 6 LANE_2_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_2_MARGINING_LANE_STATUS 3 0x452 4 0 4294967295 LANE_2_RECEIVER_NUMBER_STATUS 0 2 LANE_2_MARGIN_TYPE_STATUS 3 5 LANE_2_USAGE_MODEL_STATUS 6 6 LANE_2_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_3_MARGINING_LANE_CNTL 3 0x454 4 0 4294967295 LANE_3_RECEIVER_NUMBER 0 2 LANE_3_MARGIN_TYPE 3 5 LANE_3_USAGE_MODEL 6 6 LANE_3_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_3_MARGINING_LANE_STATUS 3 0x456 4 0 4294967295 LANE_3_RECEIVER_NUMBER_STATUS 0 2 LANE_3_MARGIN_TYPE_STATUS 3 5 LANE_3_USAGE_MODEL_STATUS 6 6 LANE_3_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_4_MARGINING_LANE_CNTL 3 0x458 4 0 4294967295 LANE_4_RECEIVER_NUMBER 0 2 LANE_4_MARGIN_TYPE 3 5 LANE_4_USAGE_MODEL 6 6 LANE_4_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_4_MARGINING_LANE_STATUS 3 0x45a 4 0 4294967295 LANE_4_RECEIVER_NUMBER_STATUS 0 2 LANE_4_MARGIN_TYPE_STATUS 3 5 LANE_4_USAGE_MODEL_STATUS 6 6 LANE_4_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_5_MARGINING_LANE_CNTL 3 0x45c 4 0 4294967295 LANE_5_RECEIVER_NUMBER 0 2 LANE_5_MARGIN_TYPE 3 5 LANE_5_USAGE_MODEL 6 6 LANE_5_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_5_MARGINING_LANE_STATUS 3 0x45e 4 0 4294967295 LANE_5_RECEIVER_NUMBER_STATUS 0 2 LANE_5_MARGIN_TYPE_STATUS 3 5 LANE_5_USAGE_MODEL_STATUS 6 6 LANE_5_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_6_MARGINING_LANE_CNTL 3 0x460 4 0 4294967295 LANE_6_RECEIVER_NUMBER 0 2 LANE_6_MARGIN_TYPE 3 5 LANE_6_USAGE_MODEL 6 6 LANE_6_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_6_MARGINING_LANE_STATUS 3 0x462 4 0 4294967295 LANE_6_RECEIVER_NUMBER_STATUS 0 2 LANE_6_MARGIN_TYPE_STATUS 3 5 LANE_6_USAGE_MODEL_STATUS 6 6 LANE_6_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_7_MARGINING_LANE_CNTL 3 0x464 4 0 4294967295 LANE_7_RECEIVER_NUMBER 0 2 LANE_7_MARGIN_TYPE 3 5 LANE_7_USAGE_MODEL 6 6 LANE_7_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_7_MARGINING_LANE_STATUS 3 0x466 4 0 4294967295 LANE_7_RECEIVER_NUMBER_STATUS 0 2 LANE_7_MARGIN_TYPE_STATUS 3 5 LANE_7_USAGE_MODEL_STATUS 6 6 LANE_7_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_8_MARGINING_LANE_CNTL 3 0x468 4 0 4294967295 LANE_8_RECEIVER_NUMBER 0 2 LANE_8_MARGIN_TYPE 3 5 LANE_8_USAGE_MODEL 6 6 LANE_8_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_8_MARGINING_LANE_STATUS 3 0x46a 4 0 4294967295 LANE_8_RECEIVER_NUMBER_STATUS 0 2 LANE_8_MARGIN_TYPE_STATUS 3 5 LANE_8_USAGE_MODEL_STATUS 6 6 LANE_8_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_9_MARGINING_LANE_CNTL 3 0x46c 4 0 4294967295 LANE_9_RECEIVER_NUMBER 0 2 LANE_9_MARGIN_TYPE 3 5 LANE_9_USAGE_MODEL 6 6 LANE_9_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_9_MARGINING_LANE_STATUS 3 0x46e 4 0 4294967295 LANE_9_RECEIVER_NUMBER_STATUS 0 2 LANE_9_MARGIN_TYPE_STATUS 3 5 LANE_9_USAGE_MODEL_STATUS 6 6 LANE_9_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_10_MARGINING_LANE_CNTL 3 0x470 4 0 4294967295 LANE_10_RECEIVER_NUMBER 0 2 LANE_10_MARGIN_TYPE 3 5 LANE_10_USAGE_MODEL 6 6 LANE_10_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_10_MARGINING_LANE_STATUS 3 0x472 4 0 4294967295 LANE_10_RECEIVER_NUMBER_STATUS 0 2 LANE_10_MARGIN_TYPE_STATUS 3 5 LANE_10_USAGE_MODEL_STATUS 6 6 LANE_10_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_11_MARGINING_LANE_CNTL 3 0x474 4 0 4294967295 LANE_11_RECEIVER_NUMBER 0 2 LANE_11_MARGIN_TYPE 3 5 LANE_11_USAGE_MODEL 6 6 LANE_11_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_11_MARGINING_LANE_STATUS 3 0x476 4 0 4294967295 LANE_11_RECEIVER_NUMBER_STATUS 0 2 LANE_11_MARGIN_TYPE_STATUS 3 5 LANE_11_USAGE_MODEL_STATUS 6 6 LANE_11_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_12_MARGINING_LANE_CNTL 3 0x478 4 0 4294967295 LANE_12_RECEIVER_NUMBER 0 2 LANE_12_MARGIN_TYPE 3 5 LANE_12_USAGE_MODEL 6 6 LANE_12_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_12_MARGINING_LANE_STATUS 3 0x47a 4 0 4294967295 LANE_12_RECEIVER_NUMBER_STATUS 0 2 LANE_12_MARGIN_TYPE_STATUS 3 5 LANE_12_USAGE_MODEL_STATUS 6 6 LANE_12_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_13_MARGINING_LANE_CNTL 3 0x47c 4 0 4294967295 LANE_13_RECEIVER_NUMBER 0 2 LANE_13_MARGIN_TYPE 3 5 LANE_13_USAGE_MODEL 6 6 LANE_13_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_13_MARGINING_LANE_STATUS 3 0x47e 4 0 4294967295 LANE_13_RECEIVER_NUMBER_STATUS 0 2 LANE_13_MARGIN_TYPE_STATUS 3 5 LANE_13_USAGE_MODEL_STATUS 6 6 LANE_13_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_14_MARGINING_LANE_CNTL 3 0x480 4 0 4294967295 LANE_14_RECEIVER_NUMBER 0 2 LANE_14_MARGIN_TYPE 3 5 LANE_14_USAGE_MODEL 6 6 LANE_14_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_14_MARGINING_LANE_STATUS 3 0x482 4 0 4294967295 LANE_14_RECEIVER_NUMBER_STATUS 0 2 LANE_14_MARGIN_TYPE_STATUS 3 5 LANE_14_USAGE_MODEL_STATUS 6 6 LANE_14_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_15_MARGINING_LANE_CNTL 3 0x484 4 0 4294967295 LANE_15_RECEIVER_NUMBER 0 2 LANE_15_MARGIN_TYPE 3 5 LANE_15_USAGE_MODEL 6 6 LANE_15_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_0_LANE_15_MARGINING_LANE_STATUS 3 0x486 4 0 4294967295 LANE_15_RECEIVER_NUMBER_STATUS 0 2 LANE_15_MARGIN_TYPE_STATUS 3 5 LANE_15_USAGE_MODEL_STATUS 6 6 LANE_15_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR_ENH_CAP_LIST 3 0x4c0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR1_CAP 3 0x4c4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR1_CNTL 3 0x4c8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR2_CAP 3 0x4cc 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR2_CNTL 3 0x4d0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR3_CAP 3 0x4d4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR3_CNTL 3 0x4d8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR4_CAP 3 0x4dc 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR4_CNTL 3 0x4e0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR5_CAP 3 0x4e4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR5_CNTL 3 0x4e8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR6_CAP 3 0x4ec 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VF_RESIZE_BAR6_CNTL 3 0x4f0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST_GPUIOV 3 0x500 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV 3 0x504 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_SRIOV_SHADOW 3 0x508 2 0 4294967295 VF_EN 0 0 VF_NUM 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_INTR_ENABLE 3 0x50c 18 0 4294967295 GFX_CMD_COMPLETE_INTR_EN 0 0 GFX_HANG_SELF_RECOVERED_INTR_EN 1 1 GFX_HANG_NEED_FLR_INTR_EN 2 2 GFX_VM_BUSY_TRANSITION_INTR_EN 3 3 UVD_CMD_COMPLETE_INTR_EN 8 8 UVD_HANG_SELF_RECOVERED_INTR_EN 9 9 UVD_HANG_NEED_FLR_INTR_EN 10 10 UVD_VM_BUSY_TRANSITION_INTR_EN 11 11 UVD1_CMD_COMPLETE_INTR_EN 12 12 UVD1_HANG_SELF_RECOVERED_INTR_EN 13 13 UVD1_HANG_NEED_FLR_INTR_EN 14 14 UVD1_VM_BUSY_TRANSITION_INTR_EN 15 15 VCE_CMD_COMPLETE_INTR_EN 16 16 VCE_HANG_SELF_RECOVERED_INTR_EN 17 17 VCE_HANG_NEED_FLR_INTR_EN 18 18 VCE_VM_BUSY_TRANSITION_INTR_EN 19 19 HVVM_MAILBOX_TRN_ACK_INTR_EN 24 24 HVVM_MAILBOX_RCV_VALID_INTR_EN 25 25 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_INTR_STATUS 3 0x510 18 0 4294967295 GFX_CMD_COMPLETE_INTR_STATUS 0 0 GFX_HANG_SELF_RECOVERED_INTR_STATUS 1 1 GFX_HANG_NEED_FLR_INTR_STATUS 2 2 GFX_VM_BUSY_TRANSITION_INTR_STATUS 3 3 UVD_CMD_COMPLETE_INTR_STATUS 8 8 UVD_HANG_SELF_RECOVERED_INTR_STATUS 9 9 UVD_HANG_NEED_FLR_INTR_STATUS 10 10 UVD_VM_BUSY_TRANSITION_INTR_STATUS 11 11 UVD1_CMD_COMPLETE_INTR_STATUS 12 12 UVD1_HANG_SELF_RECOVERED_INTR_STATUS 13 13 UVD1_HANG_NEED_FLR_INTR_STATUS 14 14 UVD1_VM_BUSY_TRANSITION_INTR_STATUS 15 15 VCE_CMD_COMPLETE_INTR_STATUS 16 16 VCE_HANG_SELF_RECOVERED_INTR_STATUS 17 17 VCE_HANG_NEED_FLR_INTR_STATUS 18 18 VCE_VM_BUSY_TRANSITION_INTR_STATUS 19 19 HVVM_MAILBOX_TRN_ACK_INTR_STATUS 24 24 HVVM_MAILBOX_RCV_VALID_INTR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL 3 0x514 1 0 4294967295 SOFT_PF_FLR 0 0 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW0 3 0x518 5 0 4294967295 VF_INDEX 0 7 TRN_MSG_DATA 8 11 TRN_MSG_VALID 15 15 RCV_MSG_DATA 16 19 RCV_MSG_ACK 24 24 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW1 3 0x51c 32 0 4294967295 VF0_TRN_ACK 0 0 VF0_RCV_VALID 1 1 VF1_TRN_ACK 2 2 VF1_RCV_VALID 3 3 VF2_TRN_ACK 4 4 VF2_RCV_VALID 5 5 VF3_TRN_ACK 6 6 VF3_RCV_VALID 7 7 VF4_TRN_ACK 8 8 VF4_RCV_VALID 9 9 VF5_TRN_ACK 10 10 VF5_RCV_VALID 11 11 VF6_TRN_ACK 12 12 VF6_RCV_VALID 13 13 VF7_TRN_ACK 14 14 VF7_RCV_VALID 15 15 VF8_TRN_ACK 16 16 VF8_RCV_VALID 17 17 VF9_TRN_ACK 18 18 VF9_RCV_VALID 19 19 VF10_TRN_ACK 20 20 VF10_RCV_VALID 21 21 VF11_TRN_ACK 22 22 VF11_RCV_VALID 23 23 VF12_TRN_ACK 24 24 VF12_RCV_VALID 25 25 VF13_TRN_ACK 26 26 VF13_RCV_VALID 27 27 VF14_TRN_ACK 28 28 VF14_RCV_VALID 29 29 VF15_TRN_ACK 30 30 VF15_RCV_VALID 31 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW2 3 0x520 32 0 4294967295 VF16_TRN_ACK 0 0 VF16_RCV_VALID 1 1 VF17_TRN_ACK 2 2 VF17_RCV_VALID 3 3 VF18_TRN_ACK 4 4 VF18_RCV_VALID 5 5 VF19_TRN_ACK 6 6 VF19_RCV_VALID 7 7 VF20_TRN_ACK 8 8 VF20_RCV_VALID 9 9 VF21_TRN_ACK 10 10 VF21_RCV_VALID 11 11 VF22_TRN_ACK 12 12 VF22_RCV_VALID 13 13 VF23_TRN_ACK 14 14 VF23_RCV_VALID 15 15 VF24_TRN_ACK 16 16 VF24_RCV_VALID 17 17 VF25_TRN_ACK 18 18 VF25_RCV_VALID 19 19 VF26_TRN_ACK 20 20 VF26_RCV_VALID 21 21 VF27_TRN_ACK 22 22 VF27_RCV_VALID 23 23 VF28_TRN_ACK 24 24 VF28_RCV_VALID 25 25 VF29_TRN_ACK 26 26 VF29_RCV_VALID 27 27 VF30_TRN_ACK 28 28 VF30_RCV_VALID 29 29 PF_TRN_ACK 30 30 PF_RCV_VALID 31 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_CONTEXT 3 0x524 3 0 4294967295 CONTEXT_SIZE 0 6 LOC 7 7 CONTEXT_OFFSET 10 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_TOTAL_FB 3 0x528 2 0 4294967295 TOTAL_FB_AVAILABLE 0 15 TOTAL_FB_CONSUMED 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_OFFSETS 3 0x52c 4 0 4294967295 UVDSCH_OFFSET 0 7 VCESCH_OFFSET 8 15 GFXSCH_OFFSET 16 23 UVD1SCH_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_REGION 3 0x530 2 0 4294967295 LFB_REGION 0 2 MAX_REGION 4 6 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_P2P_OVER_XGMI_ENABLE 3 0x534 2 0 4294967295 P2P_OVER_XGMI_ENABLE_VF 0 30 P2P_OVER_XGMI_ENABLE_PF 31 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF0_FB 3 0x538 2 0 4294967295 VF0_FB_SIZE 0 15 VF0_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF1_FB 3 0x53c 2 0 4294967295 VF1_FB_SIZE 0 15 VF1_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF2_FB 3 0x540 2 0 4294967295 VF2_FB_SIZE 0 15 VF2_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF3_FB 3 0x544 2 0 4294967295 VF3_FB_SIZE 0 15 VF3_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF4_FB 3 0x548 2 0 4294967295 VF4_FB_SIZE 0 15 VF4_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF5_FB 3 0x54c 2 0 4294967295 VF5_FB_SIZE 0 15 VF5_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF6_FB 3 0x550 2 0 4294967295 VF6_FB_SIZE 0 15 VF6_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF7_FB 3 0x554 2 0 4294967295 VF7_FB_SIZE 0 15 VF7_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF8_FB 3 0x558 2 0 4294967295 VF8_FB_SIZE 0 15 VF8_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF9_FB 3 0x55c 2 0 4294967295 VF9_FB_SIZE 0 15 VF9_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF10_FB 3 0x560 2 0 4294967295 VF10_FB_SIZE 0 15 VF10_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF11_FB 3 0x564 2 0 4294967295 VF11_FB_SIZE 0 15 VF11_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF12_FB 3 0x568 2 0 4294967295 VF12_FB_SIZE 0 15 VF12_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF13_FB 3 0x56c 2 0 4294967295 VF13_FB_SIZE 0 15 VF13_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF14_FB 3 0x570 2 0 4294967295 VF14_FB_SIZE 0 15 VF14_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF15_FB 3 0x574 2 0 4294967295 VF15_FB_SIZE 0 15 VF15_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF16_FB 3 0x578 2 0 4294967295 VF16_FB_SIZE 0 15 VF16_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF17_FB 3 0x57c 2 0 4294967295 VF17_FB_SIZE 0 15 VF17_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF18_FB 3 0x580 2 0 4294967295 VF18_FB_SIZE 0 15 VF18_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF19_FB 3 0x584 2 0 4294967295 VF19_FB_SIZE 0 15 VF19_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF20_FB 3 0x588 2 0 4294967295 VF20_FB_SIZE 0 15 VF20_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF21_FB 3 0x58c 2 0 4294967295 VF21_FB_SIZE 0 15 VF21_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF22_FB 3 0x590 2 0 4294967295 VF22_FB_SIZE 0 15 VF22_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF23_FB 3 0x594 2 0 4294967295 VF23_FB_SIZE 0 15 VF23_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF24_FB 3 0x598 2 0 4294967295 VF24_FB_SIZE 0 15 VF24_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF25_FB 3 0x59c 2 0 4294967295 VF25_FB_SIZE 0 15 VF25_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF26_FB 3 0x5a0 2 0 4294967295 VF26_FB_SIZE 0 15 VF26_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF27_FB 3 0x5a4 2 0 4294967295 VF27_FB_SIZE 0 15 VF27_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF28_FB 3 0x5a8 2 0 4294967295 VF28_FB_SIZE 0 15 VF28_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF29_FB 3 0x5ac 2 0 4294967295 VF29_FB_SIZE 0 15 VF29_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF30_FB 3 0x5b0 2 0 4294967295 VF30_FB_SIZE 0 15 VF30_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW0 3 0x5c0 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW1 3 0x5c4 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW2 3 0x5c8 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW3 3 0x5cc 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW4 3 0x5d0 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW5 3 0x5d4 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW6 3 0x5d8 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW7 3 0x5dc 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW8 3 0x5e0 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW0 3 0x5f0 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW1 3 0x5f4 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW2 3 0x5f8 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW3 3 0x5fc 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW4 3 0x600 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW5 3 0x604 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW6 3 0x608 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW7 3 0x60c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW8 3 0x610 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW0 3 0x620 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW1 3 0x624 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW2 3 0x628 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW3 3 0x62c 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW4 3 0x630 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW5 3 0x634 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW6 3 0x638 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW7 3 0x63c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW8 3 0x640 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW0 3 0x650 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW1 3 0x654 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW2 3 0x658 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW3 3 0x65c 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW4 3 0x660 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW5 3 0x664 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW6 3 0x668 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW7 3 0x66c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF0_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW8 3 0x670 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF1_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF1_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF1_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF1_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF1_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF1_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF1_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF1_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF1_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF1_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF1_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF1_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF1_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF1_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF1_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF1_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF1_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF1_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF1_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF1_0_VENDOR_CAP_LIST 3 0x48 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 cfgBIF_CFG_DEV0_EPF1_0_ADAPTER_ID_W 3 0x4c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF1_0_PMI_CAP_LIST 3 0x50 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF1_0_PMI_CAP 3 0x52 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgBIF_CFG_DEV0_EPF1_0_PMI_STATUS_CNTL 3 0x54 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF1_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF1_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF1_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF1_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF1_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF1_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF1_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF1_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF1_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF1_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF1_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF1_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF1_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF1_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF1_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF1_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF1_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF1_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF1_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF1_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF1_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF1_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF1_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF1_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF1_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VC_ENH_CAP_LIST 3 0x110 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PORT_VC_CAP_REG1 3 0x114 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PORT_VC_CAP_REG2 3 0x118 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PORT_VC_CNTL 3 0x11c 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PORT_VC_STATUS 3 0x11e 1 0 4294967295 VC_ARB_TABLE_STATUS 0 0 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VC0_RESOURCE_CAP 3 0x120 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VC0_RESOURCE_CNTL 3 0x124 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VC0_RESOURCE_STATUS 3 0x12a 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VC1_RESOURCE_CAP 3 0x12c 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VC1_RESOURCE_CNTL 3 0x130 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VC1_RESOURCE_STATUS 3 0x136 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 3 0x140 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DEV_SERIAL_NUM_DW1 3 0x144 1 0 4294967295 SERIAL_NUMBER_LO 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DEV_SERIAL_NUM_DW2 3 0x148 1 0 4294967295 SERIAL_NUMBER_HI 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF1_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF1_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF1_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF1_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR_ENH_CAP_LIST 3 0x200 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR1_CAP 3 0x204 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR1_CNTL 3 0x208 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR2_CAP 3 0x20c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR2_CNTL 3 0x210 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR3_CAP 3 0x214 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR3_CNTL 3 0x218 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR4_CAP 3 0x21c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR4_CNTL 3 0x220 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR5_CAP 3 0x224 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR5_CNTL 3 0x228 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR6_CAP 3 0x22c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_BAR6_CNTL 3 0x230 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PWR_BUDGET_ENH_CAP_LIST 3 0x240 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PWR_BUDGET_DATA_SELECT 3 0x244 1 0 4294967295 DATA_SELECT 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PWR_BUDGET_DATA 3 0x248 6 0 4294967295 BASE_POWER 0 7 DATA_SCALE 8 9 PM_SUB_STATE 10 12 PM_STATE 13 14 TYPE 15 17 POWER_RAIL 18 20 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PWR_BUDGET_CAP 3 0x24c 1 0 4294967295 SYSTEM_ALLOCATED 0 0 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_ENH_CAP_LIST 3 0x250 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_CAP 3 0x254 5 0 4294967295 SUBSTATE_MAX 0 4 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_LATENCY_INDICATOR 3 0x258 1 0 4294967295 TRANS_LAT_INDICATOR_BITS 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_STATUS 3 0x25c 2 0 4294967295 SUBSTATE_STATUS 0 4 SUBSTATE_CNTL_ENABLED 8 8 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_CNTL 3 0x25e 1 0 4294967295 SUBSTATE_CNTL 0 4 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_0 3 0x260 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_1 3 0x261 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_2 3 0x262 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_3 3 0x263 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_4 3 0x264 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_5 3 0x265 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_6 3 0x266 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_7 3 0x267 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SECONDARY_ENH_CAP_LIST 3 0x270 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LINK_CNTL3 3 0x274 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 ENABLE_LOWER_SKP_OS_GEN 9 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_ERROR_STATUS 3 0x278 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_0_EQUALIZATION_CNTL 3 0x27c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_1_EQUALIZATION_CNTL 3 0x27e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_2_EQUALIZATION_CNTL 3 0x280 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_3_EQUALIZATION_CNTL 3 0x282 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_4_EQUALIZATION_CNTL 3 0x284 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_5_EQUALIZATION_CNTL 3 0x286 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_6_EQUALIZATION_CNTL 3 0x288 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_7_EQUALIZATION_CNTL 3 0x28a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_8_EQUALIZATION_CNTL 3 0x28c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_9_EQUALIZATION_CNTL 3 0x28e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_10_EQUALIZATION_CNTL 3 0x290 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_11_EQUALIZATION_CNTL 3 0x292 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_12_EQUALIZATION_CNTL 3 0x294 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_13_EQUALIZATION_CNTL 3 0x296 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_14_EQUALIZATION_CNTL 3 0x298 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LANE_15_EQUALIZATION_CNTL 3 0x29a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ACS_ENH_CAP_LIST 3 0x2a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ACS_CAP 3 0x2a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ACS_CNTL 3 0x2a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PAGE_REQ_ENH_CAP_LIST 3 0x2c0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PAGE_REQ_CNTL 3 0x2c4 2 0 4294967295 PRI_ENABLE 0 0 PRI_RESET 1 1 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PAGE_REQ_STATUS 3 0x2c6 4 0 4294967295 RESPONSE_FAILURE 0 0 UNEXPECTED_PAGE_REQ_GRP_INDEX 1 1 STOPPED 8 8 PRG_RESPONSE_PASID_REQUIRED 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_OUTSTAND_PAGE_REQ_CAPACITY 3 0x2c8 1 0 4294967295 OUTSTAND_PAGE_REQ_CAPACITY 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_OUTSTAND_PAGE_REQ_ALLOC 3 0x2cc 1 0 4294967295 OUTSTAND_PAGE_REQ_ALLOC 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PASID_ENH_CAP_LIST 3 0x2d0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PASID_CAP 3 0x2d4 3 0 4294967295 PASID_EXE_PERMISSION_SUPPORTED 1 1 PASID_PRIV_MODE_SUPPORTED 2 2 MAX_PASID_WIDTH 8 12 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PASID_CNTL 3 0x2d6 3 0 4294967295 PASID_ENABLE 0 0 PASID_EXE_PERMISSION_ENABLE 1 1 PASID_PRIV_MODE_SUPPORTED_ENABLE 2 2 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_ENH_CAP_LIST 3 0x2f0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_CAP 3 0x2f4 3 0 4294967295 MC_MAX_GROUP 0 5 MC_WIN_SIZE_REQ 8 13 MC_ECRC_REGEN_SUPP 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_CNTL 3 0x2f6 2 0 4294967295 MC_NUM_GROUP 0 5 MC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_ADDR0 3 0x2f8 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_ADDR1 3 0x2fc 1 0 4294967295 MC_BASE_ADDR_1 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_RCV0 3 0x300 1 0 4294967295 MC_RECEIVE_0 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_RCV1 3 0x304 1 0 4294967295 MC_RECEIVE_1 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_BLOCK_ALL0 3 0x308 1 0 4294967295 MC_BLOCK_ALL_0 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_BLOCK_ALL1 3 0x30c 1 0 4294967295 MC_BLOCK_ALL_1 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_BLOCK_UNTRANSLATED_0 3 0x310 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MC_BLOCK_UNTRANSLATED_1 3 0x314 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LTR_ENH_CAP_LIST 3 0x320 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_LTR_CAP 3 0x324 4 0 4294967295 LTR_MAX_S_LATENCY_VALUE 0 9 LTR_MAX_S_LATENCY_SCALE 10 12 LTR_MAX_NS_LATENCY_VALUE 16 25 LTR_MAX_NS_LATENCY_SCALE 26 28 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_ENH_CAP_LIST 3 0x330 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_CAP 3 0x334 4 0 4294967295 SRIOV_VF_MIGRATION_CAP 0 0 SRIOV_ARI_CAP_HIERARCHY_PRESERVED 1 1 SRIOV_VF_TEN_BIT_TAG_REQUESTER_SUPPORTED 2 2 SRIOV_VF_MIGRATION_INTR_MSG_NUM 21 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_CONTROL 3 0x338 6 0 4294967295 SRIOV_VF_ENABLE 0 0 SRIOV_VF_MIGRATION_ENABLE 1 1 SRIOV_VF_MIGRATION_INTR_ENABLE 2 2 SRIOV_VF_MSE 3 3 SRIOV_ARI_CAP_HIERARCHY 4 4 SRIOV_VF_TEN_BIT_TAG_REQUESTER_ENABLE 5 5 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_STATUS 3 0x33a 1 0 4294967295 SRIOV_VF_MIGRATION_STATUS 0 0 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_INITIAL_VFS 3 0x33c 1 0 4294967295 SRIOV_INITIAL_VFS 0 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_TOTAL_VFS 3 0x33e 1 0 4294967295 SRIOV_TOTAL_VFS 0 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_NUM_VFS 3 0x340 1 0 4294967295 SRIOV_NUM_VFS 0 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_FUNC_DEP_LINK 3 0x342 1 0 4294967295 SRIOV_FUNC_DEP_LINK 0 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_FIRST_VF_OFFSET 3 0x344 1 0 4294967295 SRIOV_FIRST_VF_OFFSET 0 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_VF_STRIDE 3 0x346 1 0 4294967295 SRIOV_VF_STRIDE 0 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_VF_DEVICE_ID 3 0x34a 1 0 4294967295 SRIOV_VF_DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_SUPPORTED_PAGE_SIZE 3 0x34c 1 0 4294967295 SRIOV_SUPPORTED_PAGE_SIZE 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_SYSTEM_PAGE_SIZE 3 0x350 1 0 4294967295 SRIOV_SYSTEM_PAGE_SIZE 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_VF_BASE_ADDR_0 3 0x354 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_VF_BASE_ADDR_1 3 0x358 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_VF_BASE_ADDR_2 3 0x35c 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_VF_BASE_ADDR_3 3 0x360 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_VF_BASE_ADDR_4 3 0x364 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_VF_BASE_ADDR_5 3 0x368 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_SRIOV_VF_MIGRATION_STATE_ARRAY_OFFSET 3 0x36c 2 0 4294967295 SRIOV_VF_MIGRATION_STATE_BIR 0 2 SRIOV_VF_MIGRATION_STATE_ARRAY_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_TPH_REQR_ENH_CAP_LIST 3 0x370 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_TPH_REQR_CAP 3 0x374 6 0 4294967295 TPH_REQR_NO_ST_MODE_SUPPORTED 0 0 TPH_REQR_INT_VEC_MODE_SUPPORTED 1 1 TPH_REQR_DEV_SPC_MODE_SUPPORTED 2 2 TPH_REQR_EXTND_TPH_REQR_SUPPORED 8 8 TPH_REQR_ST_TABLE_LOCATION 9 10 TPH_REQR_ST_TABLE_SIZE 16 26 cfgBIF_CFG_DEV0_EPF1_0_PCIE_TPH_REQR_CNTL 3 0x378 2 0 4294967295 TPH_REQR_ST_MODE_SEL 0 2 TPH_REQR_EN 8 9 cfgBIF_CFG_DEV0_EPF1_0_PCIE_DLF_ENH_CAP_LIST 3 0x400 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_DATA_LINK_FEATURE_CAP 3 0x404 2 0 4294967295 LOCAL_DLF_SUPPORTED 0 22 DLF_EXCHANGE_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF1_0_DATA_LINK_FEATURE_STATUS 3 0x408 2 0 4294967295 REMOTE_DLF_SUPPORTED 0 22 REMOTE_DLF_SUPPORTED_VALID 31 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_PHY_16GT_ENH_CAP_LIST 3 0x410 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_LINK_CAP_16GT 3 0x414 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_EPF1_0_LINK_CNTL_16GT 3 0x418 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_EPF1_0_LINK_STATUS_16GT 3 0x41c 5 0 4294967295 EQUALIZATION_COMPLETE_16GT 0 0 EQUALIZATION_PHASE1_SUCCESS_16GT 1 1 EQUALIZATION_PHASE2_SUCCESS_16GT 2 2 EQUALIZATION_PHASE3_SUCCESS_16GT 3 3 LINK_EQUALIZATION_REQUEST_16GT 4 4 cfgBIF_CFG_DEV0_EPF1_0_LOCAL_PARITY_MISMATCH_STATUS_16GT 3 0x420 1 0 4294967295 LOCAL_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF1_0_RTM1_PARITY_MISMATCH_STATUS_16GT 3 0x424 1 0 4294967295 RTM1_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF1_0_RTM2_PARITY_MISMATCH_STATUS_16GT 3 0x428 1 0 4294967295 RTM2_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_0_EQUALIZATION_CNTL_16GT 3 0x430 2 0 4294967295 LANE_0_DSP_16GT_TX_PRESET 0 3 LANE_0_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_1_EQUALIZATION_CNTL_16GT 3 0x431 2 0 4294967295 LANE_1_DSP_16GT_TX_PRESET 0 3 LANE_1_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_2_EQUALIZATION_CNTL_16GT 3 0x432 2 0 4294967295 LANE_2_DSP_16GT_TX_PRESET 0 3 LANE_2_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_3_EQUALIZATION_CNTL_16GT 3 0x433 2 0 4294967295 LANE_3_DSP_16GT_TX_PRESET 0 3 LANE_3_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_4_EQUALIZATION_CNTL_16GT 3 0x434 2 0 4294967295 LANE_4_DSP_16GT_TX_PRESET 0 3 LANE_4_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_5_EQUALIZATION_CNTL_16GT 3 0x435 2 0 4294967295 LANE_5_DSP_16GT_TX_PRESET 0 3 LANE_5_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_6_EQUALIZATION_CNTL_16GT 3 0x436 2 0 4294967295 LANE_6_DSP_16GT_TX_PRESET 0 3 LANE_6_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_7_EQUALIZATION_CNTL_16GT 3 0x437 2 0 4294967295 LANE_7_DSP_16GT_TX_PRESET 0 3 LANE_7_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_8_EQUALIZATION_CNTL_16GT 3 0x438 2 0 4294967295 LANE_8_DSP_16GT_TX_PRESET 0 3 LANE_8_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_9_EQUALIZATION_CNTL_16GT 3 0x439 2 0 4294967295 LANE_9_DSP_16GT_TX_PRESET 0 3 LANE_9_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_10_EQUALIZATION_CNTL_16GT 3 0x43a 2 0 4294967295 LANE_10_DSP_16GT_TX_PRESET 0 3 LANE_10_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_11_EQUALIZATION_CNTL_16GT 3 0x43b 2 0 4294967295 LANE_11_DSP_16GT_TX_PRESET 0 3 LANE_11_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_12_EQUALIZATION_CNTL_16GT 3 0x43c 2 0 4294967295 LANE_12_DSP_16GT_TX_PRESET 0 3 LANE_12_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_13_EQUALIZATION_CNTL_16GT 3 0x43d 2 0 4294967295 LANE_13_DSP_16GT_TX_PRESET 0 3 LANE_13_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_14_EQUALIZATION_CNTL_16GT 3 0x43e 2 0 4294967295 LANE_14_DSP_16GT_TX_PRESET 0 3 LANE_14_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_LANE_15_EQUALIZATION_CNTL_16GT 3 0x43f 2 0 4294967295 LANE_15_DSP_16GT_TX_PRESET 0 3 LANE_15_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_0_PCIE_MARGINING_ENH_CAP_LIST 3 0x440 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_MARGINING_PORT_CAP 3 0x444 1 0 4294967295 MARGINING_USES_SOFTWARE 0 0 cfgBIF_CFG_DEV0_EPF1_0_MARGINING_PORT_STATUS 3 0x446 2 0 4294967295 MARGINING_READY 0 0 MARGINING_SOFTWARE_READY 1 1 cfgBIF_CFG_DEV0_EPF1_0_LANE_0_MARGINING_LANE_CNTL 3 0x448 4 0 4294967295 LANE_0_RECEIVER_NUMBER 0 2 LANE_0_MARGIN_TYPE 3 5 LANE_0_USAGE_MODEL 6 6 LANE_0_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_0_MARGINING_LANE_STATUS 3 0x44a 4 0 4294967295 LANE_0_RECEIVER_NUMBER_STATUS 0 2 LANE_0_MARGIN_TYPE_STATUS 3 5 LANE_0_USAGE_MODEL_STATUS 6 6 LANE_0_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_1_MARGINING_LANE_CNTL 3 0x44c 4 0 4294967295 LANE_1_RECEIVER_NUMBER 0 2 LANE_1_MARGIN_TYPE 3 5 LANE_1_USAGE_MODEL 6 6 LANE_1_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_1_MARGINING_LANE_STATUS 3 0x44e 4 0 4294967295 LANE_1_RECEIVER_NUMBER_STATUS 0 2 LANE_1_MARGIN_TYPE_STATUS 3 5 LANE_1_USAGE_MODEL_STATUS 6 6 LANE_1_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_2_MARGINING_LANE_CNTL 3 0x450 4 0 4294967295 LANE_2_RECEIVER_NUMBER 0 2 LANE_2_MARGIN_TYPE 3 5 LANE_2_USAGE_MODEL 6 6 LANE_2_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_2_MARGINING_LANE_STATUS 3 0x452 4 0 4294967295 LANE_2_RECEIVER_NUMBER_STATUS 0 2 LANE_2_MARGIN_TYPE_STATUS 3 5 LANE_2_USAGE_MODEL_STATUS 6 6 LANE_2_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_3_MARGINING_LANE_CNTL 3 0x454 4 0 4294967295 LANE_3_RECEIVER_NUMBER 0 2 LANE_3_MARGIN_TYPE 3 5 LANE_3_USAGE_MODEL 6 6 LANE_3_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_3_MARGINING_LANE_STATUS 3 0x456 4 0 4294967295 LANE_3_RECEIVER_NUMBER_STATUS 0 2 LANE_3_MARGIN_TYPE_STATUS 3 5 LANE_3_USAGE_MODEL_STATUS 6 6 LANE_3_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_4_MARGINING_LANE_CNTL 3 0x458 4 0 4294967295 LANE_4_RECEIVER_NUMBER 0 2 LANE_4_MARGIN_TYPE 3 5 LANE_4_USAGE_MODEL 6 6 LANE_4_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_4_MARGINING_LANE_STATUS 3 0x45a 4 0 4294967295 LANE_4_RECEIVER_NUMBER_STATUS 0 2 LANE_4_MARGIN_TYPE_STATUS 3 5 LANE_4_USAGE_MODEL_STATUS 6 6 LANE_4_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_5_MARGINING_LANE_CNTL 3 0x45c 4 0 4294967295 LANE_5_RECEIVER_NUMBER 0 2 LANE_5_MARGIN_TYPE 3 5 LANE_5_USAGE_MODEL 6 6 LANE_5_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_5_MARGINING_LANE_STATUS 3 0x45e 4 0 4294967295 LANE_5_RECEIVER_NUMBER_STATUS 0 2 LANE_5_MARGIN_TYPE_STATUS 3 5 LANE_5_USAGE_MODEL_STATUS 6 6 LANE_5_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_6_MARGINING_LANE_CNTL 3 0x460 4 0 4294967295 LANE_6_RECEIVER_NUMBER 0 2 LANE_6_MARGIN_TYPE 3 5 LANE_6_USAGE_MODEL 6 6 LANE_6_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_6_MARGINING_LANE_STATUS 3 0x462 4 0 4294967295 LANE_6_RECEIVER_NUMBER_STATUS 0 2 LANE_6_MARGIN_TYPE_STATUS 3 5 LANE_6_USAGE_MODEL_STATUS 6 6 LANE_6_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_7_MARGINING_LANE_CNTL 3 0x464 4 0 4294967295 LANE_7_RECEIVER_NUMBER 0 2 LANE_7_MARGIN_TYPE 3 5 LANE_7_USAGE_MODEL 6 6 LANE_7_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_7_MARGINING_LANE_STATUS 3 0x466 4 0 4294967295 LANE_7_RECEIVER_NUMBER_STATUS 0 2 LANE_7_MARGIN_TYPE_STATUS 3 5 LANE_7_USAGE_MODEL_STATUS 6 6 LANE_7_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_8_MARGINING_LANE_CNTL 3 0x468 4 0 4294967295 LANE_8_RECEIVER_NUMBER 0 2 LANE_8_MARGIN_TYPE 3 5 LANE_8_USAGE_MODEL 6 6 LANE_8_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_8_MARGINING_LANE_STATUS 3 0x46a 4 0 4294967295 LANE_8_RECEIVER_NUMBER_STATUS 0 2 LANE_8_MARGIN_TYPE_STATUS 3 5 LANE_8_USAGE_MODEL_STATUS 6 6 LANE_8_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_9_MARGINING_LANE_CNTL 3 0x46c 4 0 4294967295 LANE_9_RECEIVER_NUMBER 0 2 LANE_9_MARGIN_TYPE 3 5 LANE_9_USAGE_MODEL 6 6 LANE_9_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_9_MARGINING_LANE_STATUS 3 0x46e 4 0 4294967295 LANE_9_RECEIVER_NUMBER_STATUS 0 2 LANE_9_MARGIN_TYPE_STATUS 3 5 LANE_9_USAGE_MODEL_STATUS 6 6 LANE_9_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_10_MARGINING_LANE_CNTL 3 0x470 4 0 4294967295 LANE_10_RECEIVER_NUMBER 0 2 LANE_10_MARGIN_TYPE 3 5 LANE_10_USAGE_MODEL 6 6 LANE_10_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_10_MARGINING_LANE_STATUS 3 0x472 4 0 4294967295 LANE_10_RECEIVER_NUMBER_STATUS 0 2 LANE_10_MARGIN_TYPE_STATUS 3 5 LANE_10_USAGE_MODEL_STATUS 6 6 LANE_10_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_11_MARGINING_LANE_CNTL 3 0x474 4 0 4294967295 LANE_11_RECEIVER_NUMBER 0 2 LANE_11_MARGIN_TYPE 3 5 LANE_11_USAGE_MODEL 6 6 LANE_11_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_11_MARGINING_LANE_STATUS 3 0x476 4 0 4294967295 LANE_11_RECEIVER_NUMBER_STATUS 0 2 LANE_11_MARGIN_TYPE_STATUS 3 5 LANE_11_USAGE_MODEL_STATUS 6 6 LANE_11_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_12_MARGINING_LANE_CNTL 3 0x478 4 0 4294967295 LANE_12_RECEIVER_NUMBER 0 2 LANE_12_MARGIN_TYPE 3 5 LANE_12_USAGE_MODEL 6 6 LANE_12_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_12_MARGINING_LANE_STATUS 3 0x47a 4 0 4294967295 LANE_12_RECEIVER_NUMBER_STATUS 0 2 LANE_12_MARGIN_TYPE_STATUS 3 5 LANE_12_USAGE_MODEL_STATUS 6 6 LANE_12_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_13_MARGINING_LANE_CNTL 3 0x47c 4 0 4294967295 LANE_13_RECEIVER_NUMBER 0 2 LANE_13_MARGIN_TYPE 3 5 LANE_13_USAGE_MODEL 6 6 LANE_13_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_13_MARGINING_LANE_STATUS 3 0x47e 4 0 4294967295 LANE_13_RECEIVER_NUMBER_STATUS 0 2 LANE_13_MARGIN_TYPE_STATUS 3 5 LANE_13_USAGE_MODEL_STATUS 6 6 LANE_13_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_14_MARGINING_LANE_CNTL 3 0x480 4 0 4294967295 LANE_14_RECEIVER_NUMBER 0 2 LANE_14_MARGIN_TYPE 3 5 LANE_14_USAGE_MODEL 6 6 LANE_14_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_14_MARGINING_LANE_STATUS 3 0x482 4 0 4294967295 LANE_14_RECEIVER_NUMBER_STATUS 0 2 LANE_14_MARGIN_TYPE_STATUS 3 5 LANE_14_USAGE_MODEL_STATUS 6 6 LANE_14_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_15_MARGINING_LANE_CNTL 3 0x484 4 0 4294967295 LANE_15_RECEIVER_NUMBER 0 2 LANE_15_MARGIN_TYPE 3 5 LANE_15_USAGE_MODEL 6 6 LANE_15_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_0_LANE_15_MARGINING_LANE_STATUS 3 0x486 4 0 4294967295 LANE_15_RECEIVER_NUMBER_STATUS 0 2 LANE_15_MARGIN_TYPE_STATUS 3 5 LANE_15_USAGE_MODEL_STATUS 6 6 LANE_15_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR_ENH_CAP_LIST 3 0x4c0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR1_CAP 3 0x4c4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR1_CNTL 3 0x4c8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR2_CAP 3 0x4cc 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR2_CNTL 3 0x4d0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR3_CAP 3 0x4d4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR3_CNTL 3 0x4d8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR4_CAP 3 0x4dc 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR4_CNTL 3 0x4e0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR5_CAP 3 0x4e4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR5_CNTL 3 0x4e8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR6_CAP 3 0x4ec 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VF_RESIZE_BAR6_CNTL 3 0x4f0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST_GPUIOV 3 0x500 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV 3 0x504 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_SRIOV_SHADOW 3 0x508 2 0 4294967295 VF_EN 0 0 VF_NUM 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_INTR_ENABLE 3 0x50c 18 0 4294967295 GFX_CMD_COMPLETE_INTR_EN 0 0 GFX_HANG_SELF_RECOVERED_INTR_EN 1 1 GFX_HANG_NEED_FLR_INTR_EN 2 2 GFX_VM_BUSY_TRANSITION_INTR_EN 3 3 UVD_CMD_COMPLETE_INTR_EN 8 8 UVD_HANG_SELF_RECOVERED_INTR_EN 9 9 UVD_HANG_NEED_FLR_INTR_EN 10 10 UVD_VM_BUSY_TRANSITION_INTR_EN 11 11 UVD1_CMD_COMPLETE_INTR_EN 12 12 UVD1_HANG_SELF_RECOVERED_INTR_EN 13 13 UVD1_HANG_NEED_FLR_INTR_EN 14 14 UVD1_VM_BUSY_TRANSITION_INTR_EN 15 15 VCE_CMD_COMPLETE_INTR_EN 16 16 VCE_HANG_SELF_RECOVERED_INTR_EN 17 17 VCE_HANG_NEED_FLR_INTR_EN 18 18 VCE_VM_BUSY_TRANSITION_INTR_EN 19 19 HVVM_MAILBOX_TRN_ACK_INTR_EN 24 24 HVVM_MAILBOX_RCV_VALID_INTR_EN 25 25 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_INTR_STATUS 3 0x510 18 0 4294967295 GFX_CMD_COMPLETE_INTR_STATUS 0 0 GFX_HANG_SELF_RECOVERED_INTR_STATUS 1 1 GFX_HANG_NEED_FLR_INTR_STATUS 2 2 GFX_VM_BUSY_TRANSITION_INTR_STATUS 3 3 UVD_CMD_COMPLETE_INTR_STATUS 8 8 UVD_HANG_SELF_RECOVERED_INTR_STATUS 9 9 UVD_HANG_NEED_FLR_INTR_STATUS 10 10 UVD_VM_BUSY_TRANSITION_INTR_STATUS 11 11 UVD1_CMD_COMPLETE_INTR_STATUS 12 12 UVD1_HANG_SELF_RECOVERED_INTR_STATUS 13 13 UVD1_HANG_NEED_FLR_INTR_STATUS 14 14 UVD1_VM_BUSY_TRANSITION_INTR_STATUS 15 15 VCE_CMD_COMPLETE_INTR_STATUS 16 16 VCE_HANG_SELF_RECOVERED_INTR_STATUS 17 17 VCE_HANG_NEED_FLR_INTR_STATUS 18 18 VCE_VM_BUSY_TRANSITION_INTR_STATUS 19 19 HVVM_MAILBOX_TRN_ACK_INTR_STATUS 24 24 HVVM_MAILBOX_RCV_VALID_INTR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL 3 0x514 1 0 4294967295 SOFT_PF_FLR 0 0 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW0 3 0x518 5 0 4294967295 VF_INDEX 0 7 TRN_MSG_DATA 8 11 TRN_MSG_VALID 15 15 RCV_MSG_DATA 16 19 RCV_MSG_ACK 24 24 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW1 3 0x51c 32 0 4294967295 VF0_TRN_ACK 0 0 VF0_RCV_VALID 1 1 VF1_TRN_ACK 2 2 VF1_RCV_VALID 3 3 VF2_TRN_ACK 4 4 VF2_RCV_VALID 5 5 VF3_TRN_ACK 6 6 VF3_RCV_VALID 7 7 VF4_TRN_ACK 8 8 VF4_RCV_VALID 9 9 VF5_TRN_ACK 10 10 VF5_RCV_VALID 11 11 VF6_TRN_ACK 12 12 VF6_RCV_VALID 13 13 VF7_TRN_ACK 14 14 VF7_RCV_VALID 15 15 VF8_TRN_ACK 16 16 VF8_RCV_VALID 17 17 VF9_TRN_ACK 18 18 VF9_RCV_VALID 19 19 VF10_TRN_ACK 20 20 VF10_RCV_VALID 21 21 VF11_TRN_ACK 22 22 VF11_RCV_VALID 23 23 VF12_TRN_ACK 24 24 VF12_RCV_VALID 25 25 VF13_TRN_ACK 26 26 VF13_RCV_VALID 27 27 VF14_TRN_ACK 28 28 VF14_RCV_VALID 29 29 VF15_TRN_ACK 30 30 VF15_RCV_VALID 31 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW2 3 0x520 32 0 4294967295 VF16_TRN_ACK 0 0 VF16_RCV_VALID 1 1 VF17_TRN_ACK 2 2 VF17_RCV_VALID 3 3 VF18_TRN_ACK 4 4 VF18_RCV_VALID 5 5 VF19_TRN_ACK 6 6 VF19_RCV_VALID 7 7 VF20_TRN_ACK 8 8 VF20_RCV_VALID 9 9 VF21_TRN_ACK 10 10 VF21_RCV_VALID 11 11 VF22_TRN_ACK 12 12 VF22_RCV_VALID 13 13 VF23_TRN_ACK 14 14 VF23_RCV_VALID 15 15 VF24_TRN_ACK 16 16 VF24_RCV_VALID 17 17 VF25_TRN_ACK 18 18 VF25_RCV_VALID 19 19 VF26_TRN_ACK 20 20 VF26_RCV_VALID 21 21 VF27_TRN_ACK 22 22 VF27_RCV_VALID 23 23 VF28_TRN_ACK 24 24 VF28_RCV_VALID 25 25 VF29_TRN_ACK 26 26 VF29_RCV_VALID 27 27 VF30_TRN_ACK 28 28 VF30_RCV_VALID 29 29 PF_TRN_ACK 30 30 PF_RCV_VALID 31 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_CONTEXT 3 0x524 3 0 4294967295 CONTEXT_SIZE 0 6 LOC 7 7 CONTEXT_OFFSET 10 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_TOTAL_FB 3 0x528 2 0 4294967295 TOTAL_FB_AVAILABLE 0 15 TOTAL_FB_CONSUMED 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_OFFSETS 3 0x52c 4 0 4294967295 UVDSCH_OFFSET 0 7 VCESCH_OFFSET 8 15 GFXSCH_OFFSET 16 23 UVD1SCH_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_REGION 3 0x530 2 0 4294967295 LFB_REGION 0 2 MAX_REGION 4 6 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_P2P_OVER_XGMI_ENABLE 3 0x534 2 0 4294967295 P2P_OVER_XGMI_ENABLE_VF 0 30 P2P_OVER_XGMI_ENABLE_PF 31 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF0_FB 3 0x538 2 0 4294967295 VF0_FB_SIZE 0 15 VF0_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF1_FB 3 0x53c 2 0 4294967295 VF1_FB_SIZE 0 15 VF1_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF2_FB 3 0x540 2 0 4294967295 VF2_FB_SIZE 0 15 VF2_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF3_FB 3 0x544 2 0 4294967295 VF3_FB_SIZE 0 15 VF3_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF4_FB 3 0x548 2 0 4294967295 VF4_FB_SIZE 0 15 VF4_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF5_FB 3 0x54c 2 0 4294967295 VF5_FB_SIZE 0 15 VF5_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF6_FB 3 0x550 2 0 4294967295 VF6_FB_SIZE 0 15 VF6_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF7_FB 3 0x554 2 0 4294967295 VF7_FB_SIZE 0 15 VF7_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF8_FB 3 0x558 2 0 4294967295 VF8_FB_SIZE 0 15 VF8_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF9_FB 3 0x55c 2 0 4294967295 VF9_FB_SIZE 0 15 VF9_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF10_FB 3 0x560 2 0 4294967295 VF10_FB_SIZE 0 15 VF10_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF11_FB 3 0x564 2 0 4294967295 VF11_FB_SIZE 0 15 VF11_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF12_FB 3 0x568 2 0 4294967295 VF12_FB_SIZE 0 15 VF12_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF13_FB 3 0x56c 2 0 4294967295 VF13_FB_SIZE 0 15 VF13_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF14_FB 3 0x570 2 0 4294967295 VF14_FB_SIZE 0 15 VF14_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF15_FB 3 0x574 2 0 4294967295 VF15_FB_SIZE 0 15 VF15_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF16_FB 3 0x578 2 0 4294967295 VF16_FB_SIZE 0 15 VF16_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF17_FB 3 0x57c 2 0 4294967295 VF17_FB_SIZE 0 15 VF17_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF18_FB 3 0x580 2 0 4294967295 VF18_FB_SIZE 0 15 VF18_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF19_FB 3 0x584 2 0 4294967295 VF19_FB_SIZE 0 15 VF19_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF20_FB 3 0x588 2 0 4294967295 VF20_FB_SIZE 0 15 VF20_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF21_FB 3 0x58c 2 0 4294967295 VF21_FB_SIZE 0 15 VF21_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF22_FB 3 0x590 2 0 4294967295 VF22_FB_SIZE 0 15 VF22_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF23_FB 3 0x594 2 0 4294967295 VF23_FB_SIZE 0 15 VF23_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF24_FB 3 0x598 2 0 4294967295 VF24_FB_SIZE 0 15 VF24_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF25_FB 3 0x59c 2 0 4294967295 VF25_FB_SIZE 0 15 VF25_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF26_FB 3 0x5a0 2 0 4294967295 VF26_FB_SIZE 0 15 VF26_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF27_FB 3 0x5a4 2 0 4294967295 VF27_FB_SIZE 0 15 VF27_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF28_FB 3 0x5a8 2 0 4294967295 VF28_FB_SIZE 0 15 VF28_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF29_FB 3 0x5ac 2 0 4294967295 VF29_FB_SIZE 0 15 VF29_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF30_FB 3 0x5b0 2 0 4294967295 VF30_FB_SIZE 0 15 VF30_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW0 3 0x5c0 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW1 3 0x5c4 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW2 3 0x5c8 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW3 3 0x5cc 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW4 3 0x5d0 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW5 3 0x5d4 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW6 3 0x5d8 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW7 3 0x5dc 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW8 3 0x5e0 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW0 3 0x5f0 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW1 3 0x5f4 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW2 3 0x5f8 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW3 3 0x5fc 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW4 3 0x600 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW5 3 0x604 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW6 3 0x608 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW7 3 0x60c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW8 3 0x610 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW0 3 0x620 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW1 3 0x624 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW2 3 0x628 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW3 3 0x62c 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW4 3 0x630 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW5 3 0x634 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW6 3 0x638 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW7 3 0x63c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW8 3 0x640 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW0 3 0x650 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW1 3 0x654 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW2 3 0x658 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW3 3 0x65c 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW4 3 0x660 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW5 3 0x664 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW6 3 0x668 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW7 3 0x66c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW8 3 0x670 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF2_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF2_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF2_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF2_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF2_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF2_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF2_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF2_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF2_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF2_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF2_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF2_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF2_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF2_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF2_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF2_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF2_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF2_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF2_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF2_0_VENDOR_CAP_LIST 3 0x48 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 cfgBIF_CFG_DEV0_EPF2_0_ADAPTER_ID_W 3 0x4c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF2_0_PMI_CAP_LIST 3 0x50 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF2_0_PMI_CAP 3 0x52 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgBIF_CFG_DEV0_EPF2_0_PMI_STATUS_CNTL 3 0x54 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgBIF_CFG_DEV0_EPF2_0_SBRN 3 0x60 1 0 4294967295 SBRN 0 7 cfgBIF_CFG_DEV0_EPF2_0_FLADJ 3 0x61 2 0 4294967295 FLADJ 0 5 NFC 6 6 cfgBIF_CFG_DEV0_EPF2_0_DBESL_DBESLD 3 0x62 2 0 4294967295 DBESL 0 3 DBESLD 4 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF2_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF2_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF2_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF2_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF2_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF2_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF2_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF2_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF2_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF2_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF2_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF2_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF2_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF2_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF2_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF2_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF2_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF2_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF2_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF2_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF2_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF2_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF2_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF2_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF2_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF2_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF2_0_SATA_CAP_0 3 0xd0 5 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 SATA_CAP_MINOR_REV 16 19 SATA_CAP_MAJOR_REV 20 23 SATA_CAP_RESERVED1 24 31 cfgBIF_CFG_DEV0_EPF2_0_SATA_CAP_1 3 0xd4 3 0 4294967295 SATA_CAP_BAR_LOC 0 3 SATA_CAP_BAR_OFFSET 4 23 SATA_CAP_RESERVED2 24 31 cfgBIF_CFG_DEV0_EPF2_0_SATA_IDP_INDEX 3 0xd8 3 0 4294967295 IDP_RESERVED1 0 1 IDP_INDEX 2 11 IDP_RESERVED2 12 31 cfgBIF_CFG_DEV0_EPF2_0_SATA_IDP_DATA 3 0xdc 1 0 4294967295 IDP_DATA 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF2_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF2_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF2_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF2_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR_ENH_CAP_LIST 3 0x200 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR1_CAP 3 0x204 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR1_CNTL 3 0x208 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR2_CAP 3 0x20c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR2_CNTL 3 0x210 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR3_CAP 3 0x214 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR3_CNTL 3 0x218 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR4_CAP 3 0x21c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR4_CNTL 3 0x220 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR5_CAP 3 0x224 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR5_CNTL 3 0x228 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR6_CAP 3 0x22c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_BAR6_CNTL 3 0x230 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_0_PCIE_PWR_BUDGET_ENH_CAP_LIST 3 0x240 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_PWR_BUDGET_DATA_SELECT 3 0x244 1 0 4294967295 DATA_SELECT 0 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_PWR_BUDGET_DATA 3 0x248 6 0 4294967295 BASE_POWER 0 7 DATA_SCALE 8 9 PM_SUB_STATE 10 12 PM_STATE 13 14 TYPE 15 17 POWER_RAIL 18 20 cfgBIF_CFG_DEV0_EPF2_0_PCIE_PWR_BUDGET_CAP 3 0x24c 1 0 4294967295 SYSTEM_ALLOCATED 0 0 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_ENH_CAP_LIST 3 0x250 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_CAP 3 0x254 5 0 4294967295 SUBSTATE_MAX 0 4 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_LATENCY_INDICATOR 3 0x258 1 0 4294967295 TRANS_LAT_INDICATOR_BITS 0 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_STATUS 3 0x25c 2 0 4294967295 SUBSTATE_STATUS 0 4 SUBSTATE_CNTL_ENABLED 8 8 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_CNTL 3 0x25e 1 0 4294967295 SUBSTATE_CNTL 0 4 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_0 3 0x260 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_1 3 0x261 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_2 3 0x262 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_3 3 0x263 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_4 3 0x264 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_5 3 0x265 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_6 3 0x266 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_7 3 0x267 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_0_PCIE_ACS_ENH_CAP_LIST 3 0x2a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_ACS_CAP 3 0x2a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_ACS_CNTL 3 0x2a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgBIF_CFG_DEV0_EPF2_0_PCIE_PASID_ENH_CAP_LIST 3 0x2d0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_PASID_CAP 3 0x2d4 3 0 4294967295 PASID_EXE_PERMISSION_SUPPORTED 1 1 PASID_PRIV_MODE_SUPPORTED 2 2 MAX_PASID_WIDTH 8 12 cfgBIF_CFG_DEV0_EPF2_0_PCIE_PASID_CNTL 3 0x2d6 3 0 4294967295 PASID_ENABLE 0 0 PASID_EXE_PERMISSION_ENABLE 1 1 PASID_PRIV_MODE_SUPPORTED_ENABLE 2 2 cfgBIF_CFG_DEV0_EPF2_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_REQR_ENH_CAP_LIST 3 0x370 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_REQR_CAP 3 0x374 6 0 4294967295 TPH_REQR_NO_ST_MODE_SUPPORTED 0 0 TPH_REQR_INT_VEC_MODE_SUPPORTED 1 1 TPH_REQR_DEV_SPC_MODE_SUPPORTED 2 2 TPH_REQR_EXTND_TPH_REQR_SUPPORED 8 8 TPH_REQR_ST_TABLE_LOCATION 9 10 TPH_REQR_ST_TABLE_SIZE 16 26 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_REQR_CNTL 3 0x378 2 0 4294967295 TPH_REQR_ST_MODE_SEL 0 2 TPH_REQR_EN 8 9 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_0 3 0x37c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_1 3 0x37e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_2 3 0x380 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_3 3 0x382 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_4 3 0x384 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_5 3 0x386 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_6 3 0x388 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_7 3 0x38a 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_8 3 0x38c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_9 3 0x38e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_10 3 0x390 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_11 3 0x392 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_12 3 0x394 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_13 3 0x396 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_14 3 0x398 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_15 3 0x39a 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_16 3 0x39c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_17 3 0x39e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_18 3 0x3a0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_19 3 0x3a2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_20 3 0x3a4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_21 3 0x3a6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_22 3 0x3a8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_23 3 0x3aa 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_24 3 0x3ac 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_25 3 0x3ae 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_26 3 0x3b0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_27 3 0x3b2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_28 3 0x3b4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_29 3 0x3b6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_30 3 0x3b8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_31 3 0x3ba 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_32 3 0x3bc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_33 3 0x3be 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_34 3 0x3c0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_35 3 0x3c2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_36 3 0x3c4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_37 3 0x3c6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_38 3 0x3c8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_39 3 0x3ca 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_40 3 0x3cc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_41 3 0x3ce 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_42 3 0x3d0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_43 3 0x3d2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_44 3 0x3d4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_45 3 0x3d6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_46 3 0x3d8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_47 3 0x3da 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_48 3 0x3dc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_49 3 0x3de 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_50 3 0x3e0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_51 3 0x3e2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_52 3 0x3e4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_53 3 0x3e6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_54 3 0x3e8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_55 3 0x3ea 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_56 3 0x3ec 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_57 3 0x3ee 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_58 3 0x3f0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_59 3 0x3f2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_60 3 0x3f4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_61 3 0x3f6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_62 3 0x3f8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_0_PCIE_TPH_ST_TABLE_63 3 0x3fa 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF3_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF3_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF3_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF3_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF3_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF3_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF3_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF3_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF3_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF3_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF3_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF3_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF3_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF3_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF3_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF3_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF3_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF3_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF3_0_VENDOR_CAP_LIST 3 0x48 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 cfgBIF_CFG_DEV0_EPF3_0_ADAPTER_ID_W 3 0x4c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF3_0_PMI_CAP_LIST 3 0x50 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF3_0_PMI_CAP 3 0x52 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgBIF_CFG_DEV0_EPF3_0_PMI_STATUS_CNTL 3 0x54 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgBIF_CFG_DEV0_EPF3_0_SBRN 3 0x60 1 0 4294967295 SBRN 0 7 cfgBIF_CFG_DEV0_EPF3_0_FLADJ 3 0x61 2 0 4294967295 FLADJ 0 5 NFC 6 6 cfgBIF_CFG_DEV0_EPF3_0_DBESL_DBESLD 3 0x62 2 0 4294967295 DBESL 0 3 DBESLD 4 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF3_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF3_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF3_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF3_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF3_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF3_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF3_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF3_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF3_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF3_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF3_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF3_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF3_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF3_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF3_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF3_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF3_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF3_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF3_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF3_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF3_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF3_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF3_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF3_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF3_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF3_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF3_0_SATA_CAP_0 3 0xd0 5 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 SATA_CAP_MINOR_REV 16 19 SATA_CAP_MAJOR_REV 20 23 SATA_CAP_RESERVED1 24 31 cfgBIF_CFG_DEV0_EPF3_0_SATA_CAP_1 3 0xd4 3 0 4294967295 SATA_CAP_BAR_LOC 0 3 SATA_CAP_BAR_OFFSET 4 23 SATA_CAP_RESERVED2 24 31 cfgBIF_CFG_DEV0_EPF3_0_SATA_IDP_INDEX 3 0xd8 3 0 4294967295 IDP_RESERVED1 0 1 IDP_INDEX 2 11 IDP_RESERVED2 12 31 cfgBIF_CFG_DEV0_EPF3_0_SATA_IDP_DATA 3 0xdc 1 0 4294967295 IDP_DATA 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF3_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF3_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF3_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF3_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR_ENH_CAP_LIST 3 0x200 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR1_CAP 3 0x204 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR1_CNTL 3 0x208 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR2_CAP 3 0x20c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR2_CNTL 3 0x210 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR3_CAP 3 0x214 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR3_CNTL 3 0x218 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR4_CAP 3 0x21c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR4_CNTL 3 0x220 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR5_CAP 3 0x224 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR5_CNTL 3 0x228 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR6_CAP 3 0x22c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_BAR6_CNTL 3 0x230 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_0_PCIE_PWR_BUDGET_ENH_CAP_LIST 3 0x240 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_PWR_BUDGET_DATA_SELECT 3 0x244 1 0 4294967295 DATA_SELECT 0 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_PWR_BUDGET_DATA 3 0x248 6 0 4294967295 BASE_POWER 0 7 DATA_SCALE 8 9 PM_SUB_STATE 10 12 PM_STATE 13 14 TYPE 15 17 POWER_RAIL 18 20 cfgBIF_CFG_DEV0_EPF3_0_PCIE_PWR_BUDGET_CAP 3 0x24c 1 0 4294967295 SYSTEM_ALLOCATED 0 0 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_ENH_CAP_LIST 3 0x250 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_CAP 3 0x254 5 0 4294967295 SUBSTATE_MAX 0 4 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_LATENCY_INDICATOR 3 0x258 1 0 4294967295 TRANS_LAT_INDICATOR_BITS 0 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_STATUS 3 0x25c 2 0 4294967295 SUBSTATE_STATUS 0 4 SUBSTATE_CNTL_ENABLED 8 8 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_CNTL 3 0x25e 1 0 4294967295 SUBSTATE_CNTL 0 4 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_0 3 0x260 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_1 3 0x261 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_2 3 0x262 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_3 3 0x263 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_4 3 0x264 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_5 3 0x265 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_6 3 0x266 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_DPA_SUBSTATE_PWR_ALLOC_7 3 0x267 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_0_PCIE_ACS_ENH_CAP_LIST 3 0x2a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_ACS_CAP 3 0x2a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_ACS_CNTL 3 0x2a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgBIF_CFG_DEV0_EPF3_0_PCIE_PASID_ENH_CAP_LIST 3 0x2d0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_PASID_CAP 3 0x2d4 3 0 4294967295 PASID_EXE_PERMISSION_SUPPORTED 1 1 PASID_PRIV_MODE_SUPPORTED 2 2 MAX_PASID_WIDTH 8 12 cfgBIF_CFG_DEV0_EPF3_0_PCIE_PASID_CNTL 3 0x2d6 3 0 4294967295 PASID_ENABLE 0 0 PASID_EXE_PERMISSION_ENABLE 1 1 PASID_PRIV_MODE_SUPPORTED_ENABLE 2 2 cfgBIF_CFG_DEV0_EPF3_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_REQR_ENH_CAP_LIST 3 0x370 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_REQR_CAP 3 0x374 6 0 4294967295 TPH_REQR_NO_ST_MODE_SUPPORTED 0 0 TPH_REQR_INT_VEC_MODE_SUPPORTED 1 1 TPH_REQR_DEV_SPC_MODE_SUPPORTED 2 2 TPH_REQR_EXTND_TPH_REQR_SUPPORED 8 8 TPH_REQR_ST_TABLE_LOCATION 9 10 TPH_REQR_ST_TABLE_SIZE 16 26 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_REQR_CNTL 3 0x378 2 0 4294967295 TPH_REQR_ST_MODE_SEL 0 2 TPH_REQR_EN 8 9 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_0 3 0x37c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_1 3 0x37e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_2 3 0x380 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_3 3 0x382 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_4 3 0x384 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_5 3 0x386 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_6 3 0x388 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_7 3 0x38a 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_8 3 0x38c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_9 3 0x38e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_10 3 0x390 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_11 3 0x392 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_12 3 0x394 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_13 3 0x396 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_14 3 0x398 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_15 3 0x39a 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_16 3 0x39c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_17 3 0x39e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_18 3 0x3a0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_19 3 0x3a2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_20 3 0x3a4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_21 3 0x3a6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_22 3 0x3a8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_23 3 0x3aa 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_24 3 0x3ac 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_25 3 0x3ae 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_26 3 0x3b0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_27 3 0x3b2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_28 3 0x3b4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_29 3 0x3b6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_30 3 0x3b8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_31 3 0x3ba 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_32 3 0x3bc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_33 3 0x3be 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_34 3 0x3c0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_35 3 0x3c2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_36 3 0x3c4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_37 3 0x3c6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_38 3 0x3c8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_39 3 0x3ca 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_40 3 0x3cc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_41 3 0x3ce 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_42 3 0x3d0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_43 3 0x3d2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_44 3 0x3d4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_45 3 0x3d6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_46 3 0x3d8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_47 3 0x3da 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_48 3 0x3dc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_49 3 0x3de 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_50 3 0x3e0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_51 3 0x3e2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_52 3 0x3e4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_53 3 0x3e6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_54 3 0x3e8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_55 3 0x3ea 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_56 3 0x3ec 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_57 3 0x3ee 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_58 3 0x3f0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_59 3 0x3f2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_60 3 0x3f4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_61 3 0x3f6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_62 3 0x3f8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_0_PCIE_TPH_ST_TABLE_63 3 0x3fa 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_SWDS0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_SWDS0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_SWDS0_COMMAND 3 0x4 11 0 4294967295 IOEN_DN 0 0 MEMEN_DN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_SWDS0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_SWDS0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_SWDS0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_SWDS0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_SWDS0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_SWDS0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_SWDS0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_SWDS0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_SWDS0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_SWDS0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_SWDS0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_SWDS0_SUB_BUS_NUMBER_LATENCY 3 0x18 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 cfgBIF_CFG_DEV0_SWDS0_IO_BASE_LIMIT 3 0x1c 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 cfgBIF_CFG_DEV0_SWDS0_SECONDARY_STATUS 3 0x1e 9 0 4294967295 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 RECEIVED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_SWDS0_MEM_BASE_LIMIT 3 0x20 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 cfgBIF_CFG_DEV0_SWDS0_PREF_BASE_LIMIT 3 0x24 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 cfgBIF_CFG_DEV0_SWDS0_PREF_BASE_UPPER 3 0x28 1 0 4294967295 PREF_BASE_UPPER 0 31 cfgBIF_CFG_DEV0_SWDS0_PREF_LIMIT_UPPER 3 0x2c 1 0 4294967295 PREF_LIMIT_UPPER 0 31 cfgBIF_CFG_DEV0_SWDS0_IO_BASE_LIMIT_HI 3 0x30 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 cfgBIF_CFG_DEV0_SWDS0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_SWDS0_ROM_BASE_ADDR 3 0x38 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_SWDS0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_SWDS0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_SWDS0_IRQ_BRIDGE_CNTL 3 0x3e 12 0 4294967295 PARITY_RESPONSE_EN 0 0 SERR_EN 1 1 ISA_EN 2 2 VGA_EN 3 3 VGA_DEC 4 4 MASTER_ABORT_MODE 5 5 SECONDARY_BUS_RESET 6 6 FAST_B2B_EN 7 7 PRIMARY_DISCARD_TIMER 8 8 SECONDARY_DISCARD_TIMER 9 9 DISCARD_TIMER_STATUS 10 10 DISCARD_TIMER_SERR_ENABLE 11 11 cfgBIF_CFG_DEV0_SWDS0_PMI_CAP_LIST 3 0x50 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_SWDS0_PMI_CAP 3 0x52 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgBIF_CFG_DEV0_SWDS0_PMI_STATUS_CNTL 3 0x54 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_CAP_LIST 3 0x58 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_CAP 3 0x5a 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_SWDS0_DEVICE_CAP 3 0x5c 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_SWDS0_DEVICE_CNTL 3 0x60 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 cfgBIF_CFG_DEV0_SWDS0_DEVICE_STATUS 3 0x62 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_SWDS0_LINK_CAP 3 0x64 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_SWDS0_LINK_CNTL 3 0x68 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_SWDS0_LINK_STATUS 3 0x6a 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_SWDS0_SLOT_CAP 3 0x6c 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 cfgBIF_CFG_DEV0_SWDS0_SLOT_CNTL 3 0x70 12 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 AUTO_SLOT_PWR_LIMIT_DISABLE 13 13 cfgBIF_CFG_DEV0_SWDS0_SLOT_STATUS 3 0x72 9 0 4294967295 ATTN_BUTTON_PRESSED 0 0 PWR_FAULT_DETECTED 1 1 MRL_SENSOR_CHANGED 2 2 PRESENCE_DETECT_CHANGED 3 3 COMMAND_COMPLETED 4 4 MRL_SENSOR_STATE 5 5 PRESENCE_DETECT_STATE 6 6 ELECTROMECH_INTERLOCK_STATUS 7 7 DL_STATE_CHANGED 8 8 cfgBIF_CFG_DEV0_SWDS0_DEVICE_CAP2 3 0x7c 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_SWDS0_DEVICE_CNTL2 3 0x80 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_SWDS0_DEVICE_STATUS2 3 0x82 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_SWDS0_LINK_CAP2 3 0x84 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_SWDS0_LINK_CNTL2 3 0x88 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_SWDS0_LINK_STATUS2 3 0x8a 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_SWDS0_SLOT_CAP2 3 0x8c 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_SWDS0_SLOT_CNTL2 3 0x90 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_SWDS0_SLOT_STATUS2 3 0x92 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_SWDS0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_SWDS0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_SWDS0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_SWDS0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_SWDS0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_SWDS0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_SWDS0_SSID_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_SWDS0_SSID_CAP 3 0xc4 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_VC_ENH_CAP_LIST 3 0x110 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_PORT_VC_CAP_REG1 3 0x114 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 cfgBIF_CFG_DEV0_SWDS0_PCIE_PORT_VC_CAP_REG2 3 0x118 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_PORT_VC_CNTL 3 0x11c 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 cfgBIF_CFG_DEV0_SWDS0_PCIE_PORT_VC_STATUS 3 0x11e 1 0 4294967295 VC_ARB_TABLE_STATUS 0 0 cfgBIF_CFG_DEV0_SWDS0_PCIE_VC0_RESOURCE_CAP 3 0x120 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_VC0_RESOURCE_CNTL 3 0x124 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_VC0_RESOURCE_STATUS 3 0x12a 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_SWDS0_PCIE_VC1_RESOURCE_CAP 3 0x12c 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_VC1_RESOURCE_CNTL 3 0x130 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_VC1_RESOURCE_STATUS 3 0x136 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_SWDS0_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 3 0x140 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_DEV_SERIAL_NUM_DW1 3 0x144 1 0 4294967295 SERIAL_NUMBER_LO 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_DEV_SERIAL_NUM_DW2 3 0x148 1 0 4294967295 SERIAL_NUMBER_HI 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_SWDS0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_SWDS0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_SWDS0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_SWDS0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_SECONDARY_ENH_CAP_LIST 3 0x270 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_LINK_CNTL3 3 0x274 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 ENABLE_LOWER_SKP_OS_GEN 9 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_ERROR_STATUS 3 0x278 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_0_EQUALIZATION_CNTL 3 0x27c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_1_EQUALIZATION_CNTL 3 0x27e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_2_EQUALIZATION_CNTL 3 0x280 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_3_EQUALIZATION_CNTL 3 0x282 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_4_EQUALIZATION_CNTL 3 0x284 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_5_EQUALIZATION_CNTL 3 0x286 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_6_EQUALIZATION_CNTL 3 0x288 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_7_EQUALIZATION_CNTL 3 0x28a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_8_EQUALIZATION_CNTL 3 0x28c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_9_EQUALIZATION_CNTL 3 0x28e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_10_EQUALIZATION_CNTL 3 0x290 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_11_EQUALIZATION_CNTL 3 0x292 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_12_EQUALIZATION_CNTL 3 0x294 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_13_EQUALIZATION_CNTL 3 0x296 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_14_EQUALIZATION_CNTL 3 0x298 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_LANE_15_EQUALIZATION_CNTL 3 0x29a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_ACS_ENH_CAP_LIST 3 0x2a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_ACS_CAP 3 0x2a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgBIF_CFG_DEV0_SWDS0_PCIE_ACS_CNTL 3 0x2a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgBIF_CFG_DEV0_SWDS0_PCIE_DLF_ENH_CAP_LIST 3 0x400 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS0_DATA_LINK_FEATURE_CAP 3 0x404 2 0 4294967295 LOCAL_DLF_SUPPORTED 0 22 DLF_EXCHANGE_ENABLE 31 31 cfgBIF_CFG_DEV0_SWDS0_DATA_LINK_FEATURE_STATUS 3 0x408 2 0 4294967295 REMOTE_DLF_SUPPORTED 0 22 REMOTE_DLF_SUPPORTED_VALID 31 31 cfgBIF_CFG_DEV0_SWDS0_PCIE_PHY_16GT_ENH_CAP_LIST 3 0x410 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS0_LINK_CAP_16GT 3 0x414 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_SWDS0_LINK_CNTL_16GT 3 0x418 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_SWDS0_LINK_STATUS_16GT 3 0x41c 5 0 4294967295 EQUALIZATION_COMPLETE_16GT 0 0 EQUALIZATION_PHASE1_SUCCESS_16GT 1 1 EQUALIZATION_PHASE2_SUCCESS_16GT 2 2 EQUALIZATION_PHASE3_SUCCESS_16GT 3 3 LINK_EQUALIZATION_REQUEST_16GT 4 4 cfgBIF_CFG_DEV0_SWDS0_LOCAL_PARITY_MISMATCH_STATUS_16GT 3 0x420 1 0 4294967295 LOCAL_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_SWDS0_RTM1_PARITY_MISMATCH_STATUS_16GT 3 0x424 1 0 4294967295 RTM1_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_SWDS0_RTM2_PARITY_MISMATCH_STATUS_16GT 3 0x428 1 0 4294967295 RTM2_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_SWDS0_LANE_0_EQUALIZATION_CNTL_16GT 3 0x430 2 0 4294967295 LANE_0_DSP_16GT_TX_PRESET 0 3 LANE_0_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_1_EQUALIZATION_CNTL_16GT 3 0x431 2 0 4294967295 LANE_1_DSP_16GT_TX_PRESET 0 3 LANE_1_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_2_EQUALIZATION_CNTL_16GT 3 0x432 2 0 4294967295 LANE_2_DSP_16GT_TX_PRESET 0 3 LANE_2_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_3_EQUALIZATION_CNTL_16GT 3 0x433 2 0 4294967295 LANE_3_DSP_16GT_TX_PRESET 0 3 LANE_3_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_4_EQUALIZATION_CNTL_16GT 3 0x434 2 0 4294967295 LANE_4_DSP_16GT_TX_PRESET 0 3 LANE_4_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_5_EQUALIZATION_CNTL_16GT 3 0x435 2 0 4294967295 LANE_5_DSP_16GT_TX_PRESET 0 3 LANE_5_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_6_EQUALIZATION_CNTL_16GT 3 0x436 2 0 4294967295 LANE_6_DSP_16GT_TX_PRESET 0 3 LANE_6_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_7_EQUALIZATION_CNTL_16GT 3 0x437 2 0 4294967295 LANE_7_DSP_16GT_TX_PRESET 0 3 LANE_7_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_8_EQUALIZATION_CNTL_16GT 3 0x438 2 0 4294967295 LANE_8_DSP_16GT_TX_PRESET 0 3 LANE_8_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_9_EQUALIZATION_CNTL_16GT 3 0x439 2 0 4294967295 LANE_9_DSP_16GT_TX_PRESET 0 3 LANE_9_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_10_EQUALIZATION_CNTL_16GT 3 0x43a 2 0 4294967295 LANE_10_DSP_16GT_TX_PRESET 0 3 LANE_10_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_11_EQUALIZATION_CNTL_16GT 3 0x43b 2 0 4294967295 LANE_11_DSP_16GT_TX_PRESET 0 3 LANE_11_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_12_EQUALIZATION_CNTL_16GT 3 0x43c 2 0 4294967295 LANE_12_DSP_16GT_TX_PRESET 0 3 LANE_12_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_13_EQUALIZATION_CNTL_16GT 3 0x43d 2 0 4294967295 LANE_13_DSP_16GT_TX_PRESET 0 3 LANE_13_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_14_EQUALIZATION_CNTL_16GT 3 0x43e 2 0 4294967295 LANE_14_DSP_16GT_TX_PRESET 0 3 LANE_14_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_LANE_15_EQUALIZATION_CNTL_16GT 3 0x43f 2 0 4294967295 LANE_15_DSP_16GT_TX_PRESET 0 3 LANE_15_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS0_PCIE_MARGINING_ENH_CAP_LIST 3 0x440 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS0_MARGINING_PORT_CAP 3 0x444 1 0 4294967295 MARGINING_USES_SOFTWARE 0 0 cfgBIF_CFG_DEV0_SWDS0_MARGINING_PORT_STATUS 3 0x446 2 0 4294967295 MARGINING_READY 0 0 MARGINING_SOFTWARE_READY 1 1 cfgBIF_CFG_DEV0_SWDS0_LANE_0_MARGINING_LANE_CNTL 3 0x448 4 0 4294967295 LANE_0_RECEIVER_NUMBER 0 2 LANE_0_MARGIN_TYPE 3 5 LANE_0_USAGE_MODEL 6 6 LANE_0_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_0_MARGINING_LANE_STATUS 3 0x44a 4 0 4294967295 LANE_0_RECEIVER_NUMBER_STATUS 0 2 LANE_0_MARGIN_TYPE_STATUS 3 5 LANE_0_USAGE_MODEL_STATUS 6 6 LANE_0_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_1_MARGINING_LANE_CNTL 3 0x44c 4 0 4294967295 LANE_1_RECEIVER_NUMBER 0 2 LANE_1_MARGIN_TYPE 3 5 LANE_1_USAGE_MODEL 6 6 LANE_1_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_1_MARGINING_LANE_STATUS 3 0x44e 4 0 4294967295 LANE_1_RECEIVER_NUMBER_STATUS 0 2 LANE_1_MARGIN_TYPE_STATUS 3 5 LANE_1_USAGE_MODEL_STATUS 6 6 LANE_1_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_2_MARGINING_LANE_CNTL 3 0x450 4 0 4294967295 LANE_2_RECEIVER_NUMBER 0 2 LANE_2_MARGIN_TYPE 3 5 LANE_2_USAGE_MODEL 6 6 LANE_2_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_2_MARGINING_LANE_STATUS 3 0x452 4 0 4294967295 LANE_2_RECEIVER_NUMBER_STATUS 0 2 LANE_2_MARGIN_TYPE_STATUS 3 5 LANE_2_USAGE_MODEL_STATUS 6 6 LANE_2_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_3_MARGINING_LANE_CNTL 3 0x454 4 0 4294967295 LANE_3_RECEIVER_NUMBER 0 2 LANE_3_MARGIN_TYPE 3 5 LANE_3_USAGE_MODEL 6 6 LANE_3_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_3_MARGINING_LANE_STATUS 3 0x456 4 0 4294967295 LANE_3_RECEIVER_NUMBER_STATUS 0 2 LANE_3_MARGIN_TYPE_STATUS 3 5 LANE_3_USAGE_MODEL_STATUS 6 6 LANE_3_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_4_MARGINING_LANE_CNTL 3 0x458 4 0 4294967295 LANE_4_RECEIVER_NUMBER 0 2 LANE_4_MARGIN_TYPE 3 5 LANE_4_USAGE_MODEL 6 6 LANE_4_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_4_MARGINING_LANE_STATUS 3 0x45a 4 0 4294967295 LANE_4_RECEIVER_NUMBER_STATUS 0 2 LANE_4_MARGIN_TYPE_STATUS 3 5 LANE_4_USAGE_MODEL_STATUS 6 6 LANE_4_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_5_MARGINING_LANE_CNTL 3 0x45c 4 0 4294967295 LANE_5_RECEIVER_NUMBER 0 2 LANE_5_MARGIN_TYPE 3 5 LANE_5_USAGE_MODEL 6 6 LANE_5_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_5_MARGINING_LANE_STATUS 3 0x45e 4 0 4294967295 LANE_5_RECEIVER_NUMBER_STATUS 0 2 LANE_5_MARGIN_TYPE_STATUS 3 5 LANE_5_USAGE_MODEL_STATUS 6 6 LANE_5_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_6_MARGINING_LANE_CNTL 3 0x460 4 0 4294967295 LANE_6_RECEIVER_NUMBER 0 2 LANE_6_MARGIN_TYPE 3 5 LANE_6_USAGE_MODEL 6 6 LANE_6_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_6_MARGINING_LANE_STATUS 3 0x462 4 0 4294967295 LANE_6_RECEIVER_NUMBER_STATUS 0 2 LANE_6_MARGIN_TYPE_STATUS 3 5 LANE_6_USAGE_MODEL_STATUS 6 6 LANE_6_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_7_MARGINING_LANE_CNTL 3 0x464 4 0 4294967295 LANE_7_RECEIVER_NUMBER 0 2 LANE_7_MARGIN_TYPE 3 5 LANE_7_USAGE_MODEL 6 6 LANE_7_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_7_MARGINING_LANE_STATUS 3 0x466 4 0 4294967295 LANE_7_RECEIVER_NUMBER_STATUS 0 2 LANE_7_MARGIN_TYPE_STATUS 3 5 LANE_7_USAGE_MODEL_STATUS 6 6 LANE_7_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_8_MARGINING_LANE_CNTL 3 0x468 4 0 4294967295 LANE_8_RECEIVER_NUMBER 0 2 LANE_8_MARGIN_TYPE 3 5 LANE_8_USAGE_MODEL 6 6 LANE_8_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_8_MARGINING_LANE_STATUS 3 0x46a 4 0 4294967295 LANE_8_RECEIVER_NUMBER_STATUS 0 2 LANE_8_MARGIN_TYPE_STATUS 3 5 LANE_8_USAGE_MODEL_STATUS 6 6 LANE_8_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_9_MARGINING_LANE_CNTL 3 0x46c 4 0 4294967295 LANE_9_RECEIVER_NUMBER 0 2 LANE_9_MARGIN_TYPE 3 5 LANE_9_USAGE_MODEL 6 6 LANE_9_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_9_MARGINING_LANE_STATUS 3 0x46e 4 0 4294967295 LANE_9_RECEIVER_NUMBER_STATUS 0 2 LANE_9_MARGIN_TYPE_STATUS 3 5 LANE_9_USAGE_MODEL_STATUS 6 6 LANE_9_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_10_MARGINING_LANE_CNTL 3 0x470 4 0 4294967295 LANE_10_RECEIVER_NUMBER 0 2 LANE_10_MARGIN_TYPE 3 5 LANE_10_USAGE_MODEL 6 6 LANE_10_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_10_MARGINING_LANE_STATUS 3 0x472 4 0 4294967295 LANE_10_RECEIVER_NUMBER_STATUS 0 2 LANE_10_MARGIN_TYPE_STATUS 3 5 LANE_10_USAGE_MODEL_STATUS 6 6 LANE_10_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_11_MARGINING_LANE_CNTL 3 0x474 4 0 4294967295 LANE_11_RECEIVER_NUMBER 0 2 LANE_11_MARGIN_TYPE 3 5 LANE_11_USAGE_MODEL 6 6 LANE_11_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_11_MARGINING_LANE_STATUS 3 0x476 4 0 4294967295 LANE_11_RECEIVER_NUMBER_STATUS 0 2 LANE_11_MARGIN_TYPE_STATUS 3 5 LANE_11_USAGE_MODEL_STATUS 6 6 LANE_11_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_12_MARGINING_LANE_CNTL 3 0x478 4 0 4294967295 LANE_12_RECEIVER_NUMBER 0 2 LANE_12_MARGIN_TYPE 3 5 LANE_12_USAGE_MODEL 6 6 LANE_12_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_12_MARGINING_LANE_STATUS 3 0x47a 4 0 4294967295 LANE_12_RECEIVER_NUMBER_STATUS 0 2 LANE_12_MARGIN_TYPE_STATUS 3 5 LANE_12_USAGE_MODEL_STATUS 6 6 LANE_12_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_13_MARGINING_LANE_CNTL 3 0x47c 4 0 4294967295 LANE_13_RECEIVER_NUMBER 0 2 LANE_13_MARGIN_TYPE 3 5 LANE_13_USAGE_MODEL 6 6 LANE_13_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_13_MARGINING_LANE_STATUS 3 0x47e 4 0 4294967295 LANE_13_RECEIVER_NUMBER_STATUS 0 2 LANE_13_MARGIN_TYPE_STATUS 3 5 LANE_13_USAGE_MODEL_STATUS 6 6 LANE_13_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_14_MARGINING_LANE_CNTL 3 0x480 4 0 4294967295 LANE_14_RECEIVER_NUMBER 0 2 LANE_14_MARGIN_TYPE 3 5 LANE_14_USAGE_MODEL 6 6 LANE_14_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_14_MARGINING_LANE_STATUS 3 0x482 4 0 4294967295 LANE_14_RECEIVER_NUMBER_STATUS 0 2 LANE_14_MARGIN_TYPE_STATUS 3 5 LANE_14_USAGE_MODEL_STATUS 6 6 LANE_14_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_15_MARGINING_LANE_CNTL 3 0x484 4 0 4294967295 LANE_15_RECEIVER_NUMBER 0 2 LANE_15_MARGIN_TYPE 3 5 LANE_15_USAGE_MODEL 6 6 LANE_15_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS0_LANE_15_MARGINING_LANE_STATUS 3 0x486 4 0 4294967295 LANE_15_RECEIVER_NUMBER_STATUS 0 2 LANE_15_MARGIN_TYPE_STATUS 3 5 LANE_15_USAGE_MODEL_STATUS 6 6 LANE_15_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF0_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF0_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF0_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF0_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF0_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF1_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF1_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF1_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF1_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF1_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF1_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF2_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF2_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF2_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF2_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF2_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF2_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF3_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF3_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF3_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF3_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF3_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF3_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF4_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF4_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF4_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF4_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF4_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF4_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF5_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF5_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF5_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF5_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF5_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF5_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF6_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF6_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF6_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF6_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF6_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF6_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF7_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF7_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF7_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF7_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF7_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF7_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF8_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF8_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF8_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF8_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF8_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF8_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF9_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF9_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF9_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF9_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF9_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF9_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF10_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF10_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF10_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF10_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF10_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF10_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF11_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF11_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF11_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF11_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF11_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF11_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF12_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF12_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF12_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF12_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF12_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF12_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF13_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF13_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF13_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF13_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF13_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF13_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF14_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF14_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF14_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF14_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF14_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF14_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF15_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF15_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF15_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF15_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF15_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF15_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF16_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF16_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF16_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF16_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF16_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF16_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF17_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF17_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF17_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF17_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF17_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF17_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF18_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF18_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF18_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF18_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF18_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF18_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF19_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF19_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF19_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF19_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF19_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF19_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF20_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF20_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF20_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF20_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF20_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF20_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF21_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF21_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF21_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF21_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF21_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF21_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF22_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF22_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF22_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF22_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF22_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF22_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF23_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF23_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF23_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF23_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF23_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF23_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF24_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF24_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF24_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF24_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF24_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF24_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF25_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF25_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF25_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF25_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF25_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF25_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF26_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF26_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF26_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF26_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF26_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF26_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF27_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF27_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF27_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF27_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF27_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF27_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF28_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF28_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF28_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF28_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF28_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF28_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF29_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF29_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF29_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF29_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF29_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF29_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF30_0_VENDOR_ID 3 0x0 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_DEVICE_ID 3 0x2 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_COMMAND 3 0x4 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF30_0_STATUS 3 0x6 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_REVISION_ID 3 0x8 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_PROG_INTERFACE 3 0x9 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_SUB_CLASS 3 0xa 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_BASE_CLASS 3 0xb 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_CACHE_LINE 3 0xc 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_LATENCY 3 0xd 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_HEADER 3 0xe 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_BIST 3 0xf 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_BASE_ADDR_1 3 0x10 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_BASE_ADDR_2 3 0x14 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_BASE_ADDR_3 3 0x18 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_BASE_ADDR_4 3 0x1c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_BASE_ADDR_5 3 0x20 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_BASE_ADDR_6 3 0x24 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_CARDBUS_CIS_PTR 3 0x28 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_ADAPTER_ID 3 0x2c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_ROM_BASE_ADDR 3 0x30 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_CAP_PTR 3 0x34 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_INTERRUPT_LINE 3 0x3c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_INTERRUPT_PIN 3 0x3d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_MIN_GRANT 3 0x3e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_MAX_LATENCY 3 0x3f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_CAP_LIST 3 0x64 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_CAP 3 0x66 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF30_0_DEVICE_CAP 3 0x68 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF30_0_DEVICE_CNTL 3 0x6c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_DEVICE_STATUS 3 0x6e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF30_0_LINK_CAP 3 0x70 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_LINK_CNTL 3 0x74 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_LINK_STATUS 3 0x76 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_DEVICE_CAP2 3 0x88 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_DEVICE_CNTL2 3 0x8c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_DEVICE_STATUS2 3 0x8e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_LINK_CAP2 3 0x90 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_LINK_CNTL2 3 0x94 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_LINK_STATUS2 3 0x96 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSI_CAP_LIST 3 0xa0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSI_MSG_CNTL 3 0xa2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSI_MSG_ADDR_LO 3 0xa4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSI_MSG_ADDR_HI 3 0xa8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSI_MSG_DATA 3 0xa8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSI_MASK 3 0xac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSI_MSG_DATA_64 3 0xac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSI_MASK_64 3 0xb0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSI_PENDING 3 0xb0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSI_PENDING_64 3 0xb4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSIX_CAP_LIST 3 0xc0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSIX_MSG_CNTL 3 0xc2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSIX_TABLE 3 0xc4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_MSIX_PBA 3 0xc8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0x100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_VENDOR_SPECIFIC_HDR 3 0x104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_VENDOR_SPECIFIC1 3 0x108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_VENDOR_SPECIFIC2 3 0x10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0x150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_UNCORR_ERR_STATUS 3 0x154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_UNCORR_ERR_MASK 3 0x158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_UNCORR_ERR_SEVERITY 3 0x15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_CORR_ERR_STATUS 3 0x160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_CORR_ERR_MASK 3 0x164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_ADV_ERR_CAP_CNTL 3 0x168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_HDR_LOG0 3 0x16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_HDR_LOG1 3 0x170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_HDR_LOG2 3 0x174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_HDR_LOG3 3 0x178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_TLP_PREFIX_LOG0 3 0x188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_TLP_PREFIX_LOG1 3 0x18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_TLP_PREFIX_LOG2 3 0x190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_TLP_PREFIX_LOG3 3 0x194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_ATS_ENH_CAP_LIST 3 0x2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_ATS_CAP 3 0x2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_ATS_CNTL 3 0x2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_ARI_ENH_CAP_LIST 3 0x328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_ARI_CAP 3 0x32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF30_0_PCIE_ARI_CNTL 3 0x32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 mmBIF_BX_DEV0_EPF0_VF0_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF0_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF0_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF0_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF0_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF0_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF0_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF0_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF0_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF0_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF0_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF0_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF0_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF0_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF0_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF0_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF0_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF0_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF0_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF0_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF0_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF1_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF1_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF1_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF1_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF1_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF1_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF1_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF1_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF1_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF1_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF1_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF1_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF1_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF1_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF1_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF1_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF1_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF1_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF1_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF1_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF1_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF1_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF1_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF1_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF2_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF2_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF2_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF2_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF2_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF2_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF2_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF2_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF2_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF2_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF2_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF2_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF2_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF2_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF2_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF2_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF2_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF2_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF2_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF2_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF2_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF2_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF2_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF2_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF3_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF3_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF3_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF3_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF3_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF3_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF3_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF3_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF3_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF3_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF3_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF3_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF3_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF3_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF3_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF3_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF3_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF3_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF3_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF3_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF3_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF3_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF3_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF3_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF4_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF4_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF4_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF4_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF4_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF4_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF4_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF4_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF4_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF4_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF4_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF4_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF4_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF4_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF4_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF4_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF4_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF4_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF4_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF4_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF4_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF4_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF4_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF4_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF5_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF5_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF5_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF5_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF5_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF5_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF5_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF5_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF5_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF5_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF5_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF5_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF5_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF5_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF5_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF5_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF5_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF5_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF5_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF5_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF5_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF5_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF5_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF5_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF6_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF6_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF6_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF6_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF6_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF6_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF6_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF6_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF6_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF6_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF6_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF6_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF6_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF6_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF6_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF6_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF6_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF6_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF6_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF6_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF6_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF6_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF6_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF6_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF7_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF7_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF7_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF7_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF7_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF7_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF7_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF7_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF7_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF7_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF7_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF7_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF7_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF7_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF7_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF7_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF7_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF7_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF7_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF7_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF7_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF7_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF7_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF7_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF8_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF8_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF8_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF8_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF8_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF8_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF8_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF8_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF8_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF8_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF8_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF8_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF8_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF8_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF8_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF8_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF8_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF8_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF8_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF8_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF8_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF8_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF8_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF8_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF9_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF9_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF9_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF9_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF9_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF9_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF9_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF9_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF9_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF9_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF9_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF9_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF9_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF9_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF9_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF9_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF9_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF9_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF9_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF9_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF9_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF9_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF9_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF9_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF10_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF10_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF10_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF10_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF10_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF10_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF10_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF10_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF10_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF10_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF10_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF10_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF10_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF10_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF10_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF10_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF10_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF10_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF10_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF10_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF10_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF10_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF10_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF10_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF11_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF11_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF11_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF11_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF11_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF11_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF11_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF11_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF11_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF11_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF11_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF11_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF11_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF11_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF11_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF11_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF11_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF11_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF11_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF11_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF11_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF11_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF11_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF11_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF12_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF12_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF12_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF12_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF12_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF12_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF12_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF12_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF12_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF12_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF12_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF12_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF12_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF12_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF12_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF12_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF12_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF12_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF12_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF12_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF12_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF12_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF12_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF12_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF13_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF13_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF13_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF13_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF13_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF13_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF13_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF13_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF13_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF13_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF13_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF13_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF13_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF13_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF13_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF13_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF13_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF13_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF13_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF13_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF13_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF13_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF13_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF13_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF14_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF14_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF14_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF14_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF14_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF14_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF14_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF14_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF14_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF14_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF14_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF14_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF14_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF14_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF14_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF14_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF14_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF14_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF14_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF14_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF14_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF14_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF14_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF14_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF15_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF15_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF15_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF15_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF15_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF15_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF15_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF15_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF15_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF15_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF15_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF15_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF15_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF15_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF15_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF15_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF15_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF15_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF15_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF15_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF15_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF15_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF15_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF15_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF16_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF16_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF16_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF16_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF16_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF16_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF16_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF16_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF16_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF16_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF16_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF16_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF16_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF16_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF16_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF16_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF16_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF16_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF16_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF16_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF16_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF16_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF16_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF16_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF17_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF17_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF17_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF17_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF17_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF17_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF17_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF17_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF17_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF17_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF17_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF17_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF17_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF17_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF17_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF17_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF17_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF17_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF17_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF17_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF17_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF17_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF17_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF17_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF18_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF18_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF18_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF18_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF18_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF18_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF18_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF18_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF18_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF18_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF18_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF18_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF18_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF18_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF18_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF18_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF18_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF18_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF18_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF18_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF18_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF18_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF18_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF18_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF19_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF19_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF19_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF19_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF19_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF19_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF19_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF19_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF19_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF19_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF19_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF19_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF19_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF19_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF19_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF19_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF19_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF19_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF19_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF19_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF19_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF19_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF19_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF19_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF20_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF20_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF20_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF20_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF20_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF20_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF20_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF20_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF20_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF20_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF20_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF20_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF20_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF20_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF20_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF20_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF20_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF20_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF20_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF20_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF20_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF20_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF20_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF20_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF21_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF21_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF21_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF21_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF21_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF21_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF21_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF21_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF21_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF21_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF21_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF21_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF21_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF21_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF21_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF21_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF21_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF21_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF21_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF21_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF21_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF21_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF21_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF21_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF22_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF22_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF22_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF22_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF22_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF22_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF22_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF22_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF22_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF22_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF22_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF22_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF22_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF22_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF22_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF22_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF22_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF22_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF22_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF22_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF22_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF22_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF22_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF22_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF23_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF23_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF23_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF23_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF23_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF23_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF23_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF23_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF23_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF23_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF23_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF23_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF23_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF23_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF23_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF23_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF23_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF23_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF23_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF23_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF23_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF23_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF23_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF23_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF24_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF24_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF24_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF24_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF24_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF24_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF24_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF24_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF24_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF24_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF24_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF24_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF24_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF24_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF24_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF24_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF24_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF24_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF24_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF24_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF24_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF24_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF24_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF24_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF25_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF25_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF25_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF25_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF25_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF25_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF25_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF25_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF25_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF25_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF25_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF25_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF25_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF25_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF25_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF25_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF25_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF25_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF25_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF25_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF25_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF25_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF25_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF25_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF26_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF26_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF26_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF26_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF26_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF26_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF26_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF26_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF26_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF26_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF26_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF26_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF26_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF26_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF26_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF26_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF26_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF26_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF26_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF26_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF26_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF26_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF26_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF26_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF27_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF27_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF27_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF27_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF27_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF27_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF27_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF27_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF27_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF27_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF27_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF27_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF27_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF27_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF27_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF27_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF27_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF27_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF27_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF27_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF27_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF27_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF27_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF27_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF28_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF28_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF28_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF28_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF28_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF28_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF28_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF28_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF28_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF28_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF28_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF28_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF28_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF28_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF28_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF28_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF28_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF28_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF28_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF28_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF28_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF28_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF28_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF28_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF29_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF29_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF29_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF29_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF29_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF29_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF29_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF29_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF29_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF29_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF29_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF29_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF29_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF29_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF29_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF29_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF29_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF29_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF29_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF29_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF29_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF29_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF29_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF29_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 mmBIF_BX_DEV0_EPF0_VF30_MM_INDEX 0 0x0 2 0 0 MM_OFFSET 0 30 MM_APER 31 31 mmBIF_BX_DEV0_EPF0_VF30_MM_DATA 0 0x1 1 0 0 MM_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF30_MM_INDEX_HI 0 0x6 1 0 0 MM_OFFSET_HI 0 31 mmRCC_DEV0_EPF0_VF30_RCC_ERR_LOG 0 0x85 2 0 2 INVALID_REG_ACCESS_IN_SRIOV_STATUS 0 0 DOORBELL_READ_ACCESS_STATUS 1 1 mmRCC_DEV0_EPF0_VF30_RCC_DOORBELL_APER_EN 0 0xc0 1 0 2 BIF_DOORBELL_APER_EN 0 0 mmRCC_DEV0_EPF0_VF30_RCC_CONFIG_MEMSIZE 0 0xc3 1 0 2 CONFIG_MEMSIZE 0 31 mmRCC_DEV0_EPF0_VF30_RCC_CONFIG_RESERVED 0 0xc4 1 0 2 CONFIG_RESERVED 0 31 mmRCC_DEV0_EPF0_VF30_RCC_IOV_FUNC_IDENTIFIER 0 0xc5 2 0 2 FUNC_IDENTIFIER 0 0 IOV_ENABLE 31 31 mmBIF_BX_DEV0_EPF0_VF30_BIF_BME_STATUS 0 0xeb 2 0 2 DMA_ON_BME_LOW 0 0 CLEAR_DMA_ON_BME_LOW 16 16 mmBIF_BX_DEV0_EPF0_VF30_BIF_ATOMIC_ERR_LOG 0 0xec 8 0 2 UR_ATOMIC_OPCODE 0 0 UR_ATOMIC_REQEN_LOW 1 1 UR_ATOMIC_LENGTH 2 2 UR_ATOMIC_NR 3 3 CLEAR_UR_ATOMIC_OPCODE 16 16 CLEAR_UR_ATOMIC_REQEN_LOW 17 17 CLEAR_UR_ATOMIC_LENGTH 18 18 CLEAR_UR_ATOMIC_NR 19 19 mmBIF_BX_DEV0_EPF0_VF30_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 0xf3 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0 31 mmBIF_BX_DEV0_EPF0_VF30_DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 0xf4 1 0 2 DOORBELL_SELFRING_GPA_APER_BASE_LOW 0 31 mmBIF_BX_DEV0_EPF0_VF30_DOORBELL_SELFRING_GPA_APER_CNTL 0 0xf5 3 0 2 DOORBELL_SELFRING_GPA_APER_EN 0 0 DOORBELL_SELFRING_GPA_APER_MODE 1 1 DOORBELL_SELFRING_GPA_APER_SIZE 8 19 mmBIF_BX_DEV0_EPF0_VF30_HDP_REG_COHERENCY_FLUSH_CNTL 0 0xf6 1 0 2 HDP_REG_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF30_HDP_MEM_COHERENCY_FLUSH_CNTL 0 0xf7 1 0 2 HDP_MEM_FLUSH_ADDR 0 0 mmBIF_BX_DEV0_EPF0_VF30_GPU_HDP_FLUSH_REQ 0 0x106 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF30_GPU_HDP_FLUSH_DONE 0 0x107 12 0 2 CP0 0 0 CP1 1 1 CP2 2 2 CP3 3 3 CP4 4 4 CP5 5 5 CP6 6 6 CP7 7 7 CP8 8 8 CP9 9 9 SDMA0 10 10 SDMA1 11 11 mmBIF_BX_DEV0_EPF0_VF30_BIF_TRANS_PENDING 0 0x108 2 0 2 BIF_MST_TRANS_PENDING 0 0 BIF_SLV_TRANS_PENDING 1 1 mmBIF_BX_DEV0_EPF0_VF30_NBIF_GFX_ADDR_LUT_BYPASS 0 0x112 1 0 2 LUT_BYPASS 0 0 mmBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_TRN_DW0 0 0x136 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_TRN_DW1 0 0x137 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_TRN_DW2 0 0x138 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_TRN_DW3 0 0x139 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_RCV_DW0 0 0x13a 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_RCV_DW1 0 0x13b 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_RCV_DW2 0 0x13c 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_RCV_DW3 0 0x13d 1 0 2 MSGBUF_DATA 0 31 mmBIF_BX_DEV0_EPF0_VF30_MAILBOX_CONTROL 0 0x13e 4 0 2 TRN_MSG_VALID 0 0 TRN_MSG_ACK 1 1 RCV_MSG_VALID 8 8 RCV_MSG_ACK 9 9 mmBIF_BX_DEV0_EPF0_VF30_MAILBOX_INT_CNTL 0 0x13f 2 0 2 VALID_INT_EN 0 0 ACK_INT_EN 1 1 mmBIF_BX_DEV0_EPF0_VF30_BIF_VMHV_MAILBOX 0 0x140 8 0 2 VMHV_MAILBOX_TRN_ACK_INTR_EN 0 0 VMHV_MAILBOX_RCV_VALID_INTR_EN 1 1 VMHV_MAILBOX_TRN_MSG_DATA 8 11 VMHV_MAILBOX_TRN_MSG_VALID 15 15 VMHV_MAILBOX_RCV_MSG_DATA 16 19 VMHV_MAILBOX_RCV_MSG_VALID 23 23 VMHV_MAILBOX_TRN_MSG_ACK 24 24 VMHV_MAILBOX_RCV_MSG_ACK 25 25 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT0_ADDR_LO 0 0x400 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT0_ADDR_HI 0 0x401 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT0_MSG_DATA 0 0x402 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT0_CONTROL 0 0x403 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT1_ADDR_LO 0 0x404 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT1_ADDR_HI 0 0x405 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT1_MSG_DATA 0 0x406 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT1_CONTROL 0 0x407 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT2_ADDR_LO 0 0x408 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT2_ADDR_HI 0 0x409 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT2_MSG_DATA 0 0x40a 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT2_CONTROL 0 0x40b 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT3_ADDR_LO 0 0x40c 1 0 3 MSG_ADDR_LO 2 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT3_ADDR_HI 0 0x40d 1 0 3 MSG_ADDR_HI 0 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT3_MSG_DATA 0 0x40e 1 0 3 MSG_DATA 0 31 mmRCC_DEV0_EPF0_VF30_GFXMSIX_VECT3_CONTROL 0 0x40f 1 0 3 MASK_BIT 0 0 mmRCC_DEV0_EPF0_VF30_GFXMSIX_PBA 0 0x800 4 0 3 MSIX_PENDING_BITS_0 0 0 MSIX_PENDING_BITS_1 1 1 MSIX_PENDING_BITS_2 2 2 MSIX_PENDING_BITS_3 3 3 cfgBIF_BX_DEV0_EPF0_VF0_MM_INDEX 3 0xd0000000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MM_DATA 3 0xd0000004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MM_INDEX_HI 3 0xd0000018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_RCC_ERR_LOG 3 0xd0003694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_RCC_DOORBELL_APER_EN 3 0xd0003780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_RCC_CONFIG_MEMSIZE 3 0xd000378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_RCC_CONFIG_RESERVED 3 0xd0003790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_RCC_IOV_FUNC_IDENTIFIER 3 0xd0003794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_BIF_BME_STATUS 3 0xd000382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_BIF_ATOMIC_ERR_LOG 3 0xd0003830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd000384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0003850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0003854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0003858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd000385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_GPU_HDP_FLUSH_REQ 3 0xd0003898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_GPU_HDP_FLUSH_DONE 3 0xd000389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_BIF_TRANS_PENDING 3 0xd00038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd00038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_TRN_DW0 3 0xd0003958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_TRN_DW1 3 0xd000395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_TRN_DW2 3 0xd0003960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_TRN_DW3 3 0xd0003964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_RCV_DW0 3 0xd0003968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_RCV_DW1 3 0xd000396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_RCV_DW2 3 0xd0003970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MAILBOX_MSGBUF_RCV_DW3 3 0xd0003974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MAILBOX_CONTROL 3 0xd0003978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_MAILBOX_INT_CNTL 3 0xd000397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF0_BIF_VMHV_MAILBOX 3 0xd0003980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT0_ADDR_LO 3 0xd0042000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT0_ADDR_HI 3 0xd0042004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT0_MSG_DATA 3 0xd0042008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT0_CONTROL 3 0xd004200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT1_ADDR_LO 3 0xd0042010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT1_ADDR_HI 3 0xd0042014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT1_MSG_DATA 3 0xd0042018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT1_CONTROL 3 0xd004201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT2_ADDR_LO 3 0xd0042020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT2_ADDR_HI 3 0xd0042024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT2_MSG_DATA 3 0xd0042028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT2_CONTROL 3 0xd004202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT3_ADDR_LO 3 0xd0042030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT3_ADDR_HI 3 0xd0042034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT3_MSG_DATA 3 0xd0042038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_VECT3_CONTROL 3 0xd004203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF0_GFXMSIX_PBA 3 0xd0043000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MM_INDEX 3 0xd0080000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MM_DATA 3 0xd0080004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MM_INDEX_HI 3 0xd0080018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_RCC_ERR_LOG 3 0xd0083694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_RCC_DOORBELL_APER_EN 3 0xd0083780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_RCC_CONFIG_MEMSIZE 3 0xd008378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_RCC_CONFIG_RESERVED 3 0xd0083790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_RCC_IOV_FUNC_IDENTIFIER 3 0xd0083794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_BIF_BME_STATUS 3 0xd008382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_BIF_ATOMIC_ERR_LOG 3 0xd0083830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd008384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0083850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0083854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0083858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd008385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_GPU_HDP_FLUSH_REQ 3 0xd0083898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_GPU_HDP_FLUSH_DONE 3 0xd008389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_BIF_TRANS_PENDING 3 0xd00838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd00838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_TRN_DW0 3 0xd0083958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_TRN_DW1 3 0xd008395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_TRN_DW2 3 0xd0083960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_TRN_DW3 3 0xd0083964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_RCV_DW0 3 0xd0083968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_RCV_DW1 3 0xd008396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_RCV_DW2 3 0xd0083970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MAILBOX_MSGBUF_RCV_DW3 3 0xd0083974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MAILBOX_CONTROL 3 0xd0083978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_MAILBOX_INT_CNTL 3 0xd008397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF1_BIF_VMHV_MAILBOX 3 0xd0083980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT0_ADDR_LO 3 0xd00c2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT0_ADDR_HI 3 0xd00c2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT0_MSG_DATA 3 0xd00c2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT0_CONTROL 3 0xd00c200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT1_ADDR_LO 3 0xd00c2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT1_ADDR_HI 3 0xd00c2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT1_MSG_DATA 3 0xd00c2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT1_CONTROL 3 0xd00c201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT2_ADDR_LO 3 0xd00c2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT2_ADDR_HI 3 0xd00c2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT2_MSG_DATA 3 0xd00c2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT2_CONTROL 3 0xd00c202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT3_ADDR_LO 3 0xd00c2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT3_ADDR_HI 3 0xd00c2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT3_MSG_DATA 3 0xd00c2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_VECT3_CONTROL 3 0xd00c203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF1_GFXMSIX_PBA 3 0xd00c3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MM_INDEX 3 0xd0100000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MM_DATA 3 0xd0100004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MM_INDEX_HI 3 0xd0100018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_RCC_ERR_LOG 3 0xd0103694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_RCC_DOORBELL_APER_EN 3 0xd0103780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_RCC_CONFIG_MEMSIZE 3 0xd010378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_RCC_CONFIG_RESERVED 3 0xd0103790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_RCC_IOV_FUNC_IDENTIFIER 3 0xd0103794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_BIF_BME_STATUS 3 0xd010382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_BIF_ATOMIC_ERR_LOG 3 0xd0103830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd010384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0103850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0103854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0103858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd010385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_GPU_HDP_FLUSH_REQ 3 0xd0103898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_GPU_HDP_FLUSH_DONE 3 0xd010389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_BIF_TRANS_PENDING 3 0xd01038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd01038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_TRN_DW0 3 0xd0103958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_TRN_DW1 3 0xd010395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_TRN_DW2 3 0xd0103960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_TRN_DW3 3 0xd0103964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_RCV_DW0 3 0xd0103968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_RCV_DW1 3 0xd010396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_RCV_DW2 3 0xd0103970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MAILBOX_MSGBUF_RCV_DW3 3 0xd0103974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MAILBOX_CONTROL 3 0xd0103978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_MAILBOX_INT_CNTL 3 0xd010397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF2_BIF_VMHV_MAILBOX 3 0xd0103980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT0_ADDR_LO 3 0xd0142000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT0_ADDR_HI 3 0xd0142004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT0_MSG_DATA 3 0xd0142008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT0_CONTROL 3 0xd014200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT1_ADDR_LO 3 0xd0142010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT1_ADDR_HI 3 0xd0142014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT1_MSG_DATA 3 0xd0142018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT1_CONTROL 3 0xd014201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT2_ADDR_LO 3 0xd0142020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT2_ADDR_HI 3 0xd0142024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT2_MSG_DATA 3 0xd0142028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT2_CONTROL 3 0xd014202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT3_ADDR_LO 3 0xd0142030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT3_ADDR_HI 3 0xd0142034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT3_MSG_DATA 3 0xd0142038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_VECT3_CONTROL 3 0xd014203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF2_GFXMSIX_PBA 3 0xd0143000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MM_INDEX 3 0xd0180000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MM_DATA 3 0xd0180004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MM_INDEX_HI 3 0xd0180018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_RCC_ERR_LOG 3 0xd0183694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_RCC_DOORBELL_APER_EN 3 0xd0183780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_RCC_CONFIG_MEMSIZE 3 0xd018378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_RCC_CONFIG_RESERVED 3 0xd0183790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_RCC_IOV_FUNC_IDENTIFIER 3 0xd0183794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_BIF_BME_STATUS 3 0xd018382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_BIF_ATOMIC_ERR_LOG 3 0xd0183830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd018384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0183850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0183854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0183858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd018385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_GPU_HDP_FLUSH_REQ 3 0xd0183898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_GPU_HDP_FLUSH_DONE 3 0xd018389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_BIF_TRANS_PENDING 3 0xd01838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd01838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_TRN_DW0 3 0xd0183958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_TRN_DW1 3 0xd018395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_TRN_DW2 3 0xd0183960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_TRN_DW3 3 0xd0183964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_RCV_DW0 3 0xd0183968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_RCV_DW1 3 0xd018396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_RCV_DW2 3 0xd0183970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MAILBOX_MSGBUF_RCV_DW3 3 0xd0183974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MAILBOX_CONTROL 3 0xd0183978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_MAILBOX_INT_CNTL 3 0xd018397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF3_BIF_VMHV_MAILBOX 3 0xd0183980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT0_ADDR_LO 3 0xd01c2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT0_ADDR_HI 3 0xd01c2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT0_MSG_DATA 3 0xd01c2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT0_CONTROL 3 0xd01c200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT1_ADDR_LO 3 0xd01c2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT1_ADDR_HI 3 0xd01c2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT1_MSG_DATA 3 0xd01c2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT1_CONTROL 3 0xd01c201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT2_ADDR_LO 3 0xd01c2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT2_ADDR_HI 3 0xd01c2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT2_MSG_DATA 3 0xd01c2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT2_CONTROL 3 0xd01c202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT3_ADDR_LO 3 0xd01c2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT3_ADDR_HI 3 0xd01c2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT3_MSG_DATA 3 0xd01c2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_VECT3_CONTROL 3 0xd01c203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF3_GFXMSIX_PBA 3 0xd01c3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MM_INDEX 3 0xd0200000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MM_DATA 3 0xd0200004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MM_INDEX_HI 3 0xd0200018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_RCC_ERR_LOG 3 0xd0203694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_RCC_DOORBELL_APER_EN 3 0xd0203780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_RCC_CONFIG_MEMSIZE 3 0xd020378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_RCC_CONFIG_RESERVED 3 0xd0203790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_RCC_IOV_FUNC_IDENTIFIER 3 0xd0203794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_BIF_BME_STATUS 3 0xd020382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_BIF_ATOMIC_ERR_LOG 3 0xd0203830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd020384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0203850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0203854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0203858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd020385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_GPU_HDP_FLUSH_REQ 3 0xd0203898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_GPU_HDP_FLUSH_DONE 3 0xd020389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_BIF_TRANS_PENDING 3 0xd02038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd02038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_TRN_DW0 3 0xd0203958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_TRN_DW1 3 0xd020395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_TRN_DW2 3 0xd0203960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_TRN_DW3 3 0xd0203964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_RCV_DW0 3 0xd0203968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_RCV_DW1 3 0xd020396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_RCV_DW2 3 0xd0203970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MAILBOX_MSGBUF_RCV_DW3 3 0xd0203974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MAILBOX_CONTROL 3 0xd0203978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_MAILBOX_INT_CNTL 3 0xd020397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF4_BIF_VMHV_MAILBOX 3 0xd0203980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT0_ADDR_LO 3 0xd0242000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT0_ADDR_HI 3 0xd0242004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT0_MSG_DATA 3 0xd0242008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT0_CONTROL 3 0xd024200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT1_ADDR_LO 3 0xd0242010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT1_ADDR_HI 3 0xd0242014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT1_MSG_DATA 3 0xd0242018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT1_CONTROL 3 0xd024201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT2_ADDR_LO 3 0xd0242020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT2_ADDR_HI 3 0xd0242024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT2_MSG_DATA 3 0xd0242028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT2_CONTROL 3 0xd024202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT3_ADDR_LO 3 0xd0242030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT3_ADDR_HI 3 0xd0242034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT3_MSG_DATA 3 0xd0242038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_VECT3_CONTROL 3 0xd024203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF4_GFXMSIX_PBA 3 0xd0243000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MM_INDEX 3 0xd0280000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MM_DATA 3 0xd0280004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MM_INDEX_HI 3 0xd0280018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_RCC_ERR_LOG 3 0xd0283694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_RCC_DOORBELL_APER_EN 3 0xd0283780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_RCC_CONFIG_MEMSIZE 3 0xd028378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_RCC_CONFIG_RESERVED 3 0xd0283790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_RCC_IOV_FUNC_IDENTIFIER 3 0xd0283794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_BIF_BME_STATUS 3 0xd028382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_BIF_ATOMIC_ERR_LOG 3 0xd0283830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd028384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0283850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0283854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0283858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd028385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_GPU_HDP_FLUSH_REQ 3 0xd0283898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_GPU_HDP_FLUSH_DONE 3 0xd028389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_BIF_TRANS_PENDING 3 0xd02838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd02838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_TRN_DW0 3 0xd0283958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_TRN_DW1 3 0xd028395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_TRN_DW2 3 0xd0283960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_TRN_DW3 3 0xd0283964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_RCV_DW0 3 0xd0283968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_RCV_DW1 3 0xd028396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_RCV_DW2 3 0xd0283970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MAILBOX_MSGBUF_RCV_DW3 3 0xd0283974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MAILBOX_CONTROL 3 0xd0283978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_MAILBOX_INT_CNTL 3 0xd028397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF5_BIF_VMHV_MAILBOX 3 0xd0283980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT0_ADDR_LO 3 0xd02c2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT0_ADDR_HI 3 0xd02c2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT0_MSG_DATA 3 0xd02c2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT0_CONTROL 3 0xd02c200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT1_ADDR_LO 3 0xd02c2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT1_ADDR_HI 3 0xd02c2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT1_MSG_DATA 3 0xd02c2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT1_CONTROL 3 0xd02c201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT2_ADDR_LO 3 0xd02c2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT2_ADDR_HI 3 0xd02c2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT2_MSG_DATA 3 0xd02c2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT2_CONTROL 3 0xd02c202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT3_ADDR_LO 3 0xd02c2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT3_ADDR_HI 3 0xd02c2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT3_MSG_DATA 3 0xd02c2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_VECT3_CONTROL 3 0xd02c203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF5_GFXMSIX_PBA 3 0xd02c3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MM_INDEX 3 0xd0300000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MM_DATA 3 0xd0300004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MM_INDEX_HI 3 0xd0300018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_RCC_ERR_LOG 3 0xd0303694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_RCC_DOORBELL_APER_EN 3 0xd0303780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_RCC_CONFIG_MEMSIZE 3 0xd030378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_RCC_CONFIG_RESERVED 3 0xd0303790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_RCC_IOV_FUNC_IDENTIFIER 3 0xd0303794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_BIF_BME_STATUS 3 0xd030382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_BIF_ATOMIC_ERR_LOG 3 0xd0303830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd030384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0303850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0303854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0303858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd030385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_GPU_HDP_FLUSH_REQ 3 0xd0303898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_GPU_HDP_FLUSH_DONE 3 0xd030389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_BIF_TRANS_PENDING 3 0xd03038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd03038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_TRN_DW0 3 0xd0303958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_TRN_DW1 3 0xd030395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_TRN_DW2 3 0xd0303960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_TRN_DW3 3 0xd0303964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_RCV_DW0 3 0xd0303968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_RCV_DW1 3 0xd030396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_RCV_DW2 3 0xd0303970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MAILBOX_MSGBUF_RCV_DW3 3 0xd0303974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MAILBOX_CONTROL 3 0xd0303978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_MAILBOX_INT_CNTL 3 0xd030397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF6_BIF_VMHV_MAILBOX 3 0xd0303980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT0_ADDR_LO 3 0xd0342000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT0_ADDR_HI 3 0xd0342004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT0_MSG_DATA 3 0xd0342008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT0_CONTROL 3 0xd034200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT1_ADDR_LO 3 0xd0342010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT1_ADDR_HI 3 0xd0342014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT1_MSG_DATA 3 0xd0342018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT1_CONTROL 3 0xd034201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT2_ADDR_LO 3 0xd0342020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT2_ADDR_HI 3 0xd0342024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT2_MSG_DATA 3 0xd0342028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT2_CONTROL 3 0xd034202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT3_ADDR_LO 3 0xd0342030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT3_ADDR_HI 3 0xd0342034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT3_MSG_DATA 3 0xd0342038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_VECT3_CONTROL 3 0xd034203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF6_GFXMSIX_PBA 3 0xd0343000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MM_INDEX 3 0xd0380000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MM_DATA 3 0xd0380004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MM_INDEX_HI 3 0xd0380018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_RCC_ERR_LOG 3 0xd0383694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_RCC_DOORBELL_APER_EN 3 0xd0383780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_RCC_CONFIG_MEMSIZE 3 0xd038378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_RCC_CONFIG_RESERVED 3 0xd0383790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_RCC_IOV_FUNC_IDENTIFIER 3 0xd0383794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_BIF_BME_STATUS 3 0xd038382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_BIF_ATOMIC_ERR_LOG 3 0xd0383830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd038384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0383850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0383854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0383858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd038385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_GPU_HDP_FLUSH_REQ 3 0xd0383898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_GPU_HDP_FLUSH_DONE 3 0xd038389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_BIF_TRANS_PENDING 3 0xd03838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd03838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_TRN_DW0 3 0xd0383958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_TRN_DW1 3 0xd038395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_TRN_DW2 3 0xd0383960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_TRN_DW3 3 0xd0383964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_RCV_DW0 3 0xd0383968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_RCV_DW1 3 0xd038396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_RCV_DW2 3 0xd0383970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MAILBOX_MSGBUF_RCV_DW3 3 0xd0383974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MAILBOX_CONTROL 3 0xd0383978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_MAILBOX_INT_CNTL 3 0xd038397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF7_BIF_VMHV_MAILBOX 3 0xd0383980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT0_ADDR_LO 3 0xd03c2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT0_ADDR_HI 3 0xd03c2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT0_MSG_DATA 3 0xd03c2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT0_CONTROL 3 0xd03c200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT1_ADDR_LO 3 0xd03c2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT1_ADDR_HI 3 0xd03c2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT1_MSG_DATA 3 0xd03c2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT1_CONTROL 3 0xd03c201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT2_ADDR_LO 3 0xd03c2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT2_ADDR_HI 3 0xd03c2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT2_MSG_DATA 3 0xd03c2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT2_CONTROL 3 0xd03c202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT3_ADDR_LO 3 0xd03c2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT3_ADDR_HI 3 0xd03c2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT3_MSG_DATA 3 0xd03c2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_VECT3_CONTROL 3 0xd03c203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF7_GFXMSIX_PBA 3 0xd03c3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MM_INDEX 3 0xd0400000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MM_DATA 3 0xd0400004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MM_INDEX_HI 3 0xd0400018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_RCC_ERR_LOG 3 0xd0403694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_RCC_DOORBELL_APER_EN 3 0xd0403780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_RCC_CONFIG_MEMSIZE 3 0xd040378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_RCC_CONFIG_RESERVED 3 0xd0403790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_RCC_IOV_FUNC_IDENTIFIER 3 0xd0403794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_BIF_BME_STATUS 3 0xd040382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_BIF_ATOMIC_ERR_LOG 3 0xd0403830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd040384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0403850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0403854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0403858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd040385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_GPU_HDP_FLUSH_REQ 3 0xd0403898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_GPU_HDP_FLUSH_DONE 3 0xd040389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_BIF_TRANS_PENDING 3 0xd04038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd04038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_TRN_DW0 3 0xd0403958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_TRN_DW1 3 0xd040395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_TRN_DW2 3 0xd0403960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_TRN_DW3 3 0xd0403964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_RCV_DW0 3 0xd0403968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_RCV_DW1 3 0xd040396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_RCV_DW2 3 0xd0403970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MAILBOX_MSGBUF_RCV_DW3 3 0xd0403974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MAILBOX_CONTROL 3 0xd0403978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_MAILBOX_INT_CNTL 3 0xd040397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF8_BIF_VMHV_MAILBOX 3 0xd0403980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT0_ADDR_LO 3 0xd0442000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT0_ADDR_HI 3 0xd0442004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT0_MSG_DATA 3 0xd0442008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT0_CONTROL 3 0xd044200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT1_ADDR_LO 3 0xd0442010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT1_ADDR_HI 3 0xd0442014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT1_MSG_DATA 3 0xd0442018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT1_CONTROL 3 0xd044201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT2_ADDR_LO 3 0xd0442020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT2_ADDR_HI 3 0xd0442024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT2_MSG_DATA 3 0xd0442028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT2_CONTROL 3 0xd044202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT3_ADDR_LO 3 0xd0442030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT3_ADDR_HI 3 0xd0442034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT3_MSG_DATA 3 0xd0442038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_VECT3_CONTROL 3 0xd044203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF8_GFXMSIX_PBA 3 0xd0443000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MM_INDEX 3 0xd0480000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MM_DATA 3 0xd0480004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MM_INDEX_HI 3 0xd0480018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_RCC_ERR_LOG 3 0xd0483694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_RCC_DOORBELL_APER_EN 3 0xd0483780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_RCC_CONFIG_MEMSIZE 3 0xd048378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_RCC_CONFIG_RESERVED 3 0xd0483790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_RCC_IOV_FUNC_IDENTIFIER 3 0xd0483794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_BIF_BME_STATUS 3 0xd048382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_BIF_ATOMIC_ERR_LOG 3 0xd0483830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd048384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0483850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0483854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0483858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd048385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_GPU_HDP_FLUSH_REQ 3 0xd0483898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_GPU_HDP_FLUSH_DONE 3 0xd048389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_BIF_TRANS_PENDING 3 0xd04838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd04838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_TRN_DW0 3 0xd0483958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_TRN_DW1 3 0xd048395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_TRN_DW2 3 0xd0483960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_TRN_DW3 3 0xd0483964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_RCV_DW0 3 0xd0483968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_RCV_DW1 3 0xd048396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_RCV_DW2 3 0xd0483970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MAILBOX_MSGBUF_RCV_DW3 3 0xd0483974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MAILBOX_CONTROL 3 0xd0483978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_MAILBOX_INT_CNTL 3 0xd048397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF9_BIF_VMHV_MAILBOX 3 0xd0483980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT0_ADDR_LO 3 0xd04c2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT0_ADDR_HI 3 0xd04c2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT0_MSG_DATA 3 0xd04c2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT0_CONTROL 3 0xd04c200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT1_ADDR_LO 3 0xd04c2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT1_ADDR_HI 3 0xd04c2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT1_MSG_DATA 3 0xd04c2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT1_CONTROL 3 0xd04c201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT2_ADDR_LO 3 0xd04c2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT2_ADDR_HI 3 0xd04c2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT2_MSG_DATA 3 0xd04c2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT2_CONTROL 3 0xd04c202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT3_ADDR_LO 3 0xd04c2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT3_ADDR_HI 3 0xd04c2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT3_MSG_DATA 3 0xd04c2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_VECT3_CONTROL 3 0xd04c203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF9_GFXMSIX_PBA 3 0xd04c3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MM_INDEX 3 0xd0500000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MM_DATA 3 0xd0500004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MM_INDEX_HI 3 0xd0500018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_RCC_ERR_LOG 3 0xd0503694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_RCC_DOORBELL_APER_EN 3 0xd0503780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_RCC_CONFIG_MEMSIZE 3 0xd050378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_RCC_CONFIG_RESERVED 3 0xd0503790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_RCC_IOV_FUNC_IDENTIFIER 3 0xd0503794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_BIF_BME_STATUS 3 0xd050382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_BIF_ATOMIC_ERR_LOG 3 0xd0503830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd050384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0503850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0503854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0503858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd050385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_GPU_HDP_FLUSH_REQ 3 0xd0503898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_GPU_HDP_FLUSH_DONE 3 0xd050389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_BIF_TRANS_PENDING 3 0xd05038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd05038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_TRN_DW0 3 0xd0503958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_TRN_DW1 3 0xd050395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_TRN_DW2 3 0xd0503960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_TRN_DW3 3 0xd0503964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_RCV_DW0 3 0xd0503968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_RCV_DW1 3 0xd050396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_RCV_DW2 3 0xd0503970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MAILBOX_MSGBUF_RCV_DW3 3 0xd0503974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MAILBOX_CONTROL 3 0xd0503978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_MAILBOX_INT_CNTL 3 0xd050397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF10_BIF_VMHV_MAILBOX 3 0xd0503980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT0_ADDR_LO 3 0xd0542000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT0_ADDR_HI 3 0xd0542004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT0_MSG_DATA 3 0xd0542008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT0_CONTROL 3 0xd054200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT1_ADDR_LO 3 0xd0542010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT1_ADDR_HI 3 0xd0542014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT1_MSG_DATA 3 0xd0542018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT1_CONTROL 3 0xd054201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT2_ADDR_LO 3 0xd0542020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT2_ADDR_HI 3 0xd0542024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT2_MSG_DATA 3 0xd0542028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT2_CONTROL 3 0xd054202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT3_ADDR_LO 3 0xd0542030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT3_ADDR_HI 3 0xd0542034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT3_MSG_DATA 3 0xd0542038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_VECT3_CONTROL 3 0xd054203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF10_GFXMSIX_PBA 3 0xd0543000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MM_INDEX 3 0xd0580000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MM_DATA 3 0xd0580004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MM_INDEX_HI 3 0xd0580018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_RCC_ERR_LOG 3 0xd0583694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_RCC_DOORBELL_APER_EN 3 0xd0583780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_RCC_CONFIG_MEMSIZE 3 0xd058378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_RCC_CONFIG_RESERVED 3 0xd0583790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_RCC_IOV_FUNC_IDENTIFIER 3 0xd0583794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_BIF_BME_STATUS 3 0xd058382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_BIF_ATOMIC_ERR_LOG 3 0xd0583830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd058384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0583850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0583854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0583858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd058385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_GPU_HDP_FLUSH_REQ 3 0xd0583898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_GPU_HDP_FLUSH_DONE 3 0xd058389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_BIF_TRANS_PENDING 3 0xd05838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd05838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_TRN_DW0 3 0xd0583958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_TRN_DW1 3 0xd058395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_TRN_DW2 3 0xd0583960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_TRN_DW3 3 0xd0583964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_RCV_DW0 3 0xd0583968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_RCV_DW1 3 0xd058396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_RCV_DW2 3 0xd0583970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MAILBOX_MSGBUF_RCV_DW3 3 0xd0583974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MAILBOX_CONTROL 3 0xd0583978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_MAILBOX_INT_CNTL 3 0xd058397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF11_BIF_VMHV_MAILBOX 3 0xd0583980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT0_ADDR_LO 3 0xd05c2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT0_ADDR_HI 3 0xd05c2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT0_MSG_DATA 3 0xd05c2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT0_CONTROL 3 0xd05c200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT1_ADDR_LO 3 0xd05c2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT1_ADDR_HI 3 0xd05c2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT1_MSG_DATA 3 0xd05c2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT1_CONTROL 3 0xd05c201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT2_ADDR_LO 3 0xd05c2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT2_ADDR_HI 3 0xd05c2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT2_MSG_DATA 3 0xd05c2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT2_CONTROL 3 0xd05c202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT3_ADDR_LO 3 0xd05c2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT3_ADDR_HI 3 0xd05c2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT3_MSG_DATA 3 0xd05c2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_VECT3_CONTROL 3 0xd05c203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF11_GFXMSIX_PBA 3 0xd05c3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MM_INDEX 3 0xd0600000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MM_DATA 3 0xd0600004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MM_INDEX_HI 3 0xd0600018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_RCC_ERR_LOG 3 0xd0603694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_RCC_DOORBELL_APER_EN 3 0xd0603780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_RCC_CONFIG_MEMSIZE 3 0xd060378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_RCC_CONFIG_RESERVED 3 0xd0603790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_RCC_IOV_FUNC_IDENTIFIER 3 0xd0603794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_BIF_BME_STATUS 3 0xd060382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_BIF_ATOMIC_ERR_LOG 3 0xd0603830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd060384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0603850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0603854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0603858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd060385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_GPU_HDP_FLUSH_REQ 3 0xd0603898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_GPU_HDP_FLUSH_DONE 3 0xd060389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_BIF_TRANS_PENDING 3 0xd06038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd06038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_TRN_DW0 3 0xd0603958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_TRN_DW1 3 0xd060395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_TRN_DW2 3 0xd0603960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_TRN_DW3 3 0xd0603964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_RCV_DW0 3 0xd0603968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_RCV_DW1 3 0xd060396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_RCV_DW2 3 0xd0603970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MAILBOX_MSGBUF_RCV_DW3 3 0xd0603974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MAILBOX_CONTROL 3 0xd0603978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_MAILBOX_INT_CNTL 3 0xd060397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF12_BIF_VMHV_MAILBOX 3 0xd0603980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT0_ADDR_LO 3 0xd0642000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT0_ADDR_HI 3 0xd0642004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT0_MSG_DATA 3 0xd0642008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT0_CONTROL 3 0xd064200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_ADDR_LO 3 0xd0642010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_ADDR_HI 3 0xd0642014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_MSG_DATA 3 0xd0642018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_CONTROL 3 0xd064201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT2_ADDR_LO 3 0xd0642020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT2_ADDR_HI 3 0xd0642024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT2_MSG_DATA 3 0xd0642028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT2_CONTROL 3 0xd064202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT3_ADDR_LO 3 0xd0642030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT3_ADDR_HI 3 0xd0642034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT3_MSG_DATA 3 0xd0642038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_VECT3_CONTROL 3 0xd064203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF12_GFXMSIX_PBA 3 0xd0643000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MM_INDEX 3 0xd0680000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MM_DATA 3 0xd0680004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MM_INDEX_HI 3 0xd0680018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_RCC_ERR_LOG 3 0xd0683694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_RCC_DOORBELL_APER_EN 3 0xd0683780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_RCC_CONFIG_MEMSIZE 3 0xd068378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_RCC_CONFIG_RESERVED 3 0xd0683790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_RCC_IOV_FUNC_IDENTIFIER 3 0xd0683794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_BIF_BME_STATUS 3 0xd068382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_BIF_ATOMIC_ERR_LOG 3 0xd0683830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd068384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0683850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0683854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0683858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd068385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_GPU_HDP_FLUSH_REQ 3 0xd0683898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_GPU_HDP_FLUSH_DONE 3 0xd068389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_BIF_TRANS_PENDING 3 0xd06838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd06838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_TRN_DW0 3 0xd0683958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_TRN_DW1 3 0xd068395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_TRN_DW2 3 0xd0683960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_TRN_DW3 3 0xd0683964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_RCV_DW0 3 0xd0683968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_RCV_DW1 3 0xd068396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_RCV_DW2 3 0xd0683970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MAILBOX_MSGBUF_RCV_DW3 3 0xd0683974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MAILBOX_CONTROL 3 0xd0683978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_MAILBOX_INT_CNTL 3 0xd068397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF13_BIF_VMHV_MAILBOX 3 0xd0683980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT0_ADDR_LO 3 0xd06c2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT0_ADDR_HI 3 0xd06c2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT0_MSG_DATA 3 0xd06c2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT0_CONTROL 3 0xd06c200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT1_ADDR_LO 3 0xd06c2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT1_ADDR_HI 3 0xd06c2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT1_MSG_DATA 3 0xd06c2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT1_CONTROL 3 0xd06c201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT2_ADDR_LO 3 0xd06c2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT2_ADDR_HI 3 0xd06c2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT2_MSG_DATA 3 0xd06c2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT2_CONTROL 3 0xd06c202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT3_ADDR_LO 3 0xd06c2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT3_ADDR_HI 3 0xd06c2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT3_MSG_DATA 3 0xd06c2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_VECT3_CONTROL 3 0xd06c203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF13_GFXMSIX_PBA 3 0xd06c3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MM_INDEX 3 0xd0700000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MM_DATA 3 0xd0700004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MM_INDEX_HI 3 0xd0700018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_RCC_ERR_LOG 3 0xd0703694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_RCC_DOORBELL_APER_EN 3 0xd0703780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_RCC_CONFIG_MEMSIZE 3 0xd070378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_RCC_CONFIG_RESERVED 3 0xd0703790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_RCC_IOV_FUNC_IDENTIFIER 3 0xd0703794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_BIF_BME_STATUS 3 0xd070382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_BIF_ATOMIC_ERR_LOG 3 0xd0703830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd070384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0703850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0703854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0703858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd070385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_GPU_HDP_FLUSH_REQ 3 0xd0703898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_GPU_HDP_FLUSH_DONE 3 0xd070389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_BIF_TRANS_PENDING 3 0xd07038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd07038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_TRN_DW0 3 0xd0703958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_TRN_DW1 3 0xd070395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_TRN_DW2 3 0xd0703960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_TRN_DW3 3 0xd0703964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_RCV_DW0 3 0xd0703968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_RCV_DW1 3 0xd070396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_RCV_DW2 3 0xd0703970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MAILBOX_MSGBUF_RCV_DW3 3 0xd0703974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MAILBOX_CONTROL 3 0xd0703978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_MAILBOX_INT_CNTL 3 0xd070397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF14_BIF_VMHV_MAILBOX 3 0xd0703980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT0_ADDR_LO 3 0xd0742000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT0_ADDR_HI 3 0xd0742004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT0_MSG_DATA 3 0xd0742008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT0_CONTROL 3 0xd074200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT1_ADDR_LO 3 0xd0742010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT1_ADDR_HI 3 0xd0742014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT1_MSG_DATA 3 0xd0742018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT1_CONTROL 3 0xd074201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT2_ADDR_LO 3 0xd0742020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT2_ADDR_HI 3 0xd0742024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT2_MSG_DATA 3 0xd0742028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT2_CONTROL 3 0xd074202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT3_ADDR_LO 3 0xd0742030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT3_ADDR_HI 3 0xd0742034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT3_MSG_DATA 3 0xd0742038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_VECT3_CONTROL 3 0xd074203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF14_GFXMSIX_PBA 3 0xd0743000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MM_INDEX 3 0xd0780000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MM_DATA 3 0xd0780004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MM_INDEX_HI 3 0xd0780018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_RCC_ERR_LOG 3 0xd0783694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_RCC_DOORBELL_APER_EN 3 0xd0783780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_RCC_CONFIG_MEMSIZE 3 0xd078378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_RCC_CONFIG_RESERVED 3 0xd0783790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_RCC_IOV_FUNC_IDENTIFIER 3 0xd0783794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_BIF_BME_STATUS 3 0xd078382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_BIF_ATOMIC_ERR_LOG 3 0xd0783830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd078384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0783850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0783854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0783858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd078385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_GPU_HDP_FLUSH_REQ 3 0xd0783898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_GPU_HDP_FLUSH_DONE 3 0xd078389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_BIF_TRANS_PENDING 3 0xd07838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd07838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_TRN_DW0 3 0xd0783958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_TRN_DW1 3 0xd078395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_TRN_DW2 3 0xd0783960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_TRN_DW3 3 0xd0783964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_RCV_DW0 3 0xd0783968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_RCV_DW1 3 0xd078396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_RCV_DW2 3 0xd0783970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MAILBOX_MSGBUF_RCV_DW3 3 0xd0783974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MAILBOX_CONTROL 3 0xd0783978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_MAILBOX_INT_CNTL 3 0xd078397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF15_BIF_VMHV_MAILBOX 3 0xd0783980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT0_ADDR_LO 3 0xd07c2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT0_ADDR_HI 3 0xd07c2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT0_MSG_DATA 3 0xd07c2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT0_CONTROL 3 0xd07c200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT1_ADDR_LO 3 0xd07c2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT1_ADDR_HI 3 0xd07c2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT1_MSG_DATA 3 0xd07c2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT1_CONTROL 3 0xd07c201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT2_ADDR_LO 3 0xd07c2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT2_ADDR_HI 3 0xd07c2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT2_MSG_DATA 3 0xd07c2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT2_CONTROL 3 0xd07c202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT3_ADDR_LO 3 0xd07c2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT3_ADDR_HI 3 0xd07c2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT3_MSG_DATA 3 0xd07c2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_VECT3_CONTROL 3 0xd07c203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF15_GFXMSIX_PBA 3 0xd07c3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MM_INDEX 3 0xd0800000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MM_DATA 3 0xd0800004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MM_INDEX_HI 3 0xd0800018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_RCC_ERR_LOG 3 0xd0803694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_RCC_DOORBELL_APER_EN 3 0xd0803780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_RCC_CONFIG_MEMSIZE 3 0xd080378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_RCC_CONFIG_RESERVED 3 0xd0803790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_RCC_IOV_FUNC_IDENTIFIER 3 0xd0803794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_BIF_BME_STATUS 3 0xd080382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_BIF_ATOMIC_ERR_LOG 3 0xd0803830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd080384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0803850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0803854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0803858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd080385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_GPU_HDP_FLUSH_REQ 3 0xd0803898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_GPU_HDP_FLUSH_DONE 3 0xd080389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_BIF_TRANS_PENDING 3 0xd08038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd08038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_TRN_DW0 3 0xd0803958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_TRN_DW1 3 0xd080395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_TRN_DW2 3 0xd0803960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_TRN_DW3 3 0xd0803964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_RCV_DW0 3 0xd0803968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_RCV_DW1 3 0xd080396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_RCV_DW2 3 0xd0803970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MAILBOX_MSGBUF_RCV_DW3 3 0xd0803974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MAILBOX_CONTROL 3 0xd0803978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_MAILBOX_INT_CNTL 3 0xd080397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF16_BIF_VMHV_MAILBOX 3 0xd0803980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT0_ADDR_LO 3 0xd0842000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT0_ADDR_HI 3 0xd0842004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT0_MSG_DATA 3 0xd0842008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT0_CONTROL 3 0xd084200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT1_ADDR_LO 3 0xd0842010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT1_ADDR_HI 3 0xd0842014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT1_MSG_DATA 3 0xd0842018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT1_CONTROL 3 0xd084201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT2_ADDR_LO 3 0xd0842020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT2_ADDR_HI 3 0xd0842024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT2_MSG_DATA 3 0xd0842028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT2_CONTROL 3 0xd084202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT3_ADDR_LO 3 0xd0842030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT3_ADDR_HI 3 0xd0842034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT3_MSG_DATA 3 0xd0842038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_VECT3_CONTROL 3 0xd084203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF16_GFXMSIX_PBA 3 0xd0843000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MM_INDEX 3 0xd0880000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MM_DATA 3 0xd0880004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MM_INDEX_HI 3 0xd0880018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_RCC_ERR_LOG 3 0xd0883694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_RCC_DOORBELL_APER_EN 3 0xd0883780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_RCC_CONFIG_MEMSIZE 3 0xd088378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_RCC_CONFIG_RESERVED 3 0xd0883790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_RCC_IOV_FUNC_IDENTIFIER 3 0xd0883794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_BIF_BME_STATUS 3 0xd088382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_BIF_ATOMIC_ERR_LOG 3 0xd0883830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd088384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0883850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0883854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0883858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd088385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_GPU_HDP_FLUSH_REQ 3 0xd0883898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_GPU_HDP_FLUSH_DONE 3 0xd088389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_BIF_TRANS_PENDING 3 0xd08838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd08838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_TRN_DW0 3 0xd0883958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_TRN_DW1 3 0xd088395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_TRN_DW2 3 0xd0883960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_TRN_DW3 3 0xd0883964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_RCV_DW0 3 0xd0883968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_RCV_DW1 3 0xd088396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_RCV_DW2 3 0xd0883970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MAILBOX_MSGBUF_RCV_DW3 3 0xd0883974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MAILBOX_CONTROL 3 0xd0883978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_MAILBOX_INT_CNTL 3 0xd088397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF17_BIF_VMHV_MAILBOX 3 0xd0883980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT0_ADDR_LO 3 0xd08c2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT0_ADDR_HI 3 0xd08c2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT0_MSG_DATA 3 0xd08c2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT0_CONTROL 3 0xd08c200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT1_ADDR_LO 3 0xd08c2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT1_ADDR_HI 3 0xd08c2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT1_MSG_DATA 3 0xd08c2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT1_CONTROL 3 0xd08c201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT2_ADDR_LO 3 0xd08c2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT2_ADDR_HI 3 0xd08c2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT2_MSG_DATA 3 0xd08c2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT2_CONTROL 3 0xd08c202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT3_ADDR_LO 3 0xd08c2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT3_ADDR_HI 3 0xd08c2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT3_MSG_DATA 3 0xd08c2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_VECT3_CONTROL 3 0xd08c203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF17_GFXMSIX_PBA 3 0xd08c3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MM_INDEX 3 0xd0900000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MM_DATA 3 0xd0900004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MM_INDEX_HI 3 0xd0900018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_RCC_ERR_LOG 3 0xd0903694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_RCC_DOORBELL_APER_EN 3 0xd0903780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_RCC_CONFIG_MEMSIZE 3 0xd090378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_RCC_CONFIG_RESERVED 3 0xd0903790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_RCC_IOV_FUNC_IDENTIFIER 3 0xd0903794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_BIF_BME_STATUS 3 0xd090382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_BIF_ATOMIC_ERR_LOG 3 0xd0903830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd090384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0903850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0903854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0903858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd090385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_GPU_HDP_FLUSH_REQ 3 0xd0903898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_GPU_HDP_FLUSH_DONE 3 0xd090389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_BIF_TRANS_PENDING 3 0xd09038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd09038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_TRN_DW0 3 0xd0903958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_TRN_DW1 3 0xd090395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_TRN_DW2 3 0xd0903960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_TRN_DW3 3 0xd0903964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_RCV_DW0 3 0xd0903968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_RCV_DW1 3 0xd090396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_RCV_DW2 3 0xd0903970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MAILBOX_MSGBUF_RCV_DW3 3 0xd0903974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MAILBOX_CONTROL 3 0xd0903978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_MAILBOX_INT_CNTL 3 0xd090397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF18_BIF_VMHV_MAILBOX 3 0xd0903980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT0_ADDR_LO 3 0xd0942000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT0_ADDR_HI 3 0xd0942004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT0_MSG_DATA 3 0xd0942008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT0_CONTROL 3 0xd094200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT1_ADDR_LO 3 0xd0942010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT1_ADDR_HI 3 0xd0942014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT1_MSG_DATA 3 0xd0942018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT1_CONTROL 3 0xd094201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT2_ADDR_LO 3 0xd0942020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT2_ADDR_HI 3 0xd0942024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT2_MSG_DATA 3 0xd0942028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT2_CONTROL 3 0xd094202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT3_ADDR_LO 3 0xd0942030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT3_ADDR_HI 3 0xd0942034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT3_MSG_DATA 3 0xd0942038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_VECT3_CONTROL 3 0xd094203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF18_GFXMSIX_PBA 3 0xd0943000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MM_INDEX 3 0xd0980000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MM_DATA 3 0xd0980004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MM_INDEX_HI 3 0xd0980018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_RCC_ERR_LOG 3 0xd0983694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_RCC_DOORBELL_APER_EN 3 0xd0983780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_RCC_CONFIG_MEMSIZE 3 0xd098378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_RCC_CONFIG_RESERVED 3 0xd0983790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_RCC_IOV_FUNC_IDENTIFIER 3 0xd0983794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_BIF_BME_STATUS 3 0xd098382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_BIF_ATOMIC_ERR_LOG 3 0xd0983830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd098384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0983850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0983854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0983858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd098385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_GPU_HDP_FLUSH_REQ 3 0xd0983898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_GPU_HDP_FLUSH_DONE 3 0xd098389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_BIF_TRANS_PENDING 3 0xd09838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd09838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_TRN_DW0 3 0xd0983958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_TRN_DW1 3 0xd098395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_TRN_DW2 3 0xd0983960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_TRN_DW3 3 0xd0983964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_RCV_DW0 3 0xd0983968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_RCV_DW1 3 0xd098396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_RCV_DW2 3 0xd0983970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MAILBOX_MSGBUF_RCV_DW3 3 0xd0983974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MAILBOX_CONTROL 3 0xd0983978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_MAILBOX_INT_CNTL 3 0xd098397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF19_BIF_VMHV_MAILBOX 3 0xd0983980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT0_ADDR_LO 3 0xd09c2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT0_ADDR_HI 3 0xd09c2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT0_MSG_DATA 3 0xd09c2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT0_CONTROL 3 0xd09c200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT1_ADDR_LO 3 0xd09c2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT1_ADDR_HI 3 0xd09c2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT1_MSG_DATA 3 0xd09c2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT1_CONTROL 3 0xd09c201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT2_ADDR_LO 3 0xd09c2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT2_ADDR_HI 3 0xd09c2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT2_MSG_DATA 3 0xd09c2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT2_CONTROL 3 0xd09c202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT3_ADDR_LO 3 0xd09c2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT3_ADDR_HI 3 0xd09c2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT3_MSG_DATA 3 0xd09c2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_VECT3_CONTROL 3 0xd09c203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF19_GFXMSIX_PBA 3 0xd09c3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MM_INDEX 3 0xd0a00000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MM_DATA 3 0xd0a00004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MM_INDEX_HI 3 0xd0a00018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_RCC_ERR_LOG 3 0xd0a03694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_RCC_DOORBELL_APER_EN 3 0xd0a03780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_RCC_CONFIG_MEMSIZE 3 0xd0a0378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_RCC_CONFIG_RESERVED 3 0xd0a03790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_RCC_IOV_FUNC_IDENTIFIER 3 0xd0a03794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_BIF_BME_STATUS 3 0xd0a0382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_BIF_ATOMIC_ERR_LOG 3 0xd0a03830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0a0384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0a03850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0a03854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0a03858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0a0385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_GPU_HDP_FLUSH_REQ 3 0xd0a03898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_GPU_HDP_FLUSH_DONE 3 0xd0a0389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_BIF_TRANS_PENDING 3 0xd0a038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0a038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_TRN_DW0 3 0xd0a03958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_TRN_DW1 3 0xd0a0395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_TRN_DW2 3 0xd0a03960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_TRN_DW3 3 0xd0a03964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_RCV_DW0 3 0xd0a03968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_RCV_DW1 3 0xd0a0396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_RCV_DW2 3 0xd0a03970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MAILBOX_MSGBUF_RCV_DW3 3 0xd0a03974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MAILBOX_CONTROL 3 0xd0a03978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_MAILBOX_INT_CNTL 3 0xd0a0397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF20_BIF_VMHV_MAILBOX 3 0xd0a03980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT0_ADDR_LO 3 0xd0a42000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT0_ADDR_HI 3 0xd0a42004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT0_MSG_DATA 3 0xd0a42008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT0_CONTROL 3 0xd0a4200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT1_ADDR_LO 3 0xd0a42010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT1_ADDR_HI 3 0xd0a42014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT1_MSG_DATA 3 0xd0a42018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT1_CONTROL 3 0xd0a4201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT2_ADDR_LO 3 0xd0a42020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT2_ADDR_HI 3 0xd0a42024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT2_MSG_DATA 3 0xd0a42028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT2_CONTROL 3 0xd0a4202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT3_ADDR_LO 3 0xd0a42030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT3_ADDR_HI 3 0xd0a42034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT3_MSG_DATA 3 0xd0a42038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_VECT3_CONTROL 3 0xd0a4203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF20_GFXMSIX_PBA 3 0xd0a43000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MM_INDEX 3 0xd0a80000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MM_DATA 3 0xd0a80004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MM_INDEX_HI 3 0xd0a80018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_RCC_ERR_LOG 3 0xd0a83694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_RCC_DOORBELL_APER_EN 3 0xd0a83780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_RCC_CONFIG_MEMSIZE 3 0xd0a8378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_RCC_CONFIG_RESERVED 3 0xd0a83790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_RCC_IOV_FUNC_IDENTIFIER 3 0xd0a83794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_BIF_BME_STATUS 3 0xd0a8382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_BIF_ATOMIC_ERR_LOG 3 0xd0a83830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0a8384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0a83850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0a83854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0a83858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0a8385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_GPU_HDP_FLUSH_REQ 3 0xd0a83898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_GPU_HDP_FLUSH_DONE 3 0xd0a8389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_BIF_TRANS_PENDING 3 0xd0a838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0a838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_TRN_DW0 3 0xd0a83958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_TRN_DW1 3 0xd0a8395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_TRN_DW2 3 0xd0a83960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_TRN_DW3 3 0xd0a83964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_RCV_DW0 3 0xd0a83968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_RCV_DW1 3 0xd0a8396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_RCV_DW2 3 0xd0a83970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MAILBOX_MSGBUF_RCV_DW3 3 0xd0a83974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MAILBOX_CONTROL 3 0xd0a83978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_MAILBOX_INT_CNTL 3 0xd0a8397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF21_BIF_VMHV_MAILBOX 3 0xd0a83980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT0_ADDR_LO 3 0xd0ac2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT0_ADDR_HI 3 0xd0ac2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT0_MSG_DATA 3 0xd0ac2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT0_CONTROL 3 0xd0ac200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT1_ADDR_LO 3 0xd0ac2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT1_ADDR_HI 3 0xd0ac2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT1_MSG_DATA 3 0xd0ac2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT1_CONTROL 3 0xd0ac201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT2_ADDR_LO 3 0xd0ac2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT2_ADDR_HI 3 0xd0ac2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT2_MSG_DATA 3 0xd0ac2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT2_CONTROL 3 0xd0ac202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT3_ADDR_LO 3 0xd0ac2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT3_ADDR_HI 3 0xd0ac2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT3_MSG_DATA 3 0xd0ac2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_VECT3_CONTROL 3 0xd0ac203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF21_GFXMSIX_PBA 3 0xd0ac3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MM_INDEX 3 0xd0b00000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MM_DATA 3 0xd0b00004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MM_INDEX_HI 3 0xd0b00018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_RCC_ERR_LOG 3 0xd0b03694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_RCC_DOORBELL_APER_EN 3 0xd0b03780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_RCC_CONFIG_MEMSIZE 3 0xd0b0378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_RCC_CONFIG_RESERVED 3 0xd0b03790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_RCC_IOV_FUNC_IDENTIFIER 3 0xd0b03794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_BIF_BME_STATUS 3 0xd0b0382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_BIF_ATOMIC_ERR_LOG 3 0xd0b03830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0b0384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0b03850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0b03854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0b03858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0b0385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_GPU_HDP_FLUSH_REQ 3 0xd0b03898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_GPU_HDP_FLUSH_DONE 3 0xd0b0389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_BIF_TRANS_PENDING 3 0xd0b038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0b038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_TRN_DW0 3 0xd0b03958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_TRN_DW1 3 0xd0b0395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_TRN_DW2 3 0xd0b03960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_TRN_DW3 3 0xd0b03964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_RCV_DW0 3 0xd0b03968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_RCV_DW1 3 0xd0b0396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_RCV_DW2 3 0xd0b03970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MAILBOX_MSGBUF_RCV_DW3 3 0xd0b03974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MAILBOX_CONTROL 3 0xd0b03978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_MAILBOX_INT_CNTL 3 0xd0b0397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF22_BIF_VMHV_MAILBOX 3 0xd0b03980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT0_ADDR_LO 3 0xd0b42000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT0_ADDR_HI 3 0xd0b42004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT0_MSG_DATA 3 0xd0b42008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT0_CONTROL 3 0xd0b4200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT1_ADDR_LO 3 0xd0b42010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT1_ADDR_HI 3 0xd0b42014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT1_MSG_DATA 3 0xd0b42018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT1_CONTROL 3 0xd0b4201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT2_ADDR_LO 3 0xd0b42020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT2_ADDR_HI 3 0xd0b42024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT2_MSG_DATA 3 0xd0b42028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT2_CONTROL 3 0xd0b4202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT3_ADDR_LO 3 0xd0b42030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT3_ADDR_HI 3 0xd0b42034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT3_MSG_DATA 3 0xd0b42038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_VECT3_CONTROL 3 0xd0b4203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF22_GFXMSIX_PBA 3 0xd0b43000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MM_INDEX 3 0xd0b80000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MM_DATA 3 0xd0b80004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MM_INDEX_HI 3 0xd0b80018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_RCC_ERR_LOG 3 0xd0b83694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_RCC_DOORBELL_APER_EN 3 0xd0b83780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_RCC_CONFIG_MEMSIZE 3 0xd0b8378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_RCC_CONFIG_RESERVED 3 0xd0b83790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_RCC_IOV_FUNC_IDENTIFIER 3 0xd0b83794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_BIF_BME_STATUS 3 0xd0b8382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_BIF_ATOMIC_ERR_LOG 3 0xd0b83830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0b8384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0b83850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0b83854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0b83858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0b8385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_GPU_HDP_FLUSH_REQ 3 0xd0b83898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_GPU_HDP_FLUSH_DONE 3 0xd0b8389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_BIF_TRANS_PENDING 3 0xd0b838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0b838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_TRN_DW0 3 0xd0b83958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_TRN_DW1 3 0xd0b8395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_TRN_DW2 3 0xd0b83960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_TRN_DW3 3 0xd0b83964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_RCV_DW0 3 0xd0b83968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_RCV_DW1 3 0xd0b8396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_RCV_DW2 3 0xd0b83970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MAILBOX_MSGBUF_RCV_DW3 3 0xd0b83974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MAILBOX_CONTROL 3 0xd0b83978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_MAILBOX_INT_CNTL 3 0xd0b8397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF23_BIF_VMHV_MAILBOX 3 0xd0b83980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT0_ADDR_LO 3 0xd0bc2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT0_ADDR_HI 3 0xd0bc2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT0_MSG_DATA 3 0xd0bc2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT0_CONTROL 3 0xd0bc200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT1_ADDR_LO 3 0xd0bc2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT1_ADDR_HI 3 0xd0bc2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT1_MSG_DATA 3 0xd0bc2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT1_CONTROL 3 0xd0bc201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT2_ADDR_LO 3 0xd0bc2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT2_ADDR_HI 3 0xd0bc2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT2_MSG_DATA 3 0xd0bc2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT2_CONTROL 3 0xd0bc202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT3_ADDR_LO 3 0xd0bc2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT3_ADDR_HI 3 0xd0bc2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT3_MSG_DATA 3 0xd0bc2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_VECT3_CONTROL 3 0xd0bc203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF23_GFXMSIX_PBA 3 0xd0bc3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MM_INDEX 3 0xd0c00000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MM_DATA 3 0xd0c00004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MM_INDEX_HI 3 0xd0c00018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_RCC_ERR_LOG 3 0xd0c03694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_RCC_DOORBELL_APER_EN 3 0xd0c03780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_RCC_CONFIG_MEMSIZE 3 0xd0c0378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_RCC_CONFIG_RESERVED 3 0xd0c03790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_RCC_IOV_FUNC_IDENTIFIER 3 0xd0c03794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_BIF_BME_STATUS 3 0xd0c0382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_BIF_ATOMIC_ERR_LOG 3 0xd0c03830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0c0384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0c03850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0c03854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0c03858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0c0385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_GPU_HDP_FLUSH_REQ 3 0xd0c03898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_GPU_HDP_FLUSH_DONE 3 0xd0c0389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_BIF_TRANS_PENDING 3 0xd0c038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0c038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_TRN_DW0 3 0xd0c03958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_TRN_DW1 3 0xd0c0395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_TRN_DW2 3 0xd0c03960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_TRN_DW3 3 0xd0c03964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_RCV_DW0 3 0xd0c03968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_RCV_DW1 3 0xd0c0396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_RCV_DW2 3 0xd0c03970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MAILBOX_MSGBUF_RCV_DW3 3 0xd0c03974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MAILBOX_CONTROL 3 0xd0c03978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_MAILBOX_INT_CNTL 3 0xd0c0397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF24_BIF_VMHV_MAILBOX 3 0xd0c03980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT0_ADDR_LO 3 0xd0c42000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT0_ADDR_HI 3 0xd0c42004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT0_MSG_DATA 3 0xd0c42008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT0_CONTROL 3 0xd0c4200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT1_ADDR_LO 3 0xd0c42010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT1_ADDR_HI 3 0xd0c42014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT1_MSG_DATA 3 0xd0c42018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT1_CONTROL 3 0xd0c4201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT2_ADDR_LO 3 0xd0c42020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT2_ADDR_HI 3 0xd0c42024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT2_MSG_DATA 3 0xd0c42028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT2_CONTROL 3 0xd0c4202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT3_ADDR_LO 3 0xd0c42030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT3_ADDR_HI 3 0xd0c42034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT3_MSG_DATA 3 0xd0c42038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_VECT3_CONTROL 3 0xd0c4203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF24_GFXMSIX_PBA 3 0xd0c43000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MM_INDEX 3 0xd0c80000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MM_DATA 3 0xd0c80004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MM_INDEX_HI 3 0xd0c80018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_RCC_ERR_LOG 3 0xd0c83694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_RCC_DOORBELL_APER_EN 3 0xd0c83780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_RCC_CONFIG_MEMSIZE 3 0xd0c8378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_RCC_CONFIG_RESERVED 3 0xd0c83790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_RCC_IOV_FUNC_IDENTIFIER 3 0xd0c83794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_BIF_BME_STATUS 3 0xd0c8382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_BIF_ATOMIC_ERR_LOG 3 0xd0c83830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0c8384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0c83850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0c83854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0c83858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0c8385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_GPU_HDP_FLUSH_REQ 3 0xd0c83898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_GPU_HDP_FLUSH_DONE 3 0xd0c8389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_BIF_TRANS_PENDING 3 0xd0c838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0c838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_TRN_DW0 3 0xd0c83958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_TRN_DW1 3 0xd0c8395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_TRN_DW2 3 0xd0c83960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_TRN_DW3 3 0xd0c83964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_RCV_DW0 3 0xd0c83968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_RCV_DW1 3 0xd0c8396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_RCV_DW2 3 0xd0c83970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MAILBOX_MSGBUF_RCV_DW3 3 0xd0c83974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MAILBOX_CONTROL 3 0xd0c83978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_MAILBOX_INT_CNTL 3 0xd0c8397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF25_BIF_VMHV_MAILBOX 3 0xd0c83980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT0_ADDR_LO 3 0xd0cc2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT0_ADDR_HI 3 0xd0cc2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT0_MSG_DATA 3 0xd0cc2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT0_CONTROL 3 0xd0cc200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT1_ADDR_LO 3 0xd0cc2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT1_ADDR_HI 3 0xd0cc2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT1_MSG_DATA 3 0xd0cc2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT1_CONTROL 3 0xd0cc201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT2_ADDR_LO 3 0xd0cc2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT2_ADDR_HI 3 0xd0cc2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT2_MSG_DATA 3 0xd0cc2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT2_CONTROL 3 0xd0cc202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT3_ADDR_LO 3 0xd0cc2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT3_ADDR_HI 3 0xd0cc2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT3_MSG_DATA 3 0xd0cc2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_VECT3_CONTROL 3 0xd0cc203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF25_GFXMSIX_PBA 3 0xd0cc3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MM_INDEX 3 0xd0d00000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MM_DATA 3 0xd0d00004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MM_INDEX_HI 3 0xd0d00018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_RCC_ERR_LOG 3 0xd0d03694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_RCC_DOORBELL_APER_EN 3 0xd0d03780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_RCC_CONFIG_MEMSIZE 3 0xd0d0378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_RCC_CONFIG_RESERVED 3 0xd0d03790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_RCC_IOV_FUNC_IDENTIFIER 3 0xd0d03794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_BIF_BME_STATUS 3 0xd0d0382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_BIF_ATOMIC_ERR_LOG 3 0xd0d03830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0d0384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0d03850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0d03854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0d03858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0d0385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_GPU_HDP_FLUSH_REQ 3 0xd0d03898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_GPU_HDP_FLUSH_DONE 3 0xd0d0389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_BIF_TRANS_PENDING 3 0xd0d038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0d038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_TRN_DW0 3 0xd0d03958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_TRN_DW1 3 0xd0d0395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_TRN_DW2 3 0xd0d03960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_TRN_DW3 3 0xd0d03964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_RCV_DW0 3 0xd0d03968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_RCV_DW1 3 0xd0d0396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_RCV_DW2 3 0xd0d03970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MAILBOX_MSGBUF_RCV_DW3 3 0xd0d03974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MAILBOX_CONTROL 3 0xd0d03978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_MAILBOX_INT_CNTL 3 0xd0d0397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF26_BIF_VMHV_MAILBOX 3 0xd0d03980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT0_ADDR_LO 3 0xd0d42000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT0_ADDR_HI 3 0xd0d42004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT0_MSG_DATA 3 0xd0d42008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT0_CONTROL 3 0xd0d4200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT1_ADDR_LO 3 0xd0d42010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT1_ADDR_HI 3 0xd0d42014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT1_MSG_DATA 3 0xd0d42018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT1_CONTROL 3 0xd0d4201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT2_ADDR_LO 3 0xd0d42020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT2_ADDR_HI 3 0xd0d42024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT2_MSG_DATA 3 0xd0d42028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT2_CONTROL 3 0xd0d4202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT3_ADDR_LO 3 0xd0d42030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT3_ADDR_HI 3 0xd0d42034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT3_MSG_DATA 3 0xd0d42038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_VECT3_CONTROL 3 0xd0d4203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF26_GFXMSIX_PBA 3 0xd0d43000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MM_INDEX 3 0xd0d80000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MM_DATA 3 0xd0d80004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MM_INDEX_HI 3 0xd0d80018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_RCC_ERR_LOG 3 0xd0d83694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_RCC_DOORBELL_APER_EN 3 0xd0d83780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_RCC_CONFIG_MEMSIZE 3 0xd0d8378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_RCC_CONFIG_RESERVED 3 0xd0d83790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_RCC_IOV_FUNC_IDENTIFIER 3 0xd0d83794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_BIF_BME_STATUS 3 0xd0d8382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_BIF_ATOMIC_ERR_LOG 3 0xd0d83830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0d8384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0d83850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0d83854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0d83858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0d8385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_GPU_HDP_FLUSH_REQ 3 0xd0d83898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_GPU_HDP_FLUSH_DONE 3 0xd0d8389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_BIF_TRANS_PENDING 3 0xd0d838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0d838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_TRN_DW0 3 0xd0d83958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_TRN_DW1 3 0xd0d8395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_TRN_DW2 3 0xd0d83960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_TRN_DW3 3 0xd0d83964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_RCV_DW0 3 0xd0d83968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_RCV_DW1 3 0xd0d8396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_RCV_DW2 3 0xd0d83970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MAILBOX_MSGBUF_RCV_DW3 3 0xd0d83974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MAILBOX_CONTROL 3 0xd0d83978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_MAILBOX_INT_CNTL 3 0xd0d8397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF27_BIF_VMHV_MAILBOX 3 0xd0d83980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT0_ADDR_LO 3 0xd0dc2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT0_ADDR_HI 3 0xd0dc2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT0_MSG_DATA 3 0xd0dc2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT0_CONTROL 3 0xd0dc200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT1_ADDR_LO 3 0xd0dc2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT1_ADDR_HI 3 0xd0dc2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT1_MSG_DATA 3 0xd0dc2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT1_CONTROL 3 0xd0dc201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT2_ADDR_LO 3 0xd0dc2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT2_ADDR_HI 3 0xd0dc2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT2_MSG_DATA 3 0xd0dc2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT2_CONTROL 3 0xd0dc202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT3_ADDR_LO 3 0xd0dc2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT3_ADDR_HI 3 0xd0dc2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT3_MSG_DATA 3 0xd0dc2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_VECT3_CONTROL 3 0xd0dc203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF27_GFXMSIX_PBA 3 0xd0dc3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MM_INDEX 3 0xd0e00000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MM_DATA 3 0xd0e00004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MM_INDEX_HI 3 0xd0e00018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_RCC_ERR_LOG 3 0xd0e03694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_RCC_DOORBELL_APER_EN 3 0xd0e03780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_RCC_CONFIG_MEMSIZE 3 0xd0e0378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_RCC_CONFIG_RESERVED 3 0xd0e03790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_RCC_IOV_FUNC_IDENTIFIER 3 0xd0e03794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_BIF_BME_STATUS 3 0xd0e0382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_BIF_ATOMIC_ERR_LOG 3 0xd0e03830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0e0384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0e03850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0e03854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0e03858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0e0385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_GPU_HDP_FLUSH_REQ 3 0xd0e03898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_GPU_HDP_FLUSH_DONE 3 0xd0e0389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_BIF_TRANS_PENDING 3 0xd0e038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0e038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_TRN_DW0 3 0xd0e03958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_TRN_DW1 3 0xd0e0395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_TRN_DW2 3 0xd0e03960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_TRN_DW3 3 0xd0e03964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_RCV_DW0 3 0xd0e03968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_RCV_DW1 3 0xd0e0396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_RCV_DW2 3 0xd0e03970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MAILBOX_MSGBUF_RCV_DW3 3 0xd0e03974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MAILBOX_CONTROL 3 0xd0e03978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_MAILBOX_INT_CNTL 3 0xd0e0397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF28_BIF_VMHV_MAILBOX 3 0xd0e03980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT0_ADDR_LO 3 0xd0e42000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT0_ADDR_HI 3 0xd0e42004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT0_MSG_DATA 3 0xd0e42008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT0_CONTROL 3 0xd0e4200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT1_ADDR_LO 3 0xd0e42010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT1_ADDR_HI 3 0xd0e42014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT1_MSG_DATA 3 0xd0e42018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT1_CONTROL 3 0xd0e4201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT2_ADDR_LO 3 0xd0e42020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT2_ADDR_HI 3 0xd0e42024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT2_MSG_DATA 3 0xd0e42028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT2_CONTROL 3 0xd0e4202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT3_ADDR_LO 3 0xd0e42030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT3_ADDR_HI 3 0xd0e42034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT3_MSG_DATA 3 0xd0e42038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_VECT3_CONTROL 3 0xd0e4203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF28_GFXMSIX_PBA 3 0xd0e43000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MM_INDEX 3 0xd0e80000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MM_DATA 3 0xd0e80004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MM_INDEX_HI 3 0xd0e80018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_RCC_ERR_LOG 3 0xd0e83694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_RCC_DOORBELL_APER_EN 3 0xd0e83780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_RCC_CONFIG_MEMSIZE 3 0xd0e8378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_RCC_CONFIG_RESERVED 3 0xd0e83790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_RCC_IOV_FUNC_IDENTIFIER 3 0xd0e83794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_BIF_BME_STATUS 3 0xd0e8382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_BIF_ATOMIC_ERR_LOG 3 0xd0e83830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0e8384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0e83850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0e83854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0e83858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0e8385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_GPU_HDP_FLUSH_REQ 3 0xd0e83898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_GPU_HDP_FLUSH_DONE 3 0xd0e8389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_BIF_TRANS_PENDING 3 0xd0e838a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0e838c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_TRN_DW0 3 0xd0e83958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_TRN_DW1 3 0xd0e8395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_TRN_DW2 3 0xd0e83960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_TRN_DW3 3 0xd0e83964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_RCV_DW0 3 0xd0e83968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_RCV_DW1 3 0xd0e8396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_RCV_DW2 3 0xd0e83970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MAILBOX_MSGBUF_RCV_DW3 3 0xd0e83974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MAILBOX_CONTROL 3 0xd0e83978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_MAILBOX_INT_CNTL 3 0xd0e8397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF29_BIF_VMHV_MAILBOX 3 0xd0e83980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT0_ADDR_LO 3 0xd0ec2000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT0_ADDR_HI 3 0xd0ec2004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT0_MSG_DATA 3 0xd0ec2008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT0_CONTROL 3 0xd0ec200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT1_ADDR_LO 3 0xd0ec2010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT1_ADDR_HI 3 0xd0ec2014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT1_MSG_DATA 3 0xd0ec2018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT1_CONTROL 3 0xd0ec201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT2_ADDR_LO 3 0xd0ec2020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT2_ADDR_HI 3 0xd0ec2024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT2_MSG_DATA 3 0xd0ec2028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT2_CONTROL 3 0xd0ec202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT3_ADDR_LO 3 0xd0ec2030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT3_ADDR_HI 3 0xd0ec2034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT3_MSG_DATA 3 0xd0ec2038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_VECT3_CONTROL 3 0xd0ec203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF29_GFXMSIX_PBA 3 0xd0ec3000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MM_INDEX 3 0xd0f00000 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MM_DATA 3 0xd0f00004 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MM_INDEX_HI 3 0xd0f00018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_RCC_ERR_LOG 3 0xd0f03694 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_RCC_DOORBELL_APER_EN 3 0xd0f03780 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_RCC_CONFIG_MEMSIZE 3 0xd0f0378c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_RCC_CONFIG_RESERVED 3 0xd0f03790 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_RCC_IOV_FUNC_IDENTIFIER 3 0xd0f03794 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_BIF_BME_STATUS 3 0xd0f0382c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_BIF_ATOMIC_ERR_LOG 3 0xd0f03830 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0xd0f0384c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0xd0f03850 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_DOORBELL_SELFRING_GPA_APER_CNTL 3 0xd0f03854 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_HDP_REG_COHERENCY_FLUSH_CNTL 3 0xd0f03858 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0xd0f0385c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_GPU_HDP_FLUSH_REQ 3 0xd0f03898 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_GPU_HDP_FLUSH_DONE 3 0xd0f0389c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_BIF_TRANS_PENDING 3 0xd0f038a0 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_NBIF_GFX_ADDR_LUT_BYPASS 3 0xd0f038c8 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_TRN_DW0 3 0xd0f03958 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_TRN_DW1 3 0xd0f0395c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_TRN_DW2 3 0xd0f03960 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_TRN_DW3 3 0xd0f03964 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_RCV_DW0 3 0xd0f03968 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_RCV_DW1 3 0xd0f0396c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_RCV_DW2 3 0xd0f03970 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MAILBOX_MSGBUF_RCV_DW3 3 0xd0f03974 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MAILBOX_CONTROL 3 0xd0f03978 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_MAILBOX_INT_CNTL 3 0xd0f0397c 0 0 4294967295 cfgBIF_BX_DEV0_EPF0_VF30_BIF_VMHV_MAILBOX 3 0xd0f03980 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT0_ADDR_LO 3 0xd0f42000 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT0_ADDR_HI 3 0xd0f42004 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT0_MSG_DATA 3 0xd0f42008 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT0_CONTROL 3 0xd0f4200c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT1_ADDR_LO 3 0xd0f42010 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT1_ADDR_HI 3 0xd0f42014 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT1_MSG_DATA 3 0xd0f42018 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT1_CONTROL 3 0xd0f4201c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT2_ADDR_LO 3 0xd0f42020 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT2_ADDR_HI 3 0xd0f42024 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT2_MSG_DATA 3 0xd0f42028 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT2_CONTROL 3 0xd0f4202c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT3_ADDR_LO 3 0xd0f42030 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT3_ADDR_HI 3 0xd0f42034 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT3_MSG_DATA 3 0xd0f42038 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_VECT3_CONTROL 3 0xd0f4203c 0 0 4294967295 cfgRCC_DEV0_EPF0_VF30_GFXMSIX_PBA 3 0xd0f43000 0 0 4294967295 cfgPSWUSCFG0_1_VENDOR_ID 3 0xfffe00000000 1 0 4294967295 VENDOR_ID 0 15 cfgPSWUSCFG0_1_DEVICE_ID 3 0xfffe00000002 1 0 4294967295 DEVICE_ID 0 15 cfgPSWUSCFG0_1_COMMAND 3 0xfffe00000004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgPSWUSCFG0_1_STATUS 3 0xfffe00000006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgPSWUSCFG0_1_REVISION_ID 3 0xfffe00000008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgPSWUSCFG0_1_PROG_INTERFACE 3 0xfffe00000009 1 0 4294967295 PROG_INTERFACE 0 7 cfgPSWUSCFG0_1_SUB_CLASS 3 0xfffe0000000a 1 0 4294967295 SUB_CLASS 0 7 cfgPSWUSCFG0_1_BASE_CLASS 3 0xfffe0000000b 1 0 4294967295 BASE_CLASS 0 7 cfgPSWUSCFG0_1_CACHE_LINE 3 0xfffe0000000c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgPSWUSCFG0_1_LATENCY 3 0xfffe0000000d 1 0 4294967295 LATENCY_TIMER 0 7 cfgPSWUSCFG0_1_HEADER 3 0xfffe0000000e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgPSWUSCFG0_1_BIST 3 0xfffe0000000f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgPSWUSCFG0_1_SUB_BUS_NUMBER_LATENCY 3 0xfffe00000018 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 cfgPSWUSCFG0_1_IO_BASE_LIMIT 3 0xfffe0000001c 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 cfgPSWUSCFG0_1_SECONDARY_STATUS 3 0xfffe0000001e 9 0 4294967295 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 RECEIVED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgPSWUSCFG0_1_MEM_BASE_LIMIT 3 0xfffe00000020 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 cfgPSWUSCFG0_1_PREF_BASE_LIMIT 3 0xfffe00000024 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 cfgPSWUSCFG0_1_PREF_BASE_UPPER 3 0xfffe00000028 1 0 4294967295 PREF_BASE_UPPER 0 31 cfgPSWUSCFG0_1_PREF_LIMIT_UPPER 3 0xfffe0000002c 1 0 4294967295 PREF_LIMIT_UPPER 0 31 cfgPSWUSCFG0_1_IO_BASE_LIMIT_HI 3 0xfffe00000030 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 cfgPSWUSCFG0_1_CAP_PTR 3 0xfffe00000034 1 0 4294967295 CAP_PTR 0 7 cfgPSWUSCFG0_1_ROM_BASE_ADDR 3 0xfffe00000038 1 0 4294967295 BASE_ADDR 0 31 cfgPSWUSCFG0_1_INTERRUPT_LINE 3 0xfffe0000003c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgPSWUSCFG0_1_INTERRUPT_PIN 3 0xfffe0000003d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgPSWUSCFG0_1_IRQ_BRIDGE_CNTL 3 0xfffe0000003e 12 0 4294967295 PARITY_RESPONSE_EN 0 0 SERR_EN 1 1 ISA_EN 2 2 VGA_EN 3 3 VGA_DEC 4 4 MASTER_ABORT_MODE 5 5 SECONDARY_BUS_RESET 6 6 FAST_B2B_EN 7 7 PRIMARY_DISCARD_TIMER 8 8 SECONDARY_DISCARD_TIMER 9 9 DISCARD_TIMER_STATUS 10 10 DISCARD_TIMER_SERR_ENABLE 11 11 cfgPSWUSCFG0_1_EXT_BRIDGE_CNTL 3 0xfffe00000040 1 0 4294967295 IO_PORT_80_EN 0 0 cfgPSWUSCFG0_1_VENDOR_CAP_LIST 3 0xfffe00000048 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 cfgPSWUSCFG0_1_ADAPTER_ID_W 3 0xfffe0000004c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgPSWUSCFG0_1_PMI_CAP_LIST 3 0xfffe00000050 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgPSWUSCFG0_1_PMI_CAP 3 0xfffe00000052 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgPSWUSCFG0_1_PMI_STATUS_CNTL 3 0xfffe00000054 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgPSWUSCFG0_1_PCIE_CAP_LIST 3 0xfffe00000058 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgPSWUSCFG0_1_PCIE_CAP 3 0xfffe0000005a 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgPSWUSCFG0_1_DEVICE_CAP 3 0xfffe0000005c 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgPSWUSCFG0_1_DEVICE_CNTL 3 0xfffe00000060 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 cfgPSWUSCFG0_1_DEVICE_STATUS 3 0xfffe00000062 6 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 cfgPSWUSCFG0_1_LINK_CAP 3 0xfffe00000064 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgPSWUSCFG0_1_LINK_CNTL 3 0xfffe00000068 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgPSWUSCFG0_1_LINK_STATUS 3 0xfffe0000006a 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgPSWUSCFG0_1_DEVICE_CAP2 3 0xfffe0000007c 18 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 FRS_SUPPORTED 31 31 cfgPSWUSCFG0_1_DEVICE_CNTL2 3 0xfffe00000080 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgPSWUSCFG0_1_DEVICE_STATUS2 3 0xfffe00000082 1 0 4294967295 RESERVED 0 15 cfgPSWUSCFG0_1_LINK_CAP2 3 0xfffe00000084 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTED 31 31 cfgPSWUSCFG0_1_LINK_CNTL2 3 0xfffe00000088 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgPSWUSCFG0_1_LINK_STATUS2 3 0xfffe0000008a 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgPSWUSCFG0_1_MSI_CAP_LIST 3 0xfffe000000a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgPSWUSCFG0_1_MSI_MSG_CNTL 3 0xfffe000000a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgPSWUSCFG0_1_MSI_MSG_ADDR_LO 3 0xfffe000000a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgPSWUSCFG0_1_MSI_MSG_ADDR_HI 3 0xfffe000000a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgPSWUSCFG0_1_MSI_MSG_DATA 3 0xfffe000000a8 1 0 4294967295 MSI_DATA 0 15 cfgPSWUSCFG0_1_MSI_MSG_DATA_64 3 0xfffe000000ac 1 0 4294967295 MSI_DATA_64 0 15 cfgPSWUSCFG0_1_SSID_CAP_LIST 3 0xfffe000000c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgPSWUSCFG0_1_SSID_CAP 3 0xfffe000000c4 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgPSWUSCFG0_1_MSI_MAP_CAP_LIST 3 0xfffe000000c8 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgPSWUSCFG0_1_MSI_MAP_CAP 3 0xfffe000000ca 3 0 4294967295 EN 0 0 FIXD 1 1 CAP_TYPE 11 15 cfgPSWUSCFG0_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe00000100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe00000104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgPSWUSCFG0_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe00000108 1 0 4294967295 SCRATCH 0 31 cfgPSWUSCFG0_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe0000010c 1 0 4294967295 SCRATCH 0 31 cfgPSWUSCFG0_1_PCIE_VC_ENH_CAP_LIST 3 0xfffe00000110 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_PORT_VC_CAP_REG1 3 0xfffe00000114 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 cfgPSWUSCFG0_1_PCIE_PORT_VC_CAP_REG2 3 0xfffe00000118 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 cfgPSWUSCFG0_1_PCIE_PORT_VC_CNTL 3 0xfffe0000011c 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 cfgPSWUSCFG0_1_PCIE_PORT_VC_STATUS 3 0xfffe0000011e 1 0 4294967295 VC_ARB_TABLE_STATUS 0 0 cfgPSWUSCFG0_1_PCIE_VC0_RESOURCE_CAP 3 0xfffe00000120 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 22 PORT_ARB_TABLE_OFFSET 24 31 cfgPSWUSCFG0_1_PCIE_VC0_RESOURCE_CNTL 3 0xfffe00000124 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgPSWUSCFG0_1_PCIE_VC0_RESOURCE_STATUS 3 0xfffe0000012a 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgPSWUSCFG0_1_PCIE_VC1_RESOURCE_CAP 3 0xfffe0000012c 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 22 PORT_ARB_TABLE_OFFSET 24 31 cfgPSWUSCFG0_1_PCIE_VC1_RESOURCE_CNTL 3 0xfffe00000130 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgPSWUSCFG0_1_PCIE_VC1_RESOURCE_STATUS 3 0xfffe00000136 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgPSWUSCFG0_1_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 3 0xfffe00000140 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_DEV_SERIAL_NUM_DW1 3 0xfffe00000144 1 0 4294967295 SERIAL_NUMBER_LO 0 31 cfgPSWUSCFG0_1_PCIE_DEV_SERIAL_NUM_DW2 3 0xfffe00000148 1 0 4294967295 SERIAL_NUMBER_HI 0 31 cfgPSWUSCFG0_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe00000150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe00000154 17 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 POISONED_TLP_EGRESS_BLOCKED_STATUS 26 26 cfgPSWUSCFG0_1_PCIE_UNCORR_ERR_MASK 3 0xfffe00000158 17 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 POISONED_TLP_EGRESS_BLOCKED_MASK 26 26 cfgPSWUSCFG0_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe0000015c 17 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 POISONED_TLP_EGRESS_BLOCKED_SEVERITY 26 26 cfgPSWUSCFG0_1_PCIE_CORR_ERR_STATUS 3 0xfffe00000160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgPSWUSCFG0_1_PCIE_CORR_ERR_MASK 3 0xfffe00000164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgPSWUSCFG0_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe00000168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgPSWUSCFG0_1_PCIE_HDR_LOG0 3 0xfffe0000016c 1 0 4294967295 TLP_HDR 0 31 cfgPSWUSCFG0_1_PCIE_HDR_LOG1 3 0xfffe00000170 1 0 4294967295 TLP_HDR 0 31 cfgPSWUSCFG0_1_PCIE_HDR_LOG2 3 0xfffe00000174 1 0 4294967295 TLP_HDR 0 31 cfgPSWUSCFG0_1_PCIE_HDR_LOG3 3 0xfffe00000178 1 0 4294967295 TLP_HDR 0 31 cfgPSWUSCFG0_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe00000188 1 0 4294967295 TLP_PREFIX 0 31 cfgPSWUSCFG0_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe0000018c 1 0 4294967295 TLP_PREFIX 0 31 cfgPSWUSCFG0_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe00000190 1 0 4294967295 TLP_PREFIX 0 31 cfgPSWUSCFG0_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe00000194 1 0 4294967295 TLP_PREFIX 0 31 cfgPSWUSCFG0_1_PCIE_SECONDARY_ENH_CAP_LIST 3 0xfffe00000270 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_LINK_CNTL3 3 0xfffe00000274 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 ENABLE_LOWER_SKP_OS_GEN 9 15 cfgPSWUSCFG0_1_PCIE_LANE_ERROR_STATUS 3 0xfffe00000278 1 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 cfgPSWUSCFG0_1_PCIE_LANE_0_EQUALIZATION_CNTL 3 0xfffe0000027c 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_1_EQUALIZATION_CNTL 3 0xfffe0000027e 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_2_EQUALIZATION_CNTL 3 0xfffe00000280 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_3_EQUALIZATION_CNTL 3 0xfffe00000282 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_4_EQUALIZATION_CNTL 3 0xfffe00000284 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_5_EQUALIZATION_CNTL 3 0xfffe00000286 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_6_EQUALIZATION_CNTL 3 0xfffe00000288 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_7_EQUALIZATION_CNTL 3 0xfffe0000028a 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_8_EQUALIZATION_CNTL 3 0xfffe0000028c 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_9_EQUALIZATION_CNTL 3 0xfffe0000028e 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_10_EQUALIZATION_CNTL 3 0xfffe00000290 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_11_EQUALIZATION_CNTL 3 0xfffe00000292 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_12_EQUALIZATION_CNTL 3 0xfffe00000294 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_13_EQUALIZATION_CNTL 3 0xfffe00000296 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_14_EQUALIZATION_CNTL 3 0xfffe00000298 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_LANE_15_EQUALIZATION_CNTL 3 0xfffe0000029a 4 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 cfgPSWUSCFG0_1_PCIE_ACS_ENH_CAP_LIST 3 0xfffe000002a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_ACS_CAP 3 0xfffe000002a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgPSWUSCFG0_1_PCIE_ACS_CNTL 3 0xfffe000002a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgPSWUSCFG0_1_PCIE_MC_ENH_CAP_LIST 3 0xfffe000002f0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_MC_CAP 3 0xfffe000002f4 3 0 4294967295 MC_MAX_GROUP 0 5 MC_WIN_SIZE_REQ 8 13 MC_ECRC_REGEN_SUPP 15 15 cfgPSWUSCFG0_1_PCIE_MC_CNTL 3 0xfffe000002f6 2 0 4294967295 MC_NUM_GROUP 0 5 MC_ENABLE 15 15 cfgPSWUSCFG0_1_PCIE_MC_ADDR0 3 0xfffe000002f8 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 cfgPSWUSCFG0_1_PCIE_MC_ADDR1 3 0xfffe000002fc 1 0 4294967295 MC_BASE_ADDR_1 0 31 cfgPSWUSCFG0_1_PCIE_MC_RCV0 3 0xfffe00000300 1 0 4294967295 MC_RECEIVE_0 0 31 cfgPSWUSCFG0_1_PCIE_MC_RCV1 3 0xfffe00000304 1 0 4294967295 MC_RECEIVE_1 0 31 cfgPSWUSCFG0_1_PCIE_MC_BLOCK_ALL0 3 0xfffe00000308 1 0 4294967295 MC_BLOCK_ALL_0 0 31 cfgPSWUSCFG0_1_PCIE_MC_BLOCK_ALL1 3 0xfffe0000030c 1 0 4294967295 MC_BLOCK_ALL_1 0 31 cfgPSWUSCFG0_1_PCIE_MC_BLOCK_UNTRANSLATED_0 3 0xfffe00000310 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 cfgPSWUSCFG0_1_PCIE_MC_BLOCK_UNTRANSLATED_1 3 0xfffe00000314 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 cfgPSWUSCFG0_1_PCIE_MC_OVERLAY_BAR0 3 0xfffe00000318 2 0 4294967295 MC_OVERLAY_SIZE 0 5 MC_OVERLAY_BAR_0 6 31 cfgPSWUSCFG0_1_PCIE_MC_OVERLAY_BAR1 3 0xfffe0000031c 1 0 4294967295 MC_OVERLAY_BAR_1 0 31 cfgPSWUSCFG0_1_PCIE_LTR_ENH_CAP_LIST 3 0xfffe00000320 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_LTR_CAP 3 0xfffe00000324 4 0 4294967295 LTR_MAX_S_LATENCY_VALUE 0 9 LTR_MAX_S_LATENCY_SCALE 10 12 LTR_MAX_NS_LATENCY_VALUE 16 25 LTR_MAX_NS_LATENCY_SCALE 26 28 cfgPSWUSCFG0_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe00000328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_ARI_CAP 3 0xfffe0000032c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgPSWUSCFG0_1_PCIE_ARI_CNTL 3 0xfffe0000032e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgPSWUSCFG0_1_PCIE_L1_PM_SUB_CAP_LIST 3 0xfffe00000370 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_L1_PM_SUB_CAP 3 0xfffe00000374 8 0 4294967295 PCI_PM_L1_2_SUPPORTED 0 0 PCI_PM_L1_1_SUPPORTED 1 1 ASPM_L1_2_SUPPORTED 2 2 ASPM_L1_1_SUPPORTED 3 3 L1_PM_SUB_SUPPORTED 4 4 PORT_CM_RESTORE_TIME 8 15 PORT_T_POWER_ON_SCALE 16 17 PORT_T_POWER_ON_VALUE 19 23 cfgPSWUSCFG0_1_PCIE_L1_PM_SUB_CNTL 3 0xfffe00000378 7 0 4294967295 PCI_PM_L1_2_EN 0 0 PCI_PM_L1_1_EN 1 1 ASPM_L1_2_EN 2 2 ASPM_L1_1_EN 3 3 COMMON_MODE_RESTORE_TIME 8 15 LTR_L1_2_THRESHOLD_VALUE 16 25 LTR_L1_2_THRESHOLD_SCALE 29 31 cfgPSWUSCFG0_1_PCIE_L1_PM_SUB_CNTL2 3 0xfffe0000037c 2 0 4294967295 T_POWER_ON_SCALE 0 1 T_POWER_ON_VALUE 3 7 cfgPSWUSCFG0_1_PCIE_ESM_CAP_LIST 3 0xfffe000003c4 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_ESM_HEADER_1 3 0xfffe000003c8 3 0 4294967295 ESM_VENDOR_ID 0 15 ESM_CAP_REV 16 19 ESM_CAP_LEN 20 31 cfgPSWUSCFG0_1_PCIE_ESM_HEADER_2 3 0xfffe000003cc 1 0 4294967295 CAP_ID 0 15 cfgPSWUSCFG0_1_PCIE_ESM_STATUS 3 0xfffe000003ce 2 0 4294967295 MIN_TIME_IN_EI_VAL 0 8 MIN_TIME_IN_EI_SCALE 9 11 cfgPSWUSCFG0_1_PCIE_ESM_CTRL 3 0xfffe000003d0 3 0 4294967295 ESM_GEN_3_DATA_RATE 0 6 ESM_GEN_4_DATA_RATE 8 14 ESM_ENABLED 15 15 cfgPSWUSCFG0_1_PCIE_ESM_CAP_1 3 0xfffe000003d4 30 0 4294967295 ESM_8P0G 0 0 ESM_8P1G 1 1 ESM_8P2G 2 2 ESM_8P3G 3 3 ESM_8P4G 4 4 ESM_8P5G 5 5 ESM_8P6G 6 6 ESM_8P7G 7 7 ESM_8P8G 8 8 ESM_8P9G 9 9 ESM_9P0G 10 10 ESM_9P1G 11 11 ESM_9P2G 12 12 ESM_9P3G 13 13 ESM_9P4G 14 14 ESM_9P5G 15 15 ESM_9P6G 16 16 ESM_9P7G 17 17 ESM_9P8G 18 18 ESM_9P9G 19 19 ESM_10P0G 20 20 ESM_10P1G 21 21 ESM_10P2G 22 22 ESM_10P3G 23 23 ESM_10P4G 24 24 ESM_10P5G 25 25 ESM_10P6G 26 26 ESM_10P7G 27 27 ESM_10P8G 28 28 ESM_10P9G 29 29 cfgPSWUSCFG0_1_PCIE_ESM_CAP_2 3 0xfffe000003d8 30 0 4294967295 ESM_11P0G 0 0 ESM_11P1G 1 1 ESM_11P2G 2 2 ESM_11P3G 3 3 ESM_11P4G 4 4 ESM_11P5G 5 5 ESM_11P6G 6 6 ESM_11P7G 7 7 ESM_11P8G 8 8 ESM_11P9G 9 9 ESM_12P0G 10 10 ESM_12P1G 11 11 ESM_12P2G 12 12 ESM_12P3G 13 13 ESM_12P4G 14 14 ESM_12P5G 15 15 ESM_12P6G 16 16 ESM_12P7G 17 17 ESM_12P8G 18 18 ESM_12P9G 19 19 ESM_13P0G 20 20 ESM_13P1G 21 21 ESM_13P2G 22 22 ESM_13P3G 23 23 ESM_13P4G 24 24 ESM_13P5G 25 25 ESM_13P6G 26 26 ESM_13P7G 27 27 ESM_13P8G 28 28 ESM_13P9G 29 29 cfgPSWUSCFG0_1_PCIE_ESM_CAP_3 3 0xfffe000003dc 20 0 4294967295 ESM_14P0G 0 0 ESM_14P1G 1 1 ESM_14P2G 2 2 ESM_14P3G 3 3 ESM_14P4G 4 4 ESM_14P5G 5 5 ESM_14P6G 6 6 ESM_14P7G 7 7 ESM_14P8G 8 8 ESM_14P9G 9 9 ESM_15P0G 10 10 ESM_15P1G 11 11 ESM_15P2G 12 12 ESM_15P3G 13 13 ESM_15P4G 14 14 ESM_15P5G 15 15 ESM_15P6G 16 16 ESM_15P7G 17 17 ESM_15P8G 18 18 ESM_15P9G 19 19 cfgPSWUSCFG0_1_PCIE_ESM_CAP_4 3 0xfffe000003e0 30 0 4294967295 ESM_16P0G 0 0 ESM_16P1G 1 1 ESM_16P2G 2 2 ESM_16P3G 3 3 ESM_16P4G 4 4 ESM_16P5G 5 5 ESM_16P6G 6 6 ESM_16P7G 7 7 ESM_16P8G 8 8 ESM_16P9G 9 9 ESM_17P0G 10 10 ESM_17P1G 11 11 ESM_17P2G 12 12 ESM_17P3G 13 13 ESM_17P4G 14 14 ESM_17P5G 15 15 ESM_17P6G 16 16 ESM_17P7G 17 17 ESM_17P8G 18 18 ESM_17P9G 19 19 ESM_18P0G 20 20 ESM_18P1G 21 21 ESM_18P2G 22 22 ESM_18P3G 23 23 ESM_18P4G 24 24 ESM_18P5G 25 25 ESM_18P6G 26 26 ESM_18P7G 27 27 ESM_18P8G 28 28 ESM_18P9G 29 29 cfgPSWUSCFG0_1_PCIE_ESM_CAP_5 3 0xfffe000003e4 30 0 4294967295 ESM_19P0G 0 0 ESM_19P1G 1 1 ESM_19P2G 2 2 ESM_19P3G 3 3 ESM_19P4G 4 4 ESM_19P5G 5 5 ESM_19P6G 6 6 ESM_19P7G 7 7 ESM_19P8G 8 8 ESM_19P9G 9 9 ESM_20P0G 10 10 ESM_20P1G 11 11 ESM_20P2G 12 12 ESM_20P3G 13 13 ESM_20P4G 14 14 ESM_20P5G 15 15 ESM_20P6G 16 16 ESM_20P7G 17 17 ESM_20P8G 18 18 ESM_20P9G 19 19 ESM_21P0G 20 20 ESM_21P1G 21 21 ESM_21P2G 22 22 ESM_21P3G 23 23 ESM_21P4G 24 24 ESM_21P5G 25 25 ESM_21P6G 26 26 ESM_21P7G 27 27 ESM_21P8G 28 28 ESM_21P9G 29 29 cfgPSWUSCFG0_1_PCIE_ESM_CAP_6 3 0xfffe000003e8 30 0 4294967295 ESM_22P0G 0 0 ESM_22P1G 1 1 ESM_22P2G 2 2 ESM_22P3G 3 3 ESM_22P4G 4 4 ESM_22P5G 5 5 ESM_22P6G 6 6 ESM_22P7G 7 7 ESM_22P8G 8 8 ESM_22P9G 9 9 ESM_23P0G 10 10 ESM_23P1G 11 11 ESM_23P2G 12 12 ESM_23P3G 13 13 ESM_23P4G 14 14 ESM_23P5G 15 15 ESM_23P6G 16 16 ESM_23P7G 17 17 ESM_23P8G 18 18 ESM_23P9G 19 19 ESM_24P0G 20 20 ESM_24P1G 21 21 ESM_24P2G 22 22 ESM_24P3G 23 23 ESM_24P4G 24 24 ESM_24P5G 25 25 ESM_24P6G 26 26 ESM_24P7G 27 27 ESM_24P8G 28 28 ESM_24P9G 29 29 cfgPSWUSCFG0_1_PCIE_ESM_CAP_7 3 0xfffe000003ec 31 0 4294967295 ESM_25P0G 0 0 ESM_25P1G 1 1 ESM_25P2G 2 2 ESM_25P3G 3 3 ESM_25P4G 4 4 ESM_25P5G 5 5 ESM_25P6G 6 6 ESM_25P7G 7 7 ESM_25P8G 8 8 ESM_25P9G 9 9 ESM_26P0G 10 10 ESM_26P1G 11 11 ESM_26P2G 12 12 ESM_26P3G 13 13 ESM_26P4G 14 14 ESM_26P5G 15 15 ESM_26P6G 16 16 ESM_26P7G 17 17 ESM_26P8G 18 18 ESM_26P9G 19 19 ESM_27P0G 20 20 ESM_27P1G 21 21 ESM_27P2G 22 22 ESM_27P3G 23 23 ESM_27P4G 24 24 ESM_27P5G 25 25 ESM_27P6G 26 26 ESM_27P7G 27 27 ESM_27P8G 28 28 ESM_27P9G 29 29 ESM_28P0G 30 30 cfgPSWUSCFG0_1_PCIE_DLF_ENH_CAP_LIST 3 0xfffe00000400 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_DATA_LINK_FEATURE_CAP 3 0xfffe00000404 3 0 4294967295 LOCAL_DLF_SCALED_FLOW_CONTROL_SUPPORTED 0 0 LOCAL_DLF_SUPPORTED_22_1 1 22 DLF_EXCHANGE_ENABLE 31 31 cfgPSWUSCFG0_1_DATA_LINK_FEATURE_STATUS 3 0xfffe00000408 2 0 4294967295 REMOTE_DLF_SUPPORTED 0 22 REMOTE_DLF_SUPPORTED_VALID 31 31 cfgPSWUSCFG0_1_PCIE_PHY_16GT_ENH_CAP_LIST 3 0xfffe00000410 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_LINK_CAP_16GT 3 0xfffe00000414 1 0 4294967295 RESERVED 0 31 cfgPSWUSCFG0_1_LINK_CNTL_16GT 3 0xfffe00000418 1 0 4294967295 RESERVED 0 31 cfgPSWUSCFG0_1_LINK_STATUS_16GT 3 0xfffe0000041c 5 0 4294967295 EQUALIZATION_COMPLETE_16GT 0 0 EQUALIZATION_PHASE1_SUCCESS_16GT 1 1 EQUALIZATION_PHASE2_SUCCESS_16GT 2 2 EQUALIZATION_PHASE3_SUCCESS_16GT 3 3 LINK_EQUALIZATION_REQUEST_16GT 4 4 cfgPSWUSCFG0_1_LOCAL_PARITY_MISMATCH_STATUS_16GT 3 0xfffe00000420 1 0 4294967295 LOCAL_PARITY_MISMATCH_STATUS_BITS 0 15 cfgPSWUSCFG0_1_RTM1_PARITY_MISMATCH_STATUS_16GT 3 0xfffe00000424 1 0 4294967295 RTM1_PARITY_MISMATCH_STATUS_BITS 0 15 cfgPSWUSCFG0_1_RTM2_PARITY_MISMATCH_STATUS_16GT 3 0xfffe00000428 1 0 4294967295 RTM2_PARITY_MISMATCH_STATUS_BITS 0 15 cfgPSWUSCFG0_1_LANE_0_EQUALIZATION_CNTL_16GT 3 0xfffe00000430 2 0 4294967295 LANE_0_DSP_16GT_TX_PRESET 0 3 LANE_0_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_1_EQUALIZATION_CNTL_16GT 3 0xfffe00000431 2 0 4294967295 LANE_1_DSP_16GT_TX_PRESET 0 3 LANE_1_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_2_EQUALIZATION_CNTL_16GT 3 0xfffe00000432 2 0 4294967295 LANE_2_DSP_16GT_TX_PRESET 0 3 LANE_2_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_3_EQUALIZATION_CNTL_16GT 3 0xfffe00000433 2 0 4294967295 LANE_3_DSP_16GT_TX_PRESET 0 3 LANE_3_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_4_EQUALIZATION_CNTL_16GT 3 0xfffe00000434 2 0 4294967295 LANE_4_DSP_16GT_TX_PRESET 0 3 LANE_4_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_5_EQUALIZATION_CNTL_16GT 3 0xfffe00000435 2 0 4294967295 LANE_5_DSP_16GT_TX_PRESET 0 3 LANE_5_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_6_EQUALIZATION_CNTL_16GT 3 0xfffe00000436 2 0 4294967295 LANE_6_DSP_16GT_TX_PRESET 0 3 LANE_6_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_7_EQUALIZATION_CNTL_16GT 3 0xfffe00000437 2 0 4294967295 LANE_7_DSP_16GT_TX_PRESET 0 3 LANE_7_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_8_EQUALIZATION_CNTL_16GT 3 0xfffe00000438 2 0 4294967295 LANE_8_DSP_16GT_TX_PRESET 0 3 LANE_8_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_9_EQUALIZATION_CNTL_16GT 3 0xfffe00000439 2 0 4294967295 LANE_9_DSP_16GT_TX_PRESET 0 3 LANE_9_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_10_EQUALIZATION_CNTL_16GT 3 0xfffe0000043a 2 0 4294967295 LANE_10_DSP_16GT_TX_PRESET 0 3 LANE_10_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_11_EQUALIZATION_CNTL_16GT 3 0xfffe0000043b 2 0 4294967295 LANE_11_DSP_16GT_TX_PRESET 0 3 LANE_11_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_12_EQUALIZATION_CNTL_16GT 3 0xfffe0000043c 2 0 4294967295 LANE_12_DSP_16GT_TX_PRESET 0 3 LANE_12_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_13_EQUALIZATION_CNTL_16GT 3 0xfffe0000043d 2 0 4294967295 LANE_13_DSP_16GT_TX_PRESET 0 3 LANE_13_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_14_EQUALIZATION_CNTL_16GT 3 0xfffe0000043e 2 0 4294967295 LANE_14_DSP_16GT_TX_PRESET 0 3 LANE_14_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_LANE_15_EQUALIZATION_CNTL_16GT 3 0xfffe0000043f 2 0 4294967295 LANE_15_DSP_16GT_TX_PRESET 0 3 LANE_15_USP_16GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_PCIE_MARGINING_ENH_CAP_LIST 3 0xfffe00000440 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_MARGINING_PORT_CAP 3 0xfffe00000444 1 0 4294967295 MARGINING_USES_SOFTWARE 0 0 cfgPSWUSCFG0_1_MARGINING_PORT_STATUS 3 0xfffe00000446 2 0 4294967295 MARGINING_READY 0 0 MARGINING_SOFTWARE_READY 1 1 cfgPSWUSCFG0_1_LANE_0_MARGINING_LANE_CNTL 3 0xfffe00000448 4 0 4294967295 LANE_0_RECEIVER_NUMBER 0 2 LANE_0_MARGIN_TYPE 3 5 LANE_0_USAGE_MODEL 6 6 LANE_0_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_0_MARGINING_LANE_STATUS 3 0xfffe0000044a 4 0 4294967295 LANE_0_RECEIVER_NUMBER_STATUS 0 2 LANE_0_MARGIN_TYPE_STATUS 3 5 LANE_0_USAGE_MODEL_STATUS 6 6 LANE_0_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_1_MARGINING_LANE_CNTL 3 0xfffe0000044c 4 0 4294967295 LANE_1_RECEIVER_NUMBER 0 2 LANE_1_MARGIN_TYPE 3 5 LANE_1_USAGE_MODEL 6 6 LANE_1_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_1_MARGINING_LANE_STATUS 3 0xfffe0000044e 4 0 4294967295 LANE_1_RECEIVER_NUMBER_STATUS 0 2 LANE_1_MARGIN_TYPE_STATUS 3 5 LANE_1_USAGE_MODEL_STATUS 6 6 LANE_1_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_2_MARGINING_LANE_CNTL 3 0xfffe00000450 4 0 4294967295 LANE_2_RECEIVER_NUMBER 0 2 LANE_2_MARGIN_TYPE 3 5 LANE_2_USAGE_MODEL 6 6 LANE_2_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_2_MARGINING_LANE_STATUS 3 0xfffe00000452 4 0 4294967295 LANE_2_RECEIVER_NUMBER_STATUS 0 2 LANE_2_MARGIN_TYPE_STATUS 3 5 LANE_2_USAGE_MODEL_STATUS 6 6 LANE_2_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_3_MARGINING_LANE_CNTL 3 0xfffe00000454 4 0 4294967295 LANE_3_RECEIVER_NUMBER 0 2 LANE_3_MARGIN_TYPE 3 5 LANE_3_USAGE_MODEL 6 6 LANE_3_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_3_MARGINING_LANE_STATUS 3 0xfffe00000456 4 0 4294967295 LANE_3_RECEIVER_NUMBER_STATUS 0 2 LANE_3_MARGIN_TYPE_STATUS 3 5 LANE_3_USAGE_MODEL_STATUS 6 6 LANE_3_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_4_MARGINING_LANE_CNTL 3 0xfffe00000458 4 0 4294967295 LANE_4_RECEIVER_NUMBER 0 2 LANE_4_MARGIN_TYPE 3 5 LANE_4_USAGE_MODEL 6 6 LANE_4_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_4_MARGINING_LANE_STATUS 3 0xfffe0000045a 4 0 4294967295 LANE_4_RECEIVER_NUMBER_STATUS 0 2 LANE_4_MARGIN_TYPE_STATUS 3 5 LANE_4_USAGE_MODEL_STATUS 6 6 LANE_4_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_5_MARGINING_LANE_CNTL 3 0xfffe0000045c 4 0 4294967295 LANE_5_RECEIVER_NUMBER 0 2 LANE_5_MARGIN_TYPE 3 5 LANE_5_USAGE_MODEL 6 6 LANE_5_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_5_MARGINING_LANE_STATUS 3 0xfffe0000045e 4 0 4294967295 LANE_5_RECEIVER_NUMBER_STATUS 0 2 LANE_5_MARGIN_TYPE_STATUS 3 5 LANE_5_USAGE_MODEL_STATUS 6 6 LANE_5_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_6_MARGINING_LANE_CNTL 3 0xfffe00000460 4 0 4294967295 LANE_6_RECEIVER_NUMBER 0 2 LANE_6_MARGIN_TYPE 3 5 LANE_6_USAGE_MODEL 6 6 LANE_6_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_6_MARGINING_LANE_STATUS 3 0xfffe00000462 4 0 4294967295 LANE_6_RECEIVER_NUMBER_STATUS 0 2 LANE_6_MARGIN_TYPE_STATUS 3 5 LANE_6_USAGE_MODEL_STATUS 6 6 LANE_6_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_7_MARGINING_LANE_CNTL 3 0xfffe00000464 4 0 4294967295 LANE_7_RECEIVER_NUMBER 0 2 LANE_7_MARGIN_TYPE 3 5 LANE_7_USAGE_MODEL 6 6 LANE_7_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_7_MARGINING_LANE_STATUS 3 0xfffe00000466 4 0 4294967295 LANE_7_RECEIVER_NUMBER_STATUS 0 2 LANE_7_MARGIN_TYPE_STATUS 3 5 LANE_7_USAGE_MODEL_STATUS 6 6 LANE_7_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_8_MARGINING_LANE_CNTL 3 0xfffe00000468 4 0 4294967295 LANE_8_RECEIVER_NUMBER 0 2 LANE_8_MARGIN_TYPE 3 5 LANE_8_USAGE_MODEL 6 6 LANE_8_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_8_MARGINING_LANE_STATUS 3 0xfffe0000046a 4 0 4294967295 LANE_8_RECEIVER_NUMBER_STATUS 0 2 LANE_8_MARGIN_TYPE_STATUS 3 5 LANE_8_USAGE_MODEL_STATUS 6 6 LANE_8_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_9_MARGINING_LANE_CNTL 3 0xfffe0000046c 4 0 4294967295 LANE_9_RECEIVER_NUMBER 0 2 LANE_9_MARGIN_TYPE 3 5 LANE_9_USAGE_MODEL 6 6 LANE_9_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_9_MARGINING_LANE_STATUS 3 0xfffe0000046e 4 0 4294967295 LANE_9_RECEIVER_NUMBER_STATUS 0 2 LANE_9_MARGIN_TYPE_STATUS 3 5 LANE_9_USAGE_MODEL_STATUS 6 6 LANE_9_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_10_MARGINING_LANE_CNTL 3 0xfffe00000470 4 0 4294967295 LANE_10_RECEIVER_NUMBER 0 2 LANE_10_MARGIN_TYPE 3 5 LANE_10_USAGE_MODEL 6 6 LANE_10_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_10_MARGINING_LANE_STATUS 3 0xfffe00000472 4 0 4294967295 LANE_10_RECEIVER_NUMBER_STATUS 0 2 LANE_10_MARGIN_TYPE_STATUS 3 5 LANE_10_USAGE_MODEL_STATUS 6 6 LANE_10_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_11_MARGINING_LANE_CNTL 3 0xfffe00000474 4 0 4294967295 LANE_11_RECEIVER_NUMBER 0 2 LANE_11_MARGIN_TYPE 3 5 LANE_11_USAGE_MODEL 6 6 LANE_11_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_11_MARGINING_LANE_STATUS 3 0xfffe00000476 4 0 4294967295 LANE_11_RECEIVER_NUMBER_STATUS 0 2 LANE_11_MARGIN_TYPE_STATUS 3 5 LANE_11_USAGE_MODEL_STATUS 6 6 LANE_11_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_12_MARGINING_LANE_CNTL 3 0xfffe00000478 4 0 4294967295 LANE_12_RECEIVER_NUMBER 0 2 LANE_12_MARGIN_TYPE 3 5 LANE_12_USAGE_MODEL 6 6 LANE_12_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_12_MARGINING_LANE_STATUS 3 0xfffe0000047a 4 0 4294967295 LANE_12_RECEIVER_NUMBER_STATUS 0 2 LANE_12_MARGIN_TYPE_STATUS 3 5 LANE_12_USAGE_MODEL_STATUS 6 6 LANE_12_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_13_MARGINING_LANE_CNTL 3 0xfffe0000047c 4 0 4294967295 LANE_13_RECEIVER_NUMBER 0 2 LANE_13_MARGIN_TYPE 3 5 LANE_13_USAGE_MODEL 6 6 LANE_13_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_13_MARGINING_LANE_STATUS 3 0xfffe0000047e 4 0 4294967295 LANE_13_RECEIVER_NUMBER_STATUS 0 2 LANE_13_MARGIN_TYPE_STATUS 3 5 LANE_13_USAGE_MODEL_STATUS 6 6 LANE_13_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_14_MARGINING_LANE_CNTL 3 0xfffe00000480 4 0 4294967295 LANE_14_RECEIVER_NUMBER 0 2 LANE_14_MARGIN_TYPE 3 5 LANE_14_USAGE_MODEL 6 6 LANE_14_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_14_MARGINING_LANE_STATUS 3 0xfffe00000482 4 0 4294967295 LANE_14_RECEIVER_NUMBER_STATUS 0 2 LANE_14_MARGIN_TYPE_STATUS 3 5 LANE_14_USAGE_MODEL_STATUS 6 6 LANE_14_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_LANE_15_MARGINING_LANE_CNTL 3 0xfffe00000484 4 0 4294967295 LANE_15_RECEIVER_NUMBER 0 2 LANE_15_MARGIN_TYPE 3 5 LANE_15_USAGE_MODEL 6 6 LANE_15_MARGIN_PAYLOAD 8 15 cfgPSWUSCFG0_1_LANE_15_MARGINING_LANE_STATUS 3 0xfffe00000486 4 0 4294967295 LANE_15_RECEIVER_NUMBER_STATUS 0 2 LANE_15_MARGIN_TYPE_STATUS 3 5 LANE_15_USAGE_MODEL_STATUS 6 6 LANE_15_MARGIN_PAYLOAD_STATUS 8 15 cfgPSWUSCFG0_1_PCIE_CCIX_CAP_LIST 3 0xfffe00000488 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgPSWUSCFG0_1_PCIE_CCIX_HEADER_1 3 0xfffe0000048c 3 0 4294967295 CCIX_VENDOR_ID 0 15 CCIX_CAP_REV 16 19 CCIX_CAP_LEN 20 31 cfgPSWUSCFG0_1_PCIE_CCIX_HEADER_2 3 0xfffe00000490 1 0 4294967295 CAP_ID 0 15 cfgPSWUSCFG0_1_PCIE_CCIX_CAP 3 0xfffe00000492 5 0 4294967295 ESM_MODE_SUPPORTED 0 0 ESM_PHY_REACH_LENGTH_CAPABILITY 1 2 ESM_RECALIBRATION_NEEDED_ON_ESM_DATA_RATE_UPDATE 3 3 ESM_CALIBRATION_TIME 4 6 ESM_QUICK_EQUALIZATION_TIMEOUT 8 10 cfgPSWUSCFG0_1_PCIE_CCIX_ESM_REQD_CAP 3 0xfffe00000494 6 0 4294967295 ESM_SUPPORT_2P5GT 0 0 ESM_SUPPORT_5GT 1 1 ESM_SUPPORT_8GT 2 2 ESM_SUPPORT_16GT 5 5 ESM_SUPPORT_20GT 9 9 ESM_SUPPORT_25GT 14 14 cfgPSWUSCFG0_1_PCIE_CCIX_ESM_OPTL_CAP 3 0xfffe00000498 1 0 4294967295 RESERVED 0 31 cfgPSWUSCFG0_1_PCIE_CCIX_ESM_STATUS 3 0xfffe0000049c 2 0 4294967295 ESM_CURRENT_DATA_RATE 0 6 ESM_CALIBRATION_COMPLETE 7 7 cfgPSWUSCFG0_1_PCIE_CCIX_ESM_CNTL 3 0xfffe000004a0 9 0 4294967295 ESM_DATA_RATE0 0 6 ESM_PERFORM_CALIBRATION 7 7 ESM_DATA_RATE1 8 14 ESM_ENABLE 15 15 ESM_EXTENDED_EQUALIZATION_PHASE2_TIMEOUT 16 18 ESM_EXTENDED_EQUALIZATION_PHASE3_TIMEOUT 20 22 LINK_REACH_TARGET 24 24 RETIMER_PRESENT 25 25 ESM_QUICK_EQUALIZATION_TIMEOUT_SELECT 26 28 cfgPSWUSCFG0_1_ESM_LANE_0_EQUALIZATION_CNTL_20GT 3 0xfffe000004a4 2 0 4294967295 ESM_LANE_0_DSP_20GT_TX_PRESET 0 3 ESM_LANE_0_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_1_EQUALIZATION_CNTL_20GT 3 0xfffe000004a5 2 0 4294967295 ESM_LANE_1_DSP_20GT_TX_PRESET 0 3 ESM_LANE_1_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_2_EQUALIZATION_CNTL_20GT 3 0xfffe000004a6 2 0 4294967295 ESM_LANE_2_DSP_20GT_TX_PRESET 0 3 ESM_LANE_2_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_3_EQUALIZATION_CNTL_20GT 3 0xfffe000004a7 2 0 4294967295 ESM_LANE_3_DSP_20GT_TX_PRESET 0 3 ESM_LANE_3_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_4_EQUALIZATION_CNTL_20GT 3 0xfffe000004a8 2 0 4294967295 ESM_LANE_4_DSP_20GT_TX_PRESET 0 3 ESM_LANE_4_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_5_EQUALIZATION_CNTL_20GT 3 0xfffe000004a9 2 0 4294967295 ESM_LANE_5_DSP_20GT_TX_PRESET 0 3 ESM_LANE_5_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_6_EQUALIZATION_CNTL_20GT 3 0xfffe000004aa 2 0 4294967295 ESM_LANE_6_DSP_20GT_TX_PRESET 0 3 ESM_LANE_6_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_7_EQUALIZATION_CNTL_20GT 3 0xfffe000004ab 2 0 4294967295 ESM_LANE_7_DSP_20GT_TX_PRESET 0 3 ESM_LANE_7_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_8_EQUALIZATION_CNTL_20GT 3 0xfffe000004ac 2 0 4294967295 ESM_LANE_8_DSP_20GT_TX_PRESET 0 3 ESM_LANE_8_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_9_EQUALIZATION_CNTL_20GT 3 0xfffe000004ad 2 0 4294967295 ESM_LANE_9_DSP_20GT_TX_PRESET 0 3 ESM_LANE_9_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_10_EQUALIZATION_CNTL_20GT 3 0xfffe000004ae 2 0 4294967295 ESM_LANE_10_DSP_20GT_TX_PRESET 0 3 ESM_LANE_10_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_11_EQUALIZATION_CNTL_20GT 3 0xfffe000004af 2 0 4294967295 ESM_LANE_11_DSP_20GT_TX_PRESET 0 3 ESM_LANE_11_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_12_EQUALIZATION_CNTL_20GT 3 0xfffe000004b0 2 0 4294967295 ESM_LANE_12_DSP_20GT_TX_PRESET 0 3 ESM_LANE_12_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_13_EQUALIZATION_CNTL_20GT 3 0xfffe000004b1 2 0 4294967295 ESM_LANE_13_DSP_20GT_TX_PRESET 0 3 ESM_LANE_13_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_14_EQUALIZATION_CNTL_20GT 3 0xfffe000004b2 2 0 4294967295 ESM_LANE_14_DSP_20GT_TX_PRESET 0 3 ESM_LANE_14_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_15_EQUALIZATION_CNTL_20GT 3 0xfffe000004b3 2 0 4294967295 ESM_LANE_15_DSP_20GT_TX_PRESET 0 3 ESM_LANE_15_USP_20GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_0_EQUALIZATION_CNTL_25GT 3 0xfffe000004b4 2 0 4294967295 ESM_LANE_0_DSP_25GT_TX_PRESET 0 3 ESM_LANE_0_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_1_EQUALIZATION_CNTL_25GT 3 0xfffe000004b5 2 0 4294967295 ESM_LANE_1_DSP_25GT_TX_PRESET 0 3 ESM_LANE_1_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_2_EQUALIZATION_CNTL_25GT 3 0xfffe000004b6 2 0 4294967295 ESM_LANE_2_DSP_25GT_TX_PRESET 0 3 ESM_LANE_2_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_3_EQUALIZATION_CNTL_25GT 3 0xfffe000004b7 2 0 4294967295 ESM_LANE_3_DSP_25GT_TX_PRESET 0 3 ESM_LANE_3_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_4_EQUALIZATION_CNTL_25GT 3 0xfffe000004b8 2 0 4294967295 ESM_LANE_4_DSP_25GT_TX_PRESET 0 3 ESM_LANE_4_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_5_EQUALIZATION_CNTL_25GT 3 0xfffe000004b9 2 0 4294967295 ESM_LANE_5_DSP_25GT_TX_PRESET 0 3 ESM_LANE_5_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_6_EQUALIZATION_CNTL_25GT 3 0xfffe000004ba 2 0 4294967295 ESM_LANE_6_DSP_25GT_TX_PRESET 0 3 ESM_LANE_6_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_7_EQUALIZATION_CNTL_25GT 3 0xfffe000004bb 2 0 4294967295 ESM_LANE_7_DSP_25GT_TX_PRESET 0 3 ESM_LANE_7_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_8_EQUALIZATION_CNTL_25GT 3 0xfffe000004bc 2 0 4294967295 ESM_LANE_8_DSP_25GT_TX_PRESET 0 3 ESM_LANE_8_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_9_EQUALIZATION_CNTL_25GT 3 0xfffe000004bd 2 0 4294967295 ESM_LANE_9_DSP_25GT_TX_PRESET 0 3 ESM_LANE_9_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_10_EQUALIZATION_CNTL_25GT 3 0xfffe000004be 2 0 4294967295 ESM_LANE_10_DSP_25GT_TX_PRESET 0 3 ESM_LANE_10_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_11_EQUALIZATION_CNTL_25GT 3 0xfffe000004bf 2 0 4294967295 ESM_LANE_11_DSP_25GT_TX_PRESET 0 3 ESM_LANE_11_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_12_EQUALIZATION_CNTL_25GT 3 0xfffe000004c0 2 0 4294967295 ESM_LANE_12_DSP_25GT_TX_PRESET 0 3 ESM_LANE_12_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_13_EQUALIZATION_CNTL_25GT 3 0xfffe000004c1 2 0 4294967295 ESM_LANE_13_DSP_25GT_TX_PRESET 0 3 ESM_LANE_13_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_14_EQUALIZATION_CNTL_25GT 3 0xfffe000004c2 2 0 4294967295 ESM_LANE_14_DSP_25GT_TX_PRESET 0 3 ESM_LANE_14_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_ESM_LANE_15_EQUALIZATION_CNTL_25GT 3 0xfffe000004c3 2 0 4294967295 ESM_LANE_15_DSP_25GT_TX_PRESET 0 3 ESM_LANE_15_USP_25GT_TX_PRESET 4 7 cfgPSWUSCFG0_1_PCIE_CCIX_TRANS_CAP 3 0xfffe000004c4 1 0 4294967295 CCIX_OPTIMIZED_TLP_FORMAT_SUPPORT 0 0 cfgPSWUSCFG0_1_PCIE_CCIX_TRANS_CNTL 3 0xfffe000004c8 2 0 4294967295 CCIX_OPTIMIZED_TLP_FORMAT_ENABLE 0 0 CCIX_PCIE_COMPATIBLE_TLP_ENABLE 1 1 cfgBIF_BX_PF0_MM_INDEX 3 0x0 2 0 4294967295 MM_OFFSET 0 30 MM_APER 31 31 cfgBIF_BX_PF0_MM_DATA 3 0x4 1 0 4294967295 MM_DATA 0 31 cfgBIF_BX_PF0_MM_INDEX_HI 3 0x18 1 0 4294967295 MM_OFFSET_HI 0 31 cfgSUM_INDEX 3 0x1000e0 1 0 4294967295 SUM_INDEX 0 31 cfgSUM_DATA 3 0x1000e4 1 0 4294967295 SUM_DATA 0 31 cfgBIF_CFG_DEV0_SWDS1_VENDOR_ID 3 0xfffe10100000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_SWDS1_DEVICE_ID 3 0xfffe10100002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_SWDS1_COMMAND 3 0xfffe10100004 11 0 4294967295 IOEN_DN 0 0 MEMEN_DN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_SWDS1_STATUS 3 0xfffe10100006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_SWDS1_REVISION_ID 3 0xfffe10100008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_SWDS1_PROG_INTERFACE 3 0xfffe10100009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_SWDS1_SUB_CLASS 3 0xfffe1010000a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_SWDS1_BASE_CLASS 3 0xfffe1010000b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_SWDS1_CACHE_LINE 3 0xfffe1010000c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_SWDS1_LATENCY 3 0xfffe1010000d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_SWDS1_HEADER 3 0xfffe1010000e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_SWDS1_BIST 3 0xfffe1010000f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_SWDS1_BASE_ADDR_1 3 0xfffe10100010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_SWDS1_BASE_ADDR_2 3 0xfffe10100014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_SWDS1_SUB_BUS_NUMBER_LATENCY 3 0xfffe10100018 4 0 4294967295 PRIMARY_BUS 0 7 SECONDARY_BUS 8 15 SUB_BUS_NUM 16 23 SECONDARY_LATENCY_TIMER 24 31 cfgBIF_CFG_DEV0_SWDS1_IO_BASE_LIMIT 3 0xfffe1010001c 4 0 4294967295 IO_BASE_TYPE 0 3 IO_BASE 4 7 IO_LIMIT_TYPE 8 11 IO_LIMIT 12 15 cfgBIF_CFG_DEV0_SWDS1_SECONDARY_STATUS 3 0xfffe1010001e 9 0 4294967295 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 RECEIVED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_SWDS1_MEM_BASE_LIMIT 3 0xfffe10100020 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20 20 31 cfgBIF_CFG_DEV0_SWDS1_PREF_BASE_LIMIT 3 0xfffe10100024 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20 20 31 cfgBIF_CFG_DEV0_SWDS1_PREF_BASE_UPPER 3 0xfffe10100028 1 0 4294967295 PREF_BASE_UPPER 0 31 cfgBIF_CFG_DEV0_SWDS1_PREF_LIMIT_UPPER 3 0xfffe1010002c 1 0 4294967295 PREF_LIMIT_UPPER 0 31 cfgBIF_CFG_DEV0_SWDS1_IO_BASE_LIMIT_HI 3 0xfffe10100030 2 0 4294967295 IO_BASE_31_16 0 15 IO_LIMIT_31_16 16 31 cfgBIF_CFG_DEV0_SWDS1_CAP_PTR 3 0xfffe10100034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_SWDS1_ROM_BASE_ADDR 3 0xfffe10100038 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_SWDS1_INTERRUPT_LINE 3 0xfffe1010003c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_SWDS1_INTERRUPT_PIN 3 0xfffe1010003d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_SWDS1_IRQ_BRIDGE_CNTL 3 0xfffe1010003e 12 0 4294967295 PARITY_RESPONSE_EN 0 0 SERR_EN 1 1 ISA_EN 2 2 VGA_EN 3 3 VGA_DEC 4 4 MASTER_ABORT_MODE 5 5 SECONDARY_BUS_RESET 6 6 FAST_B2B_EN 7 7 PRIMARY_DISCARD_TIMER 8 8 SECONDARY_DISCARD_TIMER 9 9 DISCARD_TIMER_STATUS 10 10 DISCARD_TIMER_SERR_ENABLE 11 11 cfgBIF_CFG_DEV0_SWDS1_PMI_CAP_LIST 3 0xfffe10100050 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_SWDS1_PMI_CAP 3 0xfffe10100052 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgBIF_CFG_DEV0_SWDS1_PMI_STATUS_CNTL 3 0xfffe10100054 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_CAP_LIST 3 0xfffe10100058 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_CAP 3 0xfffe1010005a 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_SWDS1_DEVICE_CAP 3 0xfffe1010005c 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_SWDS1_DEVICE_CNTL 3 0xfffe10100060 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 BRIDGE_CFG_RETRY_EN 15 15 cfgBIF_CFG_DEV0_SWDS1_DEVICE_STATUS 3 0xfffe10100062 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_SWDS1_LINK_CAP 3 0xfffe10100064 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_SWDS1_LINK_CNTL 3 0xfffe10100068 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_SWDS1_LINK_STATUS 3 0xfffe1010006a 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_SWDS1_SLOT_CAP 3 0xfffe1010006c 12 0 4294967295 ATTN_BUTTON_PRESENT 0 0 PWR_CONTROLLER_PRESENT 1 1 MRL_SENSOR_PRESENT 2 2 ATTN_INDICATOR_PRESENT 3 3 PWR_INDICATOR_PRESENT 4 4 HOTPLUG_SURPRISE 5 5 HOTPLUG_CAPABLE 6 6 SLOT_PWR_LIMIT_VALUE 7 14 SLOT_PWR_LIMIT_SCALE 15 16 ELECTROMECH_INTERLOCK_PRESENT 17 17 NO_COMMAND_COMPLETED_SUPPORTED 18 18 PHYSICAL_SLOT_NUM 19 31 cfgBIF_CFG_DEV0_SWDS1_SLOT_CNTL 3 0xfffe10100070 12 0 4294967295 ATTN_BUTTON_PRESSED_EN 0 0 PWR_FAULT_DETECTED_EN 1 1 MRL_SENSOR_CHANGED_EN 2 2 PRESENCE_DETECT_CHANGED_EN 3 3 COMMAND_COMPLETED_INTR_EN 4 4 HOTPLUG_INTR_EN 5 5 ATTN_INDICATOR_CNTL 6 7 PWR_INDICATOR_CNTL 8 9 PWR_CONTROLLER_CNTL 10 10 ELECTROMECH_INTERLOCK_CNTL 11 11 DL_STATE_CHANGED_EN 12 12 AUTO_SLOT_PWR_LIMIT_DISABLE 13 13 cfgBIF_CFG_DEV0_SWDS1_SLOT_STATUS 3 0xfffe10100072 9 0 4294967295 ATTN_BUTTON_PRESSED 0 0 PWR_FAULT_DETECTED 1 1 MRL_SENSOR_CHANGED 2 2 PRESENCE_DETECT_CHANGED 3 3 COMMAND_COMPLETED 4 4 MRL_SENSOR_STATE 5 5 PRESENCE_DETECT_STATE 6 6 ELECTROMECH_INTERLOCK_STATUS 7 7 DL_STATE_CHANGED 8 8 cfgBIF_CFG_DEV0_SWDS1_DEVICE_CAP2 3 0xfffe1010007c 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_SWDS1_DEVICE_CNTL2 3 0xfffe10100080 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_SWDS1_DEVICE_STATUS2 3 0xfffe10100082 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_SWDS1_LINK_CAP2 3 0xfffe10100084 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_SWDS1_LINK_CNTL2 3 0xfffe10100088 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_SWDS1_LINK_STATUS2 3 0xfffe1010008a 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_SWDS1_SLOT_CAP2 3 0xfffe1010008c 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_SWDS1_SLOT_CNTL2 3 0xfffe10100090 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_SWDS1_SLOT_STATUS2 3 0xfffe10100092 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_SWDS1_MSI_CAP_LIST 3 0xfffe101000a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_SWDS1_MSI_MSG_CNTL 3 0xfffe101000a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_SWDS1_MSI_MSG_ADDR_LO 3 0xfffe101000a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_SWDS1_MSI_MSG_ADDR_HI 3 0xfffe101000a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_SWDS1_MSI_MSG_DATA 3 0xfffe101000a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_SWDS1_MSI_MSG_DATA_64 3 0xfffe101000ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_SWDS1_SSID_CAP_LIST 3 0xfffe101000c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_SWDS1_SSID_CAP 3 0xfffe101000c4 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10100100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10100104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10100108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1010010c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_VC_ENH_CAP_LIST 3 0xfffe10100110 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_PORT_VC_CAP_REG1 3 0xfffe10100114 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 cfgBIF_CFG_DEV0_SWDS1_PCIE_PORT_VC_CAP_REG2 3 0xfffe10100118 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_PORT_VC_CNTL 3 0xfffe1010011c 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 cfgBIF_CFG_DEV0_SWDS1_PCIE_PORT_VC_STATUS 3 0xfffe1010011e 1 0 4294967295 VC_ARB_TABLE_STATUS 0 0 cfgBIF_CFG_DEV0_SWDS1_PCIE_VC0_RESOURCE_CAP 3 0xfffe10100120 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_VC0_RESOURCE_CNTL 3 0xfffe10100124 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_VC0_RESOURCE_STATUS 3 0xfffe1010012a 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_SWDS1_PCIE_VC1_RESOURCE_CAP 3 0xfffe1010012c 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_VC1_RESOURCE_CNTL 3 0xfffe10100130 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_VC1_RESOURCE_STATUS 3 0xfffe10100136 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_SWDS1_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 3 0xfffe10100140 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_DEV_SERIAL_NUM_DW1 3 0xfffe10100144 1 0 4294967295 SERIAL_NUMBER_LO 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_DEV_SERIAL_NUM_DW2 3 0xfffe10100148 1 0 4294967295 SERIAL_NUMBER_HI 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10100150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10100154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_SWDS1_PCIE_UNCORR_ERR_MASK 3 0xfffe10100158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_SWDS1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1010015c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_SWDS1_PCIE_CORR_ERR_STATUS 3 0xfffe10100160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_CORR_ERR_MASK 3 0xfffe10100164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10100168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_SWDS1_PCIE_HDR_LOG0 3 0xfffe1010016c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_HDR_LOG1 3 0xfffe10100170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_HDR_LOG2 3 0xfffe10100174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_HDR_LOG3 3 0xfffe10100178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10100188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1010018c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10100190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10100194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_SECONDARY_ENH_CAP_LIST 3 0xfffe10100270 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_LINK_CNTL3 3 0xfffe10100274 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 ENABLE_LOWER_SKP_OS_GEN 9 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_ERROR_STATUS 3 0xfffe10100278 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_0_EQUALIZATION_CNTL 3 0xfffe1010027c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_1_EQUALIZATION_CNTL 3 0xfffe1010027e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_2_EQUALIZATION_CNTL 3 0xfffe10100280 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_3_EQUALIZATION_CNTL 3 0xfffe10100282 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_4_EQUALIZATION_CNTL 3 0xfffe10100284 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_5_EQUALIZATION_CNTL 3 0xfffe10100286 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_6_EQUALIZATION_CNTL 3 0xfffe10100288 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_7_EQUALIZATION_CNTL 3 0xfffe1010028a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_8_EQUALIZATION_CNTL 3 0xfffe1010028c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_9_EQUALIZATION_CNTL 3 0xfffe1010028e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_10_EQUALIZATION_CNTL 3 0xfffe10100290 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_11_EQUALIZATION_CNTL 3 0xfffe10100292 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_12_EQUALIZATION_CNTL 3 0xfffe10100294 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_13_EQUALIZATION_CNTL 3 0xfffe10100296 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_14_EQUALIZATION_CNTL 3 0xfffe10100298 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_LANE_15_EQUALIZATION_CNTL 3 0xfffe1010029a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_ACS_ENH_CAP_LIST 3 0xfffe101002a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_ACS_CAP 3 0xfffe101002a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgBIF_CFG_DEV0_SWDS1_PCIE_ACS_CNTL 3 0xfffe101002a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgBIF_CFG_DEV0_SWDS1_PCIE_DLF_ENH_CAP_LIST 3 0xfffe10100400 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS1_DATA_LINK_FEATURE_CAP 3 0xfffe10100404 2 0 4294967295 LOCAL_DLF_SUPPORTED 0 22 DLF_EXCHANGE_ENABLE 31 31 cfgBIF_CFG_DEV0_SWDS1_DATA_LINK_FEATURE_STATUS 3 0xfffe10100408 2 0 4294967295 REMOTE_DLF_SUPPORTED 0 22 REMOTE_DLF_SUPPORTED_VALID 31 31 cfgBIF_CFG_DEV0_SWDS1_PCIE_PHY_16GT_ENH_CAP_LIST 3 0xfffe10100410 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS1_LINK_CAP_16GT 3 0xfffe10100414 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_SWDS1_LINK_CNTL_16GT 3 0xfffe10100418 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_SWDS1_LINK_STATUS_16GT 3 0xfffe1010041c 5 0 4294967295 EQUALIZATION_COMPLETE_16GT 0 0 EQUALIZATION_PHASE1_SUCCESS_16GT 1 1 EQUALIZATION_PHASE2_SUCCESS_16GT 2 2 EQUALIZATION_PHASE3_SUCCESS_16GT 3 3 LINK_EQUALIZATION_REQUEST_16GT 4 4 cfgBIF_CFG_DEV0_SWDS1_LOCAL_PARITY_MISMATCH_STATUS_16GT 3 0xfffe10100420 1 0 4294967295 LOCAL_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_SWDS1_RTM1_PARITY_MISMATCH_STATUS_16GT 3 0xfffe10100424 1 0 4294967295 RTM1_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_SWDS1_RTM2_PARITY_MISMATCH_STATUS_16GT 3 0xfffe10100428 1 0 4294967295 RTM2_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_SWDS1_LANE_0_EQUALIZATION_CNTL_16GT 3 0xfffe10100430 2 0 4294967295 LANE_0_DSP_16GT_TX_PRESET 0 3 LANE_0_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_1_EQUALIZATION_CNTL_16GT 3 0xfffe10100431 2 0 4294967295 LANE_1_DSP_16GT_TX_PRESET 0 3 LANE_1_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_2_EQUALIZATION_CNTL_16GT 3 0xfffe10100432 2 0 4294967295 LANE_2_DSP_16GT_TX_PRESET 0 3 LANE_2_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_3_EQUALIZATION_CNTL_16GT 3 0xfffe10100433 2 0 4294967295 LANE_3_DSP_16GT_TX_PRESET 0 3 LANE_3_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_4_EQUALIZATION_CNTL_16GT 3 0xfffe10100434 2 0 4294967295 LANE_4_DSP_16GT_TX_PRESET 0 3 LANE_4_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_5_EQUALIZATION_CNTL_16GT 3 0xfffe10100435 2 0 4294967295 LANE_5_DSP_16GT_TX_PRESET 0 3 LANE_5_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_6_EQUALIZATION_CNTL_16GT 3 0xfffe10100436 2 0 4294967295 LANE_6_DSP_16GT_TX_PRESET 0 3 LANE_6_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_7_EQUALIZATION_CNTL_16GT 3 0xfffe10100437 2 0 4294967295 LANE_7_DSP_16GT_TX_PRESET 0 3 LANE_7_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_8_EQUALIZATION_CNTL_16GT 3 0xfffe10100438 2 0 4294967295 LANE_8_DSP_16GT_TX_PRESET 0 3 LANE_8_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_9_EQUALIZATION_CNTL_16GT 3 0xfffe10100439 2 0 4294967295 LANE_9_DSP_16GT_TX_PRESET 0 3 LANE_9_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_10_EQUALIZATION_CNTL_16GT 3 0xfffe1010043a 2 0 4294967295 LANE_10_DSP_16GT_TX_PRESET 0 3 LANE_10_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_11_EQUALIZATION_CNTL_16GT 3 0xfffe1010043b 2 0 4294967295 LANE_11_DSP_16GT_TX_PRESET 0 3 LANE_11_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_12_EQUALIZATION_CNTL_16GT 3 0xfffe1010043c 2 0 4294967295 LANE_12_DSP_16GT_TX_PRESET 0 3 LANE_12_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_13_EQUALIZATION_CNTL_16GT 3 0xfffe1010043d 2 0 4294967295 LANE_13_DSP_16GT_TX_PRESET 0 3 LANE_13_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_14_EQUALIZATION_CNTL_16GT 3 0xfffe1010043e 2 0 4294967295 LANE_14_DSP_16GT_TX_PRESET 0 3 LANE_14_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_LANE_15_EQUALIZATION_CNTL_16GT 3 0xfffe1010043f 2 0 4294967295 LANE_15_DSP_16GT_TX_PRESET 0 3 LANE_15_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_SWDS1_PCIE_MARGINING_ENH_CAP_LIST 3 0xfffe10100440 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_SWDS1_MARGINING_PORT_CAP 3 0xfffe10100444 1 0 4294967295 MARGINING_USES_SOFTWARE 0 0 cfgBIF_CFG_DEV0_SWDS1_MARGINING_PORT_STATUS 3 0xfffe10100446 2 0 4294967295 MARGINING_READY 0 0 MARGINING_SOFTWARE_READY 1 1 cfgBIF_CFG_DEV0_SWDS1_LANE_0_MARGINING_LANE_CNTL 3 0xfffe10100448 4 0 4294967295 LANE_0_RECEIVER_NUMBER 0 2 LANE_0_MARGIN_TYPE 3 5 LANE_0_USAGE_MODEL 6 6 LANE_0_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_0_MARGINING_LANE_STATUS 3 0xfffe1010044a 4 0 4294967295 LANE_0_RECEIVER_NUMBER_STATUS 0 2 LANE_0_MARGIN_TYPE_STATUS 3 5 LANE_0_USAGE_MODEL_STATUS 6 6 LANE_0_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_1_MARGINING_LANE_CNTL 3 0xfffe1010044c 4 0 4294967295 LANE_1_RECEIVER_NUMBER 0 2 LANE_1_MARGIN_TYPE 3 5 LANE_1_USAGE_MODEL 6 6 LANE_1_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_1_MARGINING_LANE_STATUS 3 0xfffe1010044e 4 0 4294967295 LANE_1_RECEIVER_NUMBER_STATUS 0 2 LANE_1_MARGIN_TYPE_STATUS 3 5 LANE_1_USAGE_MODEL_STATUS 6 6 LANE_1_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_2_MARGINING_LANE_CNTL 3 0xfffe10100450 4 0 4294967295 LANE_2_RECEIVER_NUMBER 0 2 LANE_2_MARGIN_TYPE 3 5 LANE_2_USAGE_MODEL 6 6 LANE_2_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_2_MARGINING_LANE_STATUS 3 0xfffe10100452 4 0 4294967295 LANE_2_RECEIVER_NUMBER_STATUS 0 2 LANE_2_MARGIN_TYPE_STATUS 3 5 LANE_2_USAGE_MODEL_STATUS 6 6 LANE_2_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_3_MARGINING_LANE_CNTL 3 0xfffe10100454 4 0 4294967295 LANE_3_RECEIVER_NUMBER 0 2 LANE_3_MARGIN_TYPE 3 5 LANE_3_USAGE_MODEL 6 6 LANE_3_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_3_MARGINING_LANE_STATUS 3 0xfffe10100456 4 0 4294967295 LANE_3_RECEIVER_NUMBER_STATUS 0 2 LANE_3_MARGIN_TYPE_STATUS 3 5 LANE_3_USAGE_MODEL_STATUS 6 6 LANE_3_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_4_MARGINING_LANE_CNTL 3 0xfffe10100458 4 0 4294967295 LANE_4_RECEIVER_NUMBER 0 2 LANE_4_MARGIN_TYPE 3 5 LANE_4_USAGE_MODEL 6 6 LANE_4_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_4_MARGINING_LANE_STATUS 3 0xfffe1010045a 4 0 4294967295 LANE_4_RECEIVER_NUMBER_STATUS 0 2 LANE_4_MARGIN_TYPE_STATUS 3 5 LANE_4_USAGE_MODEL_STATUS 6 6 LANE_4_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_5_MARGINING_LANE_CNTL 3 0xfffe1010045c 4 0 4294967295 LANE_5_RECEIVER_NUMBER 0 2 LANE_5_MARGIN_TYPE 3 5 LANE_5_USAGE_MODEL 6 6 LANE_5_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_5_MARGINING_LANE_STATUS 3 0xfffe1010045e 4 0 4294967295 LANE_5_RECEIVER_NUMBER_STATUS 0 2 LANE_5_MARGIN_TYPE_STATUS 3 5 LANE_5_USAGE_MODEL_STATUS 6 6 LANE_5_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_6_MARGINING_LANE_CNTL 3 0xfffe10100460 4 0 4294967295 LANE_6_RECEIVER_NUMBER 0 2 LANE_6_MARGIN_TYPE 3 5 LANE_6_USAGE_MODEL 6 6 LANE_6_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_6_MARGINING_LANE_STATUS 3 0xfffe10100462 4 0 4294967295 LANE_6_RECEIVER_NUMBER_STATUS 0 2 LANE_6_MARGIN_TYPE_STATUS 3 5 LANE_6_USAGE_MODEL_STATUS 6 6 LANE_6_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_7_MARGINING_LANE_CNTL 3 0xfffe10100464 4 0 4294967295 LANE_7_RECEIVER_NUMBER 0 2 LANE_7_MARGIN_TYPE 3 5 LANE_7_USAGE_MODEL 6 6 LANE_7_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_7_MARGINING_LANE_STATUS 3 0xfffe10100466 4 0 4294967295 LANE_7_RECEIVER_NUMBER_STATUS 0 2 LANE_7_MARGIN_TYPE_STATUS 3 5 LANE_7_USAGE_MODEL_STATUS 6 6 LANE_7_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_8_MARGINING_LANE_CNTL 3 0xfffe10100468 4 0 4294967295 LANE_8_RECEIVER_NUMBER 0 2 LANE_8_MARGIN_TYPE 3 5 LANE_8_USAGE_MODEL 6 6 LANE_8_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_8_MARGINING_LANE_STATUS 3 0xfffe1010046a 4 0 4294967295 LANE_8_RECEIVER_NUMBER_STATUS 0 2 LANE_8_MARGIN_TYPE_STATUS 3 5 LANE_8_USAGE_MODEL_STATUS 6 6 LANE_8_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_9_MARGINING_LANE_CNTL 3 0xfffe1010046c 4 0 4294967295 LANE_9_RECEIVER_NUMBER 0 2 LANE_9_MARGIN_TYPE 3 5 LANE_9_USAGE_MODEL 6 6 LANE_9_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_9_MARGINING_LANE_STATUS 3 0xfffe1010046e 4 0 4294967295 LANE_9_RECEIVER_NUMBER_STATUS 0 2 LANE_9_MARGIN_TYPE_STATUS 3 5 LANE_9_USAGE_MODEL_STATUS 6 6 LANE_9_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_10_MARGINING_LANE_CNTL 3 0xfffe10100470 4 0 4294967295 LANE_10_RECEIVER_NUMBER 0 2 LANE_10_MARGIN_TYPE 3 5 LANE_10_USAGE_MODEL 6 6 LANE_10_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_10_MARGINING_LANE_STATUS 3 0xfffe10100472 4 0 4294967295 LANE_10_RECEIVER_NUMBER_STATUS 0 2 LANE_10_MARGIN_TYPE_STATUS 3 5 LANE_10_USAGE_MODEL_STATUS 6 6 LANE_10_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_11_MARGINING_LANE_CNTL 3 0xfffe10100474 4 0 4294967295 LANE_11_RECEIVER_NUMBER 0 2 LANE_11_MARGIN_TYPE 3 5 LANE_11_USAGE_MODEL 6 6 LANE_11_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_11_MARGINING_LANE_STATUS 3 0xfffe10100476 4 0 4294967295 LANE_11_RECEIVER_NUMBER_STATUS 0 2 LANE_11_MARGIN_TYPE_STATUS 3 5 LANE_11_USAGE_MODEL_STATUS 6 6 LANE_11_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_12_MARGINING_LANE_CNTL 3 0xfffe10100478 4 0 4294967295 LANE_12_RECEIVER_NUMBER 0 2 LANE_12_MARGIN_TYPE 3 5 LANE_12_USAGE_MODEL 6 6 LANE_12_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_12_MARGINING_LANE_STATUS 3 0xfffe1010047a 4 0 4294967295 LANE_12_RECEIVER_NUMBER_STATUS 0 2 LANE_12_MARGIN_TYPE_STATUS 3 5 LANE_12_USAGE_MODEL_STATUS 6 6 LANE_12_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_13_MARGINING_LANE_CNTL 3 0xfffe1010047c 4 0 4294967295 LANE_13_RECEIVER_NUMBER 0 2 LANE_13_MARGIN_TYPE 3 5 LANE_13_USAGE_MODEL 6 6 LANE_13_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_13_MARGINING_LANE_STATUS 3 0xfffe1010047e 4 0 4294967295 LANE_13_RECEIVER_NUMBER_STATUS 0 2 LANE_13_MARGIN_TYPE_STATUS 3 5 LANE_13_USAGE_MODEL_STATUS 6 6 LANE_13_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_14_MARGINING_LANE_CNTL 3 0xfffe10100480 4 0 4294967295 LANE_14_RECEIVER_NUMBER 0 2 LANE_14_MARGIN_TYPE 3 5 LANE_14_USAGE_MODEL 6 6 LANE_14_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_14_MARGINING_LANE_STATUS 3 0xfffe10100482 4 0 4294967295 LANE_14_RECEIVER_NUMBER_STATUS 0 2 LANE_14_MARGIN_TYPE_STATUS 3 5 LANE_14_USAGE_MODEL_STATUS 6 6 LANE_14_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_15_MARGINING_LANE_CNTL 3 0xfffe10100484 4 0 4294967295 LANE_15_RECEIVER_NUMBER 0 2 LANE_15_MARGIN_TYPE 3 5 LANE_15_USAGE_MODEL 6 6 LANE_15_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_SWDS1_LANE_15_MARGINING_LANE_STATUS 3 0xfffe10100486 4 0 4294967295 LANE_15_RECEIVER_NUMBER_STATUS 0 2 LANE_15_MARGIN_TYPE_STATUS 3 5 LANE_15_USAGE_MODEL_STATUS 6 6 LANE_15_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_VENDOR_ID 3 0xfffe10200000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_1_DEVICE_ID 3 0xfffe10200002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_1_COMMAND 3 0xfffe10200004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_1_STATUS 3 0xfffe10200006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_1_REVISION_ID 3 0xfffe10200008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_1_PROG_INTERFACE 3 0xfffe10200009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_1_SUB_CLASS 3 0xfffe1020000a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_1_BASE_CLASS 3 0xfffe1020000b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_1_CACHE_LINE 3 0xfffe1020000c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_1_LATENCY 3 0xfffe1020000d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_1_HEADER 3 0xfffe1020000e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_1_BIST 3 0xfffe1020000f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_1_BASE_ADDR_1 3 0xfffe10200010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_BASE_ADDR_2 3 0xfffe10200014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_BASE_ADDR_3 3 0xfffe10200018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_BASE_ADDR_4 3 0xfffe1020001c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_BASE_ADDR_5 3 0xfffe10200020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_BASE_ADDR_6 3 0xfffe10200024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_CARDBUS_CIS_PTR 3 0xfffe10200028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_1_ADAPTER_ID 3 0xfffe1020002c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_1_ROM_BASE_ADDR 3 0xfffe10200030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_CAP_PTR 3 0xfffe10200034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_1_INTERRUPT_LINE 3 0xfffe1020003c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_1_INTERRUPT_PIN 3 0xfffe1020003d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_1_MIN_GRANT 3 0xfffe1020003e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_1_MAX_LATENCY 3 0xfffe1020003f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_1_VENDOR_CAP_LIST 3 0xfffe10200048 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 cfgBIF_CFG_DEV0_EPF0_1_ADAPTER_ID_W 3 0xfffe1020004c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_1_PMI_CAP_LIST 3 0xfffe10200050 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_1_PMI_CAP 3 0xfffe10200052 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgBIF_CFG_DEV0_EPF0_1_PMI_STATUS_CNTL 3 0xfffe10200054 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_CAP_LIST 3 0xfffe10200064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_CAP 3 0xfffe10200066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_1_DEVICE_CAP 3 0xfffe10200068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_1_DEVICE_CNTL 3 0xfffe1020006c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_1_DEVICE_STATUS 3 0xfffe1020006e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_1_LINK_CAP 3 0xfffe10200070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_1_LINK_CNTL 3 0xfffe10200074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_1_LINK_STATUS 3 0xfffe10200076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_1_DEVICE_CAP2 3 0xfffe10200088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_1_DEVICE_CNTL2 3 0xfffe1020008c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_1_DEVICE_STATUS2 3 0xfffe1020008e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_1_LINK_CAP2 3 0xfffe10200090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_1_LINK_CNTL2 3 0xfffe10200094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_1_LINK_STATUS2 3 0xfffe10200096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_MSI_CAP_LIST 3 0xfffe102000a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_1_MSI_MSG_CNTL 3 0xfffe102000a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_1_MSI_MSG_ADDR_LO 3 0xfffe102000a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_1_MSI_MSG_ADDR_HI 3 0xfffe102000a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_1_MSI_MSG_DATA 3 0xfffe102000a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_1_MSI_MASK 3 0xfffe102000ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_1_MSI_MSG_DATA_64 3 0xfffe102000ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_1_MSI_MASK_64 3 0xfffe102000b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_1_MSI_PENDING 3 0xfffe102000b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_1_MSI_PENDING_64 3 0xfffe102000b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_1_MSIX_CAP_LIST 3 0xfffe102000c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_1_MSIX_MSG_CNTL 3 0xfffe102000c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_1_MSIX_TABLE 3 0xfffe102000c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_1_MSIX_PBA 3 0xfffe102000c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10200100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10200104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10200108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1020010c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VC_ENH_CAP_LIST 3 0xfffe10200110 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PORT_VC_CAP_REG1 3 0xfffe10200114 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PORT_VC_CAP_REG2 3 0xfffe10200118 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PORT_VC_CNTL 3 0xfffe1020011c 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PORT_VC_STATUS 3 0xfffe1020011e 1 0 4294967295 VC_ARB_TABLE_STATUS 0 0 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VC0_RESOURCE_CAP 3 0xfffe10200120 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VC0_RESOURCE_CNTL 3 0xfffe10200124 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VC0_RESOURCE_STATUS 3 0xfffe1020012a 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VC1_RESOURCE_CAP 3 0xfffe1020012c 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VC1_RESOURCE_CNTL 3 0xfffe10200130 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VC1_RESOURCE_STATUS 3 0xfffe10200136 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 3 0xfffe10200140 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DEV_SERIAL_NUM_DW1 3 0xfffe10200144 1 0 4294967295 SERIAL_NUMBER_LO 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DEV_SERIAL_NUM_DW2 3 0xfffe10200148 1 0 4294967295 SERIAL_NUMBER_HI 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10200150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10200154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10200158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1020015c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_1_PCIE_CORR_ERR_STATUS 3 0xfffe10200160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_CORR_ERR_MASK 3 0xfffe10200164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10200168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_1_PCIE_HDR_LOG0 3 0xfffe1020016c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_HDR_LOG1 3 0xfffe10200170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_HDR_LOG2 3 0xfffe10200174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_HDR_LOG3 3 0xfffe10200178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10200188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1020018c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10200190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10200194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR_ENH_CAP_LIST 3 0xfffe10200200 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR1_CAP 3 0xfffe10200204 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR1_CNTL 3 0xfffe10200208 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR2_CAP 3 0xfffe1020020c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR2_CNTL 3 0xfffe10200210 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR3_CAP 3 0xfffe10200214 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR3_CNTL 3 0xfffe10200218 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR4_CAP 3 0xfffe1020021c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR4_CNTL 3 0xfffe10200220 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR5_CAP 3 0xfffe10200224 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR5_CNTL 3 0xfffe10200228 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR6_CAP 3 0xfffe1020022c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_BAR6_CNTL 3 0xfffe10200230 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PWR_BUDGET_ENH_CAP_LIST 3 0xfffe10200240 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PWR_BUDGET_DATA_SELECT 3 0xfffe10200244 1 0 4294967295 DATA_SELECT 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PWR_BUDGET_DATA 3 0xfffe10200248 6 0 4294967295 BASE_POWER 0 7 DATA_SCALE 8 9 PM_SUB_STATE 10 12 PM_STATE 13 14 TYPE 15 17 POWER_RAIL 18 20 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PWR_BUDGET_CAP 3 0xfffe1020024c 1 0 4294967295 SYSTEM_ALLOCATED 0 0 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_ENH_CAP_LIST 3 0xfffe10200250 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_CAP 3 0xfffe10200254 5 0 4294967295 SUBSTATE_MAX 0 4 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_LATENCY_INDICATOR 3 0xfffe10200258 1 0 4294967295 TRANS_LAT_INDICATOR_BITS 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_STATUS 3 0xfffe1020025c 2 0 4294967295 SUBSTATE_STATUS 0 4 SUBSTATE_CNTL_ENABLED 8 8 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_CNTL 3 0xfffe1020025e 1 0 4294967295 SUBSTATE_CNTL 0 4 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_0 3 0xfffe10200260 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_1 3 0xfffe10200261 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_2 3 0xfffe10200262 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_3 3 0xfffe10200263 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_4 3 0xfffe10200264 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_5 3 0xfffe10200265 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_6 3 0xfffe10200266 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_7 3 0xfffe10200267 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SECONDARY_ENH_CAP_LIST 3 0xfffe10200270 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LINK_CNTL3 3 0xfffe10200274 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 ENABLE_LOWER_SKP_OS_GEN 9 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_ERROR_STATUS 3 0xfffe10200278 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_0_EQUALIZATION_CNTL 3 0xfffe1020027c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_1_EQUALIZATION_CNTL 3 0xfffe1020027e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_2_EQUALIZATION_CNTL 3 0xfffe10200280 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_3_EQUALIZATION_CNTL 3 0xfffe10200282 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_4_EQUALIZATION_CNTL 3 0xfffe10200284 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_5_EQUALIZATION_CNTL 3 0xfffe10200286 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_6_EQUALIZATION_CNTL 3 0xfffe10200288 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_7_EQUALIZATION_CNTL 3 0xfffe1020028a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_8_EQUALIZATION_CNTL 3 0xfffe1020028c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_9_EQUALIZATION_CNTL 3 0xfffe1020028e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_10_EQUALIZATION_CNTL 3 0xfffe10200290 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_11_EQUALIZATION_CNTL 3 0xfffe10200292 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_12_EQUALIZATION_CNTL 3 0xfffe10200294 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_13_EQUALIZATION_CNTL 3 0xfffe10200296 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_14_EQUALIZATION_CNTL 3 0xfffe10200298 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_15_EQUALIZATION_CNTL 3 0xfffe1020029a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ACS_ENH_CAP_LIST 3 0xfffe102002a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ACS_CAP 3 0xfffe102002a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ACS_CNTL 3 0xfffe102002a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe102002b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ATS_CAP 3 0xfffe102002b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ATS_CNTL 3 0xfffe102002b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PAGE_REQ_ENH_CAP_LIST 3 0xfffe102002c0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PAGE_REQ_CNTL 3 0xfffe102002c4 2 0 4294967295 PRI_ENABLE 0 0 PRI_RESET 1 1 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PAGE_REQ_STATUS 3 0xfffe102002c6 4 0 4294967295 RESPONSE_FAILURE 0 0 UNEXPECTED_PAGE_REQ_GRP_INDEX 1 1 STOPPED 8 8 PRG_RESPONSE_PASID_REQUIRED 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_OUTSTAND_PAGE_REQ_CAPACITY 3 0xfffe102002c8 1 0 4294967295 OUTSTAND_PAGE_REQ_CAPACITY 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_OUTSTAND_PAGE_REQ_ALLOC 3 0xfffe102002cc 1 0 4294967295 OUTSTAND_PAGE_REQ_ALLOC 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PASID_ENH_CAP_LIST 3 0xfffe102002d0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PASID_CAP 3 0xfffe102002d4 3 0 4294967295 PASID_EXE_PERMISSION_SUPPORTED 1 1 PASID_PRIV_MODE_SUPPORTED 2 2 MAX_PASID_WIDTH 8 12 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PASID_CNTL 3 0xfffe102002d6 3 0 4294967295 PASID_ENABLE 0 0 PASID_EXE_PERMISSION_ENABLE 1 1 PASID_PRIV_MODE_SUPPORTED_ENABLE 2 2 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_ENH_CAP_LIST 3 0xfffe102002f0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_CAP 3 0xfffe102002f4 3 0 4294967295 MC_MAX_GROUP 0 5 MC_WIN_SIZE_REQ 8 13 MC_ECRC_REGEN_SUPP 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_CNTL 3 0xfffe102002f6 2 0 4294967295 MC_NUM_GROUP 0 5 MC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_ADDR0 3 0xfffe102002f8 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_ADDR1 3 0xfffe102002fc 1 0 4294967295 MC_BASE_ADDR_1 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_RCV0 3 0xfffe10200300 1 0 4294967295 MC_RECEIVE_0 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_RCV1 3 0xfffe10200304 1 0 4294967295 MC_RECEIVE_1 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_BLOCK_ALL0 3 0xfffe10200308 1 0 4294967295 MC_BLOCK_ALL_0 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_BLOCK_ALL1 3 0xfffe1020030c 1 0 4294967295 MC_BLOCK_ALL_1 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_BLOCK_UNTRANSLATED_0 3 0xfffe10200310 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MC_BLOCK_UNTRANSLATED_1 3 0xfffe10200314 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LTR_ENH_CAP_LIST 3 0xfffe10200320 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_LTR_CAP 3 0xfffe10200324 4 0 4294967295 LTR_MAX_S_LATENCY_VALUE 0 9 LTR_MAX_S_LATENCY_SCALE 10 12 LTR_MAX_NS_LATENCY_VALUE 16 25 LTR_MAX_NS_LATENCY_SCALE 26 28 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10200328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ARI_CAP 3 0xfffe1020032c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_ARI_CNTL 3 0xfffe1020032e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_ENH_CAP_LIST 3 0xfffe10200330 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_CAP 3 0xfffe10200334 4 0 4294967295 SRIOV_VF_MIGRATION_CAP 0 0 SRIOV_ARI_CAP_HIERARCHY_PRESERVED 1 1 SRIOV_VF_TEN_BIT_TAG_REQUESTER_SUPPORTED 2 2 SRIOV_VF_MIGRATION_INTR_MSG_NUM 21 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_CONTROL 3 0xfffe10200338 6 0 4294967295 SRIOV_VF_ENABLE 0 0 SRIOV_VF_MIGRATION_ENABLE 1 1 SRIOV_VF_MIGRATION_INTR_ENABLE 2 2 SRIOV_VF_MSE 3 3 SRIOV_ARI_CAP_HIERARCHY 4 4 SRIOV_VF_TEN_BIT_TAG_REQUESTER_ENABLE 5 5 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_STATUS 3 0xfffe1020033a 1 0 4294967295 SRIOV_VF_MIGRATION_STATUS 0 0 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_INITIAL_VFS 3 0xfffe1020033c 1 0 4294967295 SRIOV_INITIAL_VFS 0 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_TOTAL_VFS 3 0xfffe1020033e 1 0 4294967295 SRIOV_TOTAL_VFS 0 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_NUM_VFS 3 0xfffe10200340 1 0 4294967295 SRIOV_NUM_VFS 0 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_FUNC_DEP_LINK 3 0xfffe10200342 1 0 4294967295 SRIOV_FUNC_DEP_LINK 0 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_FIRST_VF_OFFSET 3 0xfffe10200344 1 0 4294967295 SRIOV_FIRST_VF_OFFSET 0 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_VF_STRIDE 3 0xfffe10200346 1 0 4294967295 SRIOV_VF_STRIDE 0 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_VF_DEVICE_ID 3 0xfffe1020034a 1 0 4294967295 SRIOV_VF_DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_SUPPORTED_PAGE_SIZE 3 0xfffe1020034c 1 0 4294967295 SRIOV_SUPPORTED_PAGE_SIZE 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_SYSTEM_PAGE_SIZE 3 0xfffe10200350 1 0 4294967295 SRIOV_SYSTEM_PAGE_SIZE 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_VF_BASE_ADDR_0 3 0xfffe10200354 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_VF_BASE_ADDR_1 3 0xfffe10200358 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_VF_BASE_ADDR_2 3 0xfffe1020035c 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_VF_BASE_ADDR_3 3 0xfffe10200360 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_VF_BASE_ADDR_4 3 0xfffe10200364 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_VF_BASE_ADDR_5 3 0xfffe10200368 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_SRIOV_VF_MIGRATION_STATE_ARRAY_OFFSET 3 0xfffe1020036c 2 0 4294967295 SRIOV_VF_MIGRATION_STATE_BIR 0 2 SRIOV_VF_MIGRATION_STATE_ARRAY_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_TPH_REQR_ENH_CAP_LIST 3 0xfffe10200370 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_TPH_REQR_CAP 3 0xfffe10200374 6 0 4294967295 TPH_REQR_NO_ST_MODE_SUPPORTED 0 0 TPH_REQR_INT_VEC_MODE_SUPPORTED 1 1 TPH_REQR_DEV_SPC_MODE_SUPPORTED 2 2 TPH_REQR_EXTND_TPH_REQR_SUPPORED 8 8 TPH_REQR_ST_TABLE_LOCATION 9 10 TPH_REQR_ST_TABLE_SIZE 16 26 cfgBIF_CFG_DEV0_EPF0_1_PCIE_TPH_REQR_CNTL 3 0xfffe10200378 2 0 4294967295 TPH_REQR_ST_MODE_SEL 0 2 TPH_REQR_EN 8 9 cfgBIF_CFG_DEV0_EPF0_1_PCIE_DLF_ENH_CAP_LIST 3 0xfffe10200400 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_DATA_LINK_FEATURE_CAP 3 0xfffe10200404 2 0 4294967295 LOCAL_DLF_SUPPORTED 0 22 DLF_EXCHANGE_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF0_1_DATA_LINK_FEATURE_STATUS 3 0xfffe10200408 2 0 4294967295 REMOTE_DLF_SUPPORTED 0 22 REMOTE_DLF_SUPPORTED_VALID 31 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_PHY_16GT_ENH_CAP_LIST 3 0xfffe10200410 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_LINK_CAP_16GT 3 0xfffe10200414 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_EPF0_1_LINK_CNTL_16GT 3 0xfffe10200418 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_EPF0_1_LINK_STATUS_16GT 3 0xfffe1020041c 5 0 4294967295 EQUALIZATION_COMPLETE_16GT 0 0 EQUALIZATION_PHASE1_SUCCESS_16GT 1 1 EQUALIZATION_PHASE2_SUCCESS_16GT 2 2 EQUALIZATION_PHASE3_SUCCESS_16GT 3 3 LINK_EQUALIZATION_REQUEST_16GT 4 4 cfgBIF_CFG_DEV0_EPF0_1_LOCAL_PARITY_MISMATCH_STATUS_16GT 3 0xfffe10200420 1 0 4294967295 LOCAL_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF0_1_RTM1_PARITY_MISMATCH_STATUS_16GT 3 0xfffe10200424 1 0 4294967295 RTM1_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF0_1_RTM2_PARITY_MISMATCH_STATUS_16GT 3 0xfffe10200428 1 0 4294967295 RTM2_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_0_EQUALIZATION_CNTL_16GT 3 0xfffe10200430 2 0 4294967295 LANE_0_DSP_16GT_TX_PRESET 0 3 LANE_0_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_1_EQUALIZATION_CNTL_16GT 3 0xfffe10200431 2 0 4294967295 LANE_1_DSP_16GT_TX_PRESET 0 3 LANE_1_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_2_EQUALIZATION_CNTL_16GT 3 0xfffe10200432 2 0 4294967295 LANE_2_DSP_16GT_TX_PRESET 0 3 LANE_2_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_3_EQUALIZATION_CNTL_16GT 3 0xfffe10200433 2 0 4294967295 LANE_3_DSP_16GT_TX_PRESET 0 3 LANE_3_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_4_EQUALIZATION_CNTL_16GT 3 0xfffe10200434 2 0 4294967295 LANE_4_DSP_16GT_TX_PRESET 0 3 LANE_4_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_5_EQUALIZATION_CNTL_16GT 3 0xfffe10200435 2 0 4294967295 LANE_5_DSP_16GT_TX_PRESET 0 3 LANE_5_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_6_EQUALIZATION_CNTL_16GT 3 0xfffe10200436 2 0 4294967295 LANE_6_DSP_16GT_TX_PRESET 0 3 LANE_6_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_7_EQUALIZATION_CNTL_16GT 3 0xfffe10200437 2 0 4294967295 LANE_7_DSP_16GT_TX_PRESET 0 3 LANE_7_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_8_EQUALIZATION_CNTL_16GT 3 0xfffe10200438 2 0 4294967295 LANE_8_DSP_16GT_TX_PRESET 0 3 LANE_8_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_9_EQUALIZATION_CNTL_16GT 3 0xfffe10200439 2 0 4294967295 LANE_9_DSP_16GT_TX_PRESET 0 3 LANE_9_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_10_EQUALIZATION_CNTL_16GT 3 0xfffe1020043a 2 0 4294967295 LANE_10_DSP_16GT_TX_PRESET 0 3 LANE_10_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_11_EQUALIZATION_CNTL_16GT 3 0xfffe1020043b 2 0 4294967295 LANE_11_DSP_16GT_TX_PRESET 0 3 LANE_11_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_12_EQUALIZATION_CNTL_16GT 3 0xfffe1020043c 2 0 4294967295 LANE_12_DSP_16GT_TX_PRESET 0 3 LANE_12_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_13_EQUALIZATION_CNTL_16GT 3 0xfffe1020043d 2 0 4294967295 LANE_13_DSP_16GT_TX_PRESET 0 3 LANE_13_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_14_EQUALIZATION_CNTL_16GT 3 0xfffe1020043e 2 0 4294967295 LANE_14_DSP_16GT_TX_PRESET 0 3 LANE_14_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_LANE_15_EQUALIZATION_CNTL_16GT 3 0xfffe1020043f 2 0 4294967295 LANE_15_DSP_16GT_TX_PRESET 0 3 LANE_15_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF0_1_PCIE_MARGINING_ENH_CAP_LIST 3 0xfffe10200440 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_MARGINING_PORT_CAP 3 0xfffe10200444 1 0 4294967295 MARGINING_USES_SOFTWARE 0 0 cfgBIF_CFG_DEV0_EPF0_1_MARGINING_PORT_STATUS 3 0xfffe10200446 2 0 4294967295 MARGINING_READY 0 0 MARGINING_SOFTWARE_READY 1 1 cfgBIF_CFG_DEV0_EPF0_1_LANE_0_MARGINING_LANE_CNTL 3 0xfffe10200448 4 0 4294967295 LANE_0_RECEIVER_NUMBER 0 2 LANE_0_MARGIN_TYPE 3 5 LANE_0_USAGE_MODEL 6 6 LANE_0_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_0_MARGINING_LANE_STATUS 3 0xfffe1020044a 4 0 4294967295 LANE_0_RECEIVER_NUMBER_STATUS 0 2 LANE_0_MARGIN_TYPE_STATUS 3 5 LANE_0_USAGE_MODEL_STATUS 6 6 LANE_0_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_1_MARGINING_LANE_CNTL 3 0xfffe1020044c 4 0 4294967295 LANE_1_RECEIVER_NUMBER 0 2 LANE_1_MARGIN_TYPE 3 5 LANE_1_USAGE_MODEL 6 6 LANE_1_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_1_MARGINING_LANE_STATUS 3 0xfffe1020044e 4 0 4294967295 LANE_1_RECEIVER_NUMBER_STATUS 0 2 LANE_1_MARGIN_TYPE_STATUS 3 5 LANE_1_USAGE_MODEL_STATUS 6 6 LANE_1_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_2_MARGINING_LANE_CNTL 3 0xfffe10200450 4 0 4294967295 LANE_2_RECEIVER_NUMBER 0 2 LANE_2_MARGIN_TYPE 3 5 LANE_2_USAGE_MODEL 6 6 LANE_2_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_2_MARGINING_LANE_STATUS 3 0xfffe10200452 4 0 4294967295 LANE_2_RECEIVER_NUMBER_STATUS 0 2 LANE_2_MARGIN_TYPE_STATUS 3 5 LANE_2_USAGE_MODEL_STATUS 6 6 LANE_2_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_3_MARGINING_LANE_CNTL 3 0xfffe10200454 4 0 4294967295 LANE_3_RECEIVER_NUMBER 0 2 LANE_3_MARGIN_TYPE 3 5 LANE_3_USAGE_MODEL 6 6 LANE_3_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_3_MARGINING_LANE_STATUS 3 0xfffe10200456 4 0 4294967295 LANE_3_RECEIVER_NUMBER_STATUS 0 2 LANE_3_MARGIN_TYPE_STATUS 3 5 LANE_3_USAGE_MODEL_STATUS 6 6 LANE_3_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_4_MARGINING_LANE_CNTL 3 0xfffe10200458 4 0 4294967295 LANE_4_RECEIVER_NUMBER 0 2 LANE_4_MARGIN_TYPE 3 5 LANE_4_USAGE_MODEL 6 6 LANE_4_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_4_MARGINING_LANE_STATUS 3 0xfffe1020045a 4 0 4294967295 LANE_4_RECEIVER_NUMBER_STATUS 0 2 LANE_4_MARGIN_TYPE_STATUS 3 5 LANE_4_USAGE_MODEL_STATUS 6 6 LANE_4_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_5_MARGINING_LANE_CNTL 3 0xfffe1020045c 4 0 4294967295 LANE_5_RECEIVER_NUMBER 0 2 LANE_5_MARGIN_TYPE 3 5 LANE_5_USAGE_MODEL 6 6 LANE_5_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_5_MARGINING_LANE_STATUS 3 0xfffe1020045e 4 0 4294967295 LANE_5_RECEIVER_NUMBER_STATUS 0 2 LANE_5_MARGIN_TYPE_STATUS 3 5 LANE_5_USAGE_MODEL_STATUS 6 6 LANE_5_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_6_MARGINING_LANE_CNTL 3 0xfffe10200460 4 0 4294967295 LANE_6_RECEIVER_NUMBER 0 2 LANE_6_MARGIN_TYPE 3 5 LANE_6_USAGE_MODEL 6 6 LANE_6_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_6_MARGINING_LANE_STATUS 3 0xfffe10200462 4 0 4294967295 LANE_6_RECEIVER_NUMBER_STATUS 0 2 LANE_6_MARGIN_TYPE_STATUS 3 5 LANE_6_USAGE_MODEL_STATUS 6 6 LANE_6_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_7_MARGINING_LANE_CNTL 3 0xfffe10200464 4 0 4294967295 LANE_7_RECEIVER_NUMBER 0 2 LANE_7_MARGIN_TYPE 3 5 LANE_7_USAGE_MODEL 6 6 LANE_7_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_7_MARGINING_LANE_STATUS 3 0xfffe10200466 4 0 4294967295 LANE_7_RECEIVER_NUMBER_STATUS 0 2 LANE_7_MARGIN_TYPE_STATUS 3 5 LANE_7_USAGE_MODEL_STATUS 6 6 LANE_7_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_8_MARGINING_LANE_CNTL 3 0xfffe10200468 4 0 4294967295 LANE_8_RECEIVER_NUMBER 0 2 LANE_8_MARGIN_TYPE 3 5 LANE_8_USAGE_MODEL 6 6 LANE_8_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_8_MARGINING_LANE_STATUS 3 0xfffe1020046a 4 0 4294967295 LANE_8_RECEIVER_NUMBER_STATUS 0 2 LANE_8_MARGIN_TYPE_STATUS 3 5 LANE_8_USAGE_MODEL_STATUS 6 6 LANE_8_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_9_MARGINING_LANE_CNTL 3 0xfffe1020046c 4 0 4294967295 LANE_9_RECEIVER_NUMBER 0 2 LANE_9_MARGIN_TYPE 3 5 LANE_9_USAGE_MODEL 6 6 LANE_9_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_9_MARGINING_LANE_STATUS 3 0xfffe1020046e 4 0 4294967295 LANE_9_RECEIVER_NUMBER_STATUS 0 2 LANE_9_MARGIN_TYPE_STATUS 3 5 LANE_9_USAGE_MODEL_STATUS 6 6 LANE_9_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_10_MARGINING_LANE_CNTL 3 0xfffe10200470 4 0 4294967295 LANE_10_RECEIVER_NUMBER 0 2 LANE_10_MARGIN_TYPE 3 5 LANE_10_USAGE_MODEL 6 6 LANE_10_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_10_MARGINING_LANE_STATUS 3 0xfffe10200472 4 0 4294967295 LANE_10_RECEIVER_NUMBER_STATUS 0 2 LANE_10_MARGIN_TYPE_STATUS 3 5 LANE_10_USAGE_MODEL_STATUS 6 6 LANE_10_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_11_MARGINING_LANE_CNTL 3 0xfffe10200474 4 0 4294967295 LANE_11_RECEIVER_NUMBER 0 2 LANE_11_MARGIN_TYPE 3 5 LANE_11_USAGE_MODEL 6 6 LANE_11_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_11_MARGINING_LANE_STATUS 3 0xfffe10200476 4 0 4294967295 LANE_11_RECEIVER_NUMBER_STATUS 0 2 LANE_11_MARGIN_TYPE_STATUS 3 5 LANE_11_USAGE_MODEL_STATUS 6 6 LANE_11_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_12_MARGINING_LANE_CNTL 3 0xfffe10200478 4 0 4294967295 LANE_12_RECEIVER_NUMBER 0 2 LANE_12_MARGIN_TYPE 3 5 LANE_12_USAGE_MODEL 6 6 LANE_12_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_12_MARGINING_LANE_STATUS 3 0xfffe1020047a 4 0 4294967295 LANE_12_RECEIVER_NUMBER_STATUS 0 2 LANE_12_MARGIN_TYPE_STATUS 3 5 LANE_12_USAGE_MODEL_STATUS 6 6 LANE_12_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_13_MARGINING_LANE_CNTL 3 0xfffe1020047c 4 0 4294967295 LANE_13_RECEIVER_NUMBER 0 2 LANE_13_MARGIN_TYPE 3 5 LANE_13_USAGE_MODEL 6 6 LANE_13_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_13_MARGINING_LANE_STATUS 3 0xfffe1020047e 4 0 4294967295 LANE_13_RECEIVER_NUMBER_STATUS 0 2 LANE_13_MARGIN_TYPE_STATUS 3 5 LANE_13_USAGE_MODEL_STATUS 6 6 LANE_13_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_14_MARGINING_LANE_CNTL 3 0xfffe10200480 4 0 4294967295 LANE_14_RECEIVER_NUMBER 0 2 LANE_14_MARGIN_TYPE 3 5 LANE_14_USAGE_MODEL 6 6 LANE_14_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_14_MARGINING_LANE_STATUS 3 0xfffe10200482 4 0 4294967295 LANE_14_RECEIVER_NUMBER_STATUS 0 2 LANE_14_MARGIN_TYPE_STATUS 3 5 LANE_14_USAGE_MODEL_STATUS 6 6 LANE_14_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_15_MARGINING_LANE_CNTL 3 0xfffe10200484 4 0 4294967295 LANE_15_RECEIVER_NUMBER 0 2 LANE_15_MARGIN_TYPE 3 5 LANE_15_USAGE_MODEL 6 6 LANE_15_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF0_1_LANE_15_MARGINING_LANE_STATUS 3 0xfffe10200486 4 0 4294967295 LANE_15_RECEIVER_NUMBER_STATUS 0 2 LANE_15_MARGIN_TYPE_STATUS 3 5 LANE_15_USAGE_MODEL_STATUS 6 6 LANE_15_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR_ENH_CAP_LIST 3 0xfffe102004c0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR1_CAP 3 0xfffe102004c4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR1_CNTL 3 0xfffe102004c8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR2_CAP 3 0xfffe102004cc 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR2_CNTL 3 0xfffe102004d0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR3_CAP 3 0xfffe102004d4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR3_CNTL 3 0xfffe102004d8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR4_CAP 3 0xfffe102004dc 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR4_CNTL 3 0xfffe102004e0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR5_CAP 3 0xfffe102004e4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR5_CNTL 3 0xfffe102004e8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR6_CAP 3 0xfffe102004ec 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VF_RESIZE_BAR6_CNTL 3 0xfffe102004f0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST_GPUIOV 3 0xfffe10200500 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV 3 0xfffe10200504 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_SRIOV_SHADOW 3 0xfffe10200508 2 0 4294967295 VF_EN 0 0 VF_NUM 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_INTR_ENABLE 3 0xfffe1020050c 18 0 4294967295 GFX_CMD_COMPLETE_INTR_EN 0 0 GFX_HANG_SELF_RECOVERED_INTR_EN 1 1 GFX_HANG_NEED_FLR_INTR_EN 2 2 GFX_VM_BUSY_TRANSITION_INTR_EN 3 3 UVD_CMD_COMPLETE_INTR_EN 8 8 UVD_HANG_SELF_RECOVERED_INTR_EN 9 9 UVD_HANG_NEED_FLR_INTR_EN 10 10 UVD_VM_BUSY_TRANSITION_INTR_EN 11 11 UVD1_CMD_COMPLETE_INTR_EN 12 12 UVD1_HANG_SELF_RECOVERED_INTR_EN 13 13 UVD1_HANG_NEED_FLR_INTR_EN 14 14 UVD1_VM_BUSY_TRANSITION_INTR_EN 15 15 VCE_CMD_COMPLETE_INTR_EN 16 16 VCE_HANG_SELF_RECOVERED_INTR_EN 17 17 VCE_HANG_NEED_FLR_INTR_EN 18 18 VCE_VM_BUSY_TRANSITION_INTR_EN 19 19 HVVM_MAILBOX_TRN_ACK_INTR_EN 24 24 HVVM_MAILBOX_RCV_VALID_INTR_EN 25 25 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_INTR_STATUS 3 0xfffe10200510 18 0 4294967295 GFX_CMD_COMPLETE_INTR_STATUS 0 0 GFX_HANG_SELF_RECOVERED_INTR_STATUS 1 1 GFX_HANG_NEED_FLR_INTR_STATUS 2 2 GFX_VM_BUSY_TRANSITION_INTR_STATUS 3 3 UVD_CMD_COMPLETE_INTR_STATUS 8 8 UVD_HANG_SELF_RECOVERED_INTR_STATUS 9 9 UVD_HANG_NEED_FLR_INTR_STATUS 10 10 UVD_VM_BUSY_TRANSITION_INTR_STATUS 11 11 UVD1_CMD_COMPLETE_INTR_STATUS 12 12 UVD1_HANG_SELF_RECOVERED_INTR_STATUS 13 13 UVD1_HANG_NEED_FLR_INTR_STATUS 14 14 UVD1_VM_BUSY_TRANSITION_INTR_STATUS 15 15 VCE_CMD_COMPLETE_INTR_STATUS 16 16 VCE_HANG_SELF_RECOVERED_INTR_STATUS 17 17 VCE_HANG_NEED_FLR_INTR_STATUS 18 18 VCE_VM_BUSY_TRANSITION_INTR_STATUS 19 19 HVVM_MAILBOX_TRN_ACK_INTR_STATUS 24 24 HVVM_MAILBOX_RCV_VALID_INTR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL 3 0xfffe10200514 1 0 4294967295 SOFT_PF_FLR 0 0 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW0 3 0xfffe10200518 5 0 4294967295 VF_INDEX 0 7 TRN_MSG_DATA 8 11 TRN_MSG_VALID 15 15 RCV_MSG_DATA 16 19 RCV_MSG_ACK 24 24 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW1 3 0xfffe1020051c 32 0 4294967295 VF0_TRN_ACK 0 0 VF0_RCV_VALID 1 1 VF1_TRN_ACK 2 2 VF1_RCV_VALID 3 3 VF2_TRN_ACK 4 4 VF2_RCV_VALID 5 5 VF3_TRN_ACK 6 6 VF3_RCV_VALID 7 7 VF4_TRN_ACK 8 8 VF4_RCV_VALID 9 9 VF5_TRN_ACK 10 10 VF5_RCV_VALID 11 11 VF6_TRN_ACK 12 12 VF6_RCV_VALID 13 13 VF7_TRN_ACK 14 14 VF7_RCV_VALID 15 15 VF8_TRN_ACK 16 16 VF8_RCV_VALID 17 17 VF9_TRN_ACK 18 18 VF9_RCV_VALID 19 19 VF10_TRN_ACK 20 20 VF10_RCV_VALID 21 21 VF11_TRN_ACK 22 22 VF11_RCV_VALID 23 23 VF12_TRN_ACK 24 24 VF12_RCV_VALID 25 25 VF13_TRN_ACK 26 26 VF13_RCV_VALID 27 27 VF14_TRN_ACK 28 28 VF14_RCV_VALID 29 29 VF15_TRN_ACK 30 30 VF15_RCV_VALID 31 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW2 3 0xfffe10200520 32 0 4294967295 VF16_TRN_ACK 0 0 VF16_RCV_VALID 1 1 VF17_TRN_ACK 2 2 VF17_RCV_VALID 3 3 VF18_TRN_ACK 4 4 VF18_RCV_VALID 5 5 VF19_TRN_ACK 6 6 VF19_RCV_VALID 7 7 VF20_TRN_ACK 8 8 VF20_RCV_VALID 9 9 VF21_TRN_ACK 10 10 VF21_RCV_VALID 11 11 VF22_TRN_ACK 12 12 VF22_RCV_VALID 13 13 VF23_TRN_ACK 14 14 VF23_RCV_VALID 15 15 VF24_TRN_ACK 16 16 VF24_RCV_VALID 17 17 VF25_TRN_ACK 18 18 VF25_RCV_VALID 19 19 VF26_TRN_ACK 20 20 VF26_RCV_VALID 21 21 VF27_TRN_ACK 22 22 VF27_RCV_VALID 23 23 VF28_TRN_ACK 24 24 VF28_RCV_VALID 25 25 VF29_TRN_ACK 26 26 VF29_RCV_VALID 27 27 VF30_TRN_ACK 28 28 VF30_RCV_VALID 29 29 PF_TRN_ACK 30 30 PF_RCV_VALID 31 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_CONTEXT 3 0xfffe10200524 3 0 4294967295 CONTEXT_SIZE 0 6 LOC 7 7 CONTEXT_OFFSET 10 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_TOTAL_FB 3 0xfffe10200528 2 0 4294967295 TOTAL_FB_AVAILABLE 0 15 TOTAL_FB_CONSUMED 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_OFFSETS 3 0xfffe1020052c 4 0 4294967295 UVDSCH_OFFSET 0 7 VCESCH_OFFSET 8 15 GFXSCH_OFFSET 16 23 UVD1SCH_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_REGION 3 0xfffe10200530 2 0 4294967295 LFB_REGION 0 2 MAX_REGION 4 6 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_P2P_OVER_XGMI_ENABLE 3 0xfffe10200534 2 0 4294967295 P2P_OVER_XGMI_ENABLE_VF 0 30 P2P_OVER_XGMI_ENABLE_PF 31 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF0_FB 3 0xfffe10200538 2 0 4294967295 VF0_FB_SIZE 0 15 VF0_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF1_FB 3 0xfffe1020053c 2 0 4294967295 VF1_FB_SIZE 0 15 VF1_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF2_FB 3 0xfffe10200540 2 0 4294967295 VF2_FB_SIZE 0 15 VF2_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF3_FB 3 0xfffe10200544 2 0 4294967295 VF3_FB_SIZE 0 15 VF3_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF4_FB 3 0xfffe10200548 2 0 4294967295 VF4_FB_SIZE 0 15 VF4_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF5_FB 3 0xfffe1020054c 2 0 4294967295 VF5_FB_SIZE 0 15 VF5_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF6_FB 3 0xfffe10200550 2 0 4294967295 VF6_FB_SIZE 0 15 VF6_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF7_FB 3 0xfffe10200554 2 0 4294967295 VF7_FB_SIZE 0 15 VF7_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF8_FB 3 0xfffe10200558 2 0 4294967295 VF8_FB_SIZE 0 15 VF8_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF9_FB 3 0xfffe1020055c 2 0 4294967295 VF9_FB_SIZE 0 15 VF9_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF10_FB 3 0xfffe10200560 2 0 4294967295 VF10_FB_SIZE 0 15 VF10_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF11_FB 3 0xfffe10200564 2 0 4294967295 VF11_FB_SIZE 0 15 VF11_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF12_FB 3 0xfffe10200568 2 0 4294967295 VF12_FB_SIZE 0 15 VF12_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF13_FB 3 0xfffe1020056c 2 0 4294967295 VF13_FB_SIZE 0 15 VF13_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF14_FB 3 0xfffe10200570 2 0 4294967295 VF14_FB_SIZE 0 15 VF14_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF15_FB 3 0xfffe10200574 2 0 4294967295 VF15_FB_SIZE 0 15 VF15_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF16_FB 3 0xfffe10200578 2 0 4294967295 VF16_FB_SIZE 0 15 VF16_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF17_FB 3 0xfffe1020057c 2 0 4294967295 VF17_FB_SIZE 0 15 VF17_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF18_FB 3 0xfffe10200580 2 0 4294967295 VF18_FB_SIZE 0 15 VF18_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF19_FB 3 0xfffe10200584 2 0 4294967295 VF19_FB_SIZE 0 15 VF19_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF20_FB 3 0xfffe10200588 2 0 4294967295 VF20_FB_SIZE 0 15 VF20_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF21_FB 3 0xfffe1020058c 2 0 4294967295 VF21_FB_SIZE 0 15 VF21_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF22_FB 3 0xfffe10200590 2 0 4294967295 VF22_FB_SIZE 0 15 VF22_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF23_FB 3 0xfffe10200594 2 0 4294967295 VF23_FB_SIZE 0 15 VF23_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF24_FB 3 0xfffe10200598 2 0 4294967295 VF24_FB_SIZE 0 15 VF24_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF25_FB 3 0xfffe1020059c 2 0 4294967295 VF25_FB_SIZE 0 15 VF25_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF26_FB 3 0xfffe102005a0 2 0 4294967295 VF26_FB_SIZE 0 15 VF26_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF27_FB 3 0xfffe102005a4 2 0 4294967295 VF27_FB_SIZE 0 15 VF27_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF28_FB 3 0xfffe102005a8 2 0 4294967295 VF28_FB_SIZE 0 15 VF28_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF29_FB 3 0xfffe102005ac 2 0 4294967295 VF29_FB_SIZE 0 15 VF29_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF30_FB 3 0xfffe102005b0 2 0 4294967295 VF30_FB_SIZE 0 15 VF30_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW0 3 0xfffe102005c0 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW1 3 0xfffe102005c4 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW2 3 0xfffe102005c8 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW3 3 0xfffe102005cc 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW4 3 0xfffe102005d0 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW5 3 0xfffe102005d4 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW6 3 0xfffe102005d8 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW7 3 0xfffe102005dc 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW8 3 0xfffe102005e0 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW0 3 0xfffe102005f0 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW1 3 0xfffe102005f4 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW2 3 0xfffe102005f8 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW3 3 0xfffe102005fc 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW4 3 0xfffe10200600 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW5 3 0xfffe10200604 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW6 3 0xfffe10200608 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW7 3 0xfffe1020060c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW8 3 0xfffe10200610 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW0 3 0xfffe10200620 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW1 3 0xfffe10200624 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW2 3 0xfffe10200628 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW3 3 0xfffe1020062c 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW4 3 0xfffe10200630 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW5 3 0xfffe10200634 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW6 3 0xfffe10200638 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW7 3 0xfffe1020063c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW8 3 0xfffe10200640 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW0 3 0xfffe10200650 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW1 3 0xfffe10200654 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW2 3 0xfffe10200658 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW3 3 0xfffe1020065c 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW4 3 0xfffe10200660 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW5 3 0xfffe10200664 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW6 3 0xfffe10200668 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW7 3 0xfffe1020066c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF0_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW8 3 0xfffe10200670 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF1_1_VENDOR_ID 3 0xfffe10201000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF1_1_DEVICE_ID 3 0xfffe10201002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF1_1_COMMAND 3 0xfffe10201004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF1_1_STATUS 3 0xfffe10201006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF1_1_REVISION_ID 3 0xfffe10201008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF1_1_PROG_INTERFACE 3 0xfffe10201009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF1_1_SUB_CLASS 3 0xfffe1020100a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF1_1_BASE_CLASS 3 0xfffe1020100b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF1_1_CACHE_LINE 3 0xfffe1020100c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF1_1_LATENCY 3 0xfffe1020100d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF1_1_HEADER 3 0xfffe1020100e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF1_1_BIST 3 0xfffe1020100f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF1_1_BASE_ADDR_1 3 0xfffe10201010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_BASE_ADDR_2 3 0xfffe10201014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_BASE_ADDR_3 3 0xfffe10201018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_BASE_ADDR_4 3 0xfffe1020101c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_BASE_ADDR_5 3 0xfffe10201020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_BASE_ADDR_6 3 0xfffe10201024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_CARDBUS_CIS_PTR 3 0xfffe10201028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF1_1_ADAPTER_ID 3 0xfffe1020102c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF1_1_ROM_BASE_ADDR 3 0xfffe10201030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_CAP_PTR 3 0xfffe10201034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF1_1_INTERRUPT_LINE 3 0xfffe1020103c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF1_1_INTERRUPT_PIN 3 0xfffe1020103d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF1_1_MIN_GRANT 3 0xfffe1020103e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF1_1_MAX_LATENCY 3 0xfffe1020103f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF1_1_VENDOR_CAP_LIST 3 0xfffe10201048 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 cfgBIF_CFG_DEV0_EPF1_1_ADAPTER_ID_W 3 0xfffe1020104c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF1_1_PMI_CAP_LIST 3 0xfffe10201050 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF1_1_PMI_CAP 3 0xfffe10201052 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgBIF_CFG_DEV0_EPF1_1_PMI_STATUS_CNTL 3 0xfffe10201054 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_CAP_LIST 3 0xfffe10201064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_CAP 3 0xfffe10201066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF1_1_DEVICE_CAP 3 0xfffe10201068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF1_1_DEVICE_CNTL 3 0xfffe1020106c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF1_1_DEVICE_STATUS 3 0xfffe1020106e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF1_1_LINK_CAP 3 0xfffe10201070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF1_1_LINK_CNTL 3 0xfffe10201074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF1_1_LINK_STATUS 3 0xfffe10201076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF1_1_DEVICE_CAP2 3 0xfffe10201088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF1_1_DEVICE_CNTL2 3 0xfffe1020108c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF1_1_DEVICE_STATUS2 3 0xfffe1020108e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF1_1_LINK_CAP2 3 0xfffe10201090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF1_1_LINK_CNTL2 3 0xfffe10201094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF1_1_LINK_STATUS2 3 0xfffe10201096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_MSI_CAP_LIST 3 0xfffe102010a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF1_1_MSI_MSG_CNTL 3 0xfffe102010a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF1_1_MSI_MSG_ADDR_LO 3 0xfffe102010a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF1_1_MSI_MSG_ADDR_HI 3 0xfffe102010a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF1_1_MSI_MSG_DATA 3 0xfffe102010a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF1_1_MSI_MASK 3 0xfffe102010ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF1_1_MSI_MSG_DATA_64 3 0xfffe102010ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF1_1_MSI_MASK_64 3 0xfffe102010b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF1_1_MSI_PENDING 3 0xfffe102010b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF1_1_MSI_PENDING_64 3 0xfffe102010b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF1_1_MSIX_CAP_LIST 3 0xfffe102010c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF1_1_MSIX_MSG_CNTL 3 0xfffe102010c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF1_1_MSIX_TABLE 3 0xfffe102010c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF1_1_MSIX_PBA 3 0xfffe102010c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10201100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10201104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10201108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1020110c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VC_ENH_CAP_LIST 3 0xfffe10201110 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PORT_VC_CAP_REG1 3 0xfffe10201114 4 0 4294967295 EXT_VC_COUNT 0 2 LOW_PRIORITY_EXT_VC_COUNT 4 6 REF_CLK 8 9 PORT_ARB_TABLE_ENTRY_SIZE 10 11 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PORT_VC_CAP_REG2 3 0xfffe10201118 2 0 4294967295 VC_ARB_CAP 0 7 VC_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PORT_VC_CNTL 3 0xfffe1020111c 2 0 4294967295 LOAD_VC_ARB_TABLE 0 0 VC_ARB_SELECT 1 3 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PORT_VC_STATUS 3 0xfffe1020111e 1 0 4294967295 VC_ARB_TABLE_STATUS 0 0 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VC0_RESOURCE_CAP 3 0xfffe10201120 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VC0_RESOURCE_CNTL 3 0xfffe10201124 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VC0_RESOURCE_STATUS 3 0xfffe1020112a 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VC1_RESOURCE_CAP 3 0xfffe1020112c 4 0 4294967295 PORT_ARB_CAP 0 7 REJECT_SNOOP_TRANS 15 15 MAX_TIME_SLOTS 16 21 PORT_ARB_TABLE_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VC1_RESOURCE_CNTL 3 0xfffe10201130 6 0 4294967295 TC_VC_MAP_TC0 0 0 TC_VC_MAP_TC1_7 1 7 LOAD_PORT_ARB_TABLE 16 16 PORT_ARB_SELECT 17 19 VC_ID 24 26 VC_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VC1_RESOURCE_STATUS 3 0xfffe10201136 2 0 4294967295 PORT_ARB_TABLE_STATUS 0 0 VC_NEGOTIATION_PENDING 1 1 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST 3 0xfffe10201140 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DEV_SERIAL_NUM_DW1 3 0xfffe10201144 1 0 4294967295 SERIAL_NUMBER_LO 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DEV_SERIAL_NUM_DW2 3 0xfffe10201148 1 0 4294967295 SERIAL_NUMBER_HI 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10201150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10201154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF1_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10201158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF1_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1020115c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF1_1_PCIE_CORR_ERR_STATUS 3 0xfffe10201160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_CORR_ERR_MASK 3 0xfffe10201164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10201168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF1_1_PCIE_HDR_LOG0 3 0xfffe1020116c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_HDR_LOG1 3 0xfffe10201170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_HDR_LOG2 3 0xfffe10201174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_HDR_LOG3 3 0xfffe10201178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10201188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1020118c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10201190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10201194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR_ENH_CAP_LIST 3 0xfffe10201200 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR1_CAP 3 0xfffe10201204 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR1_CNTL 3 0xfffe10201208 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR2_CAP 3 0xfffe1020120c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR2_CNTL 3 0xfffe10201210 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR3_CAP 3 0xfffe10201214 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR3_CNTL 3 0xfffe10201218 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR4_CAP 3 0xfffe1020121c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR4_CNTL 3 0xfffe10201220 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR5_CAP 3 0xfffe10201224 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR5_CNTL 3 0xfffe10201228 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR6_CAP 3 0xfffe1020122c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_BAR6_CNTL 3 0xfffe10201230 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PWR_BUDGET_ENH_CAP_LIST 3 0xfffe10201240 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PWR_BUDGET_DATA_SELECT 3 0xfffe10201244 1 0 4294967295 DATA_SELECT 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PWR_BUDGET_DATA 3 0xfffe10201248 6 0 4294967295 BASE_POWER 0 7 DATA_SCALE 8 9 PM_SUB_STATE 10 12 PM_STATE 13 14 TYPE 15 17 POWER_RAIL 18 20 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PWR_BUDGET_CAP 3 0xfffe1020124c 1 0 4294967295 SYSTEM_ALLOCATED 0 0 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_ENH_CAP_LIST 3 0xfffe10201250 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_CAP 3 0xfffe10201254 5 0 4294967295 SUBSTATE_MAX 0 4 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_LATENCY_INDICATOR 3 0xfffe10201258 1 0 4294967295 TRANS_LAT_INDICATOR_BITS 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_STATUS 3 0xfffe1020125c 2 0 4294967295 SUBSTATE_STATUS 0 4 SUBSTATE_CNTL_ENABLED 8 8 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_CNTL 3 0xfffe1020125e 1 0 4294967295 SUBSTATE_CNTL 0 4 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_0 3 0xfffe10201260 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_1 3 0xfffe10201261 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_2 3 0xfffe10201262 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_3 3 0xfffe10201263 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_4 3 0xfffe10201264 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_5 3 0xfffe10201265 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_6 3 0xfffe10201266 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_7 3 0xfffe10201267 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SECONDARY_ENH_CAP_LIST 3 0xfffe10201270 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LINK_CNTL3 3 0xfffe10201274 3 0 4294967295 PERFORM_EQUALIZATION 0 0 LINK_EQUALIZATION_REQ_INT_EN 1 1 ENABLE_LOWER_SKP_OS_GEN 9 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_ERROR_STATUS 3 0xfffe10201278 2 0 4294967295 LANE_ERROR_STATUS_BITS 0 15 RESERVED 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_0_EQUALIZATION_CNTL 3 0xfffe1020127c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_1_EQUALIZATION_CNTL 3 0xfffe1020127e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_2_EQUALIZATION_CNTL 3 0xfffe10201280 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_3_EQUALIZATION_CNTL 3 0xfffe10201282 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_4_EQUALIZATION_CNTL 3 0xfffe10201284 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_5_EQUALIZATION_CNTL 3 0xfffe10201286 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_6_EQUALIZATION_CNTL 3 0xfffe10201288 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_7_EQUALIZATION_CNTL 3 0xfffe1020128a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_8_EQUALIZATION_CNTL 3 0xfffe1020128c 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_9_EQUALIZATION_CNTL 3 0xfffe1020128e 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_10_EQUALIZATION_CNTL 3 0xfffe10201290 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_11_EQUALIZATION_CNTL 3 0xfffe10201292 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_12_EQUALIZATION_CNTL 3 0xfffe10201294 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_13_EQUALIZATION_CNTL 3 0xfffe10201296 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_14_EQUALIZATION_CNTL 3 0xfffe10201298 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LANE_15_EQUALIZATION_CNTL 3 0xfffe1020129a 5 0 4294967295 DOWNSTREAM_PORT_TX_PRESET 0 3 DOWNSTREAM_PORT_RX_PRESET_HINT 4 6 UPSTREAM_PORT_TX_PRESET 8 11 UPSTREAM_PORT_RX_PRESET_HINT 12 14 RESERVED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ACS_ENH_CAP_LIST 3 0xfffe102012a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ACS_CAP 3 0xfffe102012a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ACS_CNTL 3 0xfffe102012a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe102012b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ATS_CAP 3 0xfffe102012b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ATS_CNTL 3 0xfffe102012b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PAGE_REQ_ENH_CAP_LIST 3 0xfffe102012c0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PAGE_REQ_CNTL 3 0xfffe102012c4 2 0 4294967295 PRI_ENABLE 0 0 PRI_RESET 1 1 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PAGE_REQ_STATUS 3 0xfffe102012c6 4 0 4294967295 RESPONSE_FAILURE 0 0 UNEXPECTED_PAGE_REQ_GRP_INDEX 1 1 STOPPED 8 8 PRG_RESPONSE_PASID_REQUIRED 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_OUTSTAND_PAGE_REQ_CAPACITY 3 0xfffe102012c8 1 0 4294967295 OUTSTAND_PAGE_REQ_CAPACITY 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_OUTSTAND_PAGE_REQ_ALLOC 3 0xfffe102012cc 1 0 4294967295 OUTSTAND_PAGE_REQ_ALLOC 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PASID_ENH_CAP_LIST 3 0xfffe102012d0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PASID_CAP 3 0xfffe102012d4 3 0 4294967295 PASID_EXE_PERMISSION_SUPPORTED 1 1 PASID_PRIV_MODE_SUPPORTED 2 2 MAX_PASID_WIDTH 8 12 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PASID_CNTL 3 0xfffe102012d6 3 0 4294967295 PASID_ENABLE 0 0 PASID_EXE_PERMISSION_ENABLE 1 1 PASID_PRIV_MODE_SUPPORTED_ENABLE 2 2 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_ENH_CAP_LIST 3 0xfffe102012f0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_CAP 3 0xfffe102012f4 3 0 4294967295 MC_MAX_GROUP 0 5 MC_WIN_SIZE_REQ 8 13 MC_ECRC_REGEN_SUPP 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_CNTL 3 0xfffe102012f6 2 0 4294967295 MC_NUM_GROUP 0 5 MC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_ADDR0 3 0xfffe102012f8 2 0 4294967295 MC_INDEX_POS 0 5 MC_BASE_ADDR_0 12 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_ADDR1 3 0xfffe102012fc 1 0 4294967295 MC_BASE_ADDR_1 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_RCV0 3 0xfffe10201300 1 0 4294967295 MC_RECEIVE_0 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_RCV1 3 0xfffe10201304 1 0 4294967295 MC_RECEIVE_1 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_BLOCK_ALL0 3 0xfffe10201308 1 0 4294967295 MC_BLOCK_ALL_0 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_BLOCK_ALL1 3 0xfffe1020130c 1 0 4294967295 MC_BLOCK_ALL_1 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_BLOCK_UNTRANSLATED_0 3 0xfffe10201310 1 0 4294967295 MC_BLOCK_UNTRANSLATED_0 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MC_BLOCK_UNTRANSLATED_1 3 0xfffe10201314 1 0 4294967295 MC_BLOCK_UNTRANSLATED_1 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LTR_ENH_CAP_LIST 3 0xfffe10201320 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_LTR_CAP 3 0xfffe10201324 4 0 4294967295 LTR_MAX_S_LATENCY_VALUE 0 9 LTR_MAX_S_LATENCY_SCALE 10 12 LTR_MAX_NS_LATENCY_VALUE 16 25 LTR_MAX_NS_LATENCY_SCALE 26 28 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10201328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ARI_CAP 3 0xfffe1020132c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_ARI_CNTL 3 0xfffe1020132e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_ENH_CAP_LIST 3 0xfffe10201330 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_CAP 3 0xfffe10201334 4 0 4294967295 SRIOV_VF_MIGRATION_CAP 0 0 SRIOV_ARI_CAP_HIERARCHY_PRESERVED 1 1 SRIOV_VF_TEN_BIT_TAG_REQUESTER_SUPPORTED 2 2 SRIOV_VF_MIGRATION_INTR_MSG_NUM 21 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_CONTROL 3 0xfffe10201338 6 0 4294967295 SRIOV_VF_ENABLE 0 0 SRIOV_VF_MIGRATION_ENABLE 1 1 SRIOV_VF_MIGRATION_INTR_ENABLE 2 2 SRIOV_VF_MSE 3 3 SRIOV_ARI_CAP_HIERARCHY 4 4 SRIOV_VF_TEN_BIT_TAG_REQUESTER_ENABLE 5 5 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_STATUS 3 0xfffe1020133a 1 0 4294967295 SRIOV_VF_MIGRATION_STATUS 0 0 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_INITIAL_VFS 3 0xfffe1020133c 1 0 4294967295 SRIOV_INITIAL_VFS 0 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_TOTAL_VFS 3 0xfffe1020133e 1 0 4294967295 SRIOV_TOTAL_VFS 0 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_NUM_VFS 3 0xfffe10201340 1 0 4294967295 SRIOV_NUM_VFS 0 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_FUNC_DEP_LINK 3 0xfffe10201342 1 0 4294967295 SRIOV_FUNC_DEP_LINK 0 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_FIRST_VF_OFFSET 3 0xfffe10201344 1 0 4294967295 SRIOV_FIRST_VF_OFFSET 0 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_VF_STRIDE 3 0xfffe10201346 1 0 4294967295 SRIOV_VF_STRIDE 0 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_VF_DEVICE_ID 3 0xfffe1020134a 1 0 4294967295 SRIOV_VF_DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_SUPPORTED_PAGE_SIZE 3 0xfffe1020134c 1 0 4294967295 SRIOV_SUPPORTED_PAGE_SIZE 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_SYSTEM_PAGE_SIZE 3 0xfffe10201350 1 0 4294967295 SRIOV_SYSTEM_PAGE_SIZE 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_VF_BASE_ADDR_0 3 0xfffe10201354 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_VF_BASE_ADDR_1 3 0xfffe10201358 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_VF_BASE_ADDR_2 3 0xfffe1020135c 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_VF_BASE_ADDR_3 3 0xfffe10201360 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_VF_BASE_ADDR_4 3 0xfffe10201364 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_VF_BASE_ADDR_5 3 0xfffe10201368 1 0 4294967295 VF_BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_SRIOV_VF_MIGRATION_STATE_ARRAY_OFFSET 3 0xfffe1020136c 2 0 4294967295 SRIOV_VF_MIGRATION_STATE_BIR 0 2 SRIOV_VF_MIGRATION_STATE_ARRAY_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_TPH_REQR_ENH_CAP_LIST 3 0xfffe10201370 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_TPH_REQR_CAP 3 0xfffe10201374 6 0 4294967295 TPH_REQR_NO_ST_MODE_SUPPORTED 0 0 TPH_REQR_INT_VEC_MODE_SUPPORTED 1 1 TPH_REQR_DEV_SPC_MODE_SUPPORTED 2 2 TPH_REQR_EXTND_TPH_REQR_SUPPORED 8 8 TPH_REQR_ST_TABLE_LOCATION 9 10 TPH_REQR_ST_TABLE_SIZE 16 26 cfgBIF_CFG_DEV0_EPF1_1_PCIE_TPH_REQR_CNTL 3 0xfffe10201378 2 0 4294967295 TPH_REQR_ST_MODE_SEL 0 2 TPH_REQR_EN 8 9 cfgBIF_CFG_DEV0_EPF1_1_PCIE_DLF_ENH_CAP_LIST 3 0xfffe10201400 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_DATA_LINK_FEATURE_CAP 3 0xfffe10201404 2 0 4294967295 LOCAL_DLF_SUPPORTED 0 22 DLF_EXCHANGE_ENABLE 31 31 cfgBIF_CFG_DEV0_EPF1_1_DATA_LINK_FEATURE_STATUS 3 0xfffe10201408 2 0 4294967295 REMOTE_DLF_SUPPORTED 0 22 REMOTE_DLF_SUPPORTED_VALID 31 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_PHY_16GT_ENH_CAP_LIST 3 0xfffe10201410 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_LINK_CAP_16GT 3 0xfffe10201414 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_EPF1_1_LINK_CNTL_16GT 3 0xfffe10201418 1 0 4294967295 RESERVED 0 31 cfgBIF_CFG_DEV0_EPF1_1_LINK_STATUS_16GT 3 0xfffe1020141c 5 0 4294967295 EQUALIZATION_COMPLETE_16GT 0 0 EQUALIZATION_PHASE1_SUCCESS_16GT 1 1 EQUALIZATION_PHASE2_SUCCESS_16GT 2 2 EQUALIZATION_PHASE3_SUCCESS_16GT 3 3 LINK_EQUALIZATION_REQUEST_16GT 4 4 cfgBIF_CFG_DEV0_EPF1_1_LOCAL_PARITY_MISMATCH_STATUS_16GT 3 0xfffe10201420 1 0 4294967295 LOCAL_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF1_1_RTM1_PARITY_MISMATCH_STATUS_16GT 3 0xfffe10201424 1 0 4294967295 RTM1_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF1_1_RTM2_PARITY_MISMATCH_STATUS_16GT 3 0xfffe10201428 1 0 4294967295 RTM2_PARITY_MISMATCH_STATUS_BITS 0 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_0_EQUALIZATION_CNTL_16GT 3 0xfffe10201430 2 0 4294967295 LANE_0_DSP_16GT_TX_PRESET 0 3 LANE_0_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_1_EQUALIZATION_CNTL_16GT 3 0xfffe10201431 2 0 4294967295 LANE_1_DSP_16GT_TX_PRESET 0 3 LANE_1_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_2_EQUALIZATION_CNTL_16GT 3 0xfffe10201432 2 0 4294967295 LANE_2_DSP_16GT_TX_PRESET 0 3 LANE_2_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_3_EQUALIZATION_CNTL_16GT 3 0xfffe10201433 2 0 4294967295 LANE_3_DSP_16GT_TX_PRESET 0 3 LANE_3_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_4_EQUALIZATION_CNTL_16GT 3 0xfffe10201434 2 0 4294967295 LANE_4_DSP_16GT_TX_PRESET 0 3 LANE_4_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_5_EQUALIZATION_CNTL_16GT 3 0xfffe10201435 2 0 4294967295 LANE_5_DSP_16GT_TX_PRESET 0 3 LANE_5_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_6_EQUALIZATION_CNTL_16GT 3 0xfffe10201436 2 0 4294967295 LANE_6_DSP_16GT_TX_PRESET 0 3 LANE_6_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_7_EQUALIZATION_CNTL_16GT 3 0xfffe10201437 2 0 4294967295 LANE_7_DSP_16GT_TX_PRESET 0 3 LANE_7_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_8_EQUALIZATION_CNTL_16GT 3 0xfffe10201438 2 0 4294967295 LANE_8_DSP_16GT_TX_PRESET 0 3 LANE_8_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_9_EQUALIZATION_CNTL_16GT 3 0xfffe10201439 2 0 4294967295 LANE_9_DSP_16GT_TX_PRESET 0 3 LANE_9_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_10_EQUALIZATION_CNTL_16GT 3 0xfffe1020143a 2 0 4294967295 LANE_10_DSP_16GT_TX_PRESET 0 3 LANE_10_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_11_EQUALIZATION_CNTL_16GT 3 0xfffe1020143b 2 0 4294967295 LANE_11_DSP_16GT_TX_PRESET 0 3 LANE_11_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_12_EQUALIZATION_CNTL_16GT 3 0xfffe1020143c 2 0 4294967295 LANE_12_DSP_16GT_TX_PRESET 0 3 LANE_12_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_13_EQUALIZATION_CNTL_16GT 3 0xfffe1020143d 2 0 4294967295 LANE_13_DSP_16GT_TX_PRESET 0 3 LANE_13_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_14_EQUALIZATION_CNTL_16GT 3 0xfffe1020143e 2 0 4294967295 LANE_14_DSP_16GT_TX_PRESET 0 3 LANE_14_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_LANE_15_EQUALIZATION_CNTL_16GT 3 0xfffe1020143f 2 0 4294967295 LANE_15_DSP_16GT_TX_PRESET 0 3 LANE_15_USP_16GT_TX_PRESET 4 7 cfgBIF_CFG_DEV0_EPF1_1_PCIE_MARGINING_ENH_CAP_LIST 3 0xfffe10201440 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_MARGINING_PORT_CAP 3 0xfffe10201444 1 0 4294967295 MARGINING_USES_SOFTWARE 0 0 cfgBIF_CFG_DEV0_EPF1_1_MARGINING_PORT_STATUS 3 0xfffe10201446 2 0 4294967295 MARGINING_READY 0 0 MARGINING_SOFTWARE_READY 1 1 cfgBIF_CFG_DEV0_EPF1_1_LANE_0_MARGINING_LANE_CNTL 3 0xfffe10201448 4 0 4294967295 LANE_0_RECEIVER_NUMBER 0 2 LANE_0_MARGIN_TYPE 3 5 LANE_0_USAGE_MODEL 6 6 LANE_0_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_0_MARGINING_LANE_STATUS 3 0xfffe1020144a 4 0 4294967295 LANE_0_RECEIVER_NUMBER_STATUS 0 2 LANE_0_MARGIN_TYPE_STATUS 3 5 LANE_0_USAGE_MODEL_STATUS 6 6 LANE_0_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_1_MARGINING_LANE_CNTL 3 0xfffe1020144c 4 0 4294967295 LANE_1_RECEIVER_NUMBER 0 2 LANE_1_MARGIN_TYPE 3 5 LANE_1_USAGE_MODEL 6 6 LANE_1_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_1_MARGINING_LANE_STATUS 3 0xfffe1020144e 4 0 4294967295 LANE_1_RECEIVER_NUMBER_STATUS 0 2 LANE_1_MARGIN_TYPE_STATUS 3 5 LANE_1_USAGE_MODEL_STATUS 6 6 LANE_1_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_2_MARGINING_LANE_CNTL 3 0xfffe10201450 4 0 4294967295 LANE_2_RECEIVER_NUMBER 0 2 LANE_2_MARGIN_TYPE 3 5 LANE_2_USAGE_MODEL 6 6 LANE_2_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_2_MARGINING_LANE_STATUS 3 0xfffe10201452 4 0 4294967295 LANE_2_RECEIVER_NUMBER_STATUS 0 2 LANE_2_MARGIN_TYPE_STATUS 3 5 LANE_2_USAGE_MODEL_STATUS 6 6 LANE_2_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_3_MARGINING_LANE_CNTL 3 0xfffe10201454 4 0 4294967295 LANE_3_RECEIVER_NUMBER 0 2 LANE_3_MARGIN_TYPE 3 5 LANE_3_USAGE_MODEL 6 6 LANE_3_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_3_MARGINING_LANE_STATUS 3 0xfffe10201456 4 0 4294967295 LANE_3_RECEIVER_NUMBER_STATUS 0 2 LANE_3_MARGIN_TYPE_STATUS 3 5 LANE_3_USAGE_MODEL_STATUS 6 6 LANE_3_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_4_MARGINING_LANE_CNTL 3 0xfffe10201458 4 0 4294967295 LANE_4_RECEIVER_NUMBER 0 2 LANE_4_MARGIN_TYPE 3 5 LANE_4_USAGE_MODEL 6 6 LANE_4_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_4_MARGINING_LANE_STATUS 3 0xfffe1020145a 4 0 4294967295 LANE_4_RECEIVER_NUMBER_STATUS 0 2 LANE_4_MARGIN_TYPE_STATUS 3 5 LANE_4_USAGE_MODEL_STATUS 6 6 LANE_4_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_5_MARGINING_LANE_CNTL 3 0xfffe1020145c 4 0 4294967295 LANE_5_RECEIVER_NUMBER 0 2 LANE_5_MARGIN_TYPE 3 5 LANE_5_USAGE_MODEL 6 6 LANE_5_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_5_MARGINING_LANE_STATUS 3 0xfffe1020145e 4 0 4294967295 LANE_5_RECEIVER_NUMBER_STATUS 0 2 LANE_5_MARGIN_TYPE_STATUS 3 5 LANE_5_USAGE_MODEL_STATUS 6 6 LANE_5_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_6_MARGINING_LANE_CNTL 3 0xfffe10201460 4 0 4294967295 LANE_6_RECEIVER_NUMBER 0 2 LANE_6_MARGIN_TYPE 3 5 LANE_6_USAGE_MODEL 6 6 LANE_6_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_6_MARGINING_LANE_STATUS 3 0xfffe10201462 4 0 4294967295 LANE_6_RECEIVER_NUMBER_STATUS 0 2 LANE_6_MARGIN_TYPE_STATUS 3 5 LANE_6_USAGE_MODEL_STATUS 6 6 LANE_6_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_7_MARGINING_LANE_CNTL 3 0xfffe10201464 4 0 4294967295 LANE_7_RECEIVER_NUMBER 0 2 LANE_7_MARGIN_TYPE 3 5 LANE_7_USAGE_MODEL 6 6 LANE_7_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_7_MARGINING_LANE_STATUS 3 0xfffe10201466 4 0 4294967295 LANE_7_RECEIVER_NUMBER_STATUS 0 2 LANE_7_MARGIN_TYPE_STATUS 3 5 LANE_7_USAGE_MODEL_STATUS 6 6 LANE_7_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_8_MARGINING_LANE_CNTL 3 0xfffe10201468 4 0 4294967295 LANE_8_RECEIVER_NUMBER 0 2 LANE_8_MARGIN_TYPE 3 5 LANE_8_USAGE_MODEL 6 6 LANE_8_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_8_MARGINING_LANE_STATUS 3 0xfffe1020146a 4 0 4294967295 LANE_8_RECEIVER_NUMBER_STATUS 0 2 LANE_8_MARGIN_TYPE_STATUS 3 5 LANE_8_USAGE_MODEL_STATUS 6 6 LANE_8_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_9_MARGINING_LANE_CNTL 3 0xfffe1020146c 4 0 4294967295 LANE_9_RECEIVER_NUMBER 0 2 LANE_9_MARGIN_TYPE 3 5 LANE_9_USAGE_MODEL 6 6 LANE_9_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_9_MARGINING_LANE_STATUS 3 0xfffe1020146e 4 0 4294967295 LANE_9_RECEIVER_NUMBER_STATUS 0 2 LANE_9_MARGIN_TYPE_STATUS 3 5 LANE_9_USAGE_MODEL_STATUS 6 6 LANE_9_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_10_MARGINING_LANE_CNTL 3 0xfffe10201470 4 0 4294967295 LANE_10_RECEIVER_NUMBER 0 2 LANE_10_MARGIN_TYPE 3 5 LANE_10_USAGE_MODEL 6 6 LANE_10_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_10_MARGINING_LANE_STATUS 3 0xfffe10201472 4 0 4294967295 LANE_10_RECEIVER_NUMBER_STATUS 0 2 LANE_10_MARGIN_TYPE_STATUS 3 5 LANE_10_USAGE_MODEL_STATUS 6 6 LANE_10_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_11_MARGINING_LANE_CNTL 3 0xfffe10201474 4 0 4294967295 LANE_11_RECEIVER_NUMBER 0 2 LANE_11_MARGIN_TYPE 3 5 LANE_11_USAGE_MODEL 6 6 LANE_11_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_11_MARGINING_LANE_STATUS 3 0xfffe10201476 4 0 4294967295 LANE_11_RECEIVER_NUMBER_STATUS 0 2 LANE_11_MARGIN_TYPE_STATUS 3 5 LANE_11_USAGE_MODEL_STATUS 6 6 LANE_11_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_12_MARGINING_LANE_CNTL 3 0xfffe10201478 4 0 4294967295 LANE_12_RECEIVER_NUMBER 0 2 LANE_12_MARGIN_TYPE 3 5 LANE_12_USAGE_MODEL 6 6 LANE_12_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_12_MARGINING_LANE_STATUS 3 0xfffe1020147a 4 0 4294967295 LANE_12_RECEIVER_NUMBER_STATUS 0 2 LANE_12_MARGIN_TYPE_STATUS 3 5 LANE_12_USAGE_MODEL_STATUS 6 6 LANE_12_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_13_MARGINING_LANE_CNTL 3 0xfffe1020147c 4 0 4294967295 LANE_13_RECEIVER_NUMBER 0 2 LANE_13_MARGIN_TYPE 3 5 LANE_13_USAGE_MODEL 6 6 LANE_13_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_13_MARGINING_LANE_STATUS 3 0xfffe1020147e 4 0 4294967295 LANE_13_RECEIVER_NUMBER_STATUS 0 2 LANE_13_MARGIN_TYPE_STATUS 3 5 LANE_13_USAGE_MODEL_STATUS 6 6 LANE_13_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_14_MARGINING_LANE_CNTL 3 0xfffe10201480 4 0 4294967295 LANE_14_RECEIVER_NUMBER 0 2 LANE_14_MARGIN_TYPE 3 5 LANE_14_USAGE_MODEL 6 6 LANE_14_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_14_MARGINING_LANE_STATUS 3 0xfffe10201482 4 0 4294967295 LANE_14_RECEIVER_NUMBER_STATUS 0 2 LANE_14_MARGIN_TYPE_STATUS 3 5 LANE_14_USAGE_MODEL_STATUS 6 6 LANE_14_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_15_MARGINING_LANE_CNTL 3 0xfffe10201484 4 0 4294967295 LANE_15_RECEIVER_NUMBER 0 2 LANE_15_MARGIN_TYPE 3 5 LANE_15_USAGE_MODEL 6 6 LANE_15_MARGIN_PAYLOAD 8 15 cfgBIF_CFG_DEV0_EPF1_1_LANE_15_MARGINING_LANE_STATUS 3 0xfffe10201486 4 0 4294967295 LANE_15_RECEIVER_NUMBER_STATUS 0 2 LANE_15_MARGIN_TYPE_STATUS 3 5 LANE_15_USAGE_MODEL_STATUS 6 6 LANE_15_MARGIN_PAYLOAD_STATUS 8 15 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR_ENH_CAP_LIST 3 0xfffe102014c0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR1_CAP 3 0xfffe102014c4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR1_CNTL 3 0xfffe102014c8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR2_CAP 3 0xfffe102014cc 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR2_CNTL 3 0xfffe102014d0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR3_CAP 3 0xfffe102014d4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR3_CNTL 3 0xfffe102014d8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR4_CAP 3 0xfffe102014dc 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR4_CNTL 3 0xfffe102014e0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR5_CAP 3 0xfffe102014e4 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR5_CNTL 3 0xfffe102014e8 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR6_CAP 3 0xfffe102014ec 1 0 4294967295 VF_BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VF_RESIZE_BAR6_CNTL 3 0xfffe102014f0 3 0 4294967295 VF_BAR_INDEX 0 2 VF_BAR_TOTAL_NUM 5 7 VF_BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST_GPUIOV 3 0xfffe10201500 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV 3 0xfffe10201504 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_SRIOV_SHADOW 3 0xfffe10201508 2 0 4294967295 VF_EN 0 0 VF_NUM 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_INTR_ENABLE 3 0xfffe1020150c 18 0 4294967295 GFX_CMD_COMPLETE_INTR_EN 0 0 GFX_HANG_SELF_RECOVERED_INTR_EN 1 1 GFX_HANG_NEED_FLR_INTR_EN 2 2 GFX_VM_BUSY_TRANSITION_INTR_EN 3 3 UVD_CMD_COMPLETE_INTR_EN 8 8 UVD_HANG_SELF_RECOVERED_INTR_EN 9 9 UVD_HANG_NEED_FLR_INTR_EN 10 10 UVD_VM_BUSY_TRANSITION_INTR_EN 11 11 UVD1_CMD_COMPLETE_INTR_EN 12 12 UVD1_HANG_SELF_RECOVERED_INTR_EN 13 13 UVD1_HANG_NEED_FLR_INTR_EN 14 14 UVD1_VM_BUSY_TRANSITION_INTR_EN 15 15 VCE_CMD_COMPLETE_INTR_EN 16 16 VCE_HANG_SELF_RECOVERED_INTR_EN 17 17 VCE_HANG_NEED_FLR_INTR_EN 18 18 VCE_VM_BUSY_TRANSITION_INTR_EN 19 19 HVVM_MAILBOX_TRN_ACK_INTR_EN 24 24 HVVM_MAILBOX_RCV_VALID_INTR_EN 25 25 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_INTR_STATUS 3 0xfffe10201510 18 0 4294967295 GFX_CMD_COMPLETE_INTR_STATUS 0 0 GFX_HANG_SELF_RECOVERED_INTR_STATUS 1 1 GFX_HANG_NEED_FLR_INTR_STATUS 2 2 GFX_VM_BUSY_TRANSITION_INTR_STATUS 3 3 UVD_CMD_COMPLETE_INTR_STATUS 8 8 UVD_HANG_SELF_RECOVERED_INTR_STATUS 9 9 UVD_HANG_NEED_FLR_INTR_STATUS 10 10 UVD_VM_BUSY_TRANSITION_INTR_STATUS 11 11 UVD1_CMD_COMPLETE_INTR_STATUS 12 12 UVD1_HANG_SELF_RECOVERED_INTR_STATUS 13 13 UVD1_HANG_NEED_FLR_INTR_STATUS 14 14 UVD1_VM_BUSY_TRANSITION_INTR_STATUS 15 15 VCE_CMD_COMPLETE_INTR_STATUS 16 16 VCE_HANG_SELF_RECOVERED_INTR_STATUS 17 17 VCE_HANG_NEED_FLR_INTR_STATUS 18 18 VCE_VM_BUSY_TRANSITION_INTR_STATUS 19 19 HVVM_MAILBOX_TRN_ACK_INTR_STATUS 24 24 HVVM_MAILBOX_RCV_VALID_INTR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL 3 0xfffe10201514 1 0 4294967295 SOFT_PF_FLR 0 0 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW0 3 0xfffe10201518 5 0 4294967295 VF_INDEX 0 7 TRN_MSG_DATA 8 11 TRN_MSG_VALID 15 15 RCV_MSG_DATA 16 19 RCV_MSG_ACK 24 24 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW1 3 0xfffe1020151c 32 0 4294967295 VF0_TRN_ACK 0 0 VF0_RCV_VALID 1 1 VF1_TRN_ACK 2 2 VF1_RCV_VALID 3 3 VF2_TRN_ACK 4 4 VF2_RCV_VALID 5 5 VF3_TRN_ACK 6 6 VF3_RCV_VALID 7 7 VF4_TRN_ACK 8 8 VF4_RCV_VALID 9 9 VF5_TRN_ACK 10 10 VF5_RCV_VALID 11 11 VF6_TRN_ACK 12 12 VF6_RCV_VALID 13 13 VF7_TRN_ACK 14 14 VF7_RCV_VALID 15 15 VF8_TRN_ACK 16 16 VF8_RCV_VALID 17 17 VF9_TRN_ACK 18 18 VF9_RCV_VALID 19 19 VF10_TRN_ACK 20 20 VF10_RCV_VALID 21 21 VF11_TRN_ACK 22 22 VF11_RCV_VALID 23 23 VF12_TRN_ACK 24 24 VF12_RCV_VALID 25 25 VF13_TRN_ACK 26 26 VF13_RCV_VALID 27 27 VF14_TRN_ACK 28 28 VF14_RCV_VALID 29 29 VF15_TRN_ACK 30 30 VF15_RCV_VALID 31 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_HVVM_MBOX_DW2 3 0xfffe10201520 32 0 4294967295 VF16_TRN_ACK 0 0 VF16_RCV_VALID 1 1 VF17_TRN_ACK 2 2 VF17_RCV_VALID 3 3 VF18_TRN_ACK 4 4 VF18_RCV_VALID 5 5 VF19_TRN_ACK 6 6 VF19_RCV_VALID 7 7 VF20_TRN_ACK 8 8 VF20_RCV_VALID 9 9 VF21_TRN_ACK 10 10 VF21_RCV_VALID 11 11 VF22_TRN_ACK 12 12 VF22_RCV_VALID 13 13 VF23_TRN_ACK 14 14 VF23_RCV_VALID 15 15 VF24_TRN_ACK 16 16 VF24_RCV_VALID 17 17 VF25_TRN_ACK 18 18 VF25_RCV_VALID 19 19 VF26_TRN_ACK 20 20 VF26_RCV_VALID 21 21 VF27_TRN_ACK 22 22 VF27_RCV_VALID 23 23 VF28_TRN_ACK 24 24 VF28_RCV_VALID 25 25 VF29_TRN_ACK 26 26 VF29_RCV_VALID 27 27 VF30_TRN_ACK 28 28 VF30_RCV_VALID 29 29 PF_TRN_ACK 30 30 PF_RCV_VALID 31 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_CONTEXT 3 0xfffe10201524 3 0 4294967295 CONTEXT_SIZE 0 6 LOC 7 7 CONTEXT_OFFSET 10 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_TOTAL_FB 3 0xfffe10201528 2 0 4294967295 TOTAL_FB_AVAILABLE 0 15 TOTAL_FB_CONSUMED 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_OFFSETS 3 0xfffe1020152c 4 0 4294967295 UVDSCH_OFFSET 0 7 VCESCH_OFFSET 8 15 GFXSCH_OFFSET 16 23 UVD1SCH_OFFSET 24 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_REGION 3 0xfffe10201530 2 0 4294967295 LFB_REGION 0 2 MAX_REGION 4 6 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_P2P_OVER_XGMI_ENABLE 3 0xfffe10201534 2 0 4294967295 P2P_OVER_XGMI_ENABLE_VF 0 30 P2P_OVER_XGMI_ENABLE_PF 31 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF0_FB 3 0xfffe10201538 2 0 4294967295 VF0_FB_SIZE 0 15 VF0_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF1_FB 3 0xfffe1020153c 2 0 4294967295 VF1_FB_SIZE 0 15 VF1_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF2_FB 3 0xfffe10201540 2 0 4294967295 VF2_FB_SIZE 0 15 VF2_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF3_FB 3 0xfffe10201544 2 0 4294967295 VF3_FB_SIZE 0 15 VF3_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF4_FB 3 0xfffe10201548 2 0 4294967295 VF4_FB_SIZE 0 15 VF4_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF5_FB 3 0xfffe1020154c 2 0 4294967295 VF5_FB_SIZE 0 15 VF5_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF6_FB 3 0xfffe10201550 2 0 4294967295 VF6_FB_SIZE 0 15 VF6_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF7_FB 3 0xfffe10201554 2 0 4294967295 VF7_FB_SIZE 0 15 VF7_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF8_FB 3 0xfffe10201558 2 0 4294967295 VF8_FB_SIZE 0 15 VF8_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF9_FB 3 0xfffe1020155c 2 0 4294967295 VF9_FB_SIZE 0 15 VF9_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF10_FB 3 0xfffe10201560 2 0 4294967295 VF10_FB_SIZE 0 15 VF10_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF11_FB 3 0xfffe10201564 2 0 4294967295 VF11_FB_SIZE 0 15 VF11_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF12_FB 3 0xfffe10201568 2 0 4294967295 VF12_FB_SIZE 0 15 VF12_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF13_FB 3 0xfffe1020156c 2 0 4294967295 VF13_FB_SIZE 0 15 VF13_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF14_FB 3 0xfffe10201570 2 0 4294967295 VF14_FB_SIZE 0 15 VF14_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF15_FB 3 0xfffe10201574 2 0 4294967295 VF15_FB_SIZE 0 15 VF15_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF16_FB 3 0xfffe10201578 2 0 4294967295 VF16_FB_SIZE 0 15 VF16_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF17_FB 3 0xfffe1020157c 2 0 4294967295 VF17_FB_SIZE 0 15 VF17_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF18_FB 3 0xfffe10201580 2 0 4294967295 VF18_FB_SIZE 0 15 VF18_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF19_FB 3 0xfffe10201584 2 0 4294967295 VF19_FB_SIZE 0 15 VF19_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF20_FB 3 0xfffe10201588 2 0 4294967295 VF20_FB_SIZE 0 15 VF20_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF21_FB 3 0xfffe1020158c 2 0 4294967295 VF21_FB_SIZE 0 15 VF21_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF22_FB 3 0xfffe10201590 2 0 4294967295 VF22_FB_SIZE 0 15 VF22_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF23_FB 3 0xfffe10201594 2 0 4294967295 VF23_FB_SIZE 0 15 VF23_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF24_FB 3 0xfffe10201598 2 0 4294967295 VF24_FB_SIZE 0 15 VF24_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF25_FB 3 0xfffe1020159c 2 0 4294967295 VF25_FB_SIZE 0 15 VF25_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF26_FB 3 0xfffe102015a0 2 0 4294967295 VF26_FB_SIZE 0 15 VF26_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF27_FB 3 0xfffe102015a4 2 0 4294967295 VF27_FB_SIZE 0 15 VF27_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF28_FB 3 0xfffe102015a8 2 0 4294967295 VF28_FB_SIZE 0 15 VF28_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF29_FB 3 0xfffe102015ac 2 0 4294967295 VF29_FB_SIZE 0 15 VF29_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF30_FB 3 0xfffe102015b0 2 0 4294967295 VF30_FB_SIZE 0 15 VF30_FB_OFFSET 16 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW0 3 0xfffe102015c0 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW1 3 0xfffe102015c4 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW2 3 0xfffe102015c8 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW3 3 0xfffe102015cc 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW4 3 0xfffe102015d0 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW5 3 0xfffe102015d4 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW6 3 0xfffe102015d8 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW7 3 0xfffe102015dc 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVDSCH_DW8 3 0xfffe102015e0 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW0 3 0xfffe102015f0 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW1 3 0xfffe102015f4 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW2 3 0xfffe102015f8 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW3 3 0xfffe102015fc 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW4 3 0xfffe10201600 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW5 3 0xfffe10201604 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW6 3 0xfffe10201608 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW7 3 0xfffe1020160c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VCESCH_DW8 3 0xfffe10201610 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW0 3 0xfffe10201620 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW1 3 0xfffe10201624 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW2 3 0xfffe10201628 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW3 3 0xfffe1020162c 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW4 3 0xfffe10201630 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW5 3 0xfffe10201634 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW6 3 0xfffe10201638 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW7 3 0xfffe1020163c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_GFXSCH_DW8 3 0xfffe10201640 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW0 3 0xfffe10201650 1 0 4294967295 DW0 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW1 3 0xfffe10201654 1 0 4294967295 DW1 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW2 3 0xfffe10201658 1 0 4294967295 DW2 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW3 3 0xfffe1020165c 1 0 4294967295 DW3 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW4 3 0xfffe10201660 1 0 4294967295 DW4 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW5 3 0xfffe10201664 1 0 4294967295 DW5 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW6 3 0xfffe10201668 1 0 4294967295 DW6 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW7 3 0xfffe1020166c 1 0 4294967295 DW7 0 31 cfgBIF_CFG_DEV0_EPF1_1_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_UVD1SCH_DW8 3 0xfffe10201670 1 0 4294967295 DW8 0 31 cfgBIF_CFG_DEV0_EPF2_1_VENDOR_ID 3 0xfffe10202000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF2_1_DEVICE_ID 3 0xfffe10202002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF2_1_COMMAND 3 0xfffe10202004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF2_1_STATUS 3 0xfffe10202006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF2_1_REVISION_ID 3 0xfffe10202008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF2_1_PROG_INTERFACE 3 0xfffe10202009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF2_1_SUB_CLASS 3 0xfffe1020200a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF2_1_BASE_CLASS 3 0xfffe1020200b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF2_1_CACHE_LINE 3 0xfffe1020200c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF2_1_LATENCY 3 0xfffe1020200d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF2_1_HEADER 3 0xfffe1020200e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF2_1_BIST 3 0xfffe1020200f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF2_1_BASE_ADDR_1 3 0xfffe10202010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_BASE_ADDR_2 3 0xfffe10202014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_BASE_ADDR_3 3 0xfffe10202018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_BASE_ADDR_4 3 0xfffe1020201c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_BASE_ADDR_5 3 0xfffe10202020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_BASE_ADDR_6 3 0xfffe10202024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_CARDBUS_CIS_PTR 3 0xfffe10202028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF2_1_ADAPTER_ID 3 0xfffe1020202c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF2_1_ROM_BASE_ADDR 3 0xfffe10202030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_CAP_PTR 3 0xfffe10202034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF2_1_INTERRUPT_LINE 3 0xfffe1020203c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF2_1_INTERRUPT_PIN 3 0xfffe1020203d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF2_1_MIN_GRANT 3 0xfffe1020203e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF2_1_MAX_LATENCY 3 0xfffe1020203f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF2_1_VENDOR_CAP_LIST 3 0xfffe10202048 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 cfgBIF_CFG_DEV0_EPF2_1_ADAPTER_ID_W 3 0xfffe1020204c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF2_1_PMI_CAP_LIST 3 0xfffe10202050 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF2_1_PMI_CAP 3 0xfffe10202052 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgBIF_CFG_DEV0_EPF2_1_PMI_STATUS_CNTL 3 0xfffe10202054 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgBIF_CFG_DEV0_EPF2_1_SBRN 3 0xfffe10202060 1 0 4294967295 SBRN 0 7 cfgBIF_CFG_DEV0_EPF2_1_FLADJ 3 0xfffe10202061 2 0 4294967295 FLADJ 0 5 NFC 6 6 cfgBIF_CFG_DEV0_EPF2_1_DBESL_DBESLD 3 0xfffe10202062 2 0 4294967295 DBESL 0 3 DBESLD 4 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_CAP_LIST 3 0xfffe10202064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_CAP 3 0xfffe10202066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF2_1_DEVICE_CAP 3 0xfffe10202068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF2_1_DEVICE_CNTL 3 0xfffe1020206c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF2_1_DEVICE_STATUS 3 0xfffe1020206e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF2_1_LINK_CAP 3 0xfffe10202070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF2_1_LINK_CNTL 3 0xfffe10202074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF2_1_LINK_STATUS 3 0xfffe10202076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF2_1_DEVICE_CAP2 3 0xfffe10202088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF2_1_DEVICE_CNTL2 3 0xfffe1020208c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF2_1_DEVICE_STATUS2 3 0xfffe1020208e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF2_1_LINK_CAP2 3 0xfffe10202090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF2_1_LINK_CNTL2 3 0xfffe10202094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF2_1_LINK_STATUS2 3 0xfffe10202096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF2_1_MSI_CAP_LIST 3 0xfffe102020a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF2_1_MSI_MSG_CNTL 3 0xfffe102020a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF2_1_MSI_MSG_ADDR_LO 3 0xfffe102020a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF2_1_MSI_MSG_ADDR_HI 3 0xfffe102020a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF2_1_MSI_MSG_DATA 3 0xfffe102020a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF2_1_MSI_MASK 3 0xfffe102020ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF2_1_MSI_MSG_DATA_64 3 0xfffe102020ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF2_1_MSI_MASK_64 3 0xfffe102020b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF2_1_MSI_PENDING 3 0xfffe102020b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF2_1_MSI_PENDING_64 3 0xfffe102020b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF2_1_MSIX_CAP_LIST 3 0xfffe102020c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF2_1_MSIX_MSG_CNTL 3 0xfffe102020c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF2_1_MSIX_TABLE 3 0xfffe102020c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF2_1_MSIX_PBA 3 0xfffe102020c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF2_1_SATA_CAP_0 3 0xfffe102020d0 5 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 SATA_CAP_MINOR_REV 16 19 SATA_CAP_MAJOR_REV 20 23 SATA_CAP_RESERVED1 24 31 cfgBIF_CFG_DEV0_EPF2_1_SATA_CAP_1 3 0xfffe102020d4 3 0 4294967295 SATA_CAP_BAR_LOC 0 3 SATA_CAP_BAR_OFFSET 4 23 SATA_CAP_RESERVED2 24 31 cfgBIF_CFG_DEV0_EPF2_1_SATA_IDP_INDEX 3 0xfffe102020d8 3 0 4294967295 IDP_RESERVED1 0 1 IDP_INDEX 2 11 IDP_RESERVED2 12 31 cfgBIF_CFG_DEV0_EPF2_1_SATA_IDP_DATA 3 0xfffe102020dc 1 0 4294967295 IDP_DATA 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10202100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10202104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10202108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1020210c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10202150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10202154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF2_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10202158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF2_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1020215c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF2_1_PCIE_CORR_ERR_STATUS 3 0xfffe10202160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_CORR_ERR_MASK 3 0xfffe10202164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10202168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF2_1_PCIE_HDR_LOG0 3 0xfffe1020216c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_HDR_LOG1 3 0xfffe10202170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_HDR_LOG2 3 0xfffe10202174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_HDR_LOG3 3 0xfffe10202178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10202188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1020218c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10202190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10202194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR_ENH_CAP_LIST 3 0xfffe10202200 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR1_CAP 3 0xfffe10202204 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR1_CNTL 3 0xfffe10202208 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR2_CAP 3 0xfffe1020220c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR2_CNTL 3 0xfffe10202210 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR3_CAP 3 0xfffe10202214 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR3_CNTL 3 0xfffe10202218 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR4_CAP 3 0xfffe1020221c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR4_CNTL 3 0xfffe10202220 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR5_CAP 3 0xfffe10202224 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR5_CNTL 3 0xfffe10202228 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR6_CAP 3 0xfffe1020222c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_BAR6_CNTL 3 0xfffe10202230 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF2_1_PCIE_PWR_BUDGET_ENH_CAP_LIST 3 0xfffe10202240 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_PWR_BUDGET_DATA_SELECT 3 0xfffe10202244 1 0 4294967295 DATA_SELECT 0 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_PWR_BUDGET_DATA 3 0xfffe10202248 6 0 4294967295 BASE_POWER 0 7 DATA_SCALE 8 9 PM_SUB_STATE 10 12 PM_STATE 13 14 TYPE 15 17 POWER_RAIL 18 20 cfgBIF_CFG_DEV0_EPF2_1_PCIE_PWR_BUDGET_CAP 3 0xfffe1020224c 1 0 4294967295 SYSTEM_ALLOCATED 0 0 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_ENH_CAP_LIST 3 0xfffe10202250 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_CAP 3 0xfffe10202254 5 0 4294967295 SUBSTATE_MAX 0 4 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_LATENCY_INDICATOR 3 0xfffe10202258 1 0 4294967295 TRANS_LAT_INDICATOR_BITS 0 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_STATUS 3 0xfffe1020225c 2 0 4294967295 SUBSTATE_STATUS 0 4 SUBSTATE_CNTL_ENABLED 8 8 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_CNTL 3 0xfffe1020225e 1 0 4294967295 SUBSTATE_CNTL 0 4 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_0 3 0xfffe10202260 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_1 3 0xfffe10202261 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_2 3 0xfffe10202262 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_3 3 0xfffe10202263 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_4 3 0xfffe10202264 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_5 3 0xfffe10202265 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_6 3 0xfffe10202266 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_7 3 0xfffe10202267 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF2_1_PCIE_ACS_ENH_CAP_LIST 3 0xfffe102022a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_ACS_CAP 3 0xfffe102022a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_ACS_CNTL 3 0xfffe102022a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgBIF_CFG_DEV0_EPF2_1_PCIE_PASID_ENH_CAP_LIST 3 0xfffe102022d0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_PASID_CAP 3 0xfffe102022d4 3 0 4294967295 PASID_EXE_PERMISSION_SUPPORTED 1 1 PASID_PRIV_MODE_SUPPORTED 2 2 MAX_PASID_WIDTH 8 12 cfgBIF_CFG_DEV0_EPF2_1_PCIE_PASID_CNTL 3 0xfffe102022d6 3 0 4294967295 PASID_ENABLE 0 0 PASID_EXE_PERMISSION_ENABLE 1 1 PASID_PRIV_MODE_SUPPORTED_ENABLE 2 2 cfgBIF_CFG_DEV0_EPF2_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10202328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_ARI_CAP 3 0xfffe1020232c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_ARI_CNTL 3 0xfffe1020232e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_REQR_ENH_CAP_LIST 3 0xfffe10202370 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_REQR_CAP 3 0xfffe10202374 6 0 4294967295 TPH_REQR_NO_ST_MODE_SUPPORTED 0 0 TPH_REQR_INT_VEC_MODE_SUPPORTED 1 1 TPH_REQR_DEV_SPC_MODE_SUPPORTED 2 2 TPH_REQR_EXTND_TPH_REQR_SUPPORED 8 8 TPH_REQR_ST_TABLE_LOCATION 9 10 TPH_REQR_ST_TABLE_SIZE 16 26 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_REQR_CNTL 3 0xfffe10202378 2 0 4294967295 TPH_REQR_ST_MODE_SEL 0 2 TPH_REQR_EN 8 9 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_0 3 0xfffe1020237c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_1 3 0xfffe1020237e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_2 3 0xfffe10202380 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_3 3 0xfffe10202382 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_4 3 0xfffe10202384 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_5 3 0xfffe10202386 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_6 3 0xfffe10202388 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_7 3 0xfffe1020238a 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_8 3 0xfffe1020238c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_9 3 0xfffe1020238e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_10 3 0xfffe10202390 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_11 3 0xfffe10202392 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_12 3 0xfffe10202394 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_13 3 0xfffe10202396 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_14 3 0xfffe10202398 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_15 3 0xfffe1020239a 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_16 3 0xfffe1020239c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_17 3 0xfffe1020239e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_18 3 0xfffe102023a0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_19 3 0xfffe102023a2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_20 3 0xfffe102023a4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_21 3 0xfffe102023a6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_22 3 0xfffe102023a8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_23 3 0xfffe102023aa 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_24 3 0xfffe102023ac 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_25 3 0xfffe102023ae 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_26 3 0xfffe102023b0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_27 3 0xfffe102023b2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_28 3 0xfffe102023b4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_29 3 0xfffe102023b6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_30 3 0xfffe102023b8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_31 3 0xfffe102023ba 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_32 3 0xfffe102023bc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_33 3 0xfffe102023be 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_34 3 0xfffe102023c0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_35 3 0xfffe102023c2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_36 3 0xfffe102023c4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_37 3 0xfffe102023c6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_38 3 0xfffe102023c8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_39 3 0xfffe102023ca 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_40 3 0xfffe102023cc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_41 3 0xfffe102023ce 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_42 3 0xfffe102023d0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_43 3 0xfffe102023d2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_44 3 0xfffe102023d4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_45 3 0xfffe102023d6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_46 3 0xfffe102023d8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_47 3 0xfffe102023da 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_48 3 0xfffe102023dc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_49 3 0xfffe102023de 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_50 3 0xfffe102023e0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_51 3 0xfffe102023e2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_52 3 0xfffe102023e4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_53 3 0xfffe102023e6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_54 3 0xfffe102023e8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_55 3 0xfffe102023ea 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_56 3 0xfffe102023ec 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_57 3 0xfffe102023ee 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_58 3 0xfffe102023f0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_59 3 0xfffe102023f2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_60 3 0xfffe102023f4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_61 3 0xfffe102023f6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_62 3 0xfffe102023f8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF2_1_PCIE_TPH_ST_TABLE_63 3 0xfffe102023fa 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_VENDOR_ID 3 0xfffe10203000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF3_1_DEVICE_ID 3 0xfffe10203002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF3_1_COMMAND 3 0xfffe10203004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF3_1_STATUS 3 0xfffe10203006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF3_1_REVISION_ID 3 0xfffe10203008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF3_1_PROG_INTERFACE 3 0xfffe10203009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF3_1_SUB_CLASS 3 0xfffe1020300a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF3_1_BASE_CLASS 3 0xfffe1020300b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF3_1_CACHE_LINE 3 0xfffe1020300c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF3_1_LATENCY 3 0xfffe1020300d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF3_1_HEADER 3 0xfffe1020300e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF3_1_BIST 3 0xfffe1020300f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF3_1_BASE_ADDR_1 3 0xfffe10203010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_BASE_ADDR_2 3 0xfffe10203014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_BASE_ADDR_3 3 0xfffe10203018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_BASE_ADDR_4 3 0xfffe1020301c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_BASE_ADDR_5 3 0xfffe10203020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_BASE_ADDR_6 3 0xfffe10203024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_CARDBUS_CIS_PTR 3 0xfffe10203028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF3_1_ADAPTER_ID 3 0xfffe1020302c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF3_1_ROM_BASE_ADDR 3 0xfffe10203030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_CAP_PTR 3 0xfffe10203034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF3_1_INTERRUPT_LINE 3 0xfffe1020303c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF3_1_INTERRUPT_PIN 3 0xfffe1020303d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF3_1_MIN_GRANT 3 0xfffe1020303e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF3_1_MAX_LATENCY 3 0xfffe1020303f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF3_1_VENDOR_CAP_LIST 3 0xfffe10203048 3 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 LENGTH 16 23 cfgBIF_CFG_DEV0_EPF3_1_ADAPTER_ID_W 3 0xfffe1020304c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF3_1_PMI_CAP_LIST 3 0xfffe10203050 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF3_1_PMI_CAP 3 0xfffe10203052 8 0 4294967295 VERSION 0 2 PME_CLOCK 3 3 IMMEDIATE_READINESS_ON_RETURN_TO_D0 4 4 DEV_SPECIFIC_INIT 5 5 AUX_CURRENT 6 8 D1_SUPPORT 9 9 D2_SUPPORT 10 10 PME_SUPPORT 11 15 cfgBIF_CFG_DEV0_EPF3_1_PMI_STATUS_CNTL 3 0xfffe10203054 9 0 4294967295 POWER_STATE 0 1 NO_SOFT_RESET 3 3 PME_EN 8 8 DATA_SELECT 9 12 DATA_SCALE 13 14 PME_STATUS 15 15 B2_B3_SUPPORT 22 22 BUS_PWR_EN 23 23 PMI_DATA 24 31 cfgBIF_CFG_DEV0_EPF3_1_SBRN 3 0xfffe10203060 1 0 4294967295 SBRN 0 7 cfgBIF_CFG_DEV0_EPF3_1_FLADJ 3 0xfffe10203061 2 0 4294967295 FLADJ 0 5 NFC 6 6 cfgBIF_CFG_DEV0_EPF3_1_DBESL_DBESLD 3 0xfffe10203062 2 0 4294967295 DBESL 0 3 DBESLD 4 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_CAP_LIST 3 0xfffe10203064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_CAP 3 0xfffe10203066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF3_1_DEVICE_CAP 3 0xfffe10203068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF3_1_DEVICE_CNTL 3 0xfffe1020306c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF3_1_DEVICE_STATUS 3 0xfffe1020306e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF3_1_LINK_CAP 3 0xfffe10203070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF3_1_LINK_CNTL 3 0xfffe10203074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF3_1_LINK_STATUS 3 0xfffe10203076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF3_1_DEVICE_CAP2 3 0xfffe10203088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF3_1_DEVICE_CNTL2 3 0xfffe1020308c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF3_1_DEVICE_STATUS2 3 0xfffe1020308e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF3_1_LINK_CAP2 3 0xfffe10203090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF3_1_LINK_CNTL2 3 0xfffe10203094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF3_1_LINK_STATUS2 3 0xfffe10203096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF3_1_MSI_CAP_LIST 3 0xfffe102030a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF3_1_MSI_MSG_CNTL 3 0xfffe102030a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF3_1_MSI_MSG_ADDR_LO 3 0xfffe102030a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF3_1_MSI_MSG_ADDR_HI 3 0xfffe102030a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF3_1_MSI_MSG_DATA 3 0xfffe102030a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF3_1_MSI_MASK 3 0xfffe102030ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF3_1_MSI_MSG_DATA_64 3 0xfffe102030ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF3_1_MSI_MASK_64 3 0xfffe102030b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF3_1_MSI_PENDING 3 0xfffe102030b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF3_1_MSI_PENDING_64 3 0xfffe102030b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF3_1_MSIX_CAP_LIST 3 0xfffe102030c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF3_1_MSIX_MSG_CNTL 3 0xfffe102030c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF3_1_MSIX_TABLE 3 0xfffe102030c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF3_1_MSIX_PBA 3 0xfffe102030c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF3_1_SATA_CAP_0 3 0xfffe102030d0 5 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 SATA_CAP_MINOR_REV 16 19 SATA_CAP_MAJOR_REV 20 23 SATA_CAP_RESERVED1 24 31 cfgBIF_CFG_DEV0_EPF3_1_SATA_CAP_1 3 0xfffe102030d4 3 0 4294967295 SATA_CAP_BAR_LOC 0 3 SATA_CAP_BAR_OFFSET 4 23 SATA_CAP_RESERVED2 24 31 cfgBIF_CFG_DEV0_EPF3_1_SATA_IDP_INDEX 3 0xfffe102030d8 3 0 4294967295 IDP_RESERVED1 0 1 IDP_INDEX 2 11 IDP_RESERVED2 12 31 cfgBIF_CFG_DEV0_EPF3_1_SATA_IDP_DATA 3 0xfffe102030dc 1 0 4294967295 IDP_DATA 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10203100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10203104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10203108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1020310c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10203150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10203154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF3_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10203158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF3_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1020315c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF3_1_PCIE_CORR_ERR_STATUS 3 0xfffe10203160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_CORR_ERR_MASK 3 0xfffe10203164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10203168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF3_1_PCIE_HDR_LOG0 3 0xfffe1020316c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_HDR_LOG1 3 0xfffe10203170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_HDR_LOG2 3 0xfffe10203174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_HDR_LOG3 3 0xfffe10203178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10203188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1020318c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10203190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10203194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR_ENH_CAP_LIST 3 0xfffe10203200 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR1_CAP 3 0xfffe10203204 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR1_CNTL 3 0xfffe10203208 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR2_CAP 3 0xfffe1020320c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR2_CNTL 3 0xfffe10203210 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR3_CAP 3 0xfffe10203214 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR3_CNTL 3 0xfffe10203218 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR4_CAP 3 0xfffe1020321c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR4_CNTL 3 0xfffe10203220 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR5_CAP 3 0xfffe10203224 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR5_CNTL 3 0xfffe10203228 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR6_CAP 3 0xfffe1020322c 1 0 4294967295 BAR_SIZE_SUPPORTED 4 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_BAR6_CNTL 3 0xfffe10203230 3 0 4294967295 BAR_INDEX 0 2 BAR_TOTAL_NUM 5 7 BAR_SIZE 8 13 cfgBIF_CFG_DEV0_EPF3_1_PCIE_PWR_BUDGET_ENH_CAP_LIST 3 0xfffe10203240 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_PWR_BUDGET_DATA_SELECT 3 0xfffe10203244 1 0 4294967295 DATA_SELECT 0 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_PWR_BUDGET_DATA 3 0xfffe10203248 6 0 4294967295 BASE_POWER 0 7 DATA_SCALE 8 9 PM_SUB_STATE 10 12 PM_STATE 13 14 TYPE 15 17 POWER_RAIL 18 20 cfgBIF_CFG_DEV0_EPF3_1_PCIE_PWR_BUDGET_CAP 3 0xfffe1020324c 1 0 4294967295 SYSTEM_ALLOCATED 0 0 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_ENH_CAP_LIST 3 0xfffe10203250 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_CAP 3 0xfffe10203254 5 0 4294967295 SUBSTATE_MAX 0 4 TRANS_LAT_UNIT 8 9 PWR_ALLOC_SCALE 12 13 TRANS_LAT_VAL_0 16 23 TRANS_LAT_VAL_1 24 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_LATENCY_INDICATOR 3 0xfffe10203258 1 0 4294967295 TRANS_LAT_INDICATOR_BITS 0 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_STATUS 3 0xfffe1020325c 2 0 4294967295 SUBSTATE_STATUS 0 4 SUBSTATE_CNTL_ENABLED 8 8 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_CNTL 3 0xfffe1020325e 1 0 4294967295 SUBSTATE_CNTL 0 4 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_0 3 0xfffe10203260 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_1 3 0xfffe10203261 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_2 3 0xfffe10203262 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_3 3 0xfffe10203263 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_4 3 0xfffe10203264 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_5 3 0xfffe10203265 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_6 3 0xfffe10203266 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_DPA_SUBSTATE_PWR_ALLOC_7 3 0xfffe10203267 1 0 4294967295 SUBSTATE_PWR_ALLOC 0 7 cfgBIF_CFG_DEV0_EPF3_1_PCIE_ACS_ENH_CAP_LIST 3 0xfffe102032a0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_ACS_CAP 3 0xfffe102032a4 8 0 4294967295 SOURCE_VALIDATION 0 0 TRANSLATION_BLOCKING 1 1 P2P_REQUEST_REDIRECT 2 2 P2P_COMPLETION_REDIRECT 3 3 UPSTREAM_FORWARDING 4 4 P2P_EGRESS_CONTROL 5 5 DIRECT_TRANSLATED_P2P 6 6 EGRESS_CONTROL_VECTOR_SIZE 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_ACS_CNTL 3 0xfffe102032a6 7 0 4294967295 SOURCE_VALIDATION_EN 0 0 TRANSLATION_BLOCKING_EN 1 1 P2P_REQUEST_REDIRECT_EN 2 2 P2P_COMPLETION_REDIRECT_EN 3 3 UPSTREAM_FORWARDING_EN 4 4 P2P_EGRESS_CONTROL_EN 5 5 DIRECT_TRANSLATED_P2P_EN 6 6 cfgBIF_CFG_DEV0_EPF3_1_PCIE_PASID_ENH_CAP_LIST 3 0xfffe102032d0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_PASID_CAP 3 0xfffe102032d4 3 0 4294967295 PASID_EXE_PERMISSION_SUPPORTED 1 1 PASID_PRIV_MODE_SUPPORTED 2 2 MAX_PASID_WIDTH 8 12 cfgBIF_CFG_DEV0_EPF3_1_PCIE_PASID_CNTL 3 0xfffe102032d6 3 0 4294967295 PASID_ENABLE 0 0 PASID_EXE_PERMISSION_ENABLE 1 1 PASID_PRIV_MODE_SUPPORTED_ENABLE 2 2 cfgBIF_CFG_DEV0_EPF3_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10203328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_ARI_CAP 3 0xfffe1020332c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_ARI_CNTL 3 0xfffe1020332e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_REQR_ENH_CAP_LIST 3 0xfffe10203370 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_REQR_CAP 3 0xfffe10203374 6 0 4294967295 TPH_REQR_NO_ST_MODE_SUPPORTED 0 0 TPH_REQR_INT_VEC_MODE_SUPPORTED 1 1 TPH_REQR_DEV_SPC_MODE_SUPPORTED 2 2 TPH_REQR_EXTND_TPH_REQR_SUPPORED 8 8 TPH_REQR_ST_TABLE_LOCATION 9 10 TPH_REQR_ST_TABLE_SIZE 16 26 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_REQR_CNTL 3 0xfffe10203378 2 0 4294967295 TPH_REQR_ST_MODE_SEL 0 2 TPH_REQR_EN 8 9 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_0 3 0xfffe1020337c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_1 3 0xfffe1020337e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_2 3 0xfffe10203380 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_3 3 0xfffe10203382 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_4 3 0xfffe10203384 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_5 3 0xfffe10203386 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_6 3 0xfffe10203388 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_7 3 0xfffe1020338a 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_8 3 0xfffe1020338c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_9 3 0xfffe1020338e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_10 3 0xfffe10203390 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_11 3 0xfffe10203392 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_12 3 0xfffe10203394 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_13 3 0xfffe10203396 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_14 3 0xfffe10203398 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_15 3 0xfffe1020339a 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_16 3 0xfffe1020339c 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_17 3 0xfffe1020339e 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_18 3 0xfffe102033a0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_19 3 0xfffe102033a2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_20 3 0xfffe102033a4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_21 3 0xfffe102033a6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_22 3 0xfffe102033a8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_23 3 0xfffe102033aa 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_24 3 0xfffe102033ac 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_25 3 0xfffe102033ae 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_26 3 0xfffe102033b0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_27 3 0xfffe102033b2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_28 3 0xfffe102033b4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_29 3 0xfffe102033b6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_30 3 0xfffe102033b8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_31 3 0xfffe102033ba 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_32 3 0xfffe102033bc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_33 3 0xfffe102033be 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_34 3 0xfffe102033c0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_35 3 0xfffe102033c2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_36 3 0xfffe102033c4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_37 3 0xfffe102033c6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_38 3 0xfffe102033c8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_39 3 0xfffe102033ca 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_40 3 0xfffe102033cc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_41 3 0xfffe102033ce 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_42 3 0xfffe102033d0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_43 3 0xfffe102033d2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_44 3 0xfffe102033d4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_45 3 0xfffe102033d6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_46 3 0xfffe102033d8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_47 3 0xfffe102033da 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_48 3 0xfffe102033dc 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_49 3 0xfffe102033de 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_50 3 0xfffe102033e0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_51 3 0xfffe102033e2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_52 3 0xfffe102033e4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_53 3 0xfffe102033e6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_54 3 0xfffe102033e8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_55 3 0xfffe102033ea 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_56 3 0xfffe102033ec 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_57 3 0xfffe102033ee 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_58 3 0xfffe102033f0 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_59 3 0xfffe102033f2 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_60 3 0xfffe102033f4 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_61 3 0xfffe102033f6 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_62 3 0xfffe102033f8 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF3_1_PCIE_TPH_ST_TABLE_63 3 0xfffe102033fa 2 0 4294967295 TPH_ST_LOWER_ENTRY 0 7 TPH_ST_UPPER_ENTRY 8 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_VENDOR_ID 3 0xfffe10300000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_DEVICE_ID 3 0xfffe10300002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_COMMAND 3 0xfffe10300004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF0_1_STATUS 3 0xfffe10300006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_REVISION_ID 3 0xfffe10300008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_PROG_INTERFACE 3 0xfffe10300009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_SUB_CLASS 3 0xfffe1030000a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_BASE_CLASS 3 0xfffe1030000b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_CACHE_LINE 3 0xfffe1030000c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_LATENCY 3 0xfffe1030000d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_HEADER 3 0xfffe1030000e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_BIST 3 0xfffe1030000f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_BASE_ADDR_1 3 0xfffe10300010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_BASE_ADDR_2 3 0xfffe10300014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_BASE_ADDR_3 3 0xfffe10300018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_BASE_ADDR_4 3 0xfffe1030001c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_BASE_ADDR_5 3 0xfffe10300020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_BASE_ADDR_6 3 0xfffe10300024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_CARDBUS_CIS_PTR 3 0xfffe10300028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_ADAPTER_ID 3 0xfffe1030002c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_ROM_BASE_ADDR 3 0xfffe10300030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_CAP_PTR 3 0xfffe10300034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_INTERRUPT_LINE 3 0xfffe1030003c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_INTERRUPT_PIN 3 0xfffe1030003d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_MIN_GRANT 3 0xfffe1030003e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_MAX_LATENCY 3 0xfffe1030003f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_CAP_LIST 3 0xfffe10300064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_CAP 3 0xfffe10300066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF0_1_DEVICE_CAP 3 0xfffe10300068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF0_1_DEVICE_CNTL 3 0xfffe1030006c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_DEVICE_STATUS 3 0xfffe1030006e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF0_1_LINK_CAP 3 0xfffe10300070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_LINK_CNTL 3 0xfffe10300074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_LINK_STATUS 3 0xfffe10300076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_DEVICE_CAP2 3 0xfffe10300088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_DEVICE_CNTL2 3 0xfffe1030008c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_DEVICE_STATUS2 3 0xfffe1030008e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_LINK_CAP2 3 0xfffe10300090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_LINK_CNTL2 3 0xfffe10300094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_LINK_STATUS2 3 0xfffe10300096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSI_CAP_LIST 3 0xfffe103000a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSI_MSG_CNTL 3 0xfffe103000a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSI_MSG_ADDR_LO 3 0xfffe103000a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSI_MSG_ADDR_HI 3 0xfffe103000a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSI_MSG_DATA 3 0xfffe103000a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSI_MASK 3 0xfffe103000ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSI_MSG_DATA_64 3 0xfffe103000ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSI_MASK_64 3 0xfffe103000b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSI_PENDING 3 0xfffe103000b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSI_PENDING_64 3 0xfffe103000b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSIX_CAP_LIST 3 0xfffe103000c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSIX_MSG_CNTL 3 0xfffe103000c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSIX_TABLE 3 0xfffe103000c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_MSIX_PBA 3 0xfffe103000c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10300100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10300104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10300108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030010c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10300150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10300154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10300158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030015c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_CORR_ERR_STATUS 3 0xfffe10300160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_CORR_ERR_MASK 3 0xfffe10300164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10300168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_HDR_LOG0 3 0xfffe1030016c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_HDR_LOG1 3 0xfffe10300170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_HDR_LOG2 3 0xfffe10300174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_HDR_LOG3 3 0xfffe10300178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10300188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030018c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10300190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10300194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103002b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_ATS_CAP 3 0xfffe103002b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_ATS_CNTL 3 0xfffe103002b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10300328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_ARI_CAP 3 0xfffe1030032c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF0_1_PCIE_ARI_CNTL 3 0xfffe1030032e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF1_1_VENDOR_ID 3 0xfffe10301000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_DEVICE_ID 3 0xfffe10301002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_COMMAND 3 0xfffe10301004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF1_1_STATUS 3 0xfffe10301006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_REVISION_ID 3 0xfffe10301008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_PROG_INTERFACE 3 0xfffe10301009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_SUB_CLASS 3 0xfffe1030100a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_BASE_CLASS 3 0xfffe1030100b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_CACHE_LINE 3 0xfffe1030100c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_LATENCY 3 0xfffe1030100d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_HEADER 3 0xfffe1030100e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_BIST 3 0xfffe1030100f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_BASE_ADDR_1 3 0xfffe10301010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_BASE_ADDR_2 3 0xfffe10301014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_BASE_ADDR_3 3 0xfffe10301018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_BASE_ADDR_4 3 0xfffe1030101c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_BASE_ADDR_5 3 0xfffe10301020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_BASE_ADDR_6 3 0xfffe10301024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_CARDBUS_CIS_PTR 3 0xfffe10301028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_ADAPTER_ID 3 0xfffe1030102c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_ROM_BASE_ADDR 3 0xfffe10301030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_CAP_PTR 3 0xfffe10301034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_INTERRUPT_LINE 3 0xfffe1030103c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_INTERRUPT_PIN 3 0xfffe1030103d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_MIN_GRANT 3 0xfffe1030103e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_MAX_LATENCY 3 0xfffe1030103f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_CAP_LIST 3 0xfffe10301064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_CAP 3 0xfffe10301066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF1_1_DEVICE_CAP 3 0xfffe10301068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF1_1_DEVICE_CNTL 3 0xfffe1030106c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_DEVICE_STATUS 3 0xfffe1030106e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF1_1_LINK_CAP 3 0xfffe10301070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_LINK_CNTL 3 0xfffe10301074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_LINK_STATUS 3 0xfffe10301076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_DEVICE_CAP2 3 0xfffe10301088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_DEVICE_CNTL2 3 0xfffe1030108c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_DEVICE_STATUS2 3 0xfffe1030108e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_LINK_CAP2 3 0xfffe10301090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_LINK_CNTL2 3 0xfffe10301094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_LINK_STATUS2 3 0xfffe10301096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSI_CAP_LIST 3 0xfffe103010a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSI_MSG_CNTL 3 0xfffe103010a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSI_MSG_ADDR_LO 3 0xfffe103010a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSI_MSG_ADDR_HI 3 0xfffe103010a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSI_MSG_DATA 3 0xfffe103010a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSI_MASK 3 0xfffe103010ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSI_MSG_DATA_64 3 0xfffe103010ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSI_MASK_64 3 0xfffe103010b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSI_PENDING 3 0xfffe103010b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSI_PENDING_64 3 0xfffe103010b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSIX_CAP_LIST 3 0xfffe103010c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSIX_MSG_CNTL 3 0xfffe103010c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSIX_TABLE 3 0xfffe103010c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_MSIX_PBA 3 0xfffe103010c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10301100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10301104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10301108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030110c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10301150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10301154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10301158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030115c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_CORR_ERR_STATUS 3 0xfffe10301160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_CORR_ERR_MASK 3 0xfffe10301164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10301168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_HDR_LOG0 3 0xfffe1030116c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_HDR_LOG1 3 0xfffe10301170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_HDR_LOG2 3 0xfffe10301174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_HDR_LOG3 3 0xfffe10301178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10301188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030118c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10301190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10301194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103012b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_ATS_CAP 3 0xfffe103012b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_ATS_CNTL 3 0xfffe103012b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10301328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_ARI_CAP 3 0xfffe1030132c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF1_1_PCIE_ARI_CNTL 3 0xfffe1030132e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF2_1_VENDOR_ID 3 0xfffe10302000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_DEVICE_ID 3 0xfffe10302002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_COMMAND 3 0xfffe10302004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF2_1_STATUS 3 0xfffe10302006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_REVISION_ID 3 0xfffe10302008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_PROG_INTERFACE 3 0xfffe10302009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_SUB_CLASS 3 0xfffe1030200a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_BASE_CLASS 3 0xfffe1030200b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_CACHE_LINE 3 0xfffe1030200c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_LATENCY 3 0xfffe1030200d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_HEADER 3 0xfffe1030200e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_BIST 3 0xfffe1030200f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_BASE_ADDR_1 3 0xfffe10302010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_BASE_ADDR_2 3 0xfffe10302014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_BASE_ADDR_3 3 0xfffe10302018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_BASE_ADDR_4 3 0xfffe1030201c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_BASE_ADDR_5 3 0xfffe10302020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_BASE_ADDR_6 3 0xfffe10302024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_CARDBUS_CIS_PTR 3 0xfffe10302028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_ADAPTER_ID 3 0xfffe1030202c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_ROM_BASE_ADDR 3 0xfffe10302030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_CAP_PTR 3 0xfffe10302034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_INTERRUPT_LINE 3 0xfffe1030203c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_INTERRUPT_PIN 3 0xfffe1030203d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_MIN_GRANT 3 0xfffe1030203e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_MAX_LATENCY 3 0xfffe1030203f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_CAP_LIST 3 0xfffe10302064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_CAP 3 0xfffe10302066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF2_1_DEVICE_CAP 3 0xfffe10302068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF2_1_DEVICE_CNTL 3 0xfffe1030206c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_DEVICE_STATUS 3 0xfffe1030206e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF2_1_LINK_CAP 3 0xfffe10302070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_LINK_CNTL 3 0xfffe10302074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_LINK_STATUS 3 0xfffe10302076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_DEVICE_CAP2 3 0xfffe10302088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_DEVICE_CNTL2 3 0xfffe1030208c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_DEVICE_STATUS2 3 0xfffe1030208e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_LINK_CAP2 3 0xfffe10302090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_LINK_CNTL2 3 0xfffe10302094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_LINK_STATUS2 3 0xfffe10302096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSI_CAP_LIST 3 0xfffe103020a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSI_MSG_CNTL 3 0xfffe103020a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSI_MSG_ADDR_LO 3 0xfffe103020a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSI_MSG_ADDR_HI 3 0xfffe103020a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSI_MSG_DATA 3 0xfffe103020a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSI_MASK 3 0xfffe103020ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSI_MSG_DATA_64 3 0xfffe103020ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSI_MASK_64 3 0xfffe103020b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSI_PENDING 3 0xfffe103020b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSI_PENDING_64 3 0xfffe103020b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSIX_CAP_LIST 3 0xfffe103020c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSIX_MSG_CNTL 3 0xfffe103020c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSIX_TABLE 3 0xfffe103020c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_MSIX_PBA 3 0xfffe103020c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10302100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10302104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10302108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030210c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10302150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10302154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10302158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030215c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_CORR_ERR_STATUS 3 0xfffe10302160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_CORR_ERR_MASK 3 0xfffe10302164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10302168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_HDR_LOG0 3 0xfffe1030216c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_HDR_LOG1 3 0xfffe10302170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_HDR_LOG2 3 0xfffe10302174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_HDR_LOG3 3 0xfffe10302178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10302188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030218c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10302190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10302194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103022b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_ATS_CAP 3 0xfffe103022b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_ATS_CNTL 3 0xfffe103022b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10302328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_ARI_CAP 3 0xfffe1030232c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF2_1_PCIE_ARI_CNTL 3 0xfffe1030232e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF3_1_VENDOR_ID 3 0xfffe10303000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_DEVICE_ID 3 0xfffe10303002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_COMMAND 3 0xfffe10303004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF3_1_STATUS 3 0xfffe10303006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_REVISION_ID 3 0xfffe10303008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_PROG_INTERFACE 3 0xfffe10303009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_SUB_CLASS 3 0xfffe1030300a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_BASE_CLASS 3 0xfffe1030300b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_CACHE_LINE 3 0xfffe1030300c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_LATENCY 3 0xfffe1030300d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_HEADER 3 0xfffe1030300e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_BIST 3 0xfffe1030300f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_BASE_ADDR_1 3 0xfffe10303010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_BASE_ADDR_2 3 0xfffe10303014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_BASE_ADDR_3 3 0xfffe10303018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_BASE_ADDR_4 3 0xfffe1030301c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_BASE_ADDR_5 3 0xfffe10303020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_BASE_ADDR_6 3 0xfffe10303024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_CARDBUS_CIS_PTR 3 0xfffe10303028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_ADAPTER_ID 3 0xfffe1030302c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_ROM_BASE_ADDR 3 0xfffe10303030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_CAP_PTR 3 0xfffe10303034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_INTERRUPT_LINE 3 0xfffe1030303c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_INTERRUPT_PIN 3 0xfffe1030303d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_MIN_GRANT 3 0xfffe1030303e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_MAX_LATENCY 3 0xfffe1030303f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_CAP_LIST 3 0xfffe10303064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_CAP 3 0xfffe10303066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF3_1_DEVICE_CAP 3 0xfffe10303068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF3_1_DEVICE_CNTL 3 0xfffe1030306c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_DEVICE_STATUS 3 0xfffe1030306e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF3_1_LINK_CAP 3 0xfffe10303070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_LINK_CNTL 3 0xfffe10303074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_LINK_STATUS 3 0xfffe10303076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_DEVICE_CAP2 3 0xfffe10303088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_DEVICE_CNTL2 3 0xfffe1030308c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_DEVICE_STATUS2 3 0xfffe1030308e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_LINK_CAP2 3 0xfffe10303090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_LINK_CNTL2 3 0xfffe10303094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_LINK_STATUS2 3 0xfffe10303096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSI_CAP_LIST 3 0xfffe103030a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSI_MSG_CNTL 3 0xfffe103030a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSI_MSG_ADDR_LO 3 0xfffe103030a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSI_MSG_ADDR_HI 3 0xfffe103030a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSI_MSG_DATA 3 0xfffe103030a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSI_MASK 3 0xfffe103030ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSI_MSG_DATA_64 3 0xfffe103030ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSI_MASK_64 3 0xfffe103030b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSI_PENDING 3 0xfffe103030b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSI_PENDING_64 3 0xfffe103030b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSIX_CAP_LIST 3 0xfffe103030c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSIX_MSG_CNTL 3 0xfffe103030c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSIX_TABLE 3 0xfffe103030c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_MSIX_PBA 3 0xfffe103030c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10303100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10303104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10303108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030310c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10303150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10303154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10303158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030315c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_CORR_ERR_STATUS 3 0xfffe10303160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_CORR_ERR_MASK 3 0xfffe10303164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10303168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_HDR_LOG0 3 0xfffe1030316c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_HDR_LOG1 3 0xfffe10303170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_HDR_LOG2 3 0xfffe10303174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_HDR_LOG3 3 0xfffe10303178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10303188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030318c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10303190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10303194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103032b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_ATS_CAP 3 0xfffe103032b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_ATS_CNTL 3 0xfffe103032b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10303328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_ARI_CAP 3 0xfffe1030332c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF3_1_PCIE_ARI_CNTL 3 0xfffe1030332e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF4_1_VENDOR_ID 3 0xfffe10304000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_DEVICE_ID 3 0xfffe10304002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_COMMAND 3 0xfffe10304004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF4_1_STATUS 3 0xfffe10304006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_REVISION_ID 3 0xfffe10304008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_PROG_INTERFACE 3 0xfffe10304009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_SUB_CLASS 3 0xfffe1030400a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_BASE_CLASS 3 0xfffe1030400b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_CACHE_LINE 3 0xfffe1030400c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_LATENCY 3 0xfffe1030400d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_HEADER 3 0xfffe1030400e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_BIST 3 0xfffe1030400f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_BASE_ADDR_1 3 0xfffe10304010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_BASE_ADDR_2 3 0xfffe10304014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_BASE_ADDR_3 3 0xfffe10304018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_BASE_ADDR_4 3 0xfffe1030401c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_BASE_ADDR_5 3 0xfffe10304020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_BASE_ADDR_6 3 0xfffe10304024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_CARDBUS_CIS_PTR 3 0xfffe10304028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_ADAPTER_ID 3 0xfffe1030402c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_ROM_BASE_ADDR 3 0xfffe10304030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_CAP_PTR 3 0xfffe10304034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_INTERRUPT_LINE 3 0xfffe1030403c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_INTERRUPT_PIN 3 0xfffe1030403d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_MIN_GRANT 3 0xfffe1030403e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_MAX_LATENCY 3 0xfffe1030403f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_CAP_LIST 3 0xfffe10304064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_CAP 3 0xfffe10304066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF4_1_DEVICE_CAP 3 0xfffe10304068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF4_1_DEVICE_CNTL 3 0xfffe1030406c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_DEVICE_STATUS 3 0xfffe1030406e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF4_1_LINK_CAP 3 0xfffe10304070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_LINK_CNTL 3 0xfffe10304074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_LINK_STATUS 3 0xfffe10304076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_DEVICE_CAP2 3 0xfffe10304088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_DEVICE_CNTL2 3 0xfffe1030408c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_DEVICE_STATUS2 3 0xfffe1030408e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_LINK_CAP2 3 0xfffe10304090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_LINK_CNTL2 3 0xfffe10304094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_LINK_STATUS2 3 0xfffe10304096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSI_CAP_LIST 3 0xfffe103040a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSI_MSG_CNTL 3 0xfffe103040a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSI_MSG_ADDR_LO 3 0xfffe103040a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSI_MSG_ADDR_HI 3 0xfffe103040a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSI_MSG_DATA 3 0xfffe103040a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSI_MASK 3 0xfffe103040ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSI_MSG_DATA_64 3 0xfffe103040ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSI_MASK_64 3 0xfffe103040b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSI_PENDING 3 0xfffe103040b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSI_PENDING_64 3 0xfffe103040b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSIX_CAP_LIST 3 0xfffe103040c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSIX_MSG_CNTL 3 0xfffe103040c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSIX_TABLE 3 0xfffe103040c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_MSIX_PBA 3 0xfffe103040c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10304100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10304104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10304108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030410c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10304150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10304154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10304158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030415c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_CORR_ERR_STATUS 3 0xfffe10304160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_CORR_ERR_MASK 3 0xfffe10304164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10304168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_HDR_LOG0 3 0xfffe1030416c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_HDR_LOG1 3 0xfffe10304170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_HDR_LOG2 3 0xfffe10304174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_HDR_LOG3 3 0xfffe10304178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10304188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030418c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10304190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10304194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103042b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_ATS_CAP 3 0xfffe103042b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_ATS_CNTL 3 0xfffe103042b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10304328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_ARI_CAP 3 0xfffe1030432c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF4_1_PCIE_ARI_CNTL 3 0xfffe1030432e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF5_1_VENDOR_ID 3 0xfffe10305000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_DEVICE_ID 3 0xfffe10305002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_COMMAND 3 0xfffe10305004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF5_1_STATUS 3 0xfffe10305006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_REVISION_ID 3 0xfffe10305008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_PROG_INTERFACE 3 0xfffe10305009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_SUB_CLASS 3 0xfffe1030500a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_BASE_CLASS 3 0xfffe1030500b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_CACHE_LINE 3 0xfffe1030500c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_LATENCY 3 0xfffe1030500d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_HEADER 3 0xfffe1030500e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_BIST 3 0xfffe1030500f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_BASE_ADDR_1 3 0xfffe10305010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_BASE_ADDR_2 3 0xfffe10305014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_BASE_ADDR_3 3 0xfffe10305018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_BASE_ADDR_4 3 0xfffe1030501c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_BASE_ADDR_5 3 0xfffe10305020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_BASE_ADDR_6 3 0xfffe10305024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_CARDBUS_CIS_PTR 3 0xfffe10305028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_ADAPTER_ID 3 0xfffe1030502c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_ROM_BASE_ADDR 3 0xfffe10305030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_CAP_PTR 3 0xfffe10305034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_INTERRUPT_LINE 3 0xfffe1030503c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_INTERRUPT_PIN 3 0xfffe1030503d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_MIN_GRANT 3 0xfffe1030503e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_MAX_LATENCY 3 0xfffe1030503f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_CAP_LIST 3 0xfffe10305064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_CAP 3 0xfffe10305066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF5_1_DEVICE_CAP 3 0xfffe10305068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF5_1_DEVICE_CNTL 3 0xfffe1030506c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_DEVICE_STATUS 3 0xfffe1030506e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF5_1_LINK_CAP 3 0xfffe10305070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_LINK_CNTL 3 0xfffe10305074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_LINK_STATUS 3 0xfffe10305076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_DEVICE_CAP2 3 0xfffe10305088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_DEVICE_CNTL2 3 0xfffe1030508c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_DEVICE_STATUS2 3 0xfffe1030508e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_LINK_CAP2 3 0xfffe10305090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_LINK_CNTL2 3 0xfffe10305094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_LINK_STATUS2 3 0xfffe10305096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSI_CAP_LIST 3 0xfffe103050a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSI_MSG_CNTL 3 0xfffe103050a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSI_MSG_ADDR_LO 3 0xfffe103050a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSI_MSG_ADDR_HI 3 0xfffe103050a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSI_MSG_DATA 3 0xfffe103050a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSI_MASK 3 0xfffe103050ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSI_MSG_DATA_64 3 0xfffe103050ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSI_MASK_64 3 0xfffe103050b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSI_PENDING 3 0xfffe103050b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSI_PENDING_64 3 0xfffe103050b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSIX_CAP_LIST 3 0xfffe103050c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSIX_MSG_CNTL 3 0xfffe103050c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSIX_TABLE 3 0xfffe103050c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_MSIX_PBA 3 0xfffe103050c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10305100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10305104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10305108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030510c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10305150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10305154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10305158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030515c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_CORR_ERR_STATUS 3 0xfffe10305160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_CORR_ERR_MASK 3 0xfffe10305164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10305168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_HDR_LOG0 3 0xfffe1030516c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_HDR_LOG1 3 0xfffe10305170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_HDR_LOG2 3 0xfffe10305174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_HDR_LOG3 3 0xfffe10305178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10305188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030518c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10305190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10305194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103052b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_ATS_CAP 3 0xfffe103052b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_ATS_CNTL 3 0xfffe103052b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10305328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_ARI_CAP 3 0xfffe1030532c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF5_1_PCIE_ARI_CNTL 3 0xfffe1030532e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF6_1_VENDOR_ID 3 0xfffe10306000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_DEVICE_ID 3 0xfffe10306002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_COMMAND 3 0xfffe10306004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF6_1_STATUS 3 0xfffe10306006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_REVISION_ID 3 0xfffe10306008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_PROG_INTERFACE 3 0xfffe10306009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_SUB_CLASS 3 0xfffe1030600a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_BASE_CLASS 3 0xfffe1030600b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_CACHE_LINE 3 0xfffe1030600c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_LATENCY 3 0xfffe1030600d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_HEADER 3 0xfffe1030600e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_BIST 3 0xfffe1030600f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_BASE_ADDR_1 3 0xfffe10306010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_BASE_ADDR_2 3 0xfffe10306014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_BASE_ADDR_3 3 0xfffe10306018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_BASE_ADDR_4 3 0xfffe1030601c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_BASE_ADDR_5 3 0xfffe10306020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_BASE_ADDR_6 3 0xfffe10306024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_CARDBUS_CIS_PTR 3 0xfffe10306028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_ADAPTER_ID 3 0xfffe1030602c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_ROM_BASE_ADDR 3 0xfffe10306030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_CAP_PTR 3 0xfffe10306034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_INTERRUPT_LINE 3 0xfffe1030603c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_INTERRUPT_PIN 3 0xfffe1030603d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_MIN_GRANT 3 0xfffe1030603e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_MAX_LATENCY 3 0xfffe1030603f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_CAP_LIST 3 0xfffe10306064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_CAP 3 0xfffe10306066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF6_1_DEVICE_CAP 3 0xfffe10306068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF6_1_DEVICE_CNTL 3 0xfffe1030606c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_DEVICE_STATUS 3 0xfffe1030606e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF6_1_LINK_CAP 3 0xfffe10306070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_LINK_CNTL 3 0xfffe10306074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_LINK_STATUS 3 0xfffe10306076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_DEVICE_CAP2 3 0xfffe10306088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_DEVICE_CNTL2 3 0xfffe1030608c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_DEVICE_STATUS2 3 0xfffe1030608e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_LINK_CAP2 3 0xfffe10306090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_LINK_CNTL2 3 0xfffe10306094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_LINK_STATUS2 3 0xfffe10306096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSI_CAP_LIST 3 0xfffe103060a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSI_MSG_CNTL 3 0xfffe103060a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSI_MSG_ADDR_LO 3 0xfffe103060a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSI_MSG_ADDR_HI 3 0xfffe103060a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSI_MSG_DATA 3 0xfffe103060a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSI_MASK 3 0xfffe103060ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSI_MSG_DATA_64 3 0xfffe103060ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSI_MASK_64 3 0xfffe103060b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSI_PENDING 3 0xfffe103060b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSI_PENDING_64 3 0xfffe103060b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSIX_CAP_LIST 3 0xfffe103060c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSIX_MSG_CNTL 3 0xfffe103060c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSIX_TABLE 3 0xfffe103060c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_MSIX_PBA 3 0xfffe103060c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10306100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10306104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10306108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030610c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10306150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10306154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10306158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030615c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_CORR_ERR_STATUS 3 0xfffe10306160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_CORR_ERR_MASK 3 0xfffe10306164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10306168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_HDR_LOG0 3 0xfffe1030616c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_HDR_LOG1 3 0xfffe10306170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_HDR_LOG2 3 0xfffe10306174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_HDR_LOG3 3 0xfffe10306178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10306188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030618c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10306190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10306194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103062b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_ATS_CAP 3 0xfffe103062b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_ATS_CNTL 3 0xfffe103062b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10306328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_ARI_CAP 3 0xfffe1030632c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF6_1_PCIE_ARI_CNTL 3 0xfffe1030632e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF7_1_VENDOR_ID 3 0xfffe10307000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_DEVICE_ID 3 0xfffe10307002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_COMMAND 3 0xfffe10307004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF7_1_STATUS 3 0xfffe10307006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_REVISION_ID 3 0xfffe10307008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_PROG_INTERFACE 3 0xfffe10307009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_SUB_CLASS 3 0xfffe1030700a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_BASE_CLASS 3 0xfffe1030700b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_CACHE_LINE 3 0xfffe1030700c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_LATENCY 3 0xfffe1030700d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_HEADER 3 0xfffe1030700e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_BIST 3 0xfffe1030700f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_BASE_ADDR_1 3 0xfffe10307010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_BASE_ADDR_2 3 0xfffe10307014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_BASE_ADDR_3 3 0xfffe10307018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_BASE_ADDR_4 3 0xfffe1030701c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_BASE_ADDR_5 3 0xfffe10307020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_BASE_ADDR_6 3 0xfffe10307024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_CARDBUS_CIS_PTR 3 0xfffe10307028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_ADAPTER_ID 3 0xfffe1030702c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_ROM_BASE_ADDR 3 0xfffe10307030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_CAP_PTR 3 0xfffe10307034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_INTERRUPT_LINE 3 0xfffe1030703c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_INTERRUPT_PIN 3 0xfffe1030703d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_MIN_GRANT 3 0xfffe1030703e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_MAX_LATENCY 3 0xfffe1030703f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_CAP_LIST 3 0xfffe10307064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_CAP 3 0xfffe10307066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF7_1_DEVICE_CAP 3 0xfffe10307068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF7_1_DEVICE_CNTL 3 0xfffe1030706c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_DEVICE_STATUS 3 0xfffe1030706e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF7_1_LINK_CAP 3 0xfffe10307070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_LINK_CNTL 3 0xfffe10307074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_LINK_STATUS 3 0xfffe10307076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_DEVICE_CAP2 3 0xfffe10307088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_DEVICE_CNTL2 3 0xfffe1030708c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_DEVICE_STATUS2 3 0xfffe1030708e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_LINK_CAP2 3 0xfffe10307090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_LINK_CNTL2 3 0xfffe10307094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_LINK_STATUS2 3 0xfffe10307096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSI_CAP_LIST 3 0xfffe103070a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSI_MSG_CNTL 3 0xfffe103070a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSI_MSG_ADDR_LO 3 0xfffe103070a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSI_MSG_ADDR_HI 3 0xfffe103070a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSI_MSG_DATA 3 0xfffe103070a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSI_MASK 3 0xfffe103070ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSI_MSG_DATA_64 3 0xfffe103070ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSI_MASK_64 3 0xfffe103070b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSI_PENDING 3 0xfffe103070b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSI_PENDING_64 3 0xfffe103070b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSIX_CAP_LIST 3 0xfffe103070c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSIX_MSG_CNTL 3 0xfffe103070c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSIX_TABLE 3 0xfffe103070c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_MSIX_PBA 3 0xfffe103070c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10307100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10307104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10307108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030710c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10307150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10307154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10307158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030715c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_CORR_ERR_STATUS 3 0xfffe10307160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_CORR_ERR_MASK 3 0xfffe10307164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10307168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_HDR_LOG0 3 0xfffe1030716c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_HDR_LOG1 3 0xfffe10307170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_HDR_LOG2 3 0xfffe10307174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_HDR_LOG3 3 0xfffe10307178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10307188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030718c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10307190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10307194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103072b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_ATS_CAP 3 0xfffe103072b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_ATS_CNTL 3 0xfffe103072b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10307328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_ARI_CAP 3 0xfffe1030732c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF7_1_PCIE_ARI_CNTL 3 0xfffe1030732e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF8_1_VENDOR_ID 3 0xfffe10308000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_DEVICE_ID 3 0xfffe10308002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_COMMAND 3 0xfffe10308004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF8_1_STATUS 3 0xfffe10308006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_REVISION_ID 3 0xfffe10308008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_PROG_INTERFACE 3 0xfffe10308009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_SUB_CLASS 3 0xfffe1030800a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_BASE_CLASS 3 0xfffe1030800b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_CACHE_LINE 3 0xfffe1030800c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_LATENCY 3 0xfffe1030800d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_HEADER 3 0xfffe1030800e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_BIST 3 0xfffe1030800f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_BASE_ADDR_1 3 0xfffe10308010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_BASE_ADDR_2 3 0xfffe10308014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_BASE_ADDR_3 3 0xfffe10308018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_BASE_ADDR_4 3 0xfffe1030801c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_BASE_ADDR_5 3 0xfffe10308020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_BASE_ADDR_6 3 0xfffe10308024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_CARDBUS_CIS_PTR 3 0xfffe10308028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_ADAPTER_ID 3 0xfffe1030802c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_ROM_BASE_ADDR 3 0xfffe10308030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_CAP_PTR 3 0xfffe10308034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_INTERRUPT_LINE 3 0xfffe1030803c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_INTERRUPT_PIN 3 0xfffe1030803d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_MIN_GRANT 3 0xfffe1030803e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_MAX_LATENCY 3 0xfffe1030803f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_CAP_LIST 3 0xfffe10308064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_CAP 3 0xfffe10308066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF8_1_DEVICE_CAP 3 0xfffe10308068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF8_1_DEVICE_CNTL 3 0xfffe1030806c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_DEVICE_STATUS 3 0xfffe1030806e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF8_1_LINK_CAP 3 0xfffe10308070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_LINK_CNTL 3 0xfffe10308074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_LINK_STATUS 3 0xfffe10308076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_DEVICE_CAP2 3 0xfffe10308088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_DEVICE_CNTL2 3 0xfffe1030808c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_DEVICE_STATUS2 3 0xfffe1030808e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_LINK_CAP2 3 0xfffe10308090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_LINK_CNTL2 3 0xfffe10308094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_LINK_STATUS2 3 0xfffe10308096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSI_CAP_LIST 3 0xfffe103080a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSI_MSG_CNTL 3 0xfffe103080a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSI_MSG_ADDR_LO 3 0xfffe103080a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSI_MSG_ADDR_HI 3 0xfffe103080a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSI_MSG_DATA 3 0xfffe103080a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSI_MASK 3 0xfffe103080ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSI_MSG_DATA_64 3 0xfffe103080ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSI_MASK_64 3 0xfffe103080b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSI_PENDING 3 0xfffe103080b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSI_PENDING_64 3 0xfffe103080b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSIX_CAP_LIST 3 0xfffe103080c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSIX_MSG_CNTL 3 0xfffe103080c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSIX_TABLE 3 0xfffe103080c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_MSIX_PBA 3 0xfffe103080c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10308100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10308104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10308108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030810c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10308150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10308154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10308158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030815c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_CORR_ERR_STATUS 3 0xfffe10308160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_CORR_ERR_MASK 3 0xfffe10308164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10308168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_HDR_LOG0 3 0xfffe1030816c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_HDR_LOG1 3 0xfffe10308170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_HDR_LOG2 3 0xfffe10308174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_HDR_LOG3 3 0xfffe10308178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10308188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030818c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10308190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10308194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103082b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_ATS_CAP 3 0xfffe103082b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_ATS_CNTL 3 0xfffe103082b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10308328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_ARI_CAP 3 0xfffe1030832c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF8_1_PCIE_ARI_CNTL 3 0xfffe1030832e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF9_1_VENDOR_ID 3 0xfffe10309000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_DEVICE_ID 3 0xfffe10309002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_COMMAND 3 0xfffe10309004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF9_1_STATUS 3 0xfffe10309006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_REVISION_ID 3 0xfffe10309008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_PROG_INTERFACE 3 0xfffe10309009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_SUB_CLASS 3 0xfffe1030900a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_BASE_CLASS 3 0xfffe1030900b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_CACHE_LINE 3 0xfffe1030900c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_LATENCY 3 0xfffe1030900d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_HEADER 3 0xfffe1030900e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_BIST 3 0xfffe1030900f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_BASE_ADDR_1 3 0xfffe10309010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_BASE_ADDR_2 3 0xfffe10309014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_BASE_ADDR_3 3 0xfffe10309018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_BASE_ADDR_4 3 0xfffe1030901c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_BASE_ADDR_5 3 0xfffe10309020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_BASE_ADDR_6 3 0xfffe10309024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_CARDBUS_CIS_PTR 3 0xfffe10309028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_ADAPTER_ID 3 0xfffe1030902c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_ROM_BASE_ADDR 3 0xfffe10309030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_CAP_PTR 3 0xfffe10309034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_INTERRUPT_LINE 3 0xfffe1030903c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_INTERRUPT_PIN 3 0xfffe1030903d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_MIN_GRANT 3 0xfffe1030903e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_MAX_LATENCY 3 0xfffe1030903f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_CAP_LIST 3 0xfffe10309064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_CAP 3 0xfffe10309066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF9_1_DEVICE_CAP 3 0xfffe10309068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF9_1_DEVICE_CNTL 3 0xfffe1030906c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_DEVICE_STATUS 3 0xfffe1030906e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF9_1_LINK_CAP 3 0xfffe10309070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_LINK_CNTL 3 0xfffe10309074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_LINK_STATUS 3 0xfffe10309076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_DEVICE_CAP2 3 0xfffe10309088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_DEVICE_CNTL2 3 0xfffe1030908c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_DEVICE_STATUS2 3 0xfffe1030908e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_LINK_CAP2 3 0xfffe10309090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_LINK_CNTL2 3 0xfffe10309094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_LINK_STATUS2 3 0xfffe10309096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSI_CAP_LIST 3 0xfffe103090a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSI_MSG_CNTL 3 0xfffe103090a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSI_MSG_ADDR_LO 3 0xfffe103090a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSI_MSG_ADDR_HI 3 0xfffe103090a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSI_MSG_DATA 3 0xfffe103090a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSI_MASK 3 0xfffe103090ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSI_MSG_DATA_64 3 0xfffe103090ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSI_MASK_64 3 0xfffe103090b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSI_PENDING 3 0xfffe103090b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSI_PENDING_64 3 0xfffe103090b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSIX_CAP_LIST 3 0xfffe103090c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSIX_MSG_CNTL 3 0xfffe103090c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSIX_TABLE 3 0xfffe103090c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_MSIX_PBA 3 0xfffe103090c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10309100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10309104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10309108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030910c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10309150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10309154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10309158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030915c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_CORR_ERR_STATUS 3 0xfffe10309160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_CORR_ERR_MASK 3 0xfffe10309164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10309168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_HDR_LOG0 3 0xfffe1030916c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_HDR_LOG1 3 0xfffe10309170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_HDR_LOG2 3 0xfffe10309174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_HDR_LOG3 3 0xfffe10309178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10309188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030918c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10309190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10309194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103092b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_ATS_CAP 3 0xfffe103092b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_ATS_CNTL 3 0xfffe103092b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10309328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_ARI_CAP 3 0xfffe1030932c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF9_1_PCIE_ARI_CNTL 3 0xfffe1030932e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF10_1_VENDOR_ID 3 0xfffe1030a000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_DEVICE_ID 3 0xfffe1030a002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_COMMAND 3 0xfffe1030a004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF10_1_STATUS 3 0xfffe1030a006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_REVISION_ID 3 0xfffe1030a008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_PROG_INTERFACE 3 0xfffe1030a009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_SUB_CLASS 3 0xfffe1030a00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_BASE_CLASS 3 0xfffe1030a00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_CACHE_LINE 3 0xfffe1030a00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_LATENCY 3 0xfffe1030a00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_HEADER 3 0xfffe1030a00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_BIST 3 0xfffe1030a00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_BASE_ADDR_1 3 0xfffe1030a010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_BASE_ADDR_2 3 0xfffe1030a014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_BASE_ADDR_3 3 0xfffe1030a018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_BASE_ADDR_4 3 0xfffe1030a01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_BASE_ADDR_5 3 0xfffe1030a020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_BASE_ADDR_6 3 0xfffe1030a024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_CARDBUS_CIS_PTR 3 0xfffe1030a028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_ADAPTER_ID 3 0xfffe1030a02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_ROM_BASE_ADDR 3 0xfffe1030a030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_CAP_PTR 3 0xfffe1030a034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_INTERRUPT_LINE 3 0xfffe1030a03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_INTERRUPT_PIN 3 0xfffe1030a03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_MIN_GRANT 3 0xfffe1030a03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_MAX_LATENCY 3 0xfffe1030a03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_CAP_LIST 3 0xfffe1030a064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_CAP 3 0xfffe1030a066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF10_1_DEVICE_CAP 3 0xfffe1030a068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF10_1_DEVICE_CNTL 3 0xfffe1030a06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_DEVICE_STATUS 3 0xfffe1030a06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF10_1_LINK_CAP 3 0xfffe1030a070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_LINK_CNTL 3 0xfffe1030a074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_LINK_STATUS 3 0xfffe1030a076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_DEVICE_CAP2 3 0xfffe1030a088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_DEVICE_CNTL2 3 0xfffe1030a08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_DEVICE_STATUS2 3 0xfffe1030a08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_LINK_CAP2 3 0xfffe1030a090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_LINK_CNTL2 3 0xfffe1030a094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_LINK_STATUS2 3 0xfffe1030a096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSI_CAP_LIST 3 0xfffe1030a0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSI_MSG_CNTL 3 0xfffe1030a0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSI_MSG_ADDR_LO 3 0xfffe1030a0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSI_MSG_ADDR_HI 3 0xfffe1030a0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSI_MSG_DATA 3 0xfffe1030a0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSI_MASK 3 0xfffe1030a0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSI_MSG_DATA_64 3 0xfffe1030a0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSI_MASK_64 3 0xfffe1030a0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSI_PENDING 3 0xfffe1030a0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSI_PENDING_64 3 0xfffe1030a0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSIX_CAP_LIST 3 0xfffe1030a0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSIX_MSG_CNTL 3 0xfffe1030a0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSIX_TABLE 3 0xfffe1030a0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_MSIX_PBA 3 0xfffe1030a0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1030a100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1030a104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1030a108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030a10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1030a150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1030a154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1030a158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030a15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_CORR_ERR_STATUS 3 0xfffe1030a160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_CORR_ERR_MASK 3 0xfffe1030a164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1030a168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_HDR_LOG0 3 0xfffe1030a16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_HDR_LOG1 3 0xfffe1030a170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_HDR_LOG2 3 0xfffe1030a174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_HDR_LOG3 3 0xfffe1030a178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1030a188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030a18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1030a190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1030a194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1030a2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_ATS_CAP 3 0xfffe1030a2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_ATS_CNTL 3 0xfffe1030a2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1030a328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_ARI_CAP 3 0xfffe1030a32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF10_1_PCIE_ARI_CNTL 3 0xfffe1030a32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF11_1_VENDOR_ID 3 0xfffe1030b000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_DEVICE_ID 3 0xfffe1030b002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_COMMAND 3 0xfffe1030b004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF11_1_STATUS 3 0xfffe1030b006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_REVISION_ID 3 0xfffe1030b008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_PROG_INTERFACE 3 0xfffe1030b009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_SUB_CLASS 3 0xfffe1030b00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_BASE_CLASS 3 0xfffe1030b00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_CACHE_LINE 3 0xfffe1030b00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_LATENCY 3 0xfffe1030b00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_HEADER 3 0xfffe1030b00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_BIST 3 0xfffe1030b00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_BASE_ADDR_1 3 0xfffe1030b010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_BASE_ADDR_2 3 0xfffe1030b014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_BASE_ADDR_3 3 0xfffe1030b018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_BASE_ADDR_4 3 0xfffe1030b01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_BASE_ADDR_5 3 0xfffe1030b020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_BASE_ADDR_6 3 0xfffe1030b024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_CARDBUS_CIS_PTR 3 0xfffe1030b028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_ADAPTER_ID 3 0xfffe1030b02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_ROM_BASE_ADDR 3 0xfffe1030b030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_CAP_PTR 3 0xfffe1030b034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_INTERRUPT_LINE 3 0xfffe1030b03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_INTERRUPT_PIN 3 0xfffe1030b03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_MIN_GRANT 3 0xfffe1030b03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_MAX_LATENCY 3 0xfffe1030b03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_CAP_LIST 3 0xfffe1030b064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_CAP 3 0xfffe1030b066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF11_1_DEVICE_CAP 3 0xfffe1030b068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF11_1_DEVICE_CNTL 3 0xfffe1030b06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_DEVICE_STATUS 3 0xfffe1030b06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF11_1_LINK_CAP 3 0xfffe1030b070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_LINK_CNTL 3 0xfffe1030b074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_LINK_STATUS 3 0xfffe1030b076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_DEVICE_CAP2 3 0xfffe1030b088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_DEVICE_CNTL2 3 0xfffe1030b08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_DEVICE_STATUS2 3 0xfffe1030b08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_LINK_CAP2 3 0xfffe1030b090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_LINK_CNTL2 3 0xfffe1030b094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_LINK_STATUS2 3 0xfffe1030b096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSI_CAP_LIST 3 0xfffe1030b0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSI_MSG_CNTL 3 0xfffe1030b0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSI_MSG_ADDR_LO 3 0xfffe1030b0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSI_MSG_ADDR_HI 3 0xfffe1030b0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSI_MSG_DATA 3 0xfffe1030b0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSI_MASK 3 0xfffe1030b0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSI_MSG_DATA_64 3 0xfffe1030b0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSI_MASK_64 3 0xfffe1030b0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSI_PENDING 3 0xfffe1030b0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSI_PENDING_64 3 0xfffe1030b0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSIX_CAP_LIST 3 0xfffe1030b0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSIX_MSG_CNTL 3 0xfffe1030b0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSIX_TABLE 3 0xfffe1030b0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_MSIX_PBA 3 0xfffe1030b0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1030b100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1030b104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1030b108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030b10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1030b150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1030b154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1030b158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030b15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_CORR_ERR_STATUS 3 0xfffe1030b160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_CORR_ERR_MASK 3 0xfffe1030b164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1030b168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_HDR_LOG0 3 0xfffe1030b16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_HDR_LOG1 3 0xfffe1030b170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_HDR_LOG2 3 0xfffe1030b174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_HDR_LOG3 3 0xfffe1030b178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1030b188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030b18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1030b190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1030b194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1030b2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_ATS_CAP 3 0xfffe1030b2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_ATS_CNTL 3 0xfffe1030b2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1030b328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_ARI_CAP 3 0xfffe1030b32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF11_1_PCIE_ARI_CNTL 3 0xfffe1030b32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF12_1_VENDOR_ID 3 0xfffe1030c000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_DEVICE_ID 3 0xfffe1030c002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_COMMAND 3 0xfffe1030c004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF12_1_STATUS 3 0xfffe1030c006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_REVISION_ID 3 0xfffe1030c008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_PROG_INTERFACE 3 0xfffe1030c009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_SUB_CLASS 3 0xfffe1030c00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_BASE_CLASS 3 0xfffe1030c00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_CACHE_LINE 3 0xfffe1030c00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_LATENCY 3 0xfffe1030c00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_HEADER 3 0xfffe1030c00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_BIST 3 0xfffe1030c00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_BASE_ADDR_1 3 0xfffe1030c010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_BASE_ADDR_2 3 0xfffe1030c014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_BASE_ADDR_3 3 0xfffe1030c018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_BASE_ADDR_4 3 0xfffe1030c01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_BASE_ADDR_5 3 0xfffe1030c020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_BASE_ADDR_6 3 0xfffe1030c024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_CARDBUS_CIS_PTR 3 0xfffe1030c028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_ADAPTER_ID 3 0xfffe1030c02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_ROM_BASE_ADDR 3 0xfffe1030c030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_CAP_PTR 3 0xfffe1030c034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_INTERRUPT_LINE 3 0xfffe1030c03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_INTERRUPT_PIN 3 0xfffe1030c03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_MIN_GRANT 3 0xfffe1030c03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_MAX_LATENCY 3 0xfffe1030c03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_CAP_LIST 3 0xfffe1030c064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_CAP 3 0xfffe1030c066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF12_1_DEVICE_CAP 3 0xfffe1030c068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF12_1_DEVICE_CNTL 3 0xfffe1030c06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_DEVICE_STATUS 3 0xfffe1030c06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF12_1_LINK_CAP 3 0xfffe1030c070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_LINK_CNTL 3 0xfffe1030c074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_LINK_STATUS 3 0xfffe1030c076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_DEVICE_CAP2 3 0xfffe1030c088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_DEVICE_CNTL2 3 0xfffe1030c08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_DEVICE_STATUS2 3 0xfffe1030c08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_LINK_CAP2 3 0xfffe1030c090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_LINK_CNTL2 3 0xfffe1030c094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_LINK_STATUS2 3 0xfffe1030c096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSI_CAP_LIST 3 0xfffe1030c0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSI_MSG_CNTL 3 0xfffe1030c0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSI_MSG_ADDR_LO 3 0xfffe1030c0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSI_MSG_ADDR_HI 3 0xfffe1030c0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSI_MSG_DATA 3 0xfffe1030c0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSI_MASK 3 0xfffe1030c0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSI_MSG_DATA_64 3 0xfffe1030c0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSI_MASK_64 3 0xfffe1030c0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSI_PENDING 3 0xfffe1030c0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSI_PENDING_64 3 0xfffe1030c0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSIX_CAP_LIST 3 0xfffe1030c0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSIX_MSG_CNTL 3 0xfffe1030c0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSIX_TABLE 3 0xfffe1030c0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_MSIX_PBA 3 0xfffe1030c0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1030c100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1030c104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1030c108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030c10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1030c150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1030c154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1030c158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030c15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_CORR_ERR_STATUS 3 0xfffe1030c160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_CORR_ERR_MASK 3 0xfffe1030c164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1030c168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_HDR_LOG0 3 0xfffe1030c16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_HDR_LOG1 3 0xfffe1030c170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_HDR_LOG2 3 0xfffe1030c174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_HDR_LOG3 3 0xfffe1030c178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1030c188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030c18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1030c190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1030c194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1030c2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_ATS_CAP 3 0xfffe1030c2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_ATS_CNTL 3 0xfffe1030c2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1030c328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_ARI_CAP 3 0xfffe1030c32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF12_1_PCIE_ARI_CNTL 3 0xfffe1030c32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF13_1_VENDOR_ID 3 0xfffe1030d000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_DEVICE_ID 3 0xfffe1030d002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_COMMAND 3 0xfffe1030d004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF13_1_STATUS 3 0xfffe1030d006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_REVISION_ID 3 0xfffe1030d008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_PROG_INTERFACE 3 0xfffe1030d009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_SUB_CLASS 3 0xfffe1030d00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_BASE_CLASS 3 0xfffe1030d00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_CACHE_LINE 3 0xfffe1030d00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_LATENCY 3 0xfffe1030d00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_HEADER 3 0xfffe1030d00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_BIST 3 0xfffe1030d00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_BASE_ADDR_1 3 0xfffe1030d010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_BASE_ADDR_2 3 0xfffe1030d014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_BASE_ADDR_3 3 0xfffe1030d018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_BASE_ADDR_4 3 0xfffe1030d01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_BASE_ADDR_5 3 0xfffe1030d020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_BASE_ADDR_6 3 0xfffe1030d024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_CARDBUS_CIS_PTR 3 0xfffe1030d028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_ADAPTER_ID 3 0xfffe1030d02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_ROM_BASE_ADDR 3 0xfffe1030d030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_CAP_PTR 3 0xfffe1030d034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_INTERRUPT_LINE 3 0xfffe1030d03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_INTERRUPT_PIN 3 0xfffe1030d03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_MIN_GRANT 3 0xfffe1030d03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_MAX_LATENCY 3 0xfffe1030d03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_CAP_LIST 3 0xfffe1030d064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_CAP 3 0xfffe1030d066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF13_1_DEVICE_CAP 3 0xfffe1030d068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF13_1_DEVICE_CNTL 3 0xfffe1030d06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_DEVICE_STATUS 3 0xfffe1030d06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF13_1_LINK_CAP 3 0xfffe1030d070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_LINK_CNTL 3 0xfffe1030d074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_LINK_STATUS 3 0xfffe1030d076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_DEVICE_CAP2 3 0xfffe1030d088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_DEVICE_CNTL2 3 0xfffe1030d08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_DEVICE_STATUS2 3 0xfffe1030d08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_LINK_CAP2 3 0xfffe1030d090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_LINK_CNTL2 3 0xfffe1030d094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_LINK_STATUS2 3 0xfffe1030d096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSI_CAP_LIST 3 0xfffe1030d0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSI_MSG_CNTL 3 0xfffe1030d0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSI_MSG_ADDR_LO 3 0xfffe1030d0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSI_MSG_ADDR_HI 3 0xfffe1030d0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSI_MSG_DATA 3 0xfffe1030d0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSI_MASK 3 0xfffe1030d0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSI_MSG_DATA_64 3 0xfffe1030d0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSI_MASK_64 3 0xfffe1030d0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSI_PENDING 3 0xfffe1030d0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSI_PENDING_64 3 0xfffe1030d0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSIX_CAP_LIST 3 0xfffe1030d0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSIX_MSG_CNTL 3 0xfffe1030d0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSIX_TABLE 3 0xfffe1030d0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_MSIX_PBA 3 0xfffe1030d0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1030d100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1030d104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1030d108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030d10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1030d150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1030d154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1030d158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030d15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_CORR_ERR_STATUS 3 0xfffe1030d160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_CORR_ERR_MASK 3 0xfffe1030d164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1030d168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_HDR_LOG0 3 0xfffe1030d16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_HDR_LOG1 3 0xfffe1030d170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_HDR_LOG2 3 0xfffe1030d174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_HDR_LOG3 3 0xfffe1030d178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1030d188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030d18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1030d190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1030d194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1030d2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_ATS_CAP 3 0xfffe1030d2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_ATS_CNTL 3 0xfffe1030d2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1030d328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_ARI_CAP 3 0xfffe1030d32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF13_1_PCIE_ARI_CNTL 3 0xfffe1030d32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF14_1_VENDOR_ID 3 0xfffe1030e000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_DEVICE_ID 3 0xfffe1030e002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_COMMAND 3 0xfffe1030e004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF14_1_STATUS 3 0xfffe1030e006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_REVISION_ID 3 0xfffe1030e008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_PROG_INTERFACE 3 0xfffe1030e009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_SUB_CLASS 3 0xfffe1030e00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_BASE_CLASS 3 0xfffe1030e00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_CACHE_LINE 3 0xfffe1030e00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_LATENCY 3 0xfffe1030e00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_HEADER 3 0xfffe1030e00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_BIST 3 0xfffe1030e00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_BASE_ADDR_1 3 0xfffe1030e010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_BASE_ADDR_2 3 0xfffe1030e014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_BASE_ADDR_3 3 0xfffe1030e018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_BASE_ADDR_4 3 0xfffe1030e01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_BASE_ADDR_5 3 0xfffe1030e020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_BASE_ADDR_6 3 0xfffe1030e024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_CARDBUS_CIS_PTR 3 0xfffe1030e028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_ADAPTER_ID 3 0xfffe1030e02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_ROM_BASE_ADDR 3 0xfffe1030e030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_CAP_PTR 3 0xfffe1030e034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_INTERRUPT_LINE 3 0xfffe1030e03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_INTERRUPT_PIN 3 0xfffe1030e03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_MIN_GRANT 3 0xfffe1030e03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_MAX_LATENCY 3 0xfffe1030e03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_CAP_LIST 3 0xfffe1030e064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_CAP 3 0xfffe1030e066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF14_1_DEVICE_CAP 3 0xfffe1030e068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF14_1_DEVICE_CNTL 3 0xfffe1030e06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_DEVICE_STATUS 3 0xfffe1030e06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF14_1_LINK_CAP 3 0xfffe1030e070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_LINK_CNTL 3 0xfffe1030e074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_LINK_STATUS 3 0xfffe1030e076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_DEVICE_CAP2 3 0xfffe1030e088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_DEVICE_CNTL2 3 0xfffe1030e08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_DEVICE_STATUS2 3 0xfffe1030e08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_LINK_CAP2 3 0xfffe1030e090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_LINK_CNTL2 3 0xfffe1030e094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_LINK_STATUS2 3 0xfffe1030e096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSI_CAP_LIST 3 0xfffe1030e0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSI_MSG_CNTL 3 0xfffe1030e0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSI_MSG_ADDR_LO 3 0xfffe1030e0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSI_MSG_ADDR_HI 3 0xfffe1030e0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSI_MSG_DATA 3 0xfffe1030e0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSI_MASK 3 0xfffe1030e0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSI_MSG_DATA_64 3 0xfffe1030e0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSI_MASK_64 3 0xfffe1030e0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSI_PENDING 3 0xfffe1030e0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSI_PENDING_64 3 0xfffe1030e0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSIX_CAP_LIST 3 0xfffe1030e0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSIX_MSG_CNTL 3 0xfffe1030e0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSIX_TABLE 3 0xfffe1030e0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_MSIX_PBA 3 0xfffe1030e0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1030e100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1030e104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1030e108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030e10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1030e150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1030e154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1030e158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030e15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_CORR_ERR_STATUS 3 0xfffe1030e160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_CORR_ERR_MASK 3 0xfffe1030e164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1030e168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_HDR_LOG0 3 0xfffe1030e16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_HDR_LOG1 3 0xfffe1030e170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_HDR_LOG2 3 0xfffe1030e174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_HDR_LOG3 3 0xfffe1030e178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1030e188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030e18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1030e190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1030e194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1030e2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_ATS_CAP 3 0xfffe1030e2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_ATS_CNTL 3 0xfffe1030e2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1030e328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_ARI_CAP 3 0xfffe1030e32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF14_1_PCIE_ARI_CNTL 3 0xfffe1030e32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF15_1_VENDOR_ID 3 0xfffe1030f000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_DEVICE_ID 3 0xfffe1030f002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_COMMAND 3 0xfffe1030f004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF15_1_STATUS 3 0xfffe1030f006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_REVISION_ID 3 0xfffe1030f008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_PROG_INTERFACE 3 0xfffe1030f009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_SUB_CLASS 3 0xfffe1030f00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_BASE_CLASS 3 0xfffe1030f00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_CACHE_LINE 3 0xfffe1030f00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_LATENCY 3 0xfffe1030f00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_HEADER 3 0xfffe1030f00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_BIST 3 0xfffe1030f00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_BASE_ADDR_1 3 0xfffe1030f010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_BASE_ADDR_2 3 0xfffe1030f014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_BASE_ADDR_3 3 0xfffe1030f018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_BASE_ADDR_4 3 0xfffe1030f01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_BASE_ADDR_5 3 0xfffe1030f020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_BASE_ADDR_6 3 0xfffe1030f024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_CARDBUS_CIS_PTR 3 0xfffe1030f028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_ADAPTER_ID 3 0xfffe1030f02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_ROM_BASE_ADDR 3 0xfffe1030f030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_CAP_PTR 3 0xfffe1030f034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_INTERRUPT_LINE 3 0xfffe1030f03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_INTERRUPT_PIN 3 0xfffe1030f03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_MIN_GRANT 3 0xfffe1030f03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_MAX_LATENCY 3 0xfffe1030f03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_CAP_LIST 3 0xfffe1030f064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_CAP 3 0xfffe1030f066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF15_1_DEVICE_CAP 3 0xfffe1030f068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF15_1_DEVICE_CNTL 3 0xfffe1030f06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_DEVICE_STATUS 3 0xfffe1030f06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF15_1_LINK_CAP 3 0xfffe1030f070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_LINK_CNTL 3 0xfffe1030f074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_LINK_STATUS 3 0xfffe1030f076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_DEVICE_CAP2 3 0xfffe1030f088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_DEVICE_CNTL2 3 0xfffe1030f08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_DEVICE_STATUS2 3 0xfffe1030f08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_LINK_CAP2 3 0xfffe1030f090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_LINK_CNTL2 3 0xfffe1030f094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_LINK_STATUS2 3 0xfffe1030f096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSI_CAP_LIST 3 0xfffe1030f0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSI_MSG_CNTL 3 0xfffe1030f0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSI_MSG_ADDR_LO 3 0xfffe1030f0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSI_MSG_ADDR_HI 3 0xfffe1030f0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSI_MSG_DATA 3 0xfffe1030f0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSI_MASK 3 0xfffe1030f0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSI_MSG_DATA_64 3 0xfffe1030f0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSI_MASK_64 3 0xfffe1030f0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSI_PENDING 3 0xfffe1030f0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSI_PENDING_64 3 0xfffe1030f0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSIX_CAP_LIST 3 0xfffe1030f0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSIX_MSG_CNTL 3 0xfffe1030f0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSIX_TABLE 3 0xfffe1030f0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_MSIX_PBA 3 0xfffe1030f0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1030f100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1030f104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1030f108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1030f10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1030f150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1030f154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1030f158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1030f15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_CORR_ERR_STATUS 3 0xfffe1030f160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_CORR_ERR_MASK 3 0xfffe1030f164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1030f168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_HDR_LOG0 3 0xfffe1030f16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_HDR_LOG1 3 0xfffe1030f170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_HDR_LOG2 3 0xfffe1030f174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_HDR_LOG3 3 0xfffe1030f178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1030f188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1030f18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1030f190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1030f194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1030f2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_ATS_CAP 3 0xfffe1030f2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_ATS_CNTL 3 0xfffe1030f2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1030f328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_ARI_CAP 3 0xfffe1030f32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF15_1_PCIE_ARI_CNTL 3 0xfffe1030f32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF16_1_VENDOR_ID 3 0xfffe10310000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_DEVICE_ID 3 0xfffe10310002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_COMMAND 3 0xfffe10310004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF16_1_STATUS 3 0xfffe10310006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_REVISION_ID 3 0xfffe10310008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_PROG_INTERFACE 3 0xfffe10310009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_SUB_CLASS 3 0xfffe1031000a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_BASE_CLASS 3 0xfffe1031000b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_CACHE_LINE 3 0xfffe1031000c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_LATENCY 3 0xfffe1031000d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_HEADER 3 0xfffe1031000e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_BIST 3 0xfffe1031000f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_BASE_ADDR_1 3 0xfffe10310010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_BASE_ADDR_2 3 0xfffe10310014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_BASE_ADDR_3 3 0xfffe10310018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_BASE_ADDR_4 3 0xfffe1031001c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_BASE_ADDR_5 3 0xfffe10310020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_BASE_ADDR_6 3 0xfffe10310024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_CARDBUS_CIS_PTR 3 0xfffe10310028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_ADAPTER_ID 3 0xfffe1031002c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_ROM_BASE_ADDR 3 0xfffe10310030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_CAP_PTR 3 0xfffe10310034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_INTERRUPT_LINE 3 0xfffe1031003c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_INTERRUPT_PIN 3 0xfffe1031003d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_MIN_GRANT 3 0xfffe1031003e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_MAX_LATENCY 3 0xfffe1031003f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_CAP_LIST 3 0xfffe10310064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_CAP 3 0xfffe10310066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF16_1_DEVICE_CAP 3 0xfffe10310068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF16_1_DEVICE_CNTL 3 0xfffe1031006c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_DEVICE_STATUS 3 0xfffe1031006e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF16_1_LINK_CAP 3 0xfffe10310070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_LINK_CNTL 3 0xfffe10310074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_LINK_STATUS 3 0xfffe10310076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_DEVICE_CAP2 3 0xfffe10310088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_DEVICE_CNTL2 3 0xfffe1031008c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_DEVICE_STATUS2 3 0xfffe1031008e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_LINK_CAP2 3 0xfffe10310090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_LINK_CNTL2 3 0xfffe10310094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_LINK_STATUS2 3 0xfffe10310096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSI_CAP_LIST 3 0xfffe103100a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSI_MSG_CNTL 3 0xfffe103100a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSI_MSG_ADDR_LO 3 0xfffe103100a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSI_MSG_ADDR_HI 3 0xfffe103100a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSI_MSG_DATA 3 0xfffe103100a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSI_MASK 3 0xfffe103100ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSI_MSG_DATA_64 3 0xfffe103100ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSI_MASK_64 3 0xfffe103100b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSI_PENDING 3 0xfffe103100b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSI_PENDING_64 3 0xfffe103100b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSIX_CAP_LIST 3 0xfffe103100c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSIX_MSG_CNTL 3 0xfffe103100c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSIX_TABLE 3 0xfffe103100c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_MSIX_PBA 3 0xfffe103100c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10310100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10310104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10310108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031010c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10310150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10310154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10310158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031015c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_CORR_ERR_STATUS 3 0xfffe10310160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_CORR_ERR_MASK 3 0xfffe10310164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10310168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_HDR_LOG0 3 0xfffe1031016c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_HDR_LOG1 3 0xfffe10310170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_HDR_LOG2 3 0xfffe10310174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_HDR_LOG3 3 0xfffe10310178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10310188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031018c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10310190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10310194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103102b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_ATS_CAP 3 0xfffe103102b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_ATS_CNTL 3 0xfffe103102b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10310328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_ARI_CAP 3 0xfffe1031032c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF16_1_PCIE_ARI_CNTL 3 0xfffe1031032e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF17_1_VENDOR_ID 3 0xfffe10311000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_DEVICE_ID 3 0xfffe10311002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_COMMAND 3 0xfffe10311004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF17_1_STATUS 3 0xfffe10311006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_REVISION_ID 3 0xfffe10311008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_PROG_INTERFACE 3 0xfffe10311009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_SUB_CLASS 3 0xfffe1031100a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_BASE_CLASS 3 0xfffe1031100b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_CACHE_LINE 3 0xfffe1031100c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_LATENCY 3 0xfffe1031100d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_HEADER 3 0xfffe1031100e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_BIST 3 0xfffe1031100f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_BASE_ADDR_1 3 0xfffe10311010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_BASE_ADDR_2 3 0xfffe10311014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_BASE_ADDR_3 3 0xfffe10311018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_BASE_ADDR_4 3 0xfffe1031101c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_BASE_ADDR_5 3 0xfffe10311020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_BASE_ADDR_6 3 0xfffe10311024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_CARDBUS_CIS_PTR 3 0xfffe10311028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_ADAPTER_ID 3 0xfffe1031102c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_ROM_BASE_ADDR 3 0xfffe10311030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_CAP_PTR 3 0xfffe10311034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_INTERRUPT_LINE 3 0xfffe1031103c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_INTERRUPT_PIN 3 0xfffe1031103d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_MIN_GRANT 3 0xfffe1031103e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_MAX_LATENCY 3 0xfffe1031103f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_CAP_LIST 3 0xfffe10311064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_CAP 3 0xfffe10311066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF17_1_DEVICE_CAP 3 0xfffe10311068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF17_1_DEVICE_CNTL 3 0xfffe1031106c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_DEVICE_STATUS 3 0xfffe1031106e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF17_1_LINK_CAP 3 0xfffe10311070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_LINK_CNTL 3 0xfffe10311074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_LINK_STATUS 3 0xfffe10311076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_DEVICE_CAP2 3 0xfffe10311088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_DEVICE_CNTL2 3 0xfffe1031108c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_DEVICE_STATUS2 3 0xfffe1031108e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_LINK_CAP2 3 0xfffe10311090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_LINK_CNTL2 3 0xfffe10311094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_LINK_STATUS2 3 0xfffe10311096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSI_CAP_LIST 3 0xfffe103110a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSI_MSG_CNTL 3 0xfffe103110a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSI_MSG_ADDR_LO 3 0xfffe103110a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSI_MSG_ADDR_HI 3 0xfffe103110a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSI_MSG_DATA 3 0xfffe103110a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSI_MASK 3 0xfffe103110ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSI_MSG_DATA_64 3 0xfffe103110ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSI_MASK_64 3 0xfffe103110b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSI_PENDING 3 0xfffe103110b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSI_PENDING_64 3 0xfffe103110b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSIX_CAP_LIST 3 0xfffe103110c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSIX_MSG_CNTL 3 0xfffe103110c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSIX_TABLE 3 0xfffe103110c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_MSIX_PBA 3 0xfffe103110c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10311100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10311104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10311108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031110c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10311150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10311154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10311158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031115c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_CORR_ERR_STATUS 3 0xfffe10311160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_CORR_ERR_MASK 3 0xfffe10311164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10311168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_HDR_LOG0 3 0xfffe1031116c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_HDR_LOG1 3 0xfffe10311170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_HDR_LOG2 3 0xfffe10311174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_HDR_LOG3 3 0xfffe10311178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10311188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031118c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10311190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10311194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103112b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_ATS_CAP 3 0xfffe103112b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_ATS_CNTL 3 0xfffe103112b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10311328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_ARI_CAP 3 0xfffe1031132c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF17_1_PCIE_ARI_CNTL 3 0xfffe1031132e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF18_1_VENDOR_ID 3 0xfffe10312000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_DEVICE_ID 3 0xfffe10312002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_COMMAND 3 0xfffe10312004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF18_1_STATUS 3 0xfffe10312006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_REVISION_ID 3 0xfffe10312008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_PROG_INTERFACE 3 0xfffe10312009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_SUB_CLASS 3 0xfffe1031200a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_BASE_CLASS 3 0xfffe1031200b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_CACHE_LINE 3 0xfffe1031200c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_LATENCY 3 0xfffe1031200d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_HEADER 3 0xfffe1031200e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_BIST 3 0xfffe1031200f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_BASE_ADDR_1 3 0xfffe10312010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_BASE_ADDR_2 3 0xfffe10312014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_BASE_ADDR_3 3 0xfffe10312018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_BASE_ADDR_4 3 0xfffe1031201c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_BASE_ADDR_5 3 0xfffe10312020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_BASE_ADDR_6 3 0xfffe10312024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_CARDBUS_CIS_PTR 3 0xfffe10312028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_ADAPTER_ID 3 0xfffe1031202c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_ROM_BASE_ADDR 3 0xfffe10312030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_CAP_PTR 3 0xfffe10312034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_INTERRUPT_LINE 3 0xfffe1031203c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_INTERRUPT_PIN 3 0xfffe1031203d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_MIN_GRANT 3 0xfffe1031203e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_MAX_LATENCY 3 0xfffe1031203f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_CAP_LIST 3 0xfffe10312064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_CAP 3 0xfffe10312066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF18_1_DEVICE_CAP 3 0xfffe10312068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF18_1_DEVICE_CNTL 3 0xfffe1031206c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_DEVICE_STATUS 3 0xfffe1031206e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF18_1_LINK_CAP 3 0xfffe10312070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_LINK_CNTL 3 0xfffe10312074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_LINK_STATUS 3 0xfffe10312076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_DEVICE_CAP2 3 0xfffe10312088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_DEVICE_CNTL2 3 0xfffe1031208c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_DEVICE_STATUS2 3 0xfffe1031208e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_LINK_CAP2 3 0xfffe10312090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_LINK_CNTL2 3 0xfffe10312094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_LINK_STATUS2 3 0xfffe10312096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSI_CAP_LIST 3 0xfffe103120a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSI_MSG_CNTL 3 0xfffe103120a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSI_MSG_ADDR_LO 3 0xfffe103120a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSI_MSG_ADDR_HI 3 0xfffe103120a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSI_MSG_DATA 3 0xfffe103120a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSI_MASK 3 0xfffe103120ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSI_MSG_DATA_64 3 0xfffe103120ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSI_MASK_64 3 0xfffe103120b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSI_PENDING 3 0xfffe103120b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSI_PENDING_64 3 0xfffe103120b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSIX_CAP_LIST 3 0xfffe103120c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSIX_MSG_CNTL 3 0xfffe103120c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSIX_TABLE 3 0xfffe103120c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_MSIX_PBA 3 0xfffe103120c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10312100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10312104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10312108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031210c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10312150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10312154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10312158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031215c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_CORR_ERR_STATUS 3 0xfffe10312160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_CORR_ERR_MASK 3 0xfffe10312164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10312168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_HDR_LOG0 3 0xfffe1031216c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_HDR_LOG1 3 0xfffe10312170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_HDR_LOG2 3 0xfffe10312174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_HDR_LOG3 3 0xfffe10312178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10312188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031218c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10312190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10312194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103122b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_ATS_CAP 3 0xfffe103122b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_ATS_CNTL 3 0xfffe103122b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10312328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_ARI_CAP 3 0xfffe1031232c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF18_1_PCIE_ARI_CNTL 3 0xfffe1031232e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF19_1_VENDOR_ID 3 0xfffe10313000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_DEVICE_ID 3 0xfffe10313002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_COMMAND 3 0xfffe10313004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF19_1_STATUS 3 0xfffe10313006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_REVISION_ID 3 0xfffe10313008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_PROG_INTERFACE 3 0xfffe10313009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_SUB_CLASS 3 0xfffe1031300a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_BASE_CLASS 3 0xfffe1031300b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_CACHE_LINE 3 0xfffe1031300c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_LATENCY 3 0xfffe1031300d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_HEADER 3 0xfffe1031300e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_BIST 3 0xfffe1031300f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_BASE_ADDR_1 3 0xfffe10313010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_BASE_ADDR_2 3 0xfffe10313014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_BASE_ADDR_3 3 0xfffe10313018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_BASE_ADDR_4 3 0xfffe1031301c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_BASE_ADDR_5 3 0xfffe10313020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_BASE_ADDR_6 3 0xfffe10313024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_CARDBUS_CIS_PTR 3 0xfffe10313028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_ADAPTER_ID 3 0xfffe1031302c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_ROM_BASE_ADDR 3 0xfffe10313030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_CAP_PTR 3 0xfffe10313034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_INTERRUPT_LINE 3 0xfffe1031303c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_INTERRUPT_PIN 3 0xfffe1031303d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_MIN_GRANT 3 0xfffe1031303e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_MAX_LATENCY 3 0xfffe1031303f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_CAP_LIST 3 0xfffe10313064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_CAP 3 0xfffe10313066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF19_1_DEVICE_CAP 3 0xfffe10313068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF19_1_DEVICE_CNTL 3 0xfffe1031306c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_DEVICE_STATUS 3 0xfffe1031306e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF19_1_LINK_CAP 3 0xfffe10313070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_LINK_CNTL 3 0xfffe10313074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_LINK_STATUS 3 0xfffe10313076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_DEVICE_CAP2 3 0xfffe10313088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_DEVICE_CNTL2 3 0xfffe1031308c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_DEVICE_STATUS2 3 0xfffe1031308e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_LINK_CAP2 3 0xfffe10313090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_LINK_CNTL2 3 0xfffe10313094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_LINK_STATUS2 3 0xfffe10313096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSI_CAP_LIST 3 0xfffe103130a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSI_MSG_CNTL 3 0xfffe103130a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSI_MSG_ADDR_LO 3 0xfffe103130a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSI_MSG_ADDR_HI 3 0xfffe103130a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSI_MSG_DATA 3 0xfffe103130a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSI_MASK 3 0xfffe103130ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSI_MSG_DATA_64 3 0xfffe103130ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSI_MASK_64 3 0xfffe103130b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSI_PENDING 3 0xfffe103130b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSI_PENDING_64 3 0xfffe103130b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSIX_CAP_LIST 3 0xfffe103130c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSIX_MSG_CNTL 3 0xfffe103130c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSIX_TABLE 3 0xfffe103130c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_MSIX_PBA 3 0xfffe103130c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10313100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10313104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10313108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031310c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10313150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10313154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10313158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031315c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_CORR_ERR_STATUS 3 0xfffe10313160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_CORR_ERR_MASK 3 0xfffe10313164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10313168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_HDR_LOG0 3 0xfffe1031316c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_HDR_LOG1 3 0xfffe10313170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_HDR_LOG2 3 0xfffe10313174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_HDR_LOG3 3 0xfffe10313178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10313188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031318c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10313190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10313194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103132b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_ATS_CAP 3 0xfffe103132b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_ATS_CNTL 3 0xfffe103132b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10313328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_ARI_CAP 3 0xfffe1031332c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF19_1_PCIE_ARI_CNTL 3 0xfffe1031332e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF20_1_VENDOR_ID 3 0xfffe10314000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_DEVICE_ID 3 0xfffe10314002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_COMMAND 3 0xfffe10314004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF20_1_STATUS 3 0xfffe10314006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_REVISION_ID 3 0xfffe10314008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_PROG_INTERFACE 3 0xfffe10314009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_SUB_CLASS 3 0xfffe1031400a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_BASE_CLASS 3 0xfffe1031400b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_CACHE_LINE 3 0xfffe1031400c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_LATENCY 3 0xfffe1031400d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_HEADER 3 0xfffe1031400e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_BIST 3 0xfffe1031400f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_BASE_ADDR_1 3 0xfffe10314010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_BASE_ADDR_2 3 0xfffe10314014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_BASE_ADDR_3 3 0xfffe10314018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_BASE_ADDR_4 3 0xfffe1031401c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_BASE_ADDR_5 3 0xfffe10314020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_BASE_ADDR_6 3 0xfffe10314024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_CARDBUS_CIS_PTR 3 0xfffe10314028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_ADAPTER_ID 3 0xfffe1031402c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_ROM_BASE_ADDR 3 0xfffe10314030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_CAP_PTR 3 0xfffe10314034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_INTERRUPT_LINE 3 0xfffe1031403c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_INTERRUPT_PIN 3 0xfffe1031403d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_MIN_GRANT 3 0xfffe1031403e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_MAX_LATENCY 3 0xfffe1031403f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_CAP_LIST 3 0xfffe10314064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_CAP 3 0xfffe10314066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF20_1_DEVICE_CAP 3 0xfffe10314068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF20_1_DEVICE_CNTL 3 0xfffe1031406c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_DEVICE_STATUS 3 0xfffe1031406e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF20_1_LINK_CAP 3 0xfffe10314070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_LINK_CNTL 3 0xfffe10314074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_LINK_STATUS 3 0xfffe10314076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_DEVICE_CAP2 3 0xfffe10314088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_DEVICE_CNTL2 3 0xfffe1031408c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_DEVICE_STATUS2 3 0xfffe1031408e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_LINK_CAP2 3 0xfffe10314090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_LINK_CNTL2 3 0xfffe10314094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_LINK_STATUS2 3 0xfffe10314096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSI_CAP_LIST 3 0xfffe103140a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSI_MSG_CNTL 3 0xfffe103140a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSI_MSG_ADDR_LO 3 0xfffe103140a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSI_MSG_ADDR_HI 3 0xfffe103140a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSI_MSG_DATA 3 0xfffe103140a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSI_MASK 3 0xfffe103140ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSI_MSG_DATA_64 3 0xfffe103140ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSI_MASK_64 3 0xfffe103140b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSI_PENDING 3 0xfffe103140b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSI_PENDING_64 3 0xfffe103140b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSIX_CAP_LIST 3 0xfffe103140c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSIX_MSG_CNTL 3 0xfffe103140c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSIX_TABLE 3 0xfffe103140c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_MSIX_PBA 3 0xfffe103140c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10314100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10314104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10314108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031410c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10314150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10314154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10314158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031415c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_CORR_ERR_STATUS 3 0xfffe10314160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_CORR_ERR_MASK 3 0xfffe10314164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10314168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_HDR_LOG0 3 0xfffe1031416c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_HDR_LOG1 3 0xfffe10314170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_HDR_LOG2 3 0xfffe10314174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_HDR_LOG3 3 0xfffe10314178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10314188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031418c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10314190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10314194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103142b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_ATS_CAP 3 0xfffe103142b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_ATS_CNTL 3 0xfffe103142b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10314328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_ARI_CAP 3 0xfffe1031432c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF20_1_PCIE_ARI_CNTL 3 0xfffe1031432e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF21_1_VENDOR_ID 3 0xfffe10315000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_DEVICE_ID 3 0xfffe10315002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_COMMAND 3 0xfffe10315004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF21_1_STATUS 3 0xfffe10315006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_REVISION_ID 3 0xfffe10315008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_PROG_INTERFACE 3 0xfffe10315009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_SUB_CLASS 3 0xfffe1031500a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_BASE_CLASS 3 0xfffe1031500b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_CACHE_LINE 3 0xfffe1031500c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_LATENCY 3 0xfffe1031500d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_HEADER 3 0xfffe1031500e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_BIST 3 0xfffe1031500f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_BASE_ADDR_1 3 0xfffe10315010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_BASE_ADDR_2 3 0xfffe10315014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_BASE_ADDR_3 3 0xfffe10315018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_BASE_ADDR_4 3 0xfffe1031501c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_BASE_ADDR_5 3 0xfffe10315020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_BASE_ADDR_6 3 0xfffe10315024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_CARDBUS_CIS_PTR 3 0xfffe10315028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_ADAPTER_ID 3 0xfffe1031502c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_ROM_BASE_ADDR 3 0xfffe10315030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_CAP_PTR 3 0xfffe10315034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_INTERRUPT_LINE 3 0xfffe1031503c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_INTERRUPT_PIN 3 0xfffe1031503d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_MIN_GRANT 3 0xfffe1031503e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_MAX_LATENCY 3 0xfffe1031503f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_CAP_LIST 3 0xfffe10315064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_CAP 3 0xfffe10315066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF21_1_DEVICE_CAP 3 0xfffe10315068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF21_1_DEVICE_CNTL 3 0xfffe1031506c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_DEVICE_STATUS 3 0xfffe1031506e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF21_1_LINK_CAP 3 0xfffe10315070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_LINK_CNTL 3 0xfffe10315074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_LINK_STATUS 3 0xfffe10315076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_DEVICE_CAP2 3 0xfffe10315088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_DEVICE_CNTL2 3 0xfffe1031508c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_DEVICE_STATUS2 3 0xfffe1031508e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_LINK_CAP2 3 0xfffe10315090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_LINK_CNTL2 3 0xfffe10315094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_LINK_STATUS2 3 0xfffe10315096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSI_CAP_LIST 3 0xfffe103150a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSI_MSG_CNTL 3 0xfffe103150a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSI_MSG_ADDR_LO 3 0xfffe103150a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSI_MSG_ADDR_HI 3 0xfffe103150a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSI_MSG_DATA 3 0xfffe103150a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSI_MASK 3 0xfffe103150ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSI_MSG_DATA_64 3 0xfffe103150ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSI_MASK_64 3 0xfffe103150b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSI_PENDING 3 0xfffe103150b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSI_PENDING_64 3 0xfffe103150b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSIX_CAP_LIST 3 0xfffe103150c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSIX_MSG_CNTL 3 0xfffe103150c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSIX_TABLE 3 0xfffe103150c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_MSIX_PBA 3 0xfffe103150c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10315100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10315104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10315108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031510c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10315150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10315154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10315158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031515c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_CORR_ERR_STATUS 3 0xfffe10315160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_CORR_ERR_MASK 3 0xfffe10315164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10315168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_HDR_LOG0 3 0xfffe1031516c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_HDR_LOG1 3 0xfffe10315170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_HDR_LOG2 3 0xfffe10315174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_HDR_LOG3 3 0xfffe10315178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10315188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031518c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10315190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10315194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103152b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_ATS_CAP 3 0xfffe103152b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_ATS_CNTL 3 0xfffe103152b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10315328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_ARI_CAP 3 0xfffe1031532c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF21_1_PCIE_ARI_CNTL 3 0xfffe1031532e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF22_1_VENDOR_ID 3 0xfffe10316000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_DEVICE_ID 3 0xfffe10316002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_COMMAND 3 0xfffe10316004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF22_1_STATUS 3 0xfffe10316006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_REVISION_ID 3 0xfffe10316008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_PROG_INTERFACE 3 0xfffe10316009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_SUB_CLASS 3 0xfffe1031600a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_BASE_CLASS 3 0xfffe1031600b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_CACHE_LINE 3 0xfffe1031600c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_LATENCY 3 0xfffe1031600d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_HEADER 3 0xfffe1031600e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_BIST 3 0xfffe1031600f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_BASE_ADDR_1 3 0xfffe10316010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_BASE_ADDR_2 3 0xfffe10316014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_BASE_ADDR_3 3 0xfffe10316018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_BASE_ADDR_4 3 0xfffe1031601c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_BASE_ADDR_5 3 0xfffe10316020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_BASE_ADDR_6 3 0xfffe10316024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_CARDBUS_CIS_PTR 3 0xfffe10316028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_ADAPTER_ID 3 0xfffe1031602c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_ROM_BASE_ADDR 3 0xfffe10316030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_CAP_PTR 3 0xfffe10316034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_INTERRUPT_LINE 3 0xfffe1031603c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_INTERRUPT_PIN 3 0xfffe1031603d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_MIN_GRANT 3 0xfffe1031603e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_MAX_LATENCY 3 0xfffe1031603f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_CAP_LIST 3 0xfffe10316064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_CAP 3 0xfffe10316066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF22_1_DEVICE_CAP 3 0xfffe10316068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF22_1_DEVICE_CNTL 3 0xfffe1031606c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_DEVICE_STATUS 3 0xfffe1031606e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF22_1_LINK_CAP 3 0xfffe10316070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_LINK_CNTL 3 0xfffe10316074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_LINK_STATUS 3 0xfffe10316076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_DEVICE_CAP2 3 0xfffe10316088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_DEVICE_CNTL2 3 0xfffe1031608c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_DEVICE_STATUS2 3 0xfffe1031608e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_LINK_CAP2 3 0xfffe10316090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_LINK_CNTL2 3 0xfffe10316094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_LINK_STATUS2 3 0xfffe10316096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSI_CAP_LIST 3 0xfffe103160a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSI_MSG_CNTL 3 0xfffe103160a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSI_MSG_ADDR_LO 3 0xfffe103160a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSI_MSG_ADDR_HI 3 0xfffe103160a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSI_MSG_DATA 3 0xfffe103160a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSI_MASK 3 0xfffe103160ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSI_MSG_DATA_64 3 0xfffe103160ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSI_MASK_64 3 0xfffe103160b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSI_PENDING 3 0xfffe103160b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSI_PENDING_64 3 0xfffe103160b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSIX_CAP_LIST 3 0xfffe103160c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSIX_MSG_CNTL 3 0xfffe103160c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSIX_TABLE 3 0xfffe103160c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_MSIX_PBA 3 0xfffe103160c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10316100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10316104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10316108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031610c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10316150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10316154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10316158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031615c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_CORR_ERR_STATUS 3 0xfffe10316160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_CORR_ERR_MASK 3 0xfffe10316164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10316168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_HDR_LOG0 3 0xfffe1031616c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_HDR_LOG1 3 0xfffe10316170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_HDR_LOG2 3 0xfffe10316174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_HDR_LOG3 3 0xfffe10316178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10316188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031618c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10316190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10316194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103162b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_ATS_CAP 3 0xfffe103162b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_ATS_CNTL 3 0xfffe103162b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10316328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_ARI_CAP 3 0xfffe1031632c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF22_1_PCIE_ARI_CNTL 3 0xfffe1031632e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF23_1_VENDOR_ID 3 0xfffe10317000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_DEVICE_ID 3 0xfffe10317002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_COMMAND 3 0xfffe10317004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF23_1_STATUS 3 0xfffe10317006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_REVISION_ID 3 0xfffe10317008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_PROG_INTERFACE 3 0xfffe10317009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_SUB_CLASS 3 0xfffe1031700a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_BASE_CLASS 3 0xfffe1031700b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_CACHE_LINE 3 0xfffe1031700c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_LATENCY 3 0xfffe1031700d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_HEADER 3 0xfffe1031700e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_BIST 3 0xfffe1031700f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_BASE_ADDR_1 3 0xfffe10317010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_BASE_ADDR_2 3 0xfffe10317014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_BASE_ADDR_3 3 0xfffe10317018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_BASE_ADDR_4 3 0xfffe1031701c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_BASE_ADDR_5 3 0xfffe10317020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_BASE_ADDR_6 3 0xfffe10317024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_CARDBUS_CIS_PTR 3 0xfffe10317028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_ADAPTER_ID 3 0xfffe1031702c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_ROM_BASE_ADDR 3 0xfffe10317030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_CAP_PTR 3 0xfffe10317034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_INTERRUPT_LINE 3 0xfffe1031703c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_INTERRUPT_PIN 3 0xfffe1031703d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_MIN_GRANT 3 0xfffe1031703e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_MAX_LATENCY 3 0xfffe1031703f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_CAP_LIST 3 0xfffe10317064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_CAP 3 0xfffe10317066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF23_1_DEVICE_CAP 3 0xfffe10317068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF23_1_DEVICE_CNTL 3 0xfffe1031706c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_DEVICE_STATUS 3 0xfffe1031706e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF23_1_LINK_CAP 3 0xfffe10317070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_LINK_CNTL 3 0xfffe10317074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_LINK_STATUS 3 0xfffe10317076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_DEVICE_CAP2 3 0xfffe10317088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_DEVICE_CNTL2 3 0xfffe1031708c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_DEVICE_STATUS2 3 0xfffe1031708e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_LINK_CAP2 3 0xfffe10317090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_LINK_CNTL2 3 0xfffe10317094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_LINK_STATUS2 3 0xfffe10317096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSI_CAP_LIST 3 0xfffe103170a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSI_MSG_CNTL 3 0xfffe103170a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSI_MSG_ADDR_LO 3 0xfffe103170a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSI_MSG_ADDR_HI 3 0xfffe103170a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSI_MSG_DATA 3 0xfffe103170a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSI_MASK 3 0xfffe103170ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSI_MSG_DATA_64 3 0xfffe103170ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSI_MASK_64 3 0xfffe103170b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSI_PENDING 3 0xfffe103170b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSI_PENDING_64 3 0xfffe103170b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSIX_CAP_LIST 3 0xfffe103170c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSIX_MSG_CNTL 3 0xfffe103170c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSIX_TABLE 3 0xfffe103170c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_MSIX_PBA 3 0xfffe103170c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10317100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10317104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10317108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031710c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10317150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10317154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10317158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031715c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_CORR_ERR_STATUS 3 0xfffe10317160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_CORR_ERR_MASK 3 0xfffe10317164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10317168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_HDR_LOG0 3 0xfffe1031716c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_HDR_LOG1 3 0xfffe10317170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_HDR_LOG2 3 0xfffe10317174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_HDR_LOG3 3 0xfffe10317178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10317188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031718c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10317190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10317194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103172b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_ATS_CAP 3 0xfffe103172b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_ATS_CNTL 3 0xfffe103172b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10317328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_ARI_CAP 3 0xfffe1031732c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF23_1_PCIE_ARI_CNTL 3 0xfffe1031732e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF24_1_VENDOR_ID 3 0xfffe10318000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_DEVICE_ID 3 0xfffe10318002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_COMMAND 3 0xfffe10318004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF24_1_STATUS 3 0xfffe10318006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_REVISION_ID 3 0xfffe10318008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_PROG_INTERFACE 3 0xfffe10318009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_SUB_CLASS 3 0xfffe1031800a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_BASE_CLASS 3 0xfffe1031800b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_CACHE_LINE 3 0xfffe1031800c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_LATENCY 3 0xfffe1031800d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_HEADER 3 0xfffe1031800e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_BIST 3 0xfffe1031800f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_BASE_ADDR_1 3 0xfffe10318010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_BASE_ADDR_2 3 0xfffe10318014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_BASE_ADDR_3 3 0xfffe10318018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_BASE_ADDR_4 3 0xfffe1031801c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_BASE_ADDR_5 3 0xfffe10318020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_BASE_ADDR_6 3 0xfffe10318024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_CARDBUS_CIS_PTR 3 0xfffe10318028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_ADAPTER_ID 3 0xfffe1031802c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_ROM_BASE_ADDR 3 0xfffe10318030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_CAP_PTR 3 0xfffe10318034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_INTERRUPT_LINE 3 0xfffe1031803c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_INTERRUPT_PIN 3 0xfffe1031803d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_MIN_GRANT 3 0xfffe1031803e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_MAX_LATENCY 3 0xfffe1031803f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_CAP_LIST 3 0xfffe10318064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_CAP 3 0xfffe10318066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF24_1_DEVICE_CAP 3 0xfffe10318068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF24_1_DEVICE_CNTL 3 0xfffe1031806c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_DEVICE_STATUS 3 0xfffe1031806e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF24_1_LINK_CAP 3 0xfffe10318070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_LINK_CNTL 3 0xfffe10318074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_LINK_STATUS 3 0xfffe10318076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_DEVICE_CAP2 3 0xfffe10318088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_DEVICE_CNTL2 3 0xfffe1031808c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_DEVICE_STATUS2 3 0xfffe1031808e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_LINK_CAP2 3 0xfffe10318090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_LINK_CNTL2 3 0xfffe10318094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_LINK_STATUS2 3 0xfffe10318096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSI_CAP_LIST 3 0xfffe103180a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSI_MSG_CNTL 3 0xfffe103180a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSI_MSG_ADDR_LO 3 0xfffe103180a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSI_MSG_ADDR_HI 3 0xfffe103180a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSI_MSG_DATA 3 0xfffe103180a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSI_MASK 3 0xfffe103180ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSI_MSG_DATA_64 3 0xfffe103180ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSI_MASK_64 3 0xfffe103180b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSI_PENDING 3 0xfffe103180b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSI_PENDING_64 3 0xfffe103180b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSIX_CAP_LIST 3 0xfffe103180c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSIX_MSG_CNTL 3 0xfffe103180c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSIX_TABLE 3 0xfffe103180c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_MSIX_PBA 3 0xfffe103180c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10318100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10318104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10318108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031810c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10318150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10318154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10318158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031815c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_CORR_ERR_STATUS 3 0xfffe10318160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_CORR_ERR_MASK 3 0xfffe10318164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10318168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_HDR_LOG0 3 0xfffe1031816c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_HDR_LOG1 3 0xfffe10318170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_HDR_LOG2 3 0xfffe10318174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_HDR_LOG3 3 0xfffe10318178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10318188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031818c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10318190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10318194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103182b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_ATS_CAP 3 0xfffe103182b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_ATS_CNTL 3 0xfffe103182b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10318328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_ARI_CAP 3 0xfffe1031832c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF24_1_PCIE_ARI_CNTL 3 0xfffe1031832e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF25_1_VENDOR_ID 3 0xfffe10319000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_DEVICE_ID 3 0xfffe10319002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_COMMAND 3 0xfffe10319004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF25_1_STATUS 3 0xfffe10319006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_REVISION_ID 3 0xfffe10319008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_PROG_INTERFACE 3 0xfffe10319009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_SUB_CLASS 3 0xfffe1031900a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_BASE_CLASS 3 0xfffe1031900b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_CACHE_LINE 3 0xfffe1031900c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_LATENCY 3 0xfffe1031900d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_HEADER 3 0xfffe1031900e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_BIST 3 0xfffe1031900f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_BASE_ADDR_1 3 0xfffe10319010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_BASE_ADDR_2 3 0xfffe10319014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_BASE_ADDR_3 3 0xfffe10319018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_BASE_ADDR_4 3 0xfffe1031901c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_BASE_ADDR_5 3 0xfffe10319020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_BASE_ADDR_6 3 0xfffe10319024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_CARDBUS_CIS_PTR 3 0xfffe10319028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_ADAPTER_ID 3 0xfffe1031902c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_ROM_BASE_ADDR 3 0xfffe10319030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_CAP_PTR 3 0xfffe10319034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_INTERRUPT_LINE 3 0xfffe1031903c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_INTERRUPT_PIN 3 0xfffe1031903d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_MIN_GRANT 3 0xfffe1031903e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_MAX_LATENCY 3 0xfffe1031903f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_CAP_LIST 3 0xfffe10319064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_CAP 3 0xfffe10319066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF25_1_DEVICE_CAP 3 0xfffe10319068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF25_1_DEVICE_CNTL 3 0xfffe1031906c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_DEVICE_STATUS 3 0xfffe1031906e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF25_1_LINK_CAP 3 0xfffe10319070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_LINK_CNTL 3 0xfffe10319074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_LINK_STATUS 3 0xfffe10319076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_DEVICE_CAP2 3 0xfffe10319088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_DEVICE_CNTL2 3 0xfffe1031908c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_DEVICE_STATUS2 3 0xfffe1031908e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_LINK_CAP2 3 0xfffe10319090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_LINK_CNTL2 3 0xfffe10319094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_LINK_STATUS2 3 0xfffe10319096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSI_CAP_LIST 3 0xfffe103190a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSI_MSG_CNTL 3 0xfffe103190a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSI_MSG_ADDR_LO 3 0xfffe103190a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSI_MSG_ADDR_HI 3 0xfffe103190a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSI_MSG_DATA 3 0xfffe103190a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSI_MASK 3 0xfffe103190ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSI_MSG_DATA_64 3 0xfffe103190ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSI_MASK_64 3 0xfffe103190b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSI_PENDING 3 0xfffe103190b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSI_PENDING_64 3 0xfffe103190b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSIX_CAP_LIST 3 0xfffe103190c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSIX_MSG_CNTL 3 0xfffe103190c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSIX_TABLE 3 0xfffe103190c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_MSIX_PBA 3 0xfffe103190c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe10319100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe10319104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe10319108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031910c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe10319150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe10319154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_UNCORR_ERR_MASK 3 0xfffe10319158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031915c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_CORR_ERR_STATUS 3 0xfffe10319160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_CORR_ERR_MASK 3 0xfffe10319164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe10319168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_HDR_LOG0 3 0xfffe1031916c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_HDR_LOG1 3 0xfffe10319170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_HDR_LOG2 3 0xfffe10319174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_HDR_LOG3 3 0xfffe10319178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe10319188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031918c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe10319190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe10319194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe103192b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_ATS_CAP 3 0xfffe103192b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_ATS_CNTL 3 0xfffe103192b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe10319328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_ARI_CAP 3 0xfffe1031932c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF25_1_PCIE_ARI_CNTL 3 0xfffe1031932e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF26_1_VENDOR_ID 3 0xfffe1031a000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_DEVICE_ID 3 0xfffe1031a002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_COMMAND 3 0xfffe1031a004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF26_1_STATUS 3 0xfffe1031a006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_REVISION_ID 3 0xfffe1031a008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_PROG_INTERFACE 3 0xfffe1031a009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_SUB_CLASS 3 0xfffe1031a00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_BASE_CLASS 3 0xfffe1031a00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_CACHE_LINE 3 0xfffe1031a00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_LATENCY 3 0xfffe1031a00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_HEADER 3 0xfffe1031a00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_BIST 3 0xfffe1031a00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_BASE_ADDR_1 3 0xfffe1031a010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_BASE_ADDR_2 3 0xfffe1031a014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_BASE_ADDR_3 3 0xfffe1031a018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_BASE_ADDR_4 3 0xfffe1031a01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_BASE_ADDR_5 3 0xfffe1031a020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_BASE_ADDR_6 3 0xfffe1031a024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_CARDBUS_CIS_PTR 3 0xfffe1031a028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_ADAPTER_ID 3 0xfffe1031a02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_ROM_BASE_ADDR 3 0xfffe1031a030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_CAP_PTR 3 0xfffe1031a034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_INTERRUPT_LINE 3 0xfffe1031a03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_INTERRUPT_PIN 3 0xfffe1031a03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_MIN_GRANT 3 0xfffe1031a03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_MAX_LATENCY 3 0xfffe1031a03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_CAP_LIST 3 0xfffe1031a064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_CAP 3 0xfffe1031a066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF26_1_DEVICE_CAP 3 0xfffe1031a068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF26_1_DEVICE_CNTL 3 0xfffe1031a06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_DEVICE_STATUS 3 0xfffe1031a06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF26_1_LINK_CAP 3 0xfffe1031a070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_LINK_CNTL 3 0xfffe1031a074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_LINK_STATUS 3 0xfffe1031a076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_DEVICE_CAP2 3 0xfffe1031a088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_DEVICE_CNTL2 3 0xfffe1031a08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_DEVICE_STATUS2 3 0xfffe1031a08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_LINK_CAP2 3 0xfffe1031a090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_LINK_CNTL2 3 0xfffe1031a094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_LINK_STATUS2 3 0xfffe1031a096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSI_CAP_LIST 3 0xfffe1031a0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSI_MSG_CNTL 3 0xfffe1031a0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSI_MSG_ADDR_LO 3 0xfffe1031a0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSI_MSG_ADDR_HI 3 0xfffe1031a0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSI_MSG_DATA 3 0xfffe1031a0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSI_MASK 3 0xfffe1031a0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSI_MSG_DATA_64 3 0xfffe1031a0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSI_MASK_64 3 0xfffe1031a0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSI_PENDING 3 0xfffe1031a0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSI_PENDING_64 3 0xfffe1031a0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSIX_CAP_LIST 3 0xfffe1031a0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSIX_MSG_CNTL 3 0xfffe1031a0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSIX_TABLE 3 0xfffe1031a0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_MSIX_PBA 3 0xfffe1031a0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1031a100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1031a104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1031a108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031a10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1031a150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1031a154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1031a158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031a15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_CORR_ERR_STATUS 3 0xfffe1031a160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_CORR_ERR_MASK 3 0xfffe1031a164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1031a168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_HDR_LOG0 3 0xfffe1031a16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_HDR_LOG1 3 0xfffe1031a170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_HDR_LOG2 3 0xfffe1031a174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_HDR_LOG3 3 0xfffe1031a178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1031a188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031a18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1031a190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1031a194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1031a2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_ATS_CAP 3 0xfffe1031a2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_ATS_CNTL 3 0xfffe1031a2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1031a328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_ARI_CAP 3 0xfffe1031a32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF26_1_PCIE_ARI_CNTL 3 0xfffe1031a32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF27_1_VENDOR_ID 3 0xfffe1031b000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_DEVICE_ID 3 0xfffe1031b002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_COMMAND 3 0xfffe1031b004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF27_1_STATUS 3 0xfffe1031b006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_REVISION_ID 3 0xfffe1031b008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_PROG_INTERFACE 3 0xfffe1031b009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_SUB_CLASS 3 0xfffe1031b00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_BASE_CLASS 3 0xfffe1031b00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_CACHE_LINE 3 0xfffe1031b00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_LATENCY 3 0xfffe1031b00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_HEADER 3 0xfffe1031b00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_BIST 3 0xfffe1031b00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_BASE_ADDR_1 3 0xfffe1031b010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_BASE_ADDR_2 3 0xfffe1031b014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_BASE_ADDR_3 3 0xfffe1031b018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_BASE_ADDR_4 3 0xfffe1031b01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_BASE_ADDR_5 3 0xfffe1031b020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_BASE_ADDR_6 3 0xfffe1031b024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_CARDBUS_CIS_PTR 3 0xfffe1031b028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_ADAPTER_ID 3 0xfffe1031b02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_ROM_BASE_ADDR 3 0xfffe1031b030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_CAP_PTR 3 0xfffe1031b034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_INTERRUPT_LINE 3 0xfffe1031b03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_INTERRUPT_PIN 3 0xfffe1031b03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_MIN_GRANT 3 0xfffe1031b03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_MAX_LATENCY 3 0xfffe1031b03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_CAP_LIST 3 0xfffe1031b064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_CAP 3 0xfffe1031b066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF27_1_DEVICE_CAP 3 0xfffe1031b068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF27_1_DEVICE_CNTL 3 0xfffe1031b06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_DEVICE_STATUS 3 0xfffe1031b06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF27_1_LINK_CAP 3 0xfffe1031b070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_LINK_CNTL 3 0xfffe1031b074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_LINK_STATUS 3 0xfffe1031b076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_DEVICE_CAP2 3 0xfffe1031b088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_DEVICE_CNTL2 3 0xfffe1031b08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_DEVICE_STATUS2 3 0xfffe1031b08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_LINK_CAP2 3 0xfffe1031b090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_LINK_CNTL2 3 0xfffe1031b094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_LINK_STATUS2 3 0xfffe1031b096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSI_CAP_LIST 3 0xfffe1031b0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSI_MSG_CNTL 3 0xfffe1031b0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSI_MSG_ADDR_LO 3 0xfffe1031b0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSI_MSG_ADDR_HI 3 0xfffe1031b0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSI_MSG_DATA 3 0xfffe1031b0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSI_MASK 3 0xfffe1031b0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSI_MSG_DATA_64 3 0xfffe1031b0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSI_MASK_64 3 0xfffe1031b0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSI_PENDING 3 0xfffe1031b0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSI_PENDING_64 3 0xfffe1031b0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSIX_CAP_LIST 3 0xfffe1031b0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSIX_MSG_CNTL 3 0xfffe1031b0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSIX_TABLE 3 0xfffe1031b0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_MSIX_PBA 3 0xfffe1031b0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1031b100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1031b104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1031b108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031b10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1031b150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1031b154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1031b158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031b15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_CORR_ERR_STATUS 3 0xfffe1031b160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_CORR_ERR_MASK 3 0xfffe1031b164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1031b168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_HDR_LOG0 3 0xfffe1031b16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_HDR_LOG1 3 0xfffe1031b170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_HDR_LOG2 3 0xfffe1031b174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_HDR_LOG3 3 0xfffe1031b178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1031b188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031b18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1031b190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1031b194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1031b2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_ATS_CAP 3 0xfffe1031b2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_ATS_CNTL 3 0xfffe1031b2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1031b328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_ARI_CAP 3 0xfffe1031b32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF27_1_PCIE_ARI_CNTL 3 0xfffe1031b32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF28_1_VENDOR_ID 3 0xfffe1031c000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_DEVICE_ID 3 0xfffe1031c002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_COMMAND 3 0xfffe1031c004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF28_1_STATUS 3 0xfffe1031c006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_REVISION_ID 3 0xfffe1031c008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_PROG_INTERFACE 3 0xfffe1031c009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_SUB_CLASS 3 0xfffe1031c00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_BASE_CLASS 3 0xfffe1031c00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_CACHE_LINE 3 0xfffe1031c00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_LATENCY 3 0xfffe1031c00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_HEADER 3 0xfffe1031c00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_BIST 3 0xfffe1031c00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_BASE_ADDR_1 3 0xfffe1031c010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_BASE_ADDR_2 3 0xfffe1031c014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_BASE_ADDR_3 3 0xfffe1031c018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_BASE_ADDR_4 3 0xfffe1031c01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_BASE_ADDR_5 3 0xfffe1031c020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_BASE_ADDR_6 3 0xfffe1031c024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_CARDBUS_CIS_PTR 3 0xfffe1031c028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_ADAPTER_ID 3 0xfffe1031c02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_ROM_BASE_ADDR 3 0xfffe1031c030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_CAP_PTR 3 0xfffe1031c034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_INTERRUPT_LINE 3 0xfffe1031c03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_INTERRUPT_PIN 3 0xfffe1031c03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_MIN_GRANT 3 0xfffe1031c03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_MAX_LATENCY 3 0xfffe1031c03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_CAP_LIST 3 0xfffe1031c064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_CAP 3 0xfffe1031c066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF28_1_DEVICE_CAP 3 0xfffe1031c068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF28_1_DEVICE_CNTL 3 0xfffe1031c06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_DEVICE_STATUS 3 0xfffe1031c06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF28_1_LINK_CAP 3 0xfffe1031c070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_LINK_CNTL 3 0xfffe1031c074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_LINK_STATUS 3 0xfffe1031c076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_DEVICE_CAP2 3 0xfffe1031c088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_DEVICE_CNTL2 3 0xfffe1031c08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_DEVICE_STATUS2 3 0xfffe1031c08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_LINK_CAP2 3 0xfffe1031c090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_LINK_CNTL2 3 0xfffe1031c094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_LINK_STATUS2 3 0xfffe1031c096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSI_CAP_LIST 3 0xfffe1031c0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSI_MSG_CNTL 3 0xfffe1031c0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSI_MSG_ADDR_LO 3 0xfffe1031c0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSI_MSG_ADDR_HI 3 0xfffe1031c0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSI_MSG_DATA 3 0xfffe1031c0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSI_MASK 3 0xfffe1031c0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSI_MSG_DATA_64 3 0xfffe1031c0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSI_MASK_64 3 0xfffe1031c0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSI_PENDING 3 0xfffe1031c0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSI_PENDING_64 3 0xfffe1031c0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSIX_CAP_LIST 3 0xfffe1031c0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSIX_MSG_CNTL 3 0xfffe1031c0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSIX_TABLE 3 0xfffe1031c0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_MSIX_PBA 3 0xfffe1031c0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1031c100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1031c104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1031c108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031c10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1031c150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1031c154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1031c158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031c15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_CORR_ERR_STATUS 3 0xfffe1031c160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_CORR_ERR_MASK 3 0xfffe1031c164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1031c168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_HDR_LOG0 3 0xfffe1031c16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_HDR_LOG1 3 0xfffe1031c170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_HDR_LOG2 3 0xfffe1031c174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_HDR_LOG3 3 0xfffe1031c178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1031c188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031c18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1031c190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1031c194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1031c2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_ATS_CAP 3 0xfffe1031c2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_ATS_CNTL 3 0xfffe1031c2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1031c328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_ARI_CAP 3 0xfffe1031c32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF28_1_PCIE_ARI_CNTL 3 0xfffe1031c32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF29_1_VENDOR_ID 3 0xfffe1031d000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_DEVICE_ID 3 0xfffe1031d002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_COMMAND 3 0xfffe1031d004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF29_1_STATUS 3 0xfffe1031d006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_REVISION_ID 3 0xfffe1031d008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_PROG_INTERFACE 3 0xfffe1031d009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_SUB_CLASS 3 0xfffe1031d00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_BASE_CLASS 3 0xfffe1031d00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_CACHE_LINE 3 0xfffe1031d00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_LATENCY 3 0xfffe1031d00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_HEADER 3 0xfffe1031d00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_BIST 3 0xfffe1031d00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_BASE_ADDR_1 3 0xfffe1031d010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_BASE_ADDR_2 3 0xfffe1031d014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_BASE_ADDR_3 3 0xfffe1031d018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_BASE_ADDR_4 3 0xfffe1031d01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_BASE_ADDR_5 3 0xfffe1031d020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_BASE_ADDR_6 3 0xfffe1031d024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_CARDBUS_CIS_PTR 3 0xfffe1031d028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_ADAPTER_ID 3 0xfffe1031d02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_ROM_BASE_ADDR 3 0xfffe1031d030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_CAP_PTR 3 0xfffe1031d034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_INTERRUPT_LINE 3 0xfffe1031d03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_INTERRUPT_PIN 3 0xfffe1031d03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_MIN_GRANT 3 0xfffe1031d03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_MAX_LATENCY 3 0xfffe1031d03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_CAP_LIST 3 0xfffe1031d064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_CAP 3 0xfffe1031d066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF29_1_DEVICE_CAP 3 0xfffe1031d068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF29_1_DEVICE_CNTL 3 0xfffe1031d06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_DEVICE_STATUS 3 0xfffe1031d06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF29_1_LINK_CAP 3 0xfffe1031d070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_LINK_CNTL 3 0xfffe1031d074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_LINK_STATUS 3 0xfffe1031d076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_DEVICE_CAP2 3 0xfffe1031d088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_DEVICE_CNTL2 3 0xfffe1031d08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_DEVICE_STATUS2 3 0xfffe1031d08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_LINK_CAP2 3 0xfffe1031d090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_LINK_CNTL2 3 0xfffe1031d094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_LINK_STATUS2 3 0xfffe1031d096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSI_CAP_LIST 3 0xfffe1031d0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSI_MSG_CNTL 3 0xfffe1031d0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSI_MSG_ADDR_LO 3 0xfffe1031d0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSI_MSG_ADDR_HI 3 0xfffe1031d0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSI_MSG_DATA 3 0xfffe1031d0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSI_MASK 3 0xfffe1031d0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSI_MSG_DATA_64 3 0xfffe1031d0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSI_MASK_64 3 0xfffe1031d0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSI_PENDING 3 0xfffe1031d0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSI_PENDING_64 3 0xfffe1031d0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSIX_CAP_LIST 3 0xfffe1031d0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSIX_MSG_CNTL 3 0xfffe1031d0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSIX_TABLE 3 0xfffe1031d0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_MSIX_PBA 3 0xfffe1031d0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1031d100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1031d104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1031d108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031d10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1031d150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1031d154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1031d158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031d15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_CORR_ERR_STATUS 3 0xfffe1031d160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_CORR_ERR_MASK 3 0xfffe1031d164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1031d168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_HDR_LOG0 3 0xfffe1031d16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_HDR_LOG1 3 0xfffe1031d170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_HDR_LOG2 3 0xfffe1031d174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_HDR_LOG3 3 0xfffe1031d178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1031d188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031d18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1031d190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1031d194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1031d2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_ATS_CAP 3 0xfffe1031d2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_ATS_CNTL 3 0xfffe1031d2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1031d328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_ARI_CAP 3 0xfffe1031d32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF29_1_PCIE_ARI_CNTL 3 0xfffe1031d32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgBIF_CFG_DEV0_EPF0_VF30_1_VENDOR_ID 3 0xfffe1031e000 1 0 4294967295 VENDOR_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_DEVICE_ID 3 0xfffe1031e002 1 0 4294967295 DEVICE_ID 0 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_COMMAND 3 0xfffe1031e004 11 0 4294967295 IO_ACCESS_EN 0 0 MEM_ACCESS_EN 1 1 BUS_MASTER_EN 2 2 SPECIAL_CYCLE_EN 3 3 MEM_WRITE_INVALIDATE_EN 4 4 PAL_SNOOP_EN 5 5 PARITY_ERROR_RESPONSE 6 6 AD_STEPPING 7 7 SERR_EN 8 8 FAST_B2B_EN 9 9 INT_DIS 10 10 cfgBIF_CFG_DEV0_EPF0_VF30_1_STATUS 3 0xfffe1031e006 12 0 4294967295 IMMEDIATE_READINESS 0 0 INT_STATUS 3 3 CAP_LIST 4 4 PCI_66_CAP 5 5 FAST_BACK_CAPABLE 7 7 MASTER_DATA_PARITY_ERROR 8 8 DEVSEL_TIMING 9 10 SIGNAL_TARGET_ABORT 11 11 RECEIVED_TARGET_ABORT 12 12 RECEIVED_MASTER_ABORT 13 13 SIGNALED_SYSTEM_ERROR 14 14 PARITY_ERROR_DETECTED 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_REVISION_ID 3 0xfffe1031e008 2 0 4294967295 MINOR_REV_ID 0 3 MAJOR_REV_ID 4 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_PROG_INTERFACE 3 0xfffe1031e009 1 0 4294967295 PROG_INTERFACE 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_SUB_CLASS 3 0xfffe1031e00a 1 0 4294967295 SUB_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_BASE_CLASS 3 0xfffe1031e00b 1 0 4294967295 BASE_CLASS 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_CACHE_LINE 3 0xfffe1031e00c 1 0 4294967295 CACHE_LINE_SIZE 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_LATENCY 3 0xfffe1031e00d 1 0 4294967295 LATENCY_TIMER 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_HEADER 3 0xfffe1031e00e 2 0 4294967295 HEADER_TYPE 0 6 DEVICE_TYPE 7 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_BIST 3 0xfffe1031e00f 3 0 4294967295 BIST_COMP 0 3 BIST_STRT 6 6 BIST_CAP 7 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_BASE_ADDR_1 3 0xfffe1031e010 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_BASE_ADDR_2 3 0xfffe1031e014 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_BASE_ADDR_3 3 0xfffe1031e018 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_BASE_ADDR_4 3 0xfffe1031e01c 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_BASE_ADDR_5 3 0xfffe1031e020 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_BASE_ADDR_6 3 0xfffe1031e024 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_CARDBUS_CIS_PTR 3 0xfffe1031e028 1 0 4294967295 CARDBUS_CIS_PTR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_ADAPTER_ID 3 0xfffe1031e02c 2 0 4294967295 SUBSYSTEM_VENDOR_ID 0 15 SUBSYSTEM_ID 16 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_ROM_BASE_ADDR 3 0xfffe1031e030 1 0 4294967295 BASE_ADDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_CAP_PTR 3 0xfffe1031e034 1 0 4294967295 CAP_PTR 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_INTERRUPT_LINE 3 0xfffe1031e03c 1 0 4294967295 INTERRUPT_LINE 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_INTERRUPT_PIN 3 0xfffe1031e03d 1 0 4294967295 INTERRUPT_PIN 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_MIN_GRANT 3 0xfffe1031e03e 1 0 4294967295 MIN_GNT 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_MAX_LATENCY 3 0xfffe1031e03f 1 0 4294967295 MAX_LAT 0 7 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_CAP_LIST 3 0xfffe1031e064 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_CAP 3 0xfffe1031e066 4 0 4294967295 VERSION 0 3 DEVICE_TYPE 4 7 SLOT_IMPLEMENTED 8 8 INT_MESSAGE_NUM 9 13 cfgBIF_CFG_DEV0_EPF0_VF30_1_DEVICE_CAP 3 0xfffe1031e068 9 0 4294967295 MAX_PAYLOAD_SUPPORT 0 2 PHANTOM_FUNC 3 4 EXTENDED_TAG 5 5 L0S_ACCEPTABLE_LATENCY 6 8 L1_ACCEPTABLE_LATENCY 9 11 ROLE_BASED_ERR_REPORTING 15 15 CAPTURED_SLOT_POWER_LIMIT 18 25 CAPTURED_SLOT_POWER_SCALE 26 27 FLR_CAPABLE 28 28 cfgBIF_CFG_DEV0_EPF0_VF30_1_DEVICE_CNTL 3 0xfffe1031e06c 12 0 4294967295 CORR_ERR_EN 0 0 NON_FATAL_ERR_EN 1 1 FATAL_ERR_EN 2 2 USR_REPORT_EN 3 3 RELAXED_ORD_EN 4 4 MAX_PAYLOAD_SIZE 5 7 EXTENDED_TAG_EN 8 8 PHANTOM_FUNC_EN 9 9 AUX_POWER_PM_EN 10 10 NO_SNOOP_EN 11 11 MAX_READ_REQUEST_SIZE 12 14 INITIATE_FLR 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_DEVICE_STATUS 3 0xfffe1031e06e 7 0 4294967295 CORR_ERR 0 0 NON_FATAL_ERR 1 1 FATAL_ERR 2 2 USR_DETECTED 3 3 AUX_PWR 4 4 TRANSACTIONS_PEND 5 5 EMER_POWER_REDUCTION_DETECTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF30_1_LINK_CAP 3 0xfffe1031e070 11 0 4294967295 LINK_SPEED 0 3 LINK_WIDTH 4 9 PM_SUPPORT 10 11 L0S_EXIT_LATENCY 12 14 L1_EXIT_LATENCY 15 17 CLOCK_POWER_MANAGEMENT 18 18 SURPRISE_DOWN_ERR_REPORTING 19 19 DL_ACTIVE_REPORTING_CAPABLE 20 20 LINK_BW_NOTIFICATION_CAP 21 21 ASPM_OPTIONALITY_COMPLIANCE 22 22 PORT_NUMBER 24 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_LINK_CNTL 3 0xfffe1031e074 11 0 4294967295 PM_CONTROL 0 1 READ_CPL_BOUNDARY 3 3 LINK_DIS 4 4 RETRAIN_LINK 5 5 COMMON_CLOCK_CFG 6 6 EXTENDED_SYNC 7 7 CLOCK_POWER_MANAGEMENT_EN 8 8 HW_AUTONOMOUS_WIDTH_DISABLE 9 9 LINK_BW_MANAGEMENT_INT_EN 10 10 LINK_AUTONOMOUS_BW_INT_EN 11 11 DRS_SIGNALING_CONTROL 14 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_LINK_STATUS 3 0xfffe1031e076 7 0 4294967295 CURRENT_LINK_SPEED 0 3 NEGOTIATED_LINK_WIDTH 4 9 LINK_TRAINING 11 11 SLOT_CLOCK_CFG 12 12 DL_ACTIVE 13 13 LINK_BW_MANAGEMENT_STATUS 14 14 LINK_AUTONOMOUS_BW_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_DEVICE_CAP2 3 0xfffe1031e088 20 0 4294967295 CPL_TIMEOUT_RANGE_SUPPORTED 0 3 CPL_TIMEOUT_DIS_SUPPORTED 4 4 ARI_FORWARDING_SUPPORTED 5 5 ATOMICOP_ROUTING_SUPPORTED 6 6 ATOMICOP_32CMPLT_SUPPORTED 7 7 ATOMICOP_64CMPLT_SUPPORTED 8 8 CAS128_CMPLT_SUPPORTED 9 9 NO_RO_ENABLED_P2P_PASSING 10 10 LTR_SUPPORTED 11 11 TPH_CPLR_SUPPORTED 12 13 LN_SYSTEM_CLS 14 15 TEN_BIT_TAG_COMPLETER_SUPPORTED 16 16 TEN_BIT_TAG_REQUESTER_SUPPORTED 17 17 OBFF_SUPPORTED 18 19 EXTENDED_FMT_FIELD_SUPPORTED 20 20 END_END_TLP_PREFIX_SUPPORTED 21 21 MAX_END_END_TLP_PREFIXES 22 23 EMER_POWER_REDUCTION_SUPPORTED 24 25 EMER_POWER_REDUCTION_INIT_REQ 26 26 FRS_SUPPORTED 31 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_DEVICE_CNTL2 3 0xfffe1031e08c 12 0 4294967295 CPL_TIMEOUT_VALUE 0 3 CPL_TIMEOUT_DIS 4 4 ARI_FORWARDING_EN 5 5 ATOMICOP_REQUEST_EN 6 6 ATOMICOP_EGRESS_BLOCKING 7 7 IDO_REQUEST_ENABLE 8 8 IDO_COMPLETION_ENABLE 9 9 LTR_EN 10 10 EMER_POWER_REDUCTION_REQUEST 11 11 TEN_BIT_TAG_REQUESTER_ENABLE 12 12 OBFF_EN 13 14 END_END_TLP_PREFIX_BLOCKING 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_DEVICE_STATUS2 3 0xfffe1031e08e 1 0 4294967295 RESERVED 0 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_LINK_CAP2 3 0xfffe1031e090 7 0 4294967295 SUPPORTED_LINK_SPEED 1 7 CROSSLINK_SUPPORTED 8 8 LOWER_SKP_OS_GEN_SUPPORT 9 15 LOWER_SKP_OS_RCV_SUPPORT 16 22 RTM1_PRESENCE_DET_SUPPORT 23 23 RTM2_PRESENCE_DET_SUPPORT 24 24 DRS_SUPPORTEDRESERVED 31 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_LINK_CNTL2 3 0xfffe1031e094 8 0 4294967295 TARGET_LINK_SPEED 0 3 ENTER_COMPLIANCE 4 4 HW_AUTONOMOUS_SPEED_DISABLE 5 5 SELECTABLE_DEEMPHASIS 6 6 XMIT_MARGIN 7 9 ENTER_MOD_COMPLIANCE 10 10 COMPLIANCE_SOS 11 11 COMPLIANCE_DEEMPHASIS 12 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_LINK_STATUS2 3 0xfffe1031e096 11 0 4294967295 CUR_DEEMPHASIS_LEVEL 0 0 EQUALIZATION_COMPLETE_8GT 1 1 EQUALIZATION_PHASE1_SUCCESS_8GT 2 2 EQUALIZATION_PHASE2_SUCCESS_8GT 3 3 EQUALIZATION_PHASE3_SUCCESS_8GT 4 4 LINK_EQUALIZATION_REQUEST_8GT 5 5 RTM1_PRESENCE_DET 6 6 RTM2_PRESENCE_DET 7 7 CROSSLINK_RESOLUTION 8 9 DOWNSTREAM_COMPONENT_PRESENCE 12 14 DRS_MESSAGE_RECEIVED 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSI_CAP_LIST 3 0xfffe1031e0a0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSI_MSG_CNTL 3 0xfffe1031e0a2 5 0 4294967295 MSI_EN 0 0 MSI_MULTI_CAP 1 3 MSI_MULTI_EN 4 6 MSI_64BIT 7 7 MSI_PERVECTOR_MASKING_CAP 8 8 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSI_MSG_ADDR_LO 3 0xfffe1031e0a4 1 0 4294967295 MSI_MSG_ADDR_LO 2 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSI_MSG_ADDR_HI 3 0xfffe1031e0a8 1 0 4294967295 MSI_MSG_ADDR_HI 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSI_MSG_DATA 3 0xfffe1031e0a8 1 0 4294967295 MSI_DATA 0 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSI_MASK 3 0xfffe1031e0ac 1 0 4294967295 MSI_MASK 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSI_MSG_DATA_64 3 0xfffe1031e0ac 1 0 4294967295 MSI_DATA_64 0 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSI_MASK_64 3 0xfffe1031e0b0 1 0 4294967295 MSI_MASK_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSI_PENDING 3 0xfffe1031e0b0 1 0 4294967295 MSI_PENDING 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSI_PENDING_64 3 0xfffe1031e0b4 1 0 4294967295 MSI_PENDING_64 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSIX_CAP_LIST 3 0xfffe1031e0c0 2 0 4294967295 CAP_ID 0 7 NEXT_PTR 8 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSIX_MSG_CNTL 3 0xfffe1031e0c2 3 0 4294967295 MSIX_TABLE_SIZE 0 10 MSIX_FUNC_MASK 14 14 MSIX_EN 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSIX_TABLE 3 0xfffe1031e0c4 2 0 4294967295 MSIX_TABLE_BIR 0 2 MSIX_TABLE_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_MSIX_PBA 3 0xfffe1031e0c8 2 0 4294967295 MSIX_PBA_BIR 0 2 MSIX_PBA_OFFSET 3 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST 3 0xfffe1031e100 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_VENDOR_SPECIFIC_HDR 3 0xfffe1031e104 3 0 4294967295 VSEC_ID 0 15 VSEC_REV 16 19 VSEC_LENGTH 20 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_VENDOR_SPECIFIC1 3 0xfffe1031e108 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_VENDOR_SPECIFIC2 3 0xfffe1031e10c 1 0 4294967295 SCRATCH 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_ADV_ERR_RPT_ENH_CAP_LIST 3 0xfffe1031e150 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_UNCORR_ERR_STATUS 3 0xfffe1031e154 16 0 4294967295 DLP_ERR_STATUS 4 4 SURPDN_ERR_STATUS 5 5 PSN_ERR_STATUS 12 12 FC_ERR_STATUS 13 13 CPL_TIMEOUT_STATUS 14 14 CPL_ABORT_ERR_STATUS 15 15 UNEXP_CPL_STATUS 16 16 RCV_OVFL_STATUS 17 17 MAL_TLP_STATUS 18 18 ECRC_ERR_STATUS 19 19 UNSUPP_REQ_ERR_STATUS 20 20 ACS_VIOLATION_STATUS 21 21 UNCORR_INT_ERR_STATUS 22 22 MC_BLOCKED_TLP_STATUS 23 23 ATOMICOP_EGRESS_BLOCKED_STATUS 24 24 TLP_PREFIX_BLOCKED_ERR_STATUS 25 25 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_UNCORR_ERR_MASK 3 0xfffe1031e158 16 0 4294967295 DLP_ERR_MASK 4 4 SURPDN_ERR_MASK 5 5 PSN_ERR_MASK 12 12 FC_ERR_MASK 13 13 CPL_TIMEOUT_MASK 14 14 CPL_ABORT_ERR_MASK 15 15 UNEXP_CPL_MASK 16 16 RCV_OVFL_MASK 17 17 MAL_TLP_MASK 18 18 ECRC_ERR_MASK 19 19 UNSUPP_REQ_ERR_MASK 20 20 ACS_VIOLATION_MASK 21 21 UNCORR_INT_ERR_MASK 22 22 MC_BLOCKED_TLP_MASK 23 23 ATOMICOP_EGRESS_BLOCKED_MASK 24 24 TLP_PREFIX_BLOCKED_ERR_MASK 25 25 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_UNCORR_ERR_SEVERITY 3 0xfffe1031e15c 16 0 4294967295 DLP_ERR_SEVERITY 4 4 SURPDN_ERR_SEVERITY 5 5 PSN_ERR_SEVERITY 12 12 FC_ERR_SEVERITY 13 13 CPL_TIMEOUT_SEVERITY 14 14 CPL_ABORT_ERR_SEVERITY 15 15 UNEXP_CPL_SEVERITY 16 16 RCV_OVFL_SEVERITY 17 17 MAL_TLP_SEVERITY 18 18 ECRC_ERR_SEVERITY 19 19 UNSUPP_REQ_ERR_SEVERITY 20 20 ACS_VIOLATION_SEVERITY 21 21 UNCORR_INT_ERR_SEVERITY 22 22 MC_BLOCKED_TLP_SEVERITY 23 23 ATOMICOP_EGRESS_BLOCKED_SEVERITY 24 24 TLP_PREFIX_BLOCKED_ERR_SEVERITY 25 25 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_CORR_ERR_STATUS 3 0xfffe1031e160 8 0 4294967295 RCV_ERR_STATUS 0 0 BAD_TLP_STATUS 6 6 BAD_DLLP_STATUS 7 7 REPLAY_NUM_ROLLOVER_STATUS 8 8 REPLAY_TIMER_TIMEOUT_STATUS 12 12 ADVISORY_NONFATAL_ERR_STATUS 13 13 CORR_INT_ERR_STATUS 14 14 HDR_LOG_OVFL_STATUS 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_CORR_ERR_MASK 3 0xfffe1031e164 8 0 4294967295 RCV_ERR_MASK 0 0 BAD_TLP_MASK 6 6 BAD_DLLP_MASK 7 7 REPLAY_NUM_ROLLOVER_MASK 8 8 REPLAY_TIMER_TIMEOUT_MASK 12 12 ADVISORY_NONFATAL_ERR_MASK 13 13 CORR_INT_ERR_MASK 14 14 HDR_LOG_OVFL_MASK 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_ADV_ERR_CAP_CNTL 3 0xfffe1031e168 9 0 4294967295 FIRST_ERR_PTR 0 4 ECRC_GEN_CAP 5 5 ECRC_GEN_EN 6 6 ECRC_CHECK_CAP 7 7 ECRC_CHECK_EN 8 8 MULTI_HDR_RECD_CAP 9 9 MULTI_HDR_RECD_EN 10 10 TLP_PREFIX_LOG_PRESENT 11 11 COMPLETION_TIMEOUT_LOG_CAPABLE 12 12 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_HDR_LOG0 3 0xfffe1031e16c 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_HDR_LOG1 3 0xfffe1031e170 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_HDR_LOG2 3 0xfffe1031e174 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_HDR_LOG3 3 0xfffe1031e178 1 0 4294967295 TLP_HDR 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_TLP_PREFIX_LOG0 3 0xfffe1031e188 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_TLP_PREFIX_LOG1 3 0xfffe1031e18c 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_TLP_PREFIX_LOG2 3 0xfffe1031e190 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_TLP_PREFIX_LOG3 3 0xfffe1031e194 1 0 4294967295 TLP_PREFIX 0 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_ATS_ENH_CAP_LIST 3 0xfffe1031e2b0 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_ATS_CAP 3 0xfffe1031e2b4 3 0 4294967295 INVALIDATE_Q_DEPTH 0 4 PAGE_ALIGNED_REQUEST 5 5 GLOBAL_INVALIDATE_SUPPORTED 6 6 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_ATS_CNTL 3 0xfffe1031e2b6 2 0 4294967295 STU 0 4 ATC_ENABLE 15 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_ARI_ENH_CAP_LIST 3 0xfffe1031e328 3 0 4294967295 CAP_ID 0 15 CAP_VER 16 19 NEXT_PTR 20 31 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_ARI_CAP 3 0xfffe1031e32c 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_CAP 0 0 ARI_ACS_FUNC_GROUPS_CAP 1 1 ARI_NEXT_FUNC_NUM 8 15 cfgBIF_CFG_DEV0_EPF0_VF30_1_PCIE_ARI_CNTL 3 0xfffe1031e32e 3 0 4294967295 ARI_MFVC_FUNC_GROUPS_EN 0 0 ARI_ACS_FUNC_GROUPS_EN 1 1 ARI_FUNCTION_GROUP 4 6 cfgSHADOW_COMMAND 3 0xfffe30000004 2 0 4294967295 IOEN_UP 0 0 MEMEN_UP 1 1 cfgSHADOW_BASE_ADDR_1 3 0xfffe30000010 1 0 4294967295 BAR1_UP 0 31 cfgSHADOW_BASE_ADDR_2 3 0xfffe30000014 1 0 4294967295 BAR2_UP 0 31 cfgSHADOW_SUB_BUS_NUMBER_LATENCY 3 0xfffe30000018 2 0 4294967295 SECONDARY_BUS_UP 8 15 SUB_BUS_NUM_UP 16 23 cfgSHADOW_IO_BASE_LIMIT 3 0xfffe3000001c 2 0 4294967295 IO_BASE_UP 4 7 IO_LIMIT_UP 12 15 cfgSHADOW_MEM_BASE_LIMIT 3 0xfffe30000020 4 0 4294967295 MEM_BASE_TYPE 0 3 MEM_BASE_31_20_UP 4 15 MEM_LIMIT_TYPE 16 19 MEM_LIMIT_31_20_UP 20 31 cfgSHADOW_PREF_BASE_LIMIT 3 0xfffe30000024 4 0 4294967295 PREF_MEM_BASE_TYPE 0 3 PREF_MEM_BASE_31_20_UP 4 15 PREF_MEM_LIMIT_TYPE 16 19 PREF_MEM_LIMIT_31_20_UP 20 31 cfgSHADOW_PREF_BASE_UPPER 3 0xfffe30000028 1 0 4294967295 PREF_BASE_UPPER_UP 0 31 cfgSHADOW_PREF_LIMIT_UPPER 3 0xfffe3000002c 1 0 4294967295 PREF_LIMIT_UPPER_UP 0 31 cfgSHADOW_IO_BASE_LIMIT_HI 3 0xfffe30000030 2 0 4294967295 IO_BASE_31_16_UP 0 15 IO_LIMIT_31_16_UP 16 31 cfgSHADOW_IRQ_BRIDGE_CNTL 3 0xfffe3000003e 4 0 4294967295 ISA_EN_UP 2 2 VGA_EN_UP 3 3 VGA_DEC_UP 4 4 SECONDARY_BUS_RESET_UP 6 6 cfgSUC_INDEX 3 0xfffe300000e0 1 0 4294967295 SUC_INDEX 0 31 cfgSUC_DATA 3 0xfffe300000e4 1 0 4294967295 SUC_DATA 0 31 cfgBIF_BX_PF1_MM_INDEX 3 0x30300000 2 0 4294967295 MM_OFFSET 0 30 MM_APER 31 31 cfgBIF_BX_PF1_MM_DATA 3 0x30300004 1 0 4294967295 MM_DATA 0 31 cfgBIF_BX_PF1_MM_INDEX_HI 3 0x30300018 1 0 4294967295 MM_OFFSET_HI 0 31 cfgSYSHUB_INDEX_OVLP 3 0x30300020 0 0 4294967295 cfgSYSHUB_DATA_OVLP 3 0x30300024 0 0 4294967295 cfgPCIE_INDEX 3 0x30300030 0 0 4294967295 cfgPCIE_DATA 3 0x30300034 0 0 4294967295 cfgPCIE_INDEX2 3 0x30300038 0 0 4294967295 cfgPCIE_DATA2 3 0x3030003c 0 0 4294967295 cfgSBIOS_SCRATCH_0 3 0x30300120 0 0 4294967295 cfgSBIOS_SCRATCH_1 3 0x30300124 0 0 4294967295 cfgSBIOS_SCRATCH_2 3 0x30300128 0 0 4294967295 cfgSBIOS_SCRATCH_3 3 0x3030012c 0 0 4294967295 cfgBIOS_SCRATCH_0 3 0x30300130 0 0 4294967295 cfgBIOS_SCRATCH_1 3 0x30300134 0 0 4294967295 cfgBIOS_SCRATCH_2 3 0x30300138 0 0 4294967295 cfgBIOS_SCRATCH_3 3 0x3030013c 0 0 4294967295 cfgBIOS_SCRATCH_4 3 0x30300140 0 0 4294967295 cfgBIOS_SCRATCH_5 3 0x30300144 0 0 4294967295 cfgBIOS_SCRATCH_6 3 0x30300148 0 0 4294967295 cfgBIOS_SCRATCH_7 3 0x3030014c 0 0 4294967295 cfgBIOS_SCRATCH_8 3 0x30300150 0 0 4294967295 cfgBIOS_SCRATCH_9 3 0x30300154 0 0 4294967295 cfgBIOS_SCRATCH_10 3 0x30300158 0 0 4294967295 cfgBIOS_SCRATCH_11 3 0x3030015c 0 0 4294967295 cfgBIOS_SCRATCH_12 3 0x30300160 0 0 4294967295 cfgBIOS_SCRATCH_13 3 0x30300164 0 0 4294967295 cfgBIOS_SCRATCH_14 3 0x30300168 0 0 4294967295 cfgBIOS_SCRATCH_15 3 0x3030016c 0 0 4294967295 cfgBIF_RLC_INTR_CNTL 3 0x30300180 0 0 4294967295 cfgBIF_VCE_INTR_CNTL 3 0x30300184 0 0 4294967295 cfgBIF_UVD_INTR_CNTL 3 0x30300188 0 0 4294967295 cfgGFX_MMIOREG_CAM_ADDR0 3 0x30300200 0 0 4294967295 cfgGFX_MMIOREG_CAM_REMAP_ADDR0 3 0x30300204 0 0 4294967295 cfgGFX_MMIOREG_CAM_ADDR1 3 0x30300208 0 0 4294967295 cfgGFX_MMIOREG_CAM_REMAP_ADDR1 3 0x3030020c 0 0 4294967295 cfgGFX_MMIOREG_CAM_ADDR2 3 0x30300210 0 0 4294967295 cfgGFX_MMIOREG_CAM_REMAP_ADDR2 3 0x30300214 0 0 4294967295 cfgGFX_MMIOREG_CAM_ADDR3 3 0x30300218 0 0 4294967295 cfgGFX_MMIOREG_CAM_REMAP_ADDR3 3 0x3030021c 0 0 4294967295 cfgGFX_MMIOREG_CAM_ADDR4 3 0x30300220 0 0 4294967295 cfgGFX_MMIOREG_CAM_REMAP_ADDR4 3 0x30300224 0 0 4294967295 cfgGFX_MMIOREG_CAM_ADDR5 3 0x30300228 0 0 4294967295 cfgGFX_MMIOREG_CAM_REMAP_ADDR5 3 0x3030022c 0 0 4294967295 cfgGFX_MMIOREG_CAM_ADDR6 3 0x30300230 0 0 4294967295 cfgGFX_MMIOREG_CAM_REMAP_ADDR6 3 0x30300234 0 0 4294967295 cfgGFX_MMIOREG_CAM_ADDR7 3 0x30300238 0 0 4294967295 cfgGFX_MMIOREG_CAM_REMAP_ADDR7 3 0x3030023c 0 0 4294967295 cfgGFX_MMIOREG_CAM_CNTL 3 0x30300240 0 0 4294967295 cfgGFX_MMIOREG_CAM_ZERO_CPL 3 0x30300244 0 0 4294967295 cfgGFX_MMIOREG_CAM_ONE_CPL 3 0x30300248 0 0 4294967295 cfgGFX_MMIOREG_CAM_PROGRAMMABLE_CPL 3 0x3030024c 0 0 4294967295 cfgSYSHUB_INDEX 3 0x30300020 0 0 4294967295 cfgSYSHUB_DATA 3 0x30300024 0 0 4294967295 cfgRCC_BIF_STRAP0 3 0x30303480 0 0 4294967295 cfgRCC_BIF_STRAP1 3 0x30303484 0 0 4294967295 cfgRCC_BIF_STRAP2 3 0x30303488 0 0 4294967295 cfgRCC_BIF_STRAP3 3 0x3030348c 0 0 4294967295 cfgRCC_BIF_STRAP4 3 0x30303490 0 0 4294967295 cfgRCC_BIF_STRAP5 3 0x30303494 0 0 4294967295 cfgRCC_BIF_STRAP6 3 0x30303498 0 0 4294967295 cfgRCC_DEV0_PORT_STRAP0 3 0x3030349c 0 0 4294967295 cfgRCC_DEV0_PORT_STRAP1 3 0x303034a0 0 0 4294967295 cfgRCC_DEV0_PORT_STRAP2 3 0x303034a4 0 0 4294967295 cfgRCC_DEV0_PORT_STRAP3 3 0x303034a8 0 0 4294967295 cfgRCC_DEV0_PORT_STRAP4 3 0x303034ac 0 0 4294967295 cfgRCC_DEV0_PORT_STRAP5 3 0x303034b0 0 0 4294967295 cfgRCC_DEV0_PORT_STRAP6 3 0x303034b4 0 0 4294967295 cfgRCC_DEV0_PORT_STRAP7 3 0x303034b8 0 0 4294967295 cfgRCC_DEV0_PORT_STRAP8 3 0x303034bc 0 0 4294967295 cfgRCC_DEV0_PORT_STRAP9 3 0x303034c0 0 0 4294967295 cfgRCC_DEV0_EPF0_STRAP0 3 0x303034c4 0 0 4294967295 cfgRCC_DEV0_EPF0_STRAP1 3 0x303034c8 0 0 4294967295 cfgRCC_DEV0_EPF0_STRAP13 3 0x303034cc 0 0 4294967295 cfgRCC_DEV0_EPF0_STRAP2 3 0x303034d0 0 0 4294967295 cfgRCC_DEV0_EPF0_STRAP3 3 0x303034d4 0 0 4294967295 cfgRCC_DEV0_EPF0_STRAP4 3 0x303034d8 0 0 4294967295 cfgRCC_DEV0_EPF0_STRAP5 3 0x303034dc 0 0 4294967295 cfgRCC_DEV0_EPF0_STRAP8 3 0x303034e0 0 0 4294967295 cfgRCC_DEV0_EPF0_STRAP9 3 0x303034e4 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP0 3 0x303034e8 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP10 3 0x303034ec 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP11 3 0x303034f0 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP12 3 0x303034f4 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP13 3 0x303034f8 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP2 3 0x303034fc 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP3 3 0x30303500 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP4 3 0x30303504 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP5 3 0x30303508 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP6 3 0x3030350c 0 0 4294967295 cfgRCC_DEV0_EPF1_STRAP7 3 0x30303510 0 0 4294967295 cfgEP_PCIE_SCRATCH 3 0x30303514 0 0 4294967295 cfgEP_PCIE_CNTL 3 0x3030351c 0 0 4294967295 cfgEP_PCIE_INT_CNTL 3 0x30303520 0 0 4294967295 cfgEP_PCIE_INT_STATUS 3 0x30303524 0 0 4294967295 cfgEP_PCIE_RX_CNTL2 3 0x30303528 0 0 4294967295 cfgEP_PCIE_BUS_CNTL 3 0x3030352c 0 0 4294967295 cfgEP_PCIE_CFG_CNTL 3 0x30303530 0 0 4294967295 cfgEP_PCIE_TX_LTR_CNTL 3 0x30303538 0 0 4294967295 cfgPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_0 3 0x3030353c 0 0 4294967295 cfgPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_1 3 0x3030353d 0 0 4294967295 cfgPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_2 3 0x3030353e 0 0 4294967295 cfgPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_3 3 0x3030353f 0 0 4294967295 cfgPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_4 3 0x30303540 0 0 4294967295 cfgPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_5 3 0x30303541 0 0 4294967295 cfgPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_6 3 0x30303542 0 0 4294967295 cfgPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_7 3 0x30303543 0 0 4294967295 cfgEP_PCIE_STRAP_MISC 3 0x30303544 0 0 4294967295 cfgEP_PCIE_STRAP_MISC2 3 0x30303548 0 0 4294967295 cfgEP_PCIE_F0_DPA_CAP 3 0x30303550 0 0 4294967295 cfgEP_PCIE_F0_DPA_LATENCY_INDICATOR 3 0x30303554 0 0 4294967295 cfgEP_PCIE_F0_DPA_CNTL 3 0x30303555 0 0 4294967295 cfgPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_0 3 0x30303557 0 0 4294967295 cfgPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_1 3 0x30303558 0 0 4294967295 cfgPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_2 3 0x30303559 0 0 4294967295 cfgPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_3 3 0x3030355a 0 0 4294967295 cfgPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_4 3 0x3030355b 0 0 4294967295 cfgPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5 3 0x3030355c 0 0 4294967295 cfgPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_6 3 0x3030355d 0 0 4294967295 cfgPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_7 3 0x3030355e 0 0 4294967295 cfgEP_PCIE_PME_CONTROL 3 0x3030355f 0 0 4294967295 cfgEP_PCIEP_RESERVED 3 0x30303560 0 0 4294967295 cfgEP_PCIE_TX_CNTL 3 0x30303568 0 0 4294967295 cfgEP_PCIE_TX_REQUESTER_ID 3 0x3030356c 0 0 4294967295 cfgEP_PCIE_ERR_CNTL 3 0x30303570 0 0 4294967295 cfgEP_PCIE_RX_CNTL 3 0x30303574 0 0 4294967295 cfgEP_PCIE_LC_SPEED_CNTL 3 0x30303578 0 0 4294967295 cfgDN_PCIE_RESERVED 3 0x30303580 0 0 4294967295 cfgDN_PCIE_SCRATCH 3 0x30303584 0 0 4294967295 cfgDN_PCIE_CNTL 3 0x3030358c 0 0 4294967295 cfgDN_PCIE_CONFIG_CNTL 3 0x30303590 0 0 4294967295 cfgDN_PCIE_RX_CNTL2 3 0x30303594 0 0 4294967295 cfgDN_PCIE_BUS_CNTL 3 0x30303598 0 0 4294967295 cfgDN_PCIE_CFG_CNTL 3 0x3030359c 0 0 4294967295 cfgDN_PCIE_STRAP_F0 3 0x303035a0 0 0 4294967295 cfgDN_PCIE_STRAP_MISC 3 0x303035a4 0 0 4294967295 cfgDN_PCIE_STRAP_MISC2 3 0x303035a8 0 0 4294967295 cfgPCIE_ERR_CNTL 3 0x303035bc 0 0 4294967295 cfgPCIE_RX_CNTL 3 0x303035c0 0 0 4294967295 cfgPCIE_LC_SPEED_CNTL 3 0x303035c4 0 0 4294967295 cfgPCIE_LC_CNTL2 3 0x303035c8 0 0 4294967295 cfgPCIEP_STRAP_MISC 3 0x303035cc 0 0 4294967295 cfgLTR_MSG_INFO_FROM_EP 3 0x303035d0 0 0 4294967295 cfgRCC_DEV0_EPF0_RCC_ERR_LOG 3 0x30303694 0 0 4294967295 cfgRCC_DEV0_EPF0_RCC_DOORBELL_APER_EN 3 0x30303780 0 0 4294967295 cfgRCC_DEV0_EPF0_RCC_CONFIG_MEMSIZE 3 0x3030378c 0 0 4294967295 cfgRCC_DEV0_EPF0_RCC_CONFIG_RESERVED 3 0x30303790 0 0 4294967295 cfgRCC_DEV0_EPF0_RCC_IOV_FUNC_IDENTIFIER 3 0x30303794 0 0 4294967295 cfgRCC_ERR_INT_CNTL 3 0x30303698 0 0 4294967295 cfgRCC_BACO_CNTL_MISC 3 0x3030369c 0 0 4294967295 cfgRCC_RESET_EN 3 0x303036a0 0 0 4294967295 cfgRCC_VDM_SUPPORT 3 0x303036a4 0 0 4294967295 cfgRCC_MARGIN_PARAM_CNTL0 3 0x303036a8 0 0 4294967295 cfgRCC_MARGIN_PARAM_CNTL1 3 0x303036ac 0 0 4294967295 cfgRCC_GPUIOV_REGION 3 0x303036b0 0 0 4294967295 cfgRCC_PEER_REG_RANGE0 3 0x30303778 0 0 4294967295 cfgRCC_PEER_REG_RANGE1 3 0x3030377c 0 0 4294967295 cfgRCC_BUS_CNTL 3 0x30303784 0 0 4294967295 cfgRCC_CONFIG_CNTL 3 0x30303788 0 0 4294967295 cfgRCC_CONFIG_F0_BASE 3 0x30303798 0 0 4294967295 cfgRCC_CONFIG_APER_SIZE 3 0x3030379c 0 0 4294967295 cfgRCC_CONFIG_REG_APER_SIZE 3 0x303037a0 0 0 4294967295 cfgRCC_XDMA_LO 3 0x303037a4 0 0 4294967295 cfgRCC_XDMA_HI 3 0x303037a8 0 0 4294967295 cfgRCC_FEATURES_CONTROL_MISC 3 0x303037ac 0 0 4294967295 cfgRCC_BUSNUM_CNTL1 3 0x303037b0 0 0 4294967295 cfgRCC_BUSNUM_LIST0 3 0x303037b4 0 0 4294967295 cfgRCC_BUSNUM_LIST1 3 0x303037b8 0 0 4294967295 cfgRCC_BUSNUM_CNTL2 3 0x303037bc 0 0 4294967295 cfgRCC_CAPTURE_HOST_BUSNUM 3 0x303037c0 0 0 4294967295 cfgRCC_HOST_BUSNUM 3 0x303037c4 0 0 4294967295 cfgRCC_PEER0_FB_OFFSET_HI 3 0x303037c8 0 0 4294967295 cfgRCC_PEER0_FB_OFFSET_LO 3 0x303037cc 0 0 4294967295 cfgRCC_PEER1_FB_OFFSET_HI 3 0x303037d0 0 0 4294967295 cfgRCC_PEER1_FB_OFFSET_LO 3 0x303037d4 0 0 4294967295 cfgRCC_PEER2_FB_OFFSET_HI 3 0x303037d8 0 0 4294967295 cfgRCC_PEER2_FB_OFFSET_LO 3 0x303037dc 0 0 4294967295 cfgRCC_PEER3_FB_OFFSET_HI 3 0x303037e0 0 0 4294967295 cfgRCC_PEER3_FB_OFFSET_LO 3 0x303037e4 0 0 4294967295 cfgRCC_DEVFUNCNUM_LIST0 3 0x303037e8 0 0 4294967295 cfgRCC_DEVFUNCNUM_LIST1 3 0x303037ec 0 0 4294967295 cfgRCC_DEV0_LINK_CNTL 3 0x303037f4 0 0 4294967295 cfgRCC_CMN_LINK_CNTL 3 0x303037f8 0 0 4294967295 cfgRCC_EP_REQUESTERID_RESTORE 3 0x303037fc 0 0 4294967295 cfgRCC_LTR_LSWITCH_CNTL 3 0x30303800 0 0 4294967295 cfgRCC_MH_ARB_CNTL 3 0x30303804 0 0 4294967295 cfgCC_BIF_BX_STRAP0 3 0x30303808 0 0 4294967295 cfgCC_BIF_BX_PINSTRAP0 3 0x30303810 0 0 4294967295 cfgBIF_MM_INDACCESS_CNTL 3 0x30303818 0 0 4294967295 cfgBUS_CNTL 3 0x3030381c 0 0 4294967295 cfgBIF_SCRATCH0 3 0x30303820 0 0 4294967295 cfgBIF_SCRATCH1 3 0x30303824 0 0 4294967295 cfgBX_RESET_EN 3 0x30303834 0 0 4294967295 cfgMM_CFGREGS_CNTL 3 0x30303838 0 0 4294967295 cfgBX_RESET_CNTL 3 0x30303840 0 0 4294967295 cfgINTERRUPT_CNTL 3 0x30303844 0 0 4294967295 cfgINTERRUPT_CNTL2 3 0x30303848 0 0 4294967295 cfgCLKREQB_PAD_CNTL 3 0x30303860 0 0 4294967295 cfgBIF_FEATURES_CONTROL_MISC 3 0x3030386c 0 0 4294967295 cfgBIF_DOORBELL_CNTL 3 0x30303870 0 0 4294967295 cfgBIF_DOORBELL_INT_CNTL 3 0x30303874 0 0 4294967295 cfgBIF_FB_EN 3 0x3030387c 0 0 4294967295 cfgBIF_INTR_CNTL 3 0x30303880 0 0 4294967295 cfgBIF_MST_TRANS_PENDING_VF 3 0x303038a4 0 0 4294967295 cfgBIF_SLV_TRANS_PENDING_VF 3 0x303038a8 0 0 4294967295 cfgBACO_CNTL 3 0x303038ac 0 0 4294967295 cfgBIF_BACO_EXIT_TIME0 3 0x303038b0 0 0 4294967295 cfgBIF_BACO_EXIT_TIMER1 3 0x303038b4 0 0 4294967295 cfgBIF_BACO_EXIT_TIMER2 3 0x303038b8 0 0 4294967295 cfgBIF_BACO_EXIT_TIMER3 3 0x303038bc 0 0 4294967295 cfgBIF_BACO_EXIT_TIMER4 3 0x303038c0 0 0 4294967295 cfgMEM_TYPE_CNTL 3 0x303038c4 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_CNTL 3 0x303038cc 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_0 3 0x303038d0 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_1 3 0x303038d4 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_2 3 0x303038d8 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_3 3 0x303038dc 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_4 3 0x303038e0 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_5 3 0x303038e4 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_6 3 0x303038e8 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_7 3 0x303038ec 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_8 3 0x303038f0 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_9 3 0x303038f4 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_10 3 0x303038f8 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_11 3 0x303038fc 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_12 3 0x30303900 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_13 3 0x30303904 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_14 3 0x30303908 0 0 4294967295 cfgNBIF_GFX_ADDR_LUT_15 3 0x3030390c 0 0 4294967295 cfgREMAP_HDP_MEM_FLUSH_CNTL 3 0x30303934 0 0 4294967295 cfgREMAP_HDP_REG_FLUSH_CNTL 3 0x30303938 0 0 4294967295 cfgBIF_RB_CNTL 3 0x3030393c 0 0 4294967295 cfgBIF_RB_BASE 3 0x30303940 0 0 4294967295 cfgBIF_RB_RPTR 3 0x30303944 0 0 4294967295 cfgBIF_RB_WPTR 3 0x30303948 0 0 4294967295 cfgBIF_RB_WPTR_ADDR_HI 3 0x3030394c 0 0 4294967295 cfgBIF_RB_WPTR_ADDR_LO 3 0x30303950 0 0 4294967295 cfgMAILBOX_INDEX 3 0x30303954 0 0 4294967295 cfgBIF_MP1_INTR_CTRL 3 0x30303988 0 0 4294967295 cfgBIF_UVD_GPUIOV_CFG_SIZE 3 0x3030398c 0 0 4294967295 cfgBIF_VCE_GPUIOV_CFG_SIZE 3 0x30303990 0 0 4294967295 cfgBIF_GFX_SDMA_GPUIOV_CFG_SIZE 3 0x30303994 0 0 4294967295 cfgBIF_PERSTB_PAD_CNTL 3 0x303039a0 0 0 4294967295 cfgBIF_PX_EN_PAD_CNTL 3 0x303039a4 0 0 4294967295 cfgBIF_REFPADKIN_PAD_CNTL 3 0x303039a8 0 0 4294967295 cfgBIF_CLKREQB_PAD_CNTL 3 0x303039ac 0 0 4294967295 cfgBIF_PWRBRK_PAD_CNTL 3 0x303039b0 0 0 4294967295 cfgBIF_WAKEB_PAD_CNTL 3 0x303039b4 0 0 4294967295 cfgBIF_VAUX_PRESENT_PAD_CNTL 3 0x303039b8 0 0 4294967295 cfgBIF_BX_PF_BIF_BME_STATUS 3 0x3030382c 0 0 4294967295 cfgBIF_BX_PF_BIF_ATOMIC_ERR_LOG 3 0x30303830 0 0 4294967295 cfgBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 3 0x3030384c 0 0 4294967295 cfgBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_LOW 3 0x30303850 0 0 4294967295 cfgBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_CNTL 3 0x30303854 0 0 4294967295 cfgBIF_BX_PF_HDP_REG_COHERENCY_FLUSH_CNTL 3 0x30303858 0 0 4294967295 cfgBIF_BX_PF_HDP_MEM_COHERENCY_FLUSH_CNTL 3 0x3030385c 0 0 4294967295 cfgBIF_BX_PF_GPU_HDP_FLUSH_REQ 3 0x30303898 0 0 4294967295 cfgBIF_BX_PF_GPU_HDP_FLUSH_DONE 3 0x3030389c 0 0 4294967295 cfgBIF_BX_PF_BIF_TRANS_PENDING 3 0x303038a0 0 0 4294967295 cfgBIF_BX_PF_NBIF_GFX_ADDR_LUT_BYPASS 3 0x303038c8 0 0 4294967295 cfgBIF_BX_PF_MAILBOX_MSGBUF_TRN_DW0 3 0x30303958 0 0 4294967295 cfgBIF_BX_PF_MAILBOX_MSGBUF_TRN_DW1 3 0x3030395c 0 0 4294967295 cfgBIF_BX_PF_MAILBOX_MSGBUF_TRN_DW2 3 0x30303960 0 0 4294967295 cfgBIF_BX_PF_MAILBOX_MSGBUF_TRN_DW3 3 0x30303964 0 0 4294967295 cfgBIF_BX_PF_MAILBOX_MSGBUF_RCV_DW0 3 0x30303968 0 0 4294967295 cfgBIF_BX_PF_MAILBOX_MSGBUF_RCV_DW1 3 0x3030396c 0 0 4294967295 cfgBIF_BX_PF_MAILBOX_MSGBUF_RCV_DW2 3 0x30303970 0 0 4294967295 cfgBIF_BX_PF_MAILBOX_MSGBUF_RCV_DW3 3 0x30303974 0 0 4294967295 cfgBIF_BX_PF_MAILBOX_CONTROL 3 0x30303978 0 0 4294967295 cfgBIF_BX_PF_MAILBOX_INT_CNTL 3 0x3030397c 0 0 4294967295 cfgBIF_BX_PF_BIF_VMHV_MAILBOX 3 0x30303980 0 0 4294967295 cfgA2S_CNTL_CL0 3 0x30303ac0 0 0 4294967295 cfgA2S_CNTL_CL1 3 0x30303ac4 0 0 4294967295 cfgA2S_CNTL3_CL0 3 0x30303b00 0 0 4294967295 cfgA2S_CNTL3_CL1 3 0x30303b04 0 0 4294967295 cfgA2S_CNTL_SW0 3 0x30303b40 0 0 4294967295 cfgA2S_CNTL_SW1 3 0x30303b44 0 0 4294967295 cfgA2S_CNTL_SW2 3 0x30303b48 0 0 4294967295 cfgA2S_CPLBUF_ALLOC_CNTL 3 0x30303b70 0 0 4294967295 cfgA2S_TAG_ALLOC_0 3 0x30303b74 0 0 4294967295 cfgA2S_TAG_ALLOC_1 3 0x30303b78 0 0 4294967295 cfgA2S_MISC_CNTL 3 0x30303b84 0 0 4294967295 cfgNGDC_SDP_PORT_CTRL 3 0x30303b88 0 0 4294967295 cfgSHUB_REGS_IF_CTL 3 0x30303b8c 0 0 4294967295 cfgNGDC_MGCG_CTRL 3 0x30303ba8 0 0 4294967295 cfgNGDC_RESERVED_0 3 0x30303bac 0 0 4294967295 cfgNGDC_RESERVED_1 3 0x30303bb0 0 0 4294967295 cfgNGDC_SDP_PORT_CTRL_SOCCLK 3 0x30303bb4 0 0 4294967295 cfgBIF_SDMA0_DOORBELL_RANGE 3 0x30303bc0 0 0 4294967295 cfgBIF_SDMA1_DOORBELL_RANGE 3 0x30303bc4 0 0 4294967295 cfgBIF_IH_DOORBELL_RANGE 3 0x30303bc8 0 0 4294967295 cfgBIF_MMSCH0_DOORBELL_RANGE 3 0x30303bcc 0 0 4294967295 cfgBIF_ACV_DOORBELL_RANGE 3 0x30303bd0 0 0 4294967295 cfgBIF_DOORBELL_FENCE_CNTL 3 0x30303bf8 0 0 4294967295 cfgS2A_MISC_CNTL 3 0x30303bfc 0 0 4294967295 cfgNGDC_PG_MISC_CTRL 3 0x30303c40 0 0 4294967295 cfgNGDC_PGMST_CTRL 3 0x30303c44 0 0 4294967295 cfgNGDC_PGSLV_CTRL 3 0x30303c48 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT0_ADDR_LO 3 0x30342000 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT0_ADDR_HI 3 0x30342004 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT0_MSG_DATA 3 0x30342008 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT0_CONTROL 3 0x3034200c 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT1_ADDR_LO 3 0x30342010 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT1_ADDR_HI 3 0x30342014 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT1_MSG_DATA 3 0x30342018 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT1_CONTROL 3 0x3034201c 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT2_ADDR_LO 3 0x30342020 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT2_ADDR_HI 3 0x30342024 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT2_MSG_DATA 3 0x30342028 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT2_CONTROL 3 0x3034202c 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT3_ADDR_LO 3 0x30342030 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT3_ADDR_HI 3 0x30342034 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT3_MSG_DATA 3 0x30342038 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_VECT3_CONTROL 3 0x3034203c 0 0 4294967295 cfgRCC_DEV0_EPF0_GFXMSIX_PBA 3 0x30343000 0 0 4294967295