713 mmGCK_SMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmGCK0_GCK_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmGCK1_GCK_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmGCK2_GCK_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmGCK3_GCK_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmGCK_SMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmGCK0_GCK_SMC_IND_DATA 0 0x81 0 0 4294967295 mmGCK1_GCK_SMC_IND_DATA 0 0x83 0 0 4294967295 mmGCK2_GCK_SMC_IND_DATA 0 0x85 0 0 4294967295 mmGCK3_GCK_SMC_IND_DATA 0 0x87 0 0 4294967295 ixCG_DCLK_CNTL 2 0xc050009c 4 0 4294967295 DCLK_DIVIDER 0 6 DCLK_DIR_CNTL_EN 8 8 DCLK_DIR_CNTL_TOG 9 9 DCLK_DIR_CNTL_DIVIDER 10 16 ixCG_DCLK_STATUS 2 0xc05000a0 2 0 4294967295 DCLK_STATUS 0 0 DCLK_DIR_CNTL_DONETOG 1 1 ixCG_VCLK_CNTL 2 0xc05000a4 4 0 4294967295 VCLK_DIVIDER 0 6 VCLK_DIR_CNTL_EN 8 8 VCLK_DIR_CNTL_TOG 9 9 VCLK_DIR_CNTL_DIVIDER 10 16 ixCG_VCLK_STATUS 2 0xc05000a8 2 0 4294967295 VCLK_STATUS 0 0 VCLK_DIR_CNTL_DONETOG 1 1 ixCG_ECLK_CNTL 2 0xc05000ac 4 0 4294967295 ECLK_DIVIDER 0 6 ECLK_DIR_CNTL_EN 8 8 ECLK_DIR_CNTL_TOG 9 9 ECLK_DIR_CNTL_DIVIDER 10 16 ixCG_ECLK_STATUS 2 0xc05000b0 2 0 4294967295 ECLK_STATUS 0 0 ECLK_DIR_CNTL_DONETOG 1 1 ixCG_ACLK_CNTL 2 0xc05000dc 4 0 4294967295 ACLK_DIVIDER 0 6 ACLK_DIR_CNTL_EN 8 8 ACLK_DIR_CNTL_TOG 9 9 ACLK_DIR_CNTL_DIVIDER 10 16 ixGCK_DFS_BYPASS_CNTL 2 0xc0500118 13 0 4294967295 BYPASSECLK 0 0 BYPASSLCLK 1 1 BYPASSEVCLK 2 2 BYPASSDCLK 3 3 BYPASSVCLK 4 4 BYPASSDISPCLK 5 5 BYPASSDPREFCLK 6 6 BYPASSACLK 7 7 BYPASSADIVCLK 8 8 BYPASSPSPCLK 9 9 BYPASSSAMCLK 10 10 BYPASSSCLK 11 11 USE_SPLL_BYPASS_EN 12 12 ixCG_SPLL_FUNC_CNTL 2 0xc0500140 13 0 4294967295 SPLL_RESET 0 0 SPLL_PWRON 1 1 SPLL_DIVEN 2 2 SPLL_BYPASS_EN 3 3 SPLL_BYPASS_THRU_DFS 4 4 SPLL_REF_DIV 5 10 SPLL_PDIV_A_UPDATE 11 11 SPLL_PDIV_A_EN 12 12 SPLL_BG_PWRON 13 13 SPLL_BGADJ 14 17 SPLL_PDIV_A 18 24 SPLL_REG_BIAS 25 27 SPLL_OTEST_LOCK_EN 28 28 ixCG_SPLL_FUNC_CNTL_2 2 0xc0500144 10 0 4294967295 SCLK_MUX_SEL 0 8 SPLL_CTLREQ 11 11 SPLL_BYPASS_CHG 22 22 SPLL_CTLREQ_CHG 23 23 SPLL_RESET_CHG 24 24 SPLL_BABY_STEP_CHG 25 25 SCLK_MUX_UPDATE 26 26 SPLL_UNLOCK_CLEAR 27 27 SPLL_CLKF_UPDATE 28 28 SPLL_TEST_UNLOCK_CLR 30 30 ixCG_SPLL_FUNC_CNTL_3 2 0xc0500148 2 0 4294967295 SPLL_FB_DIV 0 25 SPLL_DITHEN 28 28 ixCG_SPLL_FUNC_CNTL_4 2 0xc050014c 12 0 4294967295 SPLL_SCLK_TEST_SEL 0 3 SPLL_SCLK_EXT_SEL 5 6 SPLL_SCLK_EN 7 8 SPLL_SSAMP_EN 9 9 SPLL_SPARE 10 18 TEST_FRAC_BYPASS 21 21 SPLL_ILOCK 23 23 SPLL_FBCLK_SEL 24 24 SPLL_VCTRLADC_EN 25 25 SPLL_SCLK_EXT 26 27 SPLL_SPARE_EXT 28 30 SPLL_VTOI_BIAS_CNTL 31 31 ixCG_SPLL_FUNC_CNTL_5 2 0xc0500150 9 0 4294967295 FBDIV_SSC_BYPASS 0 0 RISEFBVCO_EN 1 1 PFD_RESET_CNTRL 2 3 RESET_TIMER 4 5 FAST_LOCK_CNTRL 6 7 FAST_LOCK_EN 8 8 RESET_ANTI_MUX 9 9 REFCLK_BYPASS_EN 10 10 PLLBYPASS 11 11 ixCG_SPLL_FUNC_CNTL_6 2 0xc0500154 6 0 4294967295 SCLKMUX0_CLKOFF_CNT 0 7 SCLKMUX1_CLKOFF_CNT 8 15 SPLL_VCTL_EN 16 16 SPLL_VCTL_CNTRL_IN 17 20 SPLL_VCTL_CNTRL_OUT 21 24 SPLL_LF_CNTR 25 31 ixCG_SPLL_FUNC_CNTL_7 2 0xc0500158 1 0 4294967295 SPLL_BW_CNTRL 0 11 ixSPLL_CNTL_MODE 2 0xc0500160 9 0 4294967295 SPLL_SW_DIR_CONTROL 0 0 SPLL_LEGACY_PDIV 1 1 SPLL_TEST 2 2 SPLL_FASTEN 3 3 SPLL_ENSAT 4 4 SPLL_TEST_CLK_EXT_DIV 10 11 SPLL_CTLREQ_DLY_CNT 12 19 SPLL_RESET_EN 28 28 SPLL_VCO_MODE 29 30 ixCG_SPLL_SPREAD_SPECTRUM 2 0xc0500164 2 0 4294967295 SSEN 0 0 CLKS 4 15 ixCG_SPLL_SPREAD_SPECTRUM_2 2 0xc0500168 1 0 4294967295 CLKV 0 25 ixMPLL_BYPASSCLK_SEL 2 0xc050019c 1 0 4294967295 MPLL_CLKOUT_SEL 8 15 ixCG_CLKPIN_CNTL 2 0xc05001a0 2 0 4294967295 XTALIN_DIVIDE 1 1 BCLK_AS_XCLK 2 2 ixCG_CLKPIN_CNTL_2 2 0xc05001a4 13 0 4294967295 ENABLE_XCLK 0 0 FORCE_BIF_REFCLK_EN 3 3 MUX_TCLK_TO_XCLK 8 8 XO_IN_OSCIN_EN 14 14 XO_IN_ICORE_CLK_OE 15 15 XO_IN_CML_RXEN 16 16 XO_IN_BIDIR_CML_OE 17 17 XO_IN2_OSCIN_EN 18 18 XO_IN2_ICORE_CLK_OE 19 19 XO_IN2_CML_RXEN 20 20 XO_IN2_BIDIR_CML_OE 21 21 CML_CTRL 22 23 CLK_SPARE 24 31 ixTHM_CLK_CNTL 2 0xc05001a8 3 0 4294967295 CMON_CLK_SEL 0 7 TMON_CLK_SEL 8 15 CTF_CLK_SHUTOFF_EN 16 16 ixMISC_CLK_CTRL 2 0xc05001ac 3 0 4294967295 DEEP_SLEEP_CLK_SEL 0 7 ZCLK_SEL 8 15 DFT_SMS_PG_CLK_SEL 16 23 ixGCK_PLL_TEST_CNTL 2 0xc05001c0 5 0 4294967295 TST_SRC_SEL 0 4 TST_REF_SEL 5 9 REF_TEST_COUNT 10 16 TST_RESET 17 17 TST_CLK_SEL_MODE 18 18 ixGCK_PLL_TEST_CNTL_2 2 0xc05001c4 1 0 4294967295 TEST_COUNT 17 31 ixGCK_ADFS_CLK_BYPASS_CNTL1 2 0xc05001c8 10 0 4294967295 ECLK_BYPASS_CNTL 0 2 SCLK_BYPASS_CNTL 3 5 LCLK_BYPASS_CNTL 6 8 DCLK_BYPASS_CNTL 9 11 VCLK_BYPASS_CNTL 12 14 DISPCLK_BYPASS_CNTL 15 17 DRREFCLK_BYPASS_CNTL 18 20 ACLK_BYPASS_CNTL 21 23 SAMCLK_BYPASS_CNTL 24 26 ACLK_DIV_BYPASS_CNTL 27 29 mmSMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC0_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmSMC1_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmSMC2_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmSMC3_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmSMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC0_SMC_IND_DATA 0 0x81 0 0 4294967295 mmSMC1_SMC_IND_DATA 0 0x83 0 0 4294967295 mmSMC2_SMC_IND_DATA 0 0x85 0 0 4294967295 mmSMC3_SMC_IND_DATA 0 0x87 0 0 4294967295 mmSMC_IND_INDEX_0 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_0 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_1 0 0x82 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_1 0 0x83 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_2 0 0x84 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_2 0 0x85 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_3 0 0x86 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_3 0 0x87 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_4 0 0x88 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_4 0 0x89 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_5 0 0x8a 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_5 0 0x8b 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_6 0 0x8c 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_6 0 0x8d 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_7 0 0x8e 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_7 0 0x8f 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_ACCESS_CNTL 0 0x90 8 0 4294967295 AUTO_INCREMENT_IND_0 0 0 AUTO_INCREMENT_IND_1 1 1 AUTO_INCREMENT_IND_2 2 2 AUTO_INCREMENT_IND_3 3 3 AUTO_INCREMENT_IND_4 4 4 AUTO_INCREMENT_IND_5 5 5 AUTO_INCREMENT_IND_6 6 6 AUTO_INCREMENT_IND_7 7 7 mmSMC_MESSAGE_0 0 0x94 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_0 0 0x95 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_1 0 0x96 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_1 0 0x97 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_2 0 0x98 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_2 0 0x99 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_3 0 0x9a 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_3 0 0x9b 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_4 0 0x9c 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_4 0 0x9d 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_5 0 0x9e 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_5 0 0x9f 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_6 0 0xa0 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_6 0 0xa1 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_7 0 0xa2 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_7 0 0xa3 1 0 4294967295 SMC_RESP 0 15 mmSMC_MSG_ARG_0 0 0xa4 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_1 0 0xa5 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_2 0 0xa6 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_3 0 0xa7 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_4 0 0xa8 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_5 0 0xa9 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_6 0 0xaa 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_7 0 0xab 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MESSAGE_8 0 0xb5 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_8 0 0xb6 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_9 0 0xb7 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_9 0 0xb8 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_10 0 0xb9 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_10 0 0xba 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_11 0 0xbb 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_11 0 0xbc 1 0 4294967295 SMC_RESP 0 15 mmSMC_MSG_ARG_8 0 0xbd 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_9 0 0xbe 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_10 0 0xbf 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_11 0 0x91 1 0 4294967295 SMC_MSG_ARG 0 31 ixSMC_SYSCON_RESET_CNTL 2 0x80000000 3 0 4294967295 rst_reg 0 0 srbm_soft_rst_override 1 1 RegReset 30 30 ixSMC_SYSCON_CLOCK_CNTL_0 2 0x80000004 4 0 4294967295 ck_disable 0 0 auto_cg_en 1 1 auto_cg_timeout 8 23 cken 24 24 ixSMC_SYSCON_CLOCK_CNTL_1 2 0x80000008 1 0 4294967295 auto_ck_disable 0 0 ixSMC_SYSCON_CLOCK_CNTL_2 2 0x8000000c 1 0 4294967295 wake_on_irq 0 31 ixSMC_SYSCON_MISC_CNTL 2 0x80000010 0 0 4294967295 ixSMC_SYSCON_MSG_ARG_0 2 0x80000068 1 0 4294967295 smc_msg_arg 0 31 ixSMC_PC_C 2 0x80000370 1 0 4294967295 smc_pc_c 0 31 ixSMC_SCRATCH9 2 0x80000424 1 0 4294967295 SCRATCH_VALUE 0 31 mmCG_FPS_CNT 0 0x1a4 1 0 4294967295 FPS_CNT 0 7 mmSMU_SMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU0_SMU_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmSMU1_SMU_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmSMU2_SMU_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmSMU3_SMU_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmSMU_SMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU0_SMU_SMC_IND_DATA 0 0x81 0 0 4294967295 mmSMU1_SMU_SMC_IND_DATA 0 0x83 0 0 4294967295 mmSMU2_SMU_SMC_IND_DATA 0 0x85 0 0 4294967295 mmSMU3_SMU_SMC_IND_DATA 0 0x87 0 0 4294967295 ixRCU_UC_EVENTS 2 0xc0000004 15 0 4294967295 RCU_TST_jpc_rep_req 0 0 TST_RCU_jpc_rep_done 1 1 drv_rst_mode 2 2 TP_Tester 6 6 boot_seq_done 7 7 sclk_deep_sleep_exit 8 8 BREAK_PT1_ACTIVE 9 9 BREAK_PT2_ACTIVE 10 10 FCH_HALT 11 11 RCU_GIO_fch_lockdown 13 13 INTERRUPTS_ENABLED 16 16 RCU_DtmCnt0_Done 17 17 RCU_DtmCnt1_Done 18 18 RCU_DtmCnt2_Done 19 19 irq31_sel 24 25 ixRCU_MISC_CTRL 2 0xc0000010 9 0 4294967295 REG_DRV_RST_MODE 1 1 REG_RCU_MEMREP_DIS 3 3 REG_CC_FUSE_DISABLE 4 4 REG_SAMU_FUSE_DISABLE 5 5 REG_CC_SRBM_RD_DISABLE 8 8 BREAK_PT1_DONE 16 16 BREAK_PT2_DONE 17 17 SAMU_START 22 22 RST_PULSE_WIDTH 23 31 ixCC_RCU_FUSES 2 0xc00c0000 21 0 4294967295 GPU_DIS 1 1 DEBUG_DISABLE 2 2 EFUSE_RD_DISABLE 4 4 CG_RST_GLB_REQ_DIS 5 5 DRV_RST_MODE 6 6 ROM_DIS 7 7 JPC_REP_DISABLE 8 8 RCU_BREAK_POINT1 9 9 RCU_BREAK_POINT2 10 10 PHY_FUSE_VALID 14 14 SMU_IOC_MST_DISABLE 15 15 FCH_LOCKOUT_ENABLE 16 16 FCH_XFIRE_FILTER_ENABLE 17 17 XFIRE_DISABLE 18 18 SAMU_FUSE_DISABLE 19 19 BIF_RST_POLLING_DISABLE 20 20 MEM_HARDREP_EN 22 22 PCIE_INIT_DISABLE 23 23 DSMU_DISABLE 24 24 RCU_SPARE 25 30 PSP_ENABLE 31 31 ixCC_SMU_MISC_FUSES 2 0xc00c0004 13 0 4294967295 IOMMU_V2_DISABLE 1 1 MinSClkDid 2 8 MISC_SPARE 9 10 PostResetGnbClkDid 11 17 L2IMU_tn2_dtc_half 18 18 L2IMU_tn2_ptc_half 19 19 L2IMU_tn2_itc_half 20 20 L2IMU_tn2_pdc_half 21 21 L2IMU_tn2_ptc_dis 22 22 L2IMU_tn2_itc_dis 23 23 VCE_DISABLE 27 27 IOC_IOMMU_DISABLE 28 28 GNB_SPARE 29 30 ixCC_SCLK_VID_FUSES 2 0xc00c0008 4 0 4294967295 SClkVid0 0 7 SClkVid1 8 15 SClkVid2 16 23 SClkVid3 24 31 ixCC_GIO_IOCCFG_FUSES 2 0xc00c000c 1 0 4294967295 NB_REV_ID 1 10 ixCC_GIO_IOC_FUSES 2 0xc00c0010 1 0 4294967295 IOC_FUSES 1 17 ixCC_SMU_TST_EFUSE1_MISC 2 0xc00c001c 15 0 4294967295 RF_RM_6_2 1 5 RME 6 6 MBIST_DISABLE 7 7 HARD_REPAIR_DISABLE 8 8 SOFT_REPAIR_DISABLE 9 9 GPU_DIS 10 10 SMS_PWRDWN_DISABLE 11 11 CRBBMP1500_DISA 12 12 CRBBMP1500_DISB 13 13 RM_RF8 14 14 DFT_SPARE1 22 22 DFT_SPARE2 23 23 DFT_SPARE3 24 24 VCE_DISABLE 25 25 DCE_SCAN_DISABLE 26 26 ixCC_TST_ID_STRAPS 2 0xc00c0020 3 0 4294967295 DEVICE_ID 4 19 MAJOR_REV_ID 20 23 MINOR_REV_ID 24 27 ixCC_FCTRL_FUSES 2 0xc00c0024 1 0 4294967295 EXT_EFUSE_MACRO_PRESENT 1 1 ixSMU_MAIN_PLL_OP_FREQ 2 0xe0003020 1 0 4294967295 PLL_OP_FREQ 0 31 ixSMU_STATUS 2 0xe0003088 2 0 4294967295 SMU_DONE 0 0 SMU_PASS 1 1 ixSMU_FIRMWARE 2 0xe00030a4 7 0 4294967295 SMU_IN_PROG 0 0 SMU_RD_DONE 1 2 SMU_SRAM_RD_BLOCK_EN 3 3 SMU_SRAM_WR_BLOCK_EN 4 4 SMU_counter 8 11 SMU_MODE 16 16 SMU_SEL 17 17 ixSMU_INPUT_DATA 2 0xe00030b8 2 0 4294967295 START_ADDR 0 30 AUTO_START 31 31 ixSMU_EFUSE_0 2 0xc0100000 1 0 4294967295 EFUSE_DATA 0 31 ixDPM_TABLE_1 2 0x3f000 1 0 4294967295 SystemFlags 0 31 ixDPM_TABLE_2 2 0x3f004 1 0 4294967295 GraphicsPIDController_Ki 0 31 ixDPM_TABLE_3 2 0x3f008 1 0 4294967295 GraphicsPIDController_LFWindupUpperLim 0 31 ixDPM_TABLE_4 2 0x3f00c 1 0 4294967295 GraphicsPIDController_LFWindupLowerLim 0 31 ixDPM_TABLE_5 2 0x3f010 1 0 4294967295 GraphicsPIDController_StatePrecision 0 31 ixDPM_TABLE_6 2 0x3f014 1 0 4294967295 GraphicsPIDController_LfPrecision 0 31 ixDPM_TABLE_7 2 0x3f018 1 0 4294967295 GraphicsPIDController_LfOffset 0 31 ixDPM_TABLE_8 2 0x3f01c 1 0 4294967295 GraphicsPIDController_MaxState 0 31 ixDPM_TABLE_9 2 0x3f020 1 0 4294967295 GraphicsPIDController_MaxLfFraction 0 31 ixDPM_TABLE_10 2 0x3f024 1 0 4294967295 GraphicsPIDController_StateShift 0 31 ixDPM_TABLE_11 2 0x3f028 1 0 4294967295 GioPIDController_Ki 0 31 ixDPM_TABLE_12 2 0x3f02c 1 0 4294967295 GioPIDController_LFWindupUpperLim 0 31 ixDPM_TABLE_13 2 0x3f030 1 0 4294967295 GioPIDController_LFWindupLowerLim 0 31 ixDPM_TABLE_14 2 0x3f034 1 0 4294967295 GioPIDController_StatePrecision 0 31 ixDPM_TABLE_15 2 0x3f038 1 0 4294967295 GioPIDController_LfPrecision 0 31 ixDPM_TABLE_16 2 0x3f03c 1 0 4294967295 GioPIDController_LfOffset 0 31 ixDPM_TABLE_17 2 0x3f040 1 0 4294967295 GioPIDController_MaxState 0 31 ixDPM_TABLE_18 2 0x3f044 1 0 4294967295 GioPIDController_MaxLfFraction 0 31 ixDPM_TABLE_19 2 0x3f048 1 0 4294967295 GioPIDController_StateShift 0 31 ixDPM_TABLE_20 2 0x3f04c 4 0 4294967295 VceLevelCount 0 7 UvdLevelCount 8 15 GIOLevelCount 16 23 GraphicsDpmLevelCount 24 31 ixDPM_TABLE_21 2 0x3f050 3 0 4294967295 FpsHighThreshold 0 15 SamuLevelCount 16 23 AcpLevelCount 24 31 ixDPM_TABLE_22 2 0x3f054 1 0 4294967295 GraphicsLevel_0_MinVddNb 0 31 ixDPM_TABLE_23 2 0x3f058 1 0 4294967295 GraphicsLevel_0_SclkFrequency 0 31 ixDPM_TABLE_24 2 0x3f05c 3 0 4294967295 GraphicsLevel_0_ActivityLevel 0 15 GraphicsLevel_0_VidOffset 16 23 GraphicsLevel_0_Vid 24 31 ixDPM_TABLE_25 2 0x3f060 4 0 4294967295 GraphicsLevel_0_SclkDid 0 7 GraphicsLevel_0_ForceNbPs1 8 15 GraphicsLevel_0_GnbSlow 16 23 GraphicsLevel_0_PowerThrottle 24 31 ixDPM_TABLE_26 2 0x3f064 4 0 4294967295 GraphicsLevel_0_UpHyst 0 7 GraphicsLevel_0_EnabledForThrottle 8 15 GraphicsLevel_0_EnabledForActivity 16 23 GraphicsLevel_0_DisplayWatermark 24 31 ixDPM_TABLE_27 2 0x3f068 4 0 4294967295 GraphicsLevel_0_ClkBypassCntl 0 7 GraphicsLevel_0_DeepSleepDivId 8 15 GraphicsLevel_0_VoltageDownHyst 16 23 GraphicsLevel_0_DownHyst 24 31 ixDPM_TABLE_28 2 0x3f06c 1 0 4294967295 GraphicsLevel_0_reserved 0 31 ixDPM_TABLE_29 2 0x3f070 1 0 4294967295 GraphicsLevel_1_MinVddNb 0 31 ixDPM_TABLE_30 2 0x3f074 1 0 4294967295 GraphicsLevel_1_SclkFrequency 0 31 ixDPM_TABLE_31 2 0x3f078 3 0 4294967295 GraphicsLevel_1_ActivityLevel 0 15 GraphicsLevel_1_VidOffset 16 23 GraphicsLevel_1_Vid 24 31 ixDPM_TABLE_32 2 0x3f07c 4 0 4294967295 GraphicsLevel_1_SclkDid 0 7 GraphicsLevel_1_ForceNbPs1 8 15 GraphicsLevel_1_GnbSlow 16 23 GraphicsLevel_1_PowerThrottle 24 31 ixDPM_TABLE_33 2 0x3f080 4 0 4294967295 GraphicsLevel_1_UpHyst 0 7 GraphicsLevel_1_EnabledForThrottle 8 15 GraphicsLevel_1_EnabledForActivity 16 23 GraphicsLevel_1_DisplayWatermark 24 31 ixDPM_TABLE_34 2 0x3f084 4 0 4294967295 GraphicsLevel_1_ClkBypassCntl 0 7 GraphicsLevel_1_DeepSleepDivId 8 15 GraphicsLevel_1_VoltageDownHyst 16 23 GraphicsLevel_1_DownHyst 24 31 ixDPM_TABLE_35 2 0x3f088 1 0 4294967295 GraphicsLevel_1_reserved 0 31 ixDPM_TABLE_36 2 0x3f08c 1 0 4294967295 GraphicsLevel_2_MinVddNb 0 31 ixDPM_TABLE_37 2 0x3f090 1 0 4294967295 GraphicsLevel_2_SclkFrequency 0 31 ixDPM_TABLE_38 2 0x3f094 3 0 4294967295 GraphicsLevel_2_ActivityLevel 0 15 GraphicsLevel_2_VidOffset 16 23 GraphicsLevel_2_Vid 24 31 ixDPM_TABLE_39 2 0x3f098 4 0 4294967295 GraphicsLevel_2_SclkDid 0 7 GraphicsLevel_2_ForceNbPs1 8 15 GraphicsLevel_2_GnbSlow 16 23 GraphicsLevel_2_PowerThrottle 24 31 ixDPM_TABLE_40 2 0x3f09c 4 0 4294967295 GraphicsLevel_2_UpHyst 0 7 GraphicsLevel_2_EnabledForThrottle 8 15 GraphicsLevel_2_EnabledForActivity 16 23 GraphicsLevel_2_DisplayWatermark 24 31 ixDPM_TABLE_41 2 0x3f0a0 4 0 4294967295 GraphicsLevel_2_ClkBypassCntl 0 7 GraphicsLevel_2_DeepSleepDivId 8 15 GraphicsLevel_2_VoltageDownHyst 16 23 GraphicsLevel_2_DownHyst 24 31 ixDPM_TABLE_42 2 0x3f0a4 1 0 4294967295 GraphicsLevel_2_reserved 0 31 ixDPM_TABLE_43 2 0x3f0a8 1 0 4294967295 GraphicsLevel_3_MinVddNb 0 31 ixDPM_TABLE_44 2 0x3f0ac 1 0 4294967295 GraphicsLevel_3_SclkFrequency 0 31 ixDPM_TABLE_45 2 0x3f0b0 3 0 4294967295 GraphicsLevel_3_ActivityLevel 0 15 GraphicsLevel_3_VidOffset 16 23 GraphicsLevel_3_Vid 24 31 ixDPM_TABLE_46 2 0x3f0b4 4 0 4294967295 GraphicsLevel_3_SclkDid 0 7 GraphicsLevel_3_ForceNbPs1 8 15 GraphicsLevel_3_GnbSlow 16 23 GraphicsLevel_3_PowerThrottle 24 31 ixDPM_TABLE_47 2 0x3f0b8 4 0 4294967295 GraphicsLevel_3_UpHyst 0 7 GraphicsLevel_3_EnabledForThrottle 8 15 GraphicsLevel_3_EnabledForActivity 16 23 GraphicsLevel_3_DisplayWatermark 24 31 ixDPM_TABLE_48 2 0x3f0bc 4 0 4294967295 GraphicsLevel_3_ClkBypassCntl 0 7 GraphicsLevel_3_DeepSleepDivId 8 15 GraphicsLevel_3_VoltageDownHyst 16 23 GraphicsLevel_3_DownHyst 24 31 ixDPM_TABLE_49 2 0x3f0c0 1 0 4294967295 GraphicsLevel_3_reserved 0 31 ixDPM_TABLE_50 2 0x3f0c4 1 0 4294967295 GraphicsLevel_4_MinVddNb 0 31 ixDPM_TABLE_51 2 0x3f0c8 1 0 4294967295 GraphicsLevel_4_SclkFrequency 0 31 ixDPM_TABLE_52 2 0x3f0cc 3 0 4294967295 GraphicsLevel_4_ActivityLevel 0 15 GraphicsLevel_4_VidOffset 16 23 GraphicsLevel_4_Vid 24 31 ixDPM_TABLE_53 2 0x3f0d0 4 0 4294967295 GraphicsLevel_4_SclkDid 0 7 GraphicsLevel_4_ForceNbPs1 8 15 GraphicsLevel_4_GnbSlow 16 23 GraphicsLevel_4_PowerThrottle 24 31 ixDPM_TABLE_54 2 0x3f0d4 4 0 4294967295 GraphicsLevel_4_UpHyst 0 7 GraphicsLevel_4_EnabledForThrottle 8 15 GraphicsLevel_4_EnabledForActivity 16 23 GraphicsLevel_4_DisplayWatermark 24 31 ixDPM_TABLE_55 2 0x3f0d8 4 0 4294967295 GraphicsLevel_4_ClkBypassCntl 0 7 GraphicsLevel_4_DeepSleepDivId 8 15 GraphicsLevel_4_VoltageDownHyst 16 23 GraphicsLevel_4_DownHyst 24 31 ixDPM_TABLE_56 2 0x3f0dc 1 0 4294967295 GraphicsLevel_4_reserved 0 31 ixDPM_TABLE_57 2 0x3f0e0 1 0 4294967295 GraphicsLevel_5_MinVddNb 0 31 ixDPM_TABLE_58 2 0x3f0e4 1 0 4294967295 GraphicsLevel_5_SclkFrequency 0 31 ixDPM_TABLE_59 2 0x3f0e8 3 0 4294967295 GraphicsLevel_5_ActivityLevel 0 15 GraphicsLevel_5_VidOffset 16 23 GraphicsLevel_5_Vid 24 31 ixDPM_TABLE_60 2 0x3f0ec 4 0 4294967295 GraphicsLevel_5_SclkDid 0 7 GraphicsLevel_5_ForceNbPs1 8 15 GraphicsLevel_5_GnbSlow 16 23 GraphicsLevel_5_PowerThrottle 24 31 ixDPM_TABLE_61 2 0x3f0f0 4 0 4294967295 GraphicsLevel_5_UpHyst 0 7 GraphicsLevel_5_EnabledForThrottle 8 15 GraphicsLevel_5_EnabledForActivity 16 23 GraphicsLevel_5_DisplayWatermark 24 31 ixDPM_TABLE_62 2 0x3f0f4 4 0 4294967295 GraphicsLevel_5_ClkBypassCntl 0 7 GraphicsLevel_5_DeepSleepDivId 8 15 GraphicsLevel_5_VoltageDownHyst 16 23 GraphicsLevel_5_DownHyst 24 31 ixDPM_TABLE_63 2 0x3f0f8 1 0 4294967295 GraphicsLevel_5_reserved 0 31 ixDPM_TABLE_64 2 0x3f0fc 1 0 4294967295 GraphicsLevel_6_MinVddNb 0 31 ixDPM_TABLE_65 2 0x3f100 1 0 4294967295 GraphicsLevel_6_SclkFrequency 0 31 ixDPM_TABLE_66 2 0x3f104 3 0 4294967295 GraphicsLevel_6_ActivityLevel 0 15 GraphicsLevel_6_VidOffset 16 23 GraphicsLevel_6_Vid 24 31 ixDPM_TABLE_67 2 0x3f108 4 0 4294967295 GraphicsLevel_6_SclkDid 0 7 GraphicsLevel_6_ForceNbPs1 8 15 GraphicsLevel_6_GnbSlow 16 23 GraphicsLevel_6_PowerThrottle 24 31 ixDPM_TABLE_68 2 0x3f10c 4 0 4294967295 GraphicsLevel_6_UpHyst 0 7 GraphicsLevel_6_EnabledForThrottle 8 15 GraphicsLevel_6_EnabledForActivity 16 23 GraphicsLevel_6_DisplayWatermark 24 31 ixDPM_TABLE_69 2 0x3f110 4 0 4294967295 GraphicsLevel_6_ClkBypassCntl 0 7 GraphicsLevel_6_DeepSleepDivId 8 15 GraphicsLevel_6_VoltageDownHyst 16 23 GraphicsLevel_6_DownHyst 24 31 ixDPM_TABLE_70 2 0x3f114 1 0 4294967295 GraphicsLevel_6_reserved 0 31 ixDPM_TABLE_71 2 0x3f118 1 0 4294967295 GraphicsLevel_7_MinVddNb 0 31 ixDPM_TABLE_72 2 0x3f11c 1 0 4294967295 GraphicsLevel_7_SclkFrequency 0 31 ixDPM_TABLE_73 2 0x3f120 3 0 4294967295 GraphicsLevel_7_ActivityLevel 0 15 GraphicsLevel_7_VidOffset 16 23 GraphicsLevel_7_Vid 24 31 ixDPM_TABLE_74 2 0x3f124 4 0 4294967295 GraphicsLevel_7_SclkDid 0 7 GraphicsLevel_7_ForceNbPs1 8 15 GraphicsLevel_7_GnbSlow 16 23 GraphicsLevel_7_PowerThrottle 24 31 ixDPM_TABLE_75 2 0x3f128 4 0 4294967295 GraphicsLevel_7_UpHyst 0 7 GraphicsLevel_7_EnabledForThrottle 8 15 GraphicsLevel_7_EnabledForActivity 16 23 GraphicsLevel_7_DisplayWatermark 24 31 ixDPM_TABLE_76 2 0x3f12c 4 0 4294967295 GraphicsLevel_7_ClkBypassCntl 0 7 GraphicsLevel_7_DeepSleepDivId 8 15 GraphicsLevel_7_VoltageDownHyst 16 23 GraphicsLevel_7_DownHyst 24 31 ixDPM_TABLE_77 2 0x3f130 1 0 4294967295 GraphicsLevel_7_reserved 0 31 ixDPM_TABLE_78 2 0x3f134 1 0 4294967295 ACPILevel_Flags 0 31 ixDPM_TABLE_79 2 0x3f138 1 0 4294967295 ACPILevel_MinVddNb 0 31 ixDPM_TABLE_80 2 0x3f13c 1 0 4294967295 ACPILevel_SclkFrequency 0 31 ixDPM_TABLE_81 2 0x3f140 4 0 4294967295 ACPILevel_DisplayWatermark 0 7 ACPILevel_ForceNbPs1 8 15 ACPILevel_GnbSlow 16 23 ACPILevel_SclkDid 24 31 ixDPM_TABLE_82 2 0x3f144 4 0 4294967295 ACPILevel_padding_2 0 7 ACPILevel_padding_1 8 15 ACPILevel_padding_0 16 23 ACPILevel_DeepSleepDivId 24 31 ixDPM_TABLE_83 2 0x3f148 1 0 4294967295 UvdLevel_0_VclkFrequency 0 31 ixDPM_TABLE_84 2 0x3f14c 1 0 4294967295 UvdLevel_0_DclkFrequency 0 31 ixDPM_TABLE_85 2 0x3f150 3 0 4294967295 UvdLevel_0_DclkDivider 0 7 UvdLevel_0_VclkDivider 8 15 UvdLevel_0_MinVddNb 16 31 ixDPM_TABLE_86 2 0x3f154 4 0 4294967295 UvdLevel_0_padding_1 0 7 UvdLevel_0_padding_0 8 15 UvdLevel_0_DClkBypassCntl 16 23 UvdLevel_0_VClkBypassCntl 24 31 ixDPM_TABLE_87 2 0x3f158 1 0 4294967295 UvdLevel_1_VclkFrequency 0 31 ixDPM_TABLE_88 2 0x3f15c 1 0 4294967295 UvdLevel_1_DclkFrequency 0 31 ixDPM_TABLE_89 2 0x3f160 3 0 4294967295 UvdLevel_1_DclkDivider 0 7 UvdLevel_1_VclkDivider 8 15 UvdLevel_1_MinVddNb 16 31 ixDPM_TABLE_90 2 0x3f164 4 0 4294967295 UvdLevel_1_padding_1 0 7 UvdLevel_1_padding_0 8 15 UvdLevel_1_DClkBypassCntl 16 23 UvdLevel_1_VClkBypassCntl 24 31 ixDPM_TABLE_91 2 0x3f168 1 0 4294967295 UvdLevel_2_VclkFrequency 0 31 ixDPM_TABLE_92 2 0x3f16c 1 0 4294967295 UvdLevel_2_DclkFrequency 0 31 ixDPM_TABLE_93 2 0x3f170 3 0 4294967295 UvdLevel_2_DclkDivider 0 7 UvdLevel_2_VclkDivider 8 15 UvdLevel_2_MinVddNb 16 31 ixDPM_TABLE_94 2 0x3f174 4 0 4294967295 UvdLevel_2_padding_1 0 7 UvdLevel_2_padding_0 8 15 UvdLevel_2_DClkBypassCntl 16 23 UvdLevel_2_VClkBypassCntl 24 31 ixDPM_TABLE_95 2 0x3f178 1 0 4294967295 UvdLevel_3_VclkFrequency 0 31 ixDPM_TABLE_96 2 0x3f17c 1 0 4294967295 UvdLevel_3_DclkFrequency 0 31 ixDPM_TABLE_97 2 0x3f180 3 0 4294967295 UvdLevel_3_DclkDivider 0 7 UvdLevel_3_VclkDivider 8 15 UvdLevel_3_MinVddNb 16 31 ixDPM_TABLE_98 2 0x3f184 4 0 4294967295 UvdLevel_3_padding_1 0 7 UvdLevel_3_padding_0 8 15 UvdLevel_3_DClkBypassCntl 16 23 UvdLevel_3_VClkBypassCntl 24 31 ixDPM_TABLE_99 2 0x3f188 1 0 4294967295 UvdLevel_4_VclkFrequency 0 31 ixDPM_TABLE_100 2 0x3f18c 1 0 4294967295 UvdLevel_4_DclkFrequency 0 31 ixDPM_TABLE_101 2 0x3f190 3 0 4294967295 UvdLevel_4_DclkDivider 0 7 UvdLevel_4_VclkDivider 8 15 UvdLevel_4_MinVddNb 16 31 ixDPM_TABLE_102 2 0x3f194 4 0 4294967295 UvdLevel_4_padding_1 0 7 UvdLevel_4_padding_0 8 15 UvdLevel_4_DClkBypassCntl 16 23 UvdLevel_4_VClkBypassCntl 24 31 ixDPM_TABLE_103 2 0x3f198 1 0 4294967295 UvdLevel_5_VclkFrequency 0 31 ixDPM_TABLE_104 2 0x3f19c 1 0 4294967295 UvdLevel_5_DclkFrequency 0 31 ixDPM_TABLE_105 2 0x3f1a0 3 0 4294967295 UvdLevel_5_DclkDivider 0 7 UvdLevel_5_VclkDivider 8 15 UvdLevel_5_MinVddNb 16 31 ixDPM_TABLE_106 2 0x3f1a4 4 0 4294967295 UvdLevel_5_padding_1 0 7 UvdLevel_5_padding_0 8 15 UvdLevel_5_DClkBypassCntl 16 23 UvdLevel_5_VClkBypassCntl 24 31 ixDPM_TABLE_107 2 0x3f1a8 1 0 4294967295 UvdLevel_6_VclkFrequency 0 31 ixDPM_TABLE_108 2 0x3f1ac 1 0 4294967295 UvdLevel_6_DclkFrequency 0 31 ixDPM_TABLE_109 2 0x3f1b0 3 0 4294967295 UvdLevel_6_DclkDivider 0 7 UvdLevel_6_VclkDivider 8 15 UvdLevel_6_MinVddNb 16 31 ixDPM_TABLE_110 2 0x3f1b4 4 0 4294967295 UvdLevel_6_padding_1 0 7 UvdLevel_6_padding_0 8 15 UvdLevel_6_DClkBypassCntl 16 23 UvdLevel_6_VClkBypassCntl 24 31 ixDPM_TABLE_111 2 0x3f1b8 1 0 4294967295 UvdLevel_7_VclkFrequency 0 31 ixDPM_TABLE_112 2 0x3f1bc 1 0 4294967295 UvdLevel_7_DclkFrequency 0 31 ixDPM_TABLE_113 2 0x3f1c0 3 0 4294967295 UvdLevel_7_DclkDivider 0 7 UvdLevel_7_VclkDivider 8 15 UvdLevel_7_MinVddNb 16 31 ixDPM_TABLE_114 2 0x3f1c4 4 0 4294967295 UvdLevel_7_padding_1 0 7 UvdLevel_7_padding_0 8 15 UvdLevel_7_DClkBypassCntl 16 23 UvdLevel_7_VClkBypassCntl 24 31 ixDPM_TABLE_115 2 0x3f1c8 1 0 4294967295 VceLevel_0_Frequency 0 31 ixDPM_TABLE_116 2 0x3f1cc 3 0 4294967295 VceLevel_0_ClkBypassCntl 0 7 VceLevel_0_Divider 8 15 VceLevel_0_MinVoltage 16 31 ixDPM_TABLE_117 2 0x3f1d0 1 0 4294967295 VceLevel_0_Reserved 0 31 ixDPM_TABLE_118 2 0x3f1d4 1 0 4294967295 VceLevel_1_Frequency 0 31 ixDPM_TABLE_119 2 0x3f1d8 3 0 4294967295 VceLevel_1_ClkBypassCntl 0 7 VceLevel_1_Divider 8 15 VceLevel_1_MinVoltage 16 31 ixDPM_TABLE_120 2 0x3f1dc 1 0 4294967295 VceLevel_1_Reserved 0 31 ixDPM_TABLE_121 2 0x3f1e0 1 0 4294967295 VceLevel_2_Frequency 0 31 ixDPM_TABLE_122 2 0x3f1e4 3 0 4294967295 VceLevel_2_ClkBypassCntl 0 7 VceLevel_2_Divider 8 15 VceLevel_2_MinVoltage 16 31 ixDPM_TABLE_123 2 0x3f1e8 1 0 4294967295 VceLevel_2_Reserved 0 31 ixDPM_TABLE_124 2 0x3f1ec 1 0 4294967295 VceLevel_3_Frequency 0 31 ixDPM_TABLE_125 2 0x3f1f0 3 0 4294967295 VceLevel_3_ClkBypassCntl 0 7 VceLevel_3_Divider 8 15 VceLevel_3_MinVoltage 16 31 ixDPM_TABLE_126 2 0x3f1f4 1 0 4294967295 VceLevel_3_Reserved 0 31 ixDPM_TABLE_127 2 0x3f1f8 1 0 4294967295 VceLevel_4_Frequency 0 31 ixDPM_TABLE_128 2 0x3f1fc 3 0 4294967295 VceLevel_4_ClkBypassCntl 0 7 VceLevel_4_Divider 8 15 VceLevel_4_MinVoltage 16 31 ixDPM_TABLE_129 2 0x3f200 1 0 4294967295 VceLevel_4_Reserved 0 31 ixDPM_TABLE_130 2 0x3f204 1 0 4294967295 VceLevel_5_Frequency 0 31 ixDPM_TABLE_131 2 0x3f208 3 0 4294967295 VceLevel_5_ClkBypassCntl 0 7 VceLevel_5_Divider 8 15 VceLevel_5_MinVoltage 16 31 ixDPM_TABLE_132 2 0x3f20c 1 0 4294967295 VceLevel_5_Reserved 0 31 ixDPM_TABLE_133 2 0x3f210 1 0 4294967295 VceLevel_6_Frequency 0 31 ixDPM_TABLE_134 2 0x3f214 3 0 4294967295 VceLevel_6_ClkBypassCntl 0 7 VceLevel_6_Divider 8 15 VceLevel_6_MinVoltage 16 31 ixDPM_TABLE_135 2 0x3f218 1 0 4294967295 VceLevel_6_Reserved 0 31 ixDPM_TABLE_136 2 0x3f21c 1 0 4294967295 VceLevel_7_Frequency 0 31 ixDPM_TABLE_137 2 0x3f220 3 0 4294967295 VceLevel_7_ClkBypassCntl 0 7 VceLevel_7_Divider 8 15 VceLevel_7_MinVoltage 16 31 ixDPM_TABLE_138 2 0x3f224 1 0 4294967295 VceLevel_7_Reserved 0 31 ixDPM_TABLE_139 2 0x3f228 1 0 4294967295 AcpLevel_0_Frequency 0 31 ixDPM_TABLE_140 2 0x3f22c 3 0 4294967295 AcpLevel_0_ClkBypassCntl 0 7 AcpLevel_0_Divider 8 15 AcpLevel_0_MinVoltage 16 31 ixDPM_TABLE_141 2 0x3f230 1 0 4294967295 AcpLevel_0_Reserved 0 31 ixDPM_TABLE_142 2 0x3f234 1 0 4294967295 AcpLevel_1_Frequency 0 31 ixDPM_TABLE_143 2 0x3f238 3 0 4294967295 AcpLevel_1_ClkBypassCntl 0 7 AcpLevel_1_Divider 8 15 AcpLevel_1_MinVoltage 16 31 ixDPM_TABLE_144 2 0x3f23c 1 0 4294967295 AcpLevel_1_Reserved 0 31 ixDPM_TABLE_145 2 0x3f240 1 0 4294967295 AcpLevel_2_Frequency 0 31 ixDPM_TABLE_146 2 0x3f244 3 0 4294967295 AcpLevel_2_ClkBypassCntl 0 7 AcpLevel_2_Divider 8 15 AcpLevel_2_MinVoltage 16 31 ixDPM_TABLE_147 2 0x3f248 1 0 4294967295 AcpLevel_2_Reserved 0 31 ixDPM_TABLE_148 2 0x3f24c 1 0 4294967295 AcpLevel_3_Frequency 0 31 ixDPM_TABLE_149 2 0x3f250 3 0 4294967295 AcpLevel_3_ClkBypassCntl 0 7 AcpLevel_3_Divider 8 15 AcpLevel_3_MinVoltage 16 31 ixDPM_TABLE_150 2 0x3f254 1 0 4294967295 AcpLevel_3_Reserved 0 31 ixDPM_TABLE_151 2 0x3f258 1 0 4294967295 AcpLevel_4_Frequency 0 31 ixDPM_TABLE_152 2 0x3f25c 3 0 4294967295 AcpLevel_4_ClkBypassCntl 0 7 AcpLevel_4_Divider 8 15 AcpLevel_4_MinVoltage 16 31 ixDPM_TABLE_153 2 0x3f260 1 0 4294967295 AcpLevel_4_Reserved 0 31 ixDPM_TABLE_154 2 0x3f264 1 0 4294967295 AcpLevel_5_Frequency 0 31 ixDPM_TABLE_155 2 0x3f268 3 0 4294967295 AcpLevel_5_ClkBypassCntl 0 7 AcpLevel_5_Divider 8 15 AcpLevel_5_MinVoltage 16 31 ixDPM_TABLE_156 2 0x3f26c 1 0 4294967295 AcpLevel_5_Reserved 0 31 ixDPM_TABLE_157 2 0x3f270 1 0 4294967295 AcpLevel_6_Frequency 0 31 ixDPM_TABLE_158 2 0x3f274 3 0 4294967295 AcpLevel_6_ClkBypassCntl 0 7 AcpLevel_6_Divider 8 15 AcpLevel_6_MinVoltage 16 31 ixDPM_TABLE_159 2 0x3f278 1 0 4294967295 AcpLevel_6_Reserved 0 31 ixDPM_TABLE_160 2 0x3f27c 1 0 4294967295 AcpLevel_7_Frequency 0 31 ixDPM_TABLE_161 2 0x3f280 3 0 4294967295 AcpLevel_7_ClkBypassCntl 0 7 AcpLevel_7_Divider 8 15 AcpLevel_7_MinVoltage 16 31 ixDPM_TABLE_162 2 0x3f284 1 0 4294967295 AcpLevel_7_Reserved 0 31 ixDPM_TABLE_163 2 0x3f288 1 0 4294967295 SamuLevel_0_Frequency 0 31 ixDPM_TABLE_164 2 0x3f28c 3 0 4294967295 SamuLevel_0_ClkBypassCntl 0 7 SamuLevel_0_Divider 8 15 SamuLevel_0_MinVoltage 16 31 ixDPM_TABLE_165 2 0x3f290 1 0 4294967295 SamuLevel_0_Reserved 0 31 ixDPM_TABLE_166 2 0x3f294 1 0 4294967295 SamuLevel_1_Frequency 0 31 ixDPM_TABLE_167 2 0x3f298 3 0 4294967295 SamuLevel_1_ClkBypassCntl 0 7 SamuLevel_1_Divider 8 15 SamuLevel_1_MinVoltage 16 31 ixDPM_TABLE_168 2 0x3f29c 1 0 4294967295 SamuLevel_1_Reserved 0 31 ixDPM_TABLE_169 2 0x3f2a0 1 0 4294967295 SamuLevel_2_Frequency 0 31 ixDPM_TABLE_170 2 0x3f2a4 3 0 4294967295 SamuLevel_2_ClkBypassCntl 0 7 SamuLevel_2_Divider 8 15 SamuLevel_2_MinVoltage 16 31 ixDPM_TABLE_171 2 0x3f2a8 1 0 4294967295 SamuLevel_2_Reserved 0 31 ixDPM_TABLE_172 2 0x3f2ac 1 0 4294967295 SamuLevel_3_Frequency 0 31 ixDPM_TABLE_173 2 0x3f2b0 3 0 4294967295 SamuLevel_3_ClkBypassCntl 0 7 SamuLevel_3_Divider 8 15 SamuLevel_3_MinVoltage 16 31 ixDPM_TABLE_174 2 0x3f2b4 1 0 4294967295 SamuLevel_3_Reserved 0 31 ixDPM_TABLE_175 2 0x3f2b8 1 0 4294967295 SamuLevel_4_Frequency 0 31 ixDPM_TABLE_176 2 0x3f2bc 3 0 4294967295 SamuLevel_4_ClkBypassCntl 0 7 SamuLevel_4_Divider 8 15 SamuLevel_4_MinVoltage 16 31 ixDPM_TABLE_177 2 0x3f2c0 1 0 4294967295 SamuLevel_4_Reserved 0 31 ixDPM_TABLE_178 2 0x3f2c4 1 0 4294967295 SamuLevel_5_Frequency 0 31 ixDPM_TABLE_179 2 0x3f2c8 3 0 4294967295 SamuLevel_5_ClkBypassCntl 0 7 SamuLevel_5_Divider 8 15 SamuLevel_5_MinVoltage 16 31 ixDPM_TABLE_180 2 0x3f2cc 1 0 4294967295 SamuLevel_5_Reserved 0 31 ixDPM_TABLE_181 2 0x3f2d0 1 0 4294967295 SamuLevel_6_Frequency 0 31 ixDPM_TABLE_182 2 0x3f2d4 3 0 4294967295 SamuLevel_6_ClkBypassCntl 0 7 SamuLevel_6_Divider 8 15 SamuLevel_6_MinVoltage 16 31 ixDPM_TABLE_183 2 0x3f2d8 1 0 4294967295 SamuLevel_6_Reserved 0 31 ixDPM_TABLE_184 2 0x3f2dc 1 0 4294967295 SamuLevel_7_Frequency 0 31 ixDPM_TABLE_185 2 0x3f2e0 3 0 4294967295 SamuLevel_7_ClkBypassCntl 0 7 SamuLevel_7_Divider 8 15 SamuLevel_7_MinVoltage 16 31 ixDPM_TABLE_186 2 0x3f2e4 1 0 4294967295 SamuLevel_7_Reserved 0 31 ixDPM_TABLE_187 2 0x3f2e8 4 0 4294967295 SamuBootLevel 0 7 AcpBootLevel 8 15 VceBootLevel 16 23 UvdBootLevel 24 31 ixDPM_TABLE_188 2 0x3f2ec 4 0 4294967295 SAMUInterval 0 7 ACPInterval 8 15 VCEInterval 16 23 UVDInterval 24 31 ixDPM_TABLE_189 2 0x3f2f0 4 0 4294967295 GraphicsVoltageChangeEnable 0 7 GraphicsThermThrottleEnable 8 15 GraphicsInterval 16 23 GraphicsBootLevel 24 31 ixDPM_TABLE_190 2 0x3f2f4 3 0 4294967295 FpsLowThreshold 0 15 GraphicsClkSlowDivider 16 23 GraphicsClkSlowEnable 24 31 ixDPM_TABLE_191 2 0x3f2f8 1 0 4294967295 DisplayCac 0 31 ixSOFT_REGISTERS_TABLE_1 2 0x3f900 1 0 4294967295 RefClockFrequency 0 31 ixSOFT_REGISTERS_TABLE_2 2 0x3f904 1 0 4294967295 PmTimerPeriod 0 31 ixSOFT_REGISTERS_TABLE_3 2 0x3f908 1 0 4294967295 FeatureEnables 0 31 ixSOFT_REGISTERS_TABLE_4 2 0x3f90c 1 0 4294967295 HandshakeDisables 0 31 ixSOFT_REGISTERS_TABLE_5 2 0x3f910 4 0 4294967295 DisplayPhy4Config 0 7 DisplayPhy3Config 8 15 DisplayPhy2Config 16 23 DisplayPhy1Config 24 31 ixSOFT_REGISTERS_TABLE_6 2 0x3f914 4 0 4294967295 DisplayPhy8Config 0 7 DisplayPhy7Config 8 15 DisplayPhy6Config 16 23 DisplayPhy5Config 24 31 ixSOFT_REGISTERS_TABLE_7 2 0x3f918 1 0 4294967295 AverageGraphicsActivity 0 31 ixSOFT_REGISTERS_TABLE_8 2 0x3f91c 1 0 4294967295 AverageMemoryActivity 0 31 ixSOFT_REGISTERS_TABLE_9 2 0x3f920 1 0 4294967295 AverageGioActivity 0 31 ixSOFT_REGISTERS_TABLE_10 2 0x3f924 4 0 4294967295 PCIeDpmEnabledLevels 0 7 LClkDpmEnabledLevels 8 15 MClkDpmEnabledLevels 16 23 SClkDpmEnabledLevels 24 31 ixSOFT_REGISTERS_TABLE_11 2 0x3f928 4 0 4294967295 VCEDpmEnabledLevels 0 7 ACPDpmEnabledLevels 8 15 SAMUDpmEnabledLevels 16 23 UVDDpmEnabledLevels 24 31 ixSOFT_REGISTERS_TABLE_12 2 0x3f92c 1 0 4294967295 Reserved_0 0 31 ixSOFT_REGISTERS_TABLE_13 2 0x3f930 1 0 4294967295 Reserved_1 0 31 ixSOFT_REGISTERS_TABLE_14 2 0x3f934 1 0 4294967295 Reserved_2 0 31 ixSOFT_REGISTERS_TABLE_15 2 0x3f938 1 0 4294967295 Reserved_3 0 31 ixSOFT_REGISTERS_TABLE_16 2 0x3f93c 1 0 4294967295 Reserved_4 0 31 ixSOFT_REGISTERS_TABLE_17 2 0x3f940 1 0 4294967295 Reserved_5 0 31 ixSOFT_REGISTERS_TABLE_18 2 0x3f944 1 0 4294967295 Reserved_6 0 31 ixSOFT_REGISTERS_TABLE_19 2 0x3f948 1 0 4294967295 Reserved_7 0 31 ixSOFT_REGISTERS_TABLE_20 2 0x3f94c 1 0 4294967295 Reserved_8 0 31 ixSOFT_REGISTERS_TABLE_21 2 0x3f950 1 0 4294967295 Reserved_9 0 31 ixSMU_LCLK_DPM_STATE_0_CNTL_0 2 0x3fd00 4 0 4294967295 LOW_VOLTAGE_REQ_THRESHOLD 0 7 VID 8 15 CLK_DIVIDER 16 23 STATE_VALID 24 31 ixSMU_LCLK_DPM_STATE_1_CNTL_0 2 0x3fd14 4 0 4294967295 LOW_VOLTAGE_REQ_THRESHOLD 0 7 VID 8 15 CLK_DIVIDER 16 23 STATE_VALID 24 31 ixSMU_LCLK_DPM_STATE_2_CNTL_0 2 0x3fd28 4 0 4294967295 LOW_VOLTAGE_REQ_THRESHOLD 0 7 VID 8 15 CLK_DIVIDER 16 23 STATE_VALID 24 31 ixSMU_LCLK_DPM_STATE_3_CNTL_0 2 0x3fd3c 4 0 4294967295 LOW_VOLTAGE_REQ_THRESHOLD 0 7 VID 8 15 CLK_DIVIDER 16 23 STATE_VALID 24 31 ixSMU_LCLK_DPM_STATE_4_CNTL_0 2 0x3fd50 4 0 4294967295 LOW_VOLTAGE_REQ_THRESHOLD 0 7 VID 8 15 CLK_DIVIDER 16 23 STATE_VALID 24 31 ixSMU_LCLK_DPM_STATE_5_CNTL_0 2 0x3fd64 4 0 4294967295 LOW_VOLTAGE_REQ_THRESHOLD 0 7 VID 8 15 CLK_DIVIDER 16 23 STATE_VALID 24 31 ixSMU_LCLK_DPM_STATE_6_CNTL_0 2 0x3fd78 4 0 4294967295 LOW_VOLTAGE_REQ_THRESHOLD 0 7 VID 8 15 CLK_DIVIDER 16 23 STATE_VALID 24 31 ixSMU_LCLK_DPM_STATE_7_CNTL_0 2 0x3fd8c 4 0 4294967295 LOW_VOLTAGE_REQ_THRESHOLD 0 7 VID 8 15 CLK_DIVIDER 16 23 STATE_VALID 24 31 ixSMU_LCLK_DPM_STATE_0_CNTL_1 2 0x3fd04 1 0 4294967295 MIN_VDDNB 0 31 ixSMU_LCLK_DPM_STATE_1_CNTL_1 2 0x3fd18 1 0 4294967295 MIN_VDDNB 0 31 ixSMU_LCLK_DPM_STATE_2_CNTL_1 2 0x3fd2c 1 0 4294967295 MIN_VDDNB 0 31 ixSMU_LCLK_DPM_STATE_3_CNTL_1 2 0x3fd40 1 0 4294967295 MIN_VDDNB 0 31 ixSMU_LCLK_DPM_STATE_4_CNTL_1 2 0x3fd54 1 0 4294967295 MIN_VDDNB 0 31 ixSMU_LCLK_DPM_STATE_5_CNTL_1 2 0x3fd68 1 0 4294967295 MIN_VDDNB 0 31 ixSMU_LCLK_DPM_STATE_6_CNTL_1 2 0x3fd7c 1 0 4294967295 MIN_VDDNB 0 31 ixSMU_LCLK_DPM_STATE_7_CNTL_1 2 0x3fd90 1 0 4294967295 MIN_VDDNB 0 31 ixSMU_LCLK_DPM_STATE_0_CNTL_2 2 0x3fd08 3 0 4294967295 HYSTERESIS_DOWN 0 7 HYSTERESIS_UP 8 15 RESIDENCY_COUNTER 16 31 ixSMU_LCLK_DPM_STATE_1_CNTL_2 2 0x3fd1c 3 0 4294967295 HYSTERESIS_DOWN 0 7 HYSTERESIS_UP 8 15 RESIDENCY_COUNTER 16 31 ixSMU_LCLK_DPM_STATE_2_CNTL_2 2 0x3fd30 3 0 4294967295 HYSTERESIS_DOWN 0 7 HYSTERESIS_UP 8 15 RESIDENCY_COUNTER 16 31 ixSMU_LCLK_DPM_STATE_3_CNTL_2 2 0x3fd44 3 0 4294967295 HYSTERESIS_DOWN 0 7 HYSTERESIS_UP 8 15 RESIDENCY_COUNTER 16 31 ixSMU_LCLK_DPM_STATE_4_CNTL_2 2 0x3fd58 3 0 4294967295 HYSTERESIS_DOWN 0 7 HYSTERESIS_UP 8 15 RESIDENCY_COUNTER 16 31 ixSMU_LCLK_DPM_STATE_5_CNTL_2 2 0x3fd6c 3 0 4294967295 HYSTERESIS_DOWN 0 7 HYSTERESIS_UP 8 15 RESIDENCY_COUNTER 16 31 ixSMU_LCLK_DPM_STATE_6_CNTL_2 2 0x3fd80 3 0 4294967295 HYSTERESIS_DOWN 0 7 HYSTERESIS_UP 8 15 RESIDENCY_COUNTER 16 31 ixSMU_LCLK_DPM_STATE_7_CNTL_2 2 0x3fd94 3 0 4294967295 HYSTERESIS_DOWN 0 7 HYSTERESIS_UP 8 15 RESIDENCY_COUNTER 16 31 ixSMU_LCLK_DPM_STATE_0_CNTL_3 2 0x3fd0c 1 0 4294967295 LCLK_FREQUENCY 0 31 ixSMU_LCLK_DPM_STATE_1_CNTL_3 2 0x3fd20 1 0 4294967295 LCLK_FREQUENCY 0 31 ixSMU_LCLK_DPM_STATE_2_CNTL_3 2 0x3fd34 1 0 4294967295 LCLK_FREQUENCY 0 31 ixSMU_LCLK_DPM_STATE_3_CNTL_3 2 0x3fd48 1 0 4294967295 LCLK_FREQUENCY 0 31 ixSMU_LCLK_DPM_STATE_4_CNTL_3 2 0x3fd5c 1 0 4294967295 LCLK_FREQUENCY 0 31 ixSMU_LCLK_DPM_STATE_5_CNTL_3 2 0x3fd70 1 0 4294967295 LCLK_FREQUENCY 0 31 ixSMU_LCLK_DPM_STATE_6_CNTL_3 2 0x3fd84 1 0 4294967295 LCLK_FREQUENCY 0 31 ixSMU_LCLK_DPM_STATE_7_CNTL_3 2 0x3fd98 1 0 4294967295 LCLK_FREQUENCY 0 31 ixSMU_LCLK_DPM_STATE_0_ACTIVITY_THRESHOLD 2 0x3fd10 4 0 4294967295 RESERVED 0 7 LCLKBYPASSCNTL 8 15 ENABLED_FOR_THROTTLE 16 23 ACTIVITY_THRESHOLD 24 31 ixSMU_LCLK_DPM_STATE_1_ACTIVITY_THRESHOLD 2 0x3fd24 4 0 4294967295 RESERVED 0 7 LCLKBYPASSCNTL 8 15 ENABLED_FOR_THROTTLE 16 23 ACTIVITY_THRESHOLD 24 31 ixSMU_LCLK_DPM_STATE_2_ACTIVITY_THRESHOLD 2 0x3fd38 4 0 4294967295 RESERVED 0 7 LCLKBYPASSCNTL 8 15 ENABLED_FOR_THROTTLE 16 23 ACTIVITY_THRESHOLD 24 31 ixSMU_LCLK_DPM_STATE_3_ACTIVITY_THRESHOLD 2 0x3fd4c 4 0 4294967295 RESERVED 0 7 LCLKBYPASSCNTL 8 15 ENABLED_FOR_THROTTLE 16 23 ACTIVITY_THRESHOLD 24 31 ixSMU_LCLK_DPM_STATE_4_ACTIVITY_THRESHOLD 2 0x3fd60 4 0 4294967295 RESERVED 0 7 LCLKBYPASSCNTL 8 15 ENABLED_FOR_THROTTLE 16 23 ACTIVITY_THRESHOLD 24 31 ixSMU_LCLK_DPM_STATE_5_ACTIVITY_THRESHOLD 2 0x3fd74 4 0 4294967295 RESERVED 0 7 LCLKBYPASSCNTL 8 15 ENABLED_FOR_THROTTLE 16 23 ACTIVITY_THRESHOLD 24 31 ixSMU_LCLK_DPM_STATE_6_ACTIVITY_THRESHOLD 2 0x3fd88 4 0 4294967295 RESERVED 0 7 LCLKBYPASSCNTL 8 15 ENABLED_FOR_THROTTLE 16 23 ACTIVITY_THRESHOLD 24 31 ixSMU_LCLK_DPM_STATE_7_ACTIVITY_THRESHOLD 2 0x3fd9c 4 0 4294967295 RESERVED 0 7 LCLKBYPASSCNTL 8 15 ENABLED_FOR_THROTTLE 16 23 ACTIVITY_THRESHOLD 24 31 ixGIO_PID_CONTROLLER_CNTL_0 2 0x3fda0 1 0 4294967295 K_I 0 31 ixGIO_PID_CONTROLLER_CNTL_1 2 0x3fda4 1 0 4294967295 LF_WINDUP_UPPER_LIM 0 31 ixGIO_PID_CONTROLLER_CNTL_2 2 0x3fda8 1 0 4294967295 LF_WINDUP_LOWER_LIM 0 31 ixGIO_PID_CONTROLLER_CNTL_3 2 0x3fdac 1 0 4294967295 STATE_PRECISION 0 31 ixGIO_PID_CONTROLLER_CNTL_4 2 0x3fdb0 1 0 4294967295 LF_PRECISION 0 31 ixGIO_PID_CONTROLLER_CNTL_5 2 0x3fdb4 1 0 4294967295 LF_OFFSET 0 31 ixGIO_PID_CONTROLLER_CNTL_6 2 0x3fdb8 1 0 4294967295 MAX_STATE 0 31 ixGIO_PID_CONTROLLER_CNTL_7 2 0x3fdbc 1 0 4294967295 MAX_LF_FRACTION 0 31 ixGIO_PID_CONTROLLER_CNTL_8 2 0x3fdc0 1 0 4294967295 STATE_SHIFT 0 31 ixSMU_LCLK_DPM_LEVEL_COUNT 2 0x3fdc4 1 0 4294967295 LCLK_DPM_LEVEL_COUNT 0 31 ixSMU_LCLK_DPM_CNTL 2 0x3fdc8 4 0 4294967295 RESERVED 0 7 LCLK_DPM_BOOT_STATE 8 15 VOLTAGE_CHG_EN 16 23 LCLK_DPM_EN 24 31 ixSMU_LCLK_DPM_CURRENT_AND_TARGET_STATE 2 0x3fdcc 2 0 4294967295 CURRENT_STATE 0 7 TARGET_STATE 8 15 ixSMU_LCLK_DPM_THERMAL_THROTTLING_CNTL 2 0x3fdd0 4 0 4294967295 LCLK_THERMAL_THROTTLING_EN 0 7 TEMPERATURE_SEL 8 15 LCLK_TT_MODE 16 23 TT_HTC_ACTIVE 24 31 ixSMU_LCLK_DPM_THERMAL_THROTTLING_THRESHOLDS 2 0x3fdd4 2 0 4294967295 LOW_THRESHOLD 0 15 HIGH_THRESHOLD 16 31 ixPM_FUSES_1 2 0x3fa80 4 0 4294967295 BapmPstateVid_3 0 7 BapmPstateVid_2 8 15 BapmPstateVid_1 16 23 BapmPstateVid_0 24 31 ixPM_FUSES_2 2 0x3fa84 4 0 4294967295 BapmPstateVid_7 0 7 BapmPstateVid_6 8 15 BapmPstateVid_5 16 23 BapmPstateVid_4 24 31 ixPM_FUSES_3 2 0x3fa88 4 0 4294967295 BapmVddNbVidHiSidd_3 0 7 BapmVddNbVidHiSidd_2 8 15 BapmVddNbVidHiSidd_1 16 23 BapmVddNbVidHiSidd_0 24 31 ixPM_FUSES_4 2 0x3fa8c 4 0 4294967295 BapmVddNbVidLoSidd_2 0 7 BapmVddNbVidLoSidd_1 8 15 BapmVddNbVidLoSidd_0 16 23 BapmVddNbVidHiSidd_4 24 31 ixPM_FUSES_5 2 0x3fa90 4 0 4294967295 CpuIdModel 0 7 SviLoadLineEn 8 15 BapmVddNbVidLoSidd_4 16 23 BapmVddNbVidLoSidd_3 24 31 ixPM_FUSES_6 2 0x3fa94 4 0 4294967295 SviLoadLineTrimVddNb 0 7 SviLoadLineTrimVdd 8 15 SviLoadLineVddNb 16 23 SviLoadLineVdd 24 31 ixPM_FUSES_7 2 0x3fa98 3 0 4294967295 BAPMTI_TjOffset_0 0 15 SviLoadLineOffsetVddNb 16 23 SviLoadLineOffsetVdd 24 31 ixPM_FUSES_8 2 0x3fa9c 2 0 4294967295 BAPMTI_TjOffset_2 0 15 BAPMTI_TjOffset_1 16 31 ixPM_FUSES_9 2 0x3faa0 2 0 4294967295 BAPMTI_TjHyst_1 0 15 BAPMTI_TjHyst_0 16 31 ixPM_FUSES_10 2 0x3faa4 3 0 4294967295 BAPMTI_TjMax_1 0 7 BAPMTI_TjMax_0 8 15 BAPMTI_GpuTjHyst 16 31 ixPM_FUSES_11 2 0x3faa8 4 0 4294967295 LhtcTmpLmt 0 7 LhtcPstateLimit 8 15 LhtcHystLmt 16 23 BAPMTI_GpuTjMax 24 31 ixPM_FUSES_12 2 0x3faac 4 0 4294967295 MaxPwrCpu_1 0 7 MaxPwrCpu_0 8 15 NomPwrCpu_1 16 23 NomPwrCpu_0 24 31 ixPM_FUSES_13 2 0x3fab0 3 0 4294967295 NomPwrGpu 0 15 MidPwrCpu_1 16 23 MidPwrCpu_0 24 31 ixPM_FUSES_14 2 0x3fab4 2 0 4294967295 MinPwrGpu 0 15 MaxPwrGpu 16 31 ixPM_FUSES_15 2 0x3fab8 4 0 4294967295 PCIe3PhyOffset 0 7 PCIe2PhyOffset 8 15 PCIe1PhyOffset 16 23 MidPwrTempHyst 24 31 ixPM_FUSES_16 2 0x3fabc 3 0 4294967295 TDC_VDD_PkgLimit 0 15 DCE2PhyOffset 16 23 DCE1PhyOffset 24 31 ixPM_FUSES_17 2 0x3fac0 3 0 4294967295 TDC_VDDNB_ThrottleReleaseLimitPerc 0 7 TDC_VDD_ThrottleReleaseLimitPerc 8 15 TDC_VDDNB_PkgLimit 16 31 ixPM_FUSES_18 2 0x3fac4 4 0 4294967295 TdcWaterfallCtl 0 7 TdpAgeRate 8 15 TdpAgeValue 16 23 TDC_MAWt 24 31 ixPM_FUSES_19 2 0x3fac8 4 0 4294967295 BapmLhtcCap 0 7 BapmFuseOverride 8 15 SmuCoolingIndex 16 23 SmuSocIndex 24 31 ixPM_FUSES_20 2 0x3facc 4 0 4294967295 SamClkDid_3 0 7 SamClkDid_2 8 15 SamClkDid_1 16 23 SamClkDid_0 24 31 ixPM_FUSES_21 2 0x3fad0 4 0 4294967295 AmbientTempBase 0 7 LPMLTemperatureMax 8 15 LPMLTemperatureMin 16 23 SamClkDid_4 24 31 ixPM_FUSES_22 2 0x3fad4 4 0 4294967295 LPMLTemperatureScaler_3 0 7 LPMLTemperatureScaler_2 8 15 LPMLTemperatureScaler_1 16 23 LPMLTemperatureScaler_0 24 31 ixPM_FUSES_23 2 0x3fad8 4 0 4294967295 LPMLTemperatureScaler_7 0 7 LPMLTemperatureScaler_6 8 15 LPMLTemperatureScaler_5 16 23 LPMLTemperatureScaler_4 24 31 ixPM_FUSES_24 2 0x3fadc 4 0 4294967295 LPMLTemperatureScaler_11 0 7 LPMLTemperatureScaler_10 8 15 LPMLTemperatureScaler_9 16 23 LPMLTemperatureScaler_8 24 31 ixPM_FUSES_25 2 0x3fae0 4 0 4294967295 LPMLTemperatureScaler_15 0 7 LPMLTemperatureScaler_14 8 15 LPMLTemperatureScaler_13 16 23 LPMLTemperatureScaler_12 24 31 ixPM_FUSES_26 2 0x3fae4 4 0 4294967295 GnbLPML_3 0 7 GnbLPML_2 8 15 GnbLPML_1 16 23 GnbLPML_0 24 31 ixPM_FUSES_27 2 0x3fae8 4 0 4294967295 GnbLPML_7 0 7 GnbLPML_6 8 15 GnbLPML_5 16 23 GnbLPML_4 24 31 ixPM_FUSES_28 2 0x3faec 4 0 4294967295 GnbLPML_11 0 7 GnbLPML_10 8 15 GnbLPML_9 16 23 GnbLPML_8 24 31 ixPM_FUSES_29 2 0x3faf0 4 0 4294967295 GnbLPML_15 0 7 GnbLPML_14 8 15 GnbLPML_13 16 23 GnbLPML_12 24 31 ixPM_FUSES_30 2 0x3faf4 4 0 4294967295 NbVid_3 0 7 NbVid_2 8 15 NbVid_1 16 23 NbVid_0 24 31 ixPM_FUSES_31 2 0x3faf8 4 0 4294967295 CpuVid_3 0 7 CpuVid_2 8 15 CpuVid_1 16 23 CpuVid_0 24 31 ixPM_FUSES_32 2 0x3fafc 4 0 4294967295 CpuVid_7 0 7 CpuVid_6 8 15 CpuVid_5 16 23 CpuVid_4 24 31 ixPM_FUSES_33 2 0x3fb00 3 0 4294967295 Tdp2Watt 0 15 GnbLPMLMinVid 16 23 GnbLPMLMaxVid 24 31 ixPM_FUSES_34 2 0x3fb04 4 0 4294967295 Lpml_3 0 7 Lpml_2 8 15 Lpml_1 16 23 Lpml_0 24 31 ixPM_FUSES_35 2 0x3fb08 4 0 4294967295 Lpml_7 0 7 Lpml_6 8 15 Lpml_5 16 23 Lpml_4 24 31 ixPM_FUSES_36 2 0x3fb0c 4 0 4294967295 Lpmv_3 0 7 Lpmv_2 8 15 Lpmv_1 16 23 Lpmv_0 24 31 ixPM_FUSES_37 2 0x3fb10 4 0 4294967295 Lpmv_7 0 7 Lpmv_6 8 15 Lpmv_5 16 23 Lpmv_4 24 31 ixPM_FUSES_38 2 0x3fb14 4 0 4294967295 EClkDid_3 0 7 EClkDid_2 8 15 EClkDid_1 16 23 EClkDid_0 24 31 ixPM_FUSES_39 2 0x3fb18 4 0 4294967295 CoreDis 0 7 C6CstatePower 8 15 BoostLock 16 23 EClkDid_4 24 31 ixPM_FUSES_40 2 0x3fb1c 2 0 4294967295 BapmVddNbBaseLeakageLoSidd 0 15 BapmVddNbBaseLeakageHiSidd 16 31 ixPM_FUSES_41 2 0x3fb20 4 0 4294967295 VddNbVid_3 0 7 VddNbVid_2 8 15 VddNbVid_1 16 23 VddNbVid_0 24 31 ixPM_FUSES_42 2 0x3fb24 4 0 4294967295 VddNbVidOffset_2 0 7 VddNbVidOffset_1 8 15 VddNbVidOffset_0 16 23 VddNbVid_4 24 31 ixPM_FUSES_43 2 0x3fb28 4 0 4294967295 BapmDisable 0 7 CoreTdpLimit0 8 15 VddNbVidOffset_4 16 23 VddNbVidOffset_3 24 31 ixPM_FUSES_44 2 0x3fb2c 4 0 4294967295 LpmlL2_3 0 7 LpmlL2_2 8 15 LpmlL2_1 16 23 LpmlL2_0 24 31 ixPM_FUSES_45 2 0x3fb30 4 0 4294967295 LpmlL2_7 0 7 LpmlL2_6 8 15 LpmlL2_5 16 23 LpmlL2_4 24 31 ixPM_FUSES_46 2 0x3fb34 4 0 4294967295 CoolPdmTc 0 7 BaseCpcTdpLimit2 8 15 BaseCpcTdpLimit1 16 23 BaseCpcTdpLimit 24 31 ixPM_FUSES_47 2 0x3fb38 4 0 4294967295 CoolPdmThr2 0 7 CoolPdmThr1 8 15 GpuPdmTc 16 23 HeatPdmTc 24 31 ixPM_FUSES_48 2 0x3fb3c 4 0 4294967295 PkgPwr_MAWt 0 7 GpuActThr 8 15 HeatPdmThr2 16 23 HeatPdmThr1 24 31 ixPM_FUSES_49 2 0x3fb40 2 0 4294967295 SocketTdp 0 15 GpuPdmMult 16 31 ixPM_FUSES_50 2 0x3fb44 3 0 4294967295 Reserved2 0 15 Reserved1 16 23 NumBoostStates 24 31 ixPM_FUSES_51 2 0x3fb48 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_52 2 0x3fb4c 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_53 2 0x3fb50 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_54 2 0x3fb54 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_55 2 0x3fb58 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_56 2 0x3fb5c 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_57 2 0x3fb60 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_58 2 0x3fb64 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_59 2 0x3fb68 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_60 2 0x3fb6c 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_61 2 0x3fb70 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_62 2 0x3fb74 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_63 2 0x3fb78 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_64 2 0x3fb7c 1 0 4294967295 FUSE_DATA 0 31 ixPM_FUSES_65 2 0x3fb80 1 0 4294967295 FUSE_DATA 0 31 ixFIRMWARE_FLAGS 2 0x3f800 3 0 4294967295 INTERRUPTS_ENABLED 0 0 RESERVED 1 23 TEST_COUNT 24 31 ixTEMPERATURE_READ_ADDR 2 0x3f808 3 0 4294967295 CSR_ADDR 0 5 TCEN_ID 6 9 RESERVED 10 31 ixCURRENT_GNB_TEMP 2 0x3f810 1 0 4294967295 TEMP 0 10 ixCURRENT_GLOBAL_TEMP 2 0x3f814 1 0 4294967295 TEMP 0 10 ixFEATURE_STATUS 2 0x3f818 24 0 4294967295 SCLK_DPM_ON 0 0 MCLK_DPM_ON 1 1 LCLK_DPM_ON 2 2 UVD_DPM_ON 3 3 VCE_DPM_ON 4 4 ACP_DPM_ON 5 5 SAMU_DPM_ON 6 6 PCIE_DPM_ON 7 7 BAPM_ON 8 8 LPMX_ON 9 9 NBDPM_ON 10 10 LHTC_ON 11 11 VPC_ON 12 12 VOLTAGE_CONTROLLER_ON 13 13 TDC_LIMIT_ON 14 14 GPU_CAC_ON 15 15 AVS_ON 16 16 SPMI_ON 17 17 SCLK_DPM_FORCED 18 18 MCLK_DPM_FORCED 19 19 LCLK_DPM_FORCED 20 20 PCIE_DPM_FORCED 21 21 CLK_MON_ON 22 22 RESERVED 23 31 ixPCIE_PLL_RECONF 2 0x3f81c 4 0 4294967295 RECONF_WAIT 0 7 RECONF_WRAPPER 8 15 SB_RELOCATE_EN 16 23 SB_NEW_PORT 24 31 ixPM_INTERVAL_CNTL_0 2 0x3f820 4 0 4294967295 LCLK_DPM 0 7 THERMAL_CNTL 8 15 VOLTAGE_CNTL 16 23 LOADLINE 24 31 ixPM_INTERVAL_CNTL_1 2 0x3f824 4 0 4294967295 NB_DPM 0 7 AVS_PERIOD 8 15 PKGPWR_PERIOD 16 23 TDP_CNTL 24 31 ixPM_INTERVAL_CNTL_2 2 0x3f82c 4 0 4294967295 BAPM_PERIOD 0 7 HTC_PERIOD 8 15 TDC_PERIOD 16 23 LPMX_PERIOD 24 31 ixVPC_INTERVAL_CNTL 2 0x3f830 1 0 4294967295 VPC_PERIOD 0 31 ixDISP_PHY_TDP_LIMIT 2 0x3f834 1 0 4294967295 DisplayPhyTdpLimit 0 31 ixFCH_PWR_CREDIT 2 0x3f838 1 0 4294967295 FchPwrCredit 0 31 ixPKGPWR_MV_AVG 2 0x3f83c 1 0 4294967295 Avg_Pkg_Pwr 0 31 ixPACKAGE_POWER 2 0x3f840 1 0 4294967295 Pkg_power 0 31 ixPKG_PWR_CNTL 2 0x3f844 5 0 4294967295 CpcGpuPerfPri 0 0 PkgPwrLimit 1 16 FchPwrCreditScale 17 22 PkgHystCoeff 23 28 RESERVED 29 31 ixPKG_PWR_STATUS 2 0x3f848 5 0 4294967295 GnbMinLimitSetFlag 0 0 PstateLimitSetFlag 1 1 PkgPwrLimit_base 2 17 RESERVED 18 23 PkgPwr_MAWt 24 31 ixDISP_PHY_CONFIG 2 0x3f84c 2 0 4294967295 Corner 0 7 DispPHYConfig 8 15 ixGPU_TDP_LIMIT 2 0x3f850 2 0 4294967295 Gpu_Tdp_Limit 0 15 Reserved 16 31 ixEXT_API_IN_DATA_0_0 2 0x3f858 4 0 4294967295 byte0 0 7 byte1 8 15 byte2 16 23 byte3 24 31 ixEXT_API_IN_DATA_0_1 2 0x3f85c 4 0 4294967295 byte0 0 7 byte1 8 15 byte2 16 23 byte3 24 31 ixEXT_API_IN_DATA_0_2 2 0x3f860 4 0 4294967295 byte0 0 7 byte1 8 15 byte2 16 23 byte3 24 31 ixEXT_API_IN_DATA_0_3 2 0x3f864 4 0 4294967295 byte0 0 7 byte1 8 15 byte2 16 23 byte3 24 31 ixEXT_API_OUT_DATA_0_0 2 0x3f868 4 0 4294967295 byte0 0 7 byte1 8 15 byte2 16 23 byte3 24 31 ixEXT_API_OUT_DATA_0_1 2 0x3f86c 4 0 4294967295 byte0 0 7 byte1 8 15 byte2 16 23 byte3 24 31 ixEXT_API_OUT_DATA_0_2 2 0x3f870 4 0 4294967295 byte0 0 7 byte1 8 15 byte2 16 23 byte3 24 31 ixEXT_API_OUT_DATA_0_3 2 0x3f874 4 0 4294967295 byte0 0 7 byte1 8 15 byte2 16 23 byte3 24 31 ixBAPM_PARAMETERS 2 0x3f984 4 0 4294967295 MaxPwrCpu_1 0 7 NomPwrCpu_1 8 15 MaxPwrCpu_0 16 23 NomPwrCpu_0 24 31 ixBAPM_PARAMETERS_2 2 0x3f988 2 0 4294967295 MaxPwrGpu 0 15 NomPwrGpu 16 31 ixBAPM_PARAMETERS_3 2 0x3f98c 3 0 4294967295 TjOffset 0 7 EnergyCntNorm 8 17 Reserved 18 31 ixBAPM_PARAMETERS_4 2 0x3f990 3 0 4294967295 MinPwrGpu 0 15 MidPwrCpu_1 16 23 MidPwrCpu_0 24 31 ixSMU_SVI_TELEMETRY 2 0x3f994 2 0 4294967295 Iddspike_OCP 0 15 IddNbspike_OCP 16 31 ixBAPM_STATUS 2 0x3f998 4 0 4294967295 THROTTLE 0 7 THROTTLE_LAST 8 15 COUNT_CORE1 16 23 COUNT_CORE0 24 31 ixSMU_HTC_STATUS 2 0x3f99c 2 0 4294967295 HTC_ACTIVE 0 0 Reserved 1 31 ixSMU_VPC_STATUS 2 0x3f9a0 2 0 4294967295 AllCpuIdleLast 0 0 Reserved 1 31 ixENTITY_TEMPERATURES_1 2 0x3f9a4 1 0 4294967295 CORE0 0 31 ixENTITY_TEMPERATURES_2 2 0x3f9a8 1 0 4294967295 CORE1 0 31 ixENTITY_TEMPERATURES_3 2 0x3f9ac 1 0 4294967295 GPU 0 31 ixCU_POWER 2 0x3f9b0 2 0 4294967295 CU0_POWER 0 15 CU1_POWER 16 31 ixGPU_POWER 2 0x3f9b4 2 0 4294967295 IGPU_POWER 0 15 DGPU_POWER 16 31 ixNTE_POWER 2 0x3f9b8 2 0 4294967295 NTE0_POWER 0 15 NTE1_POWER 16 31 ixTDC_STATUS 2 0x3f9d0 4 0 4294967295 VDD_Boost 0 7 VDD_Throttle 8 15 VDDNB_Boost 16 23 VDDNB_Throttle 24 31 ixTDC_MV_AVERAGE 2 0x3f9d4 2 0 4294967295 IDD 0 15 IDDNB 16 31 ixPM_CONFIG 2 0x3f9d8 19 0 4294967295 Enable_VPC_Accumulators 0 0 Enable_BAPM 1 1 Enable_TDC_Limit 2 2 Enable_LPMx 3 3 Enable_HTC_Limit 4 4 Enable_NBDPM 5 5 Enable_LoadLine 6 6 Reserved 7 15 Override_VPC_Current 16 16 Reserved1 17 18 Override_Calc_Temp 19 19 Enable_Hybrid_Boost 20 20 Reserved2 21 23 PSTATE_AllCpusIdle 24 26 NBPSTATE_AllCpusIdle 27 27 Reserved3 28 28 SVI_Mode 29 29 Enable_PDM 30 30 Enable_PKG_PWR_LIMIT 31 31 ixTE0_TEMPERATURE_READ_ADDR 2 0x3f9dc 3 0 4294967295 CSR_ADDR 0 5 TCEN_ID 6 9 RESERVED 10 31 ixTE1_TEMPERATURE_READ_ADDR 2 0x3f9e0 3 0 4294967295 CSR_ADDR 0 5 TCEN_ID 6 9 RESERVED 10 31 ixTE2_TEMPERATURE_READ_ADDR 2 0x3f9e4 3 0 4294967295 CSR_ADDR 0 5 TCEN_ID 6 9 RESERVED 10 31 ixNB_DPM_CONFIG_1 2 0x3f9e8 4 0 4294967295 Dpm0PgNbPsLo 0 7 Dpm0PgNbPsHi 8 15 DpmXNbPsLo 16 23 DpmXNbPsHi 24 31 ixNB_DPM_CONFIG_2 2 0x3f9ec 4 0 4294967295 Hysteresis 0 7 SkipPG 8 15 SkipDPM0 16 23 EnablePSI1 24 31 ixNB_DPM_CONFIG_3 2 0x3f9f0 2 0 4294967295 RESERVED 0 23 EnableDpmPstatePoll 24 31 ixSMU_IDD_OVERRIDE 2 0x3f9fc 2 0 4294967295 IDD 0 15 IDDNB 16 31 ixAVS_CONFIG 2 0x3fa00 6 0 4294967295 AvsEnabledForPstates 0 7 AvsOverrideEnabled 8 8 AvsPsmTempCompensation 9 9 RESERVED1 10 15 AvsOverrideOffset 16 23 RESERVED 24 31 ixTDC_VRM_LIMIT 2 0x3fa04 2 0 4294967295 IDD 0 15 IDDNB 16 31 ixCU0_PSM_CONFIG 2 0x3fa08 4 0 4294967295 Psm4 0 7 Psm3 8 15 Psm2 16 23 Psm1 24 31 ixCU1_PSM_CONFIG 2 0x3fa0c 4 0 4294967295 Psm4 0 7 Psm3 8 15 Psm2 16 23 Psm1 24 31 ixSPMI_CONFIG 2 0x3fa10 3 0 4294967295 SpmiTestCode 0 7 SpmiTestData 8 15 RESERVED 16 31 ixSPMI_SMC_CHAIN_ADDR 2 0x3fa14 1 0 4294967295 Addr 0 31 ixSPMI_STATUS 2 0x3fa30 2 0 4294967295 OpDone 0 7 OpFailed 8 15 ixAVSNB_CONFIG 2 0x3fa34 7 0 4294967295 AvsEnabledForPstates 0 3 RESERVED0 4 7 AvsOverrideEnabled 8 8 AvsPsmTempCompensation 9 9 RESERVED1 10 15 AvsOverrideOffset 16 23 RESERVED 24 31 ixHTC_CONFIG 2 0x3fa38 4 0 4294967295 CSR_ADDR 0 5 TCEN_ID 6 9 HTC_ACTIVE_PSTATE_LIMIT 16 23 Reserved 24 31 ixAVS_CU0_TEMPERATURE_SENSOR 2 0x3fa3c 3 0 4294967295 CsrAddr 0 5 TcenID 6 9 RESERVED 10 31 ixAVS_CU1_TEMPERATURE_SENSOR 2 0x3fa40 3 0 4294967295 CsrAddr 0 5 TcenID 6 9 RESERVED 10 31 ixAVS_GNB_TEMPERATURE_SENSOR 2 0x3fa44 3 0 4294967295 CsrAddr 0 5 TcenID 6 9 RESERVED 10 31 ixAVS_UNB_TEMPERATURE_SENSOR 2 0x3fa48 3 0 4294967295 CsrAddr 0 5 TcenID 6 9 RESERVED 10 31 ixSMU_MONITOR_PORT80_MMIO_ADDR 2 0x3fa4c 1 0 4294967295 MMIO_ADDRESS 0 31 ixSMU_MONITOR_PORT80_MEMBASE_HI 2 0x3fa50 1 0 4294967295 MEMORY_BASE_HI 0 31 ixSMU_MONITOR_PORT80_MEMBASE_LO 2 0x3fa54 1 0 4294967295 MEMORY_BASE_LO 0 31 ixSMU_MONITOR_PORT80_MEMSETUP 2 0x3fa58 2 0 4294967295 MEMORY_POSITION 0 15 MEMORY_BUFFER_SIZE 16 31 ixSMU_MONITOR_PORT80_CTRL 2 0x3fa5c 4 0 4294967295 ENABLE_DRAM_SHADOW 0 0 ENABLE_CSR_SHADOW 1 1 RESERVED 2 15 POLLING_INTERVAL 16 31 ixSMU_TCEN_ALIVE 2 0x3fa60 3 0 4294967295 CORE_TCEN_ID 0 7 GNB_TCEN_ID 8 15 RESERVED 16 31 ixPDM_STATUS 2 0x3fa64 4 0 4294967295 PDM_ENABLED 0 0 NewCpcTdpLimit 1 16 NoofConnectedCores 17 20 Reserved 21 31 ixPDM_CNTL_1 2 0x3fa68 4 0 4294967295 BaseCoreTdpLimit0 0 7 BaseCoreTdpLimit1 8 15 BaseCoreTdpLimit2 16 23 GpuPdmMult 24 31 ixPDM_CNTL_2 2 0x3fa6c 4 0 4294967295 HeatPdmTc 0 7 CoolPdmTc 8 15 GpuPdmTc 16 23 GpuActThr 24 31 ixPDM_CNTL_3 2 0x3fa70 4 0 4294967295 HeatPdmThr1 0 7 HeatPdmThr2 8 15 CoolPdmThr1 16 23 CoolPdmThr2 24 31 ixSMU_PM_STATUS_0 2 0x3fe00 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_1 2 0x3fe04 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_2 2 0x3fe08 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_3 2 0x3fe0c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_4 2 0x3fe10 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_5 2 0x3fe14 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_6 2 0x3fe18 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_7 2 0x3fe1c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_8 2 0x3fe20 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_9 2 0x3fe24 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_10 2 0x3fe28 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_11 2 0x3fe2c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_12 2 0x3fe30 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_13 2 0x3fe34 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_14 2 0x3fe38 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_15 2 0x3fe3c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_16 2 0x3fe40 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_17 2 0x3fe44 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_18 2 0x3fe48 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_19 2 0x3fe4c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_20 2 0x3fe50 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_21 2 0x3fe54 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_22 2 0x3fe58 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_23 2 0x3fe5c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_24 2 0x3fe60 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_25 2 0x3fe64 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_26 2 0x3fe68 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_27 2 0x3fe6c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_28 2 0x3fe70 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_29 2 0x3fe74 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_30 2 0x3fe78 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_31 2 0x3fe7c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_32 2 0x3fe80 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_33 2 0x3fe84 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_34 2 0x3fe88 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_35 2 0x3fe8c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_36 2 0x3fe90 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_37 2 0x3fe94 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_38 2 0x3fe98 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_39 2 0x3fe9c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_40 2 0x3fea0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_41 2 0x3fea4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_42 2 0x3fea8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_43 2 0x3feac 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_44 2 0x3feb0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_45 2 0x3feb4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_46 2 0x3feb8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_47 2 0x3febc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_48 2 0x3fec0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_49 2 0x3fec4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_50 2 0x3fec8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_51 2 0x3fecc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_52 2 0x3fed0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_53 2 0x3fed4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_54 2 0x3fed8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_55 2 0x3fedc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_56 2 0x3fee0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_57 2 0x3fee4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_58 2 0x3fee8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_59 2 0x3feec 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_60 2 0x3fef0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_61 2 0x3fef4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_62 2 0x3fef8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_63 2 0x3fefc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_64 2 0x3ff00 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_65 2 0x3ff04 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_66 2 0x3ff08 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_67 2 0x3ff0c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_68 2 0x3ff10 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_69 2 0x3ff14 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_70 2 0x3ff18 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_71 2 0x3ff1c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_72 2 0x3ff20 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_73 2 0x3ff24 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_74 2 0x3ff28 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_75 2 0x3ff2c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_76 2 0x3ff30 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_77 2 0x3ff34 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_78 2 0x3ff38 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_79 2 0x3ff3c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_80 2 0x3ff40 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_81 2 0x3ff44 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_82 2 0x3ff48 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_83 2 0x3ff4c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_84 2 0x3ff50 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_85 2 0x3ff54 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_86 2 0x3ff58 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_87 2 0x3ff5c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_88 2 0x3ff60 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_89 2 0x3ff64 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_90 2 0x3ff68 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_91 2 0x3ff6c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_92 2 0x3ff70 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_93 2 0x3ff74 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_94 2 0x3ff78 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_95 2 0x3ff7c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_96 2 0x3ff80 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_97 2 0x3ff84 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_98 2 0x3ff88 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_99 2 0x3ff8c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_100 2 0x3ff90 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_101 2 0x3ff94 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_102 2 0x3ff98 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_103 2 0x3ff9c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_104 2 0x3ffa0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_105 2 0x3ffa4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_106 2 0x3ffa8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_107 2 0x3ffac 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_108 2 0x3ffb0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_109 2 0x3ffb4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_110 2 0x3ffb8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_111 2 0x3ffbc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_112 2 0x3ffc0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_113 2 0x3ffc4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_114 2 0x3ffc8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_115 2 0x3ffcc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_116 2 0x3ffd0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_117 2 0x3ffd4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_118 2 0x3ffd8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_119 2 0x3ffdc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_120 2 0x3ffe0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_121 2 0x3ffe4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_122 2 0x3ffe8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_123 2 0x3ffec 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_124 2 0x3fff0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_125 2 0x3fff4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_126 2 0x3fff8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_127 2 0x3fffc 1 0 4294967295 DATA 0 31 ixCG_THERMAL_INT_ENA 2 0xc2100024 6 0 4294967295 THERM_INTH_SET 0 0 THERM_INTL_SET 1 1 THERM_TRIGGER_SET 2 2 THERM_INTH_CLR 3 3 THERM_INTL_CLR 4 4 THERM_TRIGGER_CLR 5 5 ixCG_THERMAL_INT_CTRL 2 0xc2100028 8 0 4294967295 DIG_THERM_INTH 0 7 DIG_THERM_INTL 8 15 GNB_TEMP_THRESHOLD 16 23 THERM_INTH_MASK 24 24 THERM_INTL_MASK 25 25 THERM_TRIGGER_MASK 26 26 THERM_TRIGGER_CNB_MASK 27 27 THERM_GNB_HW_ENA 28 28 ixCG_THERMAL_INT_STATUS 2 0xc210002c 4 0 4294967295 THERM_INTH_DETECT 0 0 THERM_INTL_DETECT 1 1 THERM_TRIGGER_DETECT 2 2 THERM_TRIGGER_CNB_DETECT 3 3 ixGENERAL_PWRMGT 2 0xc0200000 18 0 4294967295 GLOBAL_PWRMGT_EN 0 0 STATIC_PM_EN 1 1 THERMAL_PROTECTION_DIS 2 2 THERMAL_PROTECTION_TYPE 3 3 SW_SMIO_INDEX 6 6 LOW_VOLT_D2_ACPI 8 8 LOW_VOLT_D3_ACPI 9 9 VOLT_PWRMGT_EN 10 10 SPARE11 11 11 GPU_COUNTER_ACPI 14 14 GPU_COUNTER_CLK 15 15 GPU_COUNTER_OFF 16 16 GPU_COUNTER_INTF_OFF 17 17 SPARE18 18 18 ACPI_D3_VID 19 20 DYN_SPREAD_SPECTRUM_EN 23 23 SPARE27 27 27 SPARE 28 31 ixCNB_PWRMGT_CNTL 2 0xc0200004 5 0 4294967295 GNB_SLOW_MODE 0 1 GNB_SLOW 2 2 FORCE_NB_PS1 3 3 DPM_ENABLED 4 4 SPARE 5 31 ixSCLK_PWRMGT_CNTL 2 0xc0200008 25 0 4294967295 SCLK_PWRMGT_OFF 0 0 SCLK_LOW_D1 1 1 DYN_PWR_DOWN_EN 2 2 RESET_BUSY_CNT 4 4 RESET_SCLK_CNT 5 5 RESERVED_0 6 6 DYN_GFX_CLK_OFF_EN 7 7 GFX_CLK_FORCE_ON 8 8 GFX_CLK_REQUEST_OFF 9 9 GFX_CLK_FORCE_OFF 10 10 GFX_CLK_OFF_ACPI_D1 11 11 GFX_CLK_OFF_ACPI_D2 12 12 GFX_CLK_OFF_ACPI_D3 13 13 DYN_LIGHT_SLEEP_EN 14 14 AUTO_SCLK_PULSE_SKIP 15 15 LIGHT_SLEEP_COUNTER 16 20 DYNAMIC_PM_EN 21 21 DPM_DYN_PWR_DOWN_CNTL 22 22 DPM_DYN_PWR_DOWN_EN 23 23 RESERVED_3 24 24 VOLTAGE_UPDATE_EN 25 25 FORCE_PM0_INTERRUPT 28 28 FORCE_PM1_INTERRUPT 29 29 GFX_VOLTAGE_CHANGE_EN 30 30 GFX_VOLTAGE_CHANGE_MODE 31 31 ixTARGET_AND_CURRENT_PROFILE_INDEX 2 0xc0200014 8 0 4294967295 TARGET_STATE 0 3 CURRENT_STATE 4 7 CURR_MCLK_INDEX 8 11 TARG_MCLK_INDEX 12 15 CURR_SCLK_INDEX 16 20 TARG_SCLK_INDEX 21 25 CURR_LCLK_INDEX 26 28 TARG_LCLK_INDEX 29 31 ixCG_FREQ_TRAN_VOTING_0 2 0xc02001a8 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_1 2 0xc02001ac 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_2 2 0xc02001b0 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_3 2 0xc02001b4 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_4 2 0xc02001b8 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_5 2 0xc02001bc 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_6 2 0xc02001c0 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_7 2 0xc02001c4 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixPLL_TEST_CNTL 2 0xc020003c 5 0 4294967295 TST_SRC_SEL 0 3 TST_REF_SEL 4 7 REF_TEST_COUNT 8 14 TST_RESET 15 15 TEST_COUNT 17 31 ixCG_STATIC_SCREEN_PARAMETER 2 0xc0200044 2 0 4294967295 STATIC_SCREEN_THRESHOLD 0 15 STATIC_SCREEN_THRESHOLD_UNIT 16 19 ixCG_DISPLAY_GAP_CNTL 2 0xc0200060 5 0 4294967295 DISP_GAP 0 1 VBI_TIMER_COUNT 4 17 VBI_TIMER_UNIT 20 22 DISP_GAP_MCHG 24 25 VBI_TIMER_DISABLE 28 28 ixCG_DISPLAY_GAP_CNTL2 2 0xc0200230 1 0 4294967295 VBI_PREDICTION 0 31 ixCG_ACPI_CNTL 2 0xc0200064 2 0 4294967295 SCLK_ACPI_DIV 0 6 SCLK_CHANGE_SKIP 7 7 ixSCLK_DEEP_SLEEP_CNTL 2 0xc0200080 19 0 4294967295 DIV_ID 0 2 RAMP_DIS 3 3 HYSTERESIS 4 15 SCLK_RUNNING_MASK 16 16 SELF_REFRESH_MASK 17 17 ALLOW_NBPSTATE_MASK 18 18 BIF_BUSY_MASK 19 19 UVD_BUSY_MASK 20 20 MC0SRBM_BUSY_MASK 21 21 MC1SRBM_BUSY_MASK 22 22 MC_ALLOW_MASK 23 23 SMU_BUSY_MASK 24 24 SELF_REFRESH_NLC_MASK 25 25 FAST_EXIT_REQ_NBPSTATE 26 26 DEEP_SLEEP_ENTRY_MODE 27 27 MBUS2_ACTIVE_MASK 28 28 VCE_BUSY_MASK 29 29 AZ_BUSY_MASK 30 30 ENABLE_DS 31 31 ixSCLK_DEEP_SLEEP_CNTL2 2 0xc0200084 16 0 4294967295 RLC_BUSY_MASK 0 0 HDP_BUSY_MASK 1 1 ROM_BUSY_MASK 2 2 IH_SEM_BUSY_MASK 3 3 PDMA_BUSY_MASK 4 4 IDCT_BUSY_MASK 6 6 SDMA_BUSY_MASK 7 7 DC_AZ_BUSY_MASK 8 8 ACP_SMU_ALLOW_DSLEEP_STUTTER_MASK 9 9 UVD_CG_MC_STAT_BUSY_MASK 10 10 VCE_CG_MC_STAT_BUSY_MASK 11 11 SAM_CG_MC_STAT_BUSY_MASK 12 12 SAM_CG_STATUS_BUSY_MASK 13 13 RLC_SMU_GFXCLK_OFF_MASK 14 14 SHALLOW_DIV_ID 21 23 INOUT_CUSHION 24 31 ixSCLK_DEEP_SLEEP_CNTL3 2 0xc020009c 16 0 4294967295 GRBM_0_SMU_BUSY_MASK 0 0 GRBM_1_SMU_BUSY_MASK 1 1 GRBM_2_SMU_BUSY_MASK 2 2 GRBM_3_SMU_BUSY_MASK 3 3 GRBM_4_SMU_BUSY_MASK 4 4 GRBM_5_SMU_BUSY_MASK 5 5 GRBM_6_SMU_BUSY_MASK 6 6 GRBM_7_SMU_BUSY_MASK 7 7 GRBM_8_SMU_BUSY_MASK 8 8 GRBM_9_SMU_BUSY_MASK 9 9 GRBM_10_SMU_BUSY_MASK 10 10 GRBM_11_SMU_BUSY_MASK 11 11 GRBM_12_SMU_BUSY_MASK 12 12 GRBM_13_SMU_BUSY_MASK 13 13 GRBM_14_SMU_BUSY_MASK 14 14 GRBM_15_SMU_BUSY_MASK 15 15 ixSCLK_DEEP_SLEEP_MISC_CNTL 2 0xc0200088 5 0 4294967295 DPM_DS_DIV_ID 0 2 DPM_SS_DIV_ID 3 5 OCP_ENABLE 16 16 OCP_DS_DIV_ID 17 19 OCP_SS_DIV_ID 20 22 ixLCLK_DEEP_SLEEP_CNTL 2 0xc020008c 5 0 4294967295 DIV_ID 0 2 RAMP_DIS 3 3 HYSTERESIS 4 15 RESERVED 16 30 ENABLE_DS 31 31 ixLCLK_DEEP_SLEEP_CNTL2 2 0xc0200310 23 0 4294967295 RFE_BUSY_MASK 0 0 BIF_CG_LCLK_BUSY_MASK 1 1 L1IMU_SMU_IDLE_MASK 2 2 RESERVED_BIT3 3 3 SCLK_RUNNING_MASK 4 4 SMU_BUSY_MASK 5 5 PCIE_LCLK_IDLE1_MASK 6 6 PCIE_LCLK_IDLE2_MASK 7 7 PCIE_LCLK_IDLE3_MASK 8 8 PCIE_LCLK_IDLE4_MASK 9 9 L1IMUGPP_IDLE_MASK 10 10 L1IMUGPPSB_IDLE_MASK 11 11 L1IMUBIF_IDLE_MASK 12 12 L1IMUINTGEN_IDLE_MASK 13 13 L2IMU_IDLE_MASK 14 14 ORB_IDLE_MASK 15 15 ON_INB_WAKE_MASK 16 16 ON_INB_WAKE_ACK_MASK 17 17 ON_OUTB_WAKE_MASK 18 18 ON_OUTB_WAKE_ACK_MASK 19 19 DMAACTIVE_MASK 20 20 RLC_SMU_GFXCLK_OFF_MASK 21 21 RESERVED 22 31 ixSMU_VOLTAGE_STATUS 2 0xc0200094 2 0 4294967295 SMU_VOLTAGE_STATUS 0 0 SMU_VOLTAGE_CURRENT_LEVEL 1 8 ixTARGET_AND_CURRENT_PROFILE_INDEX_1 2 0xc02000f0 8 0 4294967295 CURR_VDDCI_INDEX 0 3 TARG_VDDCI_INDEX 4 7 CURR_MVDD_INDEX 8 11 TARG_MVDD_INDEX 12 15 CURR_VDDC_INDEX 16 19 TARG_VDDC_INDEX 20 23 CURR_PCIE_INDEX 24 27 TARG_PCIE_INDEX 28 31 ixCG_ULV_PARAMETER 2 0xc020015c 2 0 4294967295 ULV_THRESHOLD 0 15 ULV_THRESHOLD_UNIT 16 19 ixSCLK_MIN_DIV 2 0xc0200308 2 0 4294967295 FRACV 0 11 INTV 12 18 ixLCAC_SX0_CNTL 2 0xc0400d00 4 0 4294967295 SX0_ENABLE 0 0 SX0_THRESHOLD 1 16 SX0_BLOCK_ID 17 21 SX0_SIGNAL_ID 22 29 ixLCAC_SX0_OVR_SEL 2 0xc0400d04 1 0 4294967295 SX0_OVR_SEL 0 31 ixLCAC_SX0_OVR_VAL 2 0xc0400d08 1 0 4294967295 SX0_OVR_VAL 0 31 ixLCAC_MC0_CNTL 2 0xc0400d30 4 0 4294967295 MC0_ENABLE 0 0 MC0_THRESHOLD 1 16 MC0_BLOCK_ID 17 21 MC0_SIGNAL_ID 22 29 ixLCAC_MC0_OVR_SEL 2 0xc0400d34 1 0 4294967295 MC0_OVR_SEL 0 31 ixLCAC_MC0_OVR_VAL 2 0xc0400d38 1 0 4294967295 MC0_OVR_VAL 0 31 ixLCAC_MC1_CNTL 2 0xc0400d3c 4 0 4294967295 MC1_ENABLE 0 0 MC1_THRESHOLD 1 16 MC1_BLOCK_ID 17 21 MC1_SIGNAL_ID 22 29 ixLCAC_MC1_OVR_SEL 2 0xc0400d40 1 0 4294967295 MC1_OVR_SEL 0 31 ixLCAC_MC1_OVR_VAL 2 0xc0400d44 1 0 4294967295 MC1_OVR_VAL 0 31 ixLCAC_MC2_CNTL 2 0xc0400d48 4 0 4294967295 MC2_ENABLE 0 0 MC2_THRESHOLD 1 16 MC2_BLOCK_ID 17 21 MC2_SIGNAL_ID 22 29 ixLCAC_MC2_OVR_SEL 2 0xc0400d4c 1 0 4294967295 MC2_OVR_SEL 0 31 ixLCAC_MC2_OVR_VAL 2 0xc0400d50 1 0 4294967295 MC2_OVR_VAL 0 31 ixLCAC_MC3_CNTL 2 0xc0400d54 4 0 4294967295 MC3_ENABLE 0 0 MC3_THRESHOLD 1 16 MC3_BLOCK_ID 17 21 MC3_SIGNAL_ID 22 29 ixLCAC_MC3_OVR_SEL 2 0xc0400d58 1 0 4294967295 MC3_OVR_SEL 0 31 ixLCAC_MC3_OVR_VAL 2 0xc0400d5c 1 0 4294967295 MC3_OVR_VAL 0 31 ixLCAC_CPL_CNTL 2 0xc0400d80 4 0 4294967295 CPL_ENABLE 0 0 CPL_THRESHOLD 1 16 CPL_BLOCK_ID 17 21 CPL_SIGNAL_ID 22 29 ixLCAC_CPL_OVR_SEL 2 0xc0400d84 1 0 4294967295 CPL_OVR_SEL 0 31 ixLCAC_CPL_OVR_VAL 2 0xc0400d88 1 0 4294967295 CPL_OVR_VAL 0 31