1098 mmGCK_SMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmGCK0_GCK_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmGCK1_GCK_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmGCK2_GCK_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmGCK3_GCK_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmGCK_SMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmGCK0_GCK_SMC_IND_DATA 0 0x81 0 0 4294967295 mmGCK1_GCK_SMC_IND_DATA 0 0x83 0 0 4294967295 mmGCK2_GCK_SMC_IND_DATA 0 0x85 0 0 4294967295 mmGCK3_GCK_SMC_IND_DATA 0 0x87 0 0 4294967295 ixCG_DCLK_CNTL 2 0xc050009c 4 0 4294967295 DCLK_DIVIDER 0 6 DCLK_DIR_CNTL_EN 8 8 DCLK_DIR_CNTL_TOG 9 9 DCLK_DIR_CNTL_DIVIDER 10 16 ixCG_DCLK_STATUS 2 0xc05000a0 2 0 4294967295 DCLK_STATUS 0 0 DCLK_DIR_CNTL_DONETOG 1 1 ixCG_VCLK_CNTL 2 0xc05000a4 4 0 4294967295 VCLK_DIVIDER 0 6 VCLK_DIR_CNTL_EN 8 8 VCLK_DIR_CNTL_TOG 9 9 VCLK_DIR_CNTL_DIVIDER 10 16 ixCG_VCLK_STATUS 2 0xc05000a8 2 0 4294967295 VCLK_STATUS 0 0 VCLK_DIR_CNTL_DONETOG 1 1 ixCG_ECLK_CNTL 2 0xc05000ac 4 0 4294967295 ECLK_DIVIDER 0 6 ECLK_DIR_CNTL_EN 8 8 ECLK_DIR_CNTL_TOG 9 9 ECLK_DIR_CNTL_DIVIDER 10 16 ixCG_ECLK_STATUS 2 0xc05000b0 2 0 4294967295 ECLK_STATUS 0 0 ECLK_DIR_CNTL_DONETOG 1 1 ixCG_ACLK_CNTL 2 0xc05000dc 4 0 4294967295 ACLK_DIVIDER 0 6 ACLK_DIR_CNTL_EN 8 8 ACLK_DIR_CNTL_TOG 9 9 ACLK_DIR_CNTL_DIVIDER 10 16 ixGCK_DFS_BYPASS_CNTL 2 0xc0500118 13 0 4294967295 BYPASSECLK 0 0 BYPASSLCLK 1 1 BYPASSEVCLK 2 2 BYPASSDCLK 3 3 BYPASSVCLK 4 4 BYPASSDISPCLK 5 5 BYPASSDPREFCLK 6 6 BYPASSACLK 7 7 BYPASSADIVCLK 8 8 BYPASSPSPCLK 9 9 BYPASSSAMCLK 10 10 BYPASSSCLK 11 11 USE_SPLL_BYPASS_EN 12 12 ixCG_SPLL_FUNC_CNTL 2 0xc0500140 11 0 4294967295 SPLL_RESET 0 0 SPLL_PWRON 1 1 SPLL_DIVEN 2 2 SPLL_BYPASS_EN 3 3 SPLL_BYPASS_THRU_DFS 4 4 SPLL_REF_DIV 5 10 SPLL_PDIV_A_UPDATE 11 11 SPLL_PDIV_A_EN 12 12 SPLL_PDIV_A 20 26 SPLL_DIVA_ACK 27 27 SPLL_OTEST_LOCK_EN 28 28 ixCG_SPLL_FUNC_CNTL_2 2 0xc0500144 10 0 4294967295 SCLK_MUX_SEL 0 8 SPLL_CTLREQ 11 11 SPLL_BYPASS_CHG 22 22 SPLL_CTLREQ_CHG 23 23 SPLL_RESET_CHG 24 24 SPLL_BABY_STEP_CHG 25 25 SCLK_MUX_UPDATE 26 26 SPLL_UNLOCK_CLEAR 27 27 SPLL_CLKF_UPDATE 28 28 SPLL_TEST_UNLOCK_CLR 30 30 ixCG_SPLL_FUNC_CNTL_3 2 0xc0500148 2 0 4294967295 SPLL_FB_DIV 0 25 SPLL_DITHEN 28 28 ixCG_SPLL_FUNC_CNTL_4 2 0xc050014c 11 0 4294967295 SPLL_SCLK_TEST_SEL 0 3 SPLL_SCLK_EXT_SEL 5 6 SPLL_SCLK_EN 7 8 SPLL_SPARE 9 18 TEST_FRAC_BYPASS 21 21 SPLL_ILOCK 23 23 SPLL_FBCLK_SEL 24 24 SPLL_VCTRLADC_EN 25 25 SPLL_SCLK_EXT 26 27 SPLL_SPARE_EXT 28 30 SPLL_VTOI_BIAS_CNTL 31 31 ixCG_SPLL_FUNC_CNTL_5 2 0xc0500150 7 0 4294967295 FBDIV_SSC_BYPASS 0 0 RISEFBVCO_EN 1 1 PFD_RESET_CNTRL 2 3 RESET_TIMER 4 5 FAST_LOCK_CNTRL 6 7 FAST_LOCK_EN 8 8 RESET_ANTI_MUX 9 9 ixCG_SPLL_FUNC_CNTL_6 2 0xc0500154 6 0 4294967295 SCLKMUX0_CLKOFF_CNT 0 7 SCLKMUX1_CLKOFF_CNT 8 15 SPLL_VCTL_EN 16 16 SPLL_VCTL_CNTRL_IN 17 20 SPLL_VCTL_CNTRL_OUT 21 24 SPLL_LF_CNTR 25 31 ixCG_SPLL_FUNC_CNTL_7 2 0xc0500158 1 0 4294967295 SPLL_BW_CNTRL 0 11 ixSPLL_CNTL_MODE 2 0xc0500160 9 0 4294967295 SPLL_SW_DIR_CONTROL 0 0 SPLL_LEGACY_PDIV 1 1 SPLL_TEST 2 2 SPLL_FASTEN 3 3 SPLL_ENSAT 4 4 SPLL_TEST_CLK_EXT_DIV 10 11 SPLL_CTLREQ_DLY_CNT 12 19 SPLL_RESET_EN 28 28 SPLL_VCO_MODE 29 30 ixCG_SPLL_SPREAD_SPECTRUM 2 0xc0500164 2 0 4294967295 SSEN 0 0 CLKS 4 15 ixCG_SPLL_SPREAD_SPECTRUM_2 2 0xc0500168 1 0 4294967295 CLKV 0 25 ixMPLL_BYPASSCLK_SEL 2 0xc050019c 1 0 4294967295 MPLL_CLKOUT_SEL 8 15 ixCG_CLKPIN_CNTL 2 0xc05001a0 2 0 4294967295 XTALIN_DIVIDE 1 1 BCLK_AS_XCLK 2 2 ixCG_CLKPIN_CNTL_2 2 0xc05001a4 13 0 4294967295 ENABLE_XCLK 0 0 FORCE_BIF_REFCLK_EN 3 3 MUX_TCLK_TO_XCLK 8 8 XO_IN_OSCIN_EN 14 14 XO_IN_ICORE_CLK_OE 15 15 XO_IN_CML_RXEN 16 16 XO_IN_BIDIR_CML_OE 17 17 XO_IN2_OSCIN_EN 18 18 XO_IN2_ICORE_CLK_OE 19 19 XO_IN2_CML_RXEN 20 20 XO_IN2_BIDIR_CML_OE 21 21 CML_CTRL 22 23 CLK_SPARE 24 31 ixCG_CLKPIN_CNTL_DC 2 0xc0500204 4 0 4294967295 OSC_EN 0 0 XTL_LOW_GAIN 1 2 XTL_XOCLK_DRV_R_EN 9 9 XTALIN_SEL 10 12 ixTHM_CLK_CNTL 2 0xc05001a8 3 0 4294967295 CMON_CLK_SEL 0 7 TMON_CLK_SEL 8 15 CTF_CLK_SHUTOFF_EN 16 16 ixMISC_CLK_CTRL 2 0xc05001ac 3 0 4294967295 DEEP_SLEEP_CLK_SEL 0 7 ZCLK_SEL 8 15 DFT_SMS_PG_CLK_SEL 16 23 ixGCK_PLL_TEST_CNTL 2 0xc05001c0 5 0 4294967295 TST_SRC_SEL 0 4 TST_REF_SEL 5 9 REF_TEST_COUNT 10 16 TST_RESET 17 17 TST_CLK_SEL_MODE 18 18 ixGCK_PLL_TEST_CNTL_2 2 0xc05001c4 1 0 4294967295 TEST_COUNT 17 31 ixGCK_ADFS_CLK_BYPASS_CNTL1 2 0xc05001c8 10 0 4294967295 ECLK_BYPASS_CNTL 0 2 SCLK_BYPASS_CNTL 3 5 LCLK_BYPASS_CNTL 6 8 DCLK_BYPASS_CNTL 9 11 VCLK_BYPASS_CNTL 12 14 DISPCLK_BYPASS_CNTL 15 17 DRREFCLK_BYPASS_CNTL 18 20 ACLK_BYPASS_CNTL 21 23 SAMCLK_BYPASS_CNTL 24 26 ACLK_DIV_BYPASS_CNTL 27 29 mmSMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC0_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmSMC1_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmSMC2_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmSMC3_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmSMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC0_SMC_IND_DATA 0 0x81 0 0 4294967295 mmSMC1_SMC_IND_DATA 0 0x83 0 0 4294967295 mmSMC2_SMC_IND_DATA 0 0x85 0 0 4294967295 mmSMC3_SMC_IND_DATA 0 0x87 0 0 4294967295 mmSMC_IND_INDEX_0 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_0 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_1 0 0x82 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_1 0 0x83 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_2 0 0x84 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_2 0 0x85 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_3 0 0x86 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_3 0 0x87 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_4 0 0x88 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_4 0 0x89 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_5 0 0x8a 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_5 0 0x8b 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_6 0 0x8c 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_6 0 0x8d 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_7 0 0x8e 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_7 0 0x8f 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_ACCESS_CNTL 0 0x92 16 0 4294967295 AUTO_INCREMENT_IND_0 0 0 AUTO_INCREMENT_IND_1 1 1 AUTO_INCREMENT_IND_2 2 2 AUTO_INCREMENT_IND_3 3 3 AUTO_INCREMENT_IND_4 4 4 AUTO_INCREMENT_IND_5 5 5 AUTO_INCREMENT_IND_6 6 6 AUTO_INCREMENT_IND_7 7 7 AUTO_INCREMENT_IND_8 8 8 AUTO_INCREMENT_IND_9 9 9 AUTO_INCREMENT_IND_10 10 10 AUTO_INCREMENT_IND_11 11 11 AUTO_INCREMENT_IND_12 12 12 AUTO_INCREMENT_IND_13 13 13 AUTO_INCREMENT_IND_14 14 14 AUTO_INCREMENT_IND_15 15 15 mmSMC_MESSAGE_0 0 0x94 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_0 0 0x95 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_1 0 0x96 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_1 0 0x97 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_2 0 0x98 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_2 0 0x99 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_3 0 0x9a 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_3 0 0x9b 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_4 0 0x9c 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_4 0 0x9d 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_5 0 0x9e 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_5 0 0x9f 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_6 0 0xa0 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_6 0 0xa1 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_7 0 0xa2 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_7 0 0xa3 1 0 4294967295 SMC_RESP 0 15 mmSMC_MSG_ARG_0 0 0xa4 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_1 0 0xa5 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_2 0 0xa6 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_3 0 0xa7 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_4 0 0xa8 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_5 0 0xa9 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_6 0 0xaa 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_7 0 0xab 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MESSAGE_8 0 0xb5 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_8 0 0xb6 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_9 0 0xb7 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_9 0 0xb8 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_10 0 0xb9 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_10 0 0xba 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_11 0 0xbb 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_11 0 0xbc 1 0 4294967295 SMC_RESP 0 15 mmSMC_MSG_ARG_8 0 0xbd 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_9 0 0xbe 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_10 0 0xbf 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_11 0 0x93 1 0 4294967295 SMC_MSG_ARG 0 31 ixSMC_SYSCON_RESET_CNTL 2 0x80000000 3 0 4294967295 rst_reg 0 0 srbm_soft_rst_override 1 1 RegReset 30 30 ixSMC_SYSCON_CLOCK_CNTL_0 2 0x80000004 4 0 4294967295 ck_disable 0 0 auto_cg_en 1 1 auto_cg_timeout 8 23 cken 24 24 ixSMC_SYSCON_CLOCK_CNTL_1 2 0x80000008 1 0 4294967295 auto_ck_disable 0 0 ixSMC_SYSCON_CLOCK_CNTL_2 2 0x8000000c 1 0 4294967295 wake_on_irq 0 31 ixSMC_SYSCON_MISC_CNTL 2 0x80000010 0 0 4294967295 ixSMC_SYSCON_MSG_ARG_0 2 0x80000068 1 0 4294967295 smc_msg_arg 0 31 ixSMC_PC_C 2 0x80000370 1 0 4294967295 smc_pc_c 0 31 ixSMC_SCRATCH9 2 0x80000424 1 0 4294967295 SCRATCH_VALUE 0 31 mmGPIOPAD_SW_INT_STAT 0 0x180 1 0 4294967295 SW_INT_STAT 0 0 mmGPIOPAD_STRENGTH 0 0x181 2 0 4294967295 GPIO_STRENGTH_SN 0 3 GPIO_STRENGTH_SP 4 7 mmGPIOPAD_MASK 0 0x182 1 0 4294967295 GPIO_MASK 0 30 mmGPIOPAD_A 0 0x183 1 0 4294967295 GPIO_A 0 30 mmGPIOPAD_EN 0 0x184 1 0 4294967295 GPIO_EN 0 30 mmGPIOPAD_Y 0 0x185 1 0 4294967295 GPIO_Y 0 30 mmGPIOPAD_PINSTRAPS 0 0x186 31 0 4294967295 GPIO_PINSTRAP_0 0 0 GPIO_PINSTRAP_1 1 1 GPIO_PINSTRAP_2 2 2 GPIO_PINSTRAP_3 3 3 GPIO_PINSTRAP_4 4 4 GPIO_PINSTRAP_5 5 5 GPIO_PINSTRAP_6 6 6 GPIO_PINSTRAP_7 7 7 GPIO_PINSTRAP_8 8 8 GPIO_PINSTRAP_9 9 9 GPIO_PINSTRAP_10 10 10 GPIO_PINSTRAP_11 11 11 GPIO_PINSTRAP_12 12 12 GPIO_PINSTRAP_13 13 13 GPIO_PINSTRAP_14 14 14 GPIO_PINSTRAP_15 15 15 GPIO_PINSTRAP_16 16 16 GPIO_PINSTRAP_17 17 17 GPIO_PINSTRAP_18 18 18 GPIO_PINSTRAP_19 19 19 GPIO_PINSTRAP_20 20 20 GPIO_PINSTRAP_21 21 21 GPIO_PINSTRAP_22 22 22 GPIO_PINSTRAP_23 23 23 GPIO_PINSTRAP_24 24 24 GPIO_PINSTRAP_25 25 25 GPIO_PINSTRAP_26 26 26 GPIO_PINSTRAP_27 27 27 GPIO_PINSTRAP_28 28 28 GPIO_PINSTRAP_29 29 29 GPIO_PINSTRAP_30 30 30 mmGPIOPAD_INT_STAT_EN 0 0x187 2 0 4294967295 GPIO_INT_STAT_EN 0 28 SW_INITIATED_INT_STAT_EN 31 31 mmGPIOPAD_INT_STAT 0 0x188 2 0 4294967295 GPIO_INT_STAT 0 28 SW_INITIATED_INT_STAT 31 31 mmGPIOPAD_INT_STAT_AK 0 0x189 30 0 4294967295 GPIO_INT_STAT_AK_0 0 0 GPIO_INT_STAT_AK_1 1 1 GPIO_INT_STAT_AK_2 2 2 GPIO_INT_STAT_AK_3 3 3 GPIO_INT_STAT_AK_4 4 4 GPIO_INT_STAT_AK_5 5 5 GPIO_INT_STAT_AK_6 6 6 GPIO_INT_STAT_AK_7 7 7 GPIO_INT_STAT_AK_8 8 8 GPIO_INT_STAT_AK_9 9 9 GPIO_INT_STAT_AK_10 10 10 GPIO_INT_STAT_AK_11 11 11 GPIO_INT_STAT_AK_12 12 12 GPIO_INT_STAT_AK_13 13 13 GPIO_INT_STAT_AK_14 14 14 GPIO_INT_STAT_AK_15 15 15 GPIO_INT_STAT_AK_16 16 16 GPIO_INT_STAT_AK_17 17 17 GPIO_INT_STAT_AK_18 18 18 GPIO_INT_STAT_AK_19 19 19 GPIO_INT_STAT_AK_20 20 20 GPIO_INT_STAT_AK_21 21 21 GPIO_INT_STAT_AK_22 22 22 GPIO_INT_STAT_AK_23 23 23 GPIO_INT_STAT_AK_24 24 24 GPIO_INT_STAT_AK_25 25 25 GPIO_INT_STAT_AK_26 26 26 GPIO_INT_STAT_AK_27 27 27 GPIO_INT_STAT_AK_28 28 28 SW_INITIATED_INT_STAT_AK 31 31 mmGPIOPAD_INT_EN 0 0x18a 2 0 4294967295 GPIO_INT_EN 0 28 SW_INITIATED_INT_EN 31 31 mmGPIOPAD_INT_TYPE 0 0x18b 2 0 4294967295 GPIO_INT_TYPE 0 28 SW_INITIATED_INT_TYPE 31 31 mmGPIOPAD_INT_POLARITY 0 0x18c 2 0 4294967295 GPIO_INT_POLARITY 0 28 SW_INITIATED_INT_POLARITY 31 31 mmGPIOPAD_EXTERN_TRIG_CNTL 0 0x18d 3 0 4294967295 EXTERN_TRIG_SEL 0 4 EXTERN_TRIG_CLR 5 5 EXTERN_TRIG_READ 6 6 mmGPIOPAD_RCVR_SEL 0 0x191 1 0 4294967295 GPIO_RCVR_SEL 0 30 mmGPIOPAD_PU_EN 0 0x192 1 0 4294967295 GPIO_PU_EN 0 30 mmGPIOPAD_PD_EN 0 0x193 1 0 4294967295 GPIO_PD_EN 0 30 mmCG_FPS_CNT 0 0x1b6 1 0 4294967295 FPS_CNT 0 31 mmSMU_IND_INDEX_0 0 0x1a6 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_0 0 0x1a7 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_1 0 0x1a8 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_1 0 0x1a9 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_2 0 0x1aa 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_2 0 0x1ab 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_3 0 0x1ac 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_3 0 0x1ad 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_4 0 0x1ae 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_4 0 0x1af 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_5 0 0x1b0 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_5 0 0x1b1 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_6 0 0x1b2 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_6 0 0x1b3 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_7 0 0x1b4 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_7 0 0x1b5 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_SMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU0_SMU_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmSMU1_SMU_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmSMU2_SMU_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmSMU3_SMU_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmSMU_SMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU0_SMU_SMC_IND_DATA 0 0x81 0 0 4294967295 mmSMU1_SMU_SMC_IND_DATA 0 0x83 0 0 4294967295 mmSMU2_SMU_SMC_IND_DATA 0 0x85 0 0 4294967295 mmSMU3_SMU_SMC_IND_DATA 0 0x87 0 0 4294967295 mmSMC_IND_INDEX_11 0 0x1ac 0 0 4294967295 mmSMC_IND_DATA_11 0 0x1ad 0 0 4294967295 ixRCU_UC_EVENTS 2 0xc0000004 16 0 4294967295 RCU_TST_jpc_rep_req 0 0 TST_RCU_jpc_rep_done 1 1 drv_rst_mode 2 2 SMU_DC_efuse_status_invalid 3 3 TP_Tester 6 6 boot_seq_done 7 7 sclk_deep_sleep_exit 8 8 BREAK_PT1_ACTIVE 9 9 BREAK_PT2_ACTIVE 10 10 FCH_HALT 11 11 RCU_GIO_fch_lockdown 13 13 INTERRUPTS_ENABLED 16 16 RCU_DtmCnt0_Done 17 17 RCU_DtmCnt1_Done 18 18 RCU_DtmCnt2_Done 19 19 irq31_sel 24 25 ixRCU_MISC_CTRL 2 0xc0000010 9 0 4294967295 REG_DRV_RST_MODE 1 1 REG_RCU_MEMREP_DIS 3 3 REG_CC_FUSE_DISABLE 4 4 REG_SAMU_FUSE_DISABLE 5 5 REG_CC_SRBM_RD_DISABLE 8 8 BREAK_PT1_DONE 16 16 BREAK_PT2_DONE 17 17 SAMU_START 22 22 RST_PULSE_WIDTH 23 31 ixCC_RCU_FUSES 2 0xc00c0000 21 0 4294967295 GPU_DIS 1 1 DEBUG_DISABLE 2 2 EFUSE_RD_DISABLE 4 4 CG_RST_GLB_REQ_DIS 5 5 DRV_RST_MODE 6 6 ROM_DIS 7 7 JPC_REP_DISABLE 8 8 RCU_BREAK_POINT1 9 9 RCU_BREAK_POINT2 10 10 SMU_IOC_MST_DISABLE 14 14 FCH_LOCKOUT_ENABLE 15 15 FCH_XFIRE_FILTER_ENABLE 16 16 XFIRE_DISABLE 17 17 SAMU_FUSE_DISABLE 18 18 BIF_RST_POLLING_DISABLE 19 19 MEM_HARDREP_EN 21 21 PCIE_INIT_DISABLE 22 22 DSMU_DISABLE 23 23 WRP_FUSE_VALID 24 24 PHY_FUSE_VALID 25 25 RCU_SPARE 26 31 ixCC_SMU_MISC_FUSES 2 0xc00c0004 13 0 4294967295 IOMMU_V2_DISABLE 1 1 MinSClkDid 2 8 MISC_SPARE 9 10 PostResetGnbClkDid 11 17 L2IMU_tn2_dtc_half 18 18 L2IMU_tn2_ptc_half 19 19 L2IMU_tn2_itc_half 20 20 L2IMU_tn2_pdc_half 21 21 L2IMU_tn2_ptc_dis 22 22 L2IMU_tn2_itc_dis 23 23 VCE_DISABLE 27 27 IOC_IOMMU_DISABLE 28 28 GNB_SPARE 29 30 ixCC_SCLK_VID_FUSES 2 0xc00c0008 4 0 4294967295 SClkVid0 0 7 SClkVid1 8 15 SClkVid2 16 23 SClkVid3 24 31 ixCC_GIO_IOCCFG_FUSES 2 0xc00c000c 1 0 4294967295 NB_REV_ID 1 10 ixCC_GIO_IOC_FUSES 2 0xc00c0010 1 0 4294967295 IOC_FUSES 1 5 ixCC_SMU_TST_EFUSE1_MISC 2 0xc00c001c 15 0 4294967295 RF_RM_6_2 1 5 RME 6 6 MBIST_DISABLE 7 7 HARD_REPAIR_DISABLE 8 8 SOFT_REPAIR_DISABLE 9 9 GPU_DIS 10 10 SMS_PWRDWN_DISABLE 11 11 CRBBMP1500_DISA 12 12 CRBBMP1500_DISB 13 13 RM_RF8 14 14 DFT_SPARE1 22 22 DFT_SPARE2 23 23 DFT_SPARE3 24 24 VCE_DISABLE 25 25 DCE_SCAN_DISABLE 26 26 ixCC_TST_ID_STRAPS 2 0xc00c0020 4 0 4294967295 DEVICE_ID 4 19 MAJOR_REV_ID 20 23 MINOR_REV_ID 24 27 ATI_REV_ID 28 31 ixCC_FCTRL_FUSES 2 0xc00c0024 1 0 4294967295 EXT_EFUSE_MACRO_PRESENT 1 1 ixCC_HARVEST_FUSES 2 0xc00c0028 4 0 4294967295 VCE_DISABLE 1 2 UVD_DISABLE 4 4 ACP_EXISTS 6 6 DC_DISABLE 8 13 ixSMU_MAIN_PLL_OP_FREQ 2 0xe0003020 1 0 4294967295 PLL_OP_FREQ 0 31 ixSMU_STATUS 2 0xe0003088 2 0 4294967295 SMU_DONE 0 0 SMU_PASS 1 1 ixSMU_FIRMWARE 2 0xe00030a4 7 0 4294967295 SMU_IN_PROG 0 0 SMU_RD_DONE 1 2 SMU_SRAM_RD_BLOCK_EN 3 3 SMU_SRAM_WR_BLOCK_EN 4 4 SMU_counter 8 11 SMU_MODE 16 16 SMU_SEL 17 17 ixSMU_INPUT_DATA 2 0xe00030b8 2 0 4294967295 START_ADDR 0 30 AUTO_START 31 31 ixSMU_EFUSE_0 2 0xc0100000 1 0 4294967295 EFUSE_DATA 0 31 ixMCARB_DRAM_TIMING_TABLE_1 2 0x33018 1 0 4294967295 entries_0_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_2 2 0x3301c 1 0 4294967295 entries_0_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_3 2 0x33020 4 0 4294967295 entries_0_0_padding_2 0 7 entries_0_0_padding_1 8 15 entries_0_0_padding_0 16 23 entries_0_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_4 2 0x33024 1 0 4294967295 entries_0_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_5 2 0x33028 1 0 4294967295 entries_0_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_6 2 0x3302c 4 0 4294967295 entries_0_1_padding_2 0 7 entries_0_1_padding_1 8 15 entries_0_1_padding_0 16 23 entries_0_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_7 2 0x33030 1 0 4294967295 entries_0_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_8 2 0x33034 1 0 4294967295 entries_0_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_9 2 0x33038 4 0 4294967295 entries_0_2_padding_2 0 7 entries_0_2_padding_1 8 15 entries_0_2_padding_0 16 23 entries_0_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_10 2 0x3303c 1 0 4294967295 entries_0_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_11 2 0x33040 1 0 4294967295 entries_0_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_12 2 0x33044 4 0 4294967295 entries_0_3_padding_2 0 7 entries_0_3_padding_1 8 15 entries_0_3_padding_0 16 23 entries_0_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_13 2 0x33048 1 0 4294967295 entries_1_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_14 2 0x3304c 1 0 4294967295 entries_1_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_15 2 0x33050 4 0 4294967295 entries_1_0_padding_2 0 7 entries_1_0_padding_1 8 15 entries_1_0_padding_0 16 23 entries_1_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_16 2 0x33054 1 0 4294967295 entries_1_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_17 2 0x33058 1 0 4294967295 entries_1_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_18 2 0x3305c 4 0 4294967295 entries_1_1_padding_2 0 7 entries_1_1_padding_1 8 15 entries_1_1_padding_0 16 23 entries_1_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_19 2 0x33060 1 0 4294967295 entries_1_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_20 2 0x33064 1 0 4294967295 entries_1_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_21 2 0x33068 4 0 4294967295 entries_1_2_padding_2 0 7 entries_1_2_padding_1 8 15 entries_1_2_padding_0 16 23 entries_1_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_22 2 0x3306c 1 0 4294967295 entries_1_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_23 2 0x33070 1 0 4294967295 entries_1_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_24 2 0x33074 4 0 4294967295 entries_1_3_padding_2 0 7 entries_1_3_padding_1 8 15 entries_1_3_padding_0 16 23 entries_1_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_25 2 0x33078 1 0 4294967295 entries_2_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_26 2 0x3307c 1 0 4294967295 entries_2_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_27 2 0x33080 4 0 4294967295 entries_2_0_padding_2 0 7 entries_2_0_padding_1 8 15 entries_2_0_padding_0 16 23 entries_2_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_28 2 0x33084 1 0 4294967295 entries_2_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_29 2 0x33088 1 0 4294967295 entries_2_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_30 2 0x3308c 4 0 4294967295 entries_2_1_padding_2 0 7 entries_2_1_padding_1 8 15 entries_2_1_padding_0 16 23 entries_2_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_31 2 0x33090 1 0 4294967295 entries_2_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_32 2 0x33094 1 0 4294967295 entries_2_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_33 2 0x33098 4 0 4294967295 entries_2_2_padding_2 0 7 entries_2_2_padding_1 8 15 entries_2_2_padding_0 16 23 entries_2_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_34 2 0x3309c 1 0 4294967295 entries_2_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_35 2 0x330a0 1 0 4294967295 entries_2_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_36 2 0x330a4 4 0 4294967295 entries_2_3_padding_2 0 7 entries_2_3_padding_1 8 15 entries_2_3_padding_0 16 23 entries_2_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_37 2 0x330a8 1 0 4294967295 entries_3_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_38 2 0x330ac 1 0 4294967295 entries_3_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_39 2 0x330b0 4 0 4294967295 entries_3_0_padding_2 0 7 entries_3_0_padding_1 8 15 entries_3_0_padding_0 16 23 entries_3_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_40 2 0x330b4 1 0 4294967295 entries_3_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_41 2 0x330b8 1 0 4294967295 entries_3_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_42 2 0x330bc 4 0 4294967295 entries_3_1_padding_2 0 7 entries_3_1_padding_1 8 15 entries_3_1_padding_0 16 23 entries_3_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_43 2 0x330c0 1 0 4294967295 entries_3_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_44 2 0x330c4 1 0 4294967295 entries_3_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_45 2 0x330c8 4 0 4294967295 entries_3_2_padding_2 0 7 entries_3_2_padding_1 8 15 entries_3_2_padding_0 16 23 entries_3_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_46 2 0x330cc 1 0 4294967295 entries_3_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_47 2 0x330d0 1 0 4294967295 entries_3_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_48 2 0x330d4 4 0 4294967295 entries_3_3_padding_2 0 7 entries_3_3_padding_1 8 15 entries_3_3_padding_0 16 23 entries_3_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_49 2 0x330d8 1 0 4294967295 entries_4_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_50 2 0x330dc 1 0 4294967295 entries_4_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_51 2 0x330e0 4 0 4294967295 entries_4_0_padding_2 0 7 entries_4_0_padding_1 8 15 entries_4_0_padding_0 16 23 entries_4_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_52 2 0x330e4 1 0 4294967295 entries_4_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_53 2 0x330e8 1 0 4294967295 entries_4_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_54 2 0x330ec 4 0 4294967295 entries_4_1_padding_2 0 7 entries_4_1_padding_1 8 15 entries_4_1_padding_0 16 23 entries_4_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_55 2 0x330f0 1 0 4294967295 entries_4_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_56 2 0x330f4 1 0 4294967295 entries_4_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_57 2 0x330f8 4 0 4294967295 entries_4_2_padding_2 0 7 entries_4_2_padding_1 8 15 entries_4_2_padding_0 16 23 entries_4_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_58 2 0x330fc 1 0 4294967295 entries_4_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_59 2 0x33100 1 0 4294967295 entries_4_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_60 2 0x33104 4 0 4294967295 entries_4_3_padding_2 0 7 entries_4_3_padding_1 8 15 entries_4_3_padding_0 16 23 entries_4_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_61 2 0x33108 1 0 4294967295 entries_5_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_62 2 0x3310c 1 0 4294967295 entries_5_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_63 2 0x33110 4 0 4294967295 entries_5_0_padding_2 0 7 entries_5_0_padding_1 8 15 entries_5_0_padding_0 16 23 entries_5_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_64 2 0x33114 1 0 4294967295 entries_5_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_65 2 0x33118 1 0 4294967295 entries_5_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_66 2 0x3311c 4 0 4294967295 entries_5_1_padding_2 0 7 entries_5_1_padding_1 8 15 entries_5_1_padding_0 16 23 entries_5_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_67 2 0x33120 1 0 4294967295 entries_5_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_68 2 0x33124 1 0 4294967295 entries_5_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_69 2 0x33128 4 0 4294967295 entries_5_2_padding_2 0 7 entries_5_2_padding_1 8 15 entries_5_2_padding_0 16 23 entries_5_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_70 2 0x3312c 1 0 4294967295 entries_5_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_71 2 0x33130 1 0 4294967295 entries_5_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_72 2 0x33134 4 0 4294967295 entries_5_3_padding_2 0 7 entries_5_3_padding_1 8 15 entries_5_3_padding_0 16 23 entries_5_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_73 2 0x33138 1 0 4294967295 entries_6_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_74 2 0x3313c 1 0 4294967295 entries_6_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_75 2 0x33140 4 0 4294967295 entries_6_0_padding_2 0 7 entries_6_0_padding_1 8 15 entries_6_0_padding_0 16 23 entries_6_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_76 2 0x33144 1 0 4294967295 entries_6_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_77 2 0x33148 1 0 4294967295 entries_6_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_78 2 0x3314c 4 0 4294967295 entries_6_1_padding_2 0 7 entries_6_1_padding_1 8 15 entries_6_1_padding_0 16 23 entries_6_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_79 2 0x33150 1 0 4294967295 entries_6_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_80 2 0x33154 1 0 4294967295 entries_6_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_81 2 0x33158 4 0 4294967295 entries_6_2_padding_2 0 7 entries_6_2_padding_1 8 15 entries_6_2_padding_0 16 23 entries_6_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_82 2 0x3315c 1 0 4294967295 entries_6_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_83 2 0x33160 1 0 4294967295 entries_6_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_84 2 0x33164 4 0 4294967295 entries_6_3_padding_2 0 7 entries_6_3_padding_1 8 15 entries_6_3_padding_0 16 23 entries_6_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_85 2 0x33168 1 0 4294967295 entries_7_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_86 2 0x3316c 1 0 4294967295 entries_7_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_87 2 0x33170 4 0 4294967295 entries_7_0_padding_2 0 7 entries_7_0_padding_1 8 15 entries_7_0_padding_0 16 23 entries_7_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_88 2 0x33174 1 0 4294967295 entries_7_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_89 2 0x33178 1 0 4294967295 entries_7_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_90 2 0x3317c 4 0 4294967295 entries_7_1_padding_2 0 7 entries_7_1_padding_1 8 15 entries_7_1_padding_0 16 23 entries_7_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_91 2 0x33180 1 0 4294967295 entries_7_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_92 2 0x33184 1 0 4294967295 entries_7_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_93 2 0x33188 4 0 4294967295 entries_7_2_padding_2 0 7 entries_7_2_padding_1 8 15 entries_7_2_padding_0 16 23 entries_7_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_94 2 0x3318c 1 0 4294967295 entries_7_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_95 2 0x33190 1 0 4294967295 entries_7_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_96 2 0x33194 4 0 4294967295 entries_7_3_padding_2 0 7 entries_7_3_padding_1 8 15 entries_7_3_padding_0 16 23 entries_7_3_McArbBurstTime 24 31 ixMC_REGISTERS_TABLE_1 2 0x33198 4 0 4294967295 reserved_2 0 7 reserved_1 8 15 reserved_0 16 23 last 24 31 ixMC_REGISTERS_TABLE_2 2 0x3319c 2 0 4294967295 address_0_s1 0 15 address_0_s0 16 31 ixMC_REGISTERS_TABLE_3 2 0x331a0 2 0 4294967295 address_1_s1 0 15 address_1_s0 16 31 ixMC_REGISTERS_TABLE_4 2 0x331a4 2 0 4294967295 address_2_s1 0 15 address_2_s0 16 31 ixMC_REGISTERS_TABLE_5 2 0x331a8 2 0 4294967295 address_3_s1 0 15 address_3_s0 16 31 ixMC_REGISTERS_TABLE_6 2 0x331ac 2 0 4294967295 address_4_s1 0 15 address_4_s0 16 31 ixMC_REGISTERS_TABLE_7 2 0x331b0 2 0 4294967295 address_5_s1 0 15 address_5_s0 16 31 ixMC_REGISTERS_TABLE_8 2 0x331b4 2 0 4294967295 address_6_s1 0 15 address_6_s0 16 31 ixMC_REGISTERS_TABLE_9 2 0x331b8 2 0 4294967295 address_7_s1 0 15 address_7_s0 16 31 ixMC_REGISTERS_TABLE_10 2 0x331bc 2 0 4294967295 address_8_s1 0 15 address_8_s0 16 31 ixMC_REGISTERS_TABLE_11 2 0x331c0 2 0 4294967295 address_9_s1 0 15 address_9_s0 16 31 ixMC_REGISTERS_TABLE_12 2 0x331c4 2 0 4294967295 address_10_s1 0 15 address_10_s0 16 31 ixMC_REGISTERS_TABLE_13 2 0x331c8 2 0 4294967295 address_11_s1 0 15 address_11_s0 16 31 ixMC_REGISTERS_TABLE_14 2 0x331cc 2 0 4294967295 address_12_s1 0 15 address_12_s0 16 31 ixMC_REGISTERS_TABLE_15 2 0x331d0 2 0 4294967295 address_13_s1 0 15 address_13_s0 16 31 ixMC_REGISTERS_TABLE_16 2 0x331d4 2 0 4294967295 address_14_s1 0 15 address_14_s0 16 31 ixMC_REGISTERS_TABLE_17 2 0x331d8 2 0 4294967295 address_15_s1 0 15 address_15_s0 16 31 ixMC_REGISTERS_TABLE_18 2 0x331dc 1 0 4294967295 data_0_value_0 0 31 ixMC_REGISTERS_TABLE_19 2 0x331e0 1 0 4294967295 data_0_value_1 0 31 ixMC_REGISTERS_TABLE_20 2 0x331e4 1 0 4294967295 data_0_value_2 0 31 ixMC_REGISTERS_TABLE_21 2 0x331e8 1 0 4294967295 data_0_value_3 0 31 ixMC_REGISTERS_TABLE_22 2 0x331ec 1 0 4294967295 data_0_value_4 0 31 ixMC_REGISTERS_TABLE_23 2 0x331f0 1 0 4294967295 data_0_value_5 0 31 ixMC_REGISTERS_TABLE_24 2 0x331f4 1 0 4294967295 data_0_value_6 0 31 ixMC_REGISTERS_TABLE_25 2 0x331f8 1 0 4294967295 data_0_value_7 0 31 ixMC_REGISTERS_TABLE_26 2 0x331fc 1 0 4294967295 data_0_value_8 0 31 ixMC_REGISTERS_TABLE_27 2 0x33200 1 0 4294967295 data_0_value_9 0 31 ixMC_REGISTERS_TABLE_28 2 0x33204 1 0 4294967295 data_0_value_10 0 31 ixMC_REGISTERS_TABLE_29 2 0x33208 1 0 4294967295 data_0_value_11 0 31 ixMC_REGISTERS_TABLE_30 2 0x3320c 1 0 4294967295 data_0_value_12 0 31 ixMC_REGISTERS_TABLE_31 2 0x33210 1 0 4294967295 data_0_value_13 0 31 ixMC_REGISTERS_TABLE_32 2 0x33214 1 0 4294967295 data_0_value_14 0 31 ixMC_REGISTERS_TABLE_33 2 0x33218 1 0 4294967295 data_0_value_15 0 31 ixMC_REGISTERS_TABLE_34 2 0x3321c 1 0 4294967295 data_1_value_0 0 31 ixMC_REGISTERS_TABLE_35 2 0x33220 1 0 4294967295 data_1_value_1 0 31 ixMC_REGISTERS_TABLE_36 2 0x33224 1 0 4294967295 data_1_value_2 0 31 ixMC_REGISTERS_TABLE_37 2 0x33228 1 0 4294967295 data_1_value_3 0 31 ixMC_REGISTERS_TABLE_38 2 0x3322c 1 0 4294967295 data_1_value_4 0 31 ixMC_REGISTERS_TABLE_39 2 0x33230 1 0 4294967295 data_1_value_5 0 31 ixMC_REGISTERS_TABLE_40 2 0x33234 1 0 4294967295 data_1_value_6 0 31 ixMC_REGISTERS_TABLE_41 2 0x33238 1 0 4294967295 data_1_value_7 0 31 ixMC_REGISTERS_TABLE_42 2 0x3323c 1 0 4294967295 data_1_value_8 0 31 ixMC_REGISTERS_TABLE_43 2 0x33240 1 0 4294967295 data_1_value_9 0 31 ixMC_REGISTERS_TABLE_44 2 0x33244 1 0 4294967295 data_1_value_10 0 31 ixMC_REGISTERS_TABLE_45 2 0x33248 1 0 4294967295 data_1_value_11 0 31 ixMC_REGISTERS_TABLE_46 2 0x3324c 1 0 4294967295 data_1_value_12 0 31 ixMC_REGISTERS_TABLE_47 2 0x33250 1 0 4294967295 data_1_value_13 0 31 ixMC_REGISTERS_TABLE_48 2 0x33254 1 0 4294967295 data_1_value_14 0 31 ixMC_REGISTERS_TABLE_49 2 0x33258 1 0 4294967295 data_1_value_15 0 31 ixMC_REGISTERS_TABLE_50 2 0x3325c 1 0 4294967295 data_2_value_0 0 31 ixMC_REGISTERS_TABLE_51 2 0x33260 1 0 4294967295 data_2_value_1 0 31 ixMC_REGISTERS_TABLE_52 2 0x33264 1 0 4294967295 data_2_value_2 0 31 ixMC_REGISTERS_TABLE_53 2 0x33268 1 0 4294967295 data_2_value_3 0 31 ixMC_REGISTERS_TABLE_54 2 0x3326c 1 0 4294967295 data_2_value_4 0 31 ixMC_REGISTERS_TABLE_55 2 0x33270 1 0 4294967295 data_2_value_5 0 31 ixMC_REGISTERS_TABLE_56 2 0x33274 1 0 4294967295 data_2_value_6 0 31 ixMC_REGISTERS_TABLE_57 2 0x33278 1 0 4294967295 data_2_value_7 0 31 ixMC_REGISTERS_TABLE_58 2 0x3327c 1 0 4294967295 data_2_value_8 0 31 ixMC_REGISTERS_TABLE_59 2 0x33280 1 0 4294967295 data_2_value_9 0 31 ixMC_REGISTERS_TABLE_60 2 0x33284 1 0 4294967295 data_2_value_10 0 31 ixMC_REGISTERS_TABLE_61 2 0x33288 1 0 4294967295 data_2_value_11 0 31 ixMC_REGISTERS_TABLE_62 2 0x3328c 1 0 4294967295 data_2_value_12 0 31 ixMC_REGISTERS_TABLE_63 2 0x33290 1 0 4294967295 data_2_value_13 0 31 ixMC_REGISTERS_TABLE_64 2 0x33294 1 0 4294967295 data_2_value_14 0 31 ixMC_REGISTERS_TABLE_65 2 0x33298 1 0 4294967295 data_2_value_15 0 31 ixMC_REGISTERS_TABLE_66 2 0x3329c 1 0 4294967295 data_3_value_0 0 31 ixMC_REGISTERS_TABLE_67 2 0x332a0 1 0 4294967295 data_3_value_1 0 31 ixMC_REGISTERS_TABLE_68 2 0x332a4 1 0 4294967295 data_3_value_2 0 31 ixMC_REGISTERS_TABLE_69 2 0x332a8 1 0 4294967295 data_3_value_3 0 31 ixMC_REGISTERS_TABLE_70 2 0x332ac 1 0 4294967295 data_3_value_4 0 31 ixMC_REGISTERS_TABLE_71 2 0x332b0 1 0 4294967295 data_3_value_5 0 31 ixMC_REGISTERS_TABLE_72 2 0x332b4 1 0 4294967295 data_3_value_6 0 31 ixMC_REGISTERS_TABLE_73 2 0x332b8 1 0 4294967295 data_3_value_7 0 31 ixMC_REGISTERS_TABLE_74 2 0x332bc 1 0 4294967295 data_3_value_8 0 31 ixMC_REGISTERS_TABLE_75 2 0x332c0 1 0 4294967295 data_3_value_9 0 31 ixMC_REGISTERS_TABLE_76 2 0x332c4 1 0 4294967295 data_3_value_10 0 31 ixMC_REGISTERS_TABLE_77 2 0x332c8 1 0 4294967295 data_3_value_11 0 31 ixMC_REGISTERS_TABLE_78 2 0x332cc 1 0 4294967295 data_3_value_12 0 31 ixMC_REGISTERS_TABLE_79 2 0x332d0 1 0 4294967295 data_3_value_13 0 31 ixMC_REGISTERS_TABLE_80 2 0x332d4 1 0 4294967295 data_3_value_14 0 31 ixMC_REGISTERS_TABLE_81 2 0x332d8 1 0 4294967295 data_3_value_15 0 31 ixDPM_TABLE_1 2 0x332dc 1 0 4294967295 GraphicsPIDController_Ki 0 31 ixDPM_TABLE_2 2 0x332e0 1 0 4294967295 GraphicsPIDController_LFWindupUpperLim 0 31 ixDPM_TABLE_3 2 0x332e4 1 0 4294967295 GraphicsPIDController_LFWindupLowerLim 0 31 ixDPM_TABLE_4 2 0x332e8 1 0 4294967295 GraphicsPIDController_StatePrecision 0 31 ixDPM_TABLE_5 2 0x332ec 1 0 4294967295 GraphicsPIDController_LfPrecision 0 31 ixDPM_TABLE_6 2 0x332f0 1 0 4294967295 GraphicsPIDController_LfOffset 0 31 ixDPM_TABLE_7 2 0x332f4 1 0 4294967295 GraphicsPIDController_MaxState 0 31 ixDPM_TABLE_8 2 0x332f8 1 0 4294967295 GraphicsPIDController_MaxLfFraction 0 31 ixDPM_TABLE_9 2 0x332fc 1 0 4294967295 GraphicsPIDController_StateShift 0 31 ixDPM_TABLE_10 2 0x33300 1 0 4294967295 MemoryPIDController_Ki 0 31 ixDPM_TABLE_11 2 0x33304 1 0 4294967295 MemoryPIDController_LFWindupUpperLim 0 31 ixDPM_TABLE_12 2 0x33308 1 0 4294967295 MemoryPIDController_LFWindupLowerLim 0 31 ixDPM_TABLE_13 2 0x3330c 1 0 4294967295 MemoryPIDController_StatePrecision 0 31 ixDPM_TABLE_14 2 0x33310 1 0 4294967295 MemoryPIDController_LfPrecision 0 31 ixDPM_TABLE_15 2 0x33314 1 0 4294967295 MemoryPIDController_LfOffset 0 31 ixDPM_TABLE_16 2 0x33318 1 0 4294967295 MemoryPIDController_MaxState 0 31 ixDPM_TABLE_17 2 0x3331c 1 0 4294967295 MemoryPIDController_MaxLfFraction 0 31 ixDPM_TABLE_18 2 0x33320 1 0 4294967295 MemoryPIDController_StateShift 0 31 ixDPM_TABLE_19 2 0x33324 1 0 4294967295 LinkPIDController_Ki 0 31 ixDPM_TABLE_20 2 0x33328 1 0 4294967295 LinkPIDController_LFWindupUpperLim 0 31 ixDPM_TABLE_21 2 0x3332c 1 0 4294967295 LinkPIDController_LFWindupLowerLim 0 31 ixDPM_TABLE_22 2 0x33330 1 0 4294967295 LinkPIDController_StatePrecision 0 31 ixDPM_TABLE_23 2 0x33334 1 0 4294967295 LinkPIDController_LfPrecision 0 31 ixDPM_TABLE_24 2 0x33338 1 0 4294967295 LinkPIDController_LfOffset 0 31 ixDPM_TABLE_25 2 0x3333c 1 0 4294967295 LinkPIDController_MaxState 0 31 ixDPM_TABLE_26 2 0x33340 1 0 4294967295 LinkPIDController_MaxLfFraction 0 31 ixDPM_TABLE_27 2 0x33344 1 0 4294967295 LinkPIDController_StateShift 0 31 ixDPM_TABLE_28 2 0x33348 1 0 4294967295 SystemFlags 0 31 ixDPM_TABLE_29 2 0x3334c 1 0 4294967295 SmioMaskVddcVid 0 31 ixDPM_TABLE_30 2 0x33350 1 0 4294967295 SmioMaskVddcPhase 0 31 ixDPM_TABLE_31 2 0x33354 1 0 4294967295 SmioMaskVddciVid 0 31 ixDPM_TABLE_32 2 0x33358 1 0 4294967295 SmioMaskMvddVid 0 31 ixDPM_TABLE_33 2 0x3335c 1 0 4294967295 VddcLevelCount 0 31 ixDPM_TABLE_34 2 0x33360 1 0 4294967295 VddciLevelCount 0 31 ixDPM_TABLE_35 2 0x33364 1 0 4294967295 MvddLevelCount 0 31 ixDPM_TABLE_36 2 0x33368 2 0 4294967295 VddcLevel_0_StdVoltageHiSidd 0 15 VddcLevel_0_Voltage 16 31 ixDPM_TABLE_37 2 0x3336c 3 0 4294967295 VddcLevel_0_padding 0 7 VddcLevel_0_Smio 8 15 VddcLevel_0_StdVoltageLoSidd 16 31 ixDPM_TABLE_38 2 0x33370 2 0 4294967295 VddcLevel_1_StdVoltageHiSidd 0 15 VddcLevel_1_Voltage 16 31 ixDPM_TABLE_39 2 0x33374 3 0 4294967295 VddcLevel_1_padding 0 7 VddcLevel_1_Smio 8 15 VddcLevel_1_StdVoltageLoSidd 16 31 ixDPM_TABLE_40 2 0x33378 2 0 4294967295 VddcLevel_2_StdVoltageHiSidd 0 15 VddcLevel_2_Voltage 16 31 ixDPM_TABLE_41 2 0x3337c 3 0 4294967295 VddcLevel_2_padding 0 7 VddcLevel_2_Smio 8 15 VddcLevel_2_StdVoltageLoSidd 16 31 ixDPM_TABLE_42 2 0x33380 2 0 4294967295 VddcLevel_3_StdVoltageHiSidd 0 15 VddcLevel_3_Voltage 16 31 ixDPM_TABLE_43 2 0x33384 3 0 4294967295 VddcLevel_3_padding 0 7 VddcLevel_3_Smio 8 15 VddcLevel_3_StdVoltageLoSidd 16 31 ixDPM_TABLE_44 2 0x33388 2 0 4294967295 VddcLevel_4_StdVoltageHiSidd 0 15 VddcLevel_4_Voltage 16 31 ixDPM_TABLE_45 2 0x3338c 3 0 4294967295 VddcLevel_4_padding 0 7 VddcLevel_4_Smio 8 15 VddcLevel_4_StdVoltageLoSidd 16 31 ixDPM_TABLE_46 2 0x33390 2 0 4294967295 VddcLevel_5_StdVoltageHiSidd 0 15 VddcLevel_5_Voltage 16 31 ixDPM_TABLE_47 2 0x33394 3 0 4294967295 VddcLevel_5_padding 0 7 VddcLevel_5_Smio 8 15 VddcLevel_5_StdVoltageLoSidd 16 31 ixDPM_TABLE_48 2 0x33398 2 0 4294967295 VddcLevel_6_StdVoltageHiSidd 0 15 VddcLevel_6_Voltage 16 31 ixDPM_TABLE_49 2 0x3339c 3 0 4294967295 VddcLevel_6_padding 0 7 VddcLevel_6_Smio 8 15 VddcLevel_6_StdVoltageLoSidd 16 31 ixDPM_TABLE_50 2 0x333a0 2 0 4294967295 VddcLevel_7_StdVoltageHiSidd 0 15 VddcLevel_7_Voltage 16 31 ixDPM_TABLE_51 2 0x333a4 3 0 4294967295 VddcLevel_7_padding 0 7 VddcLevel_7_Smio 8 15 VddcLevel_7_StdVoltageLoSidd 16 31 ixDPM_TABLE_52 2 0x333a8 2 0 4294967295 VddciLevel_0_StdVoltageHiSidd 0 15 VddciLevel_0_Voltage 16 31 ixDPM_TABLE_53 2 0x333ac 3 0 4294967295 VddciLevel_0_padding 0 7 VddciLevel_0_Smio 8 15 VddciLevel_0_StdVoltageLoSidd 16 31 ixDPM_TABLE_54 2 0x333b0 2 0 4294967295 VddciLevel_1_StdVoltageHiSidd 0 15 VddciLevel_1_Voltage 16 31 ixDPM_TABLE_55 2 0x333b4 3 0 4294967295 VddciLevel_1_padding 0 7 VddciLevel_1_Smio 8 15 VddciLevel_1_StdVoltageLoSidd 16 31 ixDPM_TABLE_56 2 0x333b8 2 0 4294967295 VddciLevel_2_StdVoltageHiSidd 0 15 VddciLevel_2_Voltage 16 31 ixDPM_TABLE_57 2 0x333bc 3 0 4294967295 VddciLevel_2_padding 0 7 VddciLevel_2_Smio 8 15 VddciLevel_2_StdVoltageLoSidd 16 31 ixDPM_TABLE_58 2 0x333c0 2 0 4294967295 VddciLevel_3_StdVoltageHiSidd 0 15 VddciLevel_3_Voltage 16 31 ixDPM_TABLE_59 2 0x333c4 3 0 4294967295 VddciLevel_3_padding 0 7 VddciLevel_3_Smio 8 15 VddciLevel_3_StdVoltageLoSidd 16 31 ixDPM_TABLE_60 2 0x333c8 2 0 4294967295 MvddLevel_0_StdVoltageHiSidd 0 15 MvddLevel_0_Voltage 16 31 ixDPM_TABLE_61 2 0x333cc 3 0 4294967295 MvddLevel_0_padding 0 7 MvddLevel_0_Smio 8 15 MvddLevel_0_StdVoltageLoSidd 16 31 ixDPM_TABLE_62 2 0x333d0 2 0 4294967295 MvddLevel_1_StdVoltageHiSidd 0 15 MvddLevel_1_Voltage 16 31 ixDPM_TABLE_63 2 0x333d4 3 0 4294967295 MvddLevel_1_padding 0 7 MvddLevel_1_Smio 8 15 MvddLevel_1_StdVoltageLoSidd 16 31 ixDPM_TABLE_64 2 0x333d8 2 0 4294967295 MvddLevel_2_StdVoltageHiSidd 0 15 MvddLevel_2_Voltage 16 31 ixDPM_TABLE_65 2 0x333dc 3 0 4294967295 MvddLevel_2_padding 0 7 MvddLevel_2_Smio 8 15 MvddLevel_2_StdVoltageLoSidd 16 31 ixDPM_TABLE_66 2 0x333e0 2 0 4294967295 MvddLevel_3_StdVoltageHiSidd 0 15 MvddLevel_3_Voltage 16 31 ixDPM_TABLE_67 2 0x333e4 3 0 4294967295 MvddLevel_3_padding 0 7 MvddLevel_3_Smio 8 15 MvddLevel_3_StdVoltageLoSidd 16 31 ixDPM_TABLE_68 2 0x333e8 4 0 4294967295 MasterDeepSleepControl 0 7 LinkLevelCount 8 15 MemoryDpmLevelCount 16 23 GraphicsDpmLevelCount 24 31 ixDPM_TABLE_69 2 0x333ec 1 0 4294967295 Reserved_0 0 31 ixDPM_TABLE_70 2 0x333f0 1 0 4294967295 Reserved_1 0 31 ixDPM_TABLE_71 2 0x333f4 1 0 4294967295 Reserved_2 0 31 ixDPM_TABLE_72 2 0x333f8 1 0 4294967295 Reserved_3 0 31 ixDPM_TABLE_73 2 0x333fc 1 0 4294967295 Reserved_4 0 31 ixDPM_TABLE_74 2 0x33400 1 0 4294967295 GraphicsLevel_0_MinVddc 0 31 ixDPM_TABLE_75 2 0x33404 1 0 4294967295 GraphicsLevel_0_MinVddcPhases 0 31 ixDPM_TABLE_76 2 0x33408 1 0 4294967295 GraphicsLevel_0_SclkFrequency 0 31 ixDPM_TABLE_77 2 0x3340c 3 0 4294967295 GraphicsLevel_0_ActivityLevel 0 15 GraphicsLevel_0_DeepSleepDivId 16 23 GraphicsLevel_0_pcieDpmLevel 24 31 ixDPM_TABLE_78 2 0x33410 1 0 4294967295 GraphicsLevel_0_CgSpllFuncCntl3 0 31 ixDPM_TABLE_79 2 0x33414 1 0 4294967295 GraphicsLevel_0_CgSpllFuncCntl4 0 31 ixDPM_TABLE_80 2 0x33418 1 0 4294967295 GraphicsLevel_0_SpllSpreadSpectrum 0 31 ixDPM_TABLE_81 2 0x3341c 1 0 4294967295 GraphicsLevel_0_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_82 2 0x33420 1 0 4294967295 GraphicsLevel_0_CcPwrDynRm 0 31 ixDPM_TABLE_83 2 0x33424 1 0 4294967295 GraphicsLevel_0_CcPwrDynRm1 0 31 ixDPM_TABLE_84 2 0x33428 4 0 4294967295 GraphicsLevel_0_EnabledForThrottle 0 7 GraphicsLevel_0_EnabledForActivity 8 15 GraphicsLevel_0_DisplayWatermark 16 23 GraphicsLevel_0_SclkDid 24 31 ixDPM_TABLE_85 2 0x3342c 4 0 4294967295 GraphicsLevel_0_PowerThrottle 0 7 GraphicsLevel_0_VoltageDownHyst 8 15 GraphicsLevel_0_DownHyst 16 23 GraphicsLevel_0_UpHyst 24 31 ixDPM_TABLE_86 2 0x33430 1 0 4294967295 GraphicsLevel_1_MinVddc 0 31 ixDPM_TABLE_87 2 0x33434 1 0 4294967295 GraphicsLevel_1_MinVddcPhases 0 31 ixDPM_TABLE_88 2 0x33438 1 0 4294967295 GraphicsLevel_1_SclkFrequency 0 31 ixDPM_TABLE_89 2 0x3343c 3 0 4294967295 GraphicsLevel_1_ActivityLevel 0 15 GraphicsLevel_1_DeepSleepDivId 16 23 GraphicsLevel_1_pcieDpmLevel 24 31 ixDPM_TABLE_90 2 0x33440 1 0 4294967295 GraphicsLevel_1_CgSpllFuncCntl3 0 31 ixDPM_TABLE_91 2 0x33444 1 0 4294967295 GraphicsLevel_1_CgSpllFuncCntl4 0 31 ixDPM_TABLE_92 2 0x33448 1 0 4294967295 GraphicsLevel_1_SpllSpreadSpectrum 0 31 ixDPM_TABLE_93 2 0x3344c 1 0 4294967295 GraphicsLevel_1_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_94 2 0x33450 1 0 4294967295 GraphicsLevel_1_CcPwrDynRm 0 31 ixDPM_TABLE_95 2 0x33454 1 0 4294967295 GraphicsLevel_1_CcPwrDynRm1 0 31 ixDPM_TABLE_96 2 0x33458 4 0 4294967295 GraphicsLevel_1_EnabledForThrottle 0 7 GraphicsLevel_1_EnabledForActivity 8 15 GraphicsLevel_1_DisplayWatermark 16 23 GraphicsLevel_1_SclkDid 24 31 ixDPM_TABLE_97 2 0x3345c 4 0 4294967295 GraphicsLevel_1_PowerThrottle 0 7 GraphicsLevel_1_VoltageDownHyst 8 15 GraphicsLevel_1_DownHyst 16 23 GraphicsLevel_1_UpHyst 24 31 ixDPM_TABLE_98 2 0x33460 1 0 4294967295 GraphicsLevel_2_MinVddc 0 31 ixDPM_TABLE_99 2 0x33464 1 0 4294967295 GraphicsLevel_2_MinVddcPhases 0 31 ixDPM_TABLE_100 2 0x33468 1 0 4294967295 GraphicsLevel_2_SclkFrequency 0 31 ixDPM_TABLE_101 2 0x3346c 3 0 4294967295 GraphicsLevel_2_ActivityLevel 0 15 GraphicsLevel_2_DeepSleepDivId 16 23 GraphicsLevel_2_pcieDpmLevel 24 31 ixDPM_TABLE_102 2 0x33470 1 0 4294967295 GraphicsLevel_2_CgSpllFuncCntl3 0 31 ixDPM_TABLE_103 2 0x33474 1 0 4294967295 GraphicsLevel_2_CgSpllFuncCntl4 0 31 ixDPM_TABLE_104 2 0x33478 1 0 4294967295 GraphicsLevel_2_SpllSpreadSpectrum 0 31 ixDPM_TABLE_105 2 0x3347c 1 0 4294967295 GraphicsLevel_2_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_106 2 0x33480 1 0 4294967295 GraphicsLevel_2_CcPwrDynRm 0 31 ixDPM_TABLE_107 2 0x33484 1 0 4294967295 GraphicsLevel_2_CcPwrDynRm1 0 31 ixDPM_TABLE_108 2 0x33488 4 0 4294967295 GraphicsLevel_2_EnabledForThrottle 0 7 GraphicsLevel_2_EnabledForActivity 8 15 GraphicsLevel_2_DisplayWatermark 16 23 GraphicsLevel_2_SclkDid 24 31 ixDPM_TABLE_109 2 0x3348c 4 0 4294967295 GraphicsLevel_2_PowerThrottle 0 7 GraphicsLevel_2_VoltageDownHyst 8 15 GraphicsLevel_2_DownHyst 16 23 GraphicsLevel_2_UpHyst 24 31 ixDPM_TABLE_110 2 0x33490 1 0 4294967295 GraphicsLevel_3_MinVddc 0 31 ixDPM_TABLE_111 2 0x33494 1 0 4294967295 GraphicsLevel_3_MinVddcPhases 0 31 ixDPM_TABLE_112 2 0x33498 1 0 4294967295 GraphicsLevel_3_SclkFrequency 0 31 ixDPM_TABLE_113 2 0x3349c 3 0 4294967295 GraphicsLevel_3_ActivityLevel 0 15 GraphicsLevel_3_DeepSleepDivId 16 23 GraphicsLevel_3_pcieDpmLevel 24 31 ixDPM_TABLE_114 2 0x334a0 1 0 4294967295 GraphicsLevel_3_CgSpllFuncCntl3 0 31 ixDPM_TABLE_115 2 0x334a4 1 0 4294967295 GraphicsLevel_3_CgSpllFuncCntl4 0 31 ixDPM_TABLE_116 2 0x334a8 1 0 4294967295 GraphicsLevel_3_SpllSpreadSpectrum 0 31 ixDPM_TABLE_117 2 0x334ac 1 0 4294967295 GraphicsLevel_3_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_118 2 0x334b0 1 0 4294967295 GraphicsLevel_3_CcPwrDynRm 0 31 ixDPM_TABLE_119 2 0x334b4 1 0 4294967295 GraphicsLevel_3_CcPwrDynRm1 0 31 ixDPM_TABLE_120 2 0x334b8 4 0 4294967295 GraphicsLevel_3_EnabledForThrottle 0 7 GraphicsLevel_3_EnabledForActivity 8 15 GraphicsLevel_3_DisplayWatermark 16 23 GraphicsLevel_3_SclkDid 24 31 ixDPM_TABLE_121 2 0x334bc 4 0 4294967295 GraphicsLevel_3_PowerThrottle 0 7 GraphicsLevel_3_VoltageDownHyst 8 15 GraphicsLevel_3_DownHyst 16 23 GraphicsLevel_3_UpHyst 24 31 ixDPM_TABLE_122 2 0x334c0 1 0 4294967295 GraphicsLevel_4_MinVddc 0 31 ixDPM_TABLE_123 2 0x334c4 1 0 4294967295 GraphicsLevel_4_MinVddcPhases 0 31 ixDPM_TABLE_124 2 0x334c8 1 0 4294967295 GraphicsLevel_4_SclkFrequency 0 31 ixDPM_TABLE_125 2 0x334cc 3 0 4294967295 GraphicsLevel_4_ActivityLevel 0 15 GraphicsLevel_4_DeepSleepDivId 16 23 GraphicsLevel_4_pcieDpmLevel 24 31 ixDPM_TABLE_126 2 0x334d0 1 0 4294967295 GraphicsLevel_4_CgSpllFuncCntl3 0 31 ixDPM_TABLE_127 2 0x334d4 1 0 4294967295 GraphicsLevel_4_CgSpllFuncCntl4 0 31 ixDPM_TABLE_128 2 0x334d8 1 0 4294967295 GraphicsLevel_4_SpllSpreadSpectrum 0 31 ixDPM_TABLE_129 2 0x334dc 1 0 4294967295 GraphicsLevel_4_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_130 2 0x334e0 1 0 4294967295 GraphicsLevel_4_CcPwrDynRm 0 31 ixDPM_TABLE_131 2 0x334e4 1 0 4294967295 GraphicsLevel_4_CcPwrDynRm1 0 31 ixDPM_TABLE_132 2 0x334e8 4 0 4294967295 GraphicsLevel_4_EnabledForThrottle 0 7 GraphicsLevel_4_EnabledForActivity 8 15 GraphicsLevel_4_DisplayWatermark 16 23 GraphicsLevel_4_SclkDid 24 31 ixDPM_TABLE_133 2 0x334ec 4 0 4294967295 GraphicsLevel_4_PowerThrottle 0 7 GraphicsLevel_4_VoltageDownHyst 8 15 GraphicsLevel_4_DownHyst 16 23 GraphicsLevel_4_UpHyst 24 31 ixDPM_TABLE_134 2 0x334f0 1 0 4294967295 GraphicsLevel_5_MinVddc 0 31 ixDPM_TABLE_135 2 0x334f4 1 0 4294967295 GraphicsLevel_5_MinVddcPhases 0 31 ixDPM_TABLE_136 2 0x334f8 1 0 4294967295 GraphicsLevel_5_SclkFrequency 0 31 ixDPM_TABLE_137 2 0x334fc 3 0 4294967295 GraphicsLevel_5_ActivityLevel 0 15 GraphicsLevel_5_DeepSleepDivId 16 23 GraphicsLevel_5_pcieDpmLevel 24 31 ixDPM_TABLE_138 2 0x33500 1 0 4294967295 GraphicsLevel_5_CgSpllFuncCntl3 0 31 ixDPM_TABLE_139 2 0x33504 1 0 4294967295 GraphicsLevel_5_CgSpllFuncCntl4 0 31 ixDPM_TABLE_140 2 0x33508 1 0 4294967295 GraphicsLevel_5_SpllSpreadSpectrum 0 31 ixDPM_TABLE_141 2 0x3350c 1 0 4294967295 GraphicsLevel_5_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_142 2 0x33510 1 0 4294967295 GraphicsLevel_5_CcPwrDynRm 0 31 ixDPM_TABLE_143 2 0x33514 1 0 4294967295 GraphicsLevel_5_CcPwrDynRm1 0 31 ixDPM_TABLE_144 2 0x33518 4 0 4294967295 GraphicsLevel_5_EnabledForThrottle 0 7 GraphicsLevel_5_EnabledForActivity 8 15 GraphicsLevel_5_DisplayWatermark 16 23 GraphicsLevel_5_SclkDid 24 31 ixDPM_TABLE_145 2 0x3351c 4 0 4294967295 GraphicsLevel_5_PowerThrottle 0 7 GraphicsLevel_5_VoltageDownHyst 8 15 GraphicsLevel_5_DownHyst 16 23 GraphicsLevel_5_UpHyst 24 31 ixDPM_TABLE_146 2 0x33520 1 0 4294967295 GraphicsLevel_6_MinVddc 0 31 ixDPM_TABLE_147 2 0x33524 1 0 4294967295 GraphicsLevel_6_MinVddcPhases 0 31 ixDPM_TABLE_148 2 0x33528 1 0 4294967295 GraphicsLevel_6_SclkFrequency 0 31 ixDPM_TABLE_149 2 0x3352c 3 0 4294967295 GraphicsLevel_6_ActivityLevel 0 15 GraphicsLevel_6_DeepSleepDivId 16 23 GraphicsLevel_6_pcieDpmLevel 24 31 ixDPM_TABLE_150 2 0x33530 1 0 4294967295 GraphicsLevel_6_CgSpllFuncCntl3 0 31 ixDPM_TABLE_151 2 0x33534 1 0 4294967295 GraphicsLevel_6_CgSpllFuncCntl4 0 31 ixDPM_TABLE_152 2 0x33538 1 0 4294967295 GraphicsLevel_6_SpllSpreadSpectrum 0 31 ixDPM_TABLE_153 2 0x3353c 1 0 4294967295 GraphicsLevel_6_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_154 2 0x33540 1 0 4294967295 GraphicsLevel_6_CcPwrDynRm 0 31 ixDPM_TABLE_155 2 0x33544 1 0 4294967295 GraphicsLevel_6_CcPwrDynRm1 0 31 ixDPM_TABLE_156 2 0x33548 4 0 4294967295 GraphicsLevel_6_EnabledForThrottle 0 7 GraphicsLevel_6_EnabledForActivity 8 15 GraphicsLevel_6_DisplayWatermark 16 23 GraphicsLevel_6_SclkDid 24 31 ixDPM_TABLE_157 2 0x3354c 4 0 4294967295 GraphicsLevel_6_PowerThrottle 0 7 GraphicsLevel_6_VoltageDownHyst 8 15 GraphicsLevel_6_DownHyst 16 23 GraphicsLevel_6_UpHyst 24 31 ixDPM_TABLE_158 2 0x33550 1 0 4294967295 GraphicsLevel_7_MinVddc 0 31 ixDPM_TABLE_159 2 0x33554 1 0 4294967295 GraphicsLevel_7_MinVddcPhases 0 31 ixDPM_TABLE_160 2 0x33558 1 0 4294967295 GraphicsLevel_7_SclkFrequency 0 31 ixDPM_TABLE_161 2 0x3355c 3 0 4294967295 GraphicsLevel_7_ActivityLevel 0 15 GraphicsLevel_7_DeepSleepDivId 16 23 GraphicsLevel_7_pcieDpmLevel 24 31 ixDPM_TABLE_162 2 0x33560 1 0 4294967295 GraphicsLevel_7_CgSpllFuncCntl3 0 31 ixDPM_TABLE_163 2 0x33564 1 0 4294967295 GraphicsLevel_7_CgSpllFuncCntl4 0 31 ixDPM_TABLE_164 2 0x33568 1 0 4294967295 GraphicsLevel_7_SpllSpreadSpectrum 0 31 ixDPM_TABLE_165 2 0x3356c 1 0 4294967295 GraphicsLevel_7_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_166 2 0x33570 1 0 4294967295 GraphicsLevel_7_CcPwrDynRm 0 31 ixDPM_TABLE_167 2 0x33574 1 0 4294967295 GraphicsLevel_7_CcPwrDynRm1 0 31 ixDPM_TABLE_168 2 0x33578 4 0 4294967295 GraphicsLevel_7_EnabledForThrottle 0 7 GraphicsLevel_7_EnabledForActivity 8 15 GraphicsLevel_7_DisplayWatermark 16 23 GraphicsLevel_7_SclkDid 24 31 ixDPM_TABLE_169 2 0x3357c 4 0 4294967295 GraphicsLevel_7_PowerThrottle 0 7 GraphicsLevel_7_VoltageDownHyst 8 15 GraphicsLevel_7_DownHyst 16 23 GraphicsLevel_7_UpHyst 24 31 ixDPM_TABLE_170 2 0x33580 1 0 4294967295 MemoryACPILevel_MinVddc 0 31 ixDPM_TABLE_171 2 0x33584 1 0 4294967295 MemoryACPILevel_MinVddcPhases 0 31 ixDPM_TABLE_172 2 0x33588 1 0 4294967295 MemoryACPILevel_MinVddci 0 31 ixDPM_TABLE_173 2 0x3358c 1 0 4294967295 MemoryACPILevel_MinMvdd 0 31 ixDPM_TABLE_174 2 0x33590 1 0 4294967295 MemoryACPILevel_MclkFrequency 0 31 ixDPM_TABLE_175 2 0x33594 4 0 4294967295 MemoryACPILevel_StutterEnable 0 7 MemoryACPILevel_RttEnable 8 15 MemoryACPILevel_EdcWriteEnable 16 23 MemoryACPILevel_EdcReadEnable 24 31 ixDPM_TABLE_176 2 0x33598 4 0 4294967295 MemoryACPILevel_EnabledForActivity 0 7 MemoryACPILevel_EnabledForThrottle 8 15 MemoryACPILevel_StrobeRatio 16 23 MemoryACPILevel_StrobeEnable 24 31 ixDPM_TABLE_177 2 0x3359c 4 0 4294967295 MemoryACPILevel_padding 0 7 MemoryACPILevel_VoltageDownHyst 8 15 MemoryACPILevel_DownHyst 16 23 MemoryACPILevel_UpHyst 24 31 ixDPM_TABLE_178 2 0x335a0 3 0 4294967295 MemoryACPILevel_padding1 0 7 MemoryACPILevel_DisplayWatermark 8 15 MemoryACPILevel_ActivityLevel 16 31 ixDPM_TABLE_179 2 0x335a4 1 0 4294967295 MemoryACPILevel_MpllFuncCntl 0 31 ixDPM_TABLE_180 2 0x335a8 1 0 4294967295 MemoryACPILevel_MpllFuncCntl_1 0 31 ixDPM_TABLE_181 2 0x335ac 1 0 4294967295 MemoryACPILevel_MpllFuncCntl_2 0 31 ixDPM_TABLE_182 2 0x335b0 1 0 4294967295 MemoryACPILevel_MpllAdFuncCntl 0 31 ixDPM_TABLE_183 2 0x335b4 1 0 4294967295 MemoryACPILevel_MpllDqFuncCntl 0 31 ixDPM_TABLE_184 2 0x335b8 1 0 4294967295 MemoryACPILevel_MclkPwrmgtCntl 0 31 ixDPM_TABLE_185 2 0x335bc 1 0 4294967295 MemoryACPILevel_DllCntl 0 31 ixDPM_TABLE_186 2 0x335c0 1 0 4294967295 MemoryACPILevel_MpllSs1 0 31 ixDPM_TABLE_187 2 0x335c4 1 0 4294967295 MemoryACPILevel_MpllSs2 0 31 ixDPM_TABLE_188 2 0x335c8 1 0 4294967295 MemoryLevel_0_MinVddc 0 31 ixDPM_TABLE_189 2 0x335cc 1 0 4294967295 MemoryLevel_0_MinVddcPhases 0 31 ixDPM_TABLE_190 2 0x335d0 1 0 4294967295 MemoryLevel_0_MinVddci 0 31 ixDPM_TABLE_191 2 0x335d4 1 0 4294967295 MemoryLevel_0_MinMvdd 0 31 ixDPM_TABLE_192 2 0x335d8 1 0 4294967295 MemoryLevel_0_MclkFrequency 0 31 ixDPM_TABLE_193 2 0x335dc 4 0 4294967295 MemoryLevel_0_StutterEnable 0 7 MemoryLevel_0_RttEnable 8 15 MemoryLevel_0_EdcWriteEnable 16 23 MemoryLevel_0_EdcReadEnable 24 31 ixDPM_TABLE_194 2 0x335e0 4 0 4294967295 MemoryLevel_0_EnabledForActivity 0 7 MemoryLevel_0_EnabledForThrottle 8 15 MemoryLevel_0_StrobeRatio 16 23 MemoryLevel_0_StrobeEnable 24 31 ixDPM_TABLE_195 2 0x335e4 4 0 4294967295 MemoryLevel_0_padding 0 7 MemoryLevel_0_VoltageDownHyst 8 15 MemoryLevel_0_DownHyst 16 23 MemoryLevel_0_UpHyst 24 31 ixDPM_TABLE_196 2 0x335e8 3 0 4294967295 MemoryLevel_0_padding1 0 7 MemoryLevel_0_DisplayWatermark 8 15 MemoryLevel_0_ActivityLevel 16 31 ixDPM_TABLE_197 2 0x335ec 1 0 4294967295 MemoryLevel_0_MpllFuncCntl 0 31 ixDPM_TABLE_198 2 0x335f0 1 0 4294967295 MemoryLevel_0_MpllFuncCntl_1 0 31 ixDPM_TABLE_199 2 0x335f4 1 0 4294967295 MemoryLevel_0_MpllFuncCntl_2 0 31 ixDPM_TABLE_200 2 0x335f8 1 0 4294967295 MemoryLevel_0_MpllAdFuncCntl 0 31 ixDPM_TABLE_201 2 0x335fc 1 0 4294967295 MemoryLevel_0_MpllDqFuncCntl 0 31 ixDPM_TABLE_202 2 0x33600 1 0 4294967295 MemoryLevel_0_MclkPwrmgtCntl 0 31 ixDPM_TABLE_203 2 0x33604 1 0 4294967295 MemoryLevel_0_DllCntl 0 31 ixDPM_TABLE_204 2 0x33608 1 0 4294967295 MemoryLevel_0_MpllSs1 0 31 ixDPM_TABLE_205 2 0x3360c 1 0 4294967295 MemoryLevel_0_MpllSs2 0 31 ixDPM_TABLE_206 2 0x33610 1 0 4294967295 MemoryLevel_1_MinVddc 0 31 ixDPM_TABLE_207 2 0x33614 1 0 4294967295 MemoryLevel_1_MinVddcPhases 0 31 ixDPM_TABLE_208 2 0x33618 1 0 4294967295 MemoryLevel_1_MinVddci 0 31 ixDPM_TABLE_209 2 0x3361c 1 0 4294967295 MemoryLevel_1_MinMvdd 0 31 ixDPM_TABLE_210 2 0x33620 1 0 4294967295 MemoryLevel_1_MclkFrequency 0 31 ixDPM_TABLE_211 2 0x33624 4 0 4294967295 MemoryLevel_1_StutterEnable 0 7 MemoryLevel_1_RttEnable 8 15 MemoryLevel_1_EdcWriteEnable 16 23 MemoryLevel_1_EdcReadEnable 24 31 ixDPM_TABLE_212 2 0x33628 4 0 4294967295 MemoryLevel_1_EnabledForActivity 0 7 MemoryLevel_1_EnabledForThrottle 8 15 MemoryLevel_1_StrobeRatio 16 23 MemoryLevel_1_StrobeEnable 24 31 ixDPM_TABLE_213 2 0x3362c 4 0 4294967295 MemoryLevel_1_padding 0 7 MemoryLevel_1_VoltageDownHyst 8 15 MemoryLevel_1_DownHyst 16 23 MemoryLevel_1_UpHyst 24 31 ixDPM_TABLE_214 2 0x33630 3 0 4294967295 MemoryLevel_1_padding1 0 7 MemoryLevel_1_DisplayWatermark 8 15 MemoryLevel_1_ActivityLevel 16 31 ixDPM_TABLE_215 2 0x33634 1 0 4294967295 MemoryLevel_1_MpllFuncCntl 0 31 ixDPM_TABLE_216 2 0x33638 1 0 4294967295 MemoryLevel_1_MpllFuncCntl_1 0 31 ixDPM_TABLE_217 2 0x3363c 1 0 4294967295 MemoryLevel_1_MpllFuncCntl_2 0 31 ixDPM_TABLE_218 2 0x33640 1 0 4294967295 MemoryLevel_1_MpllAdFuncCntl 0 31 ixDPM_TABLE_219 2 0x33644 1 0 4294967295 MemoryLevel_1_MpllDqFuncCntl 0 31 ixDPM_TABLE_220 2 0x33648 1 0 4294967295 MemoryLevel_1_MclkPwrmgtCntl 0 31 ixDPM_TABLE_221 2 0x3364c 1 0 4294967295 MemoryLevel_1_DllCntl 0 31 ixDPM_TABLE_222 2 0x33650 1 0 4294967295 MemoryLevel_1_MpllSs1 0 31 ixDPM_TABLE_223 2 0x33654 1 0 4294967295 MemoryLevel_1_MpllSs2 0 31 ixDPM_TABLE_224 2 0x33658 1 0 4294967295 MemoryLevel_2_MinVddc 0 31 ixDPM_TABLE_225 2 0x3365c 1 0 4294967295 MemoryLevel_2_MinVddcPhases 0 31 ixDPM_TABLE_226 2 0x33660 1 0 4294967295 MemoryLevel_2_MinVddci 0 31 ixDPM_TABLE_227 2 0x33664 1 0 4294967295 MemoryLevel_2_MinMvdd 0 31 ixDPM_TABLE_228 2 0x33668 1 0 4294967295 MemoryLevel_2_MclkFrequency 0 31 ixDPM_TABLE_229 2 0x3366c 4 0 4294967295 MemoryLevel_2_StutterEnable 0 7 MemoryLevel_2_RttEnable 8 15 MemoryLevel_2_EdcWriteEnable 16 23 MemoryLevel_2_EdcReadEnable 24 31 ixDPM_TABLE_230 2 0x33670 4 0 4294967295 MemoryLevel_2_EnabledForActivity 0 7 MemoryLevel_2_EnabledForThrottle 8 15 MemoryLevel_2_StrobeRatio 16 23 MemoryLevel_2_StrobeEnable 24 31 ixDPM_TABLE_231 2 0x33674 4 0 4294967295 MemoryLevel_2_padding 0 7 MemoryLevel_2_VoltageDownHyst 8 15 MemoryLevel_2_DownHyst 16 23 MemoryLevel_2_UpHyst 24 31 ixDPM_TABLE_232 2 0x33678 3 0 4294967295 MemoryLevel_2_padding1 0 7 MemoryLevel_2_DisplayWatermark 8 15 MemoryLevel_2_ActivityLevel 16 31 ixDPM_TABLE_233 2 0x3367c 1 0 4294967295 MemoryLevel_2_MpllFuncCntl 0 31 ixDPM_TABLE_234 2 0x33680 1 0 4294967295 MemoryLevel_2_MpllFuncCntl_1 0 31 ixDPM_TABLE_235 2 0x33684 1 0 4294967295 MemoryLevel_2_MpllFuncCntl_2 0 31 ixDPM_TABLE_236 2 0x33688 1 0 4294967295 MemoryLevel_2_MpllAdFuncCntl 0 31 ixDPM_TABLE_237 2 0x3368c 1 0 4294967295 MemoryLevel_2_MpllDqFuncCntl 0 31 ixDPM_TABLE_238 2 0x33690 1 0 4294967295 MemoryLevel_2_MclkPwrmgtCntl 0 31 ixDPM_TABLE_239 2 0x33694 1 0 4294967295 MemoryLevel_2_DllCntl 0 31 ixDPM_TABLE_240 2 0x33698 1 0 4294967295 MemoryLevel_2_MpllSs1 0 31 ixDPM_TABLE_241 2 0x3369c 1 0 4294967295 MemoryLevel_2_MpllSs2 0 31 ixDPM_TABLE_242 2 0x336a0 1 0 4294967295 MemoryLevel_3_MinVddc 0 31 ixDPM_TABLE_243 2 0x336a4 1 0 4294967295 MemoryLevel_3_MinVddcPhases 0 31 ixDPM_TABLE_244 2 0x336a8 1 0 4294967295 MemoryLevel_3_MinVddci 0 31 ixDPM_TABLE_245 2 0x336ac 1 0 4294967295 MemoryLevel_3_MinMvdd 0 31 ixDPM_TABLE_246 2 0x336b0 1 0 4294967295 MemoryLevel_3_MclkFrequency 0 31 ixDPM_TABLE_247 2 0x336b4 4 0 4294967295 MemoryLevel_3_StutterEnable 0 7 MemoryLevel_3_RttEnable 8 15 MemoryLevel_3_EdcWriteEnable 16 23 MemoryLevel_3_EdcReadEnable 24 31 ixDPM_TABLE_248 2 0x336b8 4 0 4294967295 MemoryLevel_3_EnabledForActivity 0 7 MemoryLevel_3_EnabledForThrottle 8 15 MemoryLevel_3_StrobeRatio 16 23 MemoryLevel_3_StrobeEnable 24 31 ixDPM_TABLE_249 2 0x336bc 4 0 4294967295 MemoryLevel_3_padding 0 7 MemoryLevel_3_VoltageDownHyst 8 15 MemoryLevel_3_DownHyst 16 23 MemoryLevel_3_UpHyst 24 31 ixDPM_TABLE_250 2 0x336c0 3 0 4294967295 MemoryLevel_3_padding1 0 7 MemoryLevel_3_DisplayWatermark 8 15 MemoryLevel_3_ActivityLevel 16 31 ixDPM_TABLE_251 2 0x336c4 1 0 4294967295 MemoryLevel_3_MpllFuncCntl 0 31 ixDPM_TABLE_252 2 0x336c8 1 0 4294967295 MemoryLevel_3_MpllFuncCntl_1 0 31 ixDPM_TABLE_253 2 0x336cc 1 0 4294967295 MemoryLevel_3_MpllFuncCntl_2 0 31 ixDPM_TABLE_254 2 0x336d0 1 0 4294967295 MemoryLevel_3_MpllAdFuncCntl 0 31 ixDPM_TABLE_255 2 0x336d4 1 0 4294967295 MemoryLevel_3_MpllDqFuncCntl 0 31 ixDPM_TABLE_256 2 0x336d8 1 0 4294967295 MemoryLevel_3_MclkPwrmgtCntl 0 31 ixDPM_TABLE_257 2 0x336dc 1 0 4294967295 MemoryLevel_3_DllCntl 0 31 ixDPM_TABLE_258 2 0x336e0 1 0 4294967295 MemoryLevel_3_MpllSs1 0 31 ixDPM_TABLE_259 2 0x336e4 1 0 4294967295 MemoryLevel_3_MpllSs2 0 31 ixDPM_TABLE_260 2 0x336e8 4 0 4294967295 LinkLevel_0_SPC 0 7 LinkLevel_0_EnabledForActivity 8 15 LinkLevel_0_PcieLaneCount 16 23 LinkLevel_0_PcieGenSpeed 24 31 ixDPM_TABLE_261 2 0x336ec 1 0 4294967295 LinkLevel_0_DownThreshold 0 31 ixDPM_TABLE_262 2 0x336f0 1 0 4294967295 LinkLevel_0_UpThreshold 0 31 ixDPM_TABLE_263 2 0x336f4 1 0 4294967295 LinkLevel_0_Reserved 0 31 ixDPM_TABLE_264 2 0x336f8 4 0 4294967295 LinkLevel_1_SPC 0 7 LinkLevel_1_EnabledForActivity 8 15 LinkLevel_1_PcieLaneCount 16 23 LinkLevel_1_PcieGenSpeed 24 31 ixDPM_TABLE_265 2 0x336fc 1 0 4294967295 LinkLevel_1_DownThreshold 0 31 ixDPM_TABLE_266 2 0x33700 1 0 4294967295 LinkLevel_1_UpThreshold 0 31 ixDPM_TABLE_267 2 0x33704 1 0 4294967295 LinkLevel_1_Reserved 0 31 ixDPM_TABLE_268 2 0x33708 4 0 4294967295 LinkLevel_2_SPC 0 7 LinkLevel_2_EnabledForActivity 8 15 LinkLevel_2_PcieLaneCount 16 23 LinkLevel_2_PcieGenSpeed 24 31 ixDPM_TABLE_269 2 0x3370c 1 0 4294967295 LinkLevel_2_DownThreshold 0 31 ixDPM_TABLE_270 2 0x33710 1 0 4294967295 LinkLevel_2_UpThreshold 0 31 ixDPM_TABLE_271 2 0x33714 1 0 4294967295 LinkLevel_2_Reserved 0 31 ixDPM_TABLE_272 2 0x33718 4 0 4294967295 LinkLevel_3_SPC 0 7 LinkLevel_3_EnabledForActivity 8 15 LinkLevel_3_PcieLaneCount 16 23 LinkLevel_3_PcieGenSpeed 24 31 ixDPM_TABLE_273 2 0x3371c 1 0 4294967295 LinkLevel_3_DownThreshold 0 31 ixDPM_TABLE_274 2 0x33720 1 0 4294967295 LinkLevel_3_UpThreshold 0 31 ixDPM_TABLE_275 2 0x33724 1 0 4294967295 LinkLevel_3_Reserved 0 31 ixDPM_TABLE_276 2 0x33728 4 0 4294967295 LinkLevel_4_SPC 0 7 LinkLevel_4_EnabledForActivity 8 15 LinkLevel_4_PcieLaneCount 16 23 LinkLevel_4_PcieGenSpeed 24 31 ixDPM_TABLE_277 2 0x3372c 1 0 4294967295 LinkLevel_4_DownThreshold 0 31 ixDPM_TABLE_278 2 0x33730 1 0 4294967295 LinkLevel_4_UpThreshold 0 31 ixDPM_TABLE_279 2 0x33734 1 0 4294967295 LinkLevel_4_Reserved 0 31 ixDPM_TABLE_280 2 0x33738 4 0 4294967295 LinkLevel_5_SPC 0 7 LinkLevel_5_EnabledForActivity 8 15 LinkLevel_5_PcieLaneCount 16 23 LinkLevel_5_PcieGenSpeed 24 31 ixDPM_TABLE_281 2 0x3373c 1 0 4294967295 LinkLevel_5_DownThreshold 0 31 ixDPM_TABLE_282 2 0x33740 1 0 4294967295 LinkLevel_5_UpThreshold 0 31 ixDPM_TABLE_283 2 0x33744 1 0 4294967295 LinkLevel_5_Reserved 0 31 ixDPM_TABLE_284 2 0x33748 4 0 4294967295 LinkLevel_6_SPC 0 7 LinkLevel_6_EnabledForActivity 8 15 LinkLevel_6_PcieLaneCount 16 23 LinkLevel_6_PcieGenSpeed 24 31 ixDPM_TABLE_285 2 0x3374c 1 0 4294967295 LinkLevel_6_DownThreshold 0 31 ixDPM_TABLE_286 2 0x33750 1 0 4294967295 LinkLevel_6_UpThreshold 0 31 ixDPM_TABLE_287 2 0x33754 1 0 4294967295 LinkLevel_6_Reserved 0 31 ixDPM_TABLE_288 2 0x33758 4 0 4294967295 LinkLevel_7_SPC 0 7 LinkLevel_7_EnabledForActivity 8 15 LinkLevel_7_PcieLaneCount 16 23 LinkLevel_7_PcieGenSpeed 24 31 ixDPM_TABLE_289 2 0x3375c 1 0 4294967295 LinkLevel_7_DownThreshold 0 31 ixDPM_TABLE_290 2 0x33760 1 0 4294967295 LinkLevel_7_UpThreshold 0 31 ixDPM_TABLE_291 2 0x33764 1 0 4294967295 LinkLevel_7_Reserved 0 31 ixDPM_TABLE_292 2 0x33768 1 0 4294967295 ACPILevel_Flags 0 31 ixDPM_TABLE_293 2 0x3376c 1 0 4294967295 ACPILevel_MinVddc 0 31 ixDPM_TABLE_294 2 0x33770 1 0 4294967295 ACPILevel_MinVddcPhases 0 31 ixDPM_TABLE_295 2 0x33774 1 0 4294967295 ACPILevel_SclkFrequency 0 31 ixDPM_TABLE_296 2 0x33778 4 0 4294967295 ACPILevel_padding 0 7 ACPILevel_DeepSleepDivId 8 15 ACPILevel_DisplayWatermark 16 23 ACPILevel_SclkDid 24 31 ixDPM_TABLE_297 2 0x3377c 1 0 4294967295 ACPILevel_CgSpllFuncCntl 0 31 ixDPM_TABLE_298 2 0x33780 1 0 4294967295 ACPILevel_CgSpllFuncCntl2 0 31 ixDPM_TABLE_299 2 0x33784 1 0 4294967295 ACPILevel_CgSpllFuncCntl3 0 31 ixDPM_TABLE_300 2 0x33788 1 0 4294967295 ACPILevel_CgSpllFuncCntl4 0 31 ixDPM_TABLE_301 2 0x3378c 1 0 4294967295 ACPILevel_SpllSpreadSpectrum 0 31 ixDPM_TABLE_302 2 0x33790 1 0 4294967295 ACPILevel_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_303 2 0x33794 1 0 4294967295 ACPILevel_CcPwrDynRm 0 31 ixDPM_TABLE_304 2 0x33798 1 0 4294967295 ACPILevel_CcPwrDynRm1 0 31 ixDPM_TABLE_305 2 0x3379c 1 0 4294967295 SclkStepSize 0 31 ixDPM_TABLE_306 2 0x337a0 1 0 4294967295 Smio_0 0 31 ixDPM_TABLE_307 2 0x337a4 1 0 4294967295 Smio_1 0 31 ixDPM_TABLE_308 2 0x337a8 1 0 4294967295 Smio_2 0 31 ixDPM_TABLE_309 2 0x337ac 1 0 4294967295 Smio_3 0 31 ixDPM_TABLE_310 2 0x337b0 1 0 4294967295 Smio_4 0 31 ixDPM_TABLE_311 2 0x337b4 1 0 4294967295 Smio_5 0 31 ixDPM_TABLE_312 2 0x337b8 1 0 4294967295 Smio_6 0 31 ixDPM_TABLE_313 2 0x337bc 1 0 4294967295 Smio_7 0 31 ixDPM_TABLE_314 2 0x337c0 1 0 4294967295 Smio_8 0 31 ixDPM_TABLE_315 2 0x337c4 1 0 4294967295 Smio_9 0 31 ixDPM_TABLE_316 2 0x337c8 1 0 4294967295 Smio_10 0 31 ixDPM_TABLE_317 2 0x337cc 1 0 4294967295 Smio_11 0 31 ixDPM_TABLE_318 2 0x337d0 1 0 4294967295 Smio_12 0 31 ixDPM_TABLE_319 2 0x337d4 1 0 4294967295 Smio_13 0 31 ixDPM_TABLE_320 2 0x337d8 1 0 4294967295 Smio_14 0 31 ixDPM_TABLE_321 2 0x337dc 1 0 4294967295 Smio_15 0 31 ixDPM_TABLE_322 2 0x337e0 1 0 4294967295 Smio_16 0 31 ixDPM_TABLE_323 2 0x337e4 1 0 4294967295 Smio_17 0 31 ixDPM_TABLE_324 2 0x337e8 1 0 4294967295 Smio_18 0 31 ixDPM_TABLE_325 2 0x337ec 1 0 4294967295 Smio_19 0 31 ixDPM_TABLE_326 2 0x337f0 1 0 4294967295 Smio_20 0 31 ixDPM_TABLE_327 2 0x337f4 1 0 4294967295 Smio_21 0 31 ixDPM_TABLE_328 2 0x337f8 1 0 4294967295 Smio_22 0 31 ixDPM_TABLE_329 2 0x337fc 1 0 4294967295 Smio_23 0 31 ixDPM_TABLE_330 2 0x33800 1 0 4294967295 Smio_24 0 31 ixDPM_TABLE_331 2 0x33804 1 0 4294967295 Smio_25 0 31 ixDPM_TABLE_332 2 0x33808 1 0 4294967295 Smio_26 0 31 ixDPM_TABLE_333 2 0x3380c 1 0 4294967295 Smio_27 0 31 ixDPM_TABLE_334 2 0x33810 1 0 4294967295 Smio_28 0 31 ixDPM_TABLE_335 2 0x33814 1 0 4294967295 Smio_29 0 31 ixDPM_TABLE_336 2 0x33818 1 0 4294967295 Smio_30 0 31 ixDPM_TABLE_337 2 0x3381c 1 0 4294967295 Smio_31 0 31 ixDPM_TABLE_338 2 0x33820 4 0 4294967295 GraphicsInterval 0 7 GraphicsThermThrottleEnable 8 15 GraphicsVoltageChangeEnable 16 23 GraphicsBootLevel 24 31 ixDPM_TABLE_339 2 0x33824 3 0 4294967295 TemperatureLimitHigh 0 15 ThermalInterval 16 23 VoltageInterval 24 31 ixDPM_TABLE_340 2 0x33828 3 0 4294967295 MemoryVoltageChangeEnable 0 7 MemoryBootLevel 8 15 TemperatureLimitLow 16 31 ixDPM_TABLE_341 2 0x3382c 4 0 4294967295 padding2 0 7 MergedVddci 8 15 MemoryThermThrottleEnable 16 23 MemoryInterval 24 31 ixDPM_TABLE_342 2 0x33830 2 0 4294967295 PhaseResponseTime 0 15 VoltageResponseTime 16 31 ixDPM_TABLE_343 2 0x33834 4 0 4294967295 DTEMode 0 7 DTEInterval 8 15 PCIeGenInterval 16 23 PCIeBootLinkLevel 24 31 ixDPM_TABLE_344 2 0x33838 4 0 4294967295 ThermGpio 0 7 AcDcGpio 8 15 VRHotGpio 16 23 SVI2Enable 24 31 ixDPM_TABLE_345 2 0x3383c 1 0 4294967295 DisplayCac 0 31 ixDPM_TABLE_346 2 0x33840 2 0 4294967295 NomPwr 0 15 MaxPwr 16 31 ixDPM_TABLE_347 2 0x33844 2 0 4294967295 FpsLowThreshold 0 15 FpsHighThreshold 16 31 ixDPM_TABLE_348 2 0x33848 2 0 4294967295 BAPMTI_R_0_1_0 0 15 BAPMTI_R_0_0_0 16 31 ixDPM_TABLE_349 2 0x3384c 2 0 4294967295 BAPMTI_R_1_0_0 0 15 BAPMTI_R_0_2_0 16 31 ixDPM_TABLE_350 2 0x33850 2 0 4294967295 BAPMTI_R_1_2_0 0 15 BAPMTI_R_1_1_0 16 31 ixDPM_TABLE_351 2 0x33854 2 0 4294967295 BAPMTI_R_2_1_0 0 15 BAPMTI_R_2_0_0 16 31 ixDPM_TABLE_352 2 0x33858 2 0 4294967295 BAPMTI_R_3_0_0 0 15 BAPMTI_R_2_2_0 16 31 ixDPM_TABLE_353 2 0x3385c 2 0 4294967295 BAPMTI_R_3_2_0 0 15 BAPMTI_R_3_1_0 16 31 ixDPM_TABLE_354 2 0x33860 2 0 4294967295 BAPMTI_R_4_1_0 0 15 BAPMTI_R_4_0_0 16 31 ixDPM_TABLE_355 2 0x33864 2 0 4294967295 BAPMTI_RC_0_0_0 0 15 BAPMTI_R_4_2_0 16 31 ixDPM_TABLE_356 2 0x33868 2 0 4294967295 BAPMTI_RC_0_2_0 0 15 BAPMTI_RC_0_1_0 16 31 ixDPM_TABLE_357 2 0x3386c 2 0 4294967295 BAPMTI_RC_1_1_0 0 15 BAPMTI_RC_1_0_0 16 31 ixDPM_TABLE_358 2 0x33870 2 0 4294967295 BAPMTI_RC_2_0_0 0 15 BAPMTI_RC_1_2_0 16 31 ixDPM_TABLE_359 2 0x33874 2 0 4294967295 BAPMTI_RC_2_2_0 0 15 BAPMTI_RC_2_1_0 16 31 ixDPM_TABLE_360 2 0x33878 2 0 4294967295 BAPMTI_RC_3_1_0 0 15 BAPMTI_RC_3_0_0 16 31 ixDPM_TABLE_361 2 0x3387c 2 0 4294967295 BAPMTI_RC_4_0_0 0 15 BAPMTI_RC_3_2_0 16 31 ixDPM_TABLE_362 2 0x33880 2 0 4294967295 BAPMTI_RC_4_2_0 0 15 BAPMTI_RC_4_1_0 16 31 ixDPM_TABLE_363 2 0x33884 4 0 4294967295 GpuTjHyst 0 7 GpuTjMax 8 15 DTETjOffset 16 23 DTEAmbientTempBase 24 31 ixDPM_TABLE_364 2 0x33888 2 0 4294967295 BootVddci 0 15 BootVddc 16 31 ixDPM_TABLE_365 2 0x3388c 2 0 4294967295 padding 0 15 BootMVdd 16 31 ixDPM_TABLE_366 2 0x33890 1 0 4294967295 BAPM_TEMP_GRADIENT 0 31 ixDPM_TABLE_367 2 0x33894 1 0 4294967295 LowSclkInterruptThreshold 0 31 ixDPM_TABLE_368 2 0x33898 1 0 4294967295 VddGfxReChkWait 0 31 ixDPM_TABLE_369 2 0x3389c 2 0 4294967295 PPM_TemperatureLimit 0 15 PPM_PkgPwrLimit 16 31 ixDPM_TABLE_370 2 0x338a0 2 0 4294967295 TargetTdp 0 15 DefaultTdp 16 31 ixSOFT_REGISTERS_TABLE_1 2 0x338c8 1 0 4294967295 RefClockFrequency 0 31 ixSOFT_REGISTERS_TABLE_2 2 0x338cc 1 0 4294967295 PmTimerPeriod 0 31 ixSOFT_REGISTERS_TABLE_3 2 0x338d0 1 0 4294967295 FeatureEnables 0 31 ixSOFT_REGISTERS_TABLE_4 2 0x338d4 1 0 4294967295 PreVBlankGap 0 31 ixSOFT_REGISTERS_TABLE_5 2 0x338d8 1 0 4294967295 VBlankTimeout 0 31 ixSOFT_REGISTERS_TABLE_6 2 0x338dc 1 0 4294967295 TrainTimeGap 0 31 ixSOFT_REGISTERS_TABLE_7 2 0x338e0 1 0 4294967295 MvddSwitchTime 0 31 ixSOFT_REGISTERS_TABLE_8 2 0x338e4 1 0 4294967295 LongestAcpiTrainTime 0 31 ixSOFT_REGISTERS_TABLE_9 2 0x338e8 1 0 4294967295 AcpiDelay 0 31 ixSOFT_REGISTERS_TABLE_10 2 0x338ec 1 0 4294967295 G5TrainTime 0 31 ixSOFT_REGISTERS_TABLE_11 2 0x338f0 1 0 4294967295 DelayMpllPwron 0 31 ixSOFT_REGISTERS_TABLE_12 2 0x338f4 1 0 4294967295 VoltageChangeTimeout 0 31 ixSOFT_REGISTERS_TABLE_13 2 0x338f8 1 0 4294967295 HandshakeDisables 0 31 ixSOFT_REGISTERS_TABLE_14 2 0x338fc 4 0 4294967295 DisplayPhy4Config 0 7 DisplayPhy3Config 8 15 DisplayPhy2Config 16 23 DisplayPhy1Config 24 31 ixSOFT_REGISTERS_TABLE_15 2 0x33900 4 0 4294967295 DisplayPhy8Config 0 7 DisplayPhy7Config 8 15 DisplayPhy6Config 16 23 DisplayPhy5Config 24 31 ixSOFT_REGISTERS_TABLE_16 2 0x33904 1 0 4294967295 AverageGraphicsActivity 0 31 ixSOFT_REGISTERS_TABLE_17 2 0x33908 1 0 4294967295 AverageMemoryActivity 0 31 ixSOFT_REGISTERS_TABLE_18 2 0x3390c 1 0 4294967295 AverageGioActivity 0 31 ixSOFT_REGISTERS_TABLE_19 2 0x33910 4 0 4294967295 PCIeDpmEnabledLevels 0 7 LClkDpmEnabledLevels 8 15 MClkDpmEnabledLevels 16 23 SClkDpmEnabledLevels 24 31 ixSOFT_REGISTERS_TABLE_20 2 0x33914 1 0 4294967295 DRAM_LOG_ADDR_H 0 31 ixSOFT_REGISTERS_TABLE_21 2 0x33918 1 0 4294967295 DRAM_LOG_ADDR_L 0 31 ixSOFT_REGISTERS_TABLE_22 2 0x3391c 1 0 4294967295 DRAM_LOG_PHY_ADDR_H 0 31 ixSOFT_REGISTERS_TABLE_23 2 0x33920 1 0 4294967295 DRAM_LOG_PHY_ADDR_L 0 31 ixSOFT_REGISTERS_TABLE_24 2 0x33924 1 0 4294967295 DRAM_LOG_BUFF_SIZE 0 31 ixSOFT_REGISTERS_TABLE_25 2 0x33928 1 0 4294967295 UlvEnterCount 0 31 ixSOFT_REGISTERS_TABLE_26 2 0x3392c 1 0 4294967295 UlvTime 0 31 ixSOFT_REGISTERS_TABLE_27 2 0x33930 1 0 4294967295 UcodeLoadStatus 0 31 ixSOFT_REGISTERS_TABLE_28 2 0x33934 1 0 4294967295 Reserved_0 0 31 ixSOFT_REGISTERS_TABLE_29 2 0x33938 1 0 4294967295 Reserved_1 0 31 ixFIRMWARE_FLAGS 2 0x33000 3 0 4294967295 INTERRUPTS_ENABLED 0 0 RESERVED 1 23 TEST_COUNT 24 31 ixTDC_STATUS 2 0x33004 4 0 4294967295 VDD_Boost 0 7 VDD_Throttle 8 15 VDDC_Boost 16 23 VDDC_Throttle 24 31 ixTDC_MV_AVERAGE 2 0x33008 2 0 4294967295 IDD 0 15 IDDC 16 31 ixTDC_VRM_LIMIT 2 0x3300c 2 0 4294967295 IDD 0 15 IDDC 16 31 ixFEATURE_STATUS 2 0x33010 23 0 4294967295 SCLK_DPM_ON 0 0 MCLK_DPM_ON 1 1 LCLK_DPM_ON 2 2 UVD_DPM_ON 3 3 VCE_DPM_ON 4 4 SAMU_DPM_ON 5 5 ACP_DPM_ON 6 6 PCIE_DPM_ON 7 7 BAPM_ON 8 8 LPMX_ON 9 9 NBDPM_ON 10 10 LHTC_ON 11 11 VPC_ON 12 12 VOLTAGE_CONTROLLER_ON 13 13 TDC_LIMIT_ON 14 14 GPU_CAC_ON 15 15 AVS_ON 16 16 SPMI_ON 17 17 SCLK_DPM_FORCED 18 18 MCLK_DPM_FORCED 19 19 LCLK_DPM_FORCED 20 20 PCIE_DPM_FORCED 21 21 RESERVED 22 31 ixENTITY_TEMPERATURES_1 2 0x33014 1 0 4294967295 GPU 0 31 ixPM_FUSES_1 2 0x3394c 4 0 4294967295 BapmVddCVidHiSidd_3 0 7 BapmVddCVidHiSidd_2 8 15 BapmVddCVidHiSidd_1 16 23 BapmVddCVidHiSidd_0 24 31 ixPM_FUSES_2 2 0x33950 4 0 4294967295 BapmVddCVidHiSidd_7 0 7 BapmVddCVidHiSidd_6 8 15 BapmVddCVidHiSidd_5 16 23 BapmVddCVidHiSidd_4 24 31 ixPM_FUSES_3 2 0x33954 4 0 4294967295 BapmVddCVidLoSidd_3 0 7 BapmVddCVidLoSidd_2 8 15 BapmVddCVidLoSidd_1 16 23 BapmVddCVidLoSidd_0 24 31 ixPM_FUSES_4 2 0x33958 4 0 4294967295 BapmVddCVidLoSidd_7 0 7 BapmVddCVidLoSidd_6 8 15 BapmVddCVidLoSidd_5 16 23 BapmVddCVidLoSidd_4 24 31 ixPM_FUSES_5 2 0x3395c 4 0 4294967295 VddCVid_3 0 7 VddCVid_2 8 15 VddCVid_1 16 23 VddCVid_0 24 31 ixPM_FUSES_6 2 0x33960 4 0 4294967295 VddCVid_7 0 7 VddCVid_6 8 15 VddCVid_5 16 23 VddCVid_4 24 31 ixPM_FUSES_7 2 0x33964 4 0 4294967295 SviLoadLineOffsetVddC 0 7 SviLoadLineTrimVddC 8 15 SviLoadLineVddC 16 23 SviLoadLineEn 24 31 ixPM_FUSES_8 2 0x33968 3 0 4294967295 TDC_MAWt 0 7 TDC_VDDC_ThrottleReleaseLimitPerc 8 15 TDC_VDDC_PkgLimit 16 31 ixPM_FUSES_9 2 0x3396c 4 0 4294967295 Reserved 0 7 LPMLTemperatureMax 8 15 LPMLTemperatureMin 16 23 TdcWaterfallCtl 24 31 ixPM_FUSES_10 2 0x33970 4 0 4294967295 LPMLTemperatureScaler_3 0 7 LPMLTemperatureScaler_2 8 15 LPMLTemperatureScaler_1 16 23 LPMLTemperatureScaler_0 24 31 ixPM_FUSES_11 2 0x33974 4 0 4294967295 LPMLTemperatureScaler_7 0 7 LPMLTemperatureScaler_6 8 15 LPMLTemperatureScaler_5 16 23 LPMLTemperatureScaler_4 24 31 ixPM_FUSES_12 2 0x33978 4 0 4294967295 LPMLTemperatureScaler_11 0 7 LPMLTemperatureScaler_10 8 15 LPMLTemperatureScaler_9 16 23 LPMLTemperatureScaler_8 24 31 ixPM_FUSES_13 2 0x3397c 4 0 4294967295 LPMLTemperatureScaler_15 0 7 LPMLTemperatureScaler_14 8 15 LPMLTemperatureScaler_13 16 23 LPMLTemperatureScaler_12 24 31 ixPM_FUSES_14 2 0x33980 2 0 4294967295 FuzzyFan_ErrorRateSetDelta 0 15 FuzzyFan_ErrorSetDelta 16 31 ixPM_FUSES_15 2 0x33984 2 0 4294967295 Reserved6 0 15 FuzzyFan_PwmSetDelta 16 31 ixPM_FUSES_16 2 0x33988 4 0 4294967295 GnbLPML_3 0 7 GnbLPML_2 8 15 GnbLPML_1 16 23 GnbLPML_0 24 31 ixPM_FUSES_17 2 0x3398c 4 0 4294967295 GnbLPML_7 0 7 GnbLPML_6 8 15 GnbLPML_5 16 23 GnbLPML_4 24 31 ixPM_FUSES_18 2 0x33990 4 0 4294967295 GnbLPML_11 0 7 GnbLPML_10 8 15 GnbLPML_9 16 23 GnbLPML_8 24 31 ixPM_FUSES_19 2 0x33994 4 0 4294967295 GnbLPML_15 0 7 GnbLPML_14 8 15 GnbLPML_13 16 23 GnbLPML_12 24 31 ixPM_FUSES_20 2 0x33998 4 0 4294967295 Reserved1_1 0 7 Reserved1_0 8 15 GnbLPMLMinVid 16 23 GnbLPMLMaxVid 24 31 ixPM_FUSES_21 2 0x3399c 2 0 4294967295 BapmVddCBaseLeakageLoSidd 0 15 BapmVddCBaseLeakageHiSidd 16 31 ixSMU_PM_STATUS_0 2 0x33e00 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_1 2 0x33e04 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_2 2 0x33e08 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_3 2 0x33e0c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_4 2 0x33e10 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_5 2 0x33e14 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_6 2 0x33e18 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_7 2 0x33e1c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_8 2 0x33e20 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_9 2 0x33e24 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_10 2 0x33e28 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_11 2 0x33e2c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_12 2 0x33e30 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_13 2 0x33e34 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_14 2 0x33e38 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_15 2 0x33e3c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_16 2 0x33e40 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_17 2 0x33e44 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_18 2 0x33e48 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_19 2 0x33e4c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_20 2 0x33e50 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_21 2 0x33e54 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_22 2 0x33e58 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_23 2 0x33e5c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_24 2 0x33e60 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_25 2 0x33e64 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_26 2 0x33e68 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_27 2 0x33e6c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_28 2 0x33e70 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_29 2 0x33e74 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_30 2 0x33e78 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_31 2 0x33e7c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_32 2 0x33e80 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_33 2 0x33e84 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_34 2 0x33e88 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_35 2 0x33e8c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_36 2 0x33e90 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_37 2 0x33e94 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_38 2 0x33e98 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_39 2 0x33e9c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_40 2 0x33ea0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_41 2 0x33ea4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_42 2 0x33ea8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_43 2 0x33eac 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_44 2 0x33eb0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_45 2 0x33eb4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_46 2 0x33eb8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_47 2 0x33ebc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_48 2 0x33ec0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_49 2 0x33ec4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_50 2 0x33ec8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_51 2 0x33ecc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_52 2 0x33ed0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_53 2 0x33ed4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_54 2 0x33ed8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_55 2 0x33edc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_56 2 0x33ee0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_57 2 0x33ee4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_58 2 0x33ee8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_59 2 0x33eec 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_60 2 0x33ef0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_61 2 0x33ef4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_62 2 0x33ef8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_63 2 0x33efc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_64 2 0x33f00 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_65 2 0x33f04 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_66 2 0x33f08 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_67 2 0x33f0c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_68 2 0x33f10 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_69 2 0x33f14 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_70 2 0x33f18 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_71 2 0x33f1c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_72 2 0x33f20 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_73 2 0x33f24 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_74 2 0x33f28 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_75 2 0x33f2c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_76 2 0x33f30 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_77 2 0x33f34 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_78 2 0x33f38 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_79 2 0x33f3c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_80 2 0x33f40 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_81 2 0x33f44 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_82 2 0x33f48 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_83 2 0x33f4c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_84 2 0x33f50 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_85 2 0x33f54 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_86 2 0x33f58 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_87 2 0x33f5c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_88 2 0x33f60 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_89 2 0x33f64 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_90 2 0x33f68 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_91 2 0x33f6c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_92 2 0x33f70 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_93 2 0x33f74 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_94 2 0x33f78 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_95 2 0x33f7c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_96 2 0x33f80 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_97 2 0x33f84 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_98 2 0x33f88 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_99 2 0x33f8c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_100 2 0x33f90 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_101 2 0x33f94 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_102 2 0x33f98 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_103 2 0x33f9c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_104 2 0x33fa0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_105 2 0x33fa4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_106 2 0x33fa8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_107 2 0x33fac 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_108 2 0x33fb0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_109 2 0x33fb4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_110 2 0x33fb8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_111 2 0x33fbc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_112 2 0x33fc0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_113 2 0x33fc4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_114 2 0x33fc8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_115 2 0x33fcc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_116 2 0x33fd0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_117 2 0x33fd4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_118 2 0x33fd8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_119 2 0x33fdc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_120 2 0x33fe0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_121 2 0x33fe4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_122 2 0x33fe8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_123 2 0x33fec 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_124 2 0x33ff0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_125 2 0x33ff4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_126 2 0x33ff8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_127 2 0x33ffc 1 0 4294967295 DATA 0 31 ixCG_THERMAL_INT_ENA 2 0xc2100024 6 0 4294967295 THERM_INTH_SET 0 0 THERM_INTL_SET 1 1 THERM_TRIGGER_SET 2 2 THERM_INTH_CLR 3 3 THERM_INTL_CLR 4 4 THERM_TRIGGER_CLR 5 5 ixCG_THERMAL_INT_CTRL 2 0xc2100028 8 0 4294967295 DIG_THERM_INTH 0 7 DIG_THERM_INTL 8 15 GNB_TEMP_THRESHOLD 16 23 THERM_INTH_MASK 24 24 THERM_INTL_MASK 25 25 THERM_TRIGGER_MASK 26 26 THERM_TRIGGER_CNB_MASK 27 27 THERM_GNB_HW_ENA 28 28 ixCG_THERMAL_INT_STATUS 2 0xc210002c 4 0 4294967295 THERM_INTH_DETECT 0 0 THERM_INTL_DETECT 1 1 THERM_TRIGGER_DETECT 2 2 THERM_TRIGGER_CNB_DETECT 3 3 ixCG_THERMAL_CTRL 2 0xc0300004 7 0 4294967295 DPM_EVENT_SRC 0 2 THERM_INC_CLK 3 3 SPARE 4 13 DIG_THERM_DPM 14 21 RESERVED 22 24 CTF_PAD_POLARITY 25 25 CTF_PAD_EN 26 26 ixCG_THERMAL_STATUS 2 0xc0300008 4 0 4294967295 SPARE 0 8 FDO_PWM_DUTY 9 16 THERM_ALERT 17 17 GEN_STATUS 18 21 ixCG_THERMAL_INT 2 0xc030000c 4 0 4294967295 DIG_THERM_CTF 0 7 DIG_THERM_INTH 8 15 DIG_THERM_INTL 16 23 THERM_INT_MASK 24 27 ixCG_MULT_THERMAL_CTRL 2 0xc0300010 5 0 4294967295 TS_FILTER 0 3 UNUSED 4 7 THERMAL_RANGE_RST 9 9 TEMP_SEL 20 27 THM_READY_CLEAR 28 28 ixCG_MULT_THERMAL_STATUS 2 0xc0300014 2 0 4294967295 ASIC_MAX_TEMP 0 8 CTF_TEMP 9 17 ixCG_FDO_CTRL0 2 0xc0300064 6 0 4294967295 FDO_STATIC_DUTY 0 7 FAN_SPINUP_DUTY 8 15 FDO_PWM_MANUAL 16 16 FDO_PWM_HYSTER 17 22 FDO_PWM_RAMP_EN 23 23 FDO_PWM_RAMP 24 31 ixCG_FDO_CTRL1 2 0xc0300068 5 0 4294967295 FMAX_DUTY100 0 7 FMIN_DUTY 8 15 M 16 23 RESERVED 24 29 FDO_PWRDNB 30 30 ixCG_FDO_CTRL2 2 0xc030006c 6 0 4294967295 TMIN 0 7 FAN_SPINUP_TIME 8 10 FDO_PWM_MODE 11 13 TMIN_HYSTER 14 16 TMAX 17 24 TACH_PWM_RESP_RATE 25 31 ixCG_TACH_CTRL 2 0xc0300070 2 0 4294967295 EDGE_PER_REV 0 2 TARGET_PERIOD 3 31 ixCG_TACH_STATUS 2 0xc0300074 1 0 4294967295 TACH_PERIOD 0 31 ixCC_THM_STRAPS0 2 0xc0300080 12 0 4294967295 TMON0_BGADJ 1 8 TMON1_BGADJ 9 16 TMON_CMON_FUSE_SEL 17 17 NUM_ACQ 18 20 TMON_CLK_SEL 21 23 TMON_CONFIG_SOURCE 24 24 CTF_DISABLE 25 25 TMON0_DISABLE 26 26 TMON1_DISABLE 27 27 TMON2_DISABLE 28 28 TMON3_DISABLE 29 29 UNUSED 31 31 ixTHM_TMON0_RDIL0_DATA 2 0xc0300100 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL1_DATA 2 0xc0300104 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL2_DATA 2 0xc0300108 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL3_DATA 2 0xc030010c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL4_DATA 2 0xc0300110 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL5_DATA 2 0xc0300114 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL6_DATA 2 0xc0300118 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL7_DATA 2 0xc030011c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL8_DATA 2 0xc0300120 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL9_DATA 2 0xc0300124 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL10_DATA 2 0xc0300128 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL11_DATA 2 0xc030012c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL12_DATA 2 0xc0300130 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL13_DATA 2 0xc0300134 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL14_DATA 2 0xc0300138 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL15_DATA 2 0xc030013c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR0_DATA 2 0xc0300140 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR1_DATA 2 0xc0300144 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR2_DATA 2 0xc0300148 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR3_DATA 2 0xc030014c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR4_DATA 2 0xc0300150 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR5_DATA 2 0xc0300154 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR6_DATA 2 0xc0300158 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR7_DATA 2 0xc030015c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR8_DATA 2 0xc0300160 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR9_DATA 2 0xc0300164 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR10_DATA 2 0xc0300168 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR11_DATA 2 0xc030016c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR12_DATA 2 0xc0300170 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR13_DATA 2 0xc0300174 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR14_DATA 2 0xc0300178 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR15_DATA 2 0xc030017c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_INT_DATA 2 0xc0300300 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_DEBUG 2 0xc0300310 2 0 4294967295 DEBUG_RDI 0 4 DEBUG_Z 5 15 ixTHM_TMON0_STATUS 2 0xc0300320 2 0 4294967295 CURRENT_RDI 0 4 MEAS_DONE 5 5 ixGENERAL_PWRMGT 2 0xc0200000 18 0 4294967295 GLOBAL_PWRMGT_EN 0 0 STATIC_PM_EN 1 1 THERMAL_PROTECTION_DIS 2 2 THERMAL_PROTECTION_TYPE 3 3 SW_SMIO_INDEX 6 6 LOW_VOLT_D2_ACPI 8 8 LOW_VOLT_D3_ACPI 9 9 VOLT_PWRMGT_EN 10 10 SPARE11 11 11 GPU_COUNTER_ACPI 14 14 GPU_COUNTER_CLK 15 15 GPU_COUNTER_OFF 16 16 GPU_COUNTER_INTF_OFF 17 17 SPARE18 18 18 ACPI_D3_VID 19 20 DYN_SPREAD_SPECTRUM_EN 23 23 SPARE27 27 27 SPARE 28 31 ixCNB_PWRMGT_CNTL 2 0xc0200004 5 0 4294967295 GNB_SLOW_MODE 0 1 GNB_SLOW 2 2 FORCE_NB_PS1 3 3 DPM_ENABLED 4 4 SPARE 5 31 ixSCLK_PWRMGT_CNTL 2 0xc0200008 7 0 4294967295 SCLK_PWRMGT_OFF 0 0 RESET_BUSY_CNT 4 4 RESET_SCLK_CNT 5 5 DYN_LIGHT_SLEEP_EN 14 14 AUTO_SCLK_PULSE_SKIP 15 15 LIGHT_SLEEP_COUNTER 16 20 DYNAMIC_PM_EN 21 21 ixTARGET_AND_CURRENT_PROFILE_INDEX 2 0xc0200014 8 0 4294967295 TARGET_STATE 0 3 CURRENT_STATE 4 7 CURR_MCLK_INDEX 8 11 TARG_MCLK_INDEX 12 15 CURR_SCLK_INDEX 16 20 TARG_SCLK_INDEX 21 25 CURR_LCLK_INDEX 26 28 TARG_LCLK_INDEX 29 31 ixPWR_PCC_CONTROL 2 0xc0200018 1 0 4294967295 PCC_POLARITY 0 0 ixPWR_PCC_GPIO_SELECT 2 0xc020001c 1 0 4294967295 GPIO 0 31 ixCG_FREQ_TRAN_VOTING_0 2 0xc02001a8 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_1 2 0xc02001ac 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_2 2 0xc02001b0 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_3 2 0xc02001b4 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_4 2 0xc02001b8 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_5 2 0xc02001bc 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_6 2 0xc02001c0 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_7 2 0xc02001c4 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixPLL_TEST_CNTL 2 0xc020003c 5 0 4294967295 TST_SRC_SEL 0 3 TST_REF_SEL 4 7 REF_TEST_COUNT 8 14 TST_RESET 15 15 TEST_COUNT 17 31 ixCG_STATIC_SCREEN_PARAMETER 2 0xc0200044 2 0 4294967295 STATIC_SCREEN_THRESHOLD 0 15 STATIC_SCREEN_THRESHOLD_UNIT 16 19 ixCG_DISPLAY_GAP_CNTL 2 0xc0200060 5 0 4294967295 DISP_GAP 0 1 VBI_TIMER_COUNT 4 17 VBI_TIMER_UNIT 20 22 DISP_GAP_MCHG 24 25 VBI_TIMER_DISABLE 28 28 ixCG_DISPLAY_GAP_CNTL2 2 0xc0200230 1 0 4294967295 VBI_PREDICTION 0 31 ixCG_ACPI_CNTL 2 0xc0200064 2 0 4294967295 SCLK_ACPI_DIV 0 6 SCLK_CHANGE_SKIP 7 7 ixSCLK_DEEP_SLEEP_CNTL 2 0xc0200080 19 0 4294967295 DIV_ID 0 2 RAMP_DIS 3 3 HYSTERESIS 4 15 SCLK_RUNNING_MASK 16 16 SELF_REFRESH_MASK 17 17 ALLOW_NBPSTATE_MASK 18 18 BIF_BUSY_MASK 19 19 UVD_BUSY_MASK 20 20 MC0SRBM_BUSY_MASK 21 21 MC1SRBM_BUSY_MASK 22 22 MC_ALLOW_MASK 23 23 SMU_BUSY_MASK 24 24 SELF_REFRESH_NLC_MASK 25 25 FAST_EXIT_REQ_NBPSTATE 26 26 DEEP_SLEEP_ENTRY_MODE 27 27 MBUS2_ACTIVE_MASK 28 28 VCE_BUSY_MASK 29 29 AZ_BUSY_MASK 30 30 ENABLE_DS 31 31 ixSCLK_DEEP_SLEEP_CNTL2 2 0xc0200084 16 0 4294967295 RLC_BUSY_MASK 0 0 HDP_BUSY_MASK 1 1 ROM_BUSY_MASK 2 2 IH_SEM_BUSY_MASK 3 3 PDMA_BUSY_MASK 4 4 IDCT_BUSY_MASK 6 6 SDMA_BUSY_MASK 7 7 DC_AZ_BUSY_MASK 8 8 ACP_SMU_ALLOW_DSLEEP_STUTTER_MASK 9 9 UVD_CG_MC_STAT_BUSY_MASK 10 10 VCE_CG_MC_STAT_BUSY_MASK 11 11 SAM_CG_MC_STAT_BUSY_MASK 12 12 SAM_CG_STATUS_BUSY_MASK 13 13 RLC_SMU_GFXCLK_OFF_MASK 14 14 SHALLOW_DIV_ID 21 23 INOUT_CUSHION 24 31 ixSCLK_DEEP_SLEEP_CNTL3 2 0xc020009c 16 0 4294967295 GRBM_0_SMU_BUSY_MASK 0 0 GRBM_1_SMU_BUSY_MASK 1 1 GRBM_2_SMU_BUSY_MASK 2 2 GRBM_3_SMU_BUSY_MASK 3 3 GRBM_4_SMU_BUSY_MASK 4 4 GRBM_5_SMU_BUSY_MASK 5 5 GRBM_6_SMU_BUSY_MASK 6 6 GRBM_7_SMU_BUSY_MASK 7 7 GRBM_8_SMU_BUSY_MASK 8 8 GRBM_9_SMU_BUSY_MASK 9 9 GRBM_10_SMU_BUSY_MASK 10 10 GRBM_11_SMU_BUSY_MASK 11 11 GRBM_12_SMU_BUSY_MASK 12 12 GRBM_13_SMU_BUSY_MASK 13 13 GRBM_14_SMU_BUSY_MASK 14 14 GRBM_15_SMU_BUSY_MASK 15 15 ixSCLK_DEEP_SLEEP_MISC_CNTL 2 0xc0200088 5 0 4294967295 DPM_DS_DIV_ID 0 2 DPM_SS_DIV_ID 3 5 OCP_ENABLE 16 16 OCP_DS_DIV_ID 17 19 OCP_SS_DIV_ID 20 22 ixLCLK_DEEP_SLEEP_CNTL 2 0xc020008c 5 0 4294967295 DIV_ID 0 2 RAMP_DIS 3 3 HYSTERESIS 4 15 RESERVED 16 30 ENABLE_DS 31 31 ixLCLK_DEEP_SLEEP_CNTL2 2 0xc0200310 23 0 4294967295 RFE_BUSY_MASK 0 0 BIF_CG_LCLK_BUSY_MASK 1 1 L1IMU_SMU_IDLE_MASK 2 2 RESERVED_BIT3 3 3 SCLK_RUNNING_MASK 4 4 SMU_BUSY_MASK 5 5 PCIE_LCLK_IDLE1_MASK 6 6 PCIE_LCLK_IDLE2_MASK 7 7 PCIE_LCLK_IDLE3_MASK 8 8 PCIE_LCLK_IDLE4_MASK 9 9 L1IMUGPP_IDLE_MASK 10 10 L1IMUGPPSB_IDLE_MASK 11 11 L1IMUBIF_IDLE_MASK 12 12 L1IMUINTGEN_IDLE_MASK 13 13 L2IMU_IDLE_MASK 14 14 ORB_IDLE_MASK 15 15 ON_INB_WAKE_MASK 16 16 ON_INB_WAKE_ACK_MASK 17 17 ON_OUTB_WAKE_MASK 18 18 ON_OUTB_WAKE_ACK_MASK 19 19 DMAACTIVE_MASK 20 20 RLC_SMU_GFXCLK_OFF_MASK 21 21 RESERVED 22 31 ixTARGET_AND_CURRENT_PROFILE_INDEX_1 2 0xc02000f0 8 0 4294967295 CURR_VDDCI_INDEX 0 3 TARG_VDDCI_INDEX 4 7 CURR_MVDD_INDEX 8 11 TARG_MVDD_INDEX 12 15 CURR_VDDC_INDEX 16 19 TARG_VDDC_INDEX 20 23 CURR_PCIE_INDEX 24 27 TARG_PCIE_INDEX 28 31 ixCG_ULV_PARAMETER 2 0xc020015c 2 0 4294967295 ULV_THRESHOLD 0 15 ULV_THRESHOLD_UNIT 16 19 ixSCLK_MIN_DIV 2 0xc02003ac 2 0 4294967295 FRACV 0 11 INTV 12 18 ixPWR_DISP_TIMER_0_CONTROL 2 0xc0200390 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_1_CONTROL 2 0xc020037c 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_2_CONTROL 2 0xc02003d0 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_3_CONTROL 2 0xc02003d4 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_4_CONTROL 2 0xc02003d8 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_5_CONTROL 2 0xc02003dc 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_6_CONTROL 2 0xc02003e0 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_7_CONTROL 2 0xc02003e4 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_8_CONTROL 2 0xc02003e8 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_9_CONTROL 2 0xc02003ec 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_10_CONTROL 2 0xc02003f0 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_11_CONTROL 2 0xc02003f4 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_12_CONTROL 2 0xc02003f8 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_13_CONTROL 2 0xc02003fc 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_14_CONTROL 2 0xc0200074 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_15_CONTROL 2 0xc0200078 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_RUNNING 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT 28 28 DISP_TIMER_INT_STAT_AK 29 29 DISP_TIMER_INT 30 30 ixPWR_DISP_TIMER_CONTROL2 2 0xc0200378 1 0 4294967295 DISP_TIMER_PULSE_WIDTH 0 9 ixVDDGFX_IDLE_PARAMETER 2 0xc020036c 2 0 4294967295 VDDGFX_IDLE_THRESHOLD 0 15 VDDGFX_IDLE_THRESHOLD_UNIT 16 19 ixVDDGFX_IDLE_CONTROL 2 0xc0200370 4 0 4294967295 VDDGFX_IDLE_EN 0 0 VDDGFX_IDLE_DETECT 1 1 FORCE_VDDGFX_IDLE_EXIT 2 2 SMC_VDDGFX_IDLE_STATE 3 3 ixVDDGFX_IDLE_EXIT 2 0xc0200374 1 0 4294967295 BIF_EXIT_REQ 0 0 ixLCAC_MC0_CNTL 2 0xc0400130 4 0 4294967295 MC0_ENABLE 0 0 MC0_THRESHOLD 1 16 MC0_BLOCK_ID 17 21 MC0_SIGNAL_ID 22 29 ixLCAC_MC0_OVR_SEL 2 0xc0400134 1 0 4294967295 MC0_OVR_SEL 0 31 ixLCAC_MC0_OVR_VAL 2 0xc0400138 1 0 4294967295 MC0_OVR_VAL 0 31 ixLCAC_MC1_CNTL 2 0xc040013c 4 0 4294967295 MC1_ENABLE 0 0 MC1_THRESHOLD 1 16 MC1_BLOCK_ID 17 21 MC1_SIGNAL_ID 22 29 ixLCAC_MC1_OVR_SEL 2 0xc0400140 1 0 4294967295 MC1_OVR_SEL 0 31 ixLCAC_MC1_OVR_VAL 2 0xc0400144 1 0 4294967295 MC1_OVR_VAL 0 31 ixLCAC_MC2_CNTL 2 0xc0400148 4 0 4294967295 MC2_ENABLE 0 0 MC2_THRESHOLD 1 16 MC2_BLOCK_ID 17 21 MC2_SIGNAL_ID 22 29 ixLCAC_MC2_OVR_SEL 2 0xc040014c 1 0 4294967295 MC2_OVR_SEL 0 31 ixLCAC_MC2_OVR_VAL 2 0xc0400150 1 0 4294967295 MC2_OVR_VAL 0 31 ixLCAC_MC3_CNTL 2 0xc0400154 4 0 4294967295 MC3_ENABLE 0 0 MC3_THRESHOLD 1 16 MC3_BLOCK_ID 17 21 MC3_SIGNAL_ID 22 29 ixLCAC_MC3_OVR_SEL 2 0xc0400158 1 0 4294967295 MC3_OVR_SEL 0 31 ixLCAC_MC3_OVR_VAL 2 0xc040015c 1 0 4294967295 MC3_OVR_VAL 0 31 ixLCAC_CPL_CNTL 2 0xc0400160 4 0 4294967295 CPL_ENABLE 0 0 CPL_THRESHOLD 1 16 CPL_BLOCK_ID 17 21 CPL_SIGNAL_ID 22 29 ixLCAC_CPL_OVR_SEL 2 0xc0400164 1 0 4294967295 CPL_OVR_SEL 0 31 ixLCAC_CPL_OVR_VAL 2 0xc0400168 1 0 4294967295 CPL_OVR_VAL 0 31 mmROM_SMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmROM0_ROM_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmROM1_ROM_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmROM2_ROM_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmROM3_ROM_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmROM_SMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmROM0_ROM_SMC_IND_DATA 0 0x81 0 0 4294967295 mmROM1_ROM_SMC_IND_DATA 0 0x83 0 0 4294967295 mmROM2_ROM_SMC_IND_DATA 0 0x85 0 0 4294967295 mmROM3_ROM_SMC_IND_DATA 0 0x87 0 0 4294967295 ixROM_CNTL 2 0xc0600000 6 0 4294967295 SCK_OVERWRITE 1 1 CLOCK_GATING_EN 2 2 CSB_ACTIVE_TO_SCK_SETUP_TIME 8 15 CSB_ACTIVE_TO_SCK_HOLD_TIME 16 23 SCK_PRESCALE_REFCLK 24 27 SCK_PRESCALE_CRYSTAL_CLK 28 31 ixPAGE_MIRROR_CNTL 2 0xc0600004 4 0 4294967295 PAGE_MIRROR_BASE_ADDR 0 23 PAGE_MIRROR_INVALIDATE 24 24 PAGE_MIRROR_ENABLE 25 25 PAGE_MIRROR_USAGE 26 27 ixROM_STATUS 2 0xc0600008 1 0 4294967295 ROM_BUSY 0 0 ixCGTT_ROM_CLK_CTRL0 2 0xc060000c 4 0 4294967295 ON_DELAY 0 3 OFF_HYSTERESIS 4 11 SOFT_OVERRIDE1 30 30 SOFT_OVERRIDE0 31 31 ixROM_INDEX 2 0xc0600010 1 0 4294967295 ROM_INDEX 0 23 ixROM_DATA 2 0xc0600014 1 0 4294967295 ROM_DATA 0 31 ixROM_START 2 0xc0600018 1 0 4294967295 ROM_START 0 23 ixROM_SW_CNTL 2 0xc060001c 3 0 4294967295 DATA_SIZE 0 15 COMMAND_SIZE 16 17 ROM_SW_RETURN_DATA_ENABLE 18 18 ixROM_SW_STATUS 2 0xc0600020 1 0 4294967295 ROM_SW_DONE 0 0 ixROM_SW_COMMAND 2 0xc0600024 2 0 4294967295 ROM_SW_INSTRUCTION 0 7 ROM_SW_ADDRESS 8 31 ixROM_SW_DATA_1 2 0xc0600028 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_2 2 0xc060002c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_3 2 0xc0600030 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_4 2 0xc0600034 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_5 2 0xc0600038 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_6 2 0xc060003c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_7 2 0xc0600040 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_8 2 0xc0600044 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_9 2 0xc0600048 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_10 2 0xc060004c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_11 2 0xc0600050 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_12 2 0xc0600054 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_13 2 0xc0600058 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_14 2 0xc060005c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_15 2 0xc0600060 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_16 2 0xc0600064 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_17 2 0xc0600068 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_18 2 0xc060006c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_19 2 0xc0600070 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_20 2 0xc0600074 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_21 2 0xc0600078 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_22 2 0xc060007c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_23 2 0xc0600080 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_24 2 0xc0600084 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_25 2 0xc0600088 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_26 2 0xc060008c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_27 2 0xc0600090 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_28 2 0xc0600094 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_29 2 0xc0600098 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_30 2 0xc060009c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_31 2 0xc06000a0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_32 2 0xc06000a4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_33 2 0xc06000a8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_34 2 0xc06000ac 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_35 2 0xc06000b0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_36 2 0xc06000b4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_37 2 0xc06000b8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_38 2 0xc06000bc 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_39 2 0xc06000c0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_40 2 0xc06000c4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_41 2 0xc06000c8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_42 2 0xc06000cc 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_43 2 0xc06000d0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_44 2 0xc06000d4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_45 2 0xc06000d8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_46 2 0xc06000dc 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_47 2 0xc06000e0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_48 2 0xc06000e4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_49 2 0xc06000e8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_50 2 0xc06000ec 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_51 2 0xc06000f0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_52 2 0xc06000f4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_53 2 0xc06000f8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_54 2 0xc06000fc 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_55 2 0xc0600100 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_56 2 0xc0600104 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_57 2 0xc0600108 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_58 2 0xc060010c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_59 2 0xc0600110 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_60 2 0xc0600114 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_61 2 0xc0600118 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_62 2 0xc060011c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_63 2 0xc0600120 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_64 2 0xc0600124 1 0 4294967295 ROM_SW_DATA 0 31 ixCURRENT_PG_STATUS 2 0xc020029c 2 0 4294967295 VCE_PG_STATUS 1 1 UVD_PG_STATUS 2 2