1250 mmGCK_SMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmGCK0_GCK_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmGCK1_GCK_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmGCK2_GCK_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmGCK3_GCK_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmGCK_SMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmGCK0_GCK_SMC_IND_DATA 0 0x81 0 0 4294967295 mmGCK1_GCK_SMC_IND_DATA 0 0x83 0 0 4294967295 mmGCK2_GCK_SMC_IND_DATA 0 0x85 0 0 4294967295 mmGCK3_GCK_SMC_IND_DATA 0 0x87 0 0 4294967295 ixCG_DCLK_CNTL 2 0xc050009c 4 0 4294967295 DCLK_DIVIDER 0 6 DCLK_DIR_CNTL_EN 8 8 DCLK_DIR_CNTL_TOG 9 9 DCLK_DIR_CNTL_DIVIDER 10 16 ixCG_DCLK_STATUS 2 0xc05000a0 2 0 4294967295 DCLK_STATUS 0 0 DCLK_DIR_CNTL_DONETOG 1 1 ixCG_VCLK_CNTL 2 0xc05000a4 4 0 4294967295 VCLK_DIVIDER 0 6 VCLK_DIR_CNTL_EN 8 8 VCLK_DIR_CNTL_TOG 9 9 VCLK_DIR_CNTL_DIVIDER 10 16 ixCG_VCLK_STATUS 2 0xc05000a8 2 0 4294967295 VCLK_STATUS 0 0 VCLK_DIR_CNTL_DONETOG 1 1 ixCG_ECLK_CNTL 2 0xc05000ac 4 0 4294967295 ECLK_DIVIDER 0 6 ECLK_DIR_CNTL_EN 8 8 ECLK_DIR_CNTL_TOG 9 9 ECLK_DIR_CNTL_DIVIDER 10 16 ixCG_ECLK_STATUS 2 0xc05000b0 2 0 4294967295 ECLK_STATUS 0 0 ECLK_DIR_CNTL_DONETOG 1 1 ixCG_ACLK_CNTL 2 0xc05000dc 4 0 4294967295 ACLK_DIVIDER 0 6 ACLK_DIR_CNTL_EN 8 8 ACLK_DIR_CNTL_TOG 9 9 ACLK_DIR_CNTL_DIVIDER 10 16 ixGCK_DFS_BYPASS_CNTL 2 0xc0500118 13 0 4294967295 BYPASSECLK 0 0 BYPASSLCLK 1 1 BYPASSEVCLK 2 2 BYPASSDCLK 3 3 BYPASSVCLK 4 4 BYPASSDISPCLK 5 5 BYPASSDPREFCLK 6 6 BYPASSACLK 7 7 BYPASSADIVCLK 8 8 BYPASSPSPCLK 9 9 BYPASSSAMCLK 10 10 BYPASSSCLK 11 11 USE_SPLL_BYPASS_EN 12 12 ixCG_SPLL_FUNC_CNTL 2 0xc0500140 11 0 4294967295 SPLL_RESET 0 0 SPLL_PWRON 1 1 SPLL_DIVEN 2 2 SPLL_BYPASS_EN 3 3 SPLL_BYPASS_THRU_DFS 4 4 SPLL_REF_DIV 5 10 SPLL_PDIV_A_UPDATE 11 11 SPLL_PDIV_A_EN 12 12 SPLL_PDIV_A 20 26 SPLL_DIVA_ACK 27 27 SPLL_OTEST_LOCK_EN 28 28 ixCG_SPLL_FUNC_CNTL_2 2 0xc0500144 10 0 4294967295 SCLK_MUX_SEL 0 8 SPLL_CTLREQ 11 11 SPLL_BYPASS_CHG 22 22 SPLL_CTLREQ_CHG 23 23 SPLL_RESET_CHG 24 24 SPLL_BABY_STEP_CHG 25 25 SCLK_MUX_UPDATE 26 26 SPLL_UNLOCK_CLEAR 27 27 SPLL_CLKF_UPDATE 28 28 SPLL_TEST_UNLOCK_CLR 30 30 ixCG_SPLL_FUNC_CNTL_3 2 0xc0500148 2 0 4294967295 SPLL_FB_DIV 0 25 SPLL_DITHEN 28 28 ixCG_SPLL_FUNC_CNTL_4 2 0xc050014c 11 0 4294967295 SPLL_SCLK_TEST_SEL 0 3 SPLL_SCLK_EXT_SEL 5 6 SPLL_SCLK_EN 7 8 SPLL_SPARE 9 18 TEST_FRAC_BYPASS 21 21 SPLL_ILOCK 23 23 SPLL_FBCLK_SEL 24 24 SPLL_VCTRLADC_EN 25 25 SPLL_SCLK_EXT 26 27 SPLL_SPARE_EXT 28 30 SPLL_VTOI_BIAS_CNTL 31 31 ixCG_SPLL_FUNC_CNTL_5 2 0xc0500150 7 0 4294967295 FBDIV_SSC_BYPASS 0 0 RISEFBVCO_EN 1 1 PFD_RESET_CNTRL 2 3 RESET_TIMER 4 5 FAST_LOCK_CNTRL 6 7 FAST_LOCK_EN 8 8 RESET_ANTI_MUX 9 9 ixCG_SPLL_FUNC_CNTL_6 2 0xc0500154 6 0 4294967295 SCLKMUX0_CLKOFF_CNT 0 7 SCLKMUX1_CLKOFF_CNT 8 15 SPLL_VCTL_EN 16 16 SPLL_VCTL_CNTRL_IN 17 20 SPLL_VCTL_CNTRL_OUT 21 24 SPLL_LF_CNTR 25 31 ixCG_SPLL_FUNC_CNTL_7 2 0xc0500158 1 0 4294967295 SPLL_BW_CNTRL 0 11 ixCG_SPLL_STATUS 2 0xc050015c 1 0 4294967295 SPLL_CHG_STATUS 1 1 ixSPLL_CNTL_MODE 2 0xc0500160 9 0 4294967295 SPLL_SW_DIR_CONTROL 0 0 SPLL_LEGACY_PDIV 1 1 SPLL_TEST 2 2 SPLL_FASTEN 3 3 SPLL_ENSAT 4 4 SPLL_TEST_CLK_EXT_DIV 10 11 SPLL_CTLREQ_DLY_CNT 12 19 SPLL_RESET_EN 28 28 SPLL_VCO_MODE 29 30 ixCG_SPLL_SPREAD_SPECTRUM 2 0xc0500164 2 0 4294967295 SSEN 0 0 CLKS 4 15 ixCG_SPLL_SPREAD_SPECTRUM_2 2 0xc0500168 1 0 4294967295 CLKV 0 25 ixMPLL_BYPASSCLK_SEL 2 0xc050019c 1 0 4294967295 MPLL_CLKOUT_SEL 8 15 ixCG_CLKPIN_CNTL 2 0xc05001a0 2 0 4294967295 XTALIN_DIVIDE 1 1 BCLK_AS_XCLK 2 2 ixCG_CLKPIN_CNTL_2 2 0xc05001a4 13 0 4294967295 ENABLE_XCLK 0 0 FORCE_BIF_REFCLK_EN 3 3 MUX_TCLK_TO_XCLK 8 8 XO_IN_OSCIN_EN 14 14 XO_IN_ICORE_CLK_OE 15 15 XO_IN_CML_RXEN 16 16 XO_IN_BIDIR_CML_OE 17 17 XO_IN2_OSCIN_EN 18 18 XO_IN2_ICORE_CLK_OE 19 19 XO_IN2_CML_RXEN 20 20 XO_IN2_BIDIR_CML_OE 21 21 CML_CTRL 22 23 CLK_SPARE 24 31 ixCG_CLKPIN_CNTL_DC 2 0xc0500204 3 0 4294967295 OSC_EN 0 0 XTL_LOW_GAIN 1 2 XTALIN_SEL 10 12 ixTHM_CLK_CNTL 2 0xc05001a8 3 0 4294967295 CMON_CLK_SEL 0 7 TMON_CLK_SEL 8 15 CTF_CLK_SHUTOFF_EN 16 16 ixMISC_CLK_CTRL 2 0xc05001ac 3 0 4294967295 DEEP_SLEEP_CLK_SEL 0 7 ZCLK_SEL 8 15 DFT_SMS_PG_CLK_SEL 16 23 ixGCK_PLL_TEST_CNTL 2 0xc05001c0 5 0 4294967295 TST_SRC_SEL 0 4 TST_REF_SEL 5 9 REF_TEST_COUNT 10 16 TST_RESET 17 17 TST_CLK_SEL_MODE 18 18 ixGCK_PLL_TEST_CNTL_2 2 0xc05001c4 1 0 4294967295 TEST_COUNT 17 31 ixGCK_ADFS_CLK_BYPASS_CNTL1 2 0xc05001c8 10 0 4294967295 ECLK_BYPASS_CNTL 0 2 SCLK_BYPASS_CNTL 3 5 LCLK_BYPASS_CNTL 6 8 DCLK_BYPASS_CNTL 9 11 VCLK_BYPASS_CNTL 12 14 DISPCLK_BYPASS_CNTL 15 17 DRREFCLK_BYPASS_CNTL 18 20 ACLK_BYPASS_CNTL 21 23 SAMCLK_BYPASS_CNTL 24 26 ACLK_DIV_BYPASS_CNTL 27 29 mmSMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC0_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmSMC1_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmSMC2_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmSMC3_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmSMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC0_SMC_IND_DATA 0 0x81 0 0 4294967295 mmSMC1_SMC_IND_DATA 0 0x83 0 0 4294967295 mmSMC2_SMC_IND_DATA 0 0x85 0 0 4294967295 mmSMC3_SMC_IND_DATA 0 0x87 0 0 4294967295 mmSMC_IND_INDEX_0 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_0 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_1 0 0x82 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_1 0 0x83 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_2 0 0x84 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_2 0 0x85 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_3 0 0x86 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_3 0 0x87 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_4 0 0x88 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_4 0 0x89 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_5 0 0x8a 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_5 0 0x8b 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_6 0 0x8c 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_6 0 0x8d 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_7 0 0x8e 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMC_IND_DATA_7 0 0x8f 1 0 4294967295 SMC_IND_DATA 0 31 mmSMC_IND_INDEX_11 0 0x1ac 0 0 4294967295 mmSMC_IND_DATA_11 0 0x1ad 0 0 4294967295 mmSMC_IND_ACCESS_CNTL 0 0x92 16 0 4294967295 AUTO_INCREMENT_IND_0 0 0 AUTO_INCREMENT_IND_1 1 1 AUTO_INCREMENT_IND_2 2 2 AUTO_INCREMENT_IND_3 3 3 AUTO_INCREMENT_IND_4 4 4 AUTO_INCREMENT_IND_5 5 5 AUTO_INCREMENT_IND_6 6 6 AUTO_INCREMENT_IND_7 7 7 AUTO_INCREMENT_IND_8 8 8 AUTO_INCREMENT_IND_9 9 9 AUTO_INCREMENT_IND_10 10 10 AUTO_INCREMENT_IND_11 11 11 AUTO_INCREMENT_IND_12 12 12 AUTO_INCREMENT_IND_13 13 13 AUTO_INCREMENT_IND_14 14 14 AUTO_INCREMENT_IND_15 15 15 mmSMC_MESSAGE_0 0 0x94 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_0 0 0x95 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_1 0 0x96 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_1 0 0x97 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_2 0 0x98 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_2 0 0x99 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_3 0 0x9a 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_3 0 0x9b 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_4 0 0x9c 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_4 0 0x9d 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_5 0 0x9e 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_5 0 0x9f 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_6 0 0xa0 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_6 0 0xa1 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_7 0 0xa2 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_7 0 0xa3 1 0 4294967295 SMC_RESP 0 15 mmSMC_MSG_ARG_0 0 0xa4 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_1 0 0xa5 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_2 0 0xa6 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_3 0 0xa7 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_4 0 0xa8 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_5 0 0xa9 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_6 0 0xaa 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_7 0 0xab 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MESSAGE_8 0 0xb5 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_8 0 0xb6 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_9 0 0xb7 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_9 0 0xb8 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_10 0 0xb9 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_10 0 0xba 1 0 4294967295 SMC_RESP 0 15 mmSMC_MESSAGE_11 0 0xbb 1 0 4294967295 SMC_MSG 0 15 mmSMC_RESP_11 0 0xbc 1 0 4294967295 SMC_RESP 0 15 mmSMC_MSG_ARG_8 0 0xbd 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_9 0 0xbe 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_10 0 0xbf 1 0 4294967295 SMC_MSG_ARG 0 31 mmSMC_MSG_ARG_11 0 0x93 1 0 4294967295 SMC_MSG_ARG 0 31 ixSMC_SYSCON_RESET_CNTL 2 0x80000000 3 0 4294967295 rst_reg 0 0 srbm_soft_rst_override 1 1 RegReset 30 30 ixSMC_SYSCON_CLOCK_CNTL_0 2 0x80000004 4 0 4294967295 ck_disable 0 0 auto_cg_en 1 1 auto_cg_timeout 8 23 cken 24 24 ixSMC_SYSCON_CLOCK_CNTL_1 2 0x80000008 1 0 4294967295 auto_ck_disable 0 0 ixSMC_SYSCON_CLOCK_CNTL_2 2 0x8000000c 1 0 4294967295 wake_on_irq 0 31 ixSMC_SYSCON_MISC_CNTL 2 0x80000010 1 0 4294967295 dma_no_outstanding 1 1 ixSMC_SYSCON_MSG_ARG_0 2 0x80000068 1 0 4294967295 smc_msg_arg 0 31 ixSMC_PC_C 2 0x80000370 1 0 4294967295 smc_pc_c 0 31 ixSMC_SCRATCH9 2 0x80000424 1 0 4294967295 SCRATCH_VALUE 0 31 mmGPIOPAD_SW_INT_STAT 0 0x180 1 0 4294967295 SW_INT_STAT 0 0 mmGPIOPAD_STRENGTH 0 0x181 2 0 4294967295 GPIO_STRENGTH_SN 0 3 GPIO_STRENGTH_SP 4 7 mmGPIOPAD_MASK 0 0x182 1 0 4294967295 GPIO_MASK 0 30 mmGPIOPAD_A 0 0x183 1 0 4294967295 GPIO_A 0 30 mmGPIOPAD_EN 0 0x184 1 0 4294967295 GPIO_EN 0 30 mmGPIOPAD_Y 0 0x185 1 0 4294967295 GPIO_Y 0 30 mmGPIOPAD_PINSTRAPS 0 0x186 31 0 4294967295 GPIO_PINSTRAP_0 0 0 GPIO_PINSTRAP_1 1 1 GPIO_PINSTRAP_2 2 2 GPIO_PINSTRAP_3 3 3 GPIO_PINSTRAP_4 4 4 GPIO_PINSTRAP_5 5 5 GPIO_PINSTRAP_6 6 6 GPIO_PINSTRAP_7 7 7 GPIO_PINSTRAP_8 8 8 GPIO_PINSTRAP_9 9 9 GPIO_PINSTRAP_10 10 10 GPIO_PINSTRAP_11 11 11 GPIO_PINSTRAP_12 12 12 GPIO_PINSTRAP_13 13 13 GPIO_PINSTRAP_14 14 14 GPIO_PINSTRAP_15 15 15 GPIO_PINSTRAP_16 16 16 GPIO_PINSTRAP_17 17 17 GPIO_PINSTRAP_18 18 18 GPIO_PINSTRAP_19 19 19 GPIO_PINSTRAP_20 20 20 GPIO_PINSTRAP_21 21 21 GPIO_PINSTRAP_22 22 22 GPIO_PINSTRAP_23 23 23 GPIO_PINSTRAP_24 24 24 GPIO_PINSTRAP_25 25 25 GPIO_PINSTRAP_26 26 26 GPIO_PINSTRAP_27 27 27 GPIO_PINSTRAP_28 28 28 GPIO_PINSTRAP_29 29 29 GPIO_PINSTRAP_30 30 30 mmGPIOPAD_INT_STAT_EN 0 0x187 2 0 4294967295 GPIO_INT_STAT_EN 0 28 SW_INITIATED_INT_STAT_EN 31 31 mmGPIOPAD_INT_STAT 0 0x188 2 0 4294967295 GPIO_INT_STAT 0 28 SW_INITIATED_INT_STAT 31 31 mmGPIOPAD_INT_STAT_AK 0 0x189 30 0 4294967295 GPIO_INT_STAT_AK_0 0 0 GPIO_INT_STAT_AK_1 1 1 GPIO_INT_STAT_AK_2 2 2 GPIO_INT_STAT_AK_3 3 3 GPIO_INT_STAT_AK_4 4 4 GPIO_INT_STAT_AK_5 5 5 GPIO_INT_STAT_AK_6 6 6 GPIO_INT_STAT_AK_7 7 7 GPIO_INT_STAT_AK_8 8 8 GPIO_INT_STAT_AK_9 9 9 GPIO_INT_STAT_AK_10 10 10 GPIO_INT_STAT_AK_11 11 11 GPIO_INT_STAT_AK_12 12 12 GPIO_INT_STAT_AK_13 13 13 GPIO_INT_STAT_AK_14 14 14 GPIO_INT_STAT_AK_15 15 15 GPIO_INT_STAT_AK_16 16 16 GPIO_INT_STAT_AK_17 17 17 GPIO_INT_STAT_AK_18 18 18 GPIO_INT_STAT_AK_19 19 19 GPIO_INT_STAT_AK_20 20 20 GPIO_INT_STAT_AK_21 21 21 GPIO_INT_STAT_AK_22 22 22 GPIO_INT_STAT_AK_23 23 23 GPIO_INT_STAT_AK_24 24 24 GPIO_INT_STAT_AK_25 25 25 GPIO_INT_STAT_AK_26 26 26 GPIO_INT_STAT_AK_27 27 27 GPIO_INT_STAT_AK_28 28 28 SW_INITIATED_INT_STAT_AK 31 31 mmGPIOPAD_INT_EN 0 0x18a 2 0 4294967295 GPIO_INT_EN 0 28 SW_INITIATED_INT_EN 31 31 mmGPIOPAD_INT_TYPE 0 0x18b 2 0 4294967295 GPIO_INT_TYPE 0 28 SW_INITIATED_INT_TYPE 31 31 mmGPIOPAD_INT_POLARITY 0 0x18c 2 0 4294967295 GPIO_INT_POLARITY 0 28 SW_INITIATED_INT_POLARITY 31 31 mmGPIOPAD_EXTERN_TRIG_CNTL 0 0x18d 3 0 4294967295 EXTERN_TRIG_SEL 0 4 EXTERN_TRIG_CLR 5 5 EXTERN_TRIG_READ 6 6 mmGPIOPAD_RCVR_SEL 0 0x191 1 0 4294967295 GPIO_RCVR_SEL 0 30 mmGPIOPAD_PU_EN 0 0x192 1 0 4294967295 GPIO_PU_EN 0 30 mmGPIOPAD_PD_EN 0 0x193 1 0 4294967295 GPIO_PD_EN 0 30 mmCG_FPS_CNT 0 0x1b6 1 0 4294967295 FPS_CNT 0 31 mmSMU_IND_INDEX_0 0 0x1a6 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_0 0 0x1a7 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_1 0 0x1a8 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_1 0 0x1a9 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_2 0 0x1aa 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_2 0 0x1ab 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_3 0 0x1ac 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_3 0 0x1ad 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_4 0 0x1ae 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_4 0 0x1af 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_5 0 0x1b0 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_5 0 0x1b1 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_6 0 0x1b2 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_6 0 0x1b3 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_IND_INDEX_7 0 0x1b4 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU_IND_DATA_7 0 0x1b5 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU_SMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmSMU0_SMU_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmSMU1_SMU_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmSMU2_SMU_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmSMU3_SMU_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmSMU_SMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmSMU0_SMU_SMC_IND_DATA 0 0x81 0 0 4294967295 mmSMU1_SMU_SMC_IND_DATA 0 0x83 0 0 4294967295 mmSMU2_SMU_SMC_IND_DATA 0 0x85 0 0 4294967295 mmSMU3_SMU_SMC_IND_DATA 0 0x87 0 0 4294967295 ixRCU_UC_EVENTS 2 0xc0000004 16 0 4294967295 RCU_TST_jpc_rep_req 0 0 TST_RCU_jpc_rep_done 1 1 drv_rst_mode 2 2 SMU_DC_efuse_status_invalid 3 3 TP_Tester 6 6 boot_seq_done 7 7 sclk_deep_sleep_exit 8 8 BREAK_PT1_ACTIVE 9 9 BREAK_PT2_ACTIVE 10 10 FCH_HALT 11 11 RCU_GIO_fch_lockdown 13 13 INTERRUPTS_ENABLED 16 16 RCU_DtmCnt0_Done 17 17 RCU_DtmCnt1_Done 18 18 RCU_DtmCnt2_Done 19 19 irq31_sel 24 25 ixRCU_MISC_CTRL 2 0xc0000010 9 0 4294967295 REG_DRV_RST_MODE 1 1 REG_RCU_MEMREP_DIS 3 3 REG_CC_FUSE_DISABLE 4 4 REG_SAMU_FUSE_DISABLE 5 5 REG_CC_SRBM_RD_DISABLE 8 8 BREAK_PT1_DONE 16 16 BREAK_PT2_DONE 17 17 SAMU_START 22 22 RST_PULSE_WIDTH 23 31 ixRCU_VIRT_RESET_REQ 2 0xc0000024 2 0 4294967295 VF 0 15 PF 31 31 ixCC_RCU_FUSES 2 0xc00c0000 21 0 4294967295 GPU_DIS 1 1 DEBUG_DISABLE 2 2 EFUSE_RD_DISABLE 4 4 CG_RST_GLB_REQ_DIS 5 5 DRV_RST_MODE 6 6 ROM_DIS 7 7 JPC_REP_DISABLE 8 8 RCU_BREAK_POINT1 9 9 RCU_BREAK_POINT2 10 10 SMU_IOC_MST_DISABLE 14 14 FCH_LOCKOUT_ENABLE 15 15 FCH_XFIRE_FILTER_ENABLE 16 16 XFIRE_DISABLE 17 17 SAMU_FUSE_DISABLE 18 18 BIF_RST_POLLING_DISABLE 19 19 MEM_HARDREP_EN 21 21 PCIE_INIT_DISABLE 22 22 DSMU_DISABLE 23 23 WRP_FUSE_VALID 24 24 PHY_FUSE_VALID 25 25 RCU_SPARE 26 31 ixCC_SMU_MISC_FUSES 2 0xc00c0004 13 0 4294967295 IOMMU_V2_DISABLE 1 1 MinSClkDid 2 8 MISC_SPARE 9 10 PostResetGnbClkDid 11 17 L2IMU_tn2_dtc_half 18 18 L2IMU_tn2_ptc_half 19 19 L2IMU_tn2_itc_half 20 20 L2IMU_tn2_pdc_half 21 21 L2IMU_tn2_ptc_dis 22 22 L2IMU_tn2_itc_dis 23 23 VCE_DISABLE 27 27 IOC_IOMMU_DISABLE 28 28 GNB_SPARE 29 30 ixCC_SCLK_VID_FUSES 2 0xc00c0008 4 0 4294967295 SClkVid0 0 7 SClkVid1 8 15 SClkVid2 16 23 SClkVid3 24 31 ixCC_GIO_IOCCFG_FUSES 2 0xc00c000c 1 0 4294967295 NB_REV_ID 1 10 ixCC_GIO_IOC_FUSES 2 0xc00c0010 1 0 4294967295 IOC_FUSES 1 5 ixCC_SMU_TST_EFUSE1_MISC 2 0xc00c001c 15 0 4294967295 RF_RM_6_2 1 5 RME 6 6 MBIST_DISABLE 7 7 HARD_REPAIR_DISABLE 8 8 SOFT_REPAIR_DISABLE 9 9 GPU_DIS 10 10 SMS_PWRDWN_DISABLE 11 11 CRBBMP1500_DISA 12 12 CRBBMP1500_DISB 13 13 RM_RF8 14 14 DFT_SPARE1 22 22 DFT_SPARE2 23 23 DFT_SPARE3 24 24 VCE_DISABLE 25 25 DCE_SCAN_DISABLE 26 26 ixCC_TST_ID_STRAPS 2 0xc00c0020 4 0 4294967295 DEVICE_ID 4 19 MAJOR_REV_ID 20 23 MINOR_REV_ID 24 27 ATI_REV_ID 28 31 ixCC_FCTRL_FUSES 2 0xc00c0024 1 0 4294967295 EXT_EFUSE_MACRO_PRESENT 1 1 ixCC_HARVEST_FUSES 2 0xc00c0028 4 0 4294967295 VCE_DISABLE 1 2 UVD_DISABLE 4 4 ACP_DISABLE 6 6 DC_DISABLE 8 13 ixSMU_MAIN_PLL_OP_FREQ 2 0xe0003020 1 0 4294967295 PLL_OP_FREQ 0 31 ixSMU_STATUS 2 0xe0003088 2 0 4294967295 SMU_DONE 0 0 SMU_PASS 1 1 ixSMU_FIRMWARE 2 0xe00030a4 7 0 4294967295 SMU_IN_PROG 0 0 SMU_RD_DONE 1 2 SMU_SRAM_RD_BLOCK_EN 3 3 SMU_SRAM_WR_BLOCK_EN 4 4 SMU_counter 8 11 SMU_MODE 16 16 SMU_SEL 17 17 ixSMU_INPUT_DATA 2 0xe00030b8 2 0 4294967295 START_ADDR 0 30 AUTO_START 31 31 ixSMU_EFUSE_0 2 0xc0100000 1 0 4294967295 EFUSE_DATA 0 31 ixFIRMWARE_FLAGS 2 0x3f800 3 0 4294967295 INTERRUPTS_ENABLED 0 0 RESERVED 1 23 TEST_COUNT 24 31 ixTDC_STATUS 2 0x3f804 4 0 4294967295 VDD_Boost 0 7 VDD_Throttle 8 15 VDDC_Boost 16 23 VDDC_Throttle 24 31 ixTDC_MV_AVERAGE 2 0x3f808 2 0 4294967295 IDD 0 15 IDDC 16 31 ixTDC_VRM_LIMIT 2 0x3f80c 2 0 4294967295 IDD 0 15 IDDC 16 31 ixFEATURE_STATUS 2 0x3f810 23 0 4294967295 SCLK_DPM_ON 0 0 MCLK_DPM_ON 1 1 LCLK_DPM_ON 2 2 UVD_DPM_ON 3 3 VCE_DPM_ON 4 4 ACP_DPM_ON 5 5 SAMU_DPM_ON 6 6 PCIE_DPM_ON 7 7 BAPM_ON 8 8 LPMX_ON 9 9 NBDPM_ON 10 10 LHTC_ON 11 11 VPC_ON 12 12 VOLTAGE_CONTROLLER_ON 13 13 TDC_LIMIT_ON 14 14 GPU_CAC_ON 15 15 AVS_ON 16 16 SPMI_ON 17 17 SCLK_DPM_FORCED 18 18 MCLK_DPM_FORCED 19 19 LCLK_DPM_FORCED 20 20 PCIE_DPM_FORCED 21 21 RESERVED 22 31 ixENTITY_TEMPERATURES_1 2 0x3f814 1 0 4294967295 GPU 0 31 ixDPM_TABLE_1 2 0x3f000 1 0 4294967295 GraphicsPIDController_Ki 0 31 ixDPM_TABLE_2 2 0x3f004 1 0 4294967295 GraphicsPIDController_LFWindupUpperLim 0 31 ixDPM_TABLE_3 2 0x3f008 1 0 4294967295 GraphicsPIDController_LFWindupLowerLim 0 31 ixDPM_TABLE_4 2 0x3f00c 1 0 4294967295 GraphicsPIDController_StatePrecision 0 31 ixDPM_TABLE_5 2 0x3f010 1 0 4294967295 GraphicsPIDController_LfPrecision 0 31 ixDPM_TABLE_6 2 0x3f014 1 0 4294967295 GraphicsPIDController_LfOffset 0 31 ixDPM_TABLE_7 2 0x3f018 1 0 4294967295 GraphicsPIDController_MaxState 0 31 ixDPM_TABLE_8 2 0x3f01c 1 0 4294967295 GraphicsPIDController_MaxLfFraction 0 31 ixDPM_TABLE_9 2 0x3f020 1 0 4294967295 GraphicsPIDController_StateShift 0 31 ixDPM_TABLE_10 2 0x3f024 1 0 4294967295 MemoryPIDController_Ki 0 31 ixDPM_TABLE_11 2 0x3f028 1 0 4294967295 MemoryPIDController_LFWindupUpperLim 0 31 ixDPM_TABLE_12 2 0x3f02c 1 0 4294967295 MemoryPIDController_LFWindupLowerLim 0 31 ixDPM_TABLE_13 2 0x3f030 1 0 4294967295 MemoryPIDController_StatePrecision 0 31 ixDPM_TABLE_14 2 0x3f034 1 0 4294967295 MemoryPIDController_LfPrecision 0 31 ixDPM_TABLE_15 2 0x3f038 1 0 4294967295 MemoryPIDController_LfOffset 0 31 ixDPM_TABLE_16 2 0x3f03c 1 0 4294967295 MemoryPIDController_MaxState 0 31 ixDPM_TABLE_17 2 0x3f040 1 0 4294967295 MemoryPIDController_MaxLfFraction 0 31 ixDPM_TABLE_18 2 0x3f044 1 0 4294967295 MemoryPIDController_StateShift 0 31 ixDPM_TABLE_19 2 0x3f048 1 0 4294967295 LinkPIDController_Ki 0 31 ixDPM_TABLE_20 2 0x3f04c 1 0 4294967295 LinkPIDController_LFWindupUpperLim 0 31 ixDPM_TABLE_21 2 0x3f050 1 0 4294967295 LinkPIDController_LFWindupLowerLim 0 31 ixDPM_TABLE_22 2 0x3f054 1 0 4294967295 LinkPIDController_StatePrecision 0 31 ixDPM_TABLE_23 2 0x3f058 1 0 4294967295 LinkPIDController_LfPrecision 0 31 ixDPM_TABLE_24 2 0x3f05c 1 0 4294967295 LinkPIDController_LfOffset 0 31 ixDPM_TABLE_25 2 0x3f060 1 0 4294967295 LinkPIDController_MaxState 0 31 ixDPM_TABLE_26 2 0x3f064 1 0 4294967295 LinkPIDController_MaxLfFraction 0 31 ixDPM_TABLE_27 2 0x3f068 1 0 4294967295 LinkPIDController_StateShift 0 31 ixDPM_TABLE_28 2 0x3f06c 1 0 4294967295 SystemFlags 0 31 ixDPM_TABLE_29 2 0x3f070 1 0 4294967295 VRConfig 0 31 ixDPM_TABLE_30 2 0x3f074 1 0 4294967295 SmioMask1 0 31 ixDPM_TABLE_31 2 0x3f078 1 0 4294967295 SmioMask2 0 31 ixDPM_TABLE_32 2 0x3f07c 3 0 4294967295 SmioTable1_Pattern_0_padding 0 7 SmioTable1_Pattern_0_Smio 8 15 SmioTable1_Pattern_0_Voltage 16 31 ixDPM_TABLE_33 2 0x3f080 3 0 4294967295 SmioTable1_Pattern_1_padding 0 7 SmioTable1_Pattern_1_Smio 8 15 SmioTable1_Pattern_1_Voltage 16 31 ixDPM_TABLE_34 2 0x3f084 3 0 4294967295 SmioTable1_Pattern_2_padding 0 7 SmioTable1_Pattern_2_Smio 8 15 SmioTable1_Pattern_2_Voltage 16 31 ixDPM_TABLE_35 2 0x3f088 3 0 4294967295 SmioTable1_Pattern_3_padding 0 7 SmioTable1_Pattern_3_Smio 8 15 SmioTable1_Pattern_3_Voltage 16 31 ixDPM_TABLE_36 2 0x3f08c 3 0 4294967295 SmioTable2_Pattern_0_padding 0 7 SmioTable2_Pattern_0_Smio 8 15 SmioTable2_Pattern_0_Voltage 16 31 ixDPM_TABLE_37 2 0x3f090 3 0 4294967295 SmioTable2_Pattern_1_padding 0 7 SmioTable2_Pattern_1_Smio 8 15 SmioTable2_Pattern_1_Voltage 16 31 ixDPM_TABLE_38 2 0x3f094 3 0 4294967295 SmioTable2_Pattern_2_padding 0 7 SmioTable2_Pattern_2_Smio 8 15 SmioTable2_Pattern_2_Voltage 16 31 ixDPM_TABLE_39 2 0x3f098 3 0 4294967295 SmioTable2_Pattern_3_padding 0 7 SmioTable2_Pattern_3_Smio 8 15 SmioTable2_Pattern_3_Voltage 16 31 ixDPM_TABLE_40 2 0x3f09c 1 0 4294967295 VddcLevelCount 0 31 ixDPM_TABLE_41 2 0x3f0a0 1 0 4294967295 VddciLevelCount 0 31 ixDPM_TABLE_42 2 0x3f0a4 1 0 4294967295 VddGfxLevelCount 0 31 ixDPM_TABLE_43 2 0x3f0a8 1 0 4294967295 MvddLevelCount 0 31 ixDPM_TABLE_44 2 0x3f0ac 2 0 4294967295 VddcTable_1 0 15 VddcTable_0 16 31 ixDPM_TABLE_45 2 0x3f0b0 2 0 4294967295 VddcTable_3 0 15 VddcTable_2 16 31 ixDPM_TABLE_46 2 0x3f0b4 2 0 4294967295 VddcTable_5 0 15 VddcTable_4 16 31 ixDPM_TABLE_47 2 0x3f0b8 2 0 4294967295 VddcTable_7 0 15 VddcTable_6 16 31 ixDPM_TABLE_48 2 0x3f0bc 2 0 4294967295 VddcTable_9 0 15 VddcTable_8 16 31 ixDPM_TABLE_49 2 0x3f0c0 2 0 4294967295 VddcTable_11 0 15 VddcTable_10 16 31 ixDPM_TABLE_50 2 0x3f0c4 2 0 4294967295 VddcTable_13 0 15 VddcTable_12 16 31 ixDPM_TABLE_51 2 0x3f0c8 2 0 4294967295 VddcTable_15 0 15 VddcTable_14 16 31 ixDPM_TABLE_52 2 0x3f0cc 2 0 4294967295 VddGfxTable_1 0 15 VddGfxTable_0 16 31 ixDPM_TABLE_53 2 0x3f0d0 2 0 4294967295 VddGfxTable_3 0 15 VddGfxTable_2 16 31 ixDPM_TABLE_54 2 0x3f0d4 2 0 4294967295 VddGfxTable_5 0 15 VddGfxTable_4 16 31 ixDPM_TABLE_55 2 0x3f0d8 2 0 4294967295 VddGfxTable_7 0 15 VddGfxTable_6 16 31 ixDPM_TABLE_56 2 0x3f0dc 2 0 4294967295 VddGfxTable_9 0 15 VddGfxTable_8 16 31 ixDPM_TABLE_57 2 0x3f0e0 2 0 4294967295 VddGfxTable_11 0 15 VddGfxTable_10 16 31 ixDPM_TABLE_58 2 0x3f0e4 2 0 4294967295 VddGfxTable_13 0 15 VddGfxTable_12 16 31 ixDPM_TABLE_59 2 0x3f0e8 2 0 4294967295 VddGfxTable_15 0 15 VddGfxTable_14 16 31 ixDPM_TABLE_60 2 0x3f0ec 2 0 4294967295 VddciTable_1 0 15 VddciTable_0 16 31 ixDPM_TABLE_61 2 0x3f0f0 2 0 4294967295 VddciTable_3 0 15 VddciTable_2 16 31 ixDPM_TABLE_62 2 0x3f0f4 2 0 4294967295 VddciTable_5 0 15 VddciTable_4 16 31 ixDPM_TABLE_63 2 0x3f0f8 2 0 4294967295 VddciTable_7 0 15 VddciTable_6 16 31 ixDPM_TABLE_64 2 0x3f0fc 4 0 4294967295 BapmVddGfxVidHiSidd_3 0 7 BapmVddGfxVidHiSidd_2 8 15 BapmVddGfxVidHiSidd_1 16 23 BapmVddGfxVidHiSidd_0 24 31 ixDPM_TABLE_65 2 0x3f100 4 0 4294967295 BapmVddGfxVidHiSidd_7 0 7 BapmVddGfxVidHiSidd_6 8 15 BapmVddGfxVidHiSidd_5 16 23 BapmVddGfxVidHiSidd_4 24 31 ixDPM_TABLE_66 2 0x3f104 4 0 4294967295 BapmVddGfxVidHiSidd_11 0 7 BapmVddGfxVidHiSidd_10 8 15 BapmVddGfxVidHiSidd_9 16 23 BapmVddGfxVidHiSidd_8 24 31 ixDPM_TABLE_67 2 0x3f108 4 0 4294967295 BapmVddGfxVidHiSidd_15 0 7 BapmVddGfxVidHiSidd_14 8 15 BapmVddGfxVidHiSidd_13 16 23 BapmVddGfxVidHiSidd_12 24 31 ixDPM_TABLE_68 2 0x3f10c 4 0 4294967295 BapmVddGfxVidLoSidd_3 0 7 BapmVddGfxVidLoSidd_2 8 15 BapmVddGfxVidLoSidd_1 16 23 BapmVddGfxVidLoSidd_0 24 31 ixDPM_TABLE_69 2 0x3f110 4 0 4294967295 BapmVddGfxVidLoSidd_7 0 7 BapmVddGfxVidLoSidd_6 8 15 BapmVddGfxVidLoSidd_5 16 23 BapmVddGfxVidLoSidd_4 24 31 ixDPM_TABLE_70 2 0x3f114 4 0 4294967295 BapmVddGfxVidLoSidd_11 0 7 BapmVddGfxVidLoSidd_10 8 15 BapmVddGfxVidLoSidd_9 16 23 BapmVddGfxVidLoSidd_8 24 31 ixDPM_TABLE_71 2 0x3f118 4 0 4294967295 BapmVddGfxVidLoSidd_15 0 7 BapmVddGfxVidLoSidd_14 8 15 BapmVddGfxVidLoSidd_13 16 23 BapmVddGfxVidLoSidd_12 24 31 ixDPM_TABLE_72 2 0x3f11c 4 0 4294967295 BapmVddGfxVidHiSidd2_3 0 7 BapmVddGfxVidHiSidd2_2 8 15 BapmVddGfxVidHiSidd2_1 16 23 BapmVddGfxVidHiSidd2_0 24 31 ixDPM_TABLE_73 2 0x3f120 4 0 4294967295 BapmVddGfxVidHiSidd2_7 0 7 BapmVddGfxVidHiSidd2_6 8 15 BapmVddGfxVidHiSidd2_5 16 23 BapmVddGfxVidHiSidd2_4 24 31 ixDPM_TABLE_74 2 0x3f124 4 0 4294967295 BapmVddGfxVidHiSidd2_11 0 7 BapmVddGfxVidHiSidd2_10 8 15 BapmVddGfxVidHiSidd2_9 16 23 BapmVddGfxVidHiSidd2_8 24 31 ixDPM_TABLE_75 2 0x3f128 4 0 4294967295 BapmVddGfxVidHiSidd2_15 0 7 BapmVddGfxVidHiSidd2_14 8 15 BapmVddGfxVidHiSidd2_13 16 23 BapmVddGfxVidHiSidd2_12 24 31 ixDPM_TABLE_76 2 0x3f12c 4 0 4294967295 BapmVddcVidHiSidd_3 0 7 BapmVddcVidHiSidd_2 8 15 BapmVddcVidHiSidd_1 16 23 BapmVddcVidHiSidd_0 24 31 ixDPM_TABLE_77 2 0x3f130 4 0 4294967295 BapmVddcVidHiSidd_7 0 7 BapmVddcVidHiSidd_6 8 15 BapmVddcVidHiSidd_5 16 23 BapmVddcVidHiSidd_4 24 31 ixDPM_TABLE_78 2 0x3f134 4 0 4294967295 BapmVddcVidHiSidd_11 0 7 BapmVddcVidHiSidd_10 8 15 BapmVddcVidHiSidd_9 16 23 BapmVddcVidHiSidd_8 24 31 ixDPM_TABLE_79 2 0x3f138 4 0 4294967295 BapmVddcVidHiSidd_15 0 7 BapmVddcVidHiSidd_14 8 15 BapmVddcVidHiSidd_13 16 23 BapmVddcVidHiSidd_12 24 31 ixDPM_TABLE_80 2 0x3f13c 4 0 4294967295 BapmVddcVidLoSidd_3 0 7 BapmVddcVidLoSidd_2 8 15 BapmVddcVidLoSidd_1 16 23 BapmVddcVidLoSidd_0 24 31 ixDPM_TABLE_81 2 0x3f140 4 0 4294967295 BapmVddcVidLoSidd_7 0 7 BapmVddcVidLoSidd_6 8 15 BapmVddcVidLoSidd_5 16 23 BapmVddcVidLoSidd_4 24 31 ixDPM_TABLE_82 2 0x3f144 4 0 4294967295 BapmVddcVidLoSidd_11 0 7 BapmVddcVidLoSidd_10 8 15 BapmVddcVidLoSidd_9 16 23 BapmVddcVidLoSidd_8 24 31 ixDPM_TABLE_83 2 0x3f148 4 0 4294967295 BapmVddcVidLoSidd_15 0 7 BapmVddcVidLoSidd_14 8 15 BapmVddcVidLoSidd_13 16 23 BapmVddcVidLoSidd_12 24 31 ixDPM_TABLE_84 2 0x3f14c 4 0 4294967295 BapmVddcVidHiSidd2_3 0 7 BapmVddcVidHiSidd2_2 8 15 BapmVddcVidHiSidd2_1 16 23 BapmVddcVidHiSidd2_0 24 31 ixDPM_TABLE_85 2 0x3f150 4 0 4294967295 BapmVddcVidHiSidd2_7 0 7 BapmVddcVidHiSidd2_6 8 15 BapmVddcVidHiSidd2_5 16 23 BapmVddcVidHiSidd2_4 24 31 ixDPM_TABLE_86 2 0x3f154 4 0 4294967295 BapmVddcVidHiSidd2_11 0 7 BapmVddcVidHiSidd2_10 8 15 BapmVddcVidHiSidd2_9 16 23 BapmVddcVidHiSidd2_8 24 31 ixDPM_TABLE_87 2 0x3f158 4 0 4294967295 BapmVddcVidHiSidd2_15 0 7 BapmVddcVidHiSidd2_14 8 15 BapmVddcVidHiSidd2_13 16 23 BapmVddcVidHiSidd2_12 24 31 ixDPM_TABLE_88 2 0x3f15c 4 0 4294967295 MasterDeepSleepControl 0 7 LinkLevelCount 8 15 MemoryDpmLevelCount 16 23 GraphicsDpmLevelCount 24 31 ixDPM_TABLE_89 2 0x3f160 4 0 4294967295 SamuLevelCount 0 7 AcpLevelCount 8 15 VceLevelCount 16 23 UvdLevelCount 24 31 ixDPM_TABLE_90 2 0x3f164 1 0 4294967295 Reserved_0 0 31 ixDPM_TABLE_91 2 0x3f168 1 0 4294967295 Reserved_1 0 31 ixDPM_TABLE_92 2 0x3f16c 1 0 4294967295 Reserved_2 0 31 ixDPM_TABLE_93 2 0x3f170 1 0 4294967295 Reserved_3 0 31 ixDPM_TABLE_94 2 0x3f174 1 0 4294967295 Reserved_4 0 31 ixDPM_TABLE_95 2 0x3f178 4 0 4294967295 GraphicsLevel_0_MinVoltage_Phases 0 7 GraphicsLevel_0_MinVoltage_VddGfx 8 15 GraphicsLevel_0_MinVoltage_Vddci 16 23 GraphicsLevel_0_MinVoltage_Vddc 24 31 ixDPM_TABLE_96 2 0x3f17c 1 0 4294967295 GraphicsLevel_0_SclkFrequency 0 31 ixDPM_TABLE_97 2 0x3f180 3 0 4294967295 GraphicsLevel_0_ActivityLevel 0 15 GraphicsLevel_0_DeepSleepDivId 16 23 GraphicsLevel_0_pcieDpmLevel 24 31 ixDPM_TABLE_98 2 0x3f184 1 0 4294967295 GraphicsLevel_0_CgSpllFuncCntl3 0 31 ixDPM_TABLE_99 2 0x3f188 1 0 4294967295 GraphicsLevel_0_CgSpllFuncCntl4 0 31 ixDPM_TABLE_100 2 0x3f18c 1 0 4294967295 GraphicsLevel_0_SpllSpreadSpectrum 0 31 ixDPM_TABLE_101 2 0x3f190 1 0 4294967295 GraphicsLevel_0_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_102 2 0x3f194 1 0 4294967295 GraphicsLevel_0_CcPwrDynRm 0 31 ixDPM_TABLE_103 2 0x3f198 1 0 4294967295 GraphicsLevel_0_CcPwrDynRm1 0 31 ixDPM_TABLE_104 2 0x3f19c 4 0 4294967295 GraphicsLevel_0_EnabledForThrottle 0 7 GraphicsLevel_0_EnabledForActivity 8 15 GraphicsLevel_0_DisplayWatermark 16 23 GraphicsLevel_0_SclkDid 24 31 ixDPM_TABLE_105 2 0x3f1a0 4 0 4294967295 GraphicsLevel_0_PowerThrottle 0 7 GraphicsLevel_0_VoltageDownHyst 8 15 GraphicsLevel_0_DownHyst 16 23 GraphicsLevel_0_UpHyst 24 31 ixDPM_TABLE_106 2 0x3f1a4 4 0 4294967295 GraphicsLevel_1_MinVoltage_Phases 0 7 GraphicsLevel_1_MinVoltage_VddGfx 8 15 GraphicsLevel_1_MinVoltage_Vddci 16 23 GraphicsLevel_1_MinVoltage_Vddc 24 31 ixDPM_TABLE_107 2 0x3f1a8 1 0 4294967295 GraphicsLevel_1_SclkFrequency 0 31 ixDPM_TABLE_108 2 0x3f1ac 3 0 4294967295 GraphicsLevel_1_ActivityLevel 0 15 GraphicsLevel_1_DeepSleepDivId 16 23 GraphicsLevel_1_pcieDpmLevel 24 31 ixDPM_TABLE_109 2 0x3f1b0 1 0 4294967295 GraphicsLevel_1_CgSpllFuncCntl3 0 31 ixDPM_TABLE_110 2 0x3f1b4 1 0 4294967295 GraphicsLevel_1_CgSpllFuncCntl4 0 31 ixDPM_TABLE_111 2 0x3f1b8 1 0 4294967295 GraphicsLevel_1_SpllSpreadSpectrum 0 31 ixDPM_TABLE_112 2 0x3f1bc 1 0 4294967295 GraphicsLevel_1_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_113 2 0x3f1c0 1 0 4294967295 GraphicsLevel_1_CcPwrDynRm 0 31 ixDPM_TABLE_114 2 0x3f1c4 1 0 4294967295 GraphicsLevel_1_CcPwrDynRm1 0 31 ixDPM_TABLE_115 2 0x3f1c8 4 0 4294967295 GraphicsLevel_1_EnabledForThrottle 0 7 GraphicsLevel_1_EnabledForActivity 8 15 GraphicsLevel_1_DisplayWatermark 16 23 GraphicsLevel_1_SclkDid 24 31 ixDPM_TABLE_116 2 0x3f1cc 4 0 4294967295 GraphicsLevel_1_PowerThrottle 0 7 GraphicsLevel_1_VoltageDownHyst 8 15 GraphicsLevel_1_DownHyst 16 23 GraphicsLevel_1_UpHyst 24 31 ixDPM_TABLE_117 2 0x3f1d0 4 0 4294967295 GraphicsLevel_2_MinVoltage_Phases 0 7 GraphicsLevel_2_MinVoltage_VddGfx 8 15 GraphicsLevel_2_MinVoltage_Vddci 16 23 GraphicsLevel_2_MinVoltage_Vddc 24 31 ixDPM_TABLE_118 2 0x3f1d4 1 0 4294967295 GraphicsLevel_2_SclkFrequency 0 31 ixDPM_TABLE_119 2 0x3f1d8 3 0 4294967295 GraphicsLevel_2_ActivityLevel 0 15 GraphicsLevel_2_DeepSleepDivId 16 23 GraphicsLevel_2_pcieDpmLevel 24 31 ixDPM_TABLE_120 2 0x3f1dc 1 0 4294967295 GraphicsLevel_2_CgSpllFuncCntl3 0 31 ixDPM_TABLE_121 2 0x3f1e0 1 0 4294967295 GraphicsLevel_2_CgSpllFuncCntl4 0 31 ixDPM_TABLE_122 2 0x3f1e4 1 0 4294967295 GraphicsLevel_2_SpllSpreadSpectrum 0 31 ixDPM_TABLE_123 2 0x3f1e8 1 0 4294967295 GraphicsLevel_2_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_124 2 0x3f1ec 1 0 4294967295 GraphicsLevel_2_CcPwrDynRm 0 31 ixDPM_TABLE_125 2 0x3f1f0 1 0 4294967295 GraphicsLevel_2_CcPwrDynRm1 0 31 ixDPM_TABLE_126 2 0x3f1f4 4 0 4294967295 GraphicsLevel_2_EnabledForThrottle 0 7 GraphicsLevel_2_EnabledForActivity 8 15 GraphicsLevel_2_DisplayWatermark 16 23 GraphicsLevel_2_SclkDid 24 31 ixDPM_TABLE_127 2 0x3f1f8 4 0 4294967295 GraphicsLevel_2_PowerThrottle 0 7 GraphicsLevel_2_VoltageDownHyst 8 15 GraphicsLevel_2_DownHyst 16 23 GraphicsLevel_2_UpHyst 24 31 ixDPM_TABLE_128 2 0x3f1fc 4 0 4294967295 GraphicsLevel_3_MinVoltage_Phases 0 7 GraphicsLevel_3_MinVoltage_VddGfx 8 15 GraphicsLevel_3_MinVoltage_Vddci 16 23 GraphicsLevel_3_MinVoltage_Vddc 24 31 ixDPM_TABLE_129 2 0x3f200 1 0 4294967295 GraphicsLevel_3_SclkFrequency 0 31 ixDPM_TABLE_130 2 0x3f204 3 0 4294967295 GraphicsLevel_3_ActivityLevel 0 15 GraphicsLevel_3_DeepSleepDivId 16 23 GraphicsLevel_3_pcieDpmLevel 24 31 ixDPM_TABLE_131 2 0x3f208 1 0 4294967295 GraphicsLevel_3_CgSpllFuncCntl3 0 31 ixDPM_TABLE_132 2 0x3f20c 1 0 4294967295 GraphicsLevel_3_CgSpllFuncCntl4 0 31 ixDPM_TABLE_133 2 0x3f210 1 0 4294967295 GraphicsLevel_3_SpllSpreadSpectrum 0 31 ixDPM_TABLE_134 2 0x3f214 1 0 4294967295 GraphicsLevel_3_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_135 2 0x3f218 1 0 4294967295 GraphicsLevel_3_CcPwrDynRm 0 31 ixDPM_TABLE_136 2 0x3f21c 1 0 4294967295 GraphicsLevel_3_CcPwrDynRm1 0 31 ixDPM_TABLE_137 2 0x3f220 4 0 4294967295 GraphicsLevel_3_EnabledForThrottle 0 7 GraphicsLevel_3_EnabledForActivity 8 15 GraphicsLevel_3_DisplayWatermark 16 23 GraphicsLevel_3_SclkDid 24 31 ixDPM_TABLE_138 2 0x3f224 4 0 4294967295 GraphicsLevel_3_PowerThrottle 0 7 GraphicsLevel_3_VoltageDownHyst 8 15 GraphicsLevel_3_DownHyst 16 23 GraphicsLevel_3_UpHyst 24 31 ixDPM_TABLE_139 2 0x3f228 4 0 4294967295 GraphicsLevel_4_MinVoltage_Phases 0 7 GraphicsLevel_4_MinVoltage_VddGfx 8 15 GraphicsLevel_4_MinVoltage_Vddci 16 23 GraphicsLevel_4_MinVoltage_Vddc 24 31 ixDPM_TABLE_140 2 0x3f22c 1 0 4294967295 GraphicsLevel_4_SclkFrequency 0 31 ixDPM_TABLE_141 2 0x3f230 3 0 4294967295 GraphicsLevel_4_ActivityLevel 0 15 GraphicsLevel_4_DeepSleepDivId 16 23 GraphicsLevel_4_pcieDpmLevel 24 31 ixDPM_TABLE_142 2 0x3f234 1 0 4294967295 GraphicsLevel_4_CgSpllFuncCntl3 0 31 ixDPM_TABLE_143 2 0x3f238 1 0 4294967295 GraphicsLevel_4_CgSpllFuncCntl4 0 31 ixDPM_TABLE_144 2 0x3f23c 1 0 4294967295 GraphicsLevel_4_SpllSpreadSpectrum 0 31 ixDPM_TABLE_145 2 0x3f240 1 0 4294967295 GraphicsLevel_4_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_146 2 0x3f244 1 0 4294967295 GraphicsLevel_4_CcPwrDynRm 0 31 ixDPM_TABLE_147 2 0x3f248 1 0 4294967295 GraphicsLevel_4_CcPwrDynRm1 0 31 ixDPM_TABLE_148 2 0x3f24c 4 0 4294967295 GraphicsLevel_4_EnabledForThrottle 0 7 GraphicsLevel_4_EnabledForActivity 8 15 GraphicsLevel_4_DisplayWatermark 16 23 GraphicsLevel_4_SclkDid 24 31 ixDPM_TABLE_149 2 0x3f250 4 0 4294967295 GraphicsLevel_4_PowerThrottle 0 7 GraphicsLevel_4_VoltageDownHyst 8 15 GraphicsLevel_4_DownHyst 16 23 GraphicsLevel_4_UpHyst 24 31 ixDPM_TABLE_150 2 0x3f254 4 0 4294967295 GraphicsLevel_5_MinVoltage_Phases 0 7 GraphicsLevel_5_MinVoltage_VddGfx 8 15 GraphicsLevel_5_MinVoltage_Vddci 16 23 GraphicsLevel_5_MinVoltage_Vddc 24 31 ixDPM_TABLE_151 2 0x3f258 1 0 4294967295 GraphicsLevel_5_SclkFrequency 0 31 ixDPM_TABLE_152 2 0x3f25c 3 0 4294967295 GraphicsLevel_5_ActivityLevel 0 15 GraphicsLevel_5_DeepSleepDivId 16 23 GraphicsLevel_5_pcieDpmLevel 24 31 ixDPM_TABLE_153 2 0x3f260 1 0 4294967295 GraphicsLevel_5_CgSpllFuncCntl3 0 31 ixDPM_TABLE_154 2 0x3f264 1 0 4294967295 GraphicsLevel_5_CgSpllFuncCntl4 0 31 ixDPM_TABLE_155 2 0x3f268 1 0 4294967295 GraphicsLevel_5_SpllSpreadSpectrum 0 31 ixDPM_TABLE_156 2 0x3f26c 1 0 4294967295 GraphicsLevel_5_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_157 2 0x3f270 1 0 4294967295 GraphicsLevel_5_CcPwrDynRm 0 31 ixDPM_TABLE_158 2 0x3f274 1 0 4294967295 GraphicsLevel_5_CcPwrDynRm1 0 31 ixDPM_TABLE_159 2 0x3f278 4 0 4294967295 GraphicsLevel_5_EnabledForThrottle 0 7 GraphicsLevel_5_EnabledForActivity 8 15 GraphicsLevel_5_DisplayWatermark 16 23 GraphicsLevel_5_SclkDid 24 31 ixDPM_TABLE_160 2 0x3f27c 4 0 4294967295 GraphicsLevel_5_PowerThrottle 0 7 GraphicsLevel_5_VoltageDownHyst 8 15 GraphicsLevel_5_DownHyst 16 23 GraphicsLevel_5_UpHyst 24 31 ixDPM_TABLE_161 2 0x3f280 4 0 4294967295 GraphicsLevel_6_MinVoltage_Phases 0 7 GraphicsLevel_6_MinVoltage_VddGfx 8 15 GraphicsLevel_6_MinVoltage_Vddci 16 23 GraphicsLevel_6_MinVoltage_Vddc 24 31 ixDPM_TABLE_162 2 0x3f284 1 0 4294967295 GraphicsLevel_6_SclkFrequency 0 31 ixDPM_TABLE_163 2 0x3f288 3 0 4294967295 GraphicsLevel_6_ActivityLevel 0 15 GraphicsLevel_6_DeepSleepDivId 16 23 GraphicsLevel_6_pcieDpmLevel 24 31 ixDPM_TABLE_164 2 0x3f28c 1 0 4294967295 GraphicsLevel_6_CgSpllFuncCntl3 0 31 ixDPM_TABLE_165 2 0x3f290 1 0 4294967295 GraphicsLevel_6_CgSpllFuncCntl4 0 31 ixDPM_TABLE_166 2 0x3f294 1 0 4294967295 GraphicsLevel_6_SpllSpreadSpectrum 0 31 ixDPM_TABLE_167 2 0x3f298 1 0 4294967295 GraphicsLevel_6_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_168 2 0x3f29c 1 0 4294967295 GraphicsLevel_6_CcPwrDynRm 0 31 ixDPM_TABLE_169 2 0x3f2a0 1 0 4294967295 GraphicsLevel_6_CcPwrDynRm1 0 31 ixDPM_TABLE_170 2 0x3f2a4 4 0 4294967295 GraphicsLevel_6_EnabledForThrottle 0 7 GraphicsLevel_6_EnabledForActivity 8 15 GraphicsLevel_6_DisplayWatermark 16 23 GraphicsLevel_6_SclkDid 24 31 ixDPM_TABLE_171 2 0x3f2a8 4 0 4294967295 GraphicsLevel_6_PowerThrottle 0 7 GraphicsLevel_6_VoltageDownHyst 8 15 GraphicsLevel_6_DownHyst 16 23 GraphicsLevel_6_UpHyst 24 31 ixDPM_TABLE_172 2 0x3f2ac 4 0 4294967295 GraphicsLevel_7_MinVoltage_Phases 0 7 GraphicsLevel_7_MinVoltage_VddGfx 8 15 GraphicsLevel_7_MinVoltage_Vddci 16 23 GraphicsLevel_7_MinVoltage_Vddc 24 31 ixDPM_TABLE_173 2 0x3f2b0 1 0 4294967295 GraphicsLevel_7_SclkFrequency 0 31 ixDPM_TABLE_174 2 0x3f2b4 3 0 4294967295 GraphicsLevel_7_ActivityLevel 0 15 GraphicsLevel_7_DeepSleepDivId 16 23 GraphicsLevel_7_pcieDpmLevel 24 31 ixDPM_TABLE_175 2 0x3f2b8 1 0 4294967295 GraphicsLevel_7_CgSpllFuncCntl3 0 31 ixDPM_TABLE_176 2 0x3f2bc 1 0 4294967295 GraphicsLevel_7_CgSpllFuncCntl4 0 31 ixDPM_TABLE_177 2 0x3f2c0 1 0 4294967295 GraphicsLevel_7_SpllSpreadSpectrum 0 31 ixDPM_TABLE_178 2 0x3f2c4 1 0 4294967295 GraphicsLevel_7_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_179 2 0x3f2c8 1 0 4294967295 GraphicsLevel_7_CcPwrDynRm 0 31 ixDPM_TABLE_180 2 0x3f2cc 1 0 4294967295 GraphicsLevel_7_CcPwrDynRm1 0 31 ixDPM_TABLE_181 2 0x3f2d0 4 0 4294967295 GraphicsLevel_7_EnabledForThrottle 0 7 GraphicsLevel_7_EnabledForActivity 8 15 GraphicsLevel_7_DisplayWatermark 16 23 GraphicsLevel_7_SclkDid 24 31 ixDPM_TABLE_182 2 0x3f2d4 4 0 4294967295 GraphicsLevel_7_PowerThrottle 0 7 GraphicsLevel_7_VoltageDownHyst 8 15 GraphicsLevel_7_DownHyst 16 23 GraphicsLevel_7_UpHyst 24 31 ixDPM_TABLE_183 2 0x3f2d8 4 0 4294967295 MemoryACPILevel_MinVoltage_Phases 0 7 MemoryACPILevel_MinVoltage_VddGfx 8 15 MemoryACPILevel_MinVoltage_Vddci 16 23 MemoryACPILevel_MinVoltage_Vddc 24 31 ixDPM_TABLE_184 2 0x3f2dc 1 0 4294967295 MemoryACPILevel_MinMvdd 0 31 ixDPM_TABLE_185 2 0x3f2e0 1 0 4294967295 MemoryACPILevel_MclkFrequency 0 31 ixDPM_TABLE_186 2 0x3f2e4 4 0 4294967295 MemoryACPILevel_StutterEnable 0 7 MemoryACPILevel_RttEnable 8 15 MemoryACPILevel_EdcWriteEnable 16 23 MemoryACPILevel_EdcReadEnable 24 31 ixDPM_TABLE_187 2 0x3f2e8 4 0 4294967295 MemoryACPILevel_EnabledForActivity 0 7 MemoryACPILevel_EnabledForThrottle 8 15 MemoryACPILevel_StrobeRatio 16 23 MemoryACPILevel_StrobeEnable 24 31 ixDPM_TABLE_188 2 0x3f2ec 4 0 4294967295 MemoryACPILevel_padding 0 7 MemoryACPILevel_VoltageDownHyst 8 15 MemoryACPILevel_DownHyst 16 23 MemoryACPILevel_UpHyst 24 31 ixDPM_TABLE_189 2 0x3f2f0 3 0 4294967295 MemoryACPILevel_padding1 0 7 MemoryACPILevel_DisplayWatermark 8 15 MemoryACPILevel_ActivityLevel 16 31 ixDPM_TABLE_190 2 0x3f2f4 1 0 4294967295 MemoryACPILevel_MpllFuncCntl 0 31 ixDPM_TABLE_191 2 0x3f2f8 1 0 4294967295 MemoryACPILevel_MpllFuncCntl_1 0 31 ixDPM_TABLE_192 2 0x3f2fc 1 0 4294967295 MemoryACPILevel_MpllFuncCntl_2 0 31 ixDPM_TABLE_193 2 0x3f300 1 0 4294967295 MemoryACPILevel_MpllAdFuncCntl 0 31 ixDPM_TABLE_194 2 0x3f304 1 0 4294967295 MemoryACPILevel_MpllDqFuncCntl 0 31 ixDPM_TABLE_195 2 0x3f308 1 0 4294967295 MemoryACPILevel_MclkPwrmgtCntl 0 31 ixDPM_TABLE_196 2 0x3f30c 1 0 4294967295 MemoryACPILevel_DllCntl 0 31 ixDPM_TABLE_197 2 0x3f310 1 0 4294967295 MemoryACPILevel_MpllSs1 0 31 ixDPM_TABLE_198 2 0x3f314 1 0 4294967295 MemoryACPILevel_MpllSs2 0 31 ixDPM_TABLE_199 2 0x3f318 4 0 4294967295 MemoryLevel_0_MinVoltage_Phases 0 7 MemoryLevel_0_MinVoltage_VddGfx 8 15 MemoryLevel_0_MinVoltage_Vddci 16 23 MemoryLevel_0_MinVoltage_Vddc 24 31 ixDPM_TABLE_200 2 0x3f31c 1 0 4294967295 MemoryLevel_0_MinMvdd 0 31 ixDPM_TABLE_201 2 0x3f320 1 0 4294967295 MemoryLevel_0_MclkFrequency 0 31 ixDPM_TABLE_202 2 0x3f324 4 0 4294967295 MemoryLevel_0_StutterEnable 0 7 MemoryLevel_0_RttEnable 8 15 MemoryLevel_0_EdcWriteEnable 16 23 MemoryLevel_0_EdcReadEnable 24 31 ixDPM_TABLE_203 2 0x3f328 4 0 4294967295 MemoryLevel_0_EnabledForActivity 0 7 MemoryLevel_0_EnabledForThrottle 8 15 MemoryLevel_0_StrobeRatio 16 23 MemoryLevel_0_StrobeEnable 24 31 ixDPM_TABLE_204 2 0x3f32c 4 0 4294967295 MemoryLevel_0_padding 0 7 MemoryLevel_0_VoltageDownHyst 8 15 MemoryLevel_0_DownHyst 16 23 MemoryLevel_0_UpHyst 24 31 ixDPM_TABLE_205 2 0x3f330 3 0 4294967295 MemoryLevel_0_padding1 0 7 MemoryLevel_0_DisplayWatermark 8 15 MemoryLevel_0_ActivityLevel 16 31 ixDPM_TABLE_206 2 0x3f334 1 0 4294967295 MemoryLevel_0_MpllFuncCntl 0 31 ixDPM_TABLE_207 2 0x3f338 1 0 4294967295 MemoryLevel_0_MpllFuncCntl_1 0 31 ixDPM_TABLE_208 2 0x3f33c 1 0 4294967295 MemoryLevel_0_MpllFuncCntl_2 0 31 ixDPM_TABLE_209 2 0x3f340 1 0 4294967295 MemoryLevel_0_MpllAdFuncCntl 0 31 ixDPM_TABLE_210 2 0x3f344 1 0 4294967295 MemoryLevel_0_MpllDqFuncCntl 0 31 ixDPM_TABLE_211 2 0x3f348 1 0 4294967295 MemoryLevel_0_MclkPwrmgtCntl 0 31 ixDPM_TABLE_212 2 0x3f34c 1 0 4294967295 MemoryLevel_0_DllCntl 0 31 ixDPM_TABLE_213 2 0x3f350 1 0 4294967295 MemoryLevel_0_MpllSs1 0 31 ixDPM_TABLE_214 2 0x3f354 1 0 4294967295 MemoryLevel_0_MpllSs2 0 31 ixDPM_TABLE_215 2 0x3f358 4 0 4294967295 MemoryLevel_1_MinVoltage_Phases 0 7 MemoryLevel_1_MinVoltage_VddGfx 8 15 MemoryLevel_1_MinVoltage_Vddci 16 23 MemoryLevel_1_MinVoltage_Vddc 24 31 ixDPM_TABLE_216 2 0x3f35c 1 0 4294967295 MemoryLevel_1_MinMvdd 0 31 ixDPM_TABLE_217 2 0x3f360 1 0 4294967295 MemoryLevel_1_MclkFrequency 0 31 ixDPM_TABLE_218 2 0x3f364 4 0 4294967295 MemoryLevel_1_StutterEnable 0 7 MemoryLevel_1_RttEnable 8 15 MemoryLevel_1_EdcWriteEnable 16 23 MemoryLevel_1_EdcReadEnable 24 31 ixDPM_TABLE_219 2 0x3f368 4 0 4294967295 MemoryLevel_1_EnabledForActivity 0 7 MemoryLevel_1_EnabledForThrottle 8 15 MemoryLevel_1_StrobeRatio 16 23 MemoryLevel_1_StrobeEnable 24 31 ixDPM_TABLE_220 2 0x3f36c 4 0 4294967295 MemoryLevel_1_padding 0 7 MemoryLevel_1_VoltageDownHyst 8 15 MemoryLevel_1_DownHyst 16 23 MemoryLevel_1_UpHyst 24 31 ixDPM_TABLE_221 2 0x3f370 3 0 4294967295 MemoryLevel_1_padding1 0 7 MemoryLevel_1_DisplayWatermark 8 15 MemoryLevel_1_ActivityLevel 16 31 ixDPM_TABLE_222 2 0x3f374 1 0 4294967295 MemoryLevel_1_MpllFuncCntl 0 31 ixDPM_TABLE_223 2 0x3f378 1 0 4294967295 MemoryLevel_1_MpllFuncCntl_1 0 31 ixDPM_TABLE_224 2 0x3f37c 1 0 4294967295 MemoryLevel_1_MpllFuncCntl_2 0 31 ixDPM_TABLE_225 2 0x3f380 1 0 4294967295 MemoryLevel_1_MpllAdFuncCntl 0 31 ixDPM_TABLE_226 2 0x3f384 1 0 4294967295 MemoryLevel_1_MpllDqFuncCntl 0 31 ixDPM_TABLE_227 2 0x3f388 1 0 4294967295 MemoryLevel_1_MclkPwrmgtCntl 0 31 ixDPM_TABLE_228 2 0x3f38c 1 0 4294967295 MemoryLevel_1_DllCntl 0 31 ixDPM_TABLE_229 2 0x3f390 1 0 4294967295 MemoryLevel_1_MpllSs1 0 31 ixDPM_TABLE_230 2 0x3f394 1 0 4294967295 MemoryLevel_1_MpllSs2 0 31 ixDPM_TABLE_231 2 0x3f398 4 0 4294967295 MemoryLevel_2_MinVoltage_Phases 0 7 MemoryLevel_2_MinVoltage_VddGfx 8 15 MemoryLevel_2_MinVoltage_Vddci 16 23 MemoryLevel_2_MinVoltage_Vddc 24 31 ixDPM_TABLE_232 2 0x3f39c 1 0 4294967295 MemoryLevel_2_MinMvdd 0 31 ixDPM_TABLE_233 2 0x3f3a0 1 0 4294967295 MemoryLevel_2_MclkFrequency 0 31 ixDPM_TABLE_234 2 0x3f3a4 4 0 4294967295 MemoryLevel_2_StutterEnable 0 7 MemoryLevel_2_RttEnable 8 15 MemoryLevel_2_EdcWriteEnable 16 23 MemoryLevel_2_EdcReadEnable 24 31 ixDPM_TABLE_235 2 0x3f3a8 4 0 4294967295 MemoryLevel_2_EnabledForActivity 0 7 MemoryLevel_2_EnabledForThrottle 8 15 MemoryLevel_2_StrobeRatio 16 23 MemoryLevel_2_StrobeEnable 24 31 ixDPM_TABLE_236 2 0x3f3ac 4 0 4294967295 MemoryLevel_2_padding 0 7 MemoryLevel_2_VoltageDownHyst 8 15 MemoryLevel_2_DownHyst 16 23 MemoryLevel_2_UpHyst 24 31 ixDPM_TABLE_237 2 0x3f3b0 3 0 4294967295 MemoryLevel_2_padding1 0 7 MemoryLevel_2_DisplayWatermark 8 15 MemoryLevel_2_ActivityLevel 16 31 ixDPM_TABLE_238 2 0x3f3b4 1 0 4294967295 MemoryLevel_2_MpllFuncCntl 0 31 ixDPM_TABLE_239 2 0x3f3b8 1 0 4294967295 MemoryLevel_2_MpllFuncCntl_1 0 31 ixDPM_TABLE_240 2 0x3f3bc 1 0 4294967295 MemoryLevel_2_MpllFuncCntl_2 0 31 ixDPM_TABLE_241 2 0x3f3c0 1 0 4294967295 MemoryLevel_2_MpllAdFuncCntl 0 31 ixDPM_TABLE_242 2 0x3f3c4 1 0 4294967295 MemoryLevel_2_MpllDqFuncCntl 0 31 ixDPM_TABLE_243 2 0x3f3c8 1 0 4294967295 MemoryLevel_2_MclkPwrmgtCntl 0 31 ixDPM_TABLE_244 2 0x3f3cc 1 0 4294967295 MemoryLevel_2_DllCntl 0 31 ixDPM_TABLE_245 2 0x3f3d0 1 0 4294967295 MemoryLevel_2_MpllSs1 0 31 ixDPM_TABLE_246 2 0x3f3d4 1 0 4294967295 MemoryLevel_2_MpllSs2 0 31 ixDPM_TABLE_247 2 0x3f3d8 4 0 4294967295 MemoryLevel_3_MinVoltage_Phases 0 7 MemoryLevel_3_MinVoltage_VddGfx 8 15 MemoryLevel_3_MinVoltage_Vddci 16 23 MemoryLevel_3_MinVoltage_Vddc 24 31 ixDPM_TABLE_248 2 0x3f3dc 1 0 4294967295 MemoryLevel_3_MinMvdd 0 31 ixDPM_TABLE_249 2 0x3f3e0 1 0 4294967295 MemoryLevel_3_MclkFrequency 0 31 ixDPM_TABLE_250 2 0x3f3e4 4 0 4294967295 MemoryLevel_3_StutterEnable 0 7 MemoryLevel_3_RttEnable 8 15 MemoryLevel_3_EdcWriteEnable 16 23 MemoryLevel_3_EdcReadEnable 24 31 ixDPM_TABLE_251 2 0x3f3e8 4 0 4294967295 MemoryLevel_3_EnabledForActivity 0 7 MemoryLevel_3_EnabledForThrottle 8 15 MemoryLevel_3_StrobeRatio 16 23 MemoryLevel_3_StrobeEnable 24 31 ixDPM_TABLE_252 2 0x3f3ec 4 0 4294967295 MemoryLevel_3_padding 0 7 MemoryLevel_3_VoltageDownHyst 8 15 MemoryLevel_3_DownHyst 16 23 MemoryLevel_3_UpHyst 24 31 ixDPM_TABLE_253 2 0x3f3f0 3 0 4294967295 MemoryLevel_3_padding1 0 7 MemoryLevel_3_DisplayWatermark 8 15 MemoryLevel_3_ActivityLevel 16 31 ixDPM_TABLE_254 2 0x3f3f4 1 0 4294967295 MemoryLevel_3_MpllFuncCntl 0 31 ixDPM_TABLE_255 2 0x3f3f8 1 0 4294967295 MemoryLevel_3_MpllFuncCntl_1 0 31 ixDPM_TABLE_256 2 0x3f3fc 1 0 4294967295 MemoryLevel_3_MpllFuncCntl_2 0 31 ixDPM_TABLE_257 2 0x3f400 1 0 4294967295 MemoryLevel_3_MpllAdFuncCntl 0 31 ixDPM_TABLE_258 2 0x3f404 1 0 4294967295 MemoryLevel_3_MpllDqFuncCntl 0 31 ixDPM_TABLE_259 2 0x3f408 1 0 4294967295 MemoryLevel_3_MclkPwrmgtCntl 0 31 ixDPM_TABLE_260 2 0x3f40c 1 0 4294967295 MemoryLevel_3_DllCntl 0 31 ixDPM_TABLE_261 2 0x3f410 1 0 4294967295 MemoryLevel_3_MpllSs1 0 31 ixDPM_TABLE_262 2 0x3f414 1 0 4294967295 MemoryLevel_3_MpllSs2 0 31 ixDPM_TABLE_263 2 0x3f418 4 0 4294967295 LinkLevel_0_SPC 0 7 LinkLevel_0_EnabledForActivity 8 15 LinkLevel_0_PcieLaneCount 16 23 LinkLevel_0_PcieGenSpeed 24 31 ixDPM_TABLE_264 2 0x3f41c 1 0 4294967295 LinkLevel_0_DownThreshold 0 31 ixDPM_TABLE_265 2 0x3f420 1 0 4294967295 LinkLevel_0_UpThreshold 0 31 ixDPM_TABLE_266 2 0x3f424 1 0 4294967295 LinkLevel_0_Reserved 0 31 ixDPM_TABLE_267 2 0x3f428 4 0 4294967295 LinkLevel_1_SPC 0 7 LinkLevel_1_EnabledForActivity 8 15 LinkLevel_1_PcieLaneCount 16 23 LinkLevel_1_PcieGenSpeed 24 31 ixDPM_TABLE_268 2 0x3f42c 1 0 4294967295 LinkLevel_1_DownThreshold 0 31 ixDPM_TABLE_269 2 0x3f430 1 0 4294967295 LinkLevel_1_UpThreshold 0 31 ixDPM_TABLE_270 2 0x3f434 1 0 4294967295 LinkLevel_1_Reserved 0 31 ixDPM_TABLE_271 2 0x3f438 4 0 4294967295 LinkLevel_2_SPC 0 7 LinkLevel_2_EnabledForActivity 8 15 LinkLevel_2_PcieLaneCount 16 23 LinkLevel_2_PcieGenSpeed 24 31 ixDPM_TABLE_272 2 0x3f43c 1 0 4294967295 LinkLevel_2_DownThreshold 0 31 ixDPM_TABLE_273 2 0x3f440 1 0 4294967295 LinkLevel_2_UpThreshold 0 31 ixDPM_TABLE_274 2 0x3f444 1 0 4294967295 LinkLevel_2_Reserved 0 31 ixDPM_TABLE_275 2 0x3f448 4 0 4294967295 LinkLevel_3_SPC 0 7 LinkLevel_3_EnabledForActivity 8 15 LinkLevel_3_PcieLaneCount 16 23 LinkLevel_3_PcieGenSpeed 24 31 ixDPM_TABLE_276 2 0x3f44c 1 0 4294967295 LinkLevel_3_DownThreshold 0 31 ixDPM_TABLE_277 2 0x3f450 1 0 4294967295 LinkLevel_3_UpThreshold 0 31 ixDPM_TABLE_278 2 0x3f454 1 0 4294967295 LinkLevel_3_Reserved 0 31 ixDPM_TABLE_279 2 0x3f458 4 0 4294967295 LinkLevel_4_SPC 0 7 LinkLevel_4_EnabledForActivity 8 15 LinkLevel_4_PcieLaneCount 16 23 LinkLevel_4_PcieGenSpeed 24 31 ixDPM_TABLE_280 2 0x3f45c 1 0 4294967295 LinkLevel_4_DownThreshold 0 31 ixDPM_TABLE_281 2 0x3f460 1 0 4294967295 LinkLevel_4_UpThreshold 0 31 ixDPM_TABLE_282 2 0x3f464 1 0 4294967295 LinkLevel_4_Reserved 0 31 ixDPM_TABLE_283 2 0x3f468 4 0 4294967295 LinkLevel_5_SPC 0 7 LinkLevel_5_EnabledForActivity 8 15 LinkLevel_5_PcieLaneCount 16 23 LinkLevel_5_PcieGenSpeed 24 31 ixDPM_TABLE_284 2 0x3f46c 1 0 4294967295 LinkLevel_5_DownThreshold 0 31 ixDPM_TABLE_285 2 0x3f470 1 0 4294967295 LinkLevel_5_UpThreshold 0 31 ixDPM_TABLE_286 2 0x3f474 1 0 4294967295 LinkLevel_5_Reserved 0 31 ixDPM_TABLE_287 2 0x3f478 4 0 4294967295 LinkLevel_6_SPC 0 7 LinkLevel_6_EnabledForActivity 8 15 LinkLevel_6_PcieLaneCount 16 23 LinkLevel_6_PcieGenSpeed 24 31 ixDPM_TABLE_288 2 0x3f47c 1 0 4294967295 LinkLevel_6_DownThreshold 0 31 ixDPM_TABLE_289 2 0x3f480 1 0 4294967295 LinkLevel_6_UpThreshold 0 31 ixDPM_TABLE_290 2 0x3f484 1 0 4294967295 LinkLevel_6_Reserved 0 31 ixDPM_TABLE_291 2 0x3f488 4 0 4294967295 LinkLevel_7_SPC 0 7 LinkLevel_7_EnabledForActivity 8 15 LinkLevel_7_PcieLaneCount 16 23 LinkLevel_7_PcieGenSpeed 24 31 ixDPM_TABLE_292 2 0x3f48c 1 0 4294967295 LinkLevel_7_DownThreshold 0 31 ixDPM_TABLE_293 2 0x3f490 1 0 4294967295 LinkLevel_7_UpThreshold 0 31 ixDPM_TABLE_294 2 0x3f494 1 0 4294967295 LinkLevel_7_Reserved 0 31 ixDPM_TABLE_295 2 0x3f498 1 0 4294967295 ACPILevel_Flags 0 31 ixDPM_TABLE_296 2 0x3f49c 4 0 4294967295 ACPILevel_MinVoltage_Phases 0 7 ACPILevel_MinVoltage_VddGfx 8 15 ACPILevel_MinVoltage_Vddci 16 23 ACPILevel_MinVoltage_Vddc 24 31 ixDPM_TABLE_297 2 0x3f4a0 1 0 4294967295 ACPILevel_SclkFrequency 0 31 ixDPM_TABLE_298 2 0x3f4a4 4 0 4294967295 ACPILevel_padding 0 7 ACPILevel_DeepSleepDivId 8 15 ACPILevel_DisplayWatermark 16 23 ACPILevel_SclkDid 24 31 ixDPM_TABLE_299 2 0x3f4a8 1 0 4294967295 ACPILevel_CgSpllFuncCntl 0 31 ixDPM_TABLE_300 2 0x3f4ac 1 0 4294967295 ACPILevel_CgSpllFuncCntl2 0 31 ixDPM_TABLE_301 2 0x3f4b0 1 0 4294967295 ACPILevel_CgSpllFuncCntl3 0 31 ixDPM_TABLE_302 2 0x3f4b4 1 0 4294967295 ACPILevel_CgSpllFuncCntl4 0 31 ixDPM_TABLE_303 2 0x3f4b8 1 0 4294967295 ACPILevel_SpllSpreadSpectrum 0 31 ixDPM_TABLE_304 2 0x3f4bc 1 0 4294967295 ACPILevel_SpllSpreadSpectrum2 0 31 ixDPM_TABLE_305 2 0x3f4c0 1 0 4294967295 ACPILevel_CcPwrDynRm 0 31 ixDPM_TABLE_306 2 0x3f4c4 1 0 4294967295 ACPILevel_CcPwrDynRm1 0 31 ixDPM_TABLE_307 2 0x3f4c8 1 0 4294967295 UvdLevel_0_VclkFrequency 0 31 ixDPM_TABLE_308 2 0x3f4cc 1 0 4294967295 UvdLevel_0_DclkFrequency 0 31 ixDPM_TABLE_309 2 0x3f4d0 4 0 4294967295 UvdLevel_0_MinVoltage_Phases 0 7 UvdLevel_0_MinVoltage_VddGfx 8 15 UvdLevel_0_MinVoltage_Vddci 16 23 UvdLevel_0_MinVoltage_Vddc 24 31 ixDPM_TABLE_310 2 0x3f4d4 4 0 4294967295 UvdLevel_0_padding_1 0 7 UvdLevel_0_padding_0 8 15 UvdLevel_0_DclkDivider 16 23 UvdLevel_0_VclkDivider 24 31 ixDPM_TABLE_311 2 0x3f4d8 1 0 4294967295 UvdLevel_1_VclkFrequency 0 31 ixDPM_TABLE_312 2 0x3f4dc 1 0 4294967295 UvdLevel_1_DclkFrequency 0 31 ixDPM_TABLE_313 2 0x3f4e0 4 0 4294967295 UvdLevel_1_MinVoltage_Phases 0 7 UvdLevel_1_MinVoltage_VddGfx 8 15 UvdLevel_1_MinVoltage_Vddci 16 23 UvdLevel_1_MinVoltage_Vddc 24 31 ixDPM_TABLE_314 2 0x3f4e4 4 0 4294967295 UvdLevel_1_padding_1 0 7 UvdLevel_1_padding_0 8 15 UvdLevel_1_DclkDivider 16 23 UvdLevel_1_VclkDivider 24 31 ixDPM_TABLE_315 2 0x3f4e8 1 0 4294967295 UvdLevel_2_VclkFrequency 0 31 ixDPM_TABLE_316 2 0x3f4ec 1 0 4294967295 UvdLevel_2_DclkFrequency 0 31 ixDPM_TABLE_317 2 0x3f4f0 4 0 4294967295 UvdLevel_2_MinVoltage_Phases 0 7 UvdLevel_2_MinVoltage_VddGfx 8 15 UvdLevel_2_MinVoltage_Vddci 16 23 UvdLevel_2_MinVoltage_Vddc 24 31 ixDPM_TABLE_318 2 0x3f4f4 4 0 4294967295 UvdLevel_2_padding_1 0 7 UvdLevel_2_padding_0 8 15 UvdLevel_2_DclkDivider 16 23 UvdLevel_2_VclkDivider 24 31 ixDPM_TABLE_319 2 0x3f4f8 1 0 4294967295 UvdLevel_3_VclkFrequency 0 31 ixDPM_TABLE_320 2 0x3f4fc 1 0 4294967295 UvdLevel_3_DclkFrequency 0 31 ixDPM_TABLE_321 2 0x3f500 4 0 4294967295 UvdLevel_3_MinVoltage_Phases 0 7 UvdLevel_3_MinVoltage_VddGfx 8 15 UvdLevel_3_MinVoltage_Vddci 16 23 UvdLevel_3_MinVoltage_Vddc 24 31 ixDPM_TABLE_322 2 0x3f504 4 0 4294967295 UvdLevel_3_padding_1 0 7 UvdLevel_3_padding_0 8 15 UvdLevel_3_DclkDivider 16 23 UvdLevel_3_VclkDivider 24 31 ixDPM_TABLE_323 2 0x3f508 1 0 4294967295 UvdLevel_4_VclkFrequency 0 31 ixDPM_TABLE_324 2 0x3f50c 1 0 4294967295 UvdLevel_4_DclkFrequency 0 31 ixDPM_TABLE_325 2 0x3f510 4 0 4294967295 UvdLevel_4_MinVoltage_Phases 0 7 UvdLevel_4_MinVoltage_VddGfx 8 15 UvdLevel_4_MinVoltage_Vddci 16 23 UvdLevel_4_MinVoltage_Vddc 24 31 ixDPM_TABLE_326 2 0x3f514 4 0 4294967295 UvdLevel_4_padding_1 0 7 UvdLevel_4_padding_0 8 15 UvdLevel_4_DclkDivider 16 23 UvdLevel_4_VclkDivider 24 31 ixDPM_TABLE_327 2 0x3f518 1 0 4294967295 UvdLevel_5_VclkFrequency 0 31 ixDPM_TABLE_328 2 0x3f51c 1 0 4294967295 UvdLevel_5_DclkFrequency 0 31 ixDPM_TABLE_329 2 0x3f520 4 0 4294967295 UvdLevel_5_MinVoltage_Phases 0 7 UvdLevel_5_MinVoltage_VddGfx 8 15 UvdLevel_5_MinVoltage_Vddci 16 23 UvdLevel_5_MinVoltage_Vddc 24 31 ixDPM_TABLE_330 2 0x3f524 4 0 4294967295 UvdLevel_5_padding_1 0 7 UvdLevel_5_padding_0 8 15 UvdLevel_5_DclkDivider 16 23 UvdLevel_5_VclkDivider 24 31 ixDPM_TABLE_331 2 0x3f528 1 0 4294967295 UvdLevel_6_VclkFrequency 0 31 ixDPM_TABLE_332 2 0x3f52c 1 0 4294967295 UvdLevel_6_DclkFrequency 0 31 ixDPM_TABLE_333 2 0x3f530 4 0 4294967295 UvdLevel_6_MinVoltage_Phases 0 7 UvdLevel_6_MinVoltage_VddGfx 8 15 UvdLevel_6_MinVoltage_Vddci 16 23 UvdLevel_6_MinVoltage_Vddc 24 31 ixDPM_TABLE_334 2 0x3f534 4 0 4294967295 UvdLevel_6_padding_1 0 7 UvdLevel_6_padding_0 8 15 UvdLevel_6_DclkDivider 16 23 UvdLevel_6_VclkDivider 24 31 ixDPM_TABLE_335 2 0x3f538 1 0 4294967295 UvdLevel_7_VclkFrequency 0 31 ixDPM_TABLE_336 2 0x3f53c 1 0 4294967295 UvdLevel_7_DclkFrequency 0 31 ixDPM_TABLE_337 2 0x3f540 4 0 4294967295 UvdLevel_7_MinVoltage_Phases 0 7 UvdLevel_7_MinVoltage_VddGfx 8 15 UvdLevel_7_MinVoltage_Vddci 16 23 UvdLevel_7_MinVoltage_Vddc 24 31 ixDPM_TABLE_338 2 0x3f544 4 0 4294967295 UvdLevel_7_padding_1 0 7 UvdLevel_7_padding_0 8 15 UvdLevel_7_DclkDivider 16 23 UvdLevel_7_VclkDivider 24 31 ixDPM_TABLE_339 2 0x3f548 1 0 4294967295 VceLevel_0_Frequency 0 31 ixDPM_TABLE_340 2 0x3f54c 4 0 4294967295 VceLevel_0_MinVoltage_Phases 0 7 VceLevel_0_MinVoltage_VddGfx 8 15 VceLevel_0_MinVoltage_Vddci 16 23 VceLevel_0_MinVoltage_Vddc 24 31 ixDPM_TABLE_341 2 0x3f550 4 0 4294967295 VceLevel_0_padding_2 0 7 VceLevel_0_padding_1 8 15 VceLevel_0_padding_0 16 23 VceLevel_0_Divider 24 31 ixDPM_TABLE_342 2 0x3f554 1 0 4294967295 VceLevel_1_Frequency 0 31 ixDPM_TABLE_343 2 0x3f558 4 0 4294967295 VceLevel_1_MinVoltage_Phases 0 7 VceLevel_1_MinVoltage_VddGfx 8 15 VceLevel_1_MinVoltage_Vddci 16 23 VceLevel_1_MinVoltage_Vddc 24 31 ixDPM_TABLE_344 2 0x3f55c 4 0 4294967295 VceLevel_1_padding_2 0 7 VceLevel_1_padding_1 8 15 VceLevel_1_padding_0 16 23 VceLevel_1_Divider 24 31 ixDPM_TABLE_345 2 0x3f560 1 0 4294967295 VceLevel_2_Frequency 0 31 ixDPM_TABLE_346 2 0x3f564 4 0 4294967295 VceLevel_2_MinVoltage_Phases 0 7 VceLevel_2_MinVoltage_VddGfx 8 15 VceLevel_2_MinVoltage_Vddci 16 23 VceLevel_2_MinVoltage_Vddc 24 31 ixDPM_TABLE_347 2 0x3f568 4 0 4294967295 VceLevel_2_padding_2 0 7 VceLevel_2_padding_1 8 15 VceLevel_2_padding_0 16 23 VceLevel_2_Divider 24 31 ixDPM_TABLE_348 2 0x3f56c 1 0 4294967295 VceLevel_3_Frequency 0 31 ixDPM_TABLE_349 2 0x3f570 4 0 4294967295 VceLevel_3_MinVoltage_Phases 0 7 VceLevel_3_MinVoltage_VddGfx 8 15 VceLevel_3_MinVoltage_Vddci 16 23 VceLevel_3_MinVoltage_Vddc 24 31 ixDPM_TABLE_350 2 0x3f574 4 0 4294967295 VceLevel_3_padding_2 0 7 VceLevel_3_padding_1 8 15 VceLevel_3_padding_0 16 23 VceLevel_3_Divider 24 31 ixDPM_TABLE_351 2 0x3f578 1 0 4294967295 VceLevel_4_Frequency 0 31 ixDPM_TABLE_352 2 0x3f57c 4 0 4294967295 VceLevel_4_MinVoltage_Phases 0 7 VceLevel_4_MinVoltage_VddGfx 8 15 VceLevel_4_MinVoltage_Vddci 16 23 VceLevel_4_MinVoltage_Vddc 24 31 ixDPM_TABLE_353 2 0x3f580 4 0 4294967295 VceLevel_4_padding_2 0 7 VceLevel_4_padding_1 8 15 VceLevel_4_padding_0 16 23 VceLevel_4_Divider 24 31 ixDPM_TABLE_354 2 0x3f584 1 0 4294967295 VceLevel_5_Frequency 0 31 ixDPM_TABLE_355 2 0x3f588 4 0 4294967295 VceLevel_5_MinVoltage_Phases 0 7 VceLevel_5_MinVoltage_VddGfx 8 15 VceLevel_5_MinVoltage_Vddci 16 23 VceLevel_5_MinVoltage_Vddc 24 31 ixDPM_TABLE_356 2 0x3f58c 4 0 4294967295 VceLevel_5_padding_2 0 7 VceLevel_5_padding_1 8 15 VceLevel_5_padding_0 16 23 VceLevel_5_Divider 24 31 ixDPM_TABLE_357 2 0x3f590 1 0 4294967295 VceLevel_6_Frequency 0 31 ixDPM_TABLE_358 2 0x3f594 4 0 4294967295 VceLevel_6_MinVoltage_Phases 0 7 VceLevel_6_MinVoltage_VddGfx 8 15 VceLevel_6_MinVoltage_Vddci 16 23 VceLevel_6_MinVoltage_Vddc 24 31 ixDPM_TABLE_359 2 0x3f598 4 0 4294967295 VceLevel_6_padding_2 0 7 VceLevel_6_padding_1 8 15 VceLevel_6_padding_0 16 23 VceLevel_6_Divider 24 31 ixDPM_TABLE_360 2 0x3f59c 1 0 4294967295 VceLevel_7_Frequency 0 31 ixDPM_TABLE_361 2 0x3f5a0 4 0 4294967295 VceLevel_7_MinVoltage_Phases 0 7 VceLevel_7_MinVoltage_VddGfx 8 15 VceLevel_7_MinVoltage_Vddci 16 23 VceLevel_7_MinVoltage_Vddc 24 31 ixDPM_TABLE_362 2 0x3f5a4 4 0 4294967295 VceLevel_7_padding_2 0 7 VceLevel_7_padding_1 8 15 VceLevel_7_padding_0 16 23 VceLevel_7_Divider 24 31 ixDPM_TABLE_363 2 0x3f5a8 1 0 4294967295 AcpLevel_0_Frequency 0 31 ixDPM_TABLE_364 2 0x3f5ac 4 0 4294967295 AcpLevel_0_MinVoltage_Phases 0 7 AcpLevel_0_MinVoltage_VddGfx 8 15 AcpLevel_0_MinVoltage_Vddci 16 23 AcpLevel_0_MinVoltage_Vddc 24 31 ixDPM_TABLE_365 2 0x3f5b0 4 0 4294967295 AcpLevel_0_padding_2 0 7 AcpLevel_0_padding_1 8 15 AcpLevel_0_padding_0 16 23 AcpLevel_0_Divider 24 31 ixDPM_TABLE_366 2 0x3f5b4 1 0 4294967295 AcpLevel_1_Frequency 0 31 ixDPM_TABLE_367 2 0x3f5b8 4 0 4294967295 AcpLevel_1_MinVoltage_Phases 0 7 AcpLevel_1_MinVoltage_VddGfx 8 15 AcpLevel_1_MinVoltage_Vddci 16 23 AcpLevel_1_MinVoltage_Vddc 24 31 ixDPM_TABLE_368 2 0x3f5bc 4 0 4294967295 AcpLevel_1_padding_2 0 7 AcpLevel_1_padding_1 8 15 AcpLevel_1_padding_0 16 23 AcpLevel_1_Divider 24 31 ixDPM_TABLE_369 2 0x3f5c0 1 0 4294967295 AcpLevel_2_Frequency 0 31 ixDPM_TABLE_370 2 0x3f5c4 4 0 4294967295 AcpLevel_2_MinVoltage_Phases 0 7 AcpLevel_2_MinVoltage_VddGfx 8 15 AcpLevel_2_MinVoltage_Vddci 16 23 AcpLevel_2_MinVoltage_Vddc 24 31 ixDPM_TABLE_371 2 0x3f5c8 4 0 4294967295 AcpLevel_2_padding_2 0 7 AcpLevel_2_padding_1 8 15 AcpLevel_2_padding_0 16 23 AcpLevel_2_Divider 24 31 ixDPM_TABLE_372 2 0x3f5cc 1 0 4294967295 AcpLevel_3_Frequency 0 31 ixDPM_TABLE_373 2 0x3f5d0 4 0 4294967295 AcpLevel_3_MinVoltage_Phases 0 7 AcpLevel_3_MinVoltage_VddGfx 8 15 AcpLevel_3_MinVoltage_Vddci 16 23 AcpLevel_3_MinVoltage_Vddc 24 31 ixDPM_TABLE_374 2 0x3f5d4 4 0 4294967295 AcpLevel_3_padding_2 0 7 AcpLevel_3_padding_1 8 15 AcpLevel_3_padding_0 16 23 AcpLevel_3_Divider 24 31 ixDPM_TABLE_375 2 0x3f5d8 1 0 4294967295 AcpLevel_4_Frequency 0 31 ixDPM_TABLE_376 2 0x3f5dc 4 0 4294967295 AcpLevel_4_MinVoltage_Phases 0 7 AcpLevel_4_MinVoltage_VddGfx 8 15 AcpLevel_4_MinVoltage_Vddci 16 23 AcpLevel_4_MinVoltage_Vddc 24 31 ixDPM_TABLE_377 2 0x3f5e0 4 0 4294967295 AcpLevel_4_padding_2 0 7 AcpLevel_4_padding_1 8 15 AcpLevel_4_padding_0 16 23 AcpLevel_4_Divider 24 31 ixDPM_TABLE_378 2 0x3f5e4 1 0 4294967295 AcpLevel_5_Frequency 0 31 ixDPM_TABLE_379 2 0x3f5e8 4 0 4294967295 AcpLevel_5_MinVoltage_Phases 0 7 AcpLevel_5_MinVoltage_VddGfx 8 15 AcpLevel_5_MinVoltage_Vddci 16 23 AcpLevel_5_MinVoltage_Vddc 24 31 ixDPM_TABLE_380 2 0x3f5ec 4 0 4294967295 AcpLevel_5_padding_2 0 7 AcpLevel_5_padding_1 8 15 AcpLevel_5_padding_0 16 23 AcpLevel_5_Divider 24 31 ixDPM_TABLE_381 2 0x3f5f0 1 0 4294967295 AcpLevel_6_Frequency 0 31 ixDPM_TABLE_382 2 0x3f5f4 4 0 4294967295 AcpLevel_6_MinVoltage_Phases 0 7 AcpLevel_6_MinVoltage_VddGfx 8 15 AcpLevel_6_MinVoltage_Vddci 16 23 AcpLevel_6_MinVoltage_Vddc 24 31 ixDPM_TABLE_383 2 0x3f5f8 4 0 4294967295 AcpLevel_6_padding_2 0 7 AcpLevel_6_padding_1 8 15 AcpLevel_6_padding_0 16 23 AcpLevel_6_Divider 24 31 ixDPM_TABLE_384 2 0x3f5fc 1 0 4294967295 AcpLevel_7_Frequency 0 31 ixDPM_TABLE_385 2 0x3f600 4 0 4294967295 AcpLevel_7_MinVoltage_Phases 0 7 AcpLevel_7_MinVoltage_VddGfx 8 15 AcpLevel_7_MinVoltage_Vddci 16 23 AcpLevel_7_MinVoltage_Vddc 24 31 ixDPM_TABLE_386 2 0x3f604 4 0 4294967295 AcpLevel_7_padding_2 0 7 AcpLevel_7_padding_1 8 15 AcpLevel_7_padding_0 16 23 AcpLevel_7_Divider 24 31 ixDPM_TABLE_387 2 0x3f608 1 0 4294967295 SamuLevel_0_Frequency 0 31 ixDPM_TABLE_388 2 0x3f60c 4 0 4294967295 SamuLevel_0_MinVoltage_Phases 0 7 SamuLevel_0_MinVoltage_VddGfx 8 15 SamuLevel_0_MinVoltage_Vddci 16 23 SamuLevel_0_MinVoltage_Vddc 24 31 ixDPM_TABLE_389 2 0x3f610 4 0 4294967295 SamuLevel_0_padding_2 0 7 SamuLevel_0_padding_1 8 15 SamuLevel_0_padding_0 16 23 SamuLevel_0_Divider 24 31 ixDPM_TABLE_390 2 0x3f614 1 0 4294967295 SamuLevel_1_Frequency 0 31 ixDPM_TABLE_391 2 0x3f618 4 0 4294967295 SamuLevel_1_MinVoltage_Phases 0 7 SamuLevel_1_MinVoltage_VddGfx 8 15 SamuLevel_1_MinVoltage_Vddci 16 23 SamuLevel_1_MinVoltage_Vddc 24 31 ixDPM_TABLE_392 2 0x3f61c 4 0 4294967295 SamuLevel_1_padding_2 0 7 SamuLevel_1_padding_1 8 15 SamuLevel_1_padding_0 16 23 SamuLevel_1_Divider 24 31 ixDPM_TABLE_393 2 0x3f620 1 0 4294967295 SamuLevel_2_Frequency 0 31 ixDPM_TABLE_394 2 0x3f624 4 0 4294967295 SamuLevel_2_MinVoltage_Phases 0 7 SamuLevel_2_MinVoltage_VddGfx 8 15 SamuLevel_2_MinVoltage_Vddci 16 23 SamuLevel_2_MinVoltage_Vddc 24 31 ixDPM_TABLE_395 2 0x3f628 4 0 4294967295 SamuLevel_2_padding_2 0 7 SamuLevel_2_padding_1 8 15 SamuLevel_2_padding_0 16 23 SamuLevel_2_Divider 24 31 ixDPM_TABLE_396 2 0x3f62c 1 0 4294967295 SamuLevel_3_Frequency 0 31 ixDPM_TABLE_397 2 0x3f630 4 0 4294967295 SamuLevel_3_MinVoltage_Phases 0 7 SamuLevel_3_MinVoltage_VddGfx 8 15 SamuLevel_3_MinVoltage_Vddci 16 23 SamuLevel_3_MinVoltage_Vddc 24 31 ixDPM_TABLE_398 2 0x3f634 4 0 4294967295 SamuLevel_3_padding_2 0 7 SamuLevel_3_padding_1 8 15 SamuLevel_3_padding_0 16 23 SamuLevel_3_Divider 24 31 ixDPM_TABLE_399 2 0x3f638 1 0 4294967295 SamuLevel_4_Frequency 0 31 ixDPM_TABLE_400 2 0x3f63c 4 0 4294967295 SamuLevel_4_MinVoltage_Phases 0 7 SamuLevel_4_MinVoltage_VddGfx 8 15 SamuLevel_4_MinVoltage_Vddci 16 23 SamuLevel_4_MinVoltage_Vddc 24 31 ixDPM_TABLE_401 2 0x3f640 4 0 4294967295 SamuLevel_4_padding_2 0 7 SamuLevel_4_padding_1 8 15 SamuLevel_4_padding_0 16 23 SamuLevel_4_Divider 24 31 ixDPM_TABLE_402 2 0x3f644 1 0 4294967295 SamuLevel_5_Frequency 0 31 ixDPM_TABLE_403 2 0x3f648 4 0 4294967295 SamuLevel_5_MinVoltage_Phases 0 7 SamuLevel_5_MinVoltage_VddGfx 8 15 SamuLevel_5_MinVoltage_Vddci 16 23 SamuLevel_5_MinVoltage_Vddc 24 31 ixDPM_TABLE_404 2 0x3f64c 4 0 4294967295 SamuLevel_5_padding_2 0 7 SamuLevel_5_padding_1 8 15 SamuLevel_5_padding_0 16 23 SamuLevel_5_Divider 24 31 ixDPM_TABLE_405 2 0x3f650 1 0 4294967295 SamuLevel_6_Frequency 0 31 ixDPM_TABLE_406 2 0x3f654 4 0 4294967295 SamuLevel_6_MinVoltage_Phases 0 7 SamuLevel_6_MinVoltage_VddGfx 8 15 SamuLevel_6_MinVoltage_Vddci 16 23 SamuLevel_6_MinVoltage_Vddc 24 31 ixDPM_TABLE_407 2 0x3f658 4 0 4294967295 SamuLevel_6_padding_2 0 7 SamuLevel_6_padding_1 8 15 SamuLevel_6_padding_0 16 23 SamuLevel_6_Divider 24 31 ixDPM_TABLE_408 2 0x3f65c 1 0 4294967295 SamuLevel_7_Frequency 0 31 ixDPM_TABLE_409 2 0x3f660 4 0 4294967295 SamuLevel_7_MinVoltage_Phases 0 7 SamuLevel_7_MinVoltage_VddGfx 8 15 SamuLevel_7_MinVoltage_Vddci 16 23 SamuLevel_7_MinVoltage_Vddc 24 31 ixDPM_TABLE_410 2 0x3f664 4 0 4294967295 SamuLevel_7_padding_2 0 7 SamuLevel_7_padding_1 8 15 SamuLevel_7_padding_0 16 23 SamuLevel_7_Divider 24 31 ixDPM_TABLE_411 2 0x3f668 1 0 4294967295 Ulv_CcPwrDynRm 0 31 ixDPM_TABLE_412 2 0x3f66c 1 0 4294967295 Ulv_CcPwrDynRm1 0 31 ixDPM_TABLE_413 2 0x3f670 3 0 4294967295 Ulv_VddcPhase 0 7 Ulv_VddcOffsetVid 8 15 Ulv_VddcOffset 16 31 ixDPM_TABLE_414 2 0x3f674 1 0 4294967295 Ulv_Reserved 0 31 ixDPM_TABLE_415 2 0x3f678 1 0 4294967295 SclkStepSize 0 31 ixDPM_TABLE_416 2 0x3f67c 1 0 4294967295 Smio_0 0 31 ixDPM_TABLE_417 2 0x3f680 1 0 4294967295 Smio_1 0 31 ixDPM_TABLE_418 2 0x3f684 1 0 4294967295 Smio_2 0 31 ixDPM_TABLE_419 2 0x3f688 1 0 4294967295 Smio_3 0 31 ixDPM_TABLE_420 2 0x3f68c 1 0 4294967295 Smio_4 0 31 ixDPM_TABLE_421 2 0x3f690 1 0 4294967295 Smio_5 0 31 ixDPM_TABLE_422 2 0x3f694 1 0 4294967295 Smio_6 0 31 ixDPM_TABLE_423 2 0x3f698 1 0 4294967295 Smio_7 0 31 ixDPM_TABLE_424 2 0x3f69c 1 0 4294967295 Smio_8 0 31 ixDPM_TABLE_425 2 0x3f6a0 1 0 4294967295 Smio_9 0 31 ixDPM_TABLE_426 2 0x3f6a4 1 0 4294967295 Smio_10 0 31 ixDPM_TABLE_427 2 0x3f6a8 1 0 4294967295 Smio_11 0 31 ixDPM_TABLE_428 2 0x3f6ac 1 0 4294967295 Smio_12 0 31 ixDPM_TABLE_429 2 0x3f6b0 1 0 4294967295 Smio_13 0 31 ixDPM_TABLE_430 2 0x3f6b4 1 0 4294967295 Smio_14 0 31 ixDPM_TABLE_431 2 0x3f6b8 1 0 4294967295 Smio_15 0 31 ixDPM_TABLE_432 2 0x3f6bc 1 0 4294967295 Smio_16 0 31 ixDPM_TABLE_433 2 0x3f6c0 1 0 4294967295 Smio_17 0 31 ixDPM_TABLE_434 2 0x3f6c4 1 0 4294967295 Smio_18 0 31 ixDPM_TABLE_435 2 0x3f6c8 1 0 4294967295 Smio_19 0 31 ixDPM_TABLE_436 2 0x3f6cc 1 0 4294967295 Smio_20 0 31 ixDPM_TABLE_437 2 0x3f6d0 1 0 4294967295 Smio_21 0 31 ixDPM_TABLE_438 2 0x3f6d4 1 0 4294967295 Smio_22 0 31 ixDPM_TABLE_439 2 0x3f6d8 1 0 4294967295 Smio_23 0 31 ixDPM_TABLE_440 2 0x3f6dc 1 0 4294967295 Smio_24 0 31 ixDPM_TABLE_441 2 0x3f6e0 1 0 4294967295 Smio_25 0 31 ixDPM_TABLE_442 2 0x3f6e4 1 0 4294967295 Smio_26 0 31 ixDPM_TABLE_443 2 0x3f6e8 1 0 4294967295 Smio_27 0 31 ixDPM_TABLE_444 2 0x3f6ec 1 0 4294967295 Smio_28 0 31 ixDPM_TABLE_445 2 0x3f6f0 1 0 4294967295 Smio_29 0 31 ixDPM_TABLE_446 2 0x3f6f4 1 0 4294967295 Smio_30 0 31 ixDPM_TABLE_447 2 0x3f6f8 1 0 4294967295 Smio_31 0 31 ixDPM_TABLE_448 2 0x3f6fc 4 0 4294967295 SamuBootLevel 0 7 AcpBootLevel 8 15 VceBootLevel 16 23 UvdBootLevel 24 31 ixDPM_TABLE_449 2 0x3f700 4 0 4294967295 GraphicsInterval 0 7 GraphicsThermThrottleEnable 8 15 GraphicsVoltageChangeEnable 16 23 GraphicsBootLevel 24 31 ixDPM_TABLE_450 2 0x3f704 3 0 4294967295 TemperatureLimitHigh 0 15 ThermalInterval 16 23 VoltageInterval 24 31 ixDPM_TABLE_451 2 0x3f708 3 0 4294967295 MemoryVoltageChangeEnable 0 7 MemoryBootLevel 8 15 TemperatureLimitLow 16 31 ixDPM_TABLE_452 2 0x3f70c 3 0 4294967295 MemoryThermThrottleEnable 0 7 MemoryInterval 8 15 BootMVdd 16 31 ixDPM_TABLE_453 2 0x3f710 2 0 4294967295 PhaseResponseTime 0 15 VoltageResponseTime 16 31 ixDPM_TABLE_454 2 0x3f714 4 0 4294967295 DTEMode 0 7 DTEInterval 8 15 PCIeGenInterval 16 23 PCIeBootLinkLevel 24 31 ixDPM_TABLE_455 2 0x3f718 4 0 4294967295 ThermGpio 0 7 AcDcGpio 8 15 VRHotGpio 16 23 SVI2Enable 24 31 ixDPM_TABLE_456 2 0x3f71c 2 0 4294967295 PPM_TemperatureLimit 0 15 PPM_PkgPwrLimit 16 31 ixDPM_TABLE_457 2 0x3f720 2 0 4294967295 TargetTdp 0 15 DefaultTdp 16 31 ixDPM_TABLE_458 2 0x3f724 2 0 4294967295 FpsLowThreshold 0 15 FpsHighThreshold 16 31 ixDPM_TABLE_459 2 0x3f728 2 0 4294967295 BAPMTI_R_0_1_0 0 15 BAPMTI_R_0_0_0 16 31 ixDPM_TABLE_460 2 0x3f72c 2 0 4294967295 BAPMTI_R_1_0_0 0 15 BAPMTI_R_0_2_0 16 31 ixDPM_TABLE_461 2 0x3f730 2 0 4294967295 BAPMTI_R_1_2_0 0 15 BAPMTI_R_1_1_0 16 31 ixDPM_TABLE_462 2 0x3f734 2 0 4294967295 BAPMTI_R_2_1_0 0 15 BAPMTI_R_2_0_0 16 31 ixDPM_TABLE_463 2 0x3f738 2 0 4294967295 BAPMTI_R_3_0_0 0 15 BAPMTI_R_2_2_0 16 31 ixDPM_TABLE_464 2 0x3f73c 2 0 4294967295 BAPMTI_R_3_2_0 0 15 BAPMTI_R_3_1_0 16 31 ixDPM_TABLE_465 2 0x3f740 2 0 4294967295 BAPMTI_R_4_1_0 0 15 BAPMTI_R_4_0_0 16 31 ixDPM_TABLE_466 2 0x3f744 2 0 4294967295 BAPMTI_RC_0_0_0 0 15 BAPMTI_R_4_2_0 16 31 ixDPM_TABLE_467 2 0x3f748 2 0 4294967295 BAPMTI_RC_0_2_0 0 15 BAPMTI_RC_0_1_0 16 31 ixDPM_TABLE_468 2 0x3f74c 2 0 4294967295 BAPMTI_RC_1_1_0 0 15 BAPMTI_RC_1_0_0 16 31 ixDPM_TABLE_469 2 0x3f750 2 0 4294967295 BAPMTI_RC_2_0_0 0 15 BAPMTI_RC_1_2_0 16 31 ixDPM_TABLE_470 2 0x3f754 2 0 4294967295 BAPMTI_RC_2_2_0 0 15 BAPMTI_RC_2_1_0 16 31 ixDPM_TABLE_471 2 0x3f758 2 0 4294967295 BAPMTI_RC_3_1_0 0 15 BAPMTI_RC_3_0_0 16 31 ixDPM_TABLE_472 2 0x3f75c 2 0 4294967295 BAPMTI_RC_4_0_0 0 15 BAPMTI_RC_3_2_0 16 31 ixDPM_TABLE_473 2 0x3f760 2 0 4294967295 BAPMTI_RC_4_2_0 0 15 BAPMTI_RC_4_1_0 16 31 ixDPM_TABLE_474 2 0x3f764 4 0 4294967295 GpuTjHyst 0 7 GpuTjMax 8 15 DTETjOffset 16 23 DTEAmbientTempBase 24 31 ixDPM_TABLE_475 2 0x3f768 4 0 4294967295 BootVoltage_Phases 0 7 BootVoltage_VddGfx 8 15 BootVoltage_Vddci 16 23 BootVoltage_Vddc 24 31 ixDPM_TABLE_476 2 0x3f76c 1 0 4294967295 BAPM_TEMP_GRADIENT 0 31 ixDPM_TABLE_477 2 0x3f770 1 0 4294967295 LowSclkInterruptThreshold 0 31 ixDPM_TABLE_478 2 0x3f774 1 0 4294967295 VddGfxReChkWait 0 31 ixDPM_TABLE_479 2 0x3f778 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_padding_1 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_padding_0 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_maxVID 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_minVID 24 31 ixDPM_TABLE_480 2 0x3f77c 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_setting_3 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_setting_2 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_setting_1 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_setting_0 24 31 ixDPM_TABLE_481 2 0x3f780 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_setting_7 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_setting_6 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_setting_5 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_0_setting_4 24 31 ixDPM_TABLE_482 2 0x3f784 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_padding_1 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_padding_0 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_maxVID 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_minVID 24 31 ixDPM_TABLE_483 2 0x3f788 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_setting_3 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_setting_2 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_setting_1 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_setting_0 24 31 ixDPM_TABLE_484 2 0x3f78c 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_setting_7 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_setting_6 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_setting_5 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_1_setting_4 24 31 ixDPM_TABLE_485 2 0x3f790 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_padding_1 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_padding_0 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_maxVID 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_minVID 24 31 ixDPM_TABLE_486 2 0x3f794 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_setting_3 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_setting_2 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_setting_1 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_setting_0 24 31 ixDPM_TABLE_487 2 0x3f798 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_setting_7 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_setting_6 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_setting_5 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_2_setting_4 24 31 ixDPM_TABLE_488 2 0x3f79c 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_padding_1 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_padding_0 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_maxVID 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_minVID 24 31 ixDPM_TABLE_489 2 0x3f7a0 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_setting_3 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_setting_2 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_setting_1 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_setting_0 24 31 ixDPM_TABLE_490 2 0x3f7a4 4 0 4294967295 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_setting_7 0 7 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_setting_6 8 15 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_setting_5 16 23 ClockStretcherDataTable_ClockStretcherDataTableEntry_3_setting_4 24 31 ixMCARB_DRAM_TIMING_TABLE_1 2 0x3f900 1 0 4294967295 entries_0_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_2 2 0x3f904 1 0 4294967295 entries_0_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_3 2 0x3f908 4 0 4294967295 entries_0_0_padding_2 0 7 entries_0_0_padding_1 8 15 entries_0_0_padding_0 16 23 entries_0_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_4 2 0x3f90c 1 0 4294967295 entries_0_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_5 2 0x3f910 1 0 4294967295 entries_0_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_6 2 0x3f914 4 0 4294967295 entries_0_1_padding_2 0 7 entries_0_1_padding_1 8 15 entries_0_1_padding_0 16 23 entries_0_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_7 2 0x3f918 1 0 4294967295 entries_0_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_8 2 0x3f91c 1 0 4294967295 entries_0_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_9 2 0x3f920 4 0 4294967295 entries_0_2_padding_2 0 7 entries_0_2_padding_1 8 15 entries_0_2_padding_0 16 23 entries_0_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_10 2 0x3f924 1 0 4294967295 entries_0_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_11 2 0x3f928 1 0 4294967295 entries_0_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_12 2 0x3f92c 4 0 4294967295 entries_0_3_padding_2 0 7 entries_0_3_padding_1 8 15 entries_0_3_padding_0 16 23 entries_0_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_13 2 0x3f930 1 0 4294967295 entries_1_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_14 2 0x3f934 1 0 4294967295 entries_1_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_15 2 0x3f938 4 0 4294967295 entries_1_0_padding_2 0 7 entries_1_0_padding_1 8 15 entries_1_0_padding_0 16 23 entries_1_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_16 2 0x3f93c 1 0 4294967295 entries_1_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_17 2 0x3f940 1 0 4294967295 entries_1_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_18 2 0x3f944 4 0 4294967295 entries_1_1_padding_2 0 7 entries_1_1_padding_1 8 15 entries_1_1_padding_0 16 23 entries_1_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_19 2 0x3f948 1 0 4294967295 entries_1_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_20 2 0x3f94c 1 0 4294967295 entries_1_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_21 2 0x3f950 4 0 4294967295 entries_1_2_padding_2 0 7 entries_1_2_padding_1 8 15 entries_1_2_padding_0 16 23 entries_1_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_22 2 0x3f954 1 0 4294967295 entries_1_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_23 2 0x3f958 1 0 4294967295 entries_1_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_24 2 0x3f95c 4 0 4294967295 entries_1_3_padding_2 0 7 entries_1_3_padding_1 8 15 entries_1_3_padding_0 16 23 entries_1_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_25 2 0x3f960 1 0 4294967295 entries_2_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_26 2 0x3f964 1 0 4294967295 entries_2_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_27 2 0x3f968 4 0 4294967295 entries_2_0_padding_2 0 7 entries_2_0_padding_1 8 15 entries_2_0_padding_0 16 23 entries_2_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_28 2 0x3f96c 1 0 4294967295 entries_2_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_29 2 0x3f970 1 0 4294967295 entries_2_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_30 2 0x3f974 4 0 4294967295 entries_2_1_padding_2 0 7 entries_2_1_padding_1 8 15 entries_2_1_padding_0 16 23 entries_2_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_31 2 0x3f978 1 0 4294967295 entries_2_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_32 2 0x3f97c 1 0 4294967295 entries_2_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_33 2 0x3f980 4 0 4294967295 entries_2_2_padding_2 0 7 entries_2_2_padding_1 8 15 entries_2_2_padding_0 16 23 entries_2_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_34 2 0x3f984 1 0 4294967295 entries_2_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_35 2 0x3f988 1 0 4294967295 entries_2_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_36 2 0x3f98c 4 0 4294967295 entries_2_3_padding_2 0 7 entries_2_3_padding_1 8 15 entries_2_3_padding_0 16 23 entries_2_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_37 2 0x3f990 1 0 4294967295 entries_3_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_38 2 0x3f994 1 0 4294967295 entries_3_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_39 2 0x3f998 4 0 4294967295 entries_3_0_padding_2 0 7 entries_3_0_padding_1 8 15 entries_3_0_padding_0 16 23 entries_3_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_40 2 0x3f99c 1 0 4294967295 entries_3_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_41 2 0x3f9a0 1 0 4294967295 entries_3_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_42 2 0x3f9a4 4 0 4294967295 entries_3_1_padding_2 0 7 entries_3_1_padding_1 8 15 entries_3_1_padding_0 16 23 entries_3_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_43 2 0x3f9a8 1 0 4294967295 entries_3_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_44 2 0x3f9ac 1 0 4294967295 entries_3_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_45 2 0x3f9b0 4 0 4294967295 entries_3_2_padding_2 0 7 entries_3_2_padding_1 8 15 entries_3_2_padding_0 16 23 entries_3_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_46 2 0x3f9b4 1 0 4294967295 entries_3_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_47 2 0x3f9b8 1 0 4294967295 entries_3_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_48 2 0x3f9bc 4 0 4294967295 entries_3_3_padding_2 0 7 entries_3_3_padding_1 8 15 entries_3_3_padding_0 16 23 entries_3_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_49 2 0x3f9c0 1 0 4294967295 entries_4_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_50 2 0x3f9c4 1 0 4294967295 entries_4_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_51 2 0x3f9c8 4 0 4294967295 entries_4_0_padding_2 0 7 entries_4_0_padding_1 8 15 entries_4_0_padding_0 16 23 entries_4_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_52 2 0x3f9cc 1 0 4294967295 entries_4_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_53 2 0x3f9d0 1 0 4294967295 entries_4_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_54 2 0x3f9d4 4 0 4294967295 entries_4_1_padding_2 0 7 entries_4_1_padding_1 8 15 entries_4_1_padding_0 16 23 entries_4_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_55 2 0x3f9d8 1 0 4294967295 entries_4_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_56 2 0x3f9dc 1 0 4294967295 entries_4_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_57 2 0x3f9e0 4 0 4294967295 entries_4_2_padding_2 0 7 entries_4_2_padding_1 8 15 entries_4_2_padding_0 16 23 entries_4_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_58 2 0x3f9e4 1 0 4294967295 entries_4_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_59 2 0x3f9e8 1 0 4294967295 entries_4_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_60 2 0x3f9ec 4 0 4294967295 entries_4_3_padding_2 0 7 entries_4_3_padding_1 8 15 entries_4_3_padding_0 16 23 entries_4_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_61 2 0x3f9f0 1 0 4294967295 entries_5_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_62 2 0x3f9f4 1 0 4294967295 entries_5_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_63 2 0x3f9f8 4 0 4294967295 entries_5_0_padding_2 0 7 entries_5_0_padding_1 8 15 entries_5_0_padding_0 16 23 entries_5_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_64 2 0x3f9fc 1 0 4294967295 entries_5_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_65 2 0x3fa00 1 0 4294967295 entries_5_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_66 2 0x3fa04 4 0 4294967295 entries_5_1_padding_2 0 7 entries_5_1_padding_1 8 15 entries_5_1_padding_0 16 23 entries_5_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_67 2 0x3fa08 1 0 4294967295 entries_5_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_68 2 0x3fa0c 1 0 4294967295 entries_5_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_69 2 0x3fa10 4 0 4294967295 entries_5_2_padding_2 0 7 entries_5_2_padding_1 8 15 entries_5_2_padding_0 16 23 entries_5_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_70 2 0x3fa14 1 0 4294967295 entries_5_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_71 2 0x3fa18 1 0 4294967295 entries_5_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_72 2 0x3fa1c 4 0 4294967295 entries_5_3_padding_2 0 7 entries_5_3_padding_1 8 15 entries_5_3_padding_0 16 23 entries_5_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_73 2 0x3fa20 1 0 4294967295 entries_6_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_74 2 0x3fa24 1 0 4294967295 entries_6_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_75 2 0x3fa28 4 0 4294967295 entries_6_0_padding_2 0 7 entries_6_0_padding_1 8 15 entries_6_0_padding_0 16 23 entries_6_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_76 2 0x3fa2c 1 0 4294967295 entries_6_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_77 2 0x3fa30 1 0 4294967295 entries_6_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_78 2 0x3fa34 4 0 4294967295 entries_6_1_padding_2 0 7 entries_6_1_padding_1 8 15 entries_6_1_padding_0 16 23 entries_6_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_79 2 0x3fa38 1 0 4294967295 entries_6_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_80 2 0x3fa3c 1 0 4294967295 entries_6_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_81 2 0x3fa40 4 0 4294967295 entries_6_2_padding_2 0 7 entries_6_2_padding_1 8 15 entries_6_2_padding_0 16 23 entries_6_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_82 2 0x3fa44 1 0 4294967295 entries_6_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_83 2 0x3fa48 1 0 4294967295 entries_6_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_84 2 0x3fa4c 4 0 4294967295 entries_6_3_padding_2 0 7 entries_6_3_padding_1 8 15 entries_6_3_padding_0 16 23 entries_6_3_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_85 2 0x3fa50 1 0 4294967295 entries_7_0_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_86 2 0x3fa54 1 0 4294967295 entries_7_0_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_87 2 0x3fa58 4 0 4294967295 entries_7_0_padding_2 0 7 entries_7_0_padding_1 8 15 entries_7_0_padding_0 16 23 entries_7_0_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_88 2 0x3fa5c 1 0 4294967295 entries_7_1_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_89 2 0x3fa60 1 0 4294967295 entries_7_1_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_90 2 0x3fa64 4 0 4294967295 entries_7_1_padding_2 0 7 entries_7_1_padding_1 8 15 entries_7_1_padding_0 16 23 entries_7_1_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_91 2 0x3fa68 1 0 4294967295 entries_7_2_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_92 2 0x3fa6c 1 0 4294967295 entries_7_2_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_93 2 0x3fa70 4 0 4294967295 entries_7_2_padding_2 0 7 entries_7_2_padding_1 8 15 entries_7_2_padding_0 16 23 entries_7_2_McArbBurstTime 24 31 ixMCARB_DRAM_TIMING_TABLE_94 2 0x3fa74 1 0 4294967295 entries_7_3_McArbDramTiming 0 31 ixMCARB_DRAM_TIMING_TABLE_95 2 0x3fa78 1 0 4294967295 entries_7_3_McArbDramTiming2 0 31 ixMCARB_DRAM_TIMING_TABLE_96 2 0x3fa7c 4 0 4294967295 entries_7_3_padding_2 0 7 entries_7_3_padding_1 8 15 entries_7_3_padding_0 16 23 entries_7_3_McArbBurstTime 24 31 ixMC_REGISTERS_TABLE_1 2 0x3fa80 4 0 4294967295 reserved_2 0 7 reserved_1 8 15 reserved_0 16 23 last 24 31 ixMC_REGISTERS_TABLE_2 2 0x3fa84 2 0 4294967295 address_0_s1 0 15 address_0_s0 16 31 ixMC_REGISTERS_TABLE_3 2 0x3fa88 2 0 4294967295 address_1_s1 0 15 address_1_s0 16 31 ixMC_REGISTERS_TABLE_4 2 0x3fa8c 2 0 4294967295 address_2_s1 0 15 address_2_s0 16 31 ixMC_REGISTERS_TABLE_5 2 0x3fa90 2 0 4294967295 address_3_s1 0 15 address_3_s0 16 31 ixMC_REGISTERS_TABLE_6 2 0x3fa94 2 0 4294967295 address_4_s1 0 15 address_4_s0 16 31 ixMC_REGISTERS_TABLE_7 2 0x3fa98 2 0 4294967295 address_5_s1 0 15 address_5_s0 16 31 ixMC_REGISTERS_TABLE_8 2 0x3fa9c 2 0 4294967295 address_6_s1 0 15 address_6_s0 16 31 ixMC_REGISTERS_TABLE_9 2 0x3faa0 2 0 4294967295 address_7_s1 0 15 address_7_s0 16 31 ixMC_REGISTERS_TABLE_10 2 0x3faa4 2 0 4294967295 address_8_s1 0 15 address_8_s0 16 31 ixMC_REGISTERS_TABLE_11 2 0x3faa8 2 0 4294967295 address_9_s1 0 15 address_9_s0 16 31 ixMC_REGISTERS_TABLE_12 2 0x3faac 2 0 4294967295 address_10_s1 0 15 address_10_s0 16 31 ixMC_REGISTERS_TABLE_13 2 0x3fab0 2 0 4294967295 address_11_s1 0 15 address_11_s0 16 31 ixMC_REGISTERS_TABLE_14 2 0x3fab4 2 0 4294967295 address_12_s1 0 15 address_12_s0 16 31 ixMC_REGISTERS_TABLE_15 2 0x3fab8 2 0 4294967295 address_13_s1 0 15 address_13_s0 16 31 ixMC_REGISTERS_TABLE_16 2 0x3fabc 2 0 4294967295 address_14_s1 0 15 address_14_s0 16 31 ixMC_REGISTERS_TABLE_17 2 0x3fac0 2 0 4294967295 address_15_s1 0 15 address_15_s0 16 31 ixMC_REGISTERS_TABLE_18 2 0x3fac4 1 0 4294967295 data_0_value_0 0 31 ixMC_REGISTERS_TABLE_19 2 0x3fac8 1 0 4294967295 data_0_value_1 0 31 ixMC_REGISTERS_TABLE_20 2 0x3facc 1 0 4294967295 data_0_value_2 0 31 ixMC_REGISTERS_TABLE_21 2 0x3fad0 1 0 4294967295 data_0_value_3 0 31 ixMC_REGISTERS_TABLE_22 2 0x3fad4 1 0 4294967295 data_0_value_4 0 31 ixMC_REGISTERS_TABLE_23 2 0x3fad8 1 0 4294967295 data_0_value_5 0 31 ixMC_REGISTERS_TABLE_24 2 0x3fadc 1 0 4294967295 data_0_value_6 0 31 ixMC_REGISTERS_TABLE_25 2 0x3fae0 1 0 4294967295 data_0_value_7 0 31 ixMC_REGISTERS_TABLE_26 2 0x3fae4 1 0 4294967295 data_0_value_8 0 31 ixMC_REGISTERS_TABLE_27 2 0x3fae8 1 0 4294967295 data_0_value_9 0 31 ixMC_REGISTERS_TABLE_28 2 0x3faec 1 0 4294967295 data_0_value_10 0 31 ixMC_REGISTERS_TABLE_29 2 0x3faf0 1 0 4294967295 data_0_value_11 0 31 ixMC_REGISTERS_TABLE_30 2 0x3faf4 1 0 4294967295 data_0_value_12 0 31 ixMC_REGISTERS_TABLE_31 2 0x3faf8 1 0 4294967295 data_0_value_13 0 31 ixMC_REGISTERS_TABLE_32 2 0x3fafc 1 0 4294967295 data_0_value_14 0 31 ixMC_REGISTERS_TABLE_33 2 0x3fb00 1 0 4294967295 data_0_value_15 0 31 ixMC_REGISTERS_TABLE_34 2 0x3fb04 1 0 4294967295 data_1_value_0 0 31 ixMC_REGISTERS_TABLE_35 2 0x3fb08 1 0 4294967295 data_1_value_1 0 31 ixMC_REGISTERS_TABLE_36 2 0x3fb0c 1 0 4294967295 data_1_value_2 0 31 ixMC_REGISTERS_TABLE_37 2 0x3fb10 1 0 4294967295 data_1_value_3 0 31 ixMC_REGISTERS_TABLE_38 2 0x3fb14 1 0 4294967295 data_1_value_4 0 31 ixMC_REGISTERS_TABLE_39 2 0x3fb18 1 0 4294967295 data_1_value_5 0 31 ixMC_REGISTERS_TABLE_40 2 0x3fb1c 1 0 4294967295 data_1_value_6 0 31 ixMC_REGISTERS_TABLE_41 2 0x3fb20 1 0 4294967295 data_1_value_7 0 31 ixMC_REGISTERS_TABLE_42 2 0x3fb24 1 0 4294967295 data_1_value_8 0 31 ixMC_REGISTERS_TABLE_43 2 0x3fb28 1 0 4294967295 data_1_value_9 0 31 ixMC_REGISTERS_TABLE_44 2 0x3fb2c 1 0 4294967295 data_1_value_10 0 31 ixMC_REGISTERS_TABLE_45 2 0x3fb30 1 0 4294967295 data_1_value_11 0 31 ixMC_REGISTERS_TABLE_46 2 0x3fb34 1 0 4294967295 data_1_value_12 0 31 ixMC_REGISTERS_TABLE_47 2 0x3fb38 1 0 4294967295 data_1_value_13 0 31 ixMC_REGISTERS_TABLE_48 2 0x3fb3c 1 0 4294967295 data_1_value_14 0 31 ixMC_REGISTERS_TABLE_49 2 0x3fb40 1 0 4294967295 data_1_value_15 0 31 ixMC_REGISTERS_TABLE_50 2 0x3fb44 1 0 4294967295 data_2_value_0 0 31 ixMC_REGISTERS_TABLE_51 2 0x3fb48 1 0 4294967295 data_2_value_1 0 31 ixMC_REGISTERS_TABLE_52 2 0x3fb4c 1 0 4294967295 data_2_value_2 0 31 ixMC_REGISTERS_TABLE_53 2 0x3fb50 1 0 4294967295 data_2_value_3 0 31 ixMC_REGISTERS_TABLE_54 2 0x3fb54 1 0 4294967295 data_2_value_4 0 31 ixMC_REGISTERS_TABLE_55 2 0x3fb58 1 0 4294967295 data_2_value_5 0 31 ixMC_REGISTERS_TABLE_56 2 0x3fb5c 1 0 4294967295 data_2_value_6 0 31 ixMC_REGISTERS_TABLE_57 2 0x3fb60 1 0 4294967295 data_2_value_7 0 31 ixMC_REGISTERS_TABLE_58 2 0x3fb64 1 0 4294967295 data_2_value_8 0 31 ixMC_REGISTERS_TABLE_59 2 0x3fb68 1 0 4294967295 data_2_value_9 0 31 ixMC_REGISTERS_TABLE_60 2 0x3fb6c 1 0 4294967295 data_2_value_10 0 31 ixMC_REGISTERS_TABLE_61 2 0x3fb70 1 0 4294967295 data_2_value_11 0 31 ixMC_REGISTERS_TABLE_62 2 0x3fb74 1 0 4294967295 data_2_value_12 0 31 ixMC_REGISTERS_TABLE_63 2 0x3fb78 1 0 4294967295 data_2_value_13 0 31 ixMC_REGISTERS_TABLE_64 2 0x3fb7c 1 0 4294967295 data_2_value_14 0 31 ixMC_REGISTERS_TABLE_65 2 0x3fb80 1 0 4294967295 data_2_value_15 0 31 ixMC_REGISTERS_TABLE_66 2 0x3fb84 1 0 4294967295 data_3_value_0 0 31 ixMC_REGISTERS_TABLE_67 2 0x3fb88 1 0 4294967295 data_3_value_1 0 31 ixMC_REGISTERS_TABLE_68 2 0x3fb8c 1 0 4294967295 data_3_value_2 0 31 ixMC_REGISTERS_TABLE_69 2 0x3fb90 1 0 4294967295 data_3_value_3 0 31 ixMC_REGISTERS_TABLE_70 2 0x3fb94 1 0 4294967295 data_3_value_4 0 31 ixMC_REGISTERS_TABLE_71 2 0x3fb98 1 0 4294967295 data_3_value_5 0 31 ixMC_REGISTERS_TABLE_72 2 0x3fb9c 1 0 4294967295 data_3_value_6 0 31 ixMC_REGISTERS_TABLE_73 2 0x3fba0 1 0 4294967295 data_3_value_7 0 31 ixMC_REGISTERS_TABLE_74 2 0x3fba4 1 0 4294967295 data_3_value_8 0 31 ixMC_REGISTERS_TABLE_75 2 0x3fba8 1 0 4294967295 data_3_value_9 0 31 ixMC_REGISTERS_TABLE_76 2 0x3fbac 1 0 4294967295 data_3_value_10 0 31 ixMC_REGISTERS_TABLE_77 2 0x3fbb0 1 0 4294967295 data_3_value_11 0 31 ixMC_REGISTERS_TABLE_78 2 0x3fbb4 1 0 4294967295 data_3_value_12 0 31 ixMC_REGISTERS_TABLE_79 2 0x3fbb8 1 0 4294967295 data_3_value_13 0 31 ixMC_REGISTERS_TABLE_80 2 0x3fbbc 1 0 4294967295 data_3_value_14 0 31 ixMC_REGISTERS_TABLE_81 2 0x3fbc0 1 0 4294967295 data_3_value_15 0 31 ixFAN_TABLE_1 2 0x3fbc4 2 0 4294967295 TempMin 0 15 FdoMode 16 31 ixFAN_TABLE_2 2 0x3fbc8 2 0 4294967295 TempMax 0 15 TempMed 16 31 ixFAN_TABLE_3 2 0x3fbcc 2 0 4294967295 Slope2 0 15 Slope1 16 31 ixFAN_TABLE_4 2 0x3fbd0 2 0 4294967295 HystUp 0 15 FdoMin 16 31 ixFAN_TABLE_5 2 0x3fbd4 2 0 4294967295 HystSlope 0 15 HystDown 16 31 ixFAN_TABLE_6 2 0x3fbd8 2 0 4294967295 TempCurr 0 15 TempRespLim 16 31 ixFAN_TABLE_7 2 0x3fbdc 2 0 4294967295 PwmCurr 0 15 SlopeCurr 16 31 ixFAN_TABLE_8 2 0x3fbe0 1 0 4294967295 RefreshPeriod 0 31 ixFAN_TABLE_9 2 0x3fbe4 3 0 4294967295 Padding 0 7 TempSrc 8 15 FdoMax 16 31 ixSOFT_REGISTERS_TABLE_1 2 0x3fbe8 1 0 4294967295 RefClockFrequency 0 31 ixSOFT_REGISTERS_TABLE_2 2 0x3fbec 1 0 4294967295 PmTimerPeriod 0 31 ixSOFT_REGISTERS_TABLE_3 2 0x3fbf0 1 0 4294967295 FeatureEnables 0 31 ixSOFT_REGISTERS_TABLE_4 2 0x3fbf4 1 0 4294967295 PreVBlankGap 0 31 ixSOFT_REGISTERS_TABLE_5 2 0x3fbf8 1 0 4294967295 VBlankTimeout 0 31 ixSOFT_REGISTERS_TABLE_6 2 0x3fbfc 1 0 4294967295 TrainTimeGap 0 31 ixSOFT_REGISTERS_TABLE_7 2 0x3fc00 1 0 4294967295 MvddSwitchTime 0 31 ixSOFT_REGISTERS_TABLE_8 2 0x3fc04 1 0 4294967295 LongestAcpiTrainTime 0 31 ixSOFT_REGISTERS_TABLE_9 2 0x3fc08 1 0 4294967295 AcpiDelay 0 31 ixSOFT_REGISTERS_TABLE_10 2 0x3fc0c 1 0 4294967295 G5TrainTime 0 31 ixSOFT_REGISTERS_TABLE_11 2 0x3fc10 1 0 4294967295 DelayMpllPwron 0 31 ixSOFT_REGISTERS_TABLE_12 2 0x3fc14 1 0 4294967295 VoltageChangeTimeout 0 31 ixSOFT_REGISTERS_TABLE_13 2 0x3fc18 1 0 4294967295 HandshakeDisables 0 31 ixSOFT_REGISTERS_TABLE_14 2 0x3fc1c 4 0 4294967295 DisplayPhy4Config 0 7 DisplayPhy3Config 8 15 DisplayPhy2Config 16 23 DisplayPhy1Config 24 31 ixSOFT_REGISTERS_TABLE_15 2 0x3fc20 4 0 4294967295 DisplayPhy8Config 0 7 DisplayPhy7Config 8 15 DisplayPhy6Config 16 23 DisplayPhy5Config 24 31 ixSOFT_REGISTERS_TABLE_16 2 0x3fc24 1 0 4294967295 AverageGraphicsActivity 0 31 ixSOFT_REGISTERS_TABLE_17 2 0x3fc28 1 0 4294967295 AverageMemoryActivity 0 31 ixSOFT_REGISTERS_TABLE_18 2 0x3fc2c 1 0 4294967295 AverageGioActivity 0 31 ixSOFT_REGISTERS_TABLE_19 2 0x3fc30 4 0 4294967295 PCIeDpmEnabledLevels 0 7 LClkDpmEnabledLevels 8 15 MClkDpmEnabledLevels 16 23 SClkDpmEnabledLevels 24 31 ixSOFT_REGISTERS_TABLE_20 2 0x3fc34 4 0 4294967295 VCEDpmEnabledLevels 0 7 ACPDpmEnabledLevels 8 15 SAMUDpmEnabledLevels 16 23 UVDDpmEnabledLevels 24 31 ixSOFT_REGISTERS_TABLE_21 2 0x3fc38 1 0 4294967295 DRAM_LOG_ADDR_H 0 31 ixSOFT_REGISTERS_TABLE_22 2 0x3fc3c 1 0 4294967295 DRAM_LOG_ADDR_L 0 31 ixSOFT_REGISTERS_TABLE_23 2 0x3fc40 1 0 4294967295 DRAM_LOG_PHY_ADDR_H 0 31 ixSOFT_REGISTERS_TABLE_24 2 0x3fc44 1 0 4294967295 DRAM_LOG_PHY_ADDR_L 0 31 ixSOFT_REGISTERS_TABLE_25 2 0x3fc48 1 0 4294967295 DRAM_LOG_BUFF_SIZE 0 31 ixSOFT_REGISTERS_TABLE_26 2 0x3fc4c 1 0 4294967295 UlvEnterCount 0 31 ixSOFT_REGISTERS_TABLE_27 2 0x3fc50 1 0 4294967295 UlvTime 0 31 ixSOFT_REGISTERS_TABLE_28 2 0x3fc54 1 0 4294967295 UcodeLoadStatus 0 31 ixSOFT_REGISTERS_TABLE_29 2 0x3fc58 1 0 4294967295 Reserved_0 0 31 ixSOFT_REGISTERS_TABLE_30 2 0x3fc5c 1 0 4294967295 Reserved_1 0 31 ixPM_FUSES_1 2 0x3fc60 4 0 4294967295 SviLoadLineOffsetVddC 0 7 SviLoadLineTrimVddC 8 15 SviLoadLineVddC 16 23 SviLoadLineEn 24 31 ixPM_FUSES_2 2 0x3fc64 3 0 4294967295 TDC_MAWt 0 7 TDC_VDDC_ThrottleReleaseLimitPerc 8 15 TDC_VDDC_PkgLimit 16 31 ixPM_FUSES_3 2 0x3fc68 4 0 4294967295 Reserved 0 7 LPMLTemperatureMax 8 15 LPMLTemperatureMin 16 23 TdcWaterfallCtl 24 31 ixPM_FUSES_4 2 0x3fc6c 4 0 4294967295 LPMLTemperatureScaler_3 0 7 LPMLTemperatureScaler_2 8 15 LPMLTemperatureScaler_1 16 23 LPMLTemperatureScaler_0 24 31 ixPM_FUSES_5 2 0x3fc70 4 0 4294967295 LPMLTemperatureScaler_7 0 7 LPMLTemperatureScaler_6 8 15 LPMLTemperatureScaler_5 16 23 LPMLTemperatureScaler_4 24 31 ixPM_FUSES_6 2 0x3fc74 4 0 4294967295 LPMLTemperatureScaler_11 0 7 LPMLTemperatureScaler_10 8 15 LPMLTemperatureScaler_9 16 23 LPMLTemperatureScaler_8 24 31 ixPM_FUSES_7 2 0x3fc78 4 0 4294967295 LPMLTemperatureScaler_15 0 7 LPMLTemperatureScaler_14 8 15 LPMLTemperatureScaler_13 16 23 LPMLTemperatureScaler_12 24 31 ixPM_FUSES_8 2 0x3fc7c 2 0 4294967295 FuzzyFan_ErrorRateSetDelta 0 15 FuzzyFan_ErrorSetDelta 16 31 ixPM_FUSES_9 2 0x3fc80 2 0 4294967295 Reserved6 0 15 FuzzyFan_PwmSetDelta 16 31 ixPM_FUSES_10 2 0x3fc84 4 0 4294967295 GnbLPML_3 0 7 GnbLPML_2 8 15 GnbLPML_1 16 23 GnbLPML_0 24 31 ixPM_FUSES_11 2 0x3fc88 4 0 4294967295 GnbLPML_7 0 7 GnbLPML_6 8 15 GnbLPML_5 16 23 GnbLPML_4 24 31 ixPM_FUSES_12 2 0x3fc8c 4 0 4294967295 GnbLPML_11 0 7 GnbLPML_10 8 15 GnbLPML_9 16 23 GnbLPML_8 24 31 ixPM_FUSES_13 2 0x3fc90 4 0 4294967295 GnbLPML_15 0 7 GnbLPML_14 8 15 GnbLPML_13 16 23 GnbLPML_12 24 31 ixPM_FUSES_14 2 0x3fc94 4 0 4294967295 Reserved1_1 0 7 Reserved1_0 8 15 GnbLPMLMinVid 16 23 GnbLPMLMaxVid 24 31 ixPM_FUSES_15 2 0x3fc98 2 0 4294967295 BapmVddCBaseLeakageLoSidd 0 15 BapmVddCBaseLeakageHiSidd 16 31 ixSMU_PM_STATUS_0 2 0x3fe00 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_1 2 0x3fe04 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_2 2 0x3fe08 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_3 2 0x3fe0c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_4 2 0x3fe10 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_5 2 0x3fe14 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_6 2 0x3fe18 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_7 2 0x3fe1c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_8 2 0x3fe20 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_9 2 0x3fe24 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_10 2 0x3fe28 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_11 2 0x3fe2c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_12 2 0x3fe30 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_13 2 0x3fe34 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_14 2 0x3fe38 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_15 2 0x3fe3c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_16 2 0x3fe40 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_17 2 0x3fe44 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_18 2 0x3fe48 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_19 2 0x3fe4c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_20 2 0x3fe50 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_21 2 0x3fe54 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_22 2 0x3fe58 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_23 2 0x3fe5c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_24 2 0x3fe60 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_25 2 0x3fe64 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_26 2 0x3fe68 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_27 2 0x3fe6c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_28 2 0x3fe70 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_29 2 0x3fe74 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_30 2 0x3fe78 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_31 2 0x3fe7c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_32 2 0x3fe80 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_33 2 0x3fe84 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_34 2 0x3fe88 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_35 2 0x3fe8c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_36 2 0x3fe90 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_37 2 0x3fe94 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_38 2 0x3fe98 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_39 2 0x3fe9c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_40 2 0x3fea0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_41 2 0x3fea4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_42 2 0x3fea8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_43 2 0x3feac 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_44 2 0x3feb0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_45 2 0x3feb4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_46 2 0x3feb8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_47 2 0x3febc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_48 2 0x3fec0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_49 2 0x3fec4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_50 2 0x3fec8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_51 2 0x3fecc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_52 2 0x3fed0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_53 2 0x3fed4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_54 2 0x3fed8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_55 2 0x3fedc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_56 2 0x3fee0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_57 2 0x3fee4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_58 2 0x3fee8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_59 2 0x3feec 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_60 2 0x3fef0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_61 2 0x3fef4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_62 2 0x3fef8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_63 2 0x3fefc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_64 2 0x3ff00 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_65 2 0x3ff04 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_66 2 0x3ff08 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_67 2 0x3ff0c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_68 2 0x3ff10 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_69 2 0x3ff14 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_70 2 0x3ff18 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_71 2 0x3ff1c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_72 2 0x3ff20 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_73 2 0x3ff24 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_74 2 0x3ff28 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_75 2 0x3ff2c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_76 2 0x3ff30 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_77 2 0x3ff34 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_78 2 0x3ff38 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_79 2 0x3ff3c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_80 2 0x3ff40 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_81 2 0x3ff44 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_82 2 0x3ff48 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_83 2 0x3ff4c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_84 2 0x3ff50 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_85 2 0x3ff54 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_86 2 0x3ff58 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_87 2 0x3ff5c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_88 2 0x3ff60 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_89 2 0x3ff64 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_90 2 0x3ff68 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_91 2 0x3ff6c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_92 2 0x3ff70 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_93 2 0x3ff74 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_94 2 0x3ff78 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_95 2 0x3ff7c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_96 2 0x3ff80 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_97 2 0x3ff84 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_98 2 0x3ff88 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_99 2 0x3ff8c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_100 2 0x3ff90 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_101 2 0x3ff94 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_102 2 0x3ff98 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_103 2 0x3ff9c 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_104 2 0x3ffa0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_105 2 0x3ffa4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_106 2 0x3ffa8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_107 2 0x3ffac 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_108 2 0x3ffb0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_109 2 0x3ffb4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_110 2 0x3ffb8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_111 2 0x3ffbc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_112 2 0x3ffc0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_113 2 0x3ffc4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_114 2 0x3ffc8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_115 2 0x3ffcc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_116 2 0x3ffd0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_117 2 0x3ffd4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_118 2 0x3ffd8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_119 2 0x3ffdc 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_120 2 0x3ffe0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_121 2 0x3ffe4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_122 2 0x3ffe8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_123 2 0x3ffec 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_124 2 0x3fff0 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_125 2 0x3fff4 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_126 2 0x3fff8 1 0 4294967295 DATA 0 31 ixSMU_PM_STATUS_127 2 0x3fffc 1 0 4294967295 DATA 0 31 ixCG_THERMAL_INT_ENA 2 0xc2100024 6 0 4294967295 THERM_INTH_SET 0 0 THERM_INTL_SET 1 1 THERM_TRIGGER_SET 2 2 THERM_INTH_CLR 3 3 THERM_INTL_CLR 4 4 THERM_TRIGGER_CLR 5 5 ixCG_THERMAL_INT_CTRL 2 0xc2100028 8 0 4294967295 DIG_THERM_INTH 0 7 DIG_THERM_INTL 8 15 GNB_TEMP_THRESHOLD 16 23 THERM_INTH_MASK 24 24 THERM_INTL_MASK 25 25 THERM_TRIGGER_MASK 26 26 THERM_TRIGGER_CNB_MASK 27 27 THERM_GNB_HW_ENA 28 28 ixCG_THERMAL_INT_STATUS 2 0xc210002c 4 0 4294967295 THERM_INTH_DETECT 0 0 THERM_INTL_DETECT 1 1 THERM_TRIGGER_DETECT 2 2 THERM_TRIGGER_CNB_DETECT 3 3 ixCG_THERMAL_CTRL 2 0xc0300004 7 0 4294967295 DPM_EVENT_SRC 0 2 THERM_INC_CLK 3 3 SPARE 4 13 DIG_THERM_DPM 14 21 RESERVED 22 24 CTF_PAD_POLARITY 25 25 CTF_PAD_EN 26 26 ixCG_THERMAL_STATUS 2 0xc0300008 4 0 4294967295 SPARE 0 8 FDO_PWM_DUTY 9 16 THERM_ALERT 17 17 GEN_STATUS 18 21 ixCG_THERMAL_INT 2 0xc030000c 4 0 4294967295 DIG_THERM_CTF 0 7 DIG_THERM_INTH 8 15 DIG_THERM_INTL 16 23 THERM_INT_MASK 24 27 ixCG_MULT_THERMAL_CTRL 2 0xc0300010 5 0 4294967295 TS_FILTER 0 3 UNUSED 4 8 THERMAL_RANGE_RST 9 9 TEMP_SEL 20 27 THM_READY_CLEAR 28 28 ixCG_MULT_THERMAL_STATUS 2 0xc0300014 2 0 4294967295 ASIC_MAX_TEMP 0 8 CTF_TEMP 9 17 ixCG_FDO_CTRL0 2 0xc0300064 6 0 4294967295 FDO_STATIC_DUTY 0 7 FAN_SPINUP_DUTY 8 15 FDO_PWM_MANUAL 16 16 FDO_PWM_HYSTER 17 22 FDO_PWM_RAMP_EN 23 23 FDO_PWM_RAMP 24 31 ixCG_FDO_CTRL1 2 0xc0300068 5 0 4294967295 FMAX_DUTY100 0 7 FMIN_DUTY 8 15 M 16 23 RESERVED 24 29 FDO_PWRDNB 30 30 ixCG_FDO_CTRL2 2 0xc030006c 6 0 4294967295 TMIN 0 7 FAN_SPINUP_TIME 8 10 FDO_PWM_MODE 11 13 TMIN_HYSTER 14 16 TMAX 17 24 TACH_PWM_RESP_RATE 25 31 ixCG_TACH_CTRL 2 0xc0300070 2 0 4294967295 EDGE_PER_REV 0 2 TARGET_PERIOD 3 31 ixCG_TACH_STATUS 2 0xc0300074 1 0 4294967295 TACH_PERIOD 0 31 ixCC_THM_STRAPS0 2 0xc0300080 12 0 4294967295 TMON0_BGADJ 1 8 TMON1_BGADJ 9 16 TMON_CMON_FUSE_SEL 17 17 NUM_ACQ 18 20 TMON_CLK_SEL 21 23 TMON_CONFIG_SOURCE 24 24 CTF_DISABLE 25 25 TMON0_DISABLE 26 26 TMON1_DISABLE 27 27 TMON2_DISABLE 28 28 TMON3_DISABLE 29 29 UNUSED 31 31 ixTHM_TMON0_RDIL0_DATA 2 0xc0300100 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL1_DATA 2 0xc0300104 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL2_DATA 2 0xc0300108 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL3_DATA 2 0xc030010c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL4_DATA 2 0xc0300110 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL5_DATA 2 0xc0300114 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL6_DATA 2 0xc0300118 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL7_DATA 2 0xc030011c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL8_DATA 2 0xc0300120 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL9_DATA 2 0xc0300124 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL10_DATA 2 0xc0300128 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL11_DATA 2 0xc030012c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL12_DATA 2 0xc0300130 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL13_DATA 2 0xc0300134 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL14_DATA 2 0xc0300138 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIL15_DATA 2 0xc030013c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR0_DATA 2 0xc0300140 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR1_DATA 2 0xc0300144 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR2_DATA 2 0xc0300148 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR3_DATA 2 0xc030014c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR4_DATA 2 0xc0300150 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR5_DATA 2 0xc0300154 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR6_DATA 2 0xc0300158 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR7_DATA 2 0xc030015c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR8_DATA 2 0xc0300160 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR9_DATA 2 0xc0300164 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR10_DATA 2 0xc0300168 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR11_DATA 2 0xc030016c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR12_DATA 2 0xc0300170 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR13_DATA 2 0xc0300174 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR14_DATA 2 0xc0300178 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_RDIR15_DATA 2 0xc030017c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL0_DATA 2 0xc0300180 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL1_DATA 2 0xc0300184 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL2_DATA 2 0xc0300188 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL3_DATA 2 0xc030018c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL4_DATA 2 0xc0300190 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL5_DATA 2 0xc0300194 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL6_DATA 2 0xc0300198 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL7_DATA 2 0xc030019c 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL8_DATA 2 0xc03001a0 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL9_DATA 2 0xc03001a4 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL10_DATA 2 0xc03001a8 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL11_DATA 2 0xc03001ac 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL12_DATA 2 0xc03001b0 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL13_DATA 2 0xc03001b4 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL14_DATA 2 0xc03001b8 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIL15_DATA 2 0xc03001bc 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR0_DATA 2 0xc03001c0 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR1_DATA 2 0xc03001c4 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR2_DATA 2 0xc03001c8 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR3_DATA 2 0xc03001cc 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR4_DATA 2 0xc03001d0 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR5_DATA 2 0xc03001d4 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR6_DATA 2 0xc03001d8 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR7_DATA 2 0xc03001dc 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR8_DATA 2 0xc03001e0 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR9_DATA 2 0xc03001e4 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR10_DATA 2 0xc03001e8 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR11_DATA 2 0xc03001ec 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR12_DATA 2 0xc03001f0 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR13_DATA 2 0xc03001f4 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR14_DATA 2 0xc03001f8 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_RDIR15_DATA 2 0xc03001fc 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_INT_DATA 2 0xc0300300 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON1_INT_DATA 2 0xc0300304 3 0 4294967295 Z 0 10 VALID 11 11 TEMP 12 23 ixTHM_TMON0_DEBUG 2 0xc0300310 2 0 4294967295 DEBUG_RDI 0 4 DEBUG_Z 5 15 ixTHM_TMON1_DEBUG 2 0xc0300314 2 0 4294967295 DEBUG_RDI 0 4 DEBUG_Z 5 15 ixTHM_TMON0_STATUS 2 0xc0300320 2 0 4294967295 CURRENT_RDI 0 4 MEAS_DONE 5 5 ixTHM_TMON1_STATUS 2 0xc0300324 2 0 4294967295 CURRENT_RDI 0 4 MEAS_DONE 5 5 ixGENERAL_PWRMGT 2 0xc0200000 18 0 4294967295 GLOBAL_PWRMGT_EN 0 0 STATIC_PM_EN 1 1 THERMAL_PROTECTION_DIS 2 2 THERMAL_PROTECTION_TYPE 3 3 SW_SMIO_INDEX 6 6 LOW_VOLT_D2_ACPI 8 8 LOW_VOLT_D3_ACPI 9 9 VOLT_PWRMGT_EN 10 10 SPARE11 11 11 GPU_COUNTER_ACPI 14 14 GPU_COUNTER_CLK 15 15 GPU_COUNTER_OFF 16 16 GPU_COUNTER_INTF_OFF 17 17 SPARE18 18 18 ACPI_D3_VID 19 20 DYN_SPREAD_SPECTRUM_EN 23 23 SPARE27 27 27 SPARE 28 31 ixCNB_PWRMGT_CNTL 2 0xc0200004 5 0 4294967295 GNB_SLOW_MODE 0 1 GNB_SLOW 2 2 FORCE_NB_PS1 3 3 DPM_ENABLED 4 4 SPARE 5 31 ixSCLK_PWRMGT_CNTL 2 0xc0200008 7 0 4294967295 SCLK_PWRMGT_OFF 0 0 RESET_BUSY_CNT 4 4 RESET_SCLK_CNT 5 5 DYN_LIGHT_SLEEP_EN 14 14 AUTO_SCLK_PULSE_SKIP 15 15 LIGHT_SLEEP_COUNTER 16 20 DYNAMIC_PM_EN 21 21 ixTARGET_AND_CURRENT_PROFILE_INDEX 2 0xc0200014 8 0 4294967295 TARGET_STATE 0 3 CURRENT_STATE 4 7 CURR_MCLK_INDEX 8 11 TARG_MCLK_INDEX 12 15 CURR_SCLK_INDEX 16 20 TARG_SCLK_INDEX 21 25 CURR_LCLK_INDEX 26 28 TARG_LCLK_INDEX 29 31 ixPWR_PCC_CONTROL 2 0xc0200018 1 0 4294967295 PCC_POLARITY 0 0 ixPWR_PCC_GPIO_SELECT 2 0xc020001c 1 0 4294967295 GPIO 0 31 ixCG_FREQ_TRAN_VOTING_0 2 0xc02001a8 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_1 2 0xc02001ac 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_2 2 0xc02001b0 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_3 2 0xc02001b4 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_4 2 0xc02001b8 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_5 2 0xc02001bc 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_6 2 0xc02001c0 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixCG_FREQ_TRAN_VOTING_7 2 0xc02001c4 31 0 4294967295 BIF_FREQ_THROTTLING_VOTE_EN 0 0 HDP_FREQ_THROTTLING_VOTE_EN 1 1 ROM_FREQ_THROTTLING_VOTE_EN 2 2 IH_SEM_FREQ_THROTTLING_VOTE_EN 3 3 PDMA_FREQ_THROTTLING_VOTE_EN 4 4 DRM_FREQ_THROTTLING_VOTE_EN 5 5 IDCT_FREQ_THROTTLING_VOTE_EN 6 6 ACP_FREQ_THROTTLING_VOTE_EN 7 7 SDMA_FREQ_THROTTLING_VOTE_EN 8 8 UVD_FREQ_THROTTLING_VOTE_EN 9 9 VCE_FREQ_THROTTLING_VOTE_EN 10 10 DC_AZ_FREQ_THROTTLING_VOTE_EN 11 11 SAM_FREQ_THROTTLING_VOTE_EN 12 12 AVP_FREQ_THROTTLING_VOTE_EN 13 13 GRBM_0_FREQ_THROTTLING_VOTE_EN 14 14 GRBM_1_FREQ_THROTTLING_VOTE_EN 15 15 GRBM_2_FREQ_THROTTLING_VOTE_EN 16 16 GRBM_3_FREQ_THROTTLING_VOTE_EN 17 17 GRBM_4_FREQ_THROTTLING_VOTE_EN 18 18 GRBM_5_FREQ_THROTTLING_VOTE_EN 19 19 GRBM_6_FREQ_THROTTLING_VOTE_EN 20 20 GRBM_7_FREQ_THROTTLING_VOTE_EN 21 21 GRBM_8_FREQ_THROTTLING_VOTE_EN 22 22 GRBM_9_FREQ_THROTTLING_VOTE_EN 23 23 GRBM_10_FREQ_THROTTLING_VOTE_EN 24 24 GRBM_11_FREQ_THROTTLING_VOTE_EN 25 25 GRBM_12_FREQ_THROTTLING_VOTE_EN 26 26 GRBM_13_FREQ_THROTTLING_VOTE_EN 27 27 GRBM_14_FREQ_THROTTLING_VOTE_EN 28 28 GRBM_15_FREQ_THROTTLING_VOTE_EN 29 29 RLC_FREQ_THROTTLING_VOTE_EN 30 30 ixPLL_TEST_CNTL 2 0xc020003c 5 0 4294967295 TST_SRC_SEL 0 3 TST_REF_SEL 4 7 REF_TEST_COUNT 8 14 TST_RESET 15 15 TEST_COUNT 17 31 ixCG_STATIC_SCREEN_PARAMETER 2 0xc0200044 2 0 4294967295 STATIC_SCREEN_THRESHOLD 0 15 STATIC_SCREEN_THRESHOLD_UNIT 16 19 ixCG_DISPLAY_GAP_CNTL 2 0xc0200060 5 0 4294967295 DISP_GAP 0 1 VBI_TIMER_COUNT 4 17 VBI_TIMER_UNIT 20 22 DISP_GAP_MCHG 24 25 VBI_TIMER_DISABLE 28 28 ixCG_DISPLAY_GAP_CNTL2 2 0xc0200230 1 0 4294967295 VBI_PREDICTION 0 31 ixCG_ACPI_CNTL 2 0xc0200064 2 0 4294967295 SCLK_ACPI_DIV 0 6 SCLK_CHANGE_SKIP 7 7 ixSCLK_DEEP_SLEEP_CNTL 2 0xc0200080 19 0 4294967295 DIV_ID 0 2 RAMP_DIS 3 3 HYSTERESIS 4 15 SCLK_RUNNING_MASK 16 16 SELF_REFRESH_MASK 17 17 ALLOW_NBPSTATE_MASK 18 18 BIF_BUSY_MASK 19 19 UVD_BUSY_MASK 20 20 MC0SRBM_BUSY_MASK 21 21 MC1SRBM_BUSY_MASK 22 22 MC_ALLOW_MASK 23 23 SMU_BUSY_MASK 24 24 SELF_REFRESH_NLC_MASK 25 25 FAST_EXIT_REQ_NBPSTATE 26 26 DEEP_SLEEP_ENTRY_MODE 27 27 MBUS2_ACTIVE_MASK 28 28 VCE_BUSY_MASK 29 29 AZ_BUSY_MASK 30 30 ENABLE_DS 31 31 ixSCLK_DEEP_SLEEP_CNTL2 2 0xc0200084 16 0 4294967295 RLC_BUSY_MASK 0 0 HDP_BUSY_MASK 1 1 ROM_BUSY_MASK 2 2 IH_SEM_BUSY_MASK 3 3 PDMA_BUSY_MASK 4 4 IDCT_BUSY_MASK 6 6 SDMA_BUSY_MASK 7 7 DC_AZ_BUSY_MASK 8 8 ACP_SMU_ALLOW_DSLEEP_STUTTER_MASK 9 9 UVD_CG_MC_STAT_BUSY_MASK 10 10 VCE_CG_MC_STAT_BUSY_MASK 11 11 SAM_CG_MC_STAT_BUSY_MASK 12 12 SAM_CG_STATUS_BUSY_MASK 13 13 RLC_SMU_GFXCLK_OFF_MASK 14 14 SHALLOW_DIV_ID 21 23 INOUT_CUSHION 24 31 ixSCLK_DEEP_SLEEP_CNTL3 2 0xc020009c 16 0 4294967295 GRBM_0_SMU_BUSY_MASK 0 0 GRBM_1_SMU_BUSY_MASK 1 1 GRBM_2_SMU_BUSY_MASK 2 2 GRBM_3_SMU_BUSY_MASK 3 3 GRBM_4_SMU_BUSY_MASK 4 4 GRBM_5_SMU_BUSY_MASK 5 5 GRBM_6_SMU_BUSY_MASK 6 6 GRBM_7_SMU_BUSY_MASK 7 7 GRBM_8_SMU_BUSY_MASK 8 8 GRBM_9_SMU_BUSY_MASK 9 9 GRBM_10_SMU_BUSY_MASK 10 10 GRBM_11_SMU_BUSY_MASK 11 11 GRBM_12_SMU_BUSY_MASK 12 12 GRBM_13_SMU_BUSY_MASK 13 13 GRBM_14_SMU_BUSY_MASK 14 14 GRBM_15_SMU_BUSY_MASK 15 15 ixSCLK_DEEP_SLEEP_MISC_CNTL 2 0xc0200088 5 0 4294967295 DPM_DS_DIV_ID 0 2 DPM_SS_DIV_ID 3 5 OCP_ENABLE 16 16 OCP_DS_DIV_ID 17 19 OCP_SS_DIV_ID 20 22 ixLCLK_DEEP_SLEEP_CNTL 2 0xc020008c 5 0 4294967295 DIV_ID 0 2 RAMP_DIS 3 3 HYSTERESIS 4 15 RESERVED 16 30 ENABLE_DS 31 31 ixLCLK_DEEP_SLEEP_CNTL2 2 0xc0200310 23 0 4294967295 RFE_BUSY_MASK 0 0 BIF_CG_LCLK_BUSY_MASK 1 1 L1IMU_SMU_IDLE_MASK 2 2 RESERVED_BIT3 3 3 SCLK_RUNNING_MASK 4 4 SMU_BUSY_MASK 5 5 PCIE_LCLK_IDLE1_MASK 6 6 PCIE_LCLK_IDLE2_MASK 7 7 PCIE_LCLK_IDLE3_MASK 8 8 PCIE_LCLK_IDLE4_MASK 9 9 L1IMUGPP_IDLE_MASK 10 10 L1IMUGPPSB_IDLE_MASK 11 11 L1IMUBIF_IDLE_MASK 12 12 L1IMUINTGEN_IDLE_MASK 13 13 L2IMU_IDLE_MASK 14 14 ORB_IDLE_MASK 15 15 ON_INB_WAKE_MASK 16 16 ON_INB_WAKE_ACK_MASK 17 17 ON_OUTB_WAKE_MASK 18 18 ON_OUTB_WAKE_ACK_MASK 19 19 DMAACTIVE_MASK 20 20 RLC_SMU_GFXCLK_OFF_MASK 21 21 RESERVED 22 31 ixTARGET_AND_CURRENT_PROFILE_INDEX_1 2 0xc02000f0 8 0 4294967295 CURR_VDDCI_INDEX 0 3 TARG_VDDCI_INDEX 4 7 CURR_MVDD_INDEX 8 11 TARG_MVDD_INDEX 12 15 CURR_VDDC_INDEX 16 19 TARG_VDDC_INDEX 20 23 CURR_PCIE_INDEX 24 27 TARG_PCIE_INDEX 28 31 ixCG_ULV_PARAMETER 2 0xc020015c 2 0 4294967295 ULV_THRESHOLD 0 15 ULV_THRESHOLD_UNIT 16 19 ixSCLK_MIN_DIV 2 0xc02003ac 2 0 4294967295 FRACV 0 11 INTV 12 18 ixPWR_CKS_ENABLE 2 0xc020034c 3 0 4294967295 STRETCH_ENABLE 0 0 masterReset 1 1 staticEnable 2 2 ixPWR_CKS_CNTL 2 0xc0200350 12 0 4294967295 CKS_BYPASS 0 0 CKS_PCCEnable 1 1 CKS_TEMP_COMP 2 2 CKS_STRETCH_AMOUNT 3 6 CKS_SKIP_PHASE_BYPASS 7 7 CKS_SAMPLE_SIZE 8 11 CKS_FSM_WAIT_CYCLES 12 15 CKS_USE_FOR_LOW_FREQ 16 16 CKS_NO_EXTRA_COARSE_STEP 17 17 CKS_LDO_REFSEL 18 21 DDT_DEBUS_SEL 22 22 CKS_LDO_READY_COUNT_VAL 23 30 ixPWR_DISP_TIMER_CONTROL 2 0xc02003c0 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_DISABLE 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT_AK 28 28 DISP_TIMER_INT_TYPE 29 29 DISP_TIMER_INT_MODE 30 30 ixPWR_DISP_TIMER_DEBUG 2 0xc02003c4 4 0 4294967295 DISP_TIMER_INT_RUNNING 0 0 DISP_TIMER_INT_STAT 1 1 DISP_TIMER_INT 2 2 DISP_TIMER_RUN_VAL 7 31 ixPWR_DISP_TIMER2_CONTROL 2 0xc02003c8 7 0 4294967295 DISP_TIMER_INT_COUNT 0 24 DISP_TIMER_INT_ENABLE 25 25 DISP_TIMER_INT_DISABLE 26 26 DISP_TIMER_INT_MASK 27 27 DISP_TIMER_INT_STAT_AK 28 28 DISP_TIMER_INT_TYPE 29 29 DISP_TIMER_INT_MODE 30 30 ixPWR_DISP_TIMER2_DEBUG 2 0xc02003cc 4 0 4294967295 DISP_TIMER_INT_RUNNING 0 0 DISP_TIMER_INT_STAT 1 1 DISP_TIMER_INT 2 2 DISP_TIMER_RUN_VAL 7 31 ixPWR_DISP_TIMER_CONTROL2 2 0xc0200378 1 0 4294967295 DISP_TIMER_PULSE_WIDTH 0 9 ixVDDGFX_IDLE_PARAMETER 2 0xc020036c 2 0 4294967295 VDDGFX_IDLE_THRESHOLD 0 15 VDDGFX_IDLE_THRESHOLD_UNIT 16 19 ixVDDGFX_IDLE_CONTROL 2 0xc0200370 4 0 4294967295 VDDGFX_IDLE_EN 0 0 VDDGFX_IDLE_DETECT 1 1 FORCE_VDDGFX_IDLE_EXIT 2 2 SMC_VDDGFX_IDLE_STATE 3 3 ixVDDGFX_IDLE_EXIT 2 0xc0200374 1 0 4294967295 BIF_EXIT_REQ 0 0 ixLCAC_MC0_CNTL 2 0xc0400130 4 0 4294967295 MC0_ENABLE 0 0 MC0_THRESHOLD 1 16 MC0_BLOCK_ID 17 21 MC0_SIGNAL_ID 22 29 ixLCAC_MC0_OVR_SEL 2 0xc0400134 1 0 4294967295 MC0_OVR_SEL 0 31 ixLCAC_MC0_OVR_VAL 2 0xc0400138 1 0 4294967295 MC0_OVR_VAL 0 31 ixLCAC_MC1_CNTL 2 0xc040013c 4 0 4294967295 MC1_ENABLE 0 0 MC1_THRESHOLD 1 16 MC1_BLOCK_ID 17 21 MC1_SIGNAL_ID 22 29 ixLCAC_MC1_OVR_SEL 2 0xc0400140 1 0 4294967295 MC1_OVR_SEL 0 31 ixLCAC_MC1_OVR_VAL 2 0xc0400144 1 0 4294967295 MC1_OVR_VAL 0 31 ixLCAC_MC2_CNTL 2 0xc0400148 4 0 4294967295 MC2_ENABLE 0 0 MC2_THRESHOLD 1 16 MC2_BLOCK_ID 17 21 MC2_SIGNAL_ID 22 29 ixLCAC_MC2_OVR_SEL 2 0xc040014c 1 0 4294967295 MC2_OVR_SEL 0 31 ixLCAC_MC2_OVR_VAL 2 0xc0400150 1 0 4294967295 MC2_OVR_VAL 0 31 ixLCAC_MC3_CNTL 2 0xc0400154 4 0 4294967295 MC3_ENABLE 0 0 MC3_THRESHOLD 1 16 MC3_BLOCK_ID 17 21 MC3_SIGNAL_ID 22 29 ixLCAC_MC3_OVR_SEL 2 0xc0400158 1 0 4294967295 MC3_OVR_SEL 0 31 ixLCAC_MC3_OVR_VAL 2 0xc040015c 1 0 4294967295 MC3_OVR_VAL 0 31 ixLCAC_CPL_CNTL 2 0xc0400160 4 0 4294967295 CPL_ENABLE 0 0 CPL_THRESHOLD 1 16 CPL_BLOCK_ID 17 21 CPL_SIGNAL_ID 22 29 ixLCAC_CPL_OVR_SEL 2 0xc0400164 1 0 4294967295 CPL_OVR_SEL 0 31 ixLCAC_CPL_OVR_VAL 2 0xc0400168 1 0 4294967295 CPL_OVR_VAL 0 31 mmROM_SMC_IND_INDEX 0 0x80 1 0 4294967295 SMC_IND_ADDR 0 31 mmROM0_ROM_SMC_IND_INDEX 0 0x80 0 0 4294967295 mmROM1_ROM_SMC_IND_INDEX 0 0x82 0 0 4294967295 mmROM2_ROM_SMC_IND_INDEX 0 0x84 0 0 4294967295 mmROM3_ROM_SMC_IND_INDEX 0 0x86 0 0 4294967295 mmROM_SMC_IND_DATA 0 0x81 1 0 4294967295 SMC_IND_DATA 0 31 mmROM0_ROM_SMC_IND_DATA 0 0x81 0 0 4294967295 mmROM1_ROM_SMC_IND_DATA 0 0x83 0 0 4294967295 mmROM2_ROM_SMC_IND_DATA 0 0x85 0 0 4294967295 mmROM3_ROM_SMC_IND_DATA 0 0x87 0 0 4294967295 ixROM_CNTL 2 0xc0600000 6 0 4294967295 SCK_OVERWRITE 1 1 CLOCK_GATING_EN 2 2 CSB_ACTIVE_TO_SCK_SETUP_TIME 8 15 CSB_ACTIVE_TO_SCK_HOLD_TIME 16 23 SCK_PRESCALE_REFCLK 24 27 SCK_PRESCALE_CRYSTAL_CLK 28 31 ixPAGE_MIRROR_CNTL 2 0xc0600004 4 0 4294967295 PAGE_MIRROR_BASE_ADDR 0 23 PAGE_MIRROR_INVALIDATE 24 24 PAGE_MIRROR_ENABLE 25 25 PAGE_MIRROR_USAGE 26 27 ixROM_STATUS 2 0xc0600008 1 0 4294967295 ROM_BUSY 0 0 ixCGTT_ROM_CLK_CTRL0 2 0xc060000c 4 0 4294967295 ON_DELAY 0 3 OFF_HYSTERESIS 4 11 SOFT_OVERRIDE1 30 30 SOFT_OVERRIDE0 31 31 ixROM_INDEX 2 0xc0600010 1 0 4294967295 ROM_INDEX 0 23 ixROM_DATA 2 0xc0600014 1 0 4294967295 ROM_DATA 0 31 ixROM_START 2 0xc0600018 1 0 4294967295 ROM_START 0 23 ixROM_SW_CNTL 2 0xc060001c 3 0 4294967295 DATA_SIZE 0 15 COMMAND_SIZE 16 17 ROM_SW_RETURN_DATA_ENABLE 18 18 ixROM_SW_STATUS 2 0xc0600020 1 0 4294967295 ROM_SW_DONE 0 0 ixROM_SW_COMMAND 2 0xc0600024 2 0 4294967295 ROM_SW_INSTRUCTION 0 7 ROM_SW_ADDRESS 8 31 ixROM_SW_DATA_1 2 0xc0600028 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_2 2 0xc060002c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_3 2 0xc0600030 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_4 2 0xc0600034 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_5 2 0xc0600038 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_6 2 0xc060003c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_7 2 0xc0600040 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_8 2 0xc0600044 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_9 2 0xc0600048 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_10 2 0xc060004c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_11 2 0xc0600050 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_12 2 0xc0600054 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_13 2 0xc0600058 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_14 2 0xc060005c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_15 2 0xc0600060 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_16 2 0xc0600064 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_17 2 0xc0600068 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_18 2 0xc060006c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_19 2 0xc0600070 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_20 2 0xc0600074 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_21 2 0xc0600078 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_22 2 0xc060007c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_23 2 0xc0600080 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_24 2 0xc0600084 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_25 2 0xc0600088 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_26 2 0xc060008c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_27 2 0xc0600090 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_28 2 0xc0600094 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_29 2 0xc0600098 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_30 2 0xc060009c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_31 2 0xc06000a0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_32 2 0xc06000a4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_33 2 0xc06000a8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_34 2 0xc06000ac 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_35 2 0xc06000b0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_36 2 0xc06000b4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_37 2 0xc06000b8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_38 2 0xc06000bc 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_39 2 0xc06000c0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_40 2 0xc06000c4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_41 2 0xc06000c8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_42 2 0xc06000cc 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_43 2 0xc06000d0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_44 2 0xc06000d4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_45 2 0xc06000d8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_46 2 0xc06000dc 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_47 2 0xc06000e0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_48 2 0xc06000e4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_49 2 0xc06000e8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_50 2 0xc06000ec 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_51 2 0xc06000f0 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_52 2 0xc06000f4 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_53 2 0xc06000f8 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_54 2 0xc06000fc 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_55 2 0xc0600100 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_56 2 0xc0600104 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_57 2 0xc0600108 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_58 2 0xc060010c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_59 2 0xc0600110 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_60 2 0xc0600114 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_61 2 0xc0600118 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_62 2 0xc060011c 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_63 2 0xc0600120 1 0 4294967295 ROM_SW_DATA 0 31 ixROM_SW_DATA_64 2 0xc0600124 1 0 4294967295 ROM_SW_DATA 0 31 ixCURRENT_PG_STATUS 2 0xc020029c 2 0 4294967295 VCE_PG_STATUS 1 1 UVD_PG_STATUS 2 2 ixCURRENT_PG_STATUS_APU 2 0xd020029c 0 0 4294967295