40
mmVCE_STATUS 0 0x8001 3 0 4294967295
	JOB_BUSY 0 0
	VCPU_REPORT 1 7
	UENC_BUSY 8 8
mmVCE_VCPU_CNTL 0 0x8005 2 0 4294967295
	CLK_EN 0 0
	RBBM_SOFT_RESET 18 18
mmVCE_VCPU_CACHE_OFFSET0 0 0x8009 1 0 4294967295
	OFFSET 0 27
mmVCE_VCPU_CACHE_SIZE0 0 0x800a 1 0 4294967295
	SIZE 0 23
mmVCE_VCPU_CACHE_OFFSET1 0 0x800b 1 0 4294967295
	OFFSET 0 27
mmVCE_VCPU_CACHE_SIZE1 0 0x800c 1 0 4294967295
	SIZE 0 23
mmVCE_VCPU_CACHE_OFFSET2 0 0x800d 1 0 4294967295
	OFFSET 0 27
mmVCE_VCPU_CACHE_SIZE2 0 0x800e 1 0 4294967295
	SIZE 0 23
mmVCE_SOFT_RESET 0 0x8048 1 0 4294967295
	ECPU_SOFT_RESET 0 0
mmVCE_RB_BASE_LO2 0 0x805b 1 0 4294967295
	RB_BASE_LO 6 31
mmVCE_RB_BASE_HI2 0 0x805c 1 0 4294967295
	RB_BASE_HI 0 31
mmVCE_RB_SIZE2 0 0x805d 1 0 4294967295
	RB_SIZE 4 22
mmVCE_RB_RPTR2 0 0x805e 1 0 4294967295
	RB_RPTR 4 22
mmVCE_RB_WPTR2 0 0x805f 1 0 4294967295
	RB_WPTR 4 22
mmVCE_RB_BASE_LO 0 0x8060 1 0 4294967295
	RB_BASE_LO 6 31
mmVCE_RB_BASE_HI 0 0x8061 1 0 4294967295
	RB_BASE_HI 0 31
mmVCE_RB_SIZE 0 0x8062 1 0 4294967295
	RB_SIZE 4 22
mmVCE_RB_RPTR 0 0x8063 1 0 4294967295
	RB_RPTR 4 22
mmVCE_RB_WPTR 0 0x8064 1 0 4294967295
	RB_WPTR 4 22
mmVCE_RB_ARB_CTRL 0 0x809f 0 0 4294967295
mmVCE_CLOCK_GATING_A 0 0x80be 0 0 4294967295
mmVCE_CLOCK_GATING_B 0 0x80bf 0 0 4294967295
mmVCE_UENC_DMA_DCLK_CTRL 0 0x8390 3 0 4294967295
	WRDMCLK_FORCEON 0 0
	RDDMCLK_FORCEON 1 1
	REGCLK_FORCEON 2 2
mmVCE_CGTT_CLK_OVERRIDE 0 0x81e8 0 0 4294967295
mmVCE_UENC_CLOCK_GATING 0 0x81ef 0 0 4294967295
mmVCE_UENC_REG_CLOCK_GATING 0 0x81f0 0 0 4294967295
mmVCE_SYS_INT_EN 0 0x84c0 1 0 4294967295
	VCE_SYS_INT_TRAP_INTERRUPT_EN 3 3
mmVCE_SYS_INT_STATUS 0 0x84c1 1 0 4294967295
	VCE_SYS_INT_TRAP_INTERRUPT_INT 3 3
mmVCE_SYS_INT_ACK 0 0x84c1 1 0 4294967295
	VCE_SYS_INT_TRAP_INTERRUPT_ACK 3 3
mmVCE_LMI_VCPU_CACHE_40BIT_BAR 0 0x8517 1 0 4294967295
	BAR 0 31
mmVCE_LMI_CTRL2 0 0x851d 1 0 4294967295
	STALL_ARB_UMC 8 8
mmVCE_LMI_SWAP_CNTL3 0 0x851e 1 0 4294967295
	RD_MC_CID_SWAP 0 1
mmVCE_LMI_CTRL 0 0x8526 1 0 4294967295
	VCPU_DATA_COHERENCY_EN 21 21
mmVCE_LMI_STATUS 0 0x8527 0 0 4294967295
mmVCE_LMI_VM_CTRL 0 0x8528 0 0 4294967295
mmVCE_LMI_SWAP_CNTL 0 0x852d 2 0 4294967295
	VCPU_W_MC_SWAP 0 1
	WR_MC_CID_SWAP 2 13
mmVCE_LMI_SWAP_CNTL1 0 0x852e 2 0 4294967295
	VCPU_R_MC_SWAP 0 1
	RD_MC_CID_SWAP 2 13
mmVCE_LMI_SWAP_CNTL2 0 0x8533 1 0 4294967295
	WR_MC_CID_SWAP 0 7
mmVCE_LMI_MISC_CTRL 0 0x8535 0 0 4294967295
mmVCE_LMI_CACHE_CTRL 0 0x853d 1 0 4294967295
	VCPU_EN 0 0