; 1.  PAGE_TABLE_BLOCK_SIZE = 0, PDE0.BLOCK_FRAGMENT_SIZE = 0, PAGE_TABLE_DEPTH=0, VMID=0  // system context
; test implement for a raven1 ASIC

; need to initialize the following registers (taken from a real raven1 running drm-next)
;	mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32=0x0
;	mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32=0x0
;	mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32=0x40900001
;	mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32=0x0
;	PDE0.block_fragment_size=0
;	mmVM_CONTEXT0_CNTL=0x7ffe01
;	VMID0.page_table_block_size=0
;	VMID0.page_table_depth=0
;	mmVGA_MEMORY_BASE_ADDRESS=0x0
;	mmVGA_MEMORY_BASE_ADDRESS_HIGH=0xf4
;	mmMC_VM_FB_OFFSET=0x40
;	mmMC_VM_MX_L1_TLB_CNTL=0x3859
;	mmMC_VM_SYSTEM_APERTURE_LOW_ADDR=0x3d0000
;	mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR=0x3fffffff
;	mmMC_VM_FB_LOCATION_BASE=0xf400
;	mmMC_VM_FB_LOCATION_TOP=0xf47f
;	PDE=0x0000000000900001, PBA==0x000000900000, V=1, S=0, FS=0
;	\-> PTE=0x0600000223886077, VA=0x0000000000444000, PBA==0x000223886000, F=0, V=1, S=1


MMIO@0xA618={0x3fffffff}   ; mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR
MMIO@0xA614={0x3d0000}     ; mmMC_VM_SYSTEM_APERTURE_LOW_ADDR
MMIO@0xA600={0xf400}       ; mmMC_VM_FB_LOCATION_BASE
MMIO@0xA604={0xf47f}       ; MC_VM_FB_LOCATION_TOP
MMIO@0xA42C={0x0}          ; mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32
MMIO@0xA430={0x0}          ; mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32
MMIO@0xA200={0x7ffe01}     ; mmVM_CONTEXT0_CNTL
MMIO@0x0310={0}            ; mmVGA_MEMORY_BASE_ADDRESS=0x0
MMIO@0x0324={0xf4}         ; mmVGA_MEMORY_BASE_ADDRESS_HIGH=0xf4
MMIO@0xA5AC={0x40}         ; mmMC_VM_FB_OFFSET=0x40
MMIO@0xA61C={0x3859}       ; mmMC_VM_MX_L1_TLB_CNTL=0x3859
MMIO@0xA3AC={0x40900001}   ; mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32
MMIO@0xA3B0={0x0}          ; mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32

; need to create a PTB with 1 entry
	VRAM@0x902220={7760882302000006} ; PTE that points to system memory

; data the PTE points to
	SYSRAM@0x223886000={0001020304050607}

; end of file